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authornickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4>1998-10-27 11:13:39 +0000
committernickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4>1998-10-27 11:13:39 +0000
commit6cd477622327a0d6cbb48d69b5f9d80fafe97b6b (patch)
treed27a78ca988127b3ee084a5ed05f914db234fcb9 /gcc/config/arm
parent01e459635681dc101ac28648960d2251047428e0 (diff)
downloadppe42-gcc-6cd477622327a0d6cbb48d69b5f9d80fafe97b6b.tar.gz
ppe42-gcc-6cd477622327a0d6cbb48d69b5f9d80fafe97b6b.zip
Appleid arm-elf contribution from Philip Blundell and merged with Catherine
Moore's work. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@23364 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm')
-rw-r--r--gcc/config/arm/aout.h89
-rw-r--r--gcc/config/arm/arm.c14
-rw-r--r--gcc/config/arm/arm.h20
-rw-r--r--gcc/config/arm/coff.h54
-rw-r--r--gcc/config/arm/elf.h331
-rw-r--r--gcc/config/arm/lib1funcs.asm49
-rw-r--r--gcc/config/arm/linux-aout.h (renamed from gcc/config/arm/linux.h)39
-rw-r--r--gcc/config/arm/linux-elf.h204
-rw-r--r--gcc/config/arm/linux-gas.h68
-rw-r--r--gcc/config/arm/t-arm-elf31
-rw-r--r--gcc/config/arm/unknown-elf.h166
11 files changed, 963 insertions, 102 deletions
diff --git a/gcc/config/arm/aout.h b/gcc/config/arm/aout.h
index 5d3d78959be..5b5ff0606c5 100644
--- a/gcc/config/arm/aout.h
+++ b/gcc/config/arm/aout.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for ARM with a.out
- Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
This file is part of GNU CC.
@@ -24,6 +24,7 @@ Boston, MA 02111-1307, USA. */
#endif
/* The text to go at the start of the assembler file */
+#ifndef ASM_FILE_START
#define ASM_FILE_START(STREAM) \
{ \
fprintf (STREAM,"%srfp\t.req\t%sr9\n", REGISTER_PREFIX, REGISTER_PREFIX); \
@@ -34,22 +35,35 @@ Boston, MA 02111-1307, USA. */
fprintf (STREAM,"%slr\t.req\t%sr14\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%spc\t.req\t%sr15\n", REGISTER_PREFIX, REGISTER_PREFIX); \
}
+#endif
-#define ASM_APP_ON ""
-#define ASM_APP_OFF ""
+#define ASM_APP_ON ""
+#define ASM_APP_OFF ""
/* Switch to the text or data segment. */
-#define TEXT_SECTION_ASM_OP ".text"
-#define DATA_SECTION_ASM_OP ".data"
-#define BSS_SECTION_ASM_OP ".bss"
+#define TEXT_SECTION_ASM_OP ".text"
+#define DATA_SECTION_ASM_OP ".data"
+#define BSS_SECTION_ASM_OP ".bss"
+
+/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
+ make sure that this change is reflected in the function
+ coff_arm_is_local_label_name() in bfd/coff-arm.c */
+#ifndef REGISTER_PREFIX
+#define REGISTER_PREFIX ""
+#endif
+
+#ifndef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX "_"
+#endif
+
+#ifndef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX ""
+#endif
-#define REGISTER_PREFIX ""
-#define USER_LABEL_PREFIX "_"
-#define LOCAL_LABEL_PREFIX ""
/* The assembler's names for the registers. */
#ifndef REGISTER_NAMES
-#define REGISTER_NAMES \
+#define REGISTER_NAMES \
{ \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
@@ -111,25 +125,32 @@ do { \
} while (0)
/* Output a function label definition. */
-#define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
- ASM_OUTPUT_LABEL(STREAM, NAME)
+#ifndef ASM_DECLARE_FUNCTION_NAME
+#define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) ASM_OUTPUT_LABEL (STREAM, NAME)
+#endif
+#ifndef ASM_OUTPUT_LABEL
#define ASM_OUTPUT_LABEL(STREAM,NAME) \
do { \
assemble_name (STREAM,NAME); \
fputs (":\n", STREAM); \
} while (0)
-
+#endif
+
/* Output a globalising directive for a label. */
+#ifndef ASM_GLOBALIZE_LABEL
#define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
(fprintf (STREAM, "\t.global\t"), \
assemble_name (STREAM, NAME), \
- fputc ('\n',STREAM)) \
+ fputc ('\n',STREAM))
+#endif
/* Make an internal label into a string. */
+#ifndef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
sprintf (STRING, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
-
+#endif
+
/* Nothing special is done about jump tables */
/* #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) */
/* #define ASM_OUTPUT_CASE_END(STREAM,NUM,TABLE) */
@@ -196,14 +217,14 @@ do { char dstr[30]; \
output_addr_const (STREAM, (EXP)), \
fputc ('\n', STREAM))
-#define ASM_OUTPUT_BYTE(STREAM, VALUE) \
+#define ASM_OUTPUT_BYTE(STREAM, VALUE) \
fprintf (STREAM, "\t.byte\t%d\n", VALUE)
#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
output_ascii_pseudo_op ((STREAM), (unsigned char *)(PTR), (LEN))
/* Output a gap. In fact we fill it with nulls. */
-#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
+#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
fprintf (STREAM, "\t.space\t%d\n", NBYTES)
/* Align output to a power of two. Horrible /bin/as. */
@@ -219,13 +240,18 @@ do { char dstr[30]; \
} while (0)
/* Output a common block */
+#ifndef ASM_OUTPUT_COMMON
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
(fprintf (STREAM, "\t.comm\t"), \
assemble_name ((STREAM), (NAME)), \
- fprintf(STREAM, ", %d\t%s %d\n", ROUNDED, ASM_COMMENT_START, SIZE))
-
+ fprintf (STREAM, ", %d\t%s %d\n", ROUNDED, ASM_COMMENT_START, SIZE))
+#endif
+
/* Output a local common block. /bin/as can't do this, so hack a
- `.space' into the bss segment. Note that this is *bad* practice. */
+ `.space' into the bss segment. Note that this is *bad* practice,
+ which is guaranteed NOT to work since it doesn't define STATIC
+ COMMON space but merely STATIC BSS space. */
+#ifndef ASM_OUTPUT_ALIGNED_LOCAL
#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM,NAME,SIZE,ALIGN) \
do { \
bss_section (); \
@@ -233,27 +259,32 @@ do { char dstr[30]; \
ASM_OUTPUT_LABEL (STREAM, NAME); \
fprintf (STREAM, "\t.space\t%d\n", SIZE); \
} while (0)
-
+#endif
+
/* Output a zero-initialized block. */
+#ifndef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(STREAM,DECL,NAME,SIZE,ALIGN) \
- asm_output_aligned_bss(STREAM, DECL, NAME, SIZE, ALIGN)
-
+ asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
+#endif
+
/* Output a source line for the debugger. */
/* #define ASM_OUTPUT_SOURCE_LINE(STREAM,LINE) */
/* Output a #ident directive. */
+#ifndef ASM_OUTPUT_IDENT
#define ASM_OUTPUT_IDENT(STREAM,STRING) \
- fprintf (STREAM,"- - - ident %s\n",STRING)
-
+ fprintf (STREAM, "%s - - - ident %s\n", ASM_COMMENT_START, STRING)
+#endif
+
/* The assembler's parentheses characters. */
-#define ASM_OPEN_PAREN "("
-#define ASM_CLOSE_PAREN ")"
+#define ASM_OPEN_PAREN "("
+#define ASM_CLOSE_PAREN ")"
#ifndef ASM_COMMENT_START
-#define ASM_COMMENT_START "@"
+#define ASM_COMMENT_START "@"
#endif
/* This works for GAS and some other assemblers. */
-#define SET_ASM_OP ".set"
+#define SET_ASM_OP ".set"
#include "arm/arm.h"
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index feaf7ba6d22..a096d8980ad 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -90,6 +90,10 @@ enum prog_mode_type arm_prgmode;
/* Set by the -mfp=... option */
char *target_fp_name = NULL;
+/* Used to parse -mstructure_size_boundary command line option. */
+char * structure_size_string = NULL;
+int arm_structure_size_boundary = 32; /* Used to be 8 */
+
/* Nonzero if this is an "M" variant of the processor. */
int arm_fast_multiply = 0;
@@ -367,6 +371,16 @@ arm_override_options ()
flag_schedule_insns = flag_schedule_insns_after_reload = 0;
arm_prog_mode = TARGET_APCS_32 ? PROG_MODE_PROG32 : PROG_MODE_PROG26;
+
+ if (structure_size_string != NULL)
+ {
+ int size = strtol (structure_size_string, NULL, 0);
+
+ if (size == 8 || size == 32)
+ arm_structure_size_boundary = size;
+ else
+ warning ("Structure size boundary can only be set to 8 or 32");
+ }
}
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 960c14014e7..6521a86ef47 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -30,6 +30,9 @@ Boston, MA 02111-1307, USA. */
should default to that used by the OS.
*/
+#ifndef __ARM_H__
+#define __ARM_H__
+
#define TARGET_CPU_arm2 0x0000
#define TARGET_CPU_arm250 0x0000
#define TARGET_CPU_arm3 0x0000
@@ -180,7 +183,9 @@ Unrecognized value in TARGET_CPU_DEFAULT.
%{m3:-D__APCS_26__} %{!m6:%{!m3:%{!m2:%(cpp_apcs_pc_default)}}}}} \
"
+#ifndef CPP_APCS_PC_DEFAULT_SPEC
#define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_26__"
+#endif
#define CPP_FLOAT_SPEC "\
%{msoft-float:\
@@ -381,7 +386,9 @@ extern char *target_fp_name;
{"cpu=", & arm_select[1].string, "Specify the name of the target CPU" }, \
{"arch=", & arm_select[2].string, "Specify the name of the target architecture" }, \
{"tune=", & arm_select[3].string, "" }, \
- {"fp=", & target_fp_name, "Specify the version of the floating point emulator"} \
+ {"fp=", & target_fp_name, "Specify the version of the floating point emulator"}, \
+ { "structure-size-boundary=", & structure_size_string, \
+ "Specify the minumum bit alignment of structures" } \
}
/* arm_select[0] is reserved for the default cpu. */
@@ -579,7 +586,12 @@ extern int arm_arch4;
/* This is for compatibility with ARMCC. ARM SDT Reference Manual
(ARM DUI 0020D) page 2-20 says "Structures are aligned on word
boundaries". */
+#ifndef STRUCTURE_SIZE_BOUNDARY
#define STRUCTURE_SIZE_BOUNDARY 32
+#endif
+
+/* Used when parsing command line option -mstructure_size_boundary. */
+extern char * structure_size_string;
/* Non-zero if move instructions will actually fail to work
when given unaligned data. */
@@ -1832,6 +1844,7 @@ extern int arm_compare_fp;
goto JUMPTO
/* Output an internal label definition. */
+#ifndef ASM_OUTPUT_INTERNAL_LABEL
#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
do \
{ \
@@ -1848,7 +1861,8 @@ extern int arm_compare_fp;
ASM_GENERATE_INTERNAL_LABEL (s, (PREFIX), (NUM)); \
ASM_OUTPUT_LABEL (STREAM, s); \
} while (0)
-
+#endif
+
/* Output a push or a pop instruction (only used when profiling). */
#define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
fprintf(STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
@@ -2132,3 +2146,5 @@ void aof_add_import (/* char * */);
void aof_delete_import (/* char * */);
void aof_dump_imports (/* FILE * */);
#endif
+
+#endif /* __ARM_H__ */
diff --git a/gcc/config/arm/coff.h b/gcc/config/arm/coff.h
index 4e568cb7941..6db0c1afd06 100644
--- a/gcc/config/arm/coff.h
+++ b/gcc/config/arm/coff.h
@@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler,
for ARM with COFF obj format.
- Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
This file is part of GNU CC.
@@ -21,27 +21,25 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "arm/semi.h"
+#include "arm/aout.h"
/* Run-time Target Specification. */
-#undef TARGET_VERSION
+#undef TARGET_VERSION
#define TARGET_VERSION fputs (" (ARM/coff)", stderr)
-/* ??? Maybe use --with{enable?}-fpu or some such to make hardware floating
- point the default. NOT --nfp! --with{enable?} is supposed to replace it
- (right?), so let's stop using it. */
-#undef TARGET_DEFAULT
+#undef TARGET_DEFAULT
#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32)
-/* ??? Is a big-endian default intended to be supported? */
-#if 0 /*TARGET_CPU_DEFAULT & ARM_FLAG_BIG_END*/
-#define MULTILIB_DEFAULTS { "mbig-endian" }
-#else
-#define MULTILIB_DEFAULTS { "mlittle-endian" }
-#endif
+#define MULTILIB_DEFAULTS { "mlittle-endian", "msoft-float", "mapcs-32" }
-/* ??? Does arm.h really need to set this to 32? */
-#undef STRUCTURE_SIZE_BOUNDARY
-#define STRUCTURE_SIZE_BOUNDARY 8
+/* Setting this to 32 produces more efficient code, but the value set in previous
+ versions of this toolchain was 8, which produces more compact structures. The
+ command line option -mstructure_size_boundary=<n> can be used to change this
+ value. */
+#undef STRUCTURE_SIZE_BOUNDARY
+#define STRUCTURE_SIZE_BOUNDARY arm_structure_size_boundary
+
+extern int arm_structure_size_boundary;
/* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
is a valid machine specific attribute for DECL.
@@ -57,12 +55,6 @@ arm_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
#include "dbxcoff.h"
-#undef LOCAL_LABEL_PREFIX
-#define LOCAL_LABEL_PREFIX "."
-
-#undef USER_LABEL_PREFIX
-#define USER_LABEL_PREFIX ""
-
/* A C statement to output assembler commands which will identify the
object file as having been compiled with GNU CC (or another GNU
compiler). */
@@ -71,7 +63,8 @@ arm_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
Also, when using stabs, gcc2_compiled must be a stabs entry, not an
ordinary symbol, or gdb won't see it. The stabs entry must be
before the N_SO in order for gdb to find it. */
-#define ASM_IDENTIFY_GCC(STREAM)
+#define ASM_IDENTIFY_GCC(STREAM) \
+ fprintf (STREAM, "%sgcc2_compiled.:\n", LOCAL_LABEL_PREFIX )
/* This outputs a lot of .req's to define alias for various registers.
Let's try to avoid this. */
@@ -106,14 +99,13 @@ do { \
Otherwise, the readonly data section is used. */
#define JUMP_TABLES_IN_TEXT_SECTION 1
-#undef READONLY_DATA_SECTION
+#undef READONLY_DATA_SECTION
#define READONLY_DATA_SECTION rdata_section
-#undef RDATA_SECTION_ASM_OP
+#undef RDATA_SECTION_ASM_OP
#define RDATA_SECTION_ASM_OP "\t.section .rdata"
-
-#undef CTORS_SECTION_ASM_OP
+#undef CTORS_SECTION_ASM_OP
#define CTORS_SECTION_ASM_OP "\t.section .ctors,\"x\""
-#undef DTORS_SECTION_ASM_OP
+#undef DTORS_SECTION_ASM_OP
#define DTORS_SECTION_ASM_OP "\t.section .dtors,\"x\""
/* A list of other sections which the compiler might be "in" at any
@@ -200,8 +192,12 @@ do { \
#undef DO_GLOBAL_CTORS_BODY
#undef DO_GLOBAL_DTORS_BODY
-/* The ARM development system has atexit and doesn't have _exit,
- so define this for now. */
+/* If you don't define HAVE_ATEXIT, and the object file format/OS/whatever
+ does not support constructors/destructors, then gcc implements destructors
+ by defining its own exit function, which calls the destructors. This gcc
+ exit function overrides the C library's exit function, and this can cause
+ all kinds of havoc if the C library has a non-trivial exit function. You
+ really don't want to use the exit function in libgcc2.c. */
#define HAVE_ATEXIT
/* The ARM development system defines __main. */
diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h
new file mode 100644
index 00000000000..a8aaf76d2e7
--- /dev/null
+++ b/gcc/config/arm/elf.h
@@ -0,0 +1,331 @@
+/* Definitions of target machine for GNU compiler,
+ for ARM with ELF obj format.
+ Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
+ Contributed by Philip Blundell <philb@gnu.org> and
+ Catherine Moore <clm@cygnus.com>
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+
+#define OBJECT_FORMAT_ELF
+
+#ifndef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+#endif
+
+#ifndef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX ""
+#endif
+
+#ifndef CPP_PREDEFINES
+#define CPP_PREDEFINES "-Darm -Darm_elf -Acpu(arm) -Amachine(arm) -D__ELF__"
+#endif
+
+/* The following macro defines the format used to output the second
+ operand of the .type assembler directive. Different svr4 assemblers
+ expect various different forms for this operand. The one given here
+ is just a default. You may need to override it in your machine-
+ specific tm.h file (depending upon the particulars of your assembler). */
+#define TYPE_OPERAND_FMT "%s"
+
+/* Write the extra assembler code needed to declare a function's result.
+ Most svr4 assemblers don't require any special declaration of the
+ result value, but there are exceptions. */
+#ifndef ASM_DECLARE_RESULT
+#define ASM_DECLARE_RESULT(FILE, RESULT)
+#endif
+
+/* These macros generate the special .type and .size directives which
+ are used to set the corresponding fields of the linker symbol table
+ entries in an ELF object file under SVR4. These macros also output
+ the starting labels for the relevant functions/objects. */
+#define TYPE_ASM_OP ".type"
+#define SIZE_ASM_OP ".size"
+
+/* Write the extra assembler code needed to declare a function properly.
+ Some svr4 assemblers need to also have something extra said about the
+ function's return value. We allow for that here. */
+#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
+ do { \
+ fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
+ assemble_name (FILE, NAME); \
+ putc (',', FILE); \
+ fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
+ putc ('\n', FILE); \
+ ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
+ ASM_OUTPUT_LABEL(FILE, NAME); \
+ } while (0)
+
+/* Write the extra assembler code needed to declare an object properly. */
+#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
+ do { \
+ fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
+ assemble_name (FILE, NAME); \
+ putc (',', FILE); \
+ fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
+ putc ('\n', FILE); \
+ size_directive_output = 0; \
+ if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
+ { \
+ size_directive_output = 1; \
+ fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
+ assemble_name (FILE, NAME); \
+ putc (',', FILE); \
+ fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, \
+ int_size_in_bytes (TREE_TYPE (DECL))); \
+ fputc ('\n', FILE); \
+ } \
+ ASM_OUTPUT_LABEL(FILE, NAME); \
+ } while (0)
+
+/* Output the size directive for a decl in rest_of_decl_compilation
+ in the case where we did not do so before the initializer.
+ Once we find the error_mark_node, we know that the value of
+ size_directive_output was set
+ by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
+#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
+do { \
+ char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
+ if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
+ && ! AT_END && TOP_LEVEL \
+ && DECL_INITIAL (DECL) == error_mark_node \
+ && !size_directive_output) \
+ { \
+ size_directive_output = 1; \
+ fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
+ assemble_name (FILE, name); \
+ putc (',', FILE); \
+ fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, \
+ int_size_in_bytes (TREE_TYPE (DECL))); \
+ fputc ('\n', FILE); \
+ } \
+ } while (0)
+
+/* This is how to declare the size of a function. */
+#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
+ do { \
+ if (!flag_inhibit_size_directive) \
+ { \
+ char label[256]; \
+ static int labelno; \
+ labelno ++; \
+ ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
+ ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
+ fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
+ assemble_name (FILE, (FNAME)); \
+ fprintf (FILE, ","); \
+ assemble_name (FILE, label); \
+ fprintf (FILE, "-"); \
+ assemble_name (FILE, (FNAME)); \
+ putc ('\n', FILE); \
+ } \
+ } while (0)
+
+/* Define this macro if jump tables (for `tablejump' insns) should be
+ output in the text section, along with the assembler instructions.
+ Otherwise, the readonly data section is used. */
+#define JUMP_TABLES_IN_TEXT_SECTION 1
+
+#ifndef ASM_SPEC
+#define ASM_SPEC "%{mbig-endian:-EB} %{mcpu=*:-m%*} %{march=*:-m%*} \
+ %{mapcs-*:-mapcs-%*} %{mthumb-interwork:-mthumb-interwork}"
+#endif
+
+#ifndef LINK_SPEC
+#define LINK_SPEC "%{mbig-endian:-EB} -X"
+#endif
+
+/* Run-time Target Specification. */
+#ifndef TARGET_VERSION
+#define TARGET_VERSION fputs (" (ARM/elf)", stderr)
+#endif
+
+#ifndef TARGET_DEFAULT
+#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32)
+#endif
+
+#ifndef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS { "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork" }
+#endif
+
+/* Setting this to 32 produces more efficient code, but the value set in previous
+ versions of this toolchain was 8, which produces more compact structures. The
+ command line option -mstructure_size_boundary=<n> can be used to change this
+ value. */
+#undef STRUCTURE_SIZE_BOUNDARY
+#define STRUCTURE_SIZE_BOUNDARY arm_structure_size_boundary
+
+extern int arm_structure_size_boundary;
+
+/* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
+ is a valid machine specific attribute for DECL.
+ The attributes in ATTRIBUTES have previously been assigned to DECL. */
+extern int arm_valid_machine_decl_attribute ();
+#define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, IDENTIFIER, ARGS) \
+arm_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
+
+
+/* A C statement to output assembler commands which will identify the
+ object file as having been compiled with GNU CC (or another GNU
+ compiler). */
+/* Define this to NULL so we don't get anything.
+ We have ASM_IDENTIFY_LANGUAGE.
+ Also, when using stabs, gcc2_compiled must be a stabs entry, not an
+ ordinary symbol, or gdb won't see it. The stabs entry must be
+ before the N_SO in order for gdb to find it. */
+#ifndef ASM_IDENTIFY_GCC
+#define ASM_IDENTIFY_GCC(STREAM) \
+ fprintf (STREAM, "%sgcc2_compiled.:\n", LOCAL_LABEL_PREFIX )
+#endif
+
+/* This outputs a lot of .req's to define alias for various registers.
+ Let's try to avoid this. */
+#ifndef ASM_FILE_START
+#define ASM_FILE_START(STREAM) \
+do { \
+ extern char *version_string; \
+ fprintf (STREAM, "%s Generated by gcc %s for ARM/elf\n", \
+ ASM_COMMENT_START, version_string); \
+} while (0)
+#endif
+
+/* Output an internal label definition. */
+#ifndef ASM_OUTPUT_INTERNAL_LABEL
+#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
+ do \
+ { \
+ char *s = (char *) alloca (40 + strlen (PREFIX)); \
+ extern int arm_target_label, arm_ccfsm_state; \
+ extern rtx arm_target_insn; \
+ \
+ if (arm_ccfsm_state == 3 && arm_target_label == (NUM) \
+ && !strcmp (PREFIX, "L")) \
+ { \
+ arm_ccfsm_state = 0; \
+ arm_target_insn = NULL; \
+ } \
+ ASM_GENERATE_INTERNAL_LABEL (s, (PREFIX), (NUM)); \
+ ASM_OUTPUT_LABEL (STREAM, s); \
+ } while (0)
+#endif
+
+/* Support the ctors/dtors and other sections. */
+
+/* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
+
+ Note that we want to give these sections the SHF_WRITE attribute
+ because these sections will actually contain data (i.e. tables of
+ addresses of functions in the current root executable or shared library
+ file) and, in the case of a shared library, the relocatable addresses
+ will have to be properly resolved/relocated (and then written into) by
+ the dynamic linker when it actually attaches the given shared library
+ to the executing process. (Note that on SVR4, you may wish to use the
+ `-z text' option to the ELF linker, when building a shared library, as
+ an additional check that you are doing everything right. But if you do
+ use the `-z text' option when building a shared library, you will get
+ errors unless the .ctors and .dtors sections are marked as writable
+ via the SHF_WRITE attribute.) */
+#ifndef CTORS_SECTION_ASM_OP
+#define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"aw\""
+#endif
+
+#ifndef DTORS_SECTION_ASM_OP
+#define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"aw\""
+#endif
+
+/* A list of other sections which the compiler might be "in" at any
+ given time. */
+#ifndef SUBTARGET_EXTRA_SECTIONS
+#define SUBTARGET_EXTRA_SECTIONS
+#endif
+
+#ifndef EXTRA_SECTIONS
+#define EXTRA_SECTIONS SUBTARGET_EXTRA_SECTIONS in_ctors, in_dtors
+#endif
+
+/* A list of extra section function definitions. */
+#ifndef SUBTARGET_EXTRA_SECTION_FUNCTIONS
+#define SUBTARGET_EXTRA_SECTION_FUNCTIONS
+#endif
+
+#ifndef EXTRA_SECTION_FUNCTIONS
+#define EXTRA_SECTION_FUNCTIONS \
+ SUBTARGET_EXTRA_SECTION_FUNCTIONS \
+ CTORS_SECTION_FUNCTION \
+ DTORS_SECTION_FUNCTION
+#endif
+
+#ifndef CTORS_SECTION_FUNCTION
+#define CTORS_SECTION_FUNCTION \
+void \
+ctors_section () \
+{ \
+ if (in_section != in_ctors) \
+ { \
+ fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \
+ in_section = in_ctors; \
+ } \
+}
+#endif
+
+#ifndef DTORS_SECTION_FUNCTION
+#define DTORS_SECTION_FUNCTION \
+void \
+dtors_section () \
+{ \
+ if (in_section != in_dtors) \
+ { \
+ fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
+ in_section = in_dtors; \
+ } \
+}
+#endif
+
+/* Support the ctors/dtors sections for g++. */
+#ifndef INT_ASM_OP
+#define INT_ASM_OP ".word"
+#endif
+
+/* A C statement (sans semicolon) to output an element in the table of
+ global constructors. */
+#ifndef ASM_OUTPUT_CONSTRUCTOR
+#define ASM_OUTPUT_CONSTRUCTOR(STREAM,NAME) \
+do { \
+ ctors_section (); \
+ fprintf (STREAM, "\t%s\t ", INT_ASM_OP); \
+ assemble_name (STREAM, NAME); \
+ fprintf (STREAM, "\n"); \
+} while (0)
+#endif
+
+/* A C statement (sans semicolon) to output an element in the table of
+ global destructors. */
+#ifndef ASM_OUTPUT_DESTRUCTOR
+#define ASM_OUTPUT_DESTRUCTOR(STREAM,NAME) \
+do { \
+ dtors_section (); \
+ fprintf (STREAM, "\t%s\t ", INT_ASM_OP); \
+ assemble_name (STREAM, NAME); \
+ fprintf (STREAM, "\n"); \
+} while (0)
+#endif
+
+#include "arm/aout.h"
+
+
+
diff --git a/gcc/config/arm/lib1funcs.asm b/gcc/config/arm/lib1funcs.asm
index aac0ce1977f..5baab8aa551 100644
--- a/gcc/config/arm/lib1funcs.asm
+++ b/gcc/config/arm/lib1funcs.asm
@@ -1,7 +1,7 @@
@ libgcc1 routines for ARM cpu.
@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
-/* Copyright (C) 1995, 1996 Free Software Foundation, Inc.
+/* Copyright (C) 1995, 1996, 1998 Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
@@ -43,6 +43,16 @@ Boston, MA 02111-1307, USA. */
#define RETCOND
#endif
+#ifdef __elf__
+#define __PLT__ (PLT)
+#define TYPE(x) .type SYM(x),function
+#define SIZE(x) .size SYM(x), . - SYM(x)
+#else
+#define __PLT__
+#define TYPE(x)
+#define SIZE(x)
+#endif
+
#ifndef __USER_LABEL_PREFIX__
#define __USER_LABEL_PREFIX__ _
#endif
@@ -66,9 +76,11 @@ ip .req r12
sp .req r13
lr .req r14
pc .req r15
+
.text
- .globl SYM (__udivsi3)
- .align 0
+ .globl SYM(__udivsi3)
+ TYPE (__udivsi3)
+ .align 0
SYM (__udivsi3):
cmp divisor, #0
@@ -124,10 +136,12 @@ Lgot_result:
Ldiv0:
str lr, [sp, #-4]!
- bl SYM (__div0)
+ bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
ldmia sp!, {pc}RETCOND
+ SIZE (__udivsi3)
+
#endif /* L_udivsi3 */
#ifdef L_umodsi3
@@ -140,8 +154,10 @@ ip .req r12
sp .req r13
lr .req r14
pc .req r15
+
.text
.globl SYM (__umodsi3)
+ TYPE (__umodsi3)
.align 0
SYM (__umodsi3):
@@ -210,10 +226,12 @@ Loop3:
Ldiv0:
str lr, [sp, #-4]!
- bl SYM (__div0)
+ bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
ldmia sp!, {pc}RETCOND
+ SIZE (__umodsi3)
+
#endif /* L_umodsi3 */
#ifdef L_divsi3
@@ -226,8 +244,10 @@ ip .req r12
sp .req r13
lr .req r14
pc .req r15
+
.text
.globl SYM (__divsi3)
+ TYPE (__divsi3)
.align 0
SYM (__divsi3):
@@ -291,10 +311,12 @@ Lgot_result:
Ldiv0:
str lr, [sp, #-4]!
- bl SYM (__div0)
+ bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
ldmia sp!, {pc}RETCOND
+ SIZE (__divsi3)
+
#endif /* L_divsi3 */
#ifdef L_modsi3
@@ -307,8 +329,10 @@ ip .req r12
sp .req r13
lr .req r14
pc .req r15
+
.text
.globl SYM (__modsi3)
+ TYPE (__modsi3)
.align 0
SYM (__modsi3):
@@ -388,38 +412,47 @@ Lgot_result:
Ldiv0:
str lr, [sp, #-4]!
- bl SYM (__div0)
+ bl SYM (__div0) __PLT__
mov r0, #0 @ about as wrong as it could be
ldmia sp!, {pc}RETCOND
+ SIZE (__modsi3)
+
#endif /* L_modsi3 */
#ifdef L_dvmd_tls
.globl SYM (__div0)
+ TYPE (__div0)
.align 0
SYM (__div0):
RET pc, lr
+ SIZE (__div0)
+
#endif /* L_divmodsi_tools */
#ifdef L_dvmd_lnx
@ GNU/Linux division-by zero handler. Used in place of L_dvmd_tls
#include <asm/unistd.h>
+
#define SIGFPE 8 @ cant use <asm/signal.h> as it
@ contains too much C rubbish
.globl SYM (__div0)
+ TYPE (__div0)
.align 0
SYM (__div0):
stmfd sp!, {r1, lr}
swi __NR_getpid
cmn r0, #1000
- ldmgefd sp!, {r1, pc}RETCOND @ not much we can do
+ ldmhsfd sp!, {r1, pc}RETCOND @ not much we can do
mov r1, #SIGFPE
swi __NR_kill
ldmfd sp!, {r1, pc}RETCOND
+ SIZE (__div0)
+
#endif /* L_dvmd_lnx */
/* These next two sections are here despite the fact that they contain Thumb
diff --git a/gcc/config/arm/linux.h b/gcc/config/arm/linux-aout.h
index 55579cec724..3a853bd9d9e 100644
--- a/gcc/config/arm/linux.h
+++ b/gcc/config/arm/linux-aout.h
@@ -1,6 +1,6 @@
-/* Definitions for ARM running Linux
- Copyright (C) 1993, 1994, 1997 Free Software Foundation, Inc.
- Adapted from ARM Linux by Russell King <rmk92@ecs.soton.ac.uk>.
+/* Definitions for ARM running Linux-based GNU systems using a.out.
+ Copyright (C) 1993, 1994, 1997, 1998 Free Software Foundation, Inc.
+ Contributed by Russell King <rmk92@ecs.soton.ac.uk>.
This file is part of GNU CC.
@@ -31,7 +31,7 @@ Boston, MA 02111-1307, USA. */
#undef COMMENT_BEGIN
/* We default to ARM3. */
-#define TARGET_CPU_DEFAULT TARGET_CPU_arm3
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm3
#undef CPP_PREDEFINES
#define CPP_PREDEFINES \
@@ -41,33 +41,18 @@ Boston, MA 02111-1307, USA. */
#define LIB_SPEC \
"%{mieee-fp:-lieee} %{p:-lgmon} %{pg:-lgmon} %{!ggdb:-lc} %{ggdb:-lg}"
-#undef SIZE_TYPE
-#define SIZE_TYPE "unsigned int"
-
-#undef PTRDIFF_TYPE
-#define PTRDIFF_TYPE "int"
-
-#undef WCHAR_TYPE
-#define WCHAR_TYPE "long int"
-
-#undef WCHAR_TYPE_SIZE
-#define WCHAR_TYPE_SIZE BITS_PER_WORD
-
#define HANDLE_SYSV_PRAGMA
/* Run-time Target Specification. */
-#define TARGET_VERSION \
- fputs (" (ARM Linux/a.out)", stderr);
+#define TARGET_VERSION fputs (" (ARM GNU/Linux with a.out)", stderr);
-/* This is used in ASM_FILE_START */
-#define ARM_OS_NAME "Linux"
-
-/* Unsigned chars produces much better code than signed. */
-#define DEFAULT_SIGNED_CHAR 0
-
-/* Maths operation domain error number, EDOM */
+/*
+ * Maths operation domain error number, EDOM
+ * We don't really want this for libc6. However, taking it out would be
+ * too much of a pain for now and it doesn't hurt much.
+ */
#define TARGET_EDOM 33
+
#include "arm/aout.h"
-#undef SUBTARGET_CPP_SPEC
-#define SUBTARGET_CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
+#include "arm/linux-gas.h"
diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h
new file mode 100644
index 00000000000..d90609303ff
--- /dev/null
+++ b/gcc/config/arm/linux-elf.h
@@ -0,0 +1,204 @@
+/* Definitions for ARM running Linux-based GNU systems using ELF
+ Copyright (C) 1993, 1994, 1997, 1998 Free Software Foundation, Inc.
+ Contributed by Philip Blundell <philb@gnu.org>
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* Run-time Target Specification. */
+#define TARGET_VERSION fputs (" (ARM GNU/Linux with ELF)", stderr);
+
+/* We have libgcc2. */
+#define HAVE_ATEXIT
+
+/* Default is to use APCS-32 mode. */
+#ifndef SUBTARGET_DEFAULT_APCS26
+#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_SHORT_BYTE)
+#define SUBTARGET_EXTRA_LINK_SPEC \
+ " %{mapcs-26:-m elf32arm26} %{!mapcs-26:-m elf32arm}"
+#define SUBTARGET_EXTRA_ASM_SPEC \
+ " %{mapcs-26:-mapcs-26} %(!mapcs-26:-mapcs-32}"
+#endif
+
+/* Now we define the strings used to build the spec file. */
+#define LIB_SPEC "%{!shared:%{!symbolic:-lc}}"
+
+/* Add the compiler's crtend, and the library's crtn. */
+#define ENDFILE_SPEC "%{!shared:crtend.o%s} %{shared:crtendS.o%s} \
+ %{pg:gcrtn.o%s}%{!pg:crtn.o%s}"
+
+#define STARTFILE_SPEC "%{!shared:crt1.o%s} \
+ crti.o%s \
+ %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}"
+
+#define LINK_SPEC "%{h*} %{version:-v} \
+ %{b} %{Wl,*:%*} \
+ %{static:-Bstatic} \
+ %{shared:-shared} \
+ %{symbolic:-Bsymbolic} \
+ %{rdynamic:-export-dynamic} \
+ %{!dynamic-linker:-dynamic-linker /lib/ld-linux.so.2} \
+ -X \
+ %{mbig-endian:-EB}" \
+ SUBTARGET_EXTRA_LINK_SPEC
+
+#undef CPP_PREDEFINES
+#define CPP_PREDEFINES \
+"-Dunix -Darm -Dlinux -Asystem(unix) -Asystem(posix) -Acpu(arm) \
+-Amachine(arm) -D__ELF__ -Darm_elf"
+
+#ifndef SUBTARGET_DEFAULT_APCS26
+#undef CPP_APCS_PC_DEFAULT_SPEC
+#define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+#endif
+
+/* Allow #sccs in preprocessor. */
+#define SCCS_DIRECTIVE
+
+#define USER_LABEL_PREFIX "" /* For ELF the default is no underscores */
+#define LOCAL_LABEL_PREFIX "."
+
+/* Attach a special .ident directive to the end of the file to identify
+ the version of GCC which compiled this code. */
+#define IDENT_ASM_OP ".ident"
+
+/* Output #ident as a .ident. */
+#define ASM_OUTPUT_IDENT(FILE, NAME) \
+ fprintf (FILE, "\t%s\t\"%s\"\n", IDENT_ASM_OP, NAME);
+
+#ifdef IDENTIFY_WITH_IDENT
+#define ASM_IDENTIFY_GCC(FILE) /* nothing */
+#define ASM_IDENTIFY_LANGUAGE(FILE) \
+ fprintf (FILE, "\t%s \"GCC (%s) %s\"\n", IDENT_ASM_OP, \
+ lang_identify (), version_string)
+#else
+#define ASM_FILE_END(FILE) \
+do { \
+ fprintf ((FILE), "\t%s\t\"GCC: (GNU) %s\"\n", \
+ IDENT_ASM_OP, version_string); \
+ } while (0)
+#endif
+
+/* Support const sections and the ctors and dtors sections for g++.
+ Note that there appears to be two different ways to support const
+ sections at the moment. You can either #define the symbol
+ READONLY_DATA_SECTION (giving it some code which switches to the
+ readonly data section) or else you can #define the symbols
+ EXTRA_SECTIONS, EXTRA_SECTION_FUNCTIONS, SELECT_SECTION, and
+ SELECT_RTX_SECTION. We do both here just to be on the safe side. */
+#define USE_CONST_SECTION 1
+
+/* Support for Constructors and Destructors. */
+#define READONLY_DATA_SECTION() const_section ()
+
+/* A default list of other sections which we might be "in" at any given
+ time. For targets that use additional sections (e.g. .tdesc) you
+ should override this definition in the target-specific file which
+ includes this file. */
+#define SUBTARGET_EXTRA_SECTIONS in_const,
+
+/* A default list of extra section function definitions. For targets
+ that use additional sections (e.g. .tdesc) you should override this
+ definition in the target-specific file which includes this file. */
+#define SUBTARGET_EXTRA_SECTION_FUNCTIONS CONST_SECTION_FUNCTION
+
+extern void text_section ();
+
+#define CONST_SECTION_ASM_OP ".section\t.rodata"
+
+#define CONST_SECTION_FUNCTION \
+void \
+const_section () \
+{ \
+ if (!USE_CONST_SECTION) \
+ text_section (); \
+ else if (in_section != in_const) \
+ { \
+ fprintf (asm_out_file, "%s\n", CONST_SECTION_ASM_OP); \
+ in_section = in_const; \
+ } \
+}
+
+/* Switch into a generic section.
+ This is currently only used to support section attributes.
+
+ We make the section read-only and executable for a function decl,
+ read-only for a const data decl, and writable for a non-const data decl. */
+#define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME, RELOC) \
+ fprintf (FILE, ".section\t%s,\"%s\",%%progbits\n", NAME, \
+ (DECL) && TREE_CODE (DECL) == FUNCTION_DECL ? "ax" : \
+ (DECL) && DECL_READONLY_SECTION (DECL, RELOC) ? "a" : "aw")
+
+/* A C statement or statements to switch to the appropriate
+ section for output of DECL. DECL is either a `VAR_DECL' node
+ or a constant of some sort. RELOC indicates whether forming
+ the initial value of DECL requires link-time relocations. */
+#define SELECT_SECTION(DECL,RELOC) \
+{ \
+ if (TREE_CODE (DECL) == STRING_CST) \
+ { \
+ if (! flag_writable_strings) \
+ const_section (); \
+ else \
+ data_section (); \
+ } \
+ else if (TREE_CODE (DECL) == VAR_DECL) \
+ { \
+ if ((flag_pic && RELOC) \
+ || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL) \
+ || !DECL_INITIAL (DECL) \
+ || (DECL_INITIAL (DECL) != error_mark_node \
+ && !TREE_CONSTANT (DECL_INITIAL (DECL)))) \
+ data_section (); \
+ else \
+ const_section (); \
+ } \
+ else \
+ const_section (); \
+}
+
+/* A C statement or statements to switch to the appropriate
+ section for output of RTX in mode MODE. RTX is some kind
+ of constant in RTL. The argument MODE is redundant except
+ in the case of a `const_int' rtx. Currently, these always
+ go into the const section. */
+#define SELECT_RTX_SECTION(MODE,RTX) const_section ()
+
+/* On svr4, we *do* have support for the .init and .fini sections, and we
+ can put stuff in there to be executed before and after `main'. We let
+ crtstuff.c and other files know this by defining the following symbols.
+ The definitions say how to change sections to the .init and .fini
+ sections. This is the same for all known svr4 assemblers. */
+#define INIT_SECTION_ASM_OP ".section\t.init"
+#define FINI_SECTION_ASM_OP ".section\t.fini"
+
+
+/* This is how we tell the assembler that a symbol is weak. */
+#define ASM_WEAKEN_LABEL(FILE,NAME) \
+ do { fputs ("\t.weak\t", FILE); assemble_name (FILE, NAME); \
+ fputc ('\n', FILE); } while (0)
+
+/* This is how we tell the assembler that two symbols have the same value. */
+
+#define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
+ do { assemble_name (FILE, NAME1); \
+ fputs (" = ", FILE); \
+ assemble_name (FILE, NAME2); \
+ fputc ('\n', FILE); } while (0)
+
+#include "arm/elf.h"
+#include "arm/linux-gas.h"
diff --git a/gcc/config/arm/linux-gas.h b/gcc/config/arm/linux-gas.h
index 67f5c6f0503..72567f39158 100644
--- a/gcc/config/arm/linux-gas.h
+++ b/gcc/config/arm/linux-gas.h
@@ -1,5 +1,6 @@
-/* Definitions of target machine for GNU compiler. ARM Linux version.
- Copyright (C) 1997 Free Software Foundation, Inc.
+/* Definitions of target machine for GNU compiler.
+ ARM Linux-based GNU systems version.
+ Copyright (C) 1997, 1998 Free Software Foundation, Inc.
Contributed by Russell King <rmk92@ecs.soton.ac.uk>.
This file is part of GNU CC.
@@ -19,11 +20,6 @@ along with this program; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-/* Limit the length of a stabs entry (for the broken Acorn assembler) */
-#define DBX_CONTIN_LENGTH 80
-
-#include "arm/linux.h"
-
/*
* We are using GAS, so stabs should work.
*/
@@ -31,3 +27,61 @@ Boston, MA 02111-1307, USA. */
#ifndef DBX_DEBUGGING_INFO
#define DBX_DEBUGGING_INFO 1
#endif
+
+/*
+ * This is how we tell the assembler that a symbol is weak. GAS always
+ * supports weak symbols.
+ */
+
+#define ASM_WEAKEN_LABEL(FILE,NAME) \
+ do { fputs ("\t.weak\t", FILE); assemble_name (FILE, NAME); \
+ fputc ('\n', FILE); } while (0)
+
+/* This is used in ASM_FILE_START */
+#undef ARM_OS_NAME
+#define ARM_OS_NAME "Linux"
+
+/* Unsigned chars produces much better code than signed. */
+#define DEFAULT_SIGNED_CHAR 0
+
+#undef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__}"
+
+#undef SIZE_TYPE
+#define SIZE_TYPE "unsigned int"
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "int"
+
+#undef WCHAR_TYPE
+#define WCHAR_TYPE "long int"
+
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+
+#if 0 /* not yet */
+
+/* Clear the instruction cache from `beg' to `end'. This makes an
+ inline system call to SYS_cacheflush. The arguments are as
+ follows:
+
+ cacheflush (start, end, flags)
+
+*/
+
+#define CLEAR_INSN_CACHE(BEG, END) \
+{ \
+ register unsigned long _beg __asm ("a1") = (unsigned long) (BEG); \
+ register unsigned long _end __asm ("a2") = (unsigned long) (END); \
+ register unsigned long _flg __asm ("a3") = 0; \
+ __asm __volatile ("swi 0x9000b8"); \
+}
+
+#endif
+
+/* If cross-compiling, don't require stdio.h etc to build libgcc.a. */
+#ifdef CROSS_COMPILE
+#ifndef inhibit_libc
+#define inhibit_libc
+#endif
+#endif
diff --git a/gcc/config/arm/t-arm-elf b/gcc/config/arm/t-arm-elf
new file mode 100644
index 00000000000..bb0a3d50723
--- /dev/null
+++ b/gcc/config/arm/t-arm-elf
@@ -0,0 +1,31 @@
+CROSS_LIBGCC1 = libgcc1-asm.a
+LIB1ASMSRC = arm/lib1funcs.asm
+LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls
+
+EXTRA_PARTS = crtbegin.o crtend.o
+
+# These are really part of libgcc1, but this will cause them to be
+# built correctly, so...
+
+LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c
+
+fp-bit.c: $(srcdir)/config/fp-bit.c
+ echo '#define FLOAT' > fp-bit.c
+ echo '#ifndef __ARMEB__' >> fp-bit.c
+ echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
+ echo '#endif' >> fp-bit.c
+ cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+dp-bit.c: $(srcdir)/config/fp-bit.c
+ echo '#ifndef __ARMEB__' > dp-bit.c
+ echo '#define FLOAT_BIT_ORDER_MISMATCH' >> dp-bit.c
+ echo '#define FLOAT_WORD_ORDER_MISMATCH' >> dp-bit.c
+ echo '#endif' >> dp-bit.c
+ cat $(srcdir)/config/fp-bit.c >> dp-bit.c
+
+MULTILIB_OPTIONS = mlittle-endian/mbig-endian mhard-float/msoft-float mapcs-32/mapcs-26
+MULTILIB_DIRNAMES = le be fpu soft 32bit 26bit
+MULTILIB_MATCHES =
+
+LIBGCC = stmp-multilib
+INSTALL_LIBGCC = install-multilib
diff --git a/gcc/config/arm/unknown-elf.h b/gcc/config/arm/unknown-elf.h
new file mode 100644
index 00000000000..d23ba6f7f9a
--- /dev/null
+++ b/gcc/config/arm/unknown-elf.h
@@ -0,0 +1,166 @@
+/* Definitions for non-Linux based ARM systems using ELF
+ Copyright (C) 1998 Free Software Foundation, Inc.
+ Contributed by Catherine Moore <clm@cygnus.com>
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* Run-time Target Specification. */
+#define TARGET_VERSION fputs (" (ARM non-Linux)", stderr);
+
+/* If you don't define HAVE_ATEXIT, and the object file format/OS/whatever
+ does not support constructors/destructors, then gcc implements destructors
+ by defining its own exit function, which calls the destructors. This gcc
+ exit function overrides the C library's exit function, and this can cause
+ all kinds of havoc if the C library has a non-trivial exit function. You
+ really don't want to use the exit function in libgcc2.c. */
+#define HAVE_ATEXIT
+
+/* Default to using APCS-32 and software floating point. */
+#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32)
+
+/* Now we define the strings used to build the spec file. */
+#define STARTFILE_SPEC "crtbegin%O%s crt0%O%s"
+
+#define ENDFILE_SPEC "crtend%O%s"
+
+#define USER_LABEL_PREFIX "_" /* FIXME: This ought to be "" */
+#define LOCAL_LABEL_PREFIX "."
+
+#define TEXT_SECTION " .text"
+
+#define INVOKE__main
+
+/* Debugging */
+#define DWARF_DEBUGGING_INFO
+#define DWARF2_DEBUGGING_INFO
+#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
+
+/* Support for Constructors and Destrcutors . */
+#define READONLY_DATA_SECTION rdata_section
+
+/* A list of other sections which the compiler might be "in" at any
+ given time. */
+#define SUBTARGET_EXTRA_SECTIONS in_rdata,
+
+/* A list of extra section function definitions. */
+#define SUBTARGET_EXTRA_SECTION_FUNCTIONS RDATA_SECTION_FUNCTION
+
+#define RDATA_SECTION_ASM_OP "\t.section .rodata"
+
+#define RDATA_SECTION_FUNCTION \
+void \
+rdata_section () \
+{ \
+ if (in_section != in_rdata) \
+ { \
+ fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
+ in_section = in_rdata; \
+ } \
+}
+
+#define CTOR_LIST_BEGIN \
+asm (CTORS_SECTION_ASM_OP); \
+func_ptr __CTOR_LIST__[1] = { (func_ptr) (-1) }
+
+#define CTOR_LIST_END \
+asm (CTORS_SECTION_ASM_OP); \
+func_ptr __CTOR_END__[1] = { (func_ptr) 0 };
+
+#define DTOR_LIST_BEGIN \
+asm (DTORS_SECTION_ASM_OP); \
+func_ptr __DTOR_LIST__[1] = { (func_ptr) (-1) }
+
+#define DTOR_LIST_END \
+asm (DTORS_SECTION_ASM_OP); \
+func_ptr __DTOR_END__[1] = { (func_ptr) 0 };
+
+/* A C statement to output something to the assembler file to switch to section
+ NAME for object DECL which is either a FUNCTION_DECL, a VAR_DECL or
+ NULL_TREE. Some target formats do not support arbitrary sections. Do not
+ define this macro in such cases. */
+#define ASM_OUTPUT_SECTION_NAME(STREAM, DECL, NAME, RELOC) \
+do { \
+ if ((DECL) && TREE_CODE (DECL) == FUNCTION_DECL) \
+ fprintf (STREAM, "\t.section %s,\"ax\",@progbits\n", (NAME)); \
+ else if ((DECL) && DECL_READONLY_SECTION (DECL, RELOC)) \
+ fprintf (STREAM, "\t.section %s,\"a\"\n", (NAME)); \
+ else \
+ fprintf (STREAM, "\t.section %s,\"aw\"\n", (NAME)); \
+} while (0)
+
+/* Don't know how to order these. UNALIGNED_WORD_ASM_OP is in
+ dwarf2.out. */
+#define UNALIGNED_WORD_ASM_OP ".4byte"
+
+#define ASM_OUTPUT_DWARF2_ADDR_CONST(FILE,ADDR) \
+ if (((ADDR)[0] == '.') && ((ADDR)[1] == 'L')) \
+ fprintf ((FILE), "\t%s\t%s", UNALIGNED_WORD_ASM_OP, (ADDR)); \
+ else \
+ fprintf ((FILE), "\t%s\t%s%s", \
+ UNALIGNED_WORD_ASM_OP, USER_LABEL_PREFIX, (ADDR))
+
+#define ASM_OUTPUT_DWARF_ADDR_CONST(FILE,RTX) \
+do { \
+ fprintf ((FILE), "\t%s\t", UNALIGNED_WORD_ASM_OP); \
+ output_addr_const ((FILE), (RTX)); \
+ fputc ('\n', (FILE)); \
+} while (0)
+
+
+/* The ARM development system defines __main. */
+#define NAME__MAIN "__gccmain"
+#define SYMBOL__MAIN __gccmain
+
+#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)
+#define UNIQUE_SECTION_P(DECL) (DECL_ONE_ONLY (DECL))
+#define UNIQUE_SECTION(DECL,RELOC) \
+do { \
+ int len; \
+ char *name, *string, *prefix; \
+ \
+ name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (DECL)); \
+ \
+ if (! DECL_ONE_ONLY (DECL)) \
+ { \
+ prefix = "."; \
+ if (TREE_CODE (DECL) == FUNCTION_DECL) \
+ prefix = ".text."; \
+ else if (DECL_READONLY_SECTION (DECL, RELOC)) \
+ prefix = ".rodata."; \
+ else \
+ prefix = ".data."; \
+ } \
+ else if (TREE_CODE (DECL) == FUNCTION_DECL) \
+ prefix = ".gnu.linkonce.t."; \
+ else if (DECL_READONLY_SECTION (DECL, RELOC)) \
+ prefix = ".gnu.linkonce.r."; \
+ else \
+ prefix = ".gnu.linkonce.d."; \
+ \
+ len = strlen (name) + strlen (prefix); \
+ string = alloca (len + 1); \
+ sprintf (string, "%s%s", prefix, name); \
+ \
+ DECL_SECTION_NAME (DECL) = build_string (len, string); \
+} while (0)
+
+#define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm7tdmi
+
+/* Now get the routine arm-elf definitions. */
+#include "arm/elf.h"
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