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authorjules <jules@138bc75d-0d04-0410-961f-82ee72b054a4>2013-06-18 15:19:55 +0000
committerjules <jules@138bc75d-0d04-0410-961f-82ee72b054a4>2013-06-18 15:19:55 +0000
commit1c2054e4910cffc46206f86efb3a908a31e99de9 (patch)
treebea73d88a4e28756281943baff15f1470bac1531 /gcc/config/arm/neon.md
parent32d76803130708a3580616e18dbf32406ff8c53a (diff)
downloadppe42-gcc-1c2054e4910cffc46206f86efb3a908a31e99de9.tar.gz
ppe42-gcc-1c2054e4910cffc46206f86efb3a908a31e99de9.zip
* config/arm/arm.c (neon_vector_mem_operand): Add strict argument.
Permit virtual register pre-reload if !strict. (coproc_secondary_reload_class): Adjust for neon_vector_mem_operand change. * config/arm/arm-protos.h (neon_vector_mem_operand): Adjust prototype. * config/arm/neon.md (movmisalign<mode>): Use neon_perm_struct_or_reg_operand instead of neon_struct_or_register_operand. (*movmisalign<mode>_neon_load, *movmisalign<mode>_neon_store): Use neon_permissive_struct_operand instead of neon_struct_operand. * config/arm/constraints.md (Un, Um, Us): Adjust calls to neon_vector_mem_operand. * config/arm/predicates.md (neon_struct_operand): Adjust call to neon_vector_mem_operand. (neon_permissive_struct_operand): New. (neon_struct_or_register_operand): Rename to... (neon_perm_struct_or_reg_operand): This. Adjust call to neon_vector_mem_operand. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200172 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm/neon.md')
-rw-r--r--gcc/config/arm/neon.md18
1 files changed, 10 insertions, 8 deletions
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index e814df0d264..2761adb286a 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -241,8 +241,8 @@
})
(define_expand "movmisalign<mode>"
- [(set (match_operand:VDQX 0 "neon_struct_or_register_operand")
- (unspec:VDQX [(match_operand:VDQX 1 "neon_struct_or_register_operand")]
+ [(set (match_operand:VDQX 0 "neon_perm_struct_or_reg_operand")
+ (unspec:VDQX [(match_operand:VDQX 1 "neon_perm_struct_or_reg_operand")]
UNSPEC_MISALIGNED_ACCESS))]
"TARGET_NEON && !BYTES_BIG_ENDIAN"
{
@@ -255,7 +255,7 @@
})
(define_insn "*movmisalign<mode>_neon_store"
- [(set (match_operand:VDX 0 "neon_struct_operand" "=Um")
+ [(set (match_operand:VDX 0 "neon_permissive_struct_operand" "=Um")
(unspec:VDX [(match_operand:VDX 1 "s_register_operand" " w")]
UNSPEC_MISALIGNED_ACCESS))]
"TARGET_NEON && !BYTES_BIG_ENDIAN"
@@ -263,15 +263,16 @@
[(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")])
(define_insn "*movmisalign<mode>_neon_load"
- [(set (match_operand:VDX 0 "s_register_operand" "=w")
- (unspec:VDX [(match_operand:VDX 1 "neon_struct_operand" " Um")]
+ [(set (match_operand:VDX 0 "s_register_operand" "=w")
+ (unspec:VDX [(match_operand:VDX 1 "neon_permissive_struct_operand"
+ " Um")]
UNSPEC_MISALIGNED_ACCESS))]
"TARGET_NEON && !BYTES_BIG_ENDIAN"
"vld1.<V_sz_elem>\t{%P0}, %A1"
[(set_attr "neon_type" "neon_vld1_1_2_regs")])
(define_insn "*movmisalign<mode>_neon_store"
- [(set (match_operand:VQX 0 "neon_struct_operand" "=Um")
+ [(set (match_operand:VQX 0 "neon_permissive_struct_operand" "=Um")
(unspec:VQX [(match_operand:VQX 1 "s_register_operand" " w")]
UNSPEC_MISALIGNED_ACCESS))]
"TARGET_NEON && !BYTES_BIG_ENDIAN"
@@ -279,8 +280,9 @@
[(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")])
(define_insn "*movmisalign<mode>_neon_load"
- [(set (match_operand:VQX 0 "s_register_operand" "=w")
- (unspec:VQX [(match_operand:VQX 1 "neon_struct_operand" " Um")]
+ [(set (match_operand:VQX 0 "s_register_operand" "=w")
+ (unspec:VQX [(match_operand:VQX 1 "neon_permissive_struct_operand"
+ " Um")]
UNSPEC_MISALIGNED_ACCESS))]
"TARGET_NEON && !BYTES_BIG_ENDIAN"
"vld1.<V_sz_elem>\t{%q0}, %A1"
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