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authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2011-08-18 17:24:39 +0000
committerhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2011-08-18 17:24:39 +0000
commitd2a15bb86011faf9aee1115ccd7964c9b1eb14e0 (patch)
treeb59f28405a8840d4ab39c3854797c53cc153f3e1 /gcc/common/config
parent42f875c31a38c8f2f78cda2febbba016efcc2c01 (diff)
downloadppe42-gcc-d2a15bb86011faf9aee1115ccd7964c9b1eb14e0.tar.gz
ppe42-gcc-d2a15bb86011faf9aee1115ccd7964c9b1eb14e0.zip
Add -mavx2.
2011-08-18 Kirill Yukhin <kirill.yukhin@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX2_SET): New. (OPTION_MASK_ISA_AVX_UNSET): Update. (OPTION_MASK_ISA_AVX2_UNSET): New. (ix86_handle_option): Handle OPT_mavx2 case. * config/i386/cpuid.h (bit_AVX2): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect AVX2 feature. * config/i386/i386-c.c (ix86_target_macros_internal): Conditionally define __AVX2__. * config/i386/i386.c (ix86_option_override_internal): Define PTA_AVX2. Define "core-avx2" processor alias. Handle avx2 option. (ix86_valid_target_attribute_inner_p): Handle avx2 option. * config/i386/i386.h (TARGET_AVX2): New. * config/i386/i386.opt (mavx2): New. * doc/invoke.texi: Document -mavx2. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@177876 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/common/config')
-rw-r--r--gcc/common/config/i386/i386-common.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
index 1fd33bd39f8..b2018357dfd 100644
--- a/gcc/common/config/i386/i386-common.c
+++ b/gcc/common/config/i386/i386-common.c
@@ -52,6 +52,8 @@ along with GCC; see the file COPYING3. If not see
(OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_SSE4_2_SET)
#define OPTION_MASK_ISA_FMA_SET \
(OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_AVX_SET)
+#define OPTION_MASK_ISA_AVX2_SET \
+ (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX_SET)
/* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
as -msse4.2. */
@@ -114,8 +116,10 @@ along with GCC; see the file COPYING3. If not see
(OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_AVX_UNSET )
#define OPTION_MASK_ISA_AVX_UNSET \
(OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_FMA_UNSET \
- | OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET)
+ | OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET \
+ | OPTION_MASK_ISA_AVX2_UNSET)
#define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA
+#define OPTION_MASK_ISA_AVX2_UNSET OPTION_MASK_ISA_AVX2
/* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
as -mno-sse4.1. */
@@ -277,6 +281,19 @@ ix86_handle_option (struct gcc_options *opts,
}
return true;
+ case OPT_mavx2:
+ if (value)
+ {
+ opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
+ opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
+ }
+ else
+ {
+ opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX2_UNSET;
+ opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_UNSET;
+ }
+ return true;
+
case OPT_mfma:
if (value)
{
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