blob: 5b86cb31c7eab6e9b701851fe607db23ec6d5d03 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
|
/* Blackfin instruction classes list
Copyright (C) 2005-2013 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc.
This file is part of simulators.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* Only bother with insn groups rather than exact insn (for now?). */
I(ProgCtrl_nop)
I(ProgCtrl_branch)
I(ProgCtrl_sync)
I(ProgCtrl_cec)
I(ProgCtrl_atomic)
I(CaCTRL)
I(PushPopReg)
I(PushPopMultiple)
I(ccMV)
I(CCflag)
I(CC2dreg)
I(CC2stat)
I(BRCC)
I(UJUMP)
I(REGMV)
I(ALU2op)
I(PTR2op)
I(LOGI2op)
I(COMP3op)
I(COMPI2opD)
I(COMPI2opP)
I(LDSTpmod)
I(dagMODim)
I(dagMODik)
I(dspLDST)
I(LDST)
I(LDSTiiFP)
I(LDSTii)
I(LoopSetup)
I(LDIMMhalf)
I(CALLa)
I(LDSTidxI)
I(linkage)
I(dsp32mac)
I(dsp32mult)
I(dsp32alu)
I(dsp32shift)
I(dsp32shiftimm)
I(psedoDEBUG)
I(psedoOChar)
I(psedodbg_assert)
|