blob: 42dbec6b43f742fc0821564677be533bf3f6eefa (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
|
/* Blackfin NAND Flash Memory Controller (NFC) model
Copyright (C) 2010-2011 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc.
This file is part of simulators.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef DV_BFIN_NFC_H
#define DV_BFIN_NFC_H
/* XXX: This should be pushed into the model data. */
#define BFIN_MMR_NFC_SIZE 0x50
/* NFC_STAT masks. */
#define NBUSY (1 << 0)
#define WB_FULL (1 << 1)
#define PG_WR_STAT (1 << 2)
#define PG_RD_STAT (1 << 3)
#define WB_EMPTY (1 << 4)
/* NFC_IRQSTAT masks. */
#define NBUSYIRQ (1 << 0)
#define WB_OVF (1 << 1)
#define WB_EDGE (1 << 2)
#define RD_RDY (1 << 3)
#define WR_DONE (1 << 4)
#endif
|
