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|
.*: Assembler messages:
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GAS LISTING .*
[ ]*1[ ]+\# Check 64bit unsupported HLE instructions
[ ]*2[ ]+
[ ]*3[ ]+\.allow_index_reg
[ ]*4[ ]+\.text
[ ]*5[ ]+_start:
[ ]*6[ ]+
[ ]*7[ ]+\# Tests for op imm8 al
[ ]*8[ ]+xacquire adc \$100,%al
[ ]*9[ ]+xacquire lock adc \$100,%al
[ ]*10[ ]+lock xacquire adc \$100,%al
[ ]*11[ ]+xrelease adc \$100,%al
[ ]*12[ ]+xrelease lock adc \$100,%al
[ ]*13[ ]+lock xrelease adc \$100,%al
[ ]*14[ ]+
[ ]*15[ ]+\# Tests for op imm16 ax
[ ]*16[ ]+xacquire adc \$1000,%ax
[ ]*17[ ]+xacquire lock adc \$1000,%ax
[ ]*18[ ]+lock xacquire adc \$1000,%ax
[ ]*19[ ]+xrelease adc \$1000,%ax
[ ]*20[ ]+xrelease lock adc \$1000,%ax
[ ]*21[ ]+lock xrelease adc \$1000,%ax
[ ]*22[ ]+
[ ]*23[ ]+\# Tests for op imm32 eax
[ ]*24[ ]+xacquire adc \$10000000,%eax
[ ]*25[ ]+xacquire lock adc \$10000000,%eax
[ ]*26[ ]+lock xacquire adc \$10000000,%eax
[ ]*27[ ]+xrelease adc \$10000000,%eax
[ ]*28[ ]+xrelease lock adc \$10000000,%eax
[ ]*29[ ]+lock xrelease adc \$10000000,%eax
[ ]*30[ ]+
[ ]*31[ ]+
[ ]*32[ ]+\# Tests for op imm32 rax
[ ]*33[ ]+xacquire adc \$10000000,%rax
[ ]*34[ ]+xacquire lock adc \$10000000,%rax
[ ]*35[ ]+lock xacquire adc \$10000000,%rax
[ ]*36[ ]+xrelease adc \$10000000,%rax
[ ]*37[ ]+xrelease lock adc \$10000000,%rax
[ ]*38[ ]+lock xrelease adc \$10000000,%rax
[ ]*39[ ]+
[ ]*40[ ]+\# Tests for op imm8 regb/m8
[ ]*41[ ]+xacquire adcb \$100,%cl
[ ]*42[ ]+xacquire lock adcb \$100,%cl
[ ]*43[ ]+lock xacquire adcb \$100,%cl
[ ]*44[ ]+xrelease adcb \$100,%cl
[ ]*45[ ]+xrelease lock adcb \$100,%cl
[ ]*46[ ]+lock xrelease adcb \$100,%cl
[ ]*47[ ]+xacquire adcb \$100,\(%rcx\)
[ ]*48[ ]+xrelease adcb \$100,\(%rcx\)
[ ]*49[ ]+
[ ]*50[ ]+\# Tests for op imm16 regs/m16
[ ]*51[ ]+xacquire adcw \$1000,%cx
[ ]*52[ ]+xacquire lock adcw \$1000,%cx
[ ]*53[ ]+lock xacquire adcw \$1000,%cx
[ ]*54[ ]+xrelease adcw \$1000,%cx
[ ]*55[ ]+xrelease lock adcw \$1000,%cx
[ ]*56[ ]+lock xrelease adcw \$1000,%cx
[ ]*57[ ]+xacquire adcw \$1000,\(%rcx\)
GAS LISTING .*
[ ]*58[ ]+xrelease adcw \$1000,\(%rcx\)
[ ]*59[ ]+
[ ]*60[ ]+\# Tests for op imm32 regl/m32
[ ]*61[ ]+xacquire adcl \$10000000,%ecx
[ ]*62[ ]+xacquire lock adcl \$10000000,%ecx
[ ]*63[ ]+lock xacquire adcl \$10000000,%ecx
[ ]*64[ ]+xrelease adcl \$10000000,%ecx
[ ]*65[ ]+xrelease lock adcl \$10000000,%ecx
[ ]*66[ ]+lock xrelease adcl \$10000000,%ecx
[ ]*67[ ]+xacquire adcl \$10000000,\(%rcx\)
[ ]*68[ ]+xrelease adcl \$10000000,\(%rcx\)
[ ]*69[ ]+
[ ]*70[ ]+\# Tests for op imm32 regq/m64
[ ]*71[ ]+xacquire adcq \$10000000,%rcx
[ ]*72[ ]+xacquire lock adcq \$10000000,%rcx
[ ]*73[ ]+lock xacquire adcq \$10000000,%rcx
[ ]*74[ ]+xrelease adcq \$10000000,%rcx
[ ]*75[ ]+xrelease lock adcq \$10000000,%rcx
[ ]*76[ ]+lock xrelease adcq \$10000000,%rcx
[ ]*77[ ]+xacquire adcq \$10000000,\(%rcx\)
[ ]*78[ ]+xrelease adcq \$10000000,\(%rcx\)
[ ]*79[ ]+
[ ]*80[ ]+\# Tests for op imm8 regs/m16
[ ]*81[ ]+xacquire adcw \$100,%cx
[ ]*82[ ]+xacquire lock adcw \$100,%cx
[ ]*83[ ]+lock xacquire adcw \$100,%cx
[ ]*84[ ]+xrelease adcw \$100,%cx
[ ]*85[ ]+xrelease lock adcw \$100,%cx
[ ]*86[ ]+lock xrelease adcw \$100,%cx
[ ]*87[ ]+xacquire adcw \$100,\(%rcx\)
[ ]*88[ ]+xrelease adcw \$100,\(%rcx\)
[ ]*89[ ]+
[ ]*90[ ]+\# Tests for op imm8 regl/m32
[ ]*91[ ]+xacquire adcl \$100,%ecx
[ ]*92[ ]+xacquire lock adcl \$100,%ecx
[ ]*93[ ]+lock xacquire adcl \$100,%ecx
[ ]*94[ ]+xrelease adcl \$100,%ecx
[ ]*95[ ]+xrelease lock adcl \$100,%ecx
[ ]*96[ ]+lock xrelease adcl \$100,%ecx
[ ]*97[ ]+xacquire adcl \$100,\(%rcx\)
[ ]*98[ ]+xrelease adcl \$100,\(%rcx\)
[ ]*99[ ]+
[ ]*100[ ]+\# Tests for op imm8 regq/m64
[ ]*101[ ]+xacquire adcq \$100,%rcx
[ ]*102[ ]+xacquire lock adcq \$100,%rcx
[ ]*103[ ]+lock xacquire adcq \$100,%rcx
[ ]*104[ ]+xrelease adcq \$100,%rcx
[ ]*105[ ]+xrelease lock adcq \$100,%rcx
[ ]*106[ ]+lock xrelease adcq \$100,%rcx
[ ]*107[ ]+xacquire adcq \$100,\(%rcx\)
[ ]*108[ ]+xrelease adcq \$100,\(%rcx\)
[ ]*109[ ]+
[ ]*110[ ]+\# Tests for op imm8 regb/m8
[ ]*111[ ]+xacquire adcb \$100,%cl
[ ]*112[ ]+xacquire lock adcb \$100,%cl
[ ]*113[ ]+lock xacquire adcb \$100,%cl
[ ]*114[ ]+xrelease adcb \$100,%cl
GAS LISTING .*
[ ]*115[ ]+xrelease lock adcb \$100,%cl
[ ]*116[ ]+lock xrelease adcb \$100,%cl
[ ]*117[ ]+xacquire adcb \$100,\(%rcx\)
[ ]*118[ ]+xrelease adcb \$100,\(%rcx\)
[ ]*119[ ]+
[ ]*120[ ]+\# Tests for op regb regb/m8
[ ]*121[ ]+\# Tests for op regb/m8 regb
[ ]*122[ ]+xacquire adcb %al,%cl
[ ]*123[ ]+xacquire lock adcb %al,%cl
[ ]*124[ ]+lock xacquire adcb %al,%cl
[ ]*125[ ]+xrelease adcb %al,%cl
[ ]*126[ ]+xrelease lock adcb %al,%cl
[ ]*127[ ]+lock xrelease adcb %al,%cl
[ ]*128[ ]+xacquire adcb %al,\(%rcx\)
[ ]*129[ ]+xrelease adcb %al,\(%rcx\)
[ ]*130[ ]+xacquire adcb %cl,%al
[ ]*131[ ]+xacquire lock adcb %cl,%al
[ ]*132[ ]+lock xacquire adcb %cl,%al
[ ]*133[ ]+xrelease adcb %cl,%al
[ ]*134[ ]+xrelease lock adcb %cl,%al
[ ]*135[ ]+lock xrelease adcb %cl,%al
[ ]*136[ ]+xacquire adcb \(%rcx\),%al
[ ]*137[ ]+xacquire lock adcb \(%rcx\),%al
[ ]*138[ ]+lock xacquire adcb \(%rcx\),%al
[ ]*139[ ]+xrelease adcb \(%rcx\),%al
[ ]*140[ ]+xrelease lock adcb \(%rcx\),%al
[ ]*141[ ]+lock xrelease adcb \(%rcx\),%al
[ ]*142[ ]+
[ ]*143[ ]+\# Tests for op regs regs/m16
[ ]*144[ ]+\# Tests for op regs/m16 regs
[ ]*145[ ]+xacquire adcw %ax,%cx
[ ]*146[ ]+xacquire lock adcw %ax,%cx
[ ]*147[ ]+lock xacquire adcw %ax,%cx
[ ]*148[ ]+xrelease adcw %ax,%cx
[ ]*149[ ]+xrelease lock adcw %ax,%cx
[ ]*150[ ]+lock xrelease adcw %ax,%cx
[ ]*151[ ]+xacquire adcw %ax,\(%rcx\)
[ ]*152[ ]+xrelease adcw %ax,\(%rcx\)
[ ]*153[ ]+xacquire adcw %cx,%ax
[ ]*154[ ]+xacquire lock adcw %cx,%ax
[ ]*155[ ]+lock xacquire adcw %cx,%ax
[ ]*156[ ]+xrelease adcw %cx,%ax
[ ]*157[ ]+xrelease lock adcw %cx,%ax
[ ]*158[ ]+lock xrelease adcw %cx,%ax
[ ]*159[ ]+xacquire adcw \(%rcx\),%ax
[ ]*160[ ]+xacquire lock adcw \(%rcx\),%ax
[ ]*161[ ]+lock xacquire adcw \(%rcx\),%ax
[ ]*162[ ]+xrelease adcw \(%rcx\),%ax
[ ]*163[ ]+xrelease lock adcw \(%rcx\),%ax
[ ]*164[ ]+lock xrelease adcw \(%rcx\),%ax
[ ]*165[ ]+
[ ]*166[ ]+\# Tests for op regl regl/m32
[ ]*167[ ]+\# Tests for op regl/m32 regl
[ ]*168[ ]+xacquire adcl %eax,%ecx
[ ]*169[ ]+xacquire lock adcl %eax,%ecx
[ ]*170[ ]+lock xacquire adcl %eax,%ecx
[ ]*171[ ]+xrelease adcl %eax,%ecx
GAS LISTING .*
[ ]*172[ ]+xrelease lock adcl %eax,%ecx
[ ]*173[ ]+lock xrelease adcl %eax,%ecx
[ ]*174[ ]+xacquire adcl %eax,\(%rcx\)
[ ]*175[ ]+xrelease adcl %eax,\(%rcx\)
[ ]*176[ ]+xacquire adcl %ecx,%eax
[ ]*177[ ]+xacquire lock adcl %ecx,%eax
[ ]*178[ ]+lock xacquire adcl %ecx,%eax
[ ]*179[ ]+xrelease adcl %ecx,%eax
[ ]*180[ ]+xrelease lock adcl %ecx,%eax
[ ]*181[ ]+lock xrelease adcl %ecx,%eax
[ ]*182[ ]+xacquire adcl \(%rcx\),%eax
[ ]*183[ ]+xacquire lock adcl \(%rcx\),%eax
[ ]*184[ ]+lock xacquire adcl \(%rcx\),%eax
[ ]*185[ ]+xrelease adcl \(%rcx\),%eax
[ ]*186[ ]+xrelease lock adcl \(%rcx\),%eax
[ ]*187[ ]+lock xrelease adcl \(%rcx\),%eax
[ ]*188[ ]+
[ ]*189[ ]+\# Tests for op regq regq/m64
[ ]*190[ ]+\# Tests for op regq/m64 regq
[ ]*191[ ]+xacquire adcq %rax,%rcx
[ ]*192[ ]+xacquire lock adcq %rax,%rcx
[ ]*193[ ]+lock xacquire adcq %rax,%rcx
[ ]*194[ ]+xrelease adcq %rax,%rcx
[ ]*195[ ]+xrelease lock adcq %rax,%rcx
[ ]*196[ ]+lock xrelease adcq %rax,%rcx
[ ]*197[ ]+xacquire adcq %rax,\(%rcx\)
[ ]*198[ ]+xrelease adcq %rax,\(%rcx\)
[ ]*199[ ]+xacquire adcq %rcx,%rax
[ ]*200[ ]+xacquire lock adcq %rcx,%rax
[ ]*201[ ]+lock xacquire adcq %rcx,%rax
[ ]*202[ ]+xrelease adcq %rcx,%rax
[ ]*203[ ]+xrelease lock adcq %rcx,%rax
[ ]*204[ ]+lock xrelease adcq %rcx,%rax
[ ]*205[ ]+xacquire adcq \(%rcx\),%rax
[ ]*206[ ]+xacquire lock adcq \(%rcx\),%rax
[ ]*207[ ]+lock xacquire adcq \(%rcx\),%rax
[ ]*208[ ]+xrelease adcq \(%rcx\),%rax
[ ]*209[ ]+xrelease lock adcq \(%rcx\),%rax
[ ]*210[ ]+lock xrelease adcq \(%rcx\),%rax
[ ]*211[ ]+
[ ]*212[ ]+\# Tests for op regs, regs/m16
[ ]*213[ ]+xacquire btcw %ax,%cx
[ ]*214[ ]+xacquire lock btcw %ax,%cx
[ ]*215[ ]+lock xacquire btcw %ax,%cx
[ ]*216[ ]+xrelease btcw %ax,%cx
[ ]*217[ ]+xrelease lock btcw %ax,%cx
[ ]*218[ ]+lock xrelease btcw %ax,%cx
[ ]*219[ ]+xacquire btcw %ax,\(%rcx\)
[ ]*220[ ]+xrelease btcw %ax,\(%rcx\)
[ ]*221[ ]+
[ ]*222[ ]+\# Tests for op regl regl/m32
[ ]*223[ ]+xacquire btcl %eax,%ecx
[ ]*224[ ]+xacquire lock btcl %eax,%ecx
[ ]*225[ ]+lock xacquire btcl %eax,%ecx
[ ]*226[ ]+xrelease btcl %eax,%ecx
[ ]*227[ ]+xrelease lock btcl %eax,%ecx
[ ]*228[ ]+lock xrelease btcl %eax,%ecx
GAS LISTING .*
[ ]*229[ ]+xacquire btcl %eax,\(%rcx\)
[ ]*230[ ]+xrelease btcl %eax,\(%rcx\)
[ ]*231[ ]+
[ ]*232[ ]+\# Tests for op regq regq/m64
[ ]*233[ ]+xacquire btcq %rax,%rcx
[ ]*234[ ]+xacquire lock btcq %rax,%rcx
[ ]*235[ ]+lock xacquire btcq %rax,%rcx
[ ]*236[ ]+xrelease btcq %rax,%rcx
[ ]*237[ ]+xrelease lock btcq %rax,%rcx
[ ]*238[ ]+lock xrelease btcq %rax,%rcx
[ ]*239[ ]+xacquire btcq %rax,\(%rcx\)
[ ]*240[ ]+xrelease btcq %rax,\(%rcx\)
[ ]*241[ ]+
[ ]*242[ ]+\# Tests for op regb/m8
[ ]*243[ ]+xacquire decb %cl
[ ]*244[ ]+xacquire lock decb %cl
[ ]*245[ ]+lock xacquire decb %cl
[ ]*246[ ]+xrelease decb %cl
[ ]*247[ ]+xrelease lock decb %cl
[ ]*248[ ]+lock xrelease decb %cl
[ ]*249[ ]+xacquire decb \(%rcx\)
[ ]*250[ ]+xrelease decb \(%rcx\)
[ ]*251[ ]+
[ ]*252[ ]+\# Tests for op regs/m16
[ ]*253[ ]+xacquire decw %cx
[ ]*254[ ]+xacquire lock decw %cx
[ ]*255[ ]+lock xacquire decw %cx
[ ]*256[ ]+xrelease decw %cx
[ ]*257[ ]+xrelease lock decw %cx
[ ]*258[ ]+lock xrelease decw %cx
[ ]*259[ ]+xacquire decw \(%rcx\)
[ ]*260[ ]+xrelease decw \(%rcx\)
[ ]*261[ ]+
[ ]*262[ ]+\# Tests for op regl/m32
[ ]*263[ ]+xacquire decl %ecx
[ ]*264[ ]+xacquire lock decl %ecx
[ ]*265[ ]+lock xacquire decl %ecx
[ ]*266[ ]+xrelease decl %ecx
[ ]*267[ ]+xrelease lock decl %ecx
[ ]*268[ ]+lock xrelease decl %ecx
[ ]*269[ ]+xacquire decl \(%rcx\)
[ ]*270[ ]+xrelease decl \(%rcx\)
[ ]*271[ ]+
[ ]*272[ ]+\# Tests for op regq/m64
[ ]*273[ ]+xacquire decq %rcx
[ ]*274[ ]+xacquire lock decq %rcx
[ ]*275[ ]+lock xacquire decq %rcx
[ ]*276[ ]+xrelease decq %rcx
[ ]*277[ ]+xrelease lock decq %rcx
[ ]*278[ ]+lock xrelease decq %rcx
[ ]*279[ ]+xacquire decq \(%rcx\)
[ ]*280[ ]+xrelease decq \(%rcx\)
[ ]*281[ ]+
[ ]*282[ ]+\# Tests for op m64
[ ]*283[ ]+xacquire cmpxchg8bq \(%rcx\)
[ ]*284[ ]+xrelease cmpxchg8bq \(%rcx\)
[ ]*285[ ]+
GAS LISTING .*
[ ]*286[ ]+\# Tests for op regb, regb/m8
[ ]*287[ ]+xacquire cmpxchgb %cl,%al
[ ]*288[ ]+xacquire lock cmpxchgb %cl,%al
[ ]*289[ ]+lock xacquire cmpxchgb %cl,%al
[ ]*290[ ]+xrelease cmpxchgb %cl,%al
[ ]*291[ ]+xrelease lock cmpxchgb %cl,%al
[ ]*292[ ]+lock xrelease cmpxchgb %cl,%al
[ ]*293[ ]+xacquire cmpxchgb %cl,\(%rcx\)
[ ]*294[ ]+xrelease cmpxchgb %cl,\(%rcx\)
[ ]*295[ ]+
[ ]*296[ ]+\.intel_syntax noprefix
[ ]*297[ ]+
[ ]*298[ ]+\# Tests for op imm8 al
[ ]*299[ ]+xacquire adc al,100
[ ]*300[ ]+xacquire lock adc al,100
[ ]*301[ ]+lock xacquire adc al,100
[ ]*302[ ]+xrelease adc al,100
[ ]*303[ ]+xrelease lock adc al,100
[ ]*304[ ]+lock xrelease adc al,100
[ ]*305[ ]+
[ ]*306[ ]+\# Tests for op imm16 ax
[ ]*307[ ]+xacquire adc ax,1000
[ ]*308[ ]+xacquire lock adc ax,1000
[ ]*309[ ]+lock xacquire adc ax,1000
[ ]*310[ ]+xrelease adc ax,1000
[ ]*311[ ]+xrelease lock adc ax,1000
[ ]*312[ ]+lock xrelease adc ax,1000
[ ]*313[ ]+
[ ]*314[ ]+\# Tests for op imm32 eax
[ ]*315[ ]+xacquire adc eax,10000000
[ ]*316[ ]+xacquire lock adc eax,10000000
[ ]*317[ ]+lock xacquire adc eax,10000000
[ ]*318[ ]+xrelease adc eax,10000000
[ ]*319[ ]+xrelease lock adc eax,10000000
[ ]*320[ ]+lock xrelease adc eax,10000000
[ ]*321[ ]+
[ ]*322[ ]+
[ ]*323[ ]+\# Tests for op imm32 rax
[ ]*324[ ]+xacquire adc rax,10000000
[ ]*325[ ]+xacquire lock adc rax,10000000
[ ]*326[ ]+lock xacquire adc rax,10000000
[ ]*327[ ]+xrelease adc rax,10000000
[ ]*328[ ]+xrelease lock adc rax,10000000
[ ]*329[ ]+lock xrelease adc rax,10000000
[ ]*330[ ]+
[ ]*331[ ]+\# Tests for op imm8 regb/m8
[ ]*332[ ]+xacquire adc cl,100
[ ]*333[ ]+xacquire lock adc cl,100
[ ]*334[ ]+lock xacquire adc cl,100
[ ]*335[ ]+xrelease adc cl,100
[ ]*336[ ]+xrelease lock adc cl,100
[ ]*337[ ]+lock xrelease adc cl,100
[ ]*338[ ]+xacquire adc BYTE PTR \[rcx\],100
[ ]*339[ ]+xrelease adc BYTE PTR \[rcx\],100
[ ]*340[ ]+
[ ]*341[ ]+\# Tests for op imm16 regs/m16
[ ]*342[ ]+xacquire adc cx,1000
GAS LISTING .*
[ ]*343[ ]+xacquire lock adc cx,1000
[ ]*344[ ]+lock xacquire adc cx,1000
[ ]*345[ ]+xrelease adc cx,1000
[ ]*346[ ]+xrelease lock adc cx,1000
[ ]*347[ ]+lock xrelease adc cx,1000
[ ]*348[ ]+xacquire adc WORD PTR \[rcx\],1000
[ ]*349[ ]+xrelease adc WORD PTR \[rcx\],1000
[ ]*350[ ]+
[ ]*351[ ]+\# Tests for op imm32 regl/m32
[ ]*352[ ]+xacquire adc ecx,10000000
[ ]*353[ ]+xacquire lock adc ecx,10000000
[ ]*354[ ]+lock xacquire adc ecx,10000000
[ ]*355[ ]+xrelease adc ecx,10000000
[ ]*356[ ]+xrelease lock adc ecx,10000000
[ ]*357[ ]+lock xrelease adc ecx,10000000
[ ]*358[ ]+xacquire adc DWORD PTR \[rcx\],10000000
[ ]*359[ ]+xrelease adc DWORD PTR \[rcx\],10000000
[ ]*360[ ]+
[ ]*361[ ]+\# Tests for op imm32 regq/m64
[ ]*362[ ]+xacquire adc rcx,10000000
[ ]*363[ ]+xacquire lock adc rcx,10000000
[ ]*364[ ]+lock xacquire adc rcx,10000000
[ ]*365[ ]+xrelease adc rcx,10000000
[ ]*366[ ]+xrelease lock adc rcx,10000000
[ ]*367[ ]+lock xrelease adc rcx,10000000
[ ]*368[ ]+xacquire adc QWORD PTR \[rcx\],10000000
[ ]*369[ ]+xrelease adc QWORD PTR \[rcx\],10000000
[ ]*370[ ]+
[ ]*371[ ]+\# Tests for op imm8 regs/m16
[ ]*372[ ]+xacquire adc cx,100
[ ]*373[ ]+xacquire lock adc cx,100
[ ]*374[ ]+lock xacquire adc cx,100
[ ]*375[ ]+xrelease adc cx,100
[ ]*376[ ]+xrelease lock adc cx,100
[ ]*377[ ]+lock xrelease adc cx,100
[ ]*378[ ]+xacquire adc WORD PTR \[rcx\],100
[ ]*379[ ]+xrelease adc WORD PTR \[rcx\],100
[ ]*380[ ]+
[ ]*381[ ]+\# Tests for op imm8 regl/m32
[ ]*382[ ]+xacquire adc ecx,100
[ ]*383[ ]+xacquire lock adc ecx,100
[ ]*384[ ]+lock xacquire adc ecx,100
[ ]*385[ ]+xrelease adc ecx,100
[ ]*386[ ]+xrelease lock adc ecx,100
[ ]*387[ ]+lock xrelease adc ecx,100
[ ]*388[ ]+xacquire adc DWORD PTR \[rcx\],100
[ ]*389[ ]+xrelease adc DWORD PTR \[rcx\],100
[ ]*390[ ]+
[ ]*391[ ]+\# Tests for op imm8 regq/m64
[ ]*392[ ]+xacquire adc rcx,100
[ ]*393[ ]+xacquire lock adc rcx,100
[ ]*394[ ]+lock xacquire adc rcx,100
[ ]*395[ ]+xrelease adc rcx,100
[ ]*396[ ]+xrelease lock adc rcx,100
[ ]*397[ ]+lock xrelease adc rcx,100
[ ]*398[ ]+xacquire adc QWORD PTR \[rcx\],100
[ ]*399[ ]+xrelease adc QWORD PTR \[rcx\],100
GAS LISTING .*
[ ]*400[ ]+
[ ]*401[ ]+\# Tests for op imm8 regb/m8
[ ]*402[ ]+xacquire adc cl,100
[ ]*403[ ]+xacquire lock adc cl,100
[ ]*404[ ]+lock xacquire adc cl,100
[ ]*405[ ]+xrelease adc cl,100
[ ]*406[ ]+xrelease lock adc cl,100
[ ]*407[ ]+lock xrelease adc cl,100
[ ]*408[ ]+xacquire adc BYTE PTR \[rcx\],100
[ ]*409[ ]+xrelease adc BYTE PTR \[rcx\],100
[ ]*410[ ]+
[ ]*411[ ]+\# Tests for op regb regb/m8
[ ]*412[ ]+\# Tests for op regb/m8 regb
[ ]*413[ ]+xacquire adc cl,al
[ ]*414[ ]+xacquire lock adc cl,al
[ ]*415[ ]+lock xacquire adc cl,al
[ ]*416[ ]+xrelease adc cl,al
[ ]*417[ ]+xrelease lock adc cl,al
[ ]*418[ ]+lock xrelease adc cl,al
[ ]*419[ ]+xacquire adc BYTE PTR \[rcx\],al
[ ]*420[ ]+xrelease adc BYTE PTR \[rcx\],al
[ ]*421[ ]+xacquire adc al,cl
[ ]*422[ ]+xacquire lock adc al,cl
[ ]*423[ ]+lock xacquire adc al,cl
[ ]*424[ ]+xrelease adc al,cl
[ ]*425[ ]+xrelease lock adc al,cl
[ ]*426[ ]+lock xrelease adc al,cl
[ ]*427[ ]+xacquire adc al,BYTE PTR \[rcx\]
[ ]*428[ ]+xacquire lock adc al,BYTE PTR \[rcx\]
[ ]*429[ ]+lock xacquire adc al,BYTE PTR \[rcx\]
[ ]*430[ ]+xrelease adc al,BYTE PTR \[rcx\]
[ ]*431[ ]+xrelease lock adc al,BYTE PTR \[rcx\]
[ ]*432[ ]+lock xrelease adc al,BYTE PTR \[rcx\]
[ ]*433[ ]+
[ ]*434[ ]+\# Tests for op regs regs/m16
[ ]*435[ ]+\# Tests for op regs/m16 regs
[ ]*436[ ]+xacquire adc cx,ax
[ ]*437[ ]+xacquire lock adc cx,ax
[ ]*438[ ]+lock xacquire adc cx,ax
[ ]*439[ ]+xrelease adc cx,ax
[ ]*440[ ]+xrelease lock adc cx,ax
[ ]*441[ ]+lock xrelease adc cx,ax
[ ]*442[ ]+xacquire adc WORD PTR \[rcx\],ax
[ ]*443[ ]+xrelease adc WORD PTR \[rcx\],ax
[ ]*444[ ]+xacquire adc ax,cx
[ ]*445[ ]+xacquire lock adc ax,cx
[ ]*446[ ]+lock xacquire adc ax,cx
[ ]*447[ ]+xrelease adc ax,cx
[ ]*448[ ]+xrelease lock adc ax,cx
[ ]*449[ ]+lock xrelease adc ax,cx
[ ]*450[ ]+xacquire adc ax,WORD PTR \[rcx\]
[ ]*451[ ]+xacquire lock adc ax,WORD PTR \[rcx\]
[ ]*452[ ]+lock xacquire adc ax,WORD PTR \[rcx\]
[ ]*453[ ]+xrelease adc ax,WORD PTR \[rcx\]
[ ]*454[ ]+xrelease lock adc ax,WORD PTR \[rcx\]
[ ]*455[ ]+lock xrelease adc ax,WORD PTR \[rcx\]
[ ]*456[ ]+
GAS LISTING .*
[ ]*457[ ]+\# Tests for op regl regl/m32
[ ]*458[ ]+\# Tests for op regl/m32 regl
[ ]*459[ ]+xacquire adc ecx,eax
[ ]*460[ ]+xacquire lock adc ecx,eax
[ ]*461[ ]+lock xacquire adc ecx,eax
[ ]*462[ ]+xrelease adc ecx,eax
[ ]*463[ ]+xrelease lock adc ecx,eax
[ ]*464[ ]+lock xrelease adc ecx,eax
[ ]*465[ ]+xacquire adc DWORD PTR \[rcx\],eax
[ ]*466[ ]+xrelease adc DWORD PTR \[rcx\],eax
[ ]*467[ ]+xacquire adc eax,ecx
[ ]*468[ ]+xacquire lock adc eax,ecx
[ ]*469[ ]+lock xacquire adc eax,ecx
[ ]*470[ ]+xrelease adc eax,ecx
[ ]*471[ ]+xrelease lock adc eax,ecx
[ ]*472[ ]+lock xrelease adc eax,ecx
[ ]*473[ ]+xacquire adc eax,DWORD PTR \[rcx\]
[ ]*474[ ]+xacquire lock adc eax,DWORD PTR \[rcx\]
[ ]*475[ ]+lock xacquire adc eax,DWORD PTR \[rcx\]
[ ]*476[ ]+xrelease adc eax,DWORD PTR \[rcx\]
[ ]*477[ ]+xrelease lock adc eax,DWORD PTR \[rcx\]
[ ]*478[ ]+lock xrelease adc eax,DWORD PTR \[rcx\]
[ ]*479[ ]+
[ ]*480[ ]+\# Tests for op regq regq/m64
[ ]*481[ ]+\# Tests for op regq/m64 regq
[ ]*482[ ]+xacquire adc rcx,rax
[ ]*483[ ]+xacquire lock adc rcx,rax
[ ]*484[ ]+lock xacquire adc rcx,rax
[ ]*485[ ]+xrelease adc rcx,rax
[ ]*486[ ]+xrelease lock adc rcx,rax
[ ]*487[ ]+lock xrelease adc rcx,rax
[ ]*488[ ]+xacquire adc QWORD PTR \[rcx\],rax
[ ]*489[ ]+xrelease adc QWORD PTR \[rcx\],rax
[ ]*490[ ]+xacquire adc rax,rcx
[ ]*491[ ]+xacquire lock adc rax,rcx
[ ]*492[ ]+lock xacquire adc rax,rcx
[ ]*493[ ]+xrelease adc rax,rcx
[ ]*494[ ]+xrelease lock adc rax,rcx
[ ]*495[ ]+lock xrelease adc rax,rcx
[ ]*496[ ]+xacquire adc rax,QWORD PTR \[rcx\]
[ ]*497[ ]+xacquire lock adc rax,QWORD PTR \[rcx\]
[ ]*498[ ]+lock xacquire adc rax,QWORD PTR \[rcx\]
[ ]*499[ ]+xrelease adc rax,QWORD PTR \[rcx\]
[ ]*500[ ]+xrelease lock adc rax,QWORD PTR \[rcx\]
[ ]*501[ ]+lock xrelease adc rax,QWORD PTR \[rcx\]
[ ]*502[ ]+
[ ]*503[ ]+\# Tests for op regs, regs/m16
[ ]*504[ ]+xacquire btc cx,ax
[ ]*505[ ]+xacquire lock btc cx,ax
[ ]*506[ ]+lock xacquire btc cx,ax
[ ]*507[ ]+xrelease btc cx,ax
[ ]*508[ ]+xrelease lock btc cx,ax
[ ]*509[ ]+lock xrelease btc cx,ax
[ ]*510[ ]+xacquire btc WORD PTR \[rcx\],ax
[ ]*511[ ]+xrelease btc WORD PTR \[rcx\],ax
[ ]*512[ ]+
[ ]*513[ ]+\# Tests for op regl regl/m32
GAS LISTING .*
[ ]*514[ ]+xacquire btc ecx,eax
[ ]*515[ ]+xacquire lock btc ecx,eax
[ ]*516[ ]+lock xacquire btc ecx,eax
[ ]*517[ ]+xrelease btc ecx,eax
[ ]*518[ ]+xrelease lock btc ecx,eax
[ ]*519[ ]+lock xrelease btc ecx,eax
[ ]*520[ ]+xacquire btc DWORD PTR \[rcx\],eax
[ ]*521[ ]+xrelease btc DWORD PTR \[rcx\],eax
[ ]*522[ ]+
[ ]*523[ ]+\# Tests for op regq regq/m64
[ ]*524[ ]+xacquire btc rcx,rax
[ ]*525[ ]+xacquire lock btc rcx,rax
[ ]*526[ ]+lock xacquire btc rcx,rax
[ ]*527[ ]+xrelease btc rcx,rax
[ ]*528[ ]+xrelease lock btc rcx,rax
[ ]*529[ ]+lock xrelease btc rcx,rax
[ ]*530[ ]+xacquire btc QWORD PTR \[rcx\],rax
[ ]*531[ ]+xrelease btc QWORD PTR \[rcx\],rax
[ ]*532[ ]+
[ ]*533[ ]+\# Tests for op regb/m8
[ ]*534[ ]+xacquire dec cl
[ ]*535[ ]+xacquire lock dec cl
[ ]*536[ ]+lock xacquire dec cl
[ ]*537[ ]+xrelease dec cl
[ ]*538[ ]+xrelease lock dec cl
[ ]*539[ ]+lock xrelease dec cl
[ ]*540[ ]+xacquire dec BYTE PTR \[rcx\]
[ ]*541[ ]+xrelease dec BYTE PTR \[rcx\]
[ ]*542[ ]+
[ ]*543[ ]+\# Tests for op regs/m16
[ ]*544[ ]+xacquire dec cx
[ ]*545[ ]+xacquire lock dec cx
[ ]*546[ ]+lock xacquire dec cx
[ ]*547[ ]+xrelease dec cx
[ ]*548[ ]+xrelease lock dec cx
[ ]*549[ ]+lock xrelease dec cx
[ ]*550[ ]+xacquire dec WORD PTR \[rcx\]
[ ]*551[ ]+xrelease dec WORD PTR \[rcx\]
[ ]*552[ ]+
[ ]*553[ ]+\# Tests for op regl/m32
[ ]*554[ ]+xacquire dec ecx
[ ]*555[ ]+xacquire lock dec ecx
[ ]*556[ ]+lock xacquire dec ecx
[ ]*557[ ]+xrelease dec ecx
[ ]*558[ ]+xrelease lock dec ecx
[ ]*559[ ]+lock xrelease dec ecx
[ ]*560[ ]+xacquire dec DWORD PTR \[rcx\]
[ ]*561[ ]+xrelease dec DWORD PTR \[rcx\]
[ ]*562[ ]+
[ ]*563[ ]+\# Tests for op regq/m64
[ ]*564[ ]+xacquire dec rcx
[ ]*565[ ]+xacquire lock dec rcx
[ ]*566[ ]+lock xacquire dec rcx
[ ]*567[ ]+xrelease dec rcx
[ ]*568[ ]+xrelease lock dec rcx
[ ]*569[ ]+lock xrelease dec rcx
[ ]*570[ ]+xacquire dec QWORD PTR \[rcx\]
GAS LISTING .*
[ ]*571[ ]+xrelease dec QWORD PTR \[rcx\]
[ ]*572[ ]+
[ ]*573[ ]+\# Tests for op m64
[ ]*574[ ]+xacquire cmpxchg8b QWORD PTR \[rcx\]
[ ]*575[ ]+xrelease cmpxchg8b QWORD PTR \[rcx\]
[ ]*576[ ]+
[ ]*577[ ]+\# Tests for op regb, regb/m8
[ ]*578[ ]+xacquire cmpxchg al,cl
[ ]*579[ ]+xacquire lock cmpxchg al,cl
[ ]*580[ ]+lock xacquire cmpxchg al,cl
[ ]*581[ ]+xrelease cmpxchg al,cl
[ ]*582[ ]+xrelease lock cmpxchg al,cl
[ ]*583[ ]+lock xrelease cmpxchg al,cl
[ ]*584[ ]+xacquire cmpxchg BYTE PTR \[rcx\],cl
[ ]*585[ ]+xrelease cmpxchg BYTE PTR \[rcx\],cl
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