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* * interp.c: Fix byte-swapping code throughout to work onMark Alexander1996-12-292-9/+20
* * support.h: Make definitions of SIGTRAP and SIGQUIT consistentMark Alexander1996-12-292-2/+7
* * gencode.c (build_instruction): Work around MSVC++ code gen bugMark Alexander1996-12-282-1/+11
* Allow exit to work normally under gdbMichael Meissner1996-12-272-102/+148
* add flush_cache PMON routineAngela Marie Thomas1996-12-252-0/+12
* * support.h: Use _WIN32 instead of __WIN32__. Also add defs forStu Grossman1996-12-202-2/+9
* * gencode.c (build_instruction) [MUL]: Cast operands to word64, toIan Lance Taylor1996-12-192-1/+14
* * interp.c (sim_resume): Handle 0xff as a single byte insn.Jeff Law1996-12-182-12/+19
* Getting there ...David Edelsohn1996-12-172-0/+35
* * simops.c: Handle "break" instruction.Jeff Law1996-12-162-0/+12
* Link with SIM_EXTRA_LIBS, not just EXTRA_LIBS, which is never set.Rob Savoye1996-12-161-3/+12
* * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.Ian Lance Taylor1996-12-162-10/+19
* Mon Dec 16 13:39:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1996-12-161-0/+9
* * gencode.c (build_mips16_operands): Fix base PC value for PCIan Lance Taylor1996-12-163-119/+95
* * simops.c: Fix restoring the PC for "ret" and "retf" instructions.Jeff Law1996-12-162-4/+23
* For NEC 4100/4300 project: Add little endian support and misc cleanups.Jim Wilson1996-12-111-1/+1
* * gencode.c (write_opcodes): Also write out the format of theJeff Law1996-12-111-3/+4
* * simops.c (REG0_4): Define.Jeff Law1996-12-102-8/+14
* For NEC 4100/4300 projectJim Wilson1996-12-103-69/+145
* New revision from AndrewMichael Meissner1996-12-108-377/+3635
* * callback.c: #include <stdlib.h>David Edelsohn1996-12-092-0/+459
* * simops.c (REG0_16): Fix typo.Jeff Law1996-12-072-1/+5
* Add missing semicolons in last change.Jeff Law1996-12-071-13/+13
* * simops.c: Call abort for any instruction that's not currentlyJeff Law1996-12-062-0/+16
* * simops.c: Define accessor macros to extract registerJeff Law1996-12-062-368/+329
* * interp.c: Delete unused global variable "OP".Jeff Law1996-12-063-31/+30
* Opps. Forgot something in last change.Jeff Law1996-12-061-1/+1
* * gencode.c (write_header): Add "insn" and "extension" argumentsJeff Law1996-12-065-248/+699
* * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"Jeff Law1996-12-062-3/+5
* * simops.c: Fix thinkos in last change to "inc dn".Jeff Law1996-12-062-5/+11
* * simops.c: "add imm,sp" does not effect the condition codes.Jeff Law1996-12-042-31/+20
* * simops.c: Treat both operands as signed values forJeff Law1996-12-042-2/+13
* * configure.in: Look for libtermcap.a.Rob Savoye1996-12-043-64/+132
* * simops.c: Fix simulation of division instructions.Jeff Law1996-12-041-12/+8
* * simomps.c: Fix carry bit handling in "sub" and "cmp"Jeff Law1996-12-021-9/+9
* * simops.c: Fix "mov imm8,an" and "mov imm16,dn".Jeff Law1996-12-022-2/+6
* * simops.c: Fix overflow computation for many instructions.Jeff Law1996-12-022-87/+89
* * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)".Jeff Law1996-12-022-5/+7
* * simops.c: Fix "mov am, dn".Jeff Law1996-12-022-1/+3
* * simops.c: Fix more bugs in "add imm,an" andJeff Law1996-12-012-8/+13
* * simops.c: Fix bugs in "movm" and "add imm,an".Jeff Law1996-11-272-17/+19
* * simops.c: Don't lose the upper 24 bits of the returnJeff Law1996-11-272-16/+154
* * simops.c: Implement the remaining 5, 6 and 7 byte instructions.Jeff Law1996-11-272-50/+168
* * simops.c Implement remaining 4 byte instructions.Jeff Law1996-11-272-39/+145
* * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORDIan Lance Taylor1996-11-271-0/+3
* * simops.c Implement remaining 3 byte instructions.Jeff Law1996-11-272-32/+120
* * simops.c: Implement remaining 2 byte instructions. CallJeff Law1996-11-272-23/+120
* Actually check in the right change to interp.c.Ian Lance Taylor1996-11-271-2/+1
* * simops.c: Implement lots of random instructions.Jeff Law1996-11-272-129/+642
* * simops.c: Implement "movm" and "bCC" insns.Jeff Law1996-11-272-7/+160
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