| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Tweak comment. | Doug Evans | 1997-11-17 | 1 | -2/+3 |
| * | * Make-common.in (DEP, COMMON_DEP_CFLAGS): Define. | Doug Evans | 1997-11-17 | 5 | -64/+644 |
| * | Test SUBI omsn | Andrew Cagney | 1997-11-17 | 1 | -0/+17 |
| * | (sim_core_signal): Add missing "\n" in message. | Doug Evans | 1997-11-14 | 1 | -4/+7 |
| * | * mips.igen: Tag vr5000 instructions. | Andrew Cagney | 1997-11-14 | 2 | -0/+35 |
| * | * sim-base.h (sim_state_base): Move `magic' to end of struct. | Doug Evans | 1997-11-13 | 2 | -10/+32 |
| * | * sim-n-core.h (sim_core_read_unaligned_N): illegal empty | Felix Lee | 1997-11-13 | 2 | -1/+7 |
| * | * Make-common.in (BUILT_SRC_FROM_COMMON): Remove files no longer | Doug Evans | 1997-11-12 | 2 | -9/+11 |
| * | * aclocal.m4 (SIM_AC_OPTION_SCACHE): Fix typo. | Doug Evans | 1997-11-12 | 1 | -0/+4 |
| * | * simops.c (call:16 call:32): Stack adjustment is determined solely | Jeff Law | 1997-11-11 | 1 | -4/+8 |
| * | Make the signess of compares between GPR's explicit using a cast to | Andrew Cagney | 1997-11-11 | 2 | -61/+39 |
| * | Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1, | Andrew Cagney | 1997-11-11 | 5 | -121/+396 |
| * | * sim-events.c (sim_events_process): Re-compute the time - | Andrew Cagney | 1997-11-11 | 2 | -0/+7 |
| * | * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign | Andrew Cagney | 1997-11-10 | 1 | -0/+6 |
| * | Test rachi instruction. | Andrew Cagney | 1997-11-10 | 3 | -3/+44 |
| * | * callback.c (os_poll_quit): Replace _WIN32 with _MSC_VER. | Andrew Cagney | 1997-11-10 | 1 | -0/+4 |
| * | Replace global IPC with function argument cia or current instruction | Andrew Cagney | 1997-11-06 | 5 | -60/+78 |
| * | Fix computation of sim_events_time when sim_events_slip is loosing it. | Andrew Cagney | 1997-11-06 | 2 | -34/+31 |
| * | IGEN likes to cache the current instruction address (CIA). Change the | Andrew Cagney | 1997-11-06 | 5 | -112/+172 |
| * | Allow separate single character and long options. | Andrew Cagney | 1997-11-06 | 1 | -0/+17 |
| * | Add option --enable-sim-igen to mips configuration. Allows user to | Andrew Cagney | 1997-11-05 | 2 | -17/+50 |
| * | Rewrite the MIPS simulator's memory model so that it uses the generic | Andrew Cagney | 1997-11-05 | 8 | -641/+437 |
| * | Delete -l and -n options, didn't do anything. | Andrew Cagney | 1997-11-05 | 3 | -51/+28 |
| * | Rewrite sim_monitor (implements read, write, open, et.al. system | Andrew Cagney | 1997-11-05 | 3 | -323/+249 |
| * | * sim-endian.h (U16_8): Implement | Andrew Cagney | 1997-11-04 | 1 | -0/+13 |
| * | * gen-idecode.c (print_jump_until_stop_body): Use `#if 0' instead of | Brendan Kehoe | 1997-11-04 | 1 | -0/+5 |
| * | do not assume NULL is an integer constant | Michael Meissner | 1997-11-04 | 1 | -0/+5 |
| * | Correct r5900 sanitization. | Gavin Romig-Koch | 1997-11-04 | 2 | -1/+3 |
| * | Make memory regions layered (just like existing device regions) so | Andrew Cagney | 1997-10-31 | 4 | -123/+223 |
| * | Patches to support generating an executing environment. | Nick Clifton | 1997-10-30 | 1 | -4/+59 |
| * | * sim-core.h (sim_core_write_8): Define. | Doug Evans | 1997-10-30 | 2 | -0/+5 |
| * | * gencode.c: Add tx49 configury and insns. | Gavin Romig-Koch | 1997-10-29 | 5 | -15/+97 |
| * | common/sim-bits.h: Document ROTn macro. | Andrew Cagney | 1997-10-29 | 8 | -22/+726 |
| * | Add support for 16 byte quantities to sim-endian macro H2T. | Andrew Cagney | 1997-10-28 | 10 | -75/+153 |
| * | Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>. | Andrew Cagney | 1997-10-28 | 4 | -13/+27 |
| * | * sem-ops.h (U{DIV,MOD}[BHSD]I): Use unsigned division. | Doug Evans | 1997-10-27 | 2 | -12/+24 |
| * | * sim-endian.h: Disable 16 byte support. | Doug Evans | 1997-10-27 | 2 | -7/+9 |
| * | * sim-n-endian.h: Add TAGS entrys for 16 byte versions. | Doug Evans | 1997-10-27 | 1 | -0/+4 |
| * | Fix typo. | Doug Evans | 1997-10-27 | 1 | -1/+1 |
| * | Separate r5900 specifoc and mips16 instructions. | Andrew Cagney | 1997-10-27 | 9 | -5179/+2770 |
| * | Add mips64vr5400 to configuration list | Andrew Cagney | 1997-10-27 | 6 | -38/+636 |
| * | Add include-file support to igen. | Andrew Cagney | 1997-10-27 | 5 | -417/+1348 |
| * | Add 128 bit transfers to sim core. | Andrew Cagney | 1997-10-27 | 7 | -66/+180 |
| * | * sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using | Gavin Romig-Koch | 1997-10-25 | 2 | -1/+7 |
| * | Correct name of file given in ChangeLog for change: Pass lma_p and | Andrew Cagney | 1997-10-25 | 3 | -3/+3 |
| * | Add basic igen configuration to autoconf. Disable. | Andrew Cagney | 1997-10-24 | 4 | -18/+244 |
| * | Add function to fetch 32bit instructions | Andrew Cagney | 1997-10-24 | 4 | -119/+154 |
| * | Checkpoint IGEN version of mips sim | Andrew Cagney | 1997-10-24 | 1 | -152/+157 |
| * | Add function sim_events_slip() | Andrew Cagney | 1997-10-24 | 2 | -16/+56 |
| * | Address MSC compiler issues in d10v_sim.h | Andrew Cagney | 1997-10-24 | 1 | -0/+8 |
