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* * arch-defs.h: Deleted.Doug Evans1998-01-202-241/+1184
* * cpu.h: New file.Doug Evans1998-01-203-0/+907
* Regenerate.Doug Evans1998-01-203-3418/+1187
* * arch.c, arch.h, cpuall.h: New files.Doug Evans1998-01-2011-1837/+496
* * Make-common.in (cgen-run.o,cgen-scache.o): Delete cgen-scache.h dep.Doug Evans1998-01-202-4/+3
* sanitize keep-cygnus cgen generationDoug Evans1998-01-203-1/+41
* * Make-common.in (cgen-{arch,cpu,decode}): New targets.Doug Evans1998-01-194-3/+220
* * sim-base.h (sim_state_base): Delete member `model'.Doug Evans1998-01-191-45/+524
* * sim-utils.c (sim_state_alloc): Delete setting of cpu backlink here.Doug Evans1998-01-191-0/+29
* Fix comment.Doug Evans1998-01-191-0/+78
* replaced call to CGEN_INSN_SYNTAX()->mnemonic with CGEN_INSN_MNEMONIC()Nick Clifton1998-01-162-9/+23
* Fix typo: .syntax.name should have been .nameNick Clifton1998-01-162-2/+11
* * Initial Device SupportIan Carmichael1998-01-1634-0/+24805
* Document existence of old (gencode) and new (igen) MIPS ISA simulators.Andrew Cagney1998-01-161-0/+39
* * configure.in: Add sky supportIan Carmichael1998-01-152-0/+35
* Initial file creationIan Carmichael1998-01-152-0/+43
* Sky SanitizationIan Carmichael1998-01-151-0/+7
* * interp.c (sim_monitor): Handle Densan monitor outbyteMark Alexander1998-01-052-0/+13
* * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).Felix Lee1997-12-292-284/+284
* In nrun.c, look for sigaction & SA_RESTART. When both present,Andrew Cagney1997-12-154-56/+65
* For MADD et.al. instructions sign extend 32 bit result assigned to aAndrew Cagney1997-12-132-2/+9
* * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 orJeff Law1997-12-123-43/+55
* Renamed v850eq -> v850eaNick Clifton1997-12-123-35/+14
* Parent directory renamed.Nick Clifton1997-12-1227-1884/+0
* sanitization fixes. (files not mentioned, fences misspelled)Felix Lee1997-12-112-0/+9
* * mips.igen (MSUB): Fix to work like MADD.Jeff Law1997-12-113-568/+476
* Test/fix d10v RTE instruction.Andrew Cagney1997-12-092-0/+19
* For bfd, add vr5400 and vr5000 mips machine variants to list of machines.Andrew Cagney1997-12-092-11/+17
* Fix typo, REP_S was refering to REP_E register.Andrew Cagney1997-12-083-1/+9
* For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: SteppingAndrew Cagney1997-12-084-87/+172
* Reverrt breakpoint back to its old value.Nick Clifton1997-12-051-0/+4
* Reverrt BREAK value back to its old valueNick Clifton1997-12-051-1/+1
* * m32r-sim.h (MSPR_ADDR): New macro.Doug Evans1997-12-052-8/+19
* * Make-common.in (sim-core.o): Depend on $(sim_main_headers).Doug Evans1997-12-051-0/+6
* Regenerate configure files.Doug Evans1997-12-049-124/+251
* Add DM (bit 4) to PSW. See 7-1 for more info.Andrew Cagney1997-12-047-0/+72
* * configure.in (SIM_AC_OPTION_ENVIRONMENT): Call.Doug Evans1997-12-042-0/+12
* * Make-common.in (SIM_ENVIRONMENT): New variable.Doug Evans1997-12-045-110/+222
* Fixed sanitization,Nick Clifton1997-12-042-209/+88
* Missing change log entry.Andrew Cagney1997-12-031-0/+2
* * d10v_sim.h (SEXT56): Define.Andrew Cagney1997-12-039-55/+230
* * interp.c (sim_resume): Call do_2_short with LEFT_FIRST orFred Fish1997-12-022-26/+36
* Add support for Thumb target.Nick Clifton1997-12-021-0/+1
* For "sub", compute carry by comparing inputs.Andrew Cagney1997-12-022-0/+43
* For "msbu", subtract unsigned product from ACC,Andrew Cagney1997-12-026-5/+40
* For "mulxu", store unsigned product in ACC.Andrew Cagney1997-12-026-7/+43
* Test mv[tf]ac instructions.Andrew Cagney1997-12-021-0/+19
* For MACU add unsigned multiply to accumulator.Andrew Cagney1997-12-025-5/+96
* For sub2w, compute carry according to negated addition rules.Andrew Cagney1997-12-025-5/+81
* Rework sim/common/sim-alu.h to differentiate between direcctAndrew Cagney1997-12-012-11/+40
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