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ppe42-binutils
binutils-2_24-ppe42
GNU Binutils for the PPE42
Raptor Computing Systems
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Author
Age
Files
Lines
*
* verbosity reduction
Frank Ch. Eigler
2000-06-24
2
-2
/
+5
*
* build cleanliness fix
Frank Ch. Eigler
2000-06-24
2
-1
/
+6
*
Fix printf arguments.
Andrew Cagney
2000-06-23
2
-3
/
+8
*
* armemu.c (Multiply64): Fix computation of flag N.
Alexandre Oliva
2000-06-22
2
-4
/
+5
*
* armemu.c (MultiplyAdd64): Fix computation of flag N.
Alexandre Oliva
2000-06-22
2
-4
/
+7
*
* build fix
Frank Ch. Eigler
2000-06-20
2
-21
/
+11
*
* armemu.h (NEGBRANCH): Do not overwrite the two most significant
Alexandre Oliva
2000-06-20
2
-1
/
+6
*
Add strongarm tests
Nick Clifton
2000-06-19
2
-1
/
+10
*
* "Dont" -> "Don't"
Frank Ch. Eigler
2000-06-13
3
-2
/
+6
*
2000-06-13 Kazu Hirata <kazu@hxi.com>
Jeff Law
2000-06-13
2
-47
/
+36
*
sh-dsp support, simulator speedup by using host byte order:
Joern Rennecke
2000-06-07
1
-1
/
+4
*
Remove illegal instruciton pattern, since it is the same as the breakpoint
Nick Clifton
2000-05-30
2
-7
/
+5
*
Add support for v4 SystemMode.
Nick Clifton
2000-05-30
11
-57
/
+159
*
Define GPR_CLEAR
Nick Clifton
2000-05-29
2
-0
/
+15
*
fix spelling mistake in comment
Nick Clifton
2000-05-29
1
-1
/
+1
*
Remove RCS tags to make synchronisation easier.
Nick Clifton
2000-05-29
1
-3
/
+0
*
Use GPR_CLEAR instead of GPR_SET
Nick Clifton
2000-05-29
2
-1
/
+6
*
replace GPR_SET with GPR_CLEAR
Nick Clifton
2000-05-29
2
-1
/
+6
*
minor formatting tweaks to aid syncronisation
Nick Clifton
2000-05-29
2
-8
/
+17
*
Change profiling so that it is enabled by default. Re-generate everything.
Andrew Cagney
2000-05-24
43
-2307
/
+2582
*
Add special case handling when GDB set CPSR register
Nick Clifton
2000-05-23
2
-1
/
+12
*
sigrc wasn't initialized before being passed to sim_resume().
Andrew Cagney
2000-05-23
2
-0
/
+6
*
* am33.igen: Fix leading comments of SP-relative offset insns that
Alexandre Oliva
2000-05-22
2
-7
/
+11
*
* mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
Alexandre Oliva
2000-05-18
5
-167
/
+175
*
sh-dsp support, simulator speedup by using host byte order:
Joern Rennecke
2000-05-15
3
-801
/
+2226
*
* merge from internal tree
Frank Ch. Eigler
2000-05-08
2
-4
/
+20
*
Add missing ChangeLog.
Andrew Cagney
2000-05-03
2
-1
/
+25
*
* mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
Andrew Cagney
2000-05-01
2
-1
/
+6
*
Provide more detailed traces of the event queue.
Andrew Cagney
2000-04-28
2
-0
/
+26
*
Fix event insertion when processing more than one event for the current time.
Andrew Cagney
2000-04-28
2
-3
/
+12
*
Cleanup tracing.
Andrew Cagney
2000-04-28
3
-2
/
+28
*
* am33.igen (inc4 Rn): Use genericAdd so as to modify flags.
Alexandre Oliva
2000-04-25
2
-1
/
+5
*
Add support for SIGILL (reserved-instruction-exception).
Andrew Cagney
2000-04-18
5
-2
/
+30
*
* arm abort fix
Frank Ch. Eigler
2000-04-10
2
-3
/
+8
*
Fix printf botch.
Andrew Cagney
2000-04-09
2
-2
/
+6
*
* am33.igen: Make SP-relative offsets unsigned. Add `*am33' for
Alexandre Oliva
2000-04-09
2
-11
/
+34
*
* updating copyright dates ("1999" -> "1999, 2000")
Frank Ch. Eigler
2000-04-05
2
-2
/
+2
*
2000-03-30 Dave Brolley <brolley@redhat.com>
Dave Brolley
2000-03-30
6
-456
/
+501
*
2000-03-30 Dave Brolley <brolley@redhat.com>
Dave Brolley
2000-03-30
2
-2
/
+6
*
2000-03-23 Dave Brolley <brolley@redhat.com>
Dave Brolley
2000-03-30
3
-2
/
+36
*
* ppc-instructions (Disabled_Exponent_Underflow): Increment
Geoffrey Keating
2000-03-25
2
-1
/
+6
*
* more compatibility with v850 hardware
Frank Ch. Eigler
2000-03-25
2
-0
/
+11
*
* memory corruption fix
Frank Ch. Eigler
2000-03-23
2
-2
/
+8
*
* simplify eCos testing
Frank Ch. Eigler
2000-03-21
2
-5
/
+11
*
2000-03-13 Jeff Johnston <jjohnstn@cygnus.com>
Jeff Johnston
2000-03-13
2
-0
/
+5
*
* extension
Frank Ch. Eigler
2000-03-08
3
-3
/
+41
*
* build fix
Frank Ch. Eigler
2000-03-07
2
-1
/
+6
*
* moved misplaced ChangeLog entry
Frank Ch. Eigler
2000-03-04
2
-5
/
+5
*
Transfer SIM maintainership to Frank.
Andrew Cagney
2000-03-04
2
-0
/
+5
*
* build fix
Frank Ch. Eigler
2000-03-03
2
-2
/
+6
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