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2_24-branch'.
Sprout from master 2013-09-18 10:39:38 UTC Tristan Gingold <gingold@adacore.com> 'binutils/'
Cherrypick from cygnus 1999-05-03 07:29:11 UTC Richard Henderson <rth@redhat.com> '19990502 sourceware import':
README
bfd/doc/doc.str
bfd/stamp-h.in
binutils/stamp-h.in
binutils/testsuite/binutils-all/bintest.s
binutils/testsuite/binutils-all/hppa/addendbug.s
config/mt-d30v
config/mt-ospace
etc/add-log.el
etc/add-log.vi
etc/configbuild.ein
etc/configbuild.fig
etc/configbuild.jin
etc/configbuild.tin
etc/configdev.ein
etc/configdev.fig
etc/configdev.jin
etc/configdev.tin
gas/stamp-h.in
gas/testsuite/gas/all/align.s
gas/testsuite/gas/all/comment.s
gas/testsuite/gas/all/diff1.s
gas/testsuite/gas/all/float.s
gas/testsuite/gas/all/itbl
gas/testsuite/gas/all/itbl.s
gas/testsuite/gas/all/p1480.s
gas/testsuite/gas/all/struct.d
gas/testsuite/gas/all/struct.s
gas/testsuite/gas/all/x930509.s
gas/testsuite/gas/arc/alias.d
gas/testsuite/gas/arc/alias.s
gas/testsuite/gas/arc/branch.d
gas/testsuite/gas/arc/branch.s
gas/testsuite/gas/arc/flag.s
gas/testsuite/gas/arc/insn3.d
gas/testsuite/gas/arc/insn3.s
gas/testsuite/gas/arc/math.d
gas/testsuite/gas/arc/math.s
gas/testsuite/gas/arc/sshift.d
gas/testsuite/gas/arc/sshift.s
gas/testsuite/gas/arm/le-fpconst.s
gas/testsuite/gas/d30v/align.d
gas/testsuite/gas/d30v/align.s
gas/testsuite/gas/d30v/array.d
gas/testsuite/gas/d30v/array.s
gas/testsuite/gas/d30v/bittest.d
gas/testsuite/gas/d30v/bittest.s
gas/testsuite/gas/d30v/guard-debug.s
gas/testsuite/gas/d30v/guard.d
gas/testsuite/gas/d30v/guard.s
gas/testsuite/gas/d30v/inst.s
gas/testsuite/gas/d30v/label-debug.d
gas/testsuite/gas/d30v/label-debug.s
gas/testsuite/gas/d30v/label.d
gas/testsuite/gas/d30v/label.s
gas/testsuite/gas/d30v/mul.d
gas/testsuite/gas/d30v/mul.s
gas/testsuite/gas/d30v/opt.d
gas/testsuite/gas/d30v/opt.s
gas/testsuite/gas/d30v/reloc.d
gas/testsuite/gas/d30v/reloc.s
gas/testsuite/gas/d30v/serial.s
gas/testsuite/gas/d30v/serial2.s
gas/testsuite/gas/d30v/serial2O.s
gas/testsuite/gas/d30v/warn_oddreg.l
gas/testsuite/gas/d30v/warn_oddreg.s
gas/testsuite/gas/fr30/allinsn.d
gas/testsuite/gas/fr30/allinsn.s
gas/testsuite/gas/h8300/addsub.s
gas/testsuite/gas/h8300/addsubh.s
gas/testsuite/gas/h8300/addsubs.s
gas/testsuite/gas/h8300/bitops1.s
gas/testsuite/gas/h8300/bitops1h.s
gas/testsuite/gas/h8300/bitops1s.s
gas/testsuite/gas/h8300/bitops2.s
gas/testsuite/gas/h8300/bitops2h.s
gas/testsuite/gas/h8300/bitops2s.s
gas/testsuite/gas/h8300/bitops3.s
gas/testsuite/gas/h8300/bitops3h.s
gas/testsuite/gas/h8300/bitops3s.s
gas/testsuite/gas/h8300/bitops4.s
gas/testsuite/gas/h8300/bitops4h.s
gas/testsuite/gas/h8300/bitops4s.s
gas/testsuite/gas/h8300/cbranch.s
gas/testsuite/gas/h8300/cbranchh.s
gas/testsuite/gas/h8300/cbranchs.s
gas/testsuite/gas/h8300/compare.s
gas/testsuite/gas/h8300/compareh.s
gas/testsuite/gas/h8300/compares.s
gas/testsuite/gas/h8300/decimal.s
gas/testsuite/gas/h8300/decimalh.s
gas/testsuite/gas/h8300/decimals.s
gas/testsuite/gas/h8300/divmul.s
gas/testsuite/gas/h8300/divmulh.s
gas/testsuite/gas/h8300/divmuls.s
gas/testsuite/gas/h8300/extendh.s
gas/testsuite/gas/h8300/extends.s
gas/testsuite/gas/h8300/incdec.s
gas/testsuite/gas/h8300/incdech.s
gas/testsuite/gas/h8300/incdecs.s
gas/testsuite/gas/h8300/logical.s
gas/testsuite/gas/h8300/logicalh.s
gas/testsuite/gas/h8300/logicals.s
gas/testsuite/gas/h8300/misc.s
gas/testsuite/gas/h8300/misch.s
gas/testsuite/gas/h8300/miscs.s
gas/testsuite/gas/h8300/mov32bug.s
gas/testsuite/gas/h8300/movb.s
gas/testsuite/gas/h8300/movbh.s
gas/testsuite/gas/h8300/movbs.s
gas/testsuite/gas/h8300/movlh.s
gas/testsuite/gas/h8300/movls.s
gas/testsuite/gas/h8300/movw.s
gas/testsuite/gas/h8300/movwh.s
gas/testsuite/gas/h8300/movws.s
gas/testsuite/gas/h8300/pushpop.s
gas/testsuite/gas/h8300/pushpoph.s
gas/testsuite/gas/h8300/pushpops.s
gas/testsuite/gas/h8300/rotsh.s
gas/testsuite/gas/h8300/rotshh.s
gas/testsuite/gas/h8300/rotshs.s
gas/testsuite/gas/hppa/basic/weird.s
gas/testsuite/gas/hppa/parse/appbug.s
gas/testsuite/gas/hppa/parse/nosubspace.s
gas/testsuite/gas/hppa/parse/spacebug.s
gas/testsuite/gas/hppa/parse/ssbug.s
gas/testsuite/gas/hppa/reloc/reduce2.s
gas/testsuite/gas/hppa/unsorted/align3.s
gas/testsuite/gas/hppa/unsorted/align4.s
gas/testsuite/gas/hppa/unsorted/globalbug.s
gas/testsuite/gas/hppa/unsorted/ss_align.s
gas/testsuite/gas/ieee-fp/x930509a.s
gas/testsuite/gas/m32r/allinsn.s
gas/testsuite/gas/m32r/fslot.d
gas/testsuite/gas/m32r/fslot.s
gas/testsuite/gas/m32r/high-1.s
gas/testsuite/gas/m32r/outofrange.s
gas/testsuite/gas/m32r/relax-1.s
gas/testsuite/gas/m32r/uppercase.s
gas/testsuite/gas/m68k-coff/p2389.s
gas/testsuite/gas/m68k-coff/p2389a.s
gas/testsuite/gas/m68k-coff/p2430.s
gas/testsuite/gas/m68k-coff/p2430a.s
gas/testsuite/gas/m68k-coff/t1.s
gas/testsuite/gas/m68k/bitfield.d
gas/testsuite/gas/m68k/bitfield.s
gas/testsuite/gas/m68k/cas.d
gas/testsuite/gas/m68k/cas.s
gas/testsuite/gas/m68k/disperr.s
gas/testsuite/gas/m68k/fmoveml.d
gas/testsuite/gas/m68k/fmoveml.s
gas/testsuite/gas/m68k/link.d
gas/testsuite/gas/m68k/link.s
gas/testsuite/gas/m68k/op68000.d
gas/testsuite/gas/m68k/operands.d
gas/testsuite/gas/m68k/operands.s
gas/testsuite/gas/m68k/p2410.s
gas/testsuite/gas/m68k/p2663.s
gas/testsuite/gas/m68k/pic1.s
gas/testsuite/gas/m68k/t2.d
gas/testsuite/gas/m68k/t2.s
gas/testsuite/gas/macros/err.s
gas/testsuite/gas/mips/abs.s
gas/testsuite/gas/mips/add.s
gas/testsuite/gas/mips/break20.s
gas/testsuite/gas/mips/div.s
gas/testsuite/gas/mips/itbl
gas/testsuite/gas/mips/itbl.s
gas/testsuite/gas/mips/lb.s
gas/testsuite/gas/mips/mips16.s
gas/testsuite/gas/mips/mul.s
gas/testsuite/gas/mips/sb.s
gas/testsuite/gas/mips/trap20.s
gas/testsuite/gas/mips/trunc.s
gas/testsuite/gas/mips/uld.s
gas/testsuite/gas/mips/ulh-pic.s
gas/testsuite/gas/mips/ulh.s
gas/testsuite/gas/mips/ulw.s
gas/testsuite/gas/mips/usd.s
gas/testsuite/gas/mips/ush.s
gas/testsuite/gas/mips/usw.s
gas/testsuite/gas/mn10200/add.s
gas/testsuite/gas/mn10200/bcc.s
gas/testsuite/gas/mn10200/bccx.s
gas/testsuite/gas/mn10200/bit.s
gas/testsuite/gas/mn10200/cmp.s
gas/testsuite/gas/mn10200/ext.s
gas/testsuite/gas/mn10200/logical.s
gas/testsuite/gas/mn10200/mov1.s
gas/testsuite/gas/mn10200/mov2.s
gas/testsuite/gas/mn10200/mov3.s
gas/testsuite/gas/mn10200/mov4.s
gas/testsuite/gas/mn10200/movb.s
gas/testsuite/gas/mn10200/movbu.s
gas/testsuite/gas/mn10200/movx.s
gas/testsuite/gas/mn10200/muldiv.s
gas/testsuite/gas/mn10200/other.s
gas/testsuite/gas/mn10200/shift.s
gas/testsuite/gas/mn10200/sub.s
gas/testsuite/gas/mn10300/add.s
gas/testsuite/gas/mn10300/bcc.s
gas/testsuite/gas/mn10300/bit.s
gas/testsuite/gas/mn10300/cmp.s
gas/testsuite/gas/mn10300/ext.s
gas/testsuite/gas/mn10300/extend.s
gas/testsuite/gas/mn10300/logical.s
gas/testsuite/gas/mn10300/loop.s
gas/testsuite/gas/mn10300/mov1.s
gas/testsuite/gas/mn10300/mov2.s
gas/testsuite/gas/mn10300/mov3.s
gas/testsuite/gas/mn10300/mov4.s
gas/testsuite/gas/mn10300/movbu.s
gas/testsuite/gas/mn10300/movhu.s
gas/testsuite/gas/mn10300/movm.s
gas/testsuite/gas/mn10300/muldiv.s
gas/testsuite/gas/mn10300/other.s
gas/testsuite/gas/mn10300/shift.s
gas/testsuite/gas/mn10300/sub.s
gas/testsuite/gas/mn10300/udf.s
gas/testsuite/gas/mri/char.d
gas/testsuite/gas/mri/char.s
gas/testsuite/gas/mri/comment.d
gas/testsuite/gas/mri/comment.s
gas/testsuite/gas/mri/common.d
gas/testsuite/gas/mri/common.s
gas/testsuite/gas/mri/constants.d
gas/testsuite/gas/mri/constants.s
gas/testsuite/gas/mri/empty.s
gas/testsuite/gas/mri/equ.d
gas/testsuite/gas/mri/equ.s
gas/testsuite/gas/mri/expr.d
gas/testsuite/gas/mri/expr.s
gas/testsuite/gas/mri/float.s
gas/testsuite/gas/mri/for.s
gas/testsuite/gas/mri/if.s
gas/testsuite/gas/mri/immconst.d
gas/testsuite/gas/mri/label.d
gas/testsuite/gas/mri/label.s
gas/testsuite/gas/mri/moveml.s
gas/testsuite/gas/mri/repeat.s
gas/testsuite/gas/mri/semi.d
gas/testsuite/gas/mri/semi.s
gas/testsuite/gas/mri/while.s
gas/testsuite/gas/ppc/astest.s
gas/testsuite/gas/sh/fp.s
gas/testsuite/gas/sparc-solaris/addend.s
gas/testsuite/gas/sparc-solaris/sol-cc.s
gas/testsuite/gas/sparc-solaris/sol-gcc.s
gas/testsuite/gas/sparc/asi.d
gas/testsuite/gas/sparc/asi.s
gas/testsuite/gas/sparc/membar.d
gas/testsuite/gas/sparc/membar.s
gas/testsuite/gas/sparc/mism-1.s
gas/testsuite/gas/sparc/prefetch.s
gas/testsuite/gas/sparc/splet-2.d
gas/testsuite/gas/sparc/splet-2.s
gas/testsuite/gas/sparc/splet.d
gas/testsuite/gas/sparc/splet.s
gas/testsuite/gas/sparc/synth.d
gas/testsuite/gas/sparc/synth.s
gas/testsuite/gas/sun4/addend.d
gas/testsuite/gas/sun4/addend.s
gas/testsuite/gas/template
gas/testsuite/gas/v850/arith.s
gas/testsuite/gas/v850/bit.s
gas/testsuite/gas/v850/branch.s
gas/testsuite/gas/v850/compare.s
gas/testsuite/gas/v850/fepsw.s
gas/testsuite/gas/v850/hilo.s
gas/testsuite/gas/v850/hilo2.s
gas/testsuite/gas/v850/jumps.s
gas/testsuite/gas/v850/logical.s
gas/testsuite/gas/v850/mem.s
gas/testsuite/gas/v850/misc.s
gas/testsuite/gas/v850/move.s
gas/testsuite/gas/v850/range.s
gas/testsuite/gas/v850/reloc.s
gas/testsuite/lib/doboth
gas/testsuite/lib/doobjcmp
gas/testsuite/lib/dostriptest
gas/testsuite/lib/dotest
gas/testsuite/lib/dounsreloc
gas/testsuite/lib/dounssym
gprof/.gdbinit
gprof/TEST
gprof/stamp-h.in
include/coff/sym.h
ld/TODO
ld/emulparams/alpha.sh
ld/emulparams/armcoff.sh
ld/emulparams/delta68.sh
ld/emulparams/h8300h.sh
ld/emulparams/h8300s.sh
ld/emulparams/h8500.sh
ld/emulparams/h8500b.sh
ld/emulparams/h8500c.sh
ld/emulparams/h8500m.sh
ld/emulparams/h8500s.sh
ld/emulparams/hp300bsd.sh
ld/emulparams/hp3hpux.sh
ld/emulparams/i386beos.sh
ld/emulparams/i386coff.sh
ld/emulparams/i386nbsd.sh
ld/emulparams/m68kaux.sh
ld/emulparams/news.sh
ld/emulparams/riscix.sh
ld/emulparams/sparcnbsd.sh
ld/emulparams/st2000.sh
ld/emulparams/tic30aout.sh
ld/emulparams/tic30coff.sh
ld/emulparams/w65.sh
ld/emulparams/z8001.sh
ld/emulparams/z8002.sh
ld/scripttempl/aout.sc
ld/scripttempl/i386msdos.sc
ld/scripttempl/i960.sc
ld/scripttempl/m68kcoff.sc
ld/scripttempl/mipsbsd.sc
ld/scripttempl/riscix.sc
ld/scripttempl/st2000.sc
ld/scripttempl/tic30aout.sc
ld/scripttempl/tic30coff.sc
ld/scripttempl/vanilla.sc
ld/stamp-h.in
ld/testsuite/ld-cdtest/cdtest-bar.cc
ld/testsuite/ld-cdtest/cdtest.dat
ld/testsuite/ld-checks/script
ld/testsuite/ld-elfvers/vers13.asym
ld/testsuite/ld-elfvers/vers16.c
ld/testsuite/ld-elfvers/vers16.map
ld/testsuite/ld-elfvers/vers16a.c
ld/testsuite/ld-elfvers/vers2.map
ld/testsuite/ld-elfvers/vers7.map
ld/testsuite/ld-elfvers/vers8.c
ld/testsuite/ld-scripts/cross1.c
ld/testsuite/ld-scripts/cross2.c
ld/testsuite/ld-scripts/cross3.c
ld/testsuite/ld-scripts/defined.t
ld/testsuite/ld-scripts/phdrs.s
ld/testsuite/ld-scripts/script.s
ld/testsuite/ld-scripts/script.t
ld/testsuite/ld-scripts/scriptm.t
ld/testsuite/ld-scripts/sizeof.s
ld/testsuite/ld-scripts/sizeof.t
ld/testsuite/ld-scripts/weak.t
ld/testsuite/ld-selective/1.c
ld/testsuite/ld-selective/2.c
ld/testsuite/ld-sh/sh1.s
ld/testsuite/ld-sh/sh2.c
ld/testsuite/ld-sh/start.s
ld/testsuite/ld-shared/shared.dat
ld/testsuite/ld-shared/sun4.dat
ld/testsuite/ld-shared/xcoff.dat
ld/testsuite/ld-srec/sr1.c
ld/testsuite/ld-srec/sr2.c
ld/testsuite/ld-undefined/undefined.c
ld/testsuite/ld-versados/t1-1.ro
ld/testsuite/ld-versados/t1-2.ro
ld/testsuite/ld-versados/t1.ld
ld/testsuite/ld-versados/t1.ook
ld/testsuite/ld-versados/t2-1.ro
ld/testsuite/ld-versados/t2-2.ro
ld/testsuite/ld-versados/t2-3.ro
ld/testsuite/ld-versados/t2.ld
ld/testsuite/ld-versados/t2.ook
libiberty/config/mh-aix
libiberty/config/mh-cxux7
libiberty/config/mh-fbsd21
libiberty/config/mh-windows
libiberty/msdos.c
makefile.vms
opcodes/stamp-h.in
Delete:
.gitignore
djunpack.bat
gdb/.dir-locals.el
gdb/.gitignore
gdb/CONTRIBUTE
gdb/COPYING
gdb/ChangeLog
gdb/ChangeLog-1990
gdb/ChangeLog-1991
gdb/ChangeLog-1992
gdb/ChangeLog-1993
gdb/ChangeLog-1994
gdb/ChangeLog-1995
gdb/ChangeLog-1996
gdb/ChangeLog-1997
gdb/ChangeLog-1998
gdb/ChangeLog-1999
gdb/ChangeLog-2000
gdb/ChangeLog-2001
gdb/ChangeLog-2002
gdb/ChangeLog-2003
gdb/ChangeLog-2004
gdb/ChangeLog-2005
gdb/ChangeLog-2006
gdb/ChangeLog-2007
gdb/ChangeLog-2008
gdb/ChangeLog-2009
gdb/ChangeLog-2010
gdb/ChangeLog-2011
gdb/ChangeLog-2012
gdb/ChangeLog-3.x
gdb/MAINTAINERS
gdb/Makefile.in
gdb/NEWS
gdb/PROBLEMS
gdb/README
gdb/aarch64-linux-nat.c
gdb/aarch64-linux-tdep.c
gdb/aarch64-linux-tdep.h
gdb/aarch64-newlib-tdep.c
gdb/aarch64-tdep.c
gdb/aarch64-tdep.h
gdb/acinclude.m4
gdb/aclocal.m4
gdb/acx_configure_dir.m4
gdb/ada-exp.y
gdb/ada-lang.c
gdb/ada-lang.h
gdb/ada-lex.l
gdb/ada-operator.def
gdb/ada-tasks.c
gdb/ada-typeprint.c
gdb/ada-valprint.c
gdb/ada-varobj.c
gdb/ada-varobj.h
gdb/addrmap.c
gdb/addrmap.h
gdb/agent.c
gdb/aix-thread.c
gdb/alpha-linux-nat.c
gdb/alpha-linux-tdep.c
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gdb/reggroups.c
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gdb/registry.c
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gdb/remote-fileio.c
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gdb/reply_mig_hack.awk
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gdb/stap-probe.c
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gdb/std-operator.def
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gdb/stubs/ChangeLog
gdb/stubs/buildvms.com
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gdb/stubs/ia64vms-stub.c
gdb/stubs/m32r-stub.c
gdb/stubs/m68k-stub.c
gdb/stubs/sh-stub.c
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gdb/syscalls/amd64-linux.xml
gdb/syscalls/arm-linux.py
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gdb/testsuite/gdb.ada/Makefile.in
gdb/testsuite/gdb.ada/aliased_array.exp
gdb/testsuite/gdb.ada/aliased_array/foo.adb
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gdb/testsuite/gdb.ada/array_bounds/bar.adb
gdb/testsuite/gdb.ada/array_return.exp
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gdb/testsuite/gdb.ada/arrayidx.exp
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gdb/testsuite/gdb.ada/arrayptr.exp
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gdb/testsuite/gdb.ada/fullname_bp.exp
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gdb/testsuite/gdb.ada/gnat_ada.gpr
gdb/testsuite/gdb.ada/homonym.exp
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gdb/testsuite/gdb.ada/info_locals_renaming.exp
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gdb/testsuite/gdb.ada/info_locals_renaming/pck.adb
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gdb/testsuite/gdb.ada/info_types.c
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gdb/testsuite/gdb.ada/int_deref.exp
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gdb/testsuite/gdb.ada/interface.exp
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gdb/testsuite/gdb.ada/iwide.exp
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gdb/testsuite/gdb.ada/lang_switch/lang_switch.adb
gdb/testsuite/gdb.ada/mi_catch_ex.exp
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gdb/testsuite/gdb.ada/mi_task_arg.exp
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gdb/testsuite/gdb.ada/mi_task_info.exp
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gdb/testsuite/gdb.ada/mod_from_name.exp
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gdb/testsuite/gdb.ada/nested.exp
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gdb/testsuite/gdb.ada/null_array.exp
gdb/testsuite/gdb.ada/null_array/foo.adb
gdb/testsuite/gdb.ada/null_array/pck.adb
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gdb/testsuite/gdb.ada/null_record.exp
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gdb/testsuite/gdb.ada/operator_bp.exp
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gdb/testsuite/gdb.ada/packed_array.exp
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gdb/testsuite/gdb.ada/packed_tagged.exp
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gdb/testsuite/gdb.ada/print_chars.exp
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gdb/testsuite/gdb.ada/ptype_tagged_param/pck.adb
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gdb/testsuite/gdb.ada/rdv_wait.exp
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gdb/testsuite/gdb.ada/rec_return.exp
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gdb/testsuite/gdb.ada/ref_param.exp
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gdb/testsuite/gdb.ada/ref_tick_size.exp
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gdb/testsuite/gdb.ada/same_enum.exp
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gdb/testsuite/gdb.ada/set_pckd_arr_elt.exp
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gdb/testsuite/gdb.ada/start.exp
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gdb/testsuite/gdb.ada/sym_print_name.exp
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gdb/testsuite/gdb.ada/taft_type.exp
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gdb/testsuite/gdb.ada/task_bp.exp
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gdb/testsuite/gdb.ada/type_coercion.exp
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gdb/testsuite/gdb.ada/unc_arr_ptr_in_var_rec.exp
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gdb/testsuite/gdb.ada/variant_record_packed_array.exp
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gdb/testsuite/gdb.asm/Makefile.in
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gdb/testsuite/gdb.base/arrayidx.c
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gdb/testsuite/gdb.base/async-shell.c
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gdb/testsuite/gdb.base/baz.c
gdb/testsuite/gdb.base/bfp-test.c
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gdb/testsuite/gdb.base/bigcore.c
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gdb/testsuite/gdb.base/bitfields2.c
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gdb/testsuite/gdb.base/comp-dir/subdir/dummy.txt
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gdb/testsuite/gdb.base/del.c
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sim/testsuite/sim/sh64/media/bgt.cgs
sim/testsuite/sim/sh64/media/bgtu.cgs
sim/testsuite/sim/sh64/media/blink.cgs
sim/testsuite/sim/sh64/media/bne.cgs
sim/testsuite/sim/sh64/media/bnei.cgs
sim/testsuite/sim/sh64/media/brk.cgs
sim/testsuite/sim/sh64/media/byterev.cgs
sim/testsuite/sim/sh64/media/cmpeq.cgs
sim/testsuite/sim/sh64/media/cmpgt.cgs
sim/testsuite/sim/sh64/media/cmpgtu.cgs
sim/testsuite/sim/sh64/media/cmveq.cgs
sim/testsuite/sim/sh64/media/cmvne.cgs
sim/testsuite/sim/sh64/media/fabsd.cgs
sim/testsuite/sim/sh64/media/fabss.cgs
sim/testsuite/sim/sh64/media/faddd.cgs
sim/testsuite/sim/sh64/media/fadds.cgs
sim/testsuite/sim/sh64/media/fcmpeqd.cgs
sim/testsuite/sim/sh64/media/fcmpeqs.cgs
sim/testsuite/sim/sh64/media/fcmpged.cgs
sim/testsuite/sim/sh64/media/fcmpges.cgs
sim/testsuite/sim/sh64/media/fcmpgtd.cgs
sim/testsuite/sim/sh64/media/fcmpgts.cgs
sim/testsuite/sim/sh64/media/fcmpund.cgs
sim/testsuite/sim/sh64/media/fcmpuns.cgs
sim/testsuite/sim/sh64/media/fcnvds.cgs
sim/testsuite/sim/sh64/media/fcnvsd.cgs
sim/testsuite/sim/sh64/media/fdivd.cgs
sim/testsuite/sim/sh64/media/fdivs.cgs
sim/testsuite/sim/sh64/media/fgetscr.cgs
sim/testsuite/sim/sh64/media/fiprs.cgs
sim/testsuite/sim/sh64/media/fldd.cgs
sim/testsuite/sim/sh64/media/fldp.cgs
sim/testsuite/sim/sh64/media/flds.cgs
sim/testsuite/sim/sh64/media/fldxd.cgs
sim/testsuite/sim/sh64/media/fldxp.cgs
sim/testsuite/sim/sh64/media/fldxs.cgs
sim/testsuite/sim/sh64/media/floatld.cgs
sim/testsuite/sim/sh64/media/floatls.cgs
sim/testsuite/sim/sh64/media/floatqd.cgs
sim/testsuite/sim/sh64/media/floatqs.cgs
sim/testsuite/sim/sh64/media/fmacs.cgs
sim/testsuite/sim/sh64/media/fmovd.cgs
sim/testsuite/sim/sh64/media/fmovdq.cgs
sim/testsuite/sim/sh64/media/fmovls.cgs
sim/testsuite/sim/sh64/media/fmovqd.cgs
sim/testsuite/sim/sh64/media/fmovs.cgs
sim/testsuite/sim/sh64/media/fmovsl.cgs
sim/testsuite/sim/sh64/media/fmuld.cgs
sim/testsuite/sim/sh64/media/fmuls.cgs
sim/testsuite/sim/sh64/media/fnegd.cgs
sim/testsuite/sim/sh64/media/fnegs.cgs
sim/testsuite/sim/sh64/media/fputscr.cgs
sim/testsuite/sim/sh64/media/fsqrtd.cgs
sim/testsuite/sim/sh64/media/fsqrts.cgs
sim/testsuite/sim/sh64/media/fstd.cgs
sim/testsuite/sim/sh64/media/fstp.cgs
sim/testsuite/sim/sh64/media/fsts.cgs
sim/testsuite/sim/sh64/media/fstxd.cgs
sim/testsuite/sim/sh64/media/fstxp.cgs
sim/testsuite/sim/sh64/media/fstxs.cgs
sim/testsuite/sim/sh64/media/fsubd.cgs
sim/testsuite/sim/sh64/media/fsubs.cgs
sim/testsuite/sim/sh64/media/ftrcdl.cgs
sim/testsuite/sim/sh64/media/ftrcdq.cgs
sim/testsuite/sim/sh64/media/ftrcsl.cgs
sim/testsuite/sim/sh64/media/ftrcsq.cgs
sim/testsuite/sim/sh64/media/ftrvs.cgs
sim/testsuite/sim/sh64/media/getcfg.cgs
sim/testsuite/sim/sh64/media/getcon.cgs
sim/testsuite/sim/sh64/media/gettr.cgs
sim/testsuite/sim/sh64/media/icbi.cgs
sim/testsuite/sim/sh64/media/ldb.cgs
sim/testsuite/sim/sh64/media/ldhil.cgs
sim/testsuite/sim/sh64/media/ldhiq.cgs
sim/testsuite/sim/sh64/media/ldl.cgs
sim/testsuite/sim/sh64/media/ldlol.cgs
sim/testsuite/sim/sh64/media/ldloq.cgs
sim/testsuite/sim/sh64/media/ldq.cgs
sim/testsuite/sim/sh64/media/ldub.cgs
sim/testsuite/sim/sh64/media/lduw.cgs
sim/testsuite/sim/sh64/media/ldw.cgs
sim/testsuite/sim/sh64/media/ldxb.cgs
sim/testsuite/sim/sh64/media/ldxl.cgs
sim/testsuite/sim/sh64/media/ldxq.cgs
sim/testsuite/sim/sh64/media/ldxub.cgs
sim/testsuite/sim/sh64/media/ldxuw.cgs
sim/testsuite/sim/sh64/media/ldxw.cgs
sim/testsuite/sim/sh64/media/mabsl.cgs
sim/testsuite/sim/sh64/media/mabsw.cgs
sim/testsuite/sim/sh64/media/maddl.cgs
sim/testsuite/sim/sh64/media/maddsl.cgs
sim/testsuite/sim/sh64/media/maddsub.cgs
sim/testsuite/sim/sh64/media/maddsw.cgs
sim/testsuite/sim/sh64/media/maddw.cgs
sim/testsuite/sim/sh64/media/mcmpeqb.cgs
sim/testsuite/sim/sh64/media/mcmpeql.cgs
sim/testsuite/sim/sh64/media/mcmpeqw.cgs
sim/testsuite/sim/sh64/media/mcmpgtl.cgs
sim/testsuite/sim/sh64/media/mcmpgtub.cgs
sim/testsuite/sim/sh64/media/mcmpgtw.cgs
sim/testsuite/sim/sh64/media/mcmv.cgs
sim/testsuite/sim/sh64/media/mcnvslw.cgs
sim/testsuite/sim/sh64/media/mcnvswb.cgs
sim/testsuite/sim/sh64/media/mcnvswub.cgs
sim/testsuite/sim/sh64/media/mextr1.cgs
sim/testsuite/sim/sh64/media/mextr2.cgs
sim/testsuite/sim/sh64/media/mextr3.cgs
sim/testsuite/sim/sh64/media/mextr4.cgs
sim/testsuite/sim/sh64/media/mextr5.cgs
sim/testsuite/sim/sh64/media/mextr6.cgs
sim/testsuite/sim/sh64/media/mextr7.cgs
sim/testsuite/sim/sh64/media/mmacfxwl.cgs
sim/testsuite/sim/sh64/media/mmacnfx-wl.cgs
sim/testsuite/sim/sh64/media/mmulfxl.cgs
sim/testsuite/sim/sh64/media/mmulfxrpw.cgs
sim/testsuite/sim/sh64/media/mmulfxw.cgs
sim/testsuite/sim/sh64/media/mmulhiwl.cgs
sim/testsuite/sim/sh64/media/mmull.cgs
sim/testsuite/sim/sh64/media/mmullowl.cgs
sim/testsuite/sim/sh64/media/mmulsumwq.cgs
sim/testsuite/sim/sh64/media/mmulw.cgs
sim/testsuite/sim/sh64/media/movi.cgs
sim/testsuite/sim/sh64/media/mpermw.cgs
sim/testsuite/sim/sh64/media/msadubq.cgs
sim/testsuite/sim/sh64/media/mshaldsl.cgs
sim/testsuite/sim/sh64/media/mshaldsw.cgs
sim/testsuite/sim/sh64/media/mshardl.cgs
sim/testsuite/sim/sh64/media/mshardsq.cgs
sim/testsuite/sim/sh64/media/mshardw.cgs
sim/testsuite/sim/sh64/media/mshfhib.cgs
sim/testsuite/sim/sh64/media/mshfhil.cgs
sim/testsuite/sim/sh64/media/mshfhiw.cgs
sim/testsuite/sim/sh64/media/mshflob.cgs
sim/testsuite/sim/sh64/media/mshflol.cgs
sim/testsuite/sim/sh64/media/mshflow.cgs
sim/testsuite/sim/sh64/media/mshlldl.cgs
sim/testsuite/sim/sh64/media/mshlldw.cgs
sim/testsuite/sim/sh64/media/mshlrdl.cgs
sim/testsuite/sim/sh64/media/mshlrdw.cgs
sim/testsuite/sim/sh64/media/msubl.cgs
sim/testsuite/sim/sh64/media/msubsl.cgs
sim/testsuite/sim/sh64/media/msubsub.cgs
sim/testsuite/sim/sh64/media/msubsw.cgs
sim/testsuite/sim/sh64/media/msubw.cgs
sim/testsuite/sim/sh64/media/mulsl.cgs
sim/testsuite/sim/sh64/media/mulul.cgs
sim/testsuite/sim/sh64/media/nop.cgs
sim/testsuite/sim/sh64/media/nsb.cgs
sim/testsuite/sim/sh64/media/ocbi.cgs
sim/testsuite/sim/sh64/media/ocbp.cgs
sim/testsuite/sim/sh64/media/ocbwb.cgs
sim/testsuite/sim/sh64/media/or.cgs
sim/testsuite/sim/sh64/media/ori.cgs
sim/testsuite/sim/sh64/media/prefi.cgs
sim/testsuite/sim/sh64/media/pta.cgs
sim/testsuite/sim/sh64/media/ptabs.cgs
sim/testsuite/sim/sh64/media/ptb.cgs
sim/testsuite/sim/sh64/media/ptrel.cgs
sim/testsuite/sim/sh64/media/putcfg.cgs
sim/testsuite/sim/sh64/media/putcon.cgs
sim/testsuite/sim/sh64/media/rte.cgs
sim/testsuite/sim/sh64/media/shard.cgs
sim/testsuite/sim/sh64/media/shardl.cgs
sim/testsuite/sim/sh64/media/shari.cgs
sim/testsuite/sim/sh64/media/sharil.cgs
sim/testsuite/sim/sh64/media/shlld.cgs
sim/testsuite/sim/sh64/media/shlldl.cgs
sim/testsuite/sim/sh64/media/shlli.cgs
sim/testsuite/sim/sh64/media/shllil.cgs
sim/testsuite/sim/sh64/media/shlrd.cgs
sim/testsuite/sim/sh64/media/shlrdl.cgs
sim/testsuite/sim/sh64/media/shlri.cgs
sim/testsuite/sim/sh64/media/shlril.cgs
sim/testsuite/sim/sh64/media/shori.cgs
sim/testsuite/sim/sh64/media/sleep.cgs
sim/testsuite/sim/sh64/media/stb.cgs
sim/testsuite/sim/sh64/media/sthil.cgs
sim/testsuite/sim/sh64/media/sthiq.cgs
sim/testsuite/sim/sh64/media/stl.cgs
sim/testsuite/sim/sh64/media/stlol.cgs
sim/testsuite/sim/sh64/media/stloq.cgs
sim/testsuite/sim/sh64/media/stq.cgs
sim/testsuite/sim/sh64/media/stw.cgs
sim/testsuite/sim/sh64/media/stxb.cgs
sim/testsuite/sim/sh64/media/stxl.cgs
sim/testsuite/sim/sh64/media/stxq.cgs
sim/testsuite/sim/sh64/media/stxw.cgs
sim/testsuite/sim/sh64/media/sub.cgs
sim/testsuite/sim/sh64/media/subl.cgs
sim/testsuite/sim/sh64/media/swapq.cgs
sim/testsuite/sim/sh64/media/synci.cgs
sim/testsuite/sim/sh64/media/synco.cgs
sim/testsuite/sim/sh64/media/testutils.inc
sim/testsuite/sim/sh64/media/trapa.cgs
sim/testsuite/sim/sh64/media/xor.cgs
sim/testsuite/sim/sh64/media/xori.cgs
sim/testsuite/sim/sh64/misc/fr-dr.s
sim/testsuite/sim/v850/ChangeLog
sim/testsuite/sim/v850/allinsns.exp
sim/testsuite/sim/v850/bsh.cgs
sim/testsuite/sim/v850/div.cgs
sim/testsuite/sim/v850/divh.cgs
sim/testsuite/sim/v850/divh_3.cgs
sim/testsuite/sim/v850/divhu.cgs
sim/testsuite/sim/v850/divu.cgs
sim/testsuite/sim/v850/sar.cgs
sim/testsuite/sim/v850/satadd.cgs
sim/testsuite/sim/v850/satsub.cgs
sim/testsuite/sim/v850/satsubi.cgs
sim/testsuite/sim/v850/satsubr.cgs
sim/testsuite/sim/v850/shl.cgs
sim/testsuite/sim/v850/shr.cgs
sim/testsuite/sim/v850/testutils.cgs
sim/testsuite/sim/v850/testutils.inc
sim/v850/ChangeLog
sim/v850/Makefile.in
sim/v850/aclocal.m4
sim/v850/config.in
sim/v850/configure
sim/v850/configure.ac
sim/v850/interp.c
sim/v850/sim-main.h
sim/v850/simops.c
sim/v850/simops.h
sim/v850/v850-dc
sim/v850/v850.igen
sim/v850/v850_sim.h
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Since the sim has a few fake debug insns that the hardware does not, we
need to check for those before attempting to run them. Otherwise we'll
randomly trigger the sim debug asserts/aborts/halts insns. On the
hardware, these are proper invalid insns, and the table catches that.
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The main body of the "all insn" test is executed once per tested insn, and
we test millions of insns here. Any shrinkage we can do in this loop will
speed things up nicely (since it's multiplied per tested insn).
To that end, simplify the end-of-table test into one less insn, and omit
the SSYNC when we build for the sim. When we build to run on the hardware,
this insn matters, but the sim doesn't have write store buffers in the chip
that might get in the way (memory writes are atomic).
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Since these insns run in usermode, there should be no need to setup
RET[ENI] to safe values. They won't be dereferenced, and any insn
that returns via them are valid only in supervisor mode. Since this
is in the main exception code path, saving any insn at all is good
as it gets multiplied quickly (as in O(n^2) times).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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From: Jayant R. Sonar <Jayant.Sonar@kpitcummins.com>
This patch adds simulator support for handling the armv7 instructions
'movw (immediate)' and 'movt'.
Compiler frequently use these instructions to load the 32bit addresses of
global variables, string pointers etc. into the general registers.
In absence of support of these instructions:
1. GDB run simulator fails to print even simple "hello world" string
on console.
2. Loading of global variable addresses into the registers fail causing
arithmetic operation failures.
Patch has been regression tested for arm-none-eabi (-march=armv7-a).
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Two modifications:
1. The addition of 2013 to the copyright year range for every file;
2. The use of a single year range, instead of potentially multiple
year ranges, as approved by the FSF.
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sim/ChangeLog:
Update old contact info in GPL license notices.
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gdb/sim/ChangeLog:
Update the non-FSF-copyrighted files in sim to GPLv3 or later.
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* common/Make-common.in: Use lt_cv_dlopen_libs under PLUGINS
condition.
* common/acinclude.m4: Define lt_cv_dlopen_libs.
* arm/configure: Regenerate.
* avr/configure: Regenerate.
* bfin/configure: Regenerate.
* common/configure: Regenerate.
* cr16/configure: Regenerate.
* cris/configure: Regenerate.
* d10v/configure: Regenerate.
* erc32/configure: Regenerate.
* frv/configure: Regenerate.
* h8300/configure: Regenerate.
* igen/configure: Regenerate.
* iq2000/configure: Regenerate.
* lm32/configure: Regenerate.
* m32c/configure: Regenerate.
* m32r/configure: Regenerate.
* m68hc11/configure: Regenerate.
* mcore/configure: Regenerate.
* microblaze/configure: Regenerate.
* mips/configure: Regenerate.
* mn10300/configure: Regenerate.
* moxie/configure: Regenerate.
* ppc/configure: Regenerate.
* rl78/configure: Regenerate.
* rx/configure: Regenerate.
* sh/configure: Regenerate.
* sh64/configure: Regenerate.
* testsuite/configure: Regenerate.
* v850/configure: Regenerate.
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* mips/basic.exp: Add mips*-mti-elf* target.
* configure.ac: Add mips*-mti-elf* target.
* configure: Regenerate.
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Some of the common includes in include/gdb such as callback.h
include bfd.h. But there was a recent change in bfd-in.h to
require that config.h be included before bfd.h can be included:
/* PR 14072: Ensure that config.h is included first. */
#if !defined PACKAGE && !defined PACKAGE_VERSION
#error config.h must be included before this header
#endif
PACKAGE_VERSION is always defined by default by the AC_INIT autoconf
macro, but PACKAGE isn't. This patch updates the SIM_AC_COMMON macro
to define it, and then regenerates all configure scripts and config.in
files.
sim/common/changeLog:
* acinclude.m4 (SIM_AC_COMMON): Define PACKAGE.
* config.in, configure: Regenerate.
sim/ChangeLog:
* configure: Regenerate.
sim/arm/ChangeLog:
* config.in, configure: Regenerate.
sim/avr/ChangeLog:
* config.in, configure: Regenerate.
sim/bfin/ChangeLog:
* config.in, configure: Regenerate.
sim/cr16/ChangeLog:
* config.in, configure: Regenerate.
sim/cris/ChangeLog:
* config.in, configure: Regenerate.
sim/d10v/ChangeLog:
* config.in, configure: Regenerate.
sim/erc32/ChangeLog:
* config.in, configure: Regenerate.
sim/frv/ChangeLog:
* config.in, configure: Regenerate.
sim/h8300/ChangeLog:
* config.in, configure: Regenerate.
sim/iq2000/ChangeLog:
* config.in, configure: Regenerate.
sim/lm32/ChangeLog:
* config.in, configure: Regenerate.
sim/m32c/ChangeLog:
* config.in, configure: Regenerate.
sim/m32r/ChangeLog:
* config.in, configure: Regenerate.
sim/m68hc11/ChangeLog:
* config.in, configure: Regenerate.
sim/mcore/ChangeLog:
* config.in, configure: Regenerate.
sim/microblaze/ChangeLog:
* config.in, configure: Regenerate.
sim/mips/ChangeLog:
* config.in, configure: Regenerate.
sim/mn10300/ChangeLog:
* config.in, configure: Regenerate.
sim/moxie/ChangeLog:
* config.in, configure: Regenerate.
sim/ppc/ChangeLog:
* configure: Regenerate.
sim/rl78/ChangeLog:
* config.in, configure: Regenerate.
sim/rx/ChangeLog:
* config.in, configure: Regenerate.
sim/sh/ChangeLog:
* config.in, configure: Regenerate.
sim/sh64/ChangeLog:
* config.in, configure: Regenerate.
sim/v850/ChangeLog:
* config.in, configure: Regenerate.
sim/testsuite/ChangeLog:
* configure: Regenerate.
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These are randomly generated tests to track down issues in ASTAT
handling with shift insns.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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These are the randomly generated tests that directed some of the recent
astat related fixes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Now that we check for valid sub-insns in parallel insns, we can
enable the tests that explicitly validate those code paths.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Now that we have the se_all helpers together and working, we can see
what pieces are duplicated in each test and unify them in the common
header file.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Similar to logic in the cris exp, attempt a simple compile and if it fails
(presumably due to the compiler being broken), skip all the related tests.
Fortunately, most tests (~600 out of ~800) are pure assembly, so people should
still get pretty good coverage.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Truncate constants that are larger than 32bits but get loaded into 32bit
registers. These high bits don't get used and don't really make sense.
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The current se_all*opcodes tests are very similar in how they work.
In preparation for adding more tests along these lines, unify the
common bits into a framework that others can include and build off
of easily.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The 32bit allopcodes test had quite a bit of optimization added to it
so that it ran in a reasonable amount of time out of uncached memory.
Port those changes over to the 16bit test so the two share common code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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gdb/ChangeLog:
Copyright year update in most files of the GDB Project.
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The VIT_MAX insns can be used in parallel, so we need to use the store
buffer so we don't clobber the output register before we get a chance
to do a memory store with it.
Reported-by: Kai Iskratsch <kai@stella.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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* sim/arm/iwmmxt/wcmpgt.cgs: Remove expectation of failure.
* sim/arm/iwmmxt/wmac.cgs: Remove expectation of failure.
* sim/arm/iwmmxt/wsra.cgs: Remove expectation of failure.
* sim/arm/xscale/blx.cgs: Remove expectation of failure.
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Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Now that the common sim testsuite code supports .S and .c files, we
can import the Blackfin testsuite. There are about ~800 tests here,
so I'm only attaching a compressed patch of them. Other than adding
files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was
updated to mark Blackfin as having a testsuite, and sim/configure
regenerated.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than requiring all sim tests to be preprocessed .s files, add
support for .S and .c files so we can easily write code using a higher
level language like C.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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* sim/arm/iwmmxt/wcmpgt.cgs, sim/arm/iwmmxt/wmac.cgs,
sim/arm/iwmmxt/wsra.cgs, sim/arm/xscale/blx.cgs: Kfail.
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* configure.host (xscale*): Don't handle target.
* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
handle targets.
gdb/gdbserver:
* README: Don't mention xscale*-*-linux*.
* configure.srv (xscale*-*-linux*): Don't handle target.
gdb/testsuite:
* gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target.
* gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle
targets.
* gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't
handle targets.
sim:
* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
handle targets.
* configure: Regenerate.
sim/testsuite:
* configure: Regenerate.
* sim/arm/allinsn.exp (xscale*-*-*): Don't handle target.
* sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle
targets.
* sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of
xscale*-*-*.
* sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target.
* sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of
xscale*-*-*.
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copyright update.
* utils-dsp.inc, utils-fpu.inc, utils-mdmx.inc: Ditto.
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The testsuite subdir has a note about unifying the target->subdir logic,
so do just that. The end goal here is to have `make check` work out of
the box without having to delve into dejagnu internals.
The target-specific logic is split out of the top level configure.ac file
and into a dedicated configure.tgt similar to other subprojects (gdb and
ld and etc...) with the difference that this file has to be included at
the m4 level instead of the shell level. This is necessary only because
autoconf requires AC_CONFIG_SUBDIRS be given a string literal and not a
variable value.
Then the toplevel and the testsuite configure files pull this in, the sim
subdir gets expanded into testsuite/site.exp, and the default sim run code
uses this info to set the sim path to the local compiled run file if it
hasn't already been specified.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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