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* * Handle 10 and 20-bit versions of Break instruction. Move handlingIan Carmichael1998-06-091-44/+1
* Added support for the VU insn D (debug) & T (trace) bits.James Lemke1998-06-041-3/+9
* * Early check-in of tx3904 timer sim implementation for ECC.Frank Ch. Eigler1998-06-041-1/+7
* * Move the sanitize comments to the right place.Ian Carmichael1998-06-021-4/+4
* * SYSCALL now uses exception vector.Ian Carmichael1998-06-021-24/+8
* * Small TX39-only patch for ECC.Frank Ch. Eigler1998-06-011-5/+14
* * interp.c: modified name of GIF devicePatrick Macdonald1998-05-211-3/+3
* * interp.c (sim_fetch_register): Convert internal r5900 regs toAndrew Cagney1998-05-211-1/+1
* * Monster patch - may destablize MIPS sims for a little while.Frank Ch. Eigler1998-05-181-40/+179
* * Roll Alpha modifications into devo for sky-gpuif*/ sky-gs*/ interp.cPatrick Macdonald1998-05-071-0/+52
* Initial Breakpoint support:Ron Unrau1998-05-071-2/+4
* configure.in, interp.c: Add configure option --with-sim-funit.James Lemke1998-04-211-0/+20
* Implement ERET instruction.Andrew Cagney1998-04-211-12/+37
* For new IGEN simulators, rewrite checks validating correct use of theAndrew Cagney1998-04-211-18/+4
* * Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions.Frank Ch. Eigler1998-04-171-12/+14
* * Adapted R5900 COP2 interface code to clarified micro-mode interlockFrank Ch. Eigler1998-04-161-4/+9
* * Changes to make interp.c compile under mips64r5900-sky-elf target.Frank Ch. Eigler1998-04-151-2/+11
* Debug tx19 built from igen sources.Andrew Cagney1998-04-151-24/+1
* * Fixed a one-character typo in COP2 instruction synthesis.Frank Ch. Eigler1998-04-131-1/+1
* * R5900 sky COP2 testing continuing. Today only smallFrank Ch. Eigler1998-04-081-3/+7
* * R5900 COP2 sim testing in progress. The majority of instructions actuallyFrank Ch. Eigler1998-04-071-2/+2
* * R5900 COP2 is now ready for testing. Let loose the dogs!Frank Ch. Eigler1998-04-071-5/+31
* * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIFFrank Ch. Eigler1998-04-051-89/+125
* aclocal.m4: Don't enable inlining when cross-compiling.Andrew Cagney1998-04-051-631/+149
* Re-do load/store operations so that they work for both 32 and 64 bitAndrew Cagney1998-04-021-15/+16
* For mips get_mem_size call. Force the return of a 32 bit valueAndrew Cagney1998-04-021-2/+5
* sky-vu.[ch]: prototype decls, cast floats to ints before register transferRon Unrau1998-04-011-51/+148
* * sky-dma.c: Clarify text in warning msg.James Lemke1998-03-311-3/+27
* * Continuing sky R5900 / COP2 work. Added extra sanitize tags to hideFrank Ch. Eigler1998-03-301-54/+95
* * Oops, added #ifdef TARGET_SKY around R5900 COP2 implementation skeleton.Frank Ch. Eigler1998-03-291-0/+2
* * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] codeFrank Ch. Eigler1998-03-271-9/+203
* * sky-vu.c: new file to read/write VU registersRon Unrau1998-03-271-16/+10
* Define CPU_INDEX. Initialize.Andrew Cagney1998-03-271-23/+31
* * Numerous changes & small bug fixes in PKE sim code and test suite.Frank Ch. Eigler1998-03-061-2/+11
* * interp.c (sim_open): Map 4M of memory at zero for SKY sim only.James Lemke1998-03-041-0/+3
* sim-main.h: track SKY register number changes from gdbRon Unrau1998-03-041-35/+60
* Add generic sim-info.c:sim_info() function using module mechanism.Andrew Cagney1998-02-281-37/+0
* * interp.c (DECLARE_OPTION_HANDLER): Use it.Doug Evans1998-02-281-2/+6
* Make it compile again for -DTARGET_SKYRon Unrau1998-02-231-32/+33
* sim-main.h: Re-arange r5900 registers so that they have their ownAndrew Cagney1998-02-231-32/+235
* * interp.c (load_memory): Add missing "break"'s.Gavin Romig-Koch1998-02-191-6/+12
* configure: rerun autoconfRon Unrau1998-02-161-0/+2
* configure.in: add -DTARGET_SKY for mips64r5900-sky-elf configure.Ron Unrau1998-02-151-1/+87
* * Add hardware_init hook.Ian Carmichael1998-02-091-0/+11
* IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro,Andrew Cagney1998-02-031-15/+23
* Add support for configuring the size of the floating point unit (fp_word).Andrew Cagney1998-02-021-8/+38
* Rewrite the mipsI/II/III pending-slot code.Andrew Cagney1998-02-021-73/+70
* Always compile FP code (test for FP at run-time).Andrew Cagney1998-02-021-129/+90
* mips: Add multi-processor support for r5900. Others might work.Andrew Cagney1998-02-011-196/+233
* igen: Fix SMP simulator generator support.Andrew Cagney1998-01-311-2/+3
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