| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | When SIM_HAVE_ENVIRONMENT: use sim_set_trace() to enable tracing | Andrew Cagney | 2000-02-22 | 1 | -0/+5 |
| * | import gdb-2000-01-05 snapshot | Jason Molenda | 2000-01-06 | 1 | -0/+14 |
| * | import gdb-1999-12-06 snapshot | Jason Molenda | 1999-12-07 | 1 | -0/+5 |
| * | import gdb-1999-11-16 snapshot | Jason Molenda | 1999-11-17 | 1 | -1/+82 |
| * | import gdb-1999-11-01 snapshot | Jason Molenda | 1999-11-02 | 1 | -0/+5 |
| * | import gdb-1999-09-21 | Jason Molenda | 1999-09-22 | 1 | -0/+4 |
| * | import gdb-1999-09-13 snapshot | Jason Molenda | 1999-09-13 | 1 | -0/+22 |
| * | import gdb-1999-09-08 snapshot | Stan Shebs | 1999-09-09 | 1 | -0/+12 |
| * | import gdb-1999-05-10 | Stan Shebs | 1999-05-11 | 1 | -0/+4 |
| * | import gdb-19990422 snapshot | Stan Shebs | 1999-04-26 | 1 | -0/+21 |
| * | Initial creation of sourceware repository | Stan Shebs | 1999-04-16 | 1 | -0/+974 |
| * | Initial creation of sourceware repository | Stan Shebs | 1999-04-16 | 1 | -967/+0 |
| * | 1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com) | Jason Molenda | 1999-01-27 | 1 | -0/+26 |
| * | Fix PR 17387: ignore auto increment for loads where the destination register | Nick Clifton | 1998-09-30 | 1 | -0/+10 |
| * | * configure: Regenerated to track ../common/aclocal.m4 changes. | Tom Tromey | 1998-04-26 | 1 | -0/+10 |
| * | * configure: Regenerated to track ../common/aclocal.m4 changes. | Tom Tromey | 1998-04-24 | 1 | -0/+9 |
| * | * interp.c (struct hash_entry): OPCODE and MASK are unsigned. | Andrew Cagney | 1998-04-24 | 1 | -0/+57 |
| * | * configure.in (SIM_AC_OPTION_WARNINGS): Add. | Andrew Cagney | 1998-04-01 | 1 | -0/+5 |
| * | Do top level sim-hw module for device tree. | Andrew Cagney | 1998-03-27 | 1 | -0/+17 |
| * | Implement "dbt" and "rtd" instructions. | Andrew Cagney | 1998-02-16 | 1 | -0/+15 |
| * | Implement separate user (SPU) and interrupt (SPI) stack pointers. | Andrew Cagney | 1998-02-13 | 1 | -0/+8 |
| * | Don't abort() when system call is unknown. | Andrew Cagney | 1998-02-11 | 1 | -0/+3 |
| * | Ensure zero-hardwired bits in DPSW remain zero. | Andrew Cagney | 1998-02-11 | 1 | -0/+38 |
| * | Add config support for the size of the target address and OF cell. | Andrew Cagney | 1998-01-31 | 1 | -0/+4 |
| * | Exit status is in r0, not r2 | Michael Meissner | 1998-01-26 | 1 | -0/+4 |
| * | If DEBUG has 0x20 set, turn traps into batch debugging | Michael Meissner | 1998-01-25 | 1 | -0/+7 |
| * | First round of d10v ABI changes | Michael Meissner | 1998-01-23 | 1 | -0/+10 |
| * | * interp.c (UMEM_SEGMENTS): New define, set to 128. | Fred Fish | 1998-01-22 | 1 | -0/+14 |
| * | * aclocal.m4: Recognize --enable-maintainer-mode. | Doug Evans | 1998-01-20 | 1 | -0/+12 |
| * | Fix typo, REP_S was refering to REP_E register. | Andrew Cagney | 1997-12-08 | 1 | -0/+4 |
| * | For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping | Andrew Cagney | 1997-12-08 | 1 | -0/+36 |
| * | Regenerate configure files. | Doug Evans | 1997-12-04 | 1 | -0/+4 |
| * | Add DM (bit 4) to PSW. See 7-1 for more info. | Andrew Cagney | 1997-12-04 | 1 | -0/+7 |
| * | * d10v_sim.h (SEXT56): Define. | Andrew Cagney | 1997-12-03 | 1 | -0/+10 |
| * | * interp.c (sim_resume): Call do_2_short with LEFT_FIRST or | Fred Fish | 1997-12-02 | 1 | -0/+7 |
| * | For "msbu", subtract unsigned product from ACC, | Andrew Cagney | 1997-12-02 | 1 | -0/+1 |
| * | For "mulxu", store unsigned product in ACC. | Andrew Cagney | 1997-12-02 | 1 | -0/+1 |
| * | For MACU add unsigned multiply to accumulator. | Andrew Cagney | 1997-12-02 | 1 | -0/+5 |
| * | For sub2w, compute carry according to negated addition rules. | Andrew Cagney | 1997-12-02 | 1 | -2/+3 |
| * | Rework sim/common/sim-alu.h to differentiate between direcct | Andrew Cagney | 1997-12-01 | 1 | -0/+24 |
| * | * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign | Andrew Cagney | 1997-11-10 | 1 | -0/+6 |
| * | Correct name of file given in ChangeLog for change: Pass lma_p and | Andrew Cagney | 1997-10-25 | 1 | -1/+1 |
| * | Address MSC compiler issues in d10v_sim.h | Andrew Cagney | 1997-10-24 | 1 | -0/+8 |
| * | Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file(). | Andrew Cagney | 1997-10-22 | 1 | -0/+8 |
| * | * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move | Fred Fish | 1997-10-13 | 1 | -0/+7 |
| * | * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. | Fred Fish | 1997-10-11 | 1 | -0/+9 |
| * | * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing | Fred Fish | 1997-09-27 | 1 | -0/+2 |
| * | * interp.c (pc_addr): Discard upper bit(s) of PC in case | Fred Fish | 1997-09-27 | 1 | -0/+9 |
| * | Remove need to update <targ>/Makefile.in when adding optional options | Andrew Cagney | 1997-09-23 | 1 | -0/+4 |
| * | Simplify logic behind the generic configuration option --enable-sim-alignment. | Andrew Cagney | 1997-09-22 | 1 | -0/+4 |
