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* Add support for m32r-linux target, including a RELA ABI and PIC.Nick Clifton2003-12-191-0/+19
* 2002-11-22 Andrew Cagney <ac131313@redhat.com>Andrew Cagney2002-11-231-19/+22
* * tweakFrank Ch. Eigler2001-03-161-3/+3
* import gdb-19990422 snapshotStan Shebs1999-04-261-9/+6
* Initial creation of sourceware repositoryStan Shebs1999-04-161-0/+839
* Initial creation of sourceware repositoryStan Shebs1999-04-161-820/+0
* * sim-core.h (SIM_CORE_SIGNAL_FN): New typedef.Doug Evans1998-06-111-130/+155
* * sim-core.c (sim_core_attach): Use xmalloc instead of zalloc.Doug Evans1998-03-041-6/+3
* Good grief. Detailed function descriptions should accompany their definition.Doug Evans1998-03-031-11/+1
* (sim_core_attach): Add a comment describing its function.Doug Evans1998-03-031-1/+13
* * sim-core.c (sim_core_attach): Revise last patch.Doug Evans1998-03-021-1/+4
* * sim-core.c (sim_core_attach): Use xmalloc instead of zalloc.Doug Evans1998-03-021-2/+3
* (profile_print_core): Simplify by calling sim_core_map_to_str.Doug Evans1998-02-251-1/+1
* Backout of revision 1.35. Abort may be valid operation.Andrew Cagney1998-02-201-3/+14
* * sim-core.c (sim_core_signal): Use sim_stopped instead ofDoug Evans1997-11-191-2/+2
* * sim-signal.c, sim-signal.h: New files.Doug Evans1997-11-191-11/+2
* * sim-core.c (sim_core_signal): Use CIA_ADDR to fetch value.Doug Evans1997-11-181-3/+1
* (sim_core_signal): Add missing "\n" in message.Doug Evans1997-11-141-4/+7
* Rewrite the MIPS simulator's memory model so that it uses the genericAndrew Cagney1997-11-051-9/+20
* Make memory regions layered (just like existing device regions) soAndrew Cagney1997-10-311-68/+61
* Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>.Andrew Cagney1997-10-281-4/+0
* Add 128 bit transfers to sim core.Andrew Cagney1997-10-271-1/+5
* Handle core regions which start at a poorly aligned address.Andrew Cagney1997-10-141-25/+37
* * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoidFelix Lee1997-09-101-1/+1
* Redo watchpoint code so that it target can specify interrupt names.Andrew Cagney1997-09-051-3/+7
* Define SIGNED64 and UNSIGNED64 macros - handle MSC/GCC LL issue.Andrew Cagney1997-09-051-1/+1
* o Add modulo argument to sim_core_attachAndrew Cagney1997-09-041-125/+224
* Stanify error reporting memory overlaps.Andrew Cagney1997-09-031-8/+23
* Passify GCC. Convert 0x0LL to something more portable in the FP code.Andrew Cagney1997-08-301-55/+199
* Preliminary suport for xor-endian suport in core module.Andrew Cagney1997-05-231-19/+58
* Watchpoint interface.Andrew Cagney1997-05-211-15/+49
* c80 simulator fixes.Andrew Cagney1997-05-121-1/+1
* Start of implementation of a distributed (between processors)Andrew Cagney1997-05-051-31/+52
* Update devo version of m32r sim to build with recent sim/common changes.Andrew Cagney1997-05-021-8/+24
* * Makefile.in (sim-options_h): Define.David Edelsohn1997-05-011-57/+83
* Add a number of per-simulator options: hostendian, endian, inline, warnings.Andrew Cagney1997-03-141-0/+375
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