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ppe42-binutils
binutils-2_24-ppe42
GNU Binutils for the PPE42
Raptor Computing Systems
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bfin
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ChangeLog
Commit message (
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Author
Age
Files
Lines
*
sim: bfin: lookup target strings when tracing system calls
Mike Frysinger
2011-12-03
1
-0
/
+8
*
sim: generate build dependencies on the fly
Mike Frysinger
2011-12-03
1
-0
/
+5
*
sim: dv-cfi: check for log2 support in libm when enabled
Mike Frysinger
2011-10-19
1
-0
/
+4
*
sim: rename common/aclocal.m4 to common/acinclude.m4
Mike Frysinger
2011-10-18
1
-0
/
+5
*
sim: move from common.m4 to SIM_AC_COMMON
Mike Frysinger
2011-10-18
1
-0
/
+6
*
sim: bfin: use store buffer for VIT_MAX insns
Mike Frysinger
2011-09-29
1
-0
/
+4
*
sim: start a unified sim_do_command
Mike Frysinger
2011-07-05
1
-0
/
+4
*
sim: bfin: implement stat_map for virtual environments (libgloss)
Mike Frysinger
2011-07-01
1
-0
/
+11
*
sim: bfin: pass up result2/errcode with libgloss syscalls
Mike Frysinger
2011-06-22
1
-0
/
+5
*
sim: bfin: set ASTAT AV/AVS when shifting accumulators overflow
Mike Frysinger
2011-06-18
1
-0
/
+6
*
sim: bfin: do not touch ASTAT[V] when shifting accumulators
Mike Frysinger
2011-06-18
1
-0
/
+5
*
sim: bfin: do not extend accumulator in LSHIFT insns
Mike Frysinger
2011-06-18
1
-0
/
+5
*
sim: bfin: tweak saturation handling with TFU/FU modes and MM bit
Mike Frysinger
2011-06-18
1
-0
/
+5
*
sim: bfin: handle large shift values with accumulator shift insns
Mike Frysinger
2011-06-18
1
-0
/
+6
*
sim: bfin: handle odd shift values with shift insns
Mike Frysinger
2011-06-18
1
-0
/
+7
*
sim: bfin: fix M_IH saturation size
Mike Frysinger
2011-06-18
1
-5
/
+5
*
sim: bfin: handle V/VS saturation in dsp mac insns
Mike Frysinger
2011-06-18
1
-0
/
+10
*
sim: bfin: handle the MM flag in M_IU/M_TFU modes with dsp insns
Mike Frysinger
2011-06-18
1
-0
/
+6
*
sim: bfin: fix sign extension in dsp insns with MM flag
Mike Frysinger
2011-06-18
1
-0
/
+7
*
sim: bfin: fix dsp insns IH saturation/rounding behavior
Mike Frysinger
2011-06-18
1
-0
/
+5
*
sim: bfin: fix inverted changelog entry
Mike Frysinger
2011-06-18
1
-1
/
+1
*
sim: bfin: fix accumulator edge case saturation
Mike Frysinger
2011-06-18
1
-0
/
+5
*
sim: bfin: use freeargv for freeing argvs
Mike Frysinger
2011-06-18
1
-0
/
+4
*
sim: bfin: add support for glued SIC interrupt lines
Mike Frysinger
2011-06-04
1
-0
/
+9
*
sim: bfin: push SIC mappings to device tree
Mike Frysinger
2011-06-04
1
-0
/
+33
*
sim: bfin: dma: fix indentation
Mike Frysinger
2011-06-03
1
-0
/
+4
*
sim: bfin: switch to new syscall trace level
Mike Frysinger
2011-05-26
1
-0
/
+4
*
sim: bfin: move model data into machs.h
Mike Frysinger
2011-05-25
1
-0
/
+33
*
sim: bfin: add a performance monitor stub
Mike Frysinger
2011-05-25
1
-0
/
+9
*
sim: bfin: add bf526-0.2/bf54x-0.4 rom regions
Mike Frysinger
2011-05-25
1
-0
/
+9
*
sim: bfin: allow pushing of SP
Mike Frysinger
2011-05-14
1
-0
/
+5
*
sim: bfin: implement loop back support in the UARTs
Mike Frysinger
2011-05-14
1
-0
/
+15
*
sim: bfin: fix UART LSR read-only bit saturation
Mike Frysinger
2011-05-09
1
-0
/
+5
*
sim: bfin: constify dmac pmap arrays
Mike Frysinger
2011-04-27
1
-0
/
+9
*
sim: gpio: add output support
Mike Frysinger
2011-04-26
1
-0
/
+8
*
sim: gpio: update mask a/b signals better
Mike Frysinger
2011-04-26
1
-0
/
+12
*
sim: bfin: use store buffer with more 32bit insns
Mike Frysinger
2011-04-16
1
-0
/
+8
*
sim: bfin: handle implicit DISALGNEXCPT with video insns
Mike Frysinger
2011-04-15
1
-0
/
+6
*
sim: bfin: respect the port level on signals to the SIC
Mike Frysinger
2011-04-11
1
-0
/
+7
*
sim: bfin: add missing GPIO pin 15
Mike Frysinger
2011-04-11
1
-0
/
+4
*
sim: bfin: add OTP output port
Mike Frysinger
2011-04-01
1
-0
/
+5
*
sim: bfin: regen configure to include new cfi device
Mike Frysinger
2011-03-29
1
-0
/
+4
*
sim: bfin: fix sign extension with 16bit acc add insns
Mike Frysinger
2011-03-29
1
-0
/
+7
*
sim: bfin: handle saturation with RND12 sub insns
Mike Frysinger
2011-03-27
1
-0
/
+5
*
sim: bfin: add missing VS set with add/sub insns
Mike Frysinger
2011-03-26
1
-0
/
+4
*
sim: bfin: add hw tracing to gpio/sic port events
Mike Frysinger
2011-03-25
1
-0
/
+10
*
sim: bfin: fix GPIO logic bugs when processing events
Mike Frysinger
2011-03-25
1
-0
/
+6
*
sim: bfin: fix clear/set/toggle GPIO handling
Mike Frysinger
2011-03-25
1
-0
/
+5
*
sim: bfin: document SIC limitation
Mike Frysinger
2011-03-24
1
-0
/
+4
*
sim: bfin: fix inverted W1C logic
Mike Frysinger
2011-03-24
1
-0
/
+17
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