summaryrefslogtreecommitdiffstats
path: root/gdb/mips-tdep.c
Commit message (Collapse)AuthorAgeFilesLines
* Branch prediction code cleanupDaniel Jacobowitz2001-07-061-40/+53
|
* * mips-tdep.c (mips_software_single_step): New function.Daniel Jacobowitz2001-07-051-0/+27
| | | | | * config/mips/tm-mips.h: Add prototype for mips_software_single_step.
* * arch-utils.c (init_frame_pc_default): New functionAndrew Cagney2001-06-161-0/+1
| | | | | | | | | | * arch-utils.h (init_frame_pc_default): Declare. * gdbarch.sh (INIT_FRAME_PC): Default to init_frame_pc_default and not init_frame_pc_noop. * gdbarch.h, gdbarch.c: Re-generate. * blockframe.c (INIT_FRAME_PC): Delete macro definition. * mips-tdep.c (mips_gdbarch_init): Set init_frame_pc to init_frame_pc_noop.
* Multi-arch INIT_FRAME_PC() and INIT_FRAME_PC_FIRST().Andrew Cagney2001-06-151-7/+5
|
* multi-arch ADDR_BITS_REMOVE.Andrew Cagney2001-06-151-1/+5
|
* * config/mips/tm-irix6.h: New file.Eli Zaretskii2001-06-071-0/+22
| | | | | | | | | | | | | | | | | | | * config/mips/irix6.mh: New file. * config/mips/irix6.mt: New file. * config/mips/xm-irix6.h: New file. * config/mips/nm-irix6.h: New file. * mips-tdep.c (mips_gdbarch_init) <MIPS_ABI_N32>: Set up the disassembler info in tm_print_insn_info as appropriate for the N32 ABI. Force N32 ABI to be the default if the CPU is R8000 or R10000. * configure.tgt (mips*-sgi-irix6*): Map to irix6. * configure.host (mips*-sgi-irix6*): Ditto.
* * mips-tdep.c (show_mipsfpu_command): Remove unused variable msg.Eli Zaretskii2001-06-041-12/+15
| | | | | | (mips_set_processor_type_command): Remove unused variable j. (mips_breakpoint_from_pc): Declare breakpoint instruction sequences as unsigned char, to avoid compiler warnings.
* * mips-tdep.c (mips_store_return_value,Jim Blandy2001-05-121-2/+2
| | | | | mips_extract_return_value): Pass arguments to return_value_location in the proper order.
* Phase 1 of the ptid_t changes.Kevin Buettner2001-05-041-2/+2
|
* Gag -Wuninitialized warnings.Andrew Cagney2001-03-281-1/+4
| | | | Add -Wuninitialized to default warning list.
* * mips-tdep.c (mips_gdbarch_init): Tweak indentation.Jim Blandy2001-03-261-1/+1
|
* Change SOFTWARE_SINGLE_STEP_P into SOFTWARE_SINGLE_STEP_P().Andrew Cagney2001-03-201-5/+2
|
* Update/correct copyright notices.Kevin Buettner2001-03-061-2/+2
|
* Create new file regcache.h. Update all uses.Andrew Cagney2001-03-011-0/+1
|
* Fix printf fmt arguments.Andrew Cagney2001-02-211-10/+32
|
* When the target h/w has 8byte registers, return 8 bytes for the raw buffer sizeAndrew Cagney2001-02-201-0/+5
| | | | (from jim kingdon).
* Add __FILE__ and __LINE__ parameter to internal_error() /Andrew Cagney2001-02-081-3/+6
| | | | internal_verror().
* Replace strsave() with xstrdup().Andrew Cagney2001-01-311-5/+5
|
* 2001-01-04 Michael Snyder <msnyder@mvstp600e.cygnus.com>Michael Snyder2001-01-041-1/+1
| | | | * mips-tdep.c (mips_coerce_float_to_double): Fix typo in comment.
* Replace free() with xfree().Kevin Buettner2000-12-151-1/+1
|
* Multiarch STAB_REG_TO_REGNUM, ECOFF_REG_TO_REGNUM,Andrew Cagney2000-12-041-0/+27
| | | | DWARF_REG_TO_REGNUM, SDB_REG_TO_REGNUM, DWARF2_REG_TO_REGNUM.
* * mips-tdep.c (struct upk_mips16): Delete fields ``inst'' andAndrew Cagney2000-12-021-174/+163
| | | | | | | | | | | | | | | ``fmt''. Make ``offset'' a CORE_ADDR. (print_unpack): Delete. (extended_offset): Construct and return a CORE_ADDR. (fetch_mips_16): Return an int. Don't assume short is 16 bits. (unpack_mips16): Rewrite. Add ``extension'' parameter instead of incorrectly guessing if the instruction had an extension. (map16): Delete array. (mips16_op): Delete macro. (extended_mips16_next_pc): Rewrite of old mips16_next_pc function. When an extended instruction do a recursive call. (mips16_next_pc): Call extended_mips16_next_pc. (mips_next_pc): Cleanup.
* * gdbarch.sh, hp-psymtab-read.c, hpread.c, m3-nat.c, mcore-tdep.c,J.T. Conklin2000-10-301-3/+3
| | | | | | | | | | | | | | | | | | | mips-tdep.c, monitor.c, regcache.c, remote-es.c, ser-unix.c, somread.c, tracepoint.c: Fix spelling errors in comments. * gdbarch.c: Regenerate. * gnu-nat.c (S_exception_raise_request): Fix typos and spelling errors in strings. * m3-nat.c (intercept_exec_calls, mach_thread_parse_id): Likewise. * mcore-tdep.c (mcore_analyze_prologue): Likewise. * mips-tdep.c (mips16_next_pc, _initialize_mips_tdep): Likewise. * remote-e7000.c (e7000_start_remote): Likewise. * remote-rdp.c (handle_swi): Likewise. * remote-vx.c (vx_load_command): Likewise. * sh-tdep.c (sh_do_pseudo_register): Likewise. * sol-thread.c (td_err_string): Likewise. * symtab.c (decode_line_2): Likewise. -------------------------------------------------------------------
* Corrected spelling errors in comments.David Anderson2000-10-271-2/+2
| | | | gdbarch.{c,sh} removed a word from a comment.
* Approved by Andrew Cagney <ac131313@cygnus.com>Fred Fish2000-10-251-1/+8
| | | | | * mips-tdep.c (MIPS_DEFAULT_MASK_ADDRESS_P): Define using either the current arch or use zero.
* Corrected spelling errors in commentsDavid Anderson2000-10-231-1/+1
|
* Check arches->gdbarch and not current_gdbarch when looking for a match.Andrew Cagney2000-08-191-2/+2
|
* Protoization.Kevin Buettner2000-07-301-9/+4
|
* * mips-tdep.c: General cleanup. Delete all #if 0 code. ConvertAndrew Cagney2000-07-111-361/+180
| | | | | | | | all old style K&R function definitions to ISO-C. (struct gdbarch_tdep): Add mips_abi_string. (mips_gdbarch_init): Initialize. (mips_dump_tdep): Print mips_abi_string and other values. (mips_push_arguments): Add more detailed tracing.
* Force MIPS to sign-extend any addresses read from registers.Andrew Cagney2000-07-111-22/+30
|
* Move the ``set mask-address'' command to remote-mips.c. DisableAndrew Cagney2000-07-111-15/+71
| | | | address masking in mips-tdep.c.
* * mips-tdep.c (mips_push_arguments): Always align struct_addr on aAndrew Cagney2000-07-101-3/+8
| | | | | | | 16 byte boundary. Align allocated argument space using MIPS_STACK_ARGSIZE. Reserve space on stack for the struct return and floating-point registers. Use fp_register_arg_p to determine if float_argreg should be aligned.
* More mult-arch conversions: IEEE_FLOAT, SKIP_PROLOGUE,Andrew Cagney2000-07-071-29/+26
| | | | | SAVED_PC_AFTER_CALL, DECR_PC_AFTER_BREAK, BREAKPOINT_FROM_PC, INNER_THAN.
* 2000-07-06 Michael Snyder <msnyder@cleaver.cygnus.com>Michael Snyder2000-07-061-3/+5
| | | | * mips-tdep.c: Replace '16' with bfd_mach_mips16 where appropriate.
* For EABI, start allocting space on the stack when the registers areAndrew Cagney2000-06-231-11/+16
| | | | full. Not when the number of args == 8.
* When FP registers are full, store FP arguments on stack and not inAndrew Cagney2000-06-231-12/+29
| | | | integer registers.
* Add ``set debug mips'' command. Add much debugging.Andrew Cagney2000-06-171-11/+91
|
* For MIPS_EABI, squeeze simple floating point structs into an FP register.Andrew Cagney2000-06-171-1/+8
|
* EABI64 was selecting EABI32Andrew Cagney2000-06-171-1/+1
|
* Multi-arch GDB_TARGET_IS_MIPS64.Andrew Cagney2000-06-121-23/+36
|
* Print all known but not yet multi-arched values.Andrew Cagney2000-06-121-7/+328
|
* Re-implement gdbach_dump() so that it prints out the macro values.Andrew Cagney2000-06-101-58/+76
| | | | | | Add ``maint print arch'' command. Add ``gdbarch_register()'' function that also takes gdbarch_dump_tdep(). Use in mips-tdep.c.
* MIPS is always multi-arch enabled.Andrew Cagney2000-06-081-1/+25
|
* Delete MIPS_DEFAULT_FPU from config/mips/*.hAndrew Cagney2000-06-081-0/+9
|
* Change signature of function add_set_enum_cmd() so that it usesAndrew Cagney2000-06-081-6/+6
| | | | | constant character pointers. Update everything. As a consequence fix infrun's follow-fork plugging a small memory leak.
* PARAMS removal.Kevin Buettner2000-05-281-23/+23
|
* Fix signature of add_set_enum_cmd. Change VAR parameter to char**.Andrew Cagney2000-05-161-5/+5
| | | | Cleanup signature of add_set_cmd. Change VAR parameter to void*.
* Handle case of 32 ABI saving 32 bit registers on stack when targetAndrew Cagney2000-05-121-1/+67
| | | | has 64 bit ISA.
* Fix tipo 32->64 in MIPS_EABI.Andrew Cagney2000-05-121-1/+1
|
* Add preliminary support for IRIX's n32 abi to the MIPS's multi-arch code.Andrew Cagney2000-05-111-59/+115
|
OpenPOWER on IntegriCloud