diff options
47 files changed, 6235 insertions, 232 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 2ea53bc9b8..43a03634e4 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,22 @@ +2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com> + + * config.bfd: Add tic4x-*-*coff* and c4x-*-*coff* target. + * configure.in: Add tic4x_coff vector files. + * configure: Regenerate. + * Makefile.am: Add tic4x target. + * Makefile.in: Regenerate. + +2002-08-27 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * archures.c: Add the BFD arch type tic4x. + * bfd-in.h: Add BFD_IN_MEMORY flag. + * coff-tic4x.c: New file. + * coffswap.h (coff_swap_sym_out): Add preadjuster. + * cpu-tic4x.c: New file. + * targets.c: Added tic4x- in list of xvecs. + * ticoff.h: New file. + * bfd-in2.h: Regenerate. + 2002-08-27 Adam Nemet <anemet@lnxw.com> * elf32-arm.h (elf32_arm_finish_dynamic_sections): Set the last diff --git a/bfd/Makefile.am b/bfd/Makefile.am index d945dc3d35..583cb85ed8 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -89,6 +89,7 @@ ALL_MACHINES = \ cpu-sh.lo \ cpu-sparc.lo \ cpu-tic30.lo \ + cpu-tic4x.lo \ cpu-tic54x.lo \ cpu-tic80.lo \ cpu-v850.lo \ @@ -140,6 +141,7 @@ ALL_MACHINES_CFILES = \ cpu-sh.c \ cpu-sparc.c \ cpu-tic30.c \ + cpu-tic4x.c \ cpu-tic54x.c \ cpu-tic80.c \ cpu-v850.c \ @@ -185,6 +187,7 @@ BFD32_BACKENDS = \ coff-stgo32.lo \ coff-svm68k.lo \ coff-tic30.lo \ + coff-tic4x.lo \ coff-tic54x.lo \ coff-tic80.lo \ coff-u68k.lo \ @@ -346,6 +349,7 @@ BFD32_BACKENDS_CFILES = \ coff-stgo32.c \ coff-svm68k.c \ coff-tic30.c \ + coff-tic4x.c \ coff-tic54x.c \ coff-tic80.c \ coff-u68k.c \ @@ -935,6 +939,7 @@ cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h +cpu-tic4x.lo: cpu-tic4x.c $(INCDIR)/filenames.h cpu-tic54x.lo: cpu-tic54x.c $(INCDIR)/filenames.h cpu-tic80.lo: cpu-tic80.c $(INCDIR)/filenames.h cpu-v850.lo: cpu-v850.c $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h @@ -1053,6 +1058,9 @@ coff-svm68k.lo: coff-svm68k.c coff-m68k.c $(INCDIR)/filenames.h \ coff-tic30.lo: coff-tic30.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \ $(INCDIR)/coff/tic30.h $(INCDIR)/coff/external.h $(INCDIR)/coff/internal.h \ libcoff.h coffcode.h coffswap.h +coff-tic4x.lo: coff-tic4x.c $(INCDIR)/filenames.h \ + $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h \ + $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h coff-tic54x.lo: coff-tic54x.c $(INCDIR)/filenames.h \ $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h \ $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h diff --git a/bfd/Makefile.in b/bfd/Makefile.in index 6a137cdbab..470aade908 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -215,6 +215,7 @@ ALL_MACHINES = \ cpu-sh.lo \ cpu-sparc.lo \ cpu-tic30.lo \ + cpu-tic4x.lo \ cpu-tic54x.lo \ cpu-tic80.lo \ cpu-v850.lo \ @@ -267,6 +268,7 @@ ALL_MACHINES_CFILES = \ cpu-sh.c \ cpu-sparc.c \ cpu-tic30.c \ + cpu-tic4x.c \ cpu-tic54x.c \ cpu-tic80.c \ cpu-v850.c \ @@ -313,6 +315,7 @@ BFD32_BACKENDS = \ coff-stgo32.lo \ coff-svm68k.lo \ coff-tic30.lo \ + coff-tic4x.lo \ coff-tic54x.lo \ coff-tic80.lo \ coff-u68k.lo \ @@ -475,6 +478,7 @@ BFD32_BACKENDS_CFILES = \ coff-stgo32.c \ coff-svm68k.c \ coff-tic30.c \ + coff-tic4x.c \ coff-tic54x.c \ coff-tic80.c \ coff-u68k.c \ @@ -1465,6 +1469,7 @@ cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h +cpu-tic4x.lo: cpu-tic4x.c $(INCDIR)/filenames.h cpu-tic54x.lo: cpu-tic54x.c $(INCDIR)/filenames.h cpu-tic80.lo: cpu-tic80.c $(INCDIR)/filenames.h cpu-v850.lo: cpu-v850.c $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h @@ -1583,6 +1588,9 @@ coff-svm68k.lo: coff-svm68k.c coff-m68k.c $(INCDIR)/filenames.h \ coff-tic30.lo: coff-tic30.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \ $(INCDIR)/coff/tic30.h $(INCDIR)/coff/external.h $(INCDIR)/coff/internal.h \ libcoff.h coffcode.h coffswap.h +coff-tic4x.lo: coff-tic4x.c $(INCDIR)/filenames.h \ + $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h \ + $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h coff-tic54x.lo: coff-tic54x.c $(INCDIR)/filenames.h \ $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h \ $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h diff --git a/bfd/archures.c b/bfd/archures.c index dd51ec7551..f3ca094bcf 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -228,6 +228,9 @@ DESCRIPTION . bfd_arch_ns32k, {* National Semiconductors ns32000 *} . bfd_arch_w65, {* WDC 65816 *} . bfd_arch_tic30, {* Texas Instruments TMS320C30 *} +. bfd_arch_tic4x, {* Texas Instruments TMS320C3X/4X *} +.#define bfd_mach_c3x 30 +.#define bfd_mach_c4x 40 . bfd_arch_tic54x, {* Texas Instruments TMS320C54X *} . bfd_arch_tic80, {* TI TMS320c80 (MVP) *} . bfd_arch_v850, {* NEC V850 *} @@ -358,6 +361,7 @@ extern const bfd_arch_info_type bfd_s390_arch; extern const bfd_arch_info_type bfd_sh_arch; extern const bfd_arch_info_type bfd_sparc_arch; extern const bfd_arch_info_type bfd_tic30_arch; +extern const bfd_arch_info_type bfd_tic4x_arch; extern const bfd_arch_info_type bfd_tic54x_arch; extern const bfd_arch_info_type bfd_tic80_arch; extern const bfd_arch_info_type bfd_v850_arch; @@ -412,6 +416,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_sh_arch, &bfd_sparc_arch, &bfd_tic30_arch, + &bfd_tic4x_arch, &bfd_tic54x_arch, &bfd_tic80_arch, &bfd_v850_arch, diff --git a/bfd/bfd-in.h b/bfd/bfd-in.h index 19fd107208..9017440c2a 100644 --- a/bfd/bfd-in.h +++ b/bfd/bfd-in.h @@ -267,6 +267,9 @@ bfd_format; /* This flag indicates that the BFD contents are actually cached in memory. If this is set, iostream points to a bfd_in_memory struct. */ #define BFD_IN_MEMORY 0x800 + +/* The sections in this BFD specify a memory page. */ +#define HAS_LOAD_PAGE 0x1000 /* Symbols and relocation. */ diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 1a869f631b..34fb98ed30 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -273,6 +273,9 @@ bfd_format; /* This flag indicates that the BFD contents are actually cached in memory. If this is set, iostream points to a bfd_in_memory struct. */ #define BFD_IN_MEMORY 0x800 + +/* The sections in this BFD specify a memory page */ +#define HAS_LOAD_PAGE 0x1000 /* Symbols and relocation. */ @@ -1618,6 +1621,9 @@ enum bfd_architecture bfd_arch_ns32k, /* National Semiconductors ns32000 */ bfd_arch_w65, /* WDC 65816 */ bfd_arch_tic30, /* Texas Instruments TMS320C30 */ + bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */ +#define bfd_mach_c3x 30 +#define bfd_mach_c4x 40 bfd_arch_tic54x, /* Texas Instruments TMS320C54X */ bfd_arch_tic80, /* TI TMS320c80 (MVP) */ bfd_arch_v850, /* NEC V850 */ diff --git a/bfd/coff-tic4x.c b/bfd/coff-tic4x.c new file mode 100644 index 0000000000..1669f7cc01 --- /dev/null +++ b/bfd/coff-tic4x.c @@ -0,0 +1,616 @@ +/* BFD back-end for TMS320C4X coff binaries. + Copyright (C) 1996-99, 2000, 2002 Free Software Foundation, Inc. + Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz) + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" +#include "bfdlink.h" +#include "coff/tic4x.h" +#include "coff/internal.h" +#include "libcoff.h" + +#undef F_LSYMS +#define F_LSYMS F_LSYMS_TICOFF + +static boolean +ticoff0_bad_format_hook (abfd, filehdr) + bfd *abfd; + PTR filehdr; +{ + struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr; + + if (COFF0_BADMAG (*internal_f)) + return false; + + return true; +} + +static boolean +ticoff1_bad_format_hook (abfd, filehdr) + bfd *abfd ATTRIBUTE_UNUSED; + PTR filehdr; +{ + struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr; + + if (COFF1_BADMAG (*internal_f)) + return false; + + return true; +} + +/* Replace the stock _bfd_coff_is_local_label_name to recognize TI COFF local + labels. */ +static boolean +ticoff_bfd_is_local_label_name (abfd, name) + bfd *abfd ATTRIBUTE_UNUSED; + const char *name; +{ + if (TICOFF_LOCAL_LABEL_P(name)) + return true; + return false; +} + +#define coff_bfd_is_local_label_name ticoff_bfd_is_local_label_name + +static void tic4x_reloc_processing + PARAMS ((arelent *, struct internal_reloc *, asymbol **, bfd *, asection *)); + +#define RELOC_PROCESSING(RELENT,RELOC,SYMS,ABFD,SECT)\ + tic4x_reloc_processing (RELENT,RELOC,SYMS,ABFD,SECT) + +/* Customize coffcode.h; the default coff_ functions are set up to use + COFF2; coff_bad_format_hook uses BADMAG, so set that for COFF2. + The COFF1 and COFF0 vectors use custom _bad_format_hook procs + instead of setting BADMAG. */ +#define BADMAG(x) COFF2_BADMAG(x) +#include "coffcode.h" + +static bfd_reloc_status_type +tic4x_relocation (abfd, reloc_entry, symbol, data, input_section, + output_bfd, error_message) + bfd *abfd ATTRIBUTE_UNUSED; + arelent *reloc_entry; + asymbol *symbol ATTRIBUTE_UNUSED; + PTR data ATTRIBUTE_UNUSED; + asection *input_section; + bfd *output_bfd; + char **error_message ATTRIBUTE_UNUSED; +{ + if (output_bfd != (bfd *) NULL) + { + /* This is a partial relocation, and we want to apply the + relocation to the reloc entry rather than the raw data. + Modify the reloc inplace to reflect what we now know. */ + reloc_entry->address += input_section->output_offset; + return bfd_reloc_ok; + } + return bfd_reloc_continue; +} + +reloc_howto_type tic4x_howto_table[] = +{ + HOWTO(R_RELWORD, 0, 2, 16, false, 0, complain_overflow_signed, tic4x_relocation, "RELWORD", true, 0x0000ffff, 0x0000ffff, false), + HOWTO(R_REL24, 0, 2, 24, false, 0, complain_overflow_bitfield, tic4x_relocation, "REL24", true, 0x00ffffff, 0x00ffffff, false), + HOWTO(R_RELLONG, 0, 2, 32, false, 0, complain_overflow_dont, tic4x_relocation, "RELLONG", true, 0xffffffff, 0xffffffff, false), + HOWTO(R_PCRWORD, 0, 2, 16, true, 0, complain_overflow_signed, tic4x_relocation, "PCRWORD", true, 0x0000ffff, 0x0000ffff, false), + HOWTO(R_PCR24, 0, 2, 24, true, 0, complain_overflow_signed, tic4x_relocation, "PCR24", true, 0x00ffffff, 0x00ffffff, false), + HOWTO(R_PARTLS16, 0, 2, 16, false, 0, complain_overflow_dont, tic4x_relocation, "PARTLS16", true, 0x0000ffff, 0x0000ffff, false), + HOWTO(R_PARTMS8, 16, 2, 16, false, 0, complain_overflow_dont, tic4x_relocation, "PARTMS8", true, 0x0000ffff, 0x0000ffff, false), + HOWTO(R_RELWORD, 0, 2, 16, false, 0, complain_overflow_signed, tic4x_relocation, "ARELWORD", true, 0x0000ffff, 0x0000ffff, false), + HOWTO(R_REL24, 0, 2, 24, false, 0, complain_overflow_signed, tic4x_relocation, "AREL24", true, 0x00ffffff, 0x00ffffff, false), + HOWTO(R_RELLONG, 0, 2, 32, false, 0, complain_overflow_signed, tic4x_relocation, "ARELLONG", true, 0xffffffff, 0xffffffff, false), + HOWTO(R_PCRWORD, 0, 2, 16, true, 0, complain_overflow_signed, tic4x_relocation, "APCRWORD", true, 0x0000ffff, 0x0000ffff, false), + HOWTO(R_PCR24, 0, 2, 24, true, 0, complain_overflow_signed, tic4x_relocation, "APCR24", true, 0x00ffffff, 0x00ffffff, false), + HOWTO(R_PARTLS16, 0, 2, 16, false, 0, complain_overflow_dont, tic4x_relocation, "APARTLS16", true, 0x0000ffff, 0x0000ffff, false), + HOWTO(R_PARTMS8, 16, 2, 16, false, 0, complain_overflow_dont, tic4x_relocation, "APARTMS8", true, 0x0000ffff, 0x0000ffff, false), +}; +#define HOWTO_SIZE (sizeof(tic4x_howto_table) / sizeof(tic4x_howto_table[0])) + +#undef coff_bfd_reloc_type_lookup +#define coff_bfd_reloc_type_lookup tic4x_coff_reloc_type_lookup + +/* For the case statement use the code values used tc_gen_reloc (defined in + bfd/reloc.c) to map to the howto table entries. */ + +static reloc_howto_type * +tic4x_coff_reloc_type_lookup (abfd, code) + bfd *abfd ATTRIBUTE_UNUSED; + bfd_reloc_code_real_type code; +{ + unsigned int type; + unsigned int i; + + switch (code) + { + case BFD_RELOC_32: type = R_RELLONG; break; + case BFD_RELOC_24: type = R_REL24; break; + case BFD_RELOC_16: type = R_RELWORD; break; + case BFD_RELOC_24_PCREL: type = R_PCR24; break; + case BFD_RELOC_16_PCREL: type = R_PCRWORD; break; + case BFD_RELOC_HI16: type = R_PARTMS8; break; + case BFD_RELOC_LO16: type = R_PARTLS16; break; + default: + return NULL; + } + + for (i = 0; i < HOWTO_SIZE; i++) + { + if (tic4x_howto_table[i].type == type) + return tic4x_howto_table + i; + } + return NULL; +} + + +/* Code to turn a r_type into a howto ptr, uses the above howto table. + Called after some initial checking by the tic4x_rtype_to_howto fn + below. */ +static void +tic4x_lookup_howto (internal, dst) + arelent *internal; + struct internal_reloc *dst; +{ + unsigned int i; + int bank = (dst->r_symndx == -1) ? HOWTO_BANK : 0; + + for (i = 0; i < HOWTO_SIZE; i++) + { + if (tic4x_howto_table[i].type == dst->r_type) + { + internal->howto = tic4x_howto_table + i + bank; + return; + } + } + + (*_bfd_error_handler) (_("Unrecognized reloc type 0x%x"), + (unsigned int) dst->r_type); + abort(); +} + +#undef coff_rtype_to_howto +#define coff_rtype_to_howto coff_tic4x_rtype_to_howto + +static reloc_howto_type * +coff_tic4x_rtype_to_howto (abfd, sec, rel, h, sym, addendp) + bfd *abfd ATTRIBUTE_UNUSED; + asection *sec; + struct internal_reloc *rel; + struct coff_link_hash_entry *h ATTRIBUTE_UNUSED; + struct internal_syment *sym ATTRIBUTE_UNUSED; + bfd_vma *addendp; +{ + arelent genrel; + + if (rel->r_symndx == -1 && addendp != NULL) + /* This is a TI "internal relocation", which means that the relocation + amount is the amount by which the current section is being relocated + in the output section. */ + *addendp = (sec->output_section->vma + sec->output_offset) - sec->vma; + + tic4x_lookup_howto (&genrel, rel); + + return genrel.howto; +} + + +static void +tic4x_reloc_processing (relent, reloc, symbols, abfd, section) + arelent *relent; + struct internal_reloc *reloc; + asymbol **symbols; + bfd *abfd; + asection *section; +{ + asymbol *ptr; + + relent->address = reloc->r_vaddr; + + if (reloc->r_symndx != -1) + { + if (reloc->r_symndx < 0 || reloc->r_symndx >= obj_conv_table_size (abfd)) + { + (*_bfd_error_handler) + (_("%s: warning: illegal symbol index %ld in relocs"), + bfd_get_filename (abfd), reloc->r_symndx); + relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; + ptr = NULL; + } + else + { + relent->sym_ptr_ptr = (symbols + + obj_convert (abfd)[reloc->r_symndx]); + ptr = *(relent->sym_ptr_ptr); + } + } + else + { + relent->sym_ptr_ptr = section->symbol_ptr_ptr; + ptr = *(relent->sym_ptr_ptr); + } + + /* The symbols definitions that we have read in have been relocated + as if their sections started at 0. But the offsets refering to + the symbols in the raw data have not been modified, so we have to + have a negative addend to compensate. + + Note that symbols which used to be common must be left alone. */ + + /* Calculate any reloc addend by looking at the symbol. */ + CALC_ADDEND (abfd, ptr, *reloc, relent); + + relent->address -= section->vma; + /* !! relent->section = (asection *) NULL; */ + + /* Fill in the relent->howto field from reloc->r_type. */ + tic4x_lookup_howto (relent, reloc); +} + + +static const bfd_coff_backend_data ticoff0_swap_table = +{ + coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in, + coff_SWAP_aux_out, coff_SWAP_sym_out, + coff_SWAP_lineno_out, coff_SWAP_reloc_out, + coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out, + coff_SWAP_scnhdr_out, + FILHSZ_V0, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ_V0, LINESZ, FILNMLEN, +#ifdef COFF_LONG_FILENAMES + true, +#else + false, +#endif +#ifdef COFF_LONG_SECTION_NAMES + true, +#else + false, +#endif +#ifdef COFF_FORCE_SYMBOLS_IN_STRINGS + true, +#else + false, +#endif +#ifdef COFF_DEBUG_STRING_WIDE_PREFIX + 4, +#else + 2, +#endif + COFF_DEFAULT_SECTION_ALIGNMENT_POWER, + coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in, + coff_SWAP_reloc_in, ticoff0_bad_format_hook, coff_set_arch_mach_hook, + coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook, + coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook, + coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate, + coff_classify_symbol, coff_compute_section_file_positions, + coff_start_final_link, coff_relocate_section, coff_rtype_to_howto, + coff_adjust_symndx, coff_link_add_one_symbol, + coff_link_output_has_begun, coff_final_link_postscript +}; + +/* COFF1 differs in section header size. */ +static const bfd_coff_backend_data ticoff1_swap_table = +{ + coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in, + coff_SWAP_aux_out, coff_SWAP_sym_out, + coff_SWAP_lineno_out, coff_SWAP_reloc_out, + coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out, + coff_SWAP_scnhdr_out, + FILHSZ, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ, LINESZ, FILNMLEN, +#ifdef COFF_LONG_FILENAMES + true, +#else + false, +#endif +#ifdef COFF_LONG_SECTION_NAMES + true, +#else + false, +#endif +#ifdef COFF_FORCE_SYMBOLS_IN_STRINGS + true, +#else + false, +#endif +#ifdef COFF_DEBUG_STRING_WIDE_PREFIX + 4, +#else + 2, +#endif + COFF_DEFAULT_SECTION_ALIGNMENT_POWER, + coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in, + coff_SWAP_reloc_in, ticoff1_bad_format_hook, coff_set_arch_mach_hook, + coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook, + coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook, + coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate, + coff_classify_symbol, coff_compute_section_file_positions, + coff_start_final_link, coff_relocate_section, coff_rtype_to_howto, + coff_adjust_symndx, coff_link_add_one_symbol, + coff_link_output_has_begun, coff_final_link_postscript +}; + + +/* TI COFF v0, DOS tools (little-endian headers). */ +const bfd_target tic4x_coff0_vec = +{ + "coff0-c4x", /* Name. */ + bfd_target_coff_flavour, + BFD_ENDIAN_LITTLE, /* Data byte order is little. */ + BFD_ENDIAN_LITTLE, /* Header byte order is little (DOS tools). */ + + (HAS_RELOC | EXEC_P | /* Object flags. */ + HAS_LINENO | HAS_DEBUG | + HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ), + + (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */ + '_', /* Leading symbol underscore. */ + '/', /* ar_pad_char. */ + 15, /* ar_max_namelen. */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */ + + {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ + bfd_generic_archive_p, _bfd_dummy_target}, + {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ + bfd_false}, + {bfd_false, coff_write_object_contents, /* bfd_write_contents */ + _bfd_write_archive_contents, bfd_false}, + + BFD_JUMP_TABLE_GENERIC (coff), + BFD_JUMP_TABLE_COPY (coff), + BFD_JUMP_TABLE_CORE (_bfd_nocore), + BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), + BFD_JUMP_TABLE_SYMBOLS (coff), + BFD_JUMP_TABLE_RELOCS (coff), + BFD_JUMP_TABLE_WRITE (coff), + BFD_JUMP_TABLE_LINK (coff), + BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), + NULL, + + (PTR)&ticoff0_swap_table +}; + +/* TI COFF v0, SPARC tools (big-endian headers). */ +const bfd_target tic4x_coff0_beh_vec = +{ + "coff0-beh-c4x", /* Name. */ + bfd_target_coff_flavour, + BFD_ENDIAN_LITTLE, /* Data byte order is little. */ + BFD_ENDIAN_BIG, /* Header byte order is big. */ + + (HAS_RELOC | EXEC_P | /* Object flags. */ + HAS_LINENO | HAS_DEBUG | + HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ), + + (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */ + '_', /* Leading symbol underscore. */ + '/', /* ar_pad_char */ + 15, /* ar_max_namelen */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ + bfd_getb64, bfd_getb_signed_64, bfd_putb64, + bfd_getb32, bfd_getb_signed_32, bfd_putb32, + bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */ + + {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ + bfd_generic_archive_p, _bfd_dummy_target}, + {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ + bfd_false}, + {bfd_false, coff_write_object_contents, /* bfd_write_contents */ + _bfd_write_archive_contents, bfd_false}, + + BFD_JUMP_TABLE_GENERIC (coff), + BFD_JUMP_TABLE_COPY (coff), + BFD_JUMP_TABLE_CORE (_bfd_nocore), + BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), + BFD_JUMP_TABLE_SYMBOLS (coff), + BFD_JUMP_TABLE_RELOCS (coff), + BFD_JUMP_TABLE_WRITE (coff), + BFD_JUMP_TABLE_LINK (coff), + BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), + + &tic4x_coff0_vec, + + (PTR)&ticoff0_swap_table +}; + +/* TI COFF v1, DOS tools (little-endian headers). */ +const bfd_target tic4x_coff1_vec = +{ + "coff1-c4x", /* Name. */ + bfd_target_coff_flavour, + BFD_ENDIAN_LITTLE, /* Data byte order is little. */ + BFD_ENDIAN_LITTLE, /* Header byte order is little (DOS tools). */ + + (HAS_RELOC | EXEC_P | /* Object flags. */ + HAS_LINENO | HAS_DEBUG | + HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ), + + (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */ + '_', /* Leading symbol underscore. */ + '/', /* ar_pad_char */ + 15, /* ar_max_namelen */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */ + + {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ + bfd_generic_archive_p, _bfd_dummy_target}, + {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ + bfd_false}, + {bfd_false, coff_write_object_contents, /* bfd_write_contents */ + _bfd_write_archive_contents, bfd_false}, + + BFD_JUMP_TABLE_GENERIC (coff), + BFD_JUMP_TABLE_COPY (coff), + BFD_JUMP_TABLE_CORE (_bfd_nocore), + BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), + BFD_JUMP_TABLE_SYMBOLS (coff), + BFD_JUMP_TABLE_RELOCS (coff), + BFD_JUMP_TABLE_WRITE (coff), + BFD_JUMP_TABLE_LINK (coff), + BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), + + &tic4x_coff0_beh_vec, + + (PTR)&ticoff1_swap_table +}; + +/* TI COFF v1, SPARC tools (big-endian headers). */ +const bfd_target tic4x_coff1_beh_vec = +{ + "coff1-beh-c4x", /* Name. */ + bfd_target_coff_flavour, + BFD_ENDIAN_LITTLE, /* Data byte order is little. */ + BFD_ENDIAN_BIG, /* Header byte order is big. */ + + (HAS_RELOC | EXEC_P | /* Object flags. */ + HAS_LINENO | HAS_DEBUG | + HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ), + + (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */ + '_', /* Leading symbol underscore. */ + '/', /* ar_pad_char */ + 15, /* ar_max_namelen */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ + bfd_getb64, bfd_getb_signed_64, bfd_putb64, + bfd_getb32, bfd_getb_signed_32, bfd_putb32, + bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */ + + {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ + bfd_generic_archive_p, _bfd_dummy_target}, + {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ + bfd_false}, + {bfd_false, coff_write_object_contents, /* bfd_write_contents */ + _bfd_write_archive_contents, bfd_false}, + + BFD_JUMP_TABLE_GENERIC (coff), + BFD_JUMP_TABLE_COPY (coff), + BFD_JUMP_TABLE_CORE (_bfd_nocore), + BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), + BFD_JUMP_TABLE_SYMBOLS (coff), + BFD_JUMP_TABLE_RELOCS (coff), + BFD_JUMP_TABLE_WRITE (coff), + BFD_JUMP_TABLE_LINK (coff), + BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), + + &tic4x_coff1_vec, + + (PTR)&ticoff1_swap_table +}; + +/* TI COFF v2, TI DOS tools output (little-endian headers). */ +const bfd_target tic4x_coff2_vec = +{ + "coff2-c4x", /* Name. */ + bfd_target_coff_flavour, + BFD_ENDIAN_LITTLE, /* Data byte order is little. */ + BFD_ENDIAN_LITTLE, /* Header byte order is little (DOS tools). */ + + (HAS_RELOC | EXEC_P | /* Object flags. */ + HAS_LINENO | HAS_DEBUG | + HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ), + + (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */ + '_', /* Leading symbol underscore. */ + '/', /* ar_pad_char */ + 15, /* ar_max_namelen */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */ + + {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ + bfd_generic_archive_p, _bfd_dummy_target}, + {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ + bfd_false}, + {bfd_false, coff_write_object_contents, /* bfd_write_contents */ + _bfd_write_archive_contents, bfd_false}, + + BFD_JUMP_TABLE_GENERIC (coff), + BFD_JUMP_TABLE_COPY (coff), + BFD_JUMP_TABLE_CORE (_bfd_nocore), + BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), + BFD_JUMP_TABLE_SYMBOLS (coff), + BFD_JUMP_TABLE_RELOCS (coff), + BFD_JUMP_TABLE_WRITE (coff), + BFD_JUMP_TABLE_LINK (coff), + BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), + + &tic4x_coff1_beh_vec, + + COFF_SWAP_TABLE +}; + +/* TI COFF v2, TI SPARC tools output (big-endian headers). */ +const bfd_target tic4x_coff2_beh_vec = +{ + "coff2-beh-c4x", /* Name. */ + bfd_target_coff_flavour, + BFD_ENDIAN_LITTLE, /* Data byte order is little. */ + BFD_ENDIAN_BIG, /* Header byte order is big. */ + + (HAS_RELOC | EXEC_P | /* Object flags. */ + HAS_LINENO | HAS_DEBUG | + HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ), + + (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */ + '_', /* Leading symbol underscore. */ + '/', /* ar_pad_char */ + 15, /* ar_max_namelen */ + bfd_getl64, bfd_getl_signed_64, bfd_putl64, + bfd_getl32, bfd_getl_signed_32, bfd_putl32, + bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */ + bfd_getb64, bfd_getb_signed_64, bfd_putb64, + bfd_getb32, bfd_getb_signed_32, bfd_putb32, + bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */ + + {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ + bfd_generic_archive_p, _bfd_dummy_target}, + {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ + bfd_false}, + {bfd_false, coff_write_object_contents, /* bfd_write_contents */ + _bfd_write_archive_contents, bfd_false}, + + BFD_JUMP_TABLE_GENERIC (coff), + BFD_JUMP_TABLE_COPY (coff), + BFD_JUMP_TABLE_CORE (_bfd_nocore), + BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), + BFD_JUMP_TABLE_SYMBOLS (coff), + BFD_JUMP_TABLE_RELOCS (coff), + BFD_JUMP_TABLE_WRITE (coff), + BFD_JUMP_TABLE_LINK (coff), + BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), + + &tic4x_coff2_vec, + + COFF_SWAP_TABLE +}; diff --git a/bfd/coffswap.h b/bfd/coffswap.h index cd147c5bd5..5f23ecc07b 100644 --- a/bfd/coffswap.h +++ b/bfd/coffswap.h @@ -1,24 +1,24 @@ /* Generic COFF swapping routines, for BFD. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2000, - 2001 + 2001, 2002 Free Software Foundation, Inc. Written by Cygnus Support. -This file is part of BFD, the Binary File Descriptor library. + This file is part of BFD, the Binary File Descriptor library. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* This file contains routines used to swap COFF data. It is a header file because the details of swapping depend on the details of the @@ -381,7 +381,12 @@ coff_swap_sym_out (abfd, inp, extp) { struct internal_syment *in = (struct internal_syment *) inp; SYMENT *ext =(SYMENT *) extp; - if(in->_n._n_name[0] == 0) + +#ifdef COFF_ADJUST_SYM_OUT_PRE + COFF_ADJUST_SYM_OUT_PRE (abfd, inp, extp); +#endif + + if (in->_n._n_name[0] == 0) { H_PUT_32 (abfd, 0, ext->e.e.e_zeroes); H_PUT_32 (abfd, in->_n._n_n._n_offset, ext->e.e.e_offset); @@ -391,11 +396,13 @@ coff_swap_sym_out (abfd, inp, extp) #if SYMNMLEN != E_SYMNMLEN -> Error, we need to cope with truncating or extending SYMNMLEN!; #else - memcpy(ext->e.e_name, in->_n._n_name, SYMNMLEN); + memcpy (ext->e.e_name, in->_n._n_name, SYMNMLEN); #endif } + H_PUT_32 (abfd, in->n_value, ext->e_value); H_PUT_16 (abfd, in->n_scnum, ext->e_scnum); + if (sizeof (ext->e_type) == 2) { H_PUT_16 (abfd, in->n_type, ext->e_type); @@ -404,11 +411,14 @@ coff_swap_sym_out (abfd, inp, extp) { H_PUT_32 (abfd, in->n_type, ext->e_type); } + H_PUT_8 (abfd, in->n_sclass, ext->e_sclass); H_PUT_8 (abfd, in->n_numaux, ext->e_numaux); + #ifdef COFF_ADJUST_SYM_OUT_POST COFF_ADJUST_SYM_OUT_POST (abfd, inp, extp); #endif + return SYMESZ; } @@ -428,6 +438,7 @@ coff_swap_aux_in (abfd, ext1, type, class, indx, numaux, in1) #ifdef COFF_ADJUST_AUX_IN_PRE COFF_ADJUST_AUX_IN_PRE (abfd, ext1, type, class, indx, numaux, in1); #endif + switch (class) { case C_FILE: @@ -448,9 +459,7 @@ coff_swap_aux_in (abfd, ext1, type, class, indx, numaux, in1) numaux * sizeof (AUXENT)); } else - { - memcpy (in->x_file.x_fname, ext->x_file.x_fname, FILNMLEN); - } + memcpy (in->x_file.x_fname, ext->x_file.x_fname, FILNMLEN); #endif } goto end; @@ -502,7 +511,7 @@ coff_swap_aux_in (abfd, ext1, type, class, indx, numaux, in1) H_GET_16 (abfd, ext->x_sym.x_fcnary.x_ary.x_dimen[3]); } - if (ISFCN(type)) + if (ISFCN (type)) { in->x_sym.x_misc.x_fsize = H_GET_32 (abfd, ext->x_sym.x_misc.x_fsize); } @@ -535,7 +544,9 @@ coff_swap_aux_out (abfd, inp, type, class, indx, numaux, extp) #ifdef COFF_ADJUST_AUX_OUT_PRE COFF_ADJUST_AUX_OUT_PRE (abfd, inp, type, class, indx, numaux, extp); #endif - memset((PTR)ext, 0, AUXESZ); + + memset ((PTR)ext, 0, AUXESZ); + switch (class) { case C_FILE: @@ -681,29 +692,29 @@ coff_swap_aouthdr_in (abfd, aouthdr_ext1, aouthdr_int1) #else aouthdr_int->o_toc = H_GET_32 (abfd, aouthdr_ext->o_toc); #endif - aouthdr_int->o_snentry = H_GET_16 (abfd, aouthdr_ext->o_snentry); - aouthdr_int->o_sntext = H_GET_16 (abfd, aouthdr_ext->o_sntext); - aouthdr_int->o_sndata = H_GET_16 (abfd, aouthdr_ext->o_sndata); - aouthdr_int->o_sntoc = H_GET_16 (abfd, aouthdr_ext->o_sntoc); + aouthdr_int->o_snentry = H_GET_16 (abfd, aouthdr_ext->o_snentry); + aouthdr_int->o_sntext = H_GET_16 (abfd, aouthdr_ext->o_sntext); + aouthdr_int->o_sndata = H_GET_16 (abfd, aouthdr_ext->o_sndata); + aouthdr_int->o_sntoc = H_GET_16 (abfd, aouthdr_ext->o_sntoc); aouthdr_int->o_snloader = H_GET_16 (abfd, aouthdr_ext->o_snloader); - aouthdr_int->o_snbss = H_GET_16 (abfd, aouthdr_ext->o_snbss); + aouthdr_int->o_snbss = H_GET_16 (abfd, aouthdr_ext->o_snbss); aouthdr_int->o_algntext = H_GET_16 (abfd, aouthdr_ext->o_algntext); aouthdr_int->o_algndata = H_GET_16 (abfd, aouthdr_ext->o_algndata); - aouthdr_int->o_modtype = H_GET_16 (abfd, aouthdr_ext->o_modtype); - aouthdr_int->o_cputype = H_GET_16 (abfd, aouthdr_ext->o_cputype); + aouthdr_int->o_modtype = H_GET_16 (abfd, aouthdr_ext->o_modtype); + aouthdr_int->o_cputype = H_GET_16 (abfd, aouthdr_ext->o_cputype); #ifdef XCOFF64 aouthdr_int->o_maxstack = H_GET_64 (abfd, aouthdr_ext->o_maxstack); - aouthdr_int->o_maxdata = H_GET_64 (abfd, aouthdr_ext->o_maxdata); + aouthdr_int->o_maxdata = H_GET_64 (abfd, aouthdr_ext->o_maxdata); #else aouthdr_int->o_maxstack = H_GET_32 (abfd, aouthdr_ext->o_maxstack); - aouthdr_int->o_maxdata = H_GET_32 (abfd, aouthdr_ext->o_maxdata); + aouthdr_int->o_maxdata = H_GET_32 (abfd, aouthdr_ext->o_maxdata); #endif #endif #ifdef MIPSECOFF - aouthdr_int->bss_start = H_GET_32 (abfd, aouthdr_ext->bss_start); - aouthdr_int->gp_value = H_GET_32 (abfd, aouthdr_ext->gp_value); - aouthdr_int->gprmask = H_GET_32 (abfd, aouthdr_ext->gprmask); + aouthdr_int->bss_start = H_GET_32 (abfd, aouthdr_ext->bss_start); + aouthdr_int->gp_value = H_GET_32 (abfd, aouthdr_ext->gp_value); + aouthdr_int->gprmask = H_GET_32 (abfd, aouthdr_ext->gprmask); aouthdr_int->cprmask[0] = H_GET_32 (abfd, aouthdr_ext->cprmask[0]); aouthdr_int->cprmask[1] = H_GET_32 (abfd, aouthdr_ext->cprmask[1]); aouthdr_int->cprmask[2] = H_GET_32 (abfd, aouthdr_ext->cprmask[2]); @@ -712,9 +723,9 @@ coff_swap_aouthdr_in (abfd, aouthdr_ext1, aouthdr_int1) #ifdef ALPHAECOFF aouthdr_int->bss_start = H_GET_64 (abfd, aouthdr_ext->bss_start); - aouthdr_int->gp_value = H_GET_64 (abfd, aouthdr_ext->gp_value); - aouthdr_int->gprmask = H_GET_32 (abfd, aouthdr_ext->gprmask); - aouthdr_int->fprmask = H_GET_32 (abfd, aouthdr_ext->fprmask); + aouthdr_int->gp_value = H_GET_64 (abfd, aouthdr_ext->gp_value); + aouthdr_int->gprmask = H_GET_32 (abfd, aouthdr_ext->gprmask); + aouthdr_int->fprmask = H_GET_32 (abfd, aouthdr_ext->fprmask); #endif } @@ -807,7 +818,8 @@ coff_swap_scnhdr_in (abfd, ext, in) #ifdef COFF_ADJUST_SCNHDR_IN_PRE COFF_ADJUST_SCNHDR_IN_PRE (abfd, ext, in); #endif - memcpy(scnhdr_int->s_name, scnhdr_ext->s_name, sizeof (scnhdr_int->s_name)); + memcpy (scnhdr_int->s_name, scnhdr_ext->s_name, sizeof (scnhdr_int->s_name)); + scnhdr_int->s_vaddr = GET_SCNHDR_VADDR (abfd, scnhdr_ext->s_vaddr); scnhdr_int->s_paddr = GET_SCNHDR_PADDR (abfd, scnhdr_ext->s_paddr); scnhdr_int->s_size = GET_SCNHDR_SIZE (abfd, scnhdr_ext->s_size); @@ -866,6 +878,7 @@ coff_swap_scnhdr_out (abfd, in, out) buf, scnhdr_int->s_nlnno); PUT_SCNHDR_NLNNO (abfd, 0xffff, scnhdr_ext->s_nlnno); } + if (scnhdr_int->s_nreloc <= MAX_SCNHDR_NRELOC) PUT_SCNHDR_NRELOC (abfd, scnhdr_int->s_nreloc, scnhdr_ext->s_nreloc); else diff --git a/bfd/config.bfd b/bfd/config.bfd index 0db3748144..55e2afcf86 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -34,6 +34,7 @@ case "${targ_cpu}" in alpha*) targ_archs=bfd_alpha_arch ;; arm*) targ_archs=bfd_arm_arch ;; c30*) targ_archs=bfd_tic30_arch ;; +c4x*) targ_archs=bfd_tic4x_arch ;; c54x*) targ_archs=bfd_tic54x_arch ;; dlx*) targ_archs=bfd_dlx_arch ;; hppa*) targ_archs=bfd_hppa_arch ;; @@ -256,6 +257,12 @@ case "${targ}" in targ_defvec=tic30_coff_vec ;; + c4x-*-*coff* | tic4x-*-*coff*) + targ_defvec=tic4x_coff1_vec + targ_selvecs="tic4x_coff1_beh_vec tic4x_coff2_vec tic4x_coff2_beh_vec tic4x_coff0_vec tic4x_coff0_beh_vec" + targ_underscore=yes + ;; + c54x*-*-*coff* | tic54x-*-*coff*) targ_defvec=tic54x_coff1_vec targ_selvecs="tic54x_coff1_beh_vec tic54x_coff2_vec tic54x_coff2_beh_vec tic54x_coff0_vec tic54x_coff0_beh_vec" diff --git a/bfd/configure b/bfd/configure index cd03dd3cae..d30361eed2 100755 --- a/bfd/configure +++ b/bfd/configure @@ -6240,6 +6240,12 @@ do sunos_big_vec) tb="$tb sunos.lo aout32.lo" ;; tic30_aout_vec) tb="$tb aout-tic30.lo" ;; tic30_coff_vec) tb="$tb coff-tic30.lo" ;; + tic4x_coff0_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff0_beh_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff1_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff1_beh_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff2_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff2_beh_vec) tb="$tb coff-tic4x.lo" ;; tic54x_coff0_beh_vec) tb="$tb coff-tic54x.lo" ;; tic54x_coff0_vec) tb="$tb coff-tic54x.lo" ;; tic54x_coff1_beh_vec) tb="$tb coff-tic54x.lo" ;; @@ -6332,10 +6338,10 @@ case ${host64}-${target64}-${want64} in if test -n "$GCC" ; then bad_64bit_gcc=no; echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6 -echo "configure:6336: checking for gcc version with buggy 64-bit support" >&5 +echo "configure:6342: checking for gcc version with buggy 64-bit support" >&5 # Add more tests for gcc versions with non-working 64-bit support here. cat > conftest.$ac_ext <<EOF -#line 6339 "configure" +#line 6345 "configure" #include "confdefs.h" :__GNUC__:__GNUC_MINOR__:__i386__: EOF @@ -6380,17 +6386,17 @@ for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:6384: checking for $ac_hdr" >&5 +echo "configure:6390: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6389 "configure" +#line 6395 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:6394: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:6400: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -6419,12 +6425,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:6423: checking for $ac_func" >&5 +echo "configure:6429: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6428 "configure" +#line 6434 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -6447,7 +6453,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:6451: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6457: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -6472,7 +6478,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:6476: checking for working mmap" >&5 +echo "configure:6482: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -6480,7 +6486,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <<EOF -#line 6484 "configure" +#line 6490 "configure" #include "confdefs.h" /* Thanks to Mike Haertel and Jim Avera for this test. @@ -6633,7 +6639,7 @@ main() } EOF -if { (eval echo configure:6637: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:6643: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -6658,12 +6664,12 @@ fi for ac_func in madvise mprotect do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:6662: checking for $ac_func" >&5 +echo "configure:6668: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6667 "configure" +#line 6673 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -6686,7 +6692,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:6690: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6696: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else diff --git a/bfd/configure.in b/bfd/configure.in index 2f59095714..1facc24856 100644 --- a/bfd/configure.in +++ b/bfd/configure.in @@ -741,6 +741,12 @@ do sunos_big_vec) tb="$tb sunos.lo aout32.lo" ;; tic30_aout_vec) tb="$tb aout-tic30.lo" ;; tic30_coff_vec) tb="$tb coff-tic30.lo" ;; + tic4x_coff0_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff0_beh_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff1_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff1_beh_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff2_vec) tb="$tb coff-tic4x.lo" ;; + tic4x_coff2_beh_vec) tb="$tb coff-tic4x.lo" ;; tic54x_coff0_beh_vec) tb="$tb coff-tic54x.lo" ;; tic54x_coff0_vec) tb="$tb coff-tic54x.lo" ;; tic54x_coff1_beh_vec) tb="$tb coff-tic54x.lo" ;; diff --git a/bfd/cpu-tic4x.c b/bfd/cpu-tic4x.c new file mode 100644 index 0000000000..9d90fc62bd --- /dev/null +++ b/bfd/cpu-tic4x.c @@ -0,0 +1,81 @@ +/* bfd back-end for TMS320C[34]x support + Copyright (C) 1996, 1997, 2002 Free Software Foundation, Inc. + + Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz) + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "bfd.h" +#include "sysdep.h" +#include "libbfd.h" + +static boolean +c4x_scan (info, string) + const struct bfd_arch_info *info; + const char *string; +{ + /* Allow strings of form [ti][Cc][34][0-9], let's not be too picky + about strange numbered machines in C3x or C4x series. */ + if (string[0] == 't' && string[1] == 'i') + string += 2; + if (*string == 'C' || *string == 'c') + string++; + if (string[1] < '0' && string[1] > '9') + return false; + + if (*string == '3') + return (info->mach == bfd_mach_c3x); + else if (*string == '4') + return info->mach == bfd_mach_c4x; + + return false; +} + + +const bfd_arch_info_type bfd_tic3x_arch = + { + 32, /* 32 bits in a word. */ + 32, /* 32 bits in an address. */ + 32, /* 32 bits in a byte. */ + bfd_arch_tic4x, + bfd_mach_c3x, /* Machine number. */ + "c3x", /* Architecture name. */ + "tms320c3x", /* Printable name. */ + 0, /* Alignment power. */ + false, /* Not the default architecture. */ + bfd_default_compatible, + c4x_scan, + 0 + }; + +const bfd_arch_info_type bfd_tic4x_arch = + { + 32, /* 32 bits in a word. */ + 32, /* 32 bits in an address. */ + 32, /* 32 bits in a byte. */ + bfd_arch_tic4x, + bfd_mach_c4x, /* Machine number. */ + "c4x", /* Architecture name. */ + "tms320c4x", /* Printable name. */ + 0, /* Alignment power. */ + true, /* The default architecture. */ + bfd_default_compatible, + c4x_scan, + &bfd_tic3x_arch, + }; + + diff --git a/bfd/targets.c b/bfd/targets.c index 093490cf68..8d893eb257 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -683,6 +683,12 @@ extern const bfd_target sparcnetbsd_vec; extern const bfd_target sunos_big_vec; extern const bfd_target tic30_aout_vec; extern const bfd_target tic30_coff_vec; +extern const bfd_target tic4x_coff0_beh_vec; +extern const bfd_target tic4x_coff0_vec; +extern const bfd_target tic4x_coff1_beh_vec; +extern const bfd_target tic4x_coff1_vec; +extern const bfd_target tic4x_coff2_beh_vec; +extern const bfd_target tic4x_coff2_vec; extern const bfd_target tic54x_coff0_beh_vec; extern const bfd_target tic54x_coff0_vec; extern const bfd_target tic54x_coff1_beh_vec; diff --git a/bfd/ticoff.h b/bfd/ticoff.h new file mode 100644 index 0000000000..3b3fef02f1 --- /dev/null +++ b/bfd/ticoff.h @@ -0,0 +1,130 @@ +/* Copyright 2002 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#undef F_LSYMS +#define F_LSYMS F_LSYMS_TICOFF + +static boolean +ticoff0_bad_format_hook (abfd, filehdr) + bfd *abfd; + PTR filehdr; +{ + struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr; + + if (COFF0_BADMAG (*internal_f)) + return false; + + return true; +} + +static boolean +ticoff1_bad_format_hook (abfd, filehdr) + bfd *abfd ATTRIBUTE_UNUSED; + PTR filehdr; +{ + struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr; + + if (COFF1_BADMAG (*internal_f)) + return false; + + return true; +} + +/* Replace the stock _bfd_coff_is_local_label_name + to recognize TI COFF local labels. */ +static boolean +ticoff_bfd_is_local_label_name (abfd, name) + bfd *abfd ATTRIBUTE_UNUSED; + const char *name; +{ + if (TICOFF_LOCAL_LABEL_P(name)) + return true; + return false; +} + +#define coff_bfd_is_local_label_name ticoff_bfd_is_local_label_name + +/* Customize coffcode.h; the default coff_ functions are set up to use COFF2; + coff_bad_format_hook uses BADMAG, so set that for COFF2. The COFF1 + and COFF0 vectors use custom _bad_format_hook procs instead of setting + BADMAG. */ +#define BADMAG(x) COFF2_BADMAG(x) +#include "coffcode.h" + +/* COFF0 differs in file/section header size and relocation entry size. */ +static const bfd_coff_backend_data ticoff0_swap_table = +{ + coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in, + coff_SWAP_aux_out, coff_SWAP_sym_out, + coff_SWAP_lineno_out, coff_SWAP_reloc_out, + coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out, + coff_SWAP_scnhdr_out, + FILHSZ_V0, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ_V0, LINESZ, FILNMLEN, +#ifdef COFF_LONG_FILENAMES + true, +#else + false, +#endif +#ifdef COFF_LONG_SECTION_NAMES + true, +#else + false, +#endif + COFF_DEFAULT_SECTION_ALIGNMENT_POWER, + coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in, + coff_SWAP_reloc_in, ticoff0_bad_format_hook, coff_set_arch_mach_hook, + coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook, + coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook, + coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate, + coff_classify_symbol, coff_compute_section_file_positions, + coff_start_final_link, coff_relocate_section, coff_rtype_to_howto, + coff_adjust_symndx, coff_link_add_one_symbol, + coff_link_output_has_begun, coff_final_link_postscript +}; + +/* COFF1 differs in section header size. */ +static const bfd_coff_backend_data ticoff1_swap_table = +{ + coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in, + coff_SWAP_aux_out, coff_SWAP_sym_out, + coff_SWAP_lineno_out, coff_SWAP_reloc_out, + coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out, + coff_SWAP_scnhdr_out, + FILHSZ, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ, LINESZ, FILNMLEN, +#ifdef COFF_LONG_FILENAMES + true, +#else + false, +#endif +#ifdef COFF_LONG_SECTION_NAMES + true, +#else + false, +#endif + COFF_DEFAULT_SECTION_ALIGNMENT_POWER, + coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in, + coff_SWAP_reloc_in, ticoff1_bad_format_hook, coff_set_arch_mach_hook, + coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook, + coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook, + coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate, + coff_classify_symbol, coff_compute_section_file_positions, + coff_start_final_link, coff_relocate_section, coff_rtype_to_howto, + coff_adjust_symndx, coff_link_add_one_symbol, + coff_link_output_has_begun, coff_final_link_postscript +}; + diff --git a/binutils/ChangeLog b/binutils/ChangeLog index b196c23afe..444dfcbc6b 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,8 @@ +2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * objdump.c (dump_headers): Add printing of HAS_LOAD_PAGE flag. + (dump_bfd_header): Likewise. + 2002-08-27 Alan Modra <amodra@bigpond.net.au> * nm.c: Revert last change. diff --git a/binutils/objdump.c b/binutils/objdump.c index 21acc8b813..6488f9f061 100644 --- a/binutils/objdump.c +++ b/binutils/objdump.c @@ -74,7 +74,8 @@ static bfd_vma adjust_section_vma = 0; /* --adjust-vma */ static int file_start_context = 0; /* --file-start-context */ /* Extra info to pass to the disassembler address printing function. */ -struct objdump_disasm_info { +struct objdump_disasm_info +{ bfd *abfd; asection *sec; boolean require_sec; @@ -369,6 +370,8 @@ dump_headers (abfd) if (wide_output) printf (_(" Flags")); + if (abfd->flags & HAS_LOAD_PAGE) + printf (_(" Pg")); printf ("\n"); bfd_map_over_sections (abfd, dump_section_header, (PTR) NULL); @@ -2002,6 +2005,7 @@ dump_bfd_header (abfd) PF (WP_TEXT, "WP_TEXT"); PF (D_PAGED, "D_PAGED"); PF (BFD_IS_RELAXABLE, "BFD_IS_RELAXABLE"); + PF (HAS_LOAD_PAGE, "HAS_LOAD_PAGE"); printf (_("\nstart address 0x")); bfd_printf_vma (abfd, abfd->start_address); printf ("\n"); @@ -2034,8 +2038,6 @@ dump_bfd (abfd) } } - printf (_("\n%s: file format %s\n"), bfd_get_filename (abfd), - abfd->xvec->name); if (dump_ar_hdrs) print_arelt_descr (stdout, abfd, true); if (dump_file_header) @@ -2045,14 +2047,12 @@ dump_bfd (abfd) putchar ('\n'); if (dump_section_headers) dump_headers (abfd); + if (dump_symtab || dump_reloc_info || disassemble || dump_debugging) - { - syms = slurp_symtab (abfd); - } + syms = slurp_symtab (abfd); if (dump_dynamic_symtab || dump_dynamic_reloc_info) - { - dynsyms = slurp_dynamic_symtab (abfd); - } + dynsyms = slurp_dynamic_symtab (abfd); + if (dump_symtab) dump_symbols (abfd, false); if (dump_dynamic_symtab) @@ -2082,11 +2082,13 @@ dump_bfd (abfd) } } } + if (syms) { free (syms); syms = NULL; } + if (dynsyms) { free (dynsyms); diff --git a/binutils/testsuite/binutils-all/objdump.exp b/binutils/testsuite/binutils-all/objdump.exp index 09c557ff1d..53168d4640 100644 --- a/binutils/testsuite/binutils-all/objdump.exp +++ b/binutils/testsuite/binutils-all/objdump.exp @@ -40,7 +40,7 @@ lappend cpus_expected d10v d30v fr30 fr500 h8 hppa i386 i860 i960 ip2022 lappend cpus_expected m32r m68hc11 m68hc12 m68k m88k MCore lappend cpus_expected mips mn10200 mn10300 ns32k pj powerpc pyramid lappend cpus_expected romp rs6000 s390 sh sparc -lappend cpus_expected tahoe tic54x tic80 tms320c30 tms320c54x v850 +lappend cpus_expected tahoe tic54x tic80 tms320c30 tms320c4x tms320c54x v850 lappend cpus_expected vax we32k x86-64 xscale z8k z8001 z8002 # Make sure the target CPU shows up in the list. diff --git a/gas/ChangeLog b/gas/ChangeLog index 17acb07e84..e8bf9fea53 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,17 @@ +2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com> + + * configure.in: Add tic4x-coff* and c4x-coff*-coff-coff targets. + * configure: Regenerate. + * NEWS: Mention new port. + +2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * config/obj-coff.c: Add sdef definition. + * config/obj-coff.h: Add tic4x include file and set + target format. + * config/tc-tic4x.c: New file. + * config/tc-tic4x.h: New file. + 2002-08-28 Alan Modra <amodra@bigpond.net.au> * write.c (BFD_FAST_SECTION_FILL): Remove unused macro. @@ -1,5 +1,8 @@ -*- text -*- +* Support for Texas Instruments TMS320C4x series of microcontrollers + contributed by Michael Hayes and Svein E. Seldal. + * Support for the Ubicom IP2xxx microcontroller added. Changes in 2.13: diff --git a/gas/config/obj-coff.c b/gas/config/obj-coff.c index eb592aa293..56b55d7cbc 100644 --- a/gas/config/obj-coff.c +++ b/gas/config/obj-coff.c @@ -4623,8 +4623,8 @@ const pseudo_typeS coff_pseudo_table[] = #endif {"version", s_ignore, 0}, {"ABORT", s_abort, 0}, -#ifdef TC_M88K - /* The m88k uses sdef instead of def. */ +#if defined( TC_M88K ) || defined ( TC_TIC4X ) + /* The m88k and tic4x uses sdef instead of def. */ {"sdef", obj_coff_def, 0}, #endif {NULL, NULL, 0} /* end sentinel */ diff --git a/gas/config/obj-coff.h b/gas/config/obj-coff.h index 56389c9672..ed1fda96ee 100644 --- a/gas/config/obj-coff.h +++ b/gas/config/obj-coff.h @@ -157,6 +157,11 @@ #define TARGET_FORMAT "coff-tic30" #endif +#ifdef TC_TIC4X +#include "coff/tic4x.h" +#define TARGET_FORMAT "coff2-c4x" +#endif + #ifdef TC_TIC54X #include "coff/tic54x.h" #define TARGET_FORMAT "coff1-c54x" diff --git a/gas/config/tc-tic4x.c b/gas/config/tc-tic4x.c new file mode 100644 index 0000000000..dbd71d0bbf --- /dev/null +++ b/gas/config/tc-tic4x.c @@ -0,0 +1,2627 @@ +/* tc-c4x.c -- Assemble for the Texas Instruments TMS320C[34]x. + Copyright (C) 1997,1998, 2002 Free Software Foundation. + + Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz) + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GAS; see the file COPYING. If not, write to + the Free Software Foundation, 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + + +/* Things not currently implemented: + > .usect if has symbol on previous line + + > .sym, .eos, .stag, .etag, .member + + > Evaluation of constant floating point expressions (expr.c needs work!) + + > Warnings issued if parallel load of same register + + Note that this is primarily designed to handle the code generated + by GCC. Anything else is a bonus! */ + +#include <stdio.h> +#include <ctype.h> + +#include "as.h" +#include "opcode/tic4x.h" +#include "subsegs.h" +#include "obstack.h" +#include "symbols.h" +#include "listing.h" + +/* OK, we accept a syntax similar to the other well known C30 + assembly tools. With C4X_ALT_SYNTAX defined we are more + flexible, allowing a more Unix-like syntax: `%' in front of + register names, `#' in front of immediate constants, and + not requiring `@' in front of direct addresses. */ + +#define C4X_ALT_SYNTAX + +/* Equal to MAX_PRECISION in atof-ieee.c. */ +#define MAX_LITTLENUMS 6 /* (12 bytes) */ + +/* Handle of the inst mnemonic hash table. */ +static struct hash_control *c4x_op_hash = NULL; + +/* Handle asg pseudo. */ +static struct hash_control *c4x_asg_hash = NULL; + +static unsigned int c4x_cpu = 0; /* Default to TMS320C40. */ +static unsigned int c4x_big_model = 0; /* Default to small memory model. */ +static unsigned int c4x_reg_args = 0; /* Default to args passed on stack. */ + +typedef enum + { + M_UNKNOWN, M_IMMED, M_DIRECT, M_REGISTER, M_INDIRECT, + M_IMMED_F, M_PARALLEL, M_HI + } +c4x_addr_mode_t; + +typedef struct c4x_operand + { + c4x_addr_mode_t mode; /* Addressing mode. */ + expressionS expr; /* Expression. */ + int disp; /* Displacement for indirect addressing. */ + int aregno; /* Aux. register number. */ + LITTLENUM_TYPE fwords[MAX_LITTLENUMS]; /* Float immed. number. */ + } +c4x_operand_t; + +typedef struct c4x_insn + { + char name[C4X_NAME_MAX]; /* Mnemonic of instruction. */ + unsigned int in_use; /* True if in_use. */ + unsigned int parallel; /* True if parallel instruction. */ + unsigned int nchars; /* This is always 4 for the C30. */ + unsigned long opcode; /* Opcode number. */ + expressionS exp; /* Expression required for relocation. */ + int reloc; /* Relocation type required. */ + int pcrel; /* True if relocation PC relative. */ + char *pname; /* Name of instruction in parallel. */ + unsigned int num_operands; /* Number of operands in total. */ + c4x_inst_t *inst; /* Pointer to first template. */ + c4x_operand_t operands[C4X_OPERANDS_MAX]; + } +c4x_insn_t; + +static c4x_insn_t the_insn; /* Info about our instruction. */ +static c4x_insn_t *insn = &the_insn; + +static void c4x_asg PARAMS ((int)); +static void c4x_bss PARAMS ((int)); +static void c4x_globl PARAMS ((int)); +static void c4x_eval PARAMS ((int)); +static void c4x_cons PARAMS ((int)); +static void c4x_set PARAMS ((int)); +static void c4x_newblock PARAMS ((int)); +static void c4x_pseudo_ignore PARAMS ((int)); +static void c4x_sect PARAMS ((int)); +static void c4x_usect PARAMS ((int)); +static void c4x_version PARAMS ((int)); + +const pseudo_typeS + md_pseudo_table[] = +{ + {"align", s_align_bytes, 32}, + {"ascii", c4x_cons, 1}, + {"asciz", c4x_pseudo_ignore, 0}, + {"asg", c4x_asg, 0}, + {"asect", c4x_pseudo_ignore, 0}, /* Absolute named section. */ + {"block", s_space, 0}, + {"byte", c4x_cons, 1}, + {"bss", c4x_bss, 0}, + {"comm", c4x_bss, 0}, + {"def", c4x_globl, 0}, + {"endfunc", c4x_pseudo_ignore, 0}, + {"eos", c4x_pseudo_ignore, 0}, + {"etag", c4x_pseudo_ignore, 0}, + {"equ", c4x_set, 0}, + {"eval", c4x_eval, 0}, + {"exitm", s_mexit, 0}, + {"func", c4x_pseudo_ignore, 0}, + {"global", c4x_globl, 0}, + {"globl", c4x_globl, 0}, + {"hword", c4x_cons, 2}, + {"ieee", float_cons, 'i'}, + {"int", c4x_cons, 4}, /* .int allocates 4 bytes. */ + {"length", c4x_pseudo_ignore, 0}, + {"ldouble", float_cons, 'l'}, + {"member", c4x_pseudo_ignore, 0}, + {"newblock", c4x_newblock, 0}, + {"ref", s_ignore, 0}, /* All undefined treated as external. */ + {"set", c4x_set, 0}, + {"sect", c4x_sect, 1}, /* Define named section. */ + {"space", s_space, 4}, + {"stag", c4x_pseudo_ignore, 0}, + {"string", c4x_pseudo_ignore, 0}, + {"sym", c4x_pseudo_ignore, 0}, + {"usect", c4x_usect, 0}, /* Reserve space in uninit. named sect. */ + {"version", c4x_version, 0}, + {"width", c4x_pseudo_ignore, 0}, + {"word", c4x_cons, 4}, /* .word allocates 4 bytes. */ + {"xdef", c4x_globl, 0}, + {NULL, 0, 0}, +}; + +int md_short_jump_size = 4; +int md_long_jump_size = 4; +const int md_reloc_size = RELSZ; /* Coff headers. */ + +/* This array holds the chars that always start a comment. If the + pre-processor is disabled, these aren't very useful. */ +#ifdef C4X_ALT_SYNTAX +const char comment_chars[] = ";!"; +#else +const char comment_chars[] = ";"; +#endif + +/* This array holds the chars that only start a comment at the beginning of + a line. If the line seems to have the form '# 123 filename' + .line and .file directives will appear in the pre-processed output. + Note that input_file.c hand checks for '#' at the beginning of the + first line of the input file. This is because the compiler outputs + #NO_APP at the beginning of its output. + Also note that comments like this one will always work. */ +const char line_comment_chars[] = "#*"; + +/* We needed an unused char for line separation to work around the + lack of macros, using sed and such. */ +const char line_separator_chars[] = "&"; + +/* Chars that can be used to separate mant from exp in floating point nums. */ +const char EXP_CHARS[] = "eE"; + +/* Chars that mean this number is a floating point constant. */ +/* As in 0f12.456 */ +/* or 0d1.2345e12 */ +const char FLT_CHARS[] = "fFilsS"; + +/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be + changed in read.c. Ideally it shouldn't have to know about it at + all, but nothing is ideal around here. */ + +/* Flonums returned here. */ +extern FLONUM_TYPE generic_floating_point_number; + +/* Precision in LittleNums. */ +#define MAX_PRECISION (2) +#define S_PRECISION (1) /* Short float constants 16-bit. */ +#define F_PRECISION (2) /* Float and double types 32-bit. */ +#define GUARD (2) + +/* Turn generic_floating_point_number into a real short/float/double. */ +int +c4x_gen_to_words (FLONUM_TYPE flonum, LITTLENUM_TYPE *words, int precision) +{ + int return_value = 0; + LITTLENUM_TYPE *p; /* Littlenum pointer. */ + int mantissa_bits; /* Bits in mantissa field. */ + int exponent_bits; /* Bits in exponent field. */ + int exponent; + unsigned int sone; /* Scaled one. */ + unsigned int sfract; /* Scaled fraction. */ + unsigned int smant; /* Scaled mantissa. */ + unsigned int tmp; + int shift; /* Shift count. */ + + /* Here is how a generic floating point number is stored using + flonums (an extension of bignums) where p is a pointer to an + array of LITTLENUMs. + + For example 2e-3 is stored with exp = -4 and + bits[0] = 0x0000 + bits[1] = 0x0000 + bits[2] = 0x4fde + bits[3] = 0x978d + bits[4] = 0x126e + bits[5] = 0x0083 + with low = &bits[2], high = &bits[5], and leader = &bits[5]. + + This number can be written as + 0x0083126e978d4fde.00000000 * 65536**-4 or + 0x0.0083126e978d4fde * 65536**0 or + 0x0.83126e978d4fde * 2**-8 = 2e-3 + + Note that low points to the 65536**0 littlenum (bits[2]) and + leader points to the most significant non-zero littlenum + (bits[5]). + + TMS320C3X floating point numbers are a bit of a strange beast. + The 32-bit flavour has the 8 MSBs representing the exponent in + twos complement format (-128 to +127). There is then a sign bit + followed by 23 bits of mantissa. The mantissa is expressed in + twos complement format with the binary point after the most + significant non sign bit. The bit after the binary point is + suppressed since it is the complement of the sign bit. The + effective mantissa is thus 24 bits. Zero is represented by an + exponent of -128. + + The 16-bit flavour has the 4 MSBs representing the exponent in + twos complement format (-8 to +7). There is then a sign bit + followed by 11 bits of mantissa. The mantissa is expressed in + twos complement format with the binary point after the most + significant non sign bit. The bit after the binary point is + suppressed since it is the complement of the sign bit. The + effective mantissa is thus 12 bits. Zero is represented by an + exponent of -8. For example, + + number norm mant m x e s i fraction f + +0.500 => 1.00000000000 -1 -1 0 1 .00000000000 (1 + 0) * 2^(-1) + +0.999 => 1.11111111111 -1 -1 0 1 .11111111111 (1 + 0.99) * 2^(-1) + +1.000 => 1.00000000000 0 0 0 1 .00000000000 (1 + 0) * 2^(0) + +1.500 => 1.10000000000 0 0 0 1 .10000000000 (1 + 0.5) * 2^(0) + +1.999 => 1.11111111111 0 0 0 1 .11111111111 (1 + 0.9) * 2^(0) + +2.000 => 1.00000000000 1 1 0 1 .00000000000 (1 + 0) * 2^(1) + +4.000 => 1.00000000000 2 2 0 1 .00000000000 (1 + 0) * 2^(2) + -0.500 => 1.00000000000 -1 -1 1 0 .10000000000 (-2 + 0) * 2^(-2) + -1.000 => 1.00000000000 0 -1 1 0 .00000000000 (-2 + 0) * 2^(-1) + -1.500 => 1.10000000000 0 0 1 0 .10000000000 (-2 + 0.5) * 2^(0) + -1.999 => 1.11111111111 0 0 1 0 .00000000001 (-2 + 0.11) * 2^(0) + -2.000 => 1.00000000000 1 1 1 0 .00000000000 (-2 + 0) * 2^(0) + -4.000 => 1.00000000000 2 1 1 0 .00000000000 (-2 + 0) * 2^(1) + + where e is the exponent, s is the sign bit, i is the implied bit, + and f is the fraction stored in the mantissa field. + + num = (1 + f) * 2^x = m * 2^e if s = 0 + num = (-2 + f) * 2^x = -m * 2^e if s = 1 + where 0 <= f < 1.0 and 1.0 <= m < 2.0 + + The fraction (f) and exponent (e) fields for the TMS320C3X format + can be derived from the normalised mantissa (m) and exponent (x) using: + + f = m - 1, e = x if s = 0 + f = 2 - m, e = x if s = 1 and m != 1.0 + f = 0, e = x - 1 if s = 1 and m = 1.0 + f = 0, e = -8 if m = 0 + + + OK, the other issue we have to consider is rounding since the + mantissa has a much higher potential precision than what we can + represent. To do this we add half the smallest storable fraction. + We then have to renormalise the number to allow for overflow. + + To convert a generic flonum into a TMS320C3X floating point + number, here's what we try to do.... + + The first thing is to generate a normalised mantissa (m) where + 1.0 <= m < 2 and to convert the exponent from base 16 to base 2. + We desire the binary point to be placed after the most significant + non zero bit. This process is done in two steps: firstly, the + littlenum with the most significant non zero bit is located (this + is done for us since leader points to this littlenum) and the + binary point (which is currently after the LSB of the littlenum + pointed to by low) is moved to before the MSB of the littlenum + pointed to by leader. This requires the exponent to be adjusted + by leader - low + 1. In the earlier example, the new exponent is + thus -4 + (5 - 2 + 1) = 0 (base 65536). We now need to convert + the exponent to base 2 by multiplying the exponent by 16 (log2 + 65536). The exponent base 2 is thus also zero. + + The second step is to hunt for the most significant non zero bit + in the leader littlenum. We do this by left shifting a copy of + the leader littlenum until bit 16 is set (0x10000) and counting + the number of shifts, S, required. The number of shifts then has to + be added to correct the exponent (base 2). For our example, this + will require 9 shifts and thus our normalised exponent (base 2) is + 0 + 9 = 9. Note that the worst case scenario is when the leader + littlenum is 1, thus requiring 16 shifts. + + We now have to left shift the other littlenums by the same amount, + propagating the shifted bits into the more significant littlenums. + To save a lot of unecessary shifting we only have to consider + two or three littlenums, since the greatest number of mantissa + bits required is 24 + 1 rounding bit. While two littlenums + provide 32 bits of precision, the most significant littlenum + may only contain a single significant bit and thus an extra + littlenum is required. + + Denoting the number of bits in the fraction field as F, we require + G = F + 2 bits (one extra bit is for rounding, the other gets + suppressed). Say we required S shifts to find the most + significant bit in the leader littlenum, the number of left shifts + required to move this bit into bit position G - 1 is L = G + S - 17. + Note that this shift count may be negative for the short floating + point flavour (where F = 11 and thus G = 13 and potentially S < 3). + If L > 0 we have to shunt the next littlenum into position. Bit + 15 (the MSB) of the next littlenum needs to get moved into position + L - 1 (If L > 15 we need all the bits of this littlenum and + some more from the next one.). We subtract 16 from L and use this + as the left shift count; the resultant value we or with the + previous result. If L > 0, we repeat this operation. */ + + if (precision != S_PRECISION) + words[1] = 0x0000; + + /* 0.0e0 seen. */ + if (flonum.low > flonum.leader) + { + words[0] = 0x8000; + return return_value; + } + + /* NaN: We can't do much... */ + if (flonum.sign == 0) + { + as_bad ("Nan, using zero."); + words[0] = 0x8000; + return return_value; + } + else if (flonum.sign == 'P') + { + /* +INF: Replace with maximum float. */ + if (precision == S_PRECISION) + words[0] = 0x77ff; + else + { + words[0] = 0x7f7f; + words[1] = 0xffff; + } + return return_value; + } + else if (flonum.sign == 'N') + { + /* -INF: Replace with maximum float. */ + if (precision == S_PRECISION) + words[0] = 0x7800; + else + words[0] = 0x7f80; + return return_value; + } + + exponent = (flonum.exponent + flonum.leader - flonum.low + 1) * 16; + + if (!(tmp = *flonum.leader)) + abort (); /* Hmmm. */ + shift = 0; /* Find position of first sig. bit. */ + while (tmp >>= 1) + shift++; + exponent -= (16 - shift); /* Adjust exponent. */ + + if (precision == S_PRECISION) /* Allow 1 rounding bit. */ + { + exponent_bits = 4; + mantissa_bits = 12; /* Include suppr. bit but not rounding bit. */ + } + else + { + exponent_bits = 8; + mantissa_bits = 24; + } + + shift = mantissa_bits - shift; + + smant = 0; + for (p = flonum.leader; p >= flonum.low && shift > -16; p--) + { + tmp = shift >= 0 ? *p << shift : *p >> -shift; + smant |= tmp; + shift -= 16; + } + + /* OK, we've got our scaled mantissa so let's round it up + and drop the rounding bit. */ + smant++; + smant >>= 1; + + /* The number may be unnormalised so renormalise it... */ + if (smant >> mantissa_bits) + { + smant >>= 1; + exponent++; + } + + /* The binary point is now between bit positions 11 and 10 or 23 and 22, + i.e., between mantissa_bits - 1 and mantissa_bits - 2 and the + bit at mantissa_bits - 1 should be set. */ + if (!(smant >> (mantissa_bits - 1))) + abort (); /* Ooops. */ + + sone = (1 << (mantissa_bits - 1)); + if (flonum.sign == '+') + sfract = smant - sone; /* smant - 1.0. */ + else + { + /* This seems to work. */ + if (smant == sone) + { + exponent--; + sfract = 0; + } + else + sfract = (sone << 1) - smant; /* 2.0 - smant. */ + sfract |= sone; /* Insert sign bit. */ + } + + if (abs (exponent) >= (1 << (exponent_bits - 1))) + as_bad ("Cannot represent exponent in %d bits", exponent_bits); + + /* Force exponent to fit in desired field width. */ + exponent &= (1 << (exponent_bits)) - 1; + sfract |= exponent << mantissa_bits; + + if (precision == S_PRECISION) + words[0] = sfract; + else + { + words[0] = sfract >> 16; + words[1] = sfract & 0xffff; + } + + return return_value; +} + +/* Returns pointer past text consumed. */ +char * +c4x_atof (char *str, char what_kind, LITTLENUM_TYPE *words) +{ + /* Extra bits for zeroed low-order bits. The 1st MAX_PRECISION are + zeroed, the last contain flonum bits. */ + static LITTLENUM_TYPE bits[MAX_PRECISION + MAX_PRECISION + GUARD]; + char *return_value; + /* Number of 16-bit words in the format. */ + int precision; + FLONUM_TYPE save_gen_flonum; + + /* We have to save the generic_floating_point_number because it + contains storage allocation about the array of LITTLENUMs where + the value is actually stored. We will allocate our own array of + littlenums below, but have to restore the global one on exit. */ + save_gen_flonum = generic_floating_point_number; + + return_value = str; + generic_floating_point_number.low = bits + MAX_PRECISION; + generic_floating_point_number.high = NULL; + generic_floating_point_number.leader = NULL; + generic_floating_point_number.exponent = 0; + generic_floating_point_number.sign = '\0'; + + /* Use more LittleNums than seems necessary: the highest flonum may + have 15 leading 0 bits, so could be useless. */ + + memset (bits, '\0', sizeof (LITTLENUM_TYPE) * MAX_PRECISION); + + switch (what_kind) + { + case 's': + case 'S': + precision = S_PRECISION; + break; + + case 'd': + case 'D': + case 'f': + case 'F': + precision = F_PRECISION; + break; + + default: + as_bad ("Invalid floating point number"); + return (NULL); + } + + generic_floating_point_number.high + = generic_floating_point_number.low + precision - 1 + GUARD; + + if (atof_generic (&return_value, ".", EXP_CHARS, + &generic_floating_point_number)) + { + as_bad ("Invalid floating point number"); + return (NULL); + } + + c4x_gen_to_words (generic_floating_point_number, + words, precision); + + /* Restore the generic_floating_point_number's storage alloc (and + everything else). */ + generic_floating_point_number = save_gen_flonum; + + return return_value; +} + +static void +c4x_insert_reg (char *regname, int regnum) +{ + char buf[32]; + int i; + + symbol_table_insert (symbol_new (regname, reg_section, (valueT) regnum, + &zero_address_frag)); + for (i = 0; regname[i]; i++) + buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i]; + buf[i] = '\0'; + + symbol_table_insert (symbol_new (buf, reg_section, (valueT) regnum, + &zero_address_frag)); +} + +static void +c4x_insert_sym (char *symname, int value) +{ + symbolS *symbolP; + + symbolP = symbol_new (symname, absolute_section, + (valueT) value, &zero_address_frag); + SF_SET_LOCAL (symbolP); + symbol_table_insert (symbolP); +} + +static char * +c4x_expression (char *str, expressionS *exp) +{ + char *s; + char *t; + + t = input_line_pointer; /* Save line pointer. */ + input_line_pointer = str; + expression (exp); + s = input_line_pointer; + input_line_pointer = t; /* Restore line pointer. */ + return s; /* Return pointer to where parsing stopped. */ +} + +static char * +c4x_expression_abs (char *str, int *value) +{ + char *s; + char *t; + + t = input_line_pointer; /* Save line pointer. */ + input_line_pointer = str; + *value = get_absolute_expression (); + s = input_line_pointer; + input_line_pointer = t; /* Restore line pointer. */ + return s; +} + +static void +c4x_emit_char (char c) +{ + expressionS exp; + + exp.X_op = O_constant; + exp.X_add_number = c; + emit_expr (&exp, 4); +} + +static void +c4x_seg_alloc (char *name, segT seg, int size, symbolS *symbolP) +{ + /* Note that the size is in words + so we multiply it by 4 to get the number of bytes to allocate. */ + + /* If we have symbol: .usect ".fred", size etc., + the symbol needs to point to the first location reserved + by the pseudo op. */ + + if (size) + { + char *p; + + p = frag_var (rs_fill, 1, 1, (relax_substateT) 0, + (symbolS *) symbolP, + size * OCTETS_PER_BYTE, (char *) 0); + *p = 0; + } +} + +/* .asg ["]character-string["], symbol */ +static void +c4x_asg (int x) +{ + char c; + char *name; + char *str; + char *tmp; + + SKIP_WHITESPACE (); + str = input_line_pointer; + + /* Skip string expression. */ + while (*input_line_pointer != ',' && *input_line_pointer) + input_line_pointer++; + if (*input_line_pointer != ',') + { + as_bad ("Comma expected\n"); + return; + } + *input_line_pointer++ = '\0'; + name = input_line_pointer; + c = get_symbol_end (); /* Get terminator. */ + tmp = xmalloc (strlen (str) + 1); + strcpy (tmp, str); + str = tmp; + tmp = xmalloc (strlen (name) + 1); + strcpy (tmp, name); + name = tmp; + if (hash_find (c4x_asg_hash, name)) + hash_replace (c4x_asg_hash, name, (PTR) str); + else + hash_insert (c4x_asg_hash, name, (PTR) str); + *input_line_pointer = c; + demand_empty_rest_of_line (); +} + +/* .bss symbol, size */ +static void +c4x_bss (int x) +{ + char c; + char *name; + char *p; + int size; + segT current_seg; + subsegT current_subseg; + symbolS *symbolP; + + current_seg = now_seg; /* Save current seg. */ + current_subseg = now_subseg; /* Save current subseg. */ + + SKIP_WHITESPACE (); + name = input_line_pointer; + c = get_symbol_end (); /* Get terminator. */ + if (c != ',') + { + as_bad (".bss size argument missing\n"); + return; + } + + input_line_pointer = + c4x_expression_abs (++input_line_pointer, &size); + if (size < 0) + { + as_bad (".bss size %d < 0!", size); + return; + } + subseg_set (bss_section, 0); + symbolP = symbol_find_or_make (name); + + if (S_GET_SEGMENT (symbolP) == bss_section) + symbol_get_frag (symbolP)->fr_symbol = 0; + + symbol_set_frag (symbolP, frag_now); + + p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, + size * OCTETS_PER_BYTE, (char *) 0); + *p = 0; /* Fill char. */ + + S_SET_SEGMENT (symbolP, bss_section); + + /* The symbol may already have been created with a preceding + ".globl" directive -- be careful not to step on storage class + in that case. Otherwise, set it to static. */ + if (S_GET_STORAGE_CLASS (symbolP) != C_EXT) + S_SET_STORAGE_CLASS (symbolP, C_STAT); + + subseg_set (current_seg, current_subseg); /* Restore current seg. */ + demand_empty_rest_of_line (); +} + +void +c4x_globl (int ignore) +{ + char *name; + int c; + symbolS *symbolP; + + do + { + name = input_line_pointer; + c = get_symbol_end (); + symbolP = symbol_find_or_make (name); + *input_line_pointer = c; + SKIP_WHITESPACE (); + S_SET_STORAGE_CLASS (symbolP, C_EXT); + if (c == ',') + { + input_line_pointer++; + SKIP_WHITESPACE (); + if (*input_line_pointer == '\n') + c = '\n'; + } + } + while (c == ','); + + demand_empty_rest_of_line (); +} + +/* Handle .byte, .word. .int, .long */ +static void +c4x_cons (int bytes) +{ + register unsigned int c; + do + { + SKIP_WHITESPACE (); + if (*input_line_pointer == '"') + { + input_line_pointer++; + while (is_a_char (c = next_char_of_string ())) + c4x_emit_char (c); + know (input_line_pointer[-1] == '\"'); + } + else + { + expressionS exp; + + input_line_pointer = c4x_expression (input_line_pointer, &exp); + if (exp.X_op == O_constant) + { + switch (bytes) + { + case 1: + exp.X_add_number &= 255; + break; + case 2: + exp.X_add_number &= 65535; + break; + } + } + /* Perhaps we should disallow .byte and .hword with + a non constant expression that will require relocation. */ + emit_expr (&exp, 4); + } + } + while (*input_line_pointer++ == ','); + + input_line_pointer--; /* Put terminator back into stream. */ + demand_empty_rest_of_line (); +} + +/* .eval expression, symbol */ +static void +c4x_eval (int x) +{ + char c; + int value; + char *name; + + SKIP_WHITESPACE (); + input_line_pointer = + c4x_expression_abs (input_line_pointer, &value); + if (*input_line_pointer++ != ',') + { + as_bad ("Symbol missing\n"); + return; + } + name = input_line_pointer; + c = get_symbol_end (); /* Get terminator. */ + demand_empty_rest_of_line (); + c4x_insert_sym (name, value); +} + +/* Reset local labels. */ +static void +c4x_newblock (int x) +{ + dollar_label_clear (); +} + +/* .sect "section-name" [, value] */ +/* .sect ["]section-name[:subsection-name]["] [, value] */ +static void +c4x_sect (int x) +{ + char c; + char *section_name; + char *subsection_name; + char *name; + segT seg; + int num; + + SKIP_WHITESPACE (); + if (*input_line_pointer == '"') + input_line_pointer++; + section_name = input_line_pointer; + c = get_symbol_end (); /* Get terminator. */ + input_line_pointer++; /* Skip null symbol terminator. */ + name = xmalloc (input_line_pointer - section_name + 1); + strcpy (name, section_name); + + /* TI C from version 5.0 allows a section name to contain a + subsection name as well. The subsection name is separated by a + ':' from the section name. Currently we scan the subsection + name and discard it. + Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz>. */ + if (c == ':') + { + subsection_name = input_line_pointer; + c = get_symbol_end (); /* Get terminator. */ + input_line_pointer++; /* Skip null symbol terminator. */ + as_warn (".sect: subsection name ignored"); + } + + /* We might still have a '"' to discard, but the character after a + symbol name will be overwritten with a \0 by get_symbol_end() + [VK]. */ + + if (c == ',') + input_line_pointer = + c4x_expression_abs (input_line_pointer, &num); + else if (*input_line_pointer == ',') + { + input_line_pointer = + c4x_expression_abs (++input_line_pointer, &num); + } + else + num = 0; + + seg = subseg_new (name, num); + if (line_label != NULL) + { + S_SET_SEGMENT (line_label, seg); + symbol_set_frag (line_label, frag_now); + } + + if (bfd_get_section_flags (stdoutput, seg) == SEC_NO_FLAGS) + { + if (!bfd_set_section_flags (stdoutput, seg, SEC_DATA)) + as_warn ("Error setting flags for \"%s\": %s", name, + bfd_errmsg (bfd_get_error ())); + } + + /* If the last character overwritten by get_symbol_end() was an + end-of-line, we must restore it or the end of the line will not be + recognised and scanning extends into the next line, stopping with + an error (blame Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz> + if this is not true). */ + if (is_end_of_line[(unsigned char) c]) + *(--input_line_pointer) = c; + + demand_empty_rest_of_line (); +} + +/* symbol[:] .set value or .set symbol, value */ +static void +c4x_set (int x) +{ + symbolS *symbolP; + + SKIP_WHITESPACE (); + if ((symbolP = line_label) == NULL) + { + char c; + char *name; + + name = input_line_pointer; + c = get_symbol_end (); /* Get terminator. */ + if (c != ',') + { + as_bad (".set syntax invalid\n"); + ignore_rest_of_line (); + return; + } + symbolP = symbol_find_or_make (name); + } + else + symbol_table_insert (symbolP); + + pseudo_set (symbolP); + demand_empty_rest_of_line (); +} + +/* [symbol] .usect ["]section-name["], size-in-words [, alignment-flag] */ +static void +c4x_usect (int x) +{ + char c; + char *name; + char *section_name; + segT seg; + int size, alignment_flag; + segT current_seg; + subsegT current_subseg; + + current_seg = now_seg; /* save current seg. */ + current_subseg = now_subseg; /* save current subseg. */ + + SKIP_WHITESPACE (); + if (*input_line_pointer == '"') + input_line_pointer++; + section_name = input_line_pointer; + c = get_symbol_end (); /* Get terminator. */ + input_line_pointer++; /* Skip null symbol terminator. */ + name = xmalloc (input_line_pointer - section_name + 1); + strcpy (name, section_name); + + if (c == ',') + input_line_pointer = + c4x_expression_abs (input_line_pointer, &size); + else if (*input_line_pointer == ',') + { + input_line_pointer = + c4x_expression_abs (++input_line_pointer, &size); + } + else + size = 0; + + /* Read a possibly present third argument (alignment flag) [VK]. */ + if (*input_line_pointer == ',') + { + input_line_pointer = + c4x_expression_abs (++input_line_pointer, &alignment_flag); + } + else + alignment_flag = 0; + if (alignment_flag) + as_warn (".usect: non-zero alignment flag ignored"); + + seg = subseg_new (name, 0); + if (line_label != NULL) + { + S_SET_SEGMENT (line_label, seg); + symbol_set_frag (line_label, frag_now); + S_SET_VALUE (line_label, frag_now_fix ()); + } + seg_info (seg)->bss = 1; /* Uninitialised data. */ + if (!bfd_set_section_flags (stdoutput, seg, SEC_ALLOC)) + as_warn ("Error setting flags for \"%s\": %s", name, + bfd_errmsg (bfd_get_error ())); + c4x_seg_alloc (name, seg, size, line_label); + + if (S_GET_STORAGE_CLASS (line_label) != C_EXT) + S_SET_STORAGE_CLASS (line_label, C_STAT); + + subseg_set (current_seg, current_subseg); /* Restore current seg. */ + demand_empty_rest_of_line (); +} + +/* .version cpu-version. */ +static void +c4x_version (int x) +{ + unsigned int temp; + + input_line_pointer = + c4x_expression_abs (input_line_pointer, &temp); + if (!IS_CPU_C3X (temp) && !IS_CPU_C4X (temp)) + as_bad ("This assembler does not support processor generation %d\n", + temp); + + if (c4x_cpu && temp != c4x_cpu) + as_warn ("Changing processor generation on fly not supported...\n"); + c4x_cpu = temp; + demand_empty_rest_of_line (); +} + +static void +c4x_pseudo_ignore (int x) +{ + /* We could print warning message here... */ + + /* Ignore everything until end of line. */ + while (!is_end_of_line[(unsigned char) *input_line_pointer++]); +} + +static void +c4x_init_regtable (void) +{ + unsigned int i; + + for (i = 0; i < c3x_num_registers; i++) + c4x_insert_reg (c3x_registers[i].name, + c3x_registers[i].regno); + + if (IS_CPU_C4X (c4x_cpu)) + { + /* Add additional C4x registers, overriding some C3x ones. */ + for (i = 0; i < c4x_num_registers; i++) + c4x_insert_reg (c4x_registers[i].name, + c4x_registers[i].regno); + } +} + +static void +c4x_init_symbols (void) +{ + /* The TI tools accept case insensitive versions of these symbols, + we don't ! + + For TI C/Asm 5.0 + + .TMS320xx 30,31,32,40,or 44 set according to -v flag + .C3X or .C3x 1 or 0 1 if -v30,-v31,or -v32 + .C30 1 or 0 1 if -v30 + .C31 1 or 0 1 if -v31 + .C32 1 or 0 1 if -v32 + .C4X or .C4x 1 or 0 1 if -v40, or -v44 + .C40 1 or 0 1 if -v40 + .C44 1 or 0 1 if -v44 + + .REGPARM 1 or 0 1 if -mr option used + .BIGMODEL 1 or 0 1 if -mb option used + + These symbols are currently supported but will be removed in a + later version: + .TMS320C30 1 or 0 1 if -v30,-v31,or -v32 + .TMS320C31 1 or 0 1 if -v31 + .TMS320C32 1 or 0 1 if -v32 + .TMS320C40 1 or 0 1 if -v40, or -v44 + .TMS320C44 1 or 0 1 if -v44 + + Source: TI: TMS320C3x/C4x Assembly Language Tools User's Guide, + 1997, SPRU035C, p. 3-17/3-18. */ + c4x_insert_sym (".REGPARM", c4x_reg_args); + c4x_insert_sym (".MEMPARM", !c4x_reg_args); + c4x_insert_sym (".BIGMODEL", c4x_big_model); + c4x_insert_sym (".C30INTERRUPT", 0); + c4x_insert_sym (".TMS320xx", c4x_cpu == 0 ? 40 : c4x_cpu); + c4x_insert_sym (".C3X", c4x_cpu == 30 || c4x_cpu == 31 || c4x_cpu == 32); + c4x_insert_sym (".C3x", c4x_cpu == 30 || c4x_cpu == 31 || c4x_cpu == 32); + c4x_insert_sym (".C4X", c4x_cpu == 0 || c4x_cpu == 40 || c4x_cpu == 44); + c4x_insert_sym (".C4x", c4x_cpu == 0 || c4x_cpu == 40 || c4x_cpu == 44); + /* Do we need to have the following symbols also in lower case? */ + c4x_insert_sym (".TMS320C30", c4x_cpu == 30 || c4x_cpu == 31 || c4x_cpu == 32); + c4x_insert_sym (".tms320C30", c4x_cpu == 30 || c4x_cpu == 31 || c4x_cpu == 32); + c4x_insert_sym (".TMS320C31", c4x_cpu == 31); + c4x_insert_sym (".tms320C31", c4x_cpu == 31); + c4x_insert_sym (".TMS320C32", c4x_cpu == 32); + c4x_insert_sym (".tms320C32", c4x_cpu == 32); + c4x_insert_sym (".TMS320C40", c4x_cpu == 40 || c4x_cpu == 44 || c4x_cpu == 0); + c4x_insert_sym (".tms320C40", c4x_cpu == 40 || c4x_cpu == 44 || c4x_cpu == 0); + c4x_insert_sym (".TMS320C44", c4x_cpu == 44); + c4x_insert_sym (".tms320C44", c4x_cpu == 44); + c4x_insert_sym (".TMX320C40", 0); /* C40 first pass silicon ? */ + c4x_insert_sym (".tmx320C40", 0); +} + +/* Insert a new instruction template into hash table. */ +static int +c4x_inst_insert (c4x_inst_t *inst) +{ + static char prev_name[16]; + const char *retval = NULL; + + /* Only insert the first name if have several similar entries. */ + if (!strcmp (inst->name, prev_name) || inst->name[0] == '\0') + return 1; + + retval = hash_insert (c4x_op_hash, inst->name, (PTR) inst); + if (retval != NULL) + fprintf (stderr, "internal error: can't hash `%s': %s\n", + inst->name, retval); + else + strcpy (prev_name, inst->name); + return retval == NULL; +} + +/* Make a new instruction template. */ +static c4x_inst_t * +c4x_inst_make (char *name, unsigned long opcode, char *args) +{ + static c4x_inst_t *insts = NULL; + static char *names = NULL; + static int index = 0; + + if (insts == NULL) + { + /* Allocate memory to store name strings. */ + names = (char *) xmalloc (sizeof (char) * 8192); + /* Allocate memory for additional insts. */ + insts = (c4x_inst_t *) + xmalloc (sizeof (c4x_inst_t) * 1024); + } + insts[index].name = names; + insts[index].opcode = opcode; + insts[index].opmask = 0xffffffff; + insts[index].args = args; + index++; + + do + *names++ = *name++; + while (*name); + *names++ = '\0'; + + return &insts[index - 1]; +} + +/* Add instruction template, creating dynamic templates as required. */ +static int +c4x_inst_add (c4x_inst_t *insts) +{ + char *s = insts->name; + char *d; + unsigned int i; + int ok = 1; + char name[16]; + + d = name; + + while (1) + { + switch (*s) + { + case 'B': + case 'C': + /* Dynamically create all the conditional insts. */ + for (i = 0; i < num_conds; i++) + { + c4x_inst_t *inst; + int k = 0; + char *c = c4x_conds[i].name; + char *e = d; + + while (*c) + *e++ = *c++; + c = s + 1; + while (*c) + *e++ = *c++; + *e = '\0'; + + /* If instruction found then have already processed it. */ + if (hash_find (c4x_op_hash, name)) + return 1; + + do + { + inst = c4x_inst_make (name, insts[k].opcode + + (c4x_conds[i].cond << + (*s == 'B' ? 16 : 23)), + insts[k].args); + if (k == 0) /* Save strcmp() with following func. */ + ok &= c4x_inst_insert (inst); + k++; + } + while (!strcmp (insts->name, + insts[k].name)); + } + return ok; + break; + + case '\0': + return c4x_inst_insert (insts); + break; + + default: + *d++ = *s++; + break; + } + } +} + +/* This function is called once, at assembler startup time. It should + set up all the tables, etc., that the MD part of the assembler will + need. */ +void +md_begin (void) +{ + int ok = 1; + unsigned int i; + + /* Create hash table for mnemonics. */ + c4x_op_hash = hash_new (); + + /* Create hash table for asg pseudo. */ + c4x_asg_hash = hash_new (); + + /* Add mnemonics to hash table, expanding conditional mnemonics on fly. */ + for (i = 0; i < c3x_num_insts; i++) + ok &= c4x_inst_add ((void *) &c3x_insts[i]); + + if (IS_CPU_C4X (c4x_cpu)) + { + for (i = 0; i < c4x_num_insts; i++) + ok &= c4x_inst_add ((void *) &c4x_insts[i]); + } + + /* Create dummy inst to avoid errors accessing end of table. */ + c4x_inst_make ("", 0, ""); + + if (!ok) + as_fatal ("Broken assembler. No assembly attempted."); + + /* Add registers to symbol table. */ + c4x_init_regtable (); + + /* Add predefined symbols to symbol table. */ + c4x_init_symbols (); +} + +void +c4x_end (void) +{ + bfd_set_arch_mach (stdoutput, bfd_arch_tic4x, + IS_CPU_C4X (c4x_cpu) ? bfd_mach_c4x : bfd_mach_c3x); +} + +static int +c4x_indirect_parse (c4x_operand_t *operand, + const c4x_indirect_t *indirect) +{ + char *n = indirect->name; + char *s = input_line_pointer; + char *b; + symbolS *symbolP; + char name[32]; + + operand->disp = 0; + for (; *n; n++) + { + switch (*n) + { + case 'a': /* Need to match aux register. */ + b = name; +#ifdef C4X_ALT_SYNTAX + if (*s == '%') + s++; +#endif + while (isalnum (*s)) + *b++ = *s++; + *b++ = '\0'; + if (!(symbolP = symbol_find (name))) + return 0; + + if (S_GET_SEGMENT (symbolP) != reg_section) + return 0; + + operand->aregno = S_GET_VALUE (symbolP); + if (operand->aregno >= REG_AR0 && operand->aregno <= REG_AR7) + break; + + as_bad ("Auxiliary register AR0--AR7 required for indirect"); + return -1; + + case 'd': /* Need to match constant for disp. */ +#ifdef C4X_ALT_SYNTAX + if (*s == '%') /* expr() will die if we don't skip this. */ + s++; +#endif + s = c4x_expression (s, &operand->expr); + if (operand->expr.X_op != O_constant) + return 0; + operand->disp = operand->expr.X_add_number; + if (operand->disp < 0 || operand->disp > 255) + { + as_bad ("Bad displacement %d (require 0--255)\n", + operand->disp); + return -1; + } + break; + + case 'y': /* Need to match IR0. */ + case 'z': /* Need to match IR1. */ +#ifdef C4X_ALT_SYNTAX + if (*s == '%') + s++; +#endif + s = c4x_expression (s, &operand->expr); + if (operand->expr.X_op != O_register) + return 0; + if (operand->expr.X_add_number != REG_IR0 + && operand->expr.X_add_number != REG_IR1) + { + as_bad ("Index register IR0,IR1 required for displacement"); + return -1; + } + + if (*n == 'y' && operand->expr.X_add_number == REG_IR0) + break; + if (*n == 'z' && operand->expr.X_add_number == REG_IR1) + break; + return 0; + + case '(': + if (*s != '(') /* No displacement, assume to be 1. */ + { + operand->disp = 1; + while (*n != ')') + n++; + } + else + s++; + break; + + default: + if (tolower (*s) != *n) + return 0; + s++; + } + } + if (*s != ' ' && *s != ',' && *s != '\0') + return 0; + input_line_pointer = s; + return 1; +} + +char * +c4x_operand_parse (char *s, c4x_operand_t *operand) +{ + unsigned int i; + char c; + int ret; + expressionS *exp = &operand->expr; + char *save = input_line_pointer; + char *str; + char *new; + struct hash_entry *entry = NULL; + + input_line_pointer = s; + SKIP_WHITESPACE (); + + str = input_line_pointer; + c = get_symbol_end (); /* Get terminator. */ + new = input_line_pointer; + if (strlen (str) && (entry = hash_find (c4x_asg_hash, str)) != NULL) + { + *input_line_pointer = c; + input_line_pointer = (char *) entry; + } + else + { + *input_line_pointer = c; + input_line_pointer = str; + } + + operand->mode = M_UNKNOWN; + switch (*input_line_pointer) + { +#ifdef C4X_ALT_SYNTAX + case '%': + input_line_pointer = c4x_expression (++input_line_pointer, exp); + if (exp->X_op != O_register) + as_bad ("Expecting a register name"); + operand->mode = M_REGISTER; + break; + + case '^': + /* Denotes high 16 bits. */ + input_line_pointer = c4x_expression (++input_line_pointer, exp); + if (exp->X_op == O_constant) + operand->mode = M_IMMED; + else if (exp->X_op == O_big) + { + if (exp->X_add_number) + as_bad ("Number too large"); /* bignum required */ + else + { + c4x_gen_to_words (generic_floating_point_number, + operand->fwords, S_PRECISION); + operand->mode = M_IMMED_F; + } + } + /* Allow ori ^foo, ar0 to be equivalent to ldi .hi.foo, ar0 */ + /* WARNING : The TI C40 assembler cannot do this. */ + else if (exp->X_op == O_symbol) + { + operand->mode = M_HI; + break; + } + + case '#': + input_line_pointer = c4x_expression (++input_line_pointer, exp); + if (exp->X_op == O_constant) + operand->mode = M_IMMED; + else if (exp->X_op == O_big) + { + if (exp->X_add_number > 0) + as_bad ("Number too large"); /* bignum required. */ + else + { + c4x_gen_to_words (generic_floating_point_number, + operand->fwords, S_PRECISION); + operand->mode = M_IMMED_F; + } + } + /* Allow ori foo, ar0 to be equivalent to ldi .lo.foo, ar0 */ + /* WARNING : The TI C40 assembler cannot do this. */ + else if (exp->X_op == O_symbol) + { + operand->mode = M_IMMED; + break; + } + + else + as_bad ("Expecting a constant value"); + break; + case '\\': +#endif + case '@': + input_line_pointer = c4x_expression (++input_line_pointer, exp); + if (exp->X_op != O_constant && exp->X_op != O_symbol) + as_bad ("Bad direct addressing construct %s", s); + if (exp->X_op == O_constant) + { + if (exp->X_add_number < 0) + as_bad ("Direct value of %ld is not suitable", + (long) exp->X_add_number); + } + operand->mode = M_DIRECT; + break; + + case '*': + ret = -1; + for (i = 0; i < num_indirects; i++) + if ((ret = c4x_indirect_parse (operand, &c4x_indirects[i]))) + break; + if (ret < 0) + break; + if (i < num_indirects) + { + operand->mode = M_INDIRECT; + /* Indirect addressing mode number. */ + operand->expr.X_add_number = c4x_indirects[i].modn; + /* Convert *+ARn(0) to *ARn etc. Maybe we should + squeal about silly ones? */ + if (operand->expr.X_add_number < 0x08 && !operand->disp) + operand->expr.X_add_number = 0x18; + } + else + as_bad ("Unknown indirect addressing mode"); + break; + + default: + operand->mode = M_IMMED; /* Assume immediate. */ + str = input_line_pointer; + input_line_pointer = c4x_expression (input_line_pointer, exp); + if (exp->X_op == O_register) + { + know (exp->X_add_symbol == 0); + know (exp->X_op_symbol == 0); + operand->mode = M_REGISTER; + break; + } + else if (exp->X_op == O_big) + { + if (exp->X_add_number > 0) + as_bad ("Number too large"); /* bignum required. */ + else + { + c4x_gen_to_words (generic_floating_point_number, + operand->fwords, S_PRECISION); + operand->mode = M_IMMED_F; + } + break; + } +#ifdef C4X_ALT_SYNTAX + /* Allow ldi foo, ar0 to be equivalent to ldi @foo, ar0. */ + else if (exp->X_op == O_symbol) + { + operand->mode = M_DIRECT; + break; + } +#endif + } + if (entry == NULL) + new = input_line_pointer; + input_line_pointer = save; + return new; +} + +static int +c4x_operands_match (c4x_inst_t *inst, c4x_insn_t *insn) +{ + const char *args = inst->args; + unsigned long opcode = inst->opcode; + int num_operands = insn->num_operands; + c4x_operand_t *operand = insn->operands; + expressionS *exp = &operand->expr; + int ret = 1; + int reg; + + /* Build the opcode, checking as we go to make sure that the + operands match. + + If an operand matches, we modify insn or opcode appropriately, + and do a "continue". If an operand fails to match, we "break". */ + + insn->nchars = 4; /* Instructions always 4 bytes. */ + insn->reloc = NO_RELOC; + insn->pcrel = 0; + + if (*args == '\0') + { + insn->opcode = opcode; + return num_operands == 0; + } + + for (;; ++args) + { + switch (*args) + { + + case '\0': /* End of args. */ + if (num_operands == 1) + { + insn->opcode = opcode; + return ret; + } + break; /* Too many operands. */ + + case '#': /* This is only used for ldp. */ + if (operand->mode != M_DIRECT && operand->mode != M_IMMED) + break; + /* While this looks like a direct addressing mode, we actually + use an immediate mode form of ldiu or ldpk instruction. */ + if (exp->X_op == O_constant) + { + /* Maybe for C3x we should check for 8 bit number. */ + INSERTS (opcode, exp->X_add_number, 15, 0); + continue; + } + else if (exp->X_op == O_symbol) + { + insn->reloc = BFD_RELOC_HI16; + insn->exp = *exp; + continue; + } + break; /* Not direct (dp) addressing. */ + + case '@': /* direct. */ + if (operand->mode != M_DIRECT) + break; + if (exp->X_op == O_constant) + { + /* Store only the 16 LSBs of the number. */ + INSERTS (opcode, exp->X_add_number, 15, 0); + continue; + } + else if (exp->X_op == O_symbol) + { + insn->reloc = BFD_RELOC_LO16; + insn->exp = *exp; + continue; + } + break; /* Not direct addressing. */ + + case 'A': + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg >= REG_AR0 && reg <= REG_AR7) + INSERTU (opcode, reg - REG_AR0, 24, 22); + else + { + as_bad ("Destination register must be ARn"); + ret = -1; + } + continue; + + case 'B': /* Unsigned integer immediate. */ + /* Allow br label or br @label. */ + if (operand->mode != M_IMMED && operand->mode != M_DIRECT) + break; + if (exp->X_op == O_constant) + { + if (exp->X_add_number < (1 << 24)) + { + INSERTU (opcode, exp->X_add_number, 23, 0); + continue; + } + else + { + as_bad ("Immediate value of %ld is too large", + (long) exp->X_add_number); + ret = -1; + continue; + } + } + if (IS_CPU_C4X (c4x_cpu)) + { + insn->reloc = BFD_RELOC_24_PCREL; + insn->pcrel = 1; + } + else + { + insn->reloc = BFD_RELOC_24; + insn->pcrel = 0; + } + insn->exp = *exp; + continue; + + case 'C': + if (!IS_CPU_C4X (c4x_cpu)) + break; + if (operand->mode != M_INDIRECT) + break; + if (operand->expr.X_add_number != 0 + && operand->expr.X_add_number != 0x18) + { + as_bad ("Invalid indirect addressing mode"); + ret = -1; + continue; + } + INSERTU (opcode, operand->aregno - REG_AR0, 2, 0); + INSERTU (opcode, operand->disp, 7, 3); + continue; + + case 'E': + if (!(operand->mode == M_REGISTER)) + break; + INSERTU (opcode, exp->X_add_number, 7, 0); + continue; + + case 'F': + if (operand->mode != M_IMMED_F + && !(operand->mode == M_IMMED && exp->X_op == O_constant)) + break; + + if (operand->mode != M_IMMED_F) + { + /* OK, we 've got something like cmpf 0, r0 + Why can't they stick in a bloody decimal point ?! */ + char string[16]; + + /* Create floating point number string. */ + sprintf (string, "%d.0", (int) exp->X_add_number); + c4x_atof (string, 's', operand->fwords); + } + + INSERTU (opcode, operand->fwords[0], 15, 0); + continue; + + case 'G': + if (operand->mode != M_REGISTER) + break; + INSERTU (opcode, exp->X_add_number, 15, 8); + continue; + + case 'H': + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg >= REG_R0 && reg <= REG_R7) + INSERTU (opcode, reg - REG_R0, 18, 16); + else + { + as_bad ("Register must be R0--R7"); + ret = -1; + } + continue; + + case 'I': + if (operand->mode != M_INDIRECT) + break; + if (operand->disp != 0 && operand->disp != 1) + { + if (IS_CPU_C4X (c4x_cpu)) + break; + as_bad ("Invalid indirect addressing mode displacement %d", + operand->disp); + ret = -1; + continue; + } + INSERTU (opcode, operand->aregno - REG_AR0, 2, 0); + INSERTU (opcode, operand->expr.X_add_number, 7, 3); + continue; + + case 'J': + if (operand->mode != M_INDIRECT) + break; + if (operand->disp != 0 && operand->disp != 1) + { + if (IS_CPU_C4X (c4x_cpu)) + break; + as_bad ("Invalid indirect addressing mode displacement %d", + operand->disp); + ret = -1; + continue; + } + INSERTU (opcode, operand->aregno - REG_AR0, 10, 8); + INSERTU (opcode, operand->expr.X_add_number, 15, 11); + continue; + + case 'K': + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg >= REG_R0 && reg <= REG_R7) + INSERTU (opcode, reg - REG_R0, 21, 19); + else + { + as_bad ("Register must be R0--R7"); + ret = -1; + } + continue; + + case 'L': + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg >= REG_R0 && reg <= REG_R7) + INSERTU (opcode, reg - REG_R0, 24, 22); + else + { + as_bad ("Register must be R0--R7"); + ret = -1; + } + continue; + + case 'M': + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg == REG_R2 || reg == REG_R3) + INSERTU (opcode, reg - REG_R2, 22, 22); + else + { + as_bad ("Destination register must be R2 or R3"); + ret = -1; + } + continue; + + case 'N': + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg == REG_R0 || reg == REG_R1) + INSERTU (opcode, reg - REG_R0, 23, 23); + else + { + as_bad ("Destination register must be R0 or R1"); + ret = -1; + } + continue; + + case 'O': + if (!IS_CPU_C4X (c4x_cpu)) + break; + if (operand->mode != M_INDIRECT) + break; + /* Require either *+ARn(disp) or *ARn. */ + if (operand->expr.X_add_number != 0 + && operand->expr.X_add_number != 0x18) + { + as_bad ("Invalid indirect addressing mode"); + ret = -1; + continue; + } + INSERTU (opcode, operand->aregno - REG_AR0, 10, 8); + INSERTU (opcode, operand->disp, 15, 11); + continue; + + case 'P': /* PC relative displacement. */ + /* Allow br label or br @label. */ + if (operand->mode != M_IMMED && operand->mode != M_DIRECT) + break; + if (exp->X_op == O_constant) + { + if (exp->X_add_number >= -32768 && exp->X_add_number <= 32767) + { + INSERTS (opcode, exp->X_add_number, 15, 0); + continue; + } + else + { + as_bad ("Displacement value of %ld is too large", + (long) exp->X_add_number); + ret = -1; + continue; + } + } + insn->reloc = BFD_RELOC_16_PCREL; + insn->pcrel = 1; + insn->exp = *exp; + continue; + + case 'Q': + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + INSERTU (opcode, reg, 15, 0); + continue; + + case 'R': + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + INSERTU (opcode, reg, 20, 16); + continue; + + case 'S': /* Short immediate int. */ + if (operand->mode != M_IMMED && operand->mode != M_HI) + break; + if (exp->X_op == O_big) + { + as_bad ("Floating point number not valid in expression"); + ret = -1; + continue; + } + if (exp->X_op == O_constant) + { + if (exp->X_add_number >= -32768 && exp->X_add_number <= 65535) + { + INSERTS (opcode, exp->X_add_number, 15, 0); + continue; + } + else + { + as_bad ("Signed immediate value %ld too large", + (long) exp->X_add_number); + ret = -1; + continue; + } + } + else if (exp->X_op == O_symbol) + { + if (operand->mode == M_HI) + { + insn->reloc = BFD_RELOC_HI16; + } + else + { + insn->reloc = BFD_RELOC_LO16; + } + insn->exp = *exp; + continue; + } + /* Handle cases like ldi foo - $, ar0 where foo + is a forward reference. Perhaps we should check + for X_op == O_symbol and disallow things like + ldi foo, ar0. */ + insn->reloc = BFD_RELOC_16; + insn->exp = *exp; + continue; + + case 'T': /* 5-bit immediate value for c4x stik. */ + if (!IS_CPU_C4X (c4x_cpu)) + break; + if (operand->mode != M_IMMED) + break; + if (exp->X_op == O_constant) + { + if (exp->X_add_number < 16 && exp->X_add_number >= -16) + { + INSERTS (opcode, exp->X_add_number, 20, 16); + continue; + } + else + { + as_bad ("Immediate value of %ld is too large", + (long) exp->X_add_number); + ret = -1; + continue; + } + } + break; /* No relocations allowed. */ + + case 'U': /* Unsigned integer immediate. */ + if (operand->mode != M_IMMED && operand->mode != M_HI) + break; + if (exp->X_op == O_constant) + { + if (exp->X_add_number < (1 << 16) && exp->X_add_number >= 0) + { + INSERTU (opcode, exp->X_add_number, 15, 0); + continue; + } + else + { + as_bad ("Unsigned immediate value %ld too large", + (long) exp->X_add_number); + ret = -1; + continue; + } + } + else if (exp->X_op == O_symbol) + { + if (operand->mode == M_HI) + insn->reloc = BFD_RELOC_HI16; + else + insn->reloc = BFD_RELOC_LO16; + + insn->exp = *exp; + continue; + } + insn->reloc = BFD_RELOC_16; + insn->exp = *exp; + continue; + + case 'V': /* Trap numbers (immediate field). */ + if (operand->mode != M_IMMED) + break; + if (exp->X_op == O_constant) + { + if (exp->X_add_number < 512 && IS_CPU_C4X (c4x_cpu)) + { + INSERTU (opcode, exp->X_add_number, 8, 0); + continue; + } + else if (exp->X_add_number < 32 && IS_CPU_C3X (c4x_cpu)) + { + INSERTU (opcode, exp->X_add_number | 0x20, 4, 0); + continue; + } + else + { + as_bad ("Immediate value of %ld is too large", + (long) exp->X_add_number); + ret = -1; + continue; + } + } + break; /* No relocations allowed. */ + + case 'W': /* Short immediate int (0--7). */ + if (!IS_CPU_C4X (c4x_cpu)) + break; + if (operand->mode != M_IMMED) + break; + if (exp->X_op == O_big) + { + as_bad ("Floating point number not valid in expression"); + ret = -1; + continue; + } + if (exp->X_op == O_constant) + { + if (exp->X_add_number >= -256 && exp->X_add_number <= 127) + { + INSERTS (opcode, exp->X_add_number, 7, 0); + continue; + } + else + { + as_bad ("Immediate value %ld too large", + (long) exp->X_add_number); + ret = -1; + continue; + } + } + insn->reloc = BFD_RELOC_16; + insn->exp = *exp; + continue; + + case 'X': /* Expansion register for c4x. */ + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg >= REG_IVTP && reg <= REG_TVTP) + INSERTU (opcode, reg - REG_IVTP, 4, 0); + else + { + as_bad ("Register must be ivtp or tvtp"); + ret = -1; + } + continue; + + case 'Y': /* Address register for c4x lda. */ + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg >= REG_AR0 && reg <= REG_SP) + INSERTU (opcode, reg, 20, 16); + else + { + as_bad ("Register must be address register"); + ret = -1; + } + continue; + + case 'Z': /* Expansion register for c4x. */ + if (operand->mode != M_REGISTER) + break; + reg = exp->X_add_number; + if (reg >= REG_IVTP && reg <= REG_TVTP) + INSERTU (opcode, reg - REG_IVTP, 20, 16); + else + { + as_bad ("Register must be ivtp or tvtp"); + ret = -1; + } + continue; + + case '*': + if (operand->mode != M_INDIRECT) + break; + INSERTS (opcode, operand->disp, 7, 0); + INSERTU (opcode, operand->aregno - REG_AR0, 10, 8); + INSERTU (opcode, operand->expr.X_add_number, 15, 11); + continue; + + case '|': /* treat as `,' if have ldi_ldi form. */ + if (insn->parallel) + { + if (--num_operands < 0) + break; /* Too few operands. */ + operand++; + if (operand->mode != M_PARALLEL) + break; + } + /* Fall through. */ + + case ',': /* Another operand. */ + if (--num_operands < 0) + break; /* Too few operands. */ + operand++; + exp = &operand->expr; + continue; + + case ';': /* Another optional operand. */ + if (num_operands == 1 || operand[1].mode == M_PARALLEL) + continue; + if (--num_operands < 0) + break; /* Too few operands. */ + operand++; + exp = &operand->expr; + continue; + + default: + BAD_CASE (*args); + } + return 0; + } +} + +void +c4x_insn_output (c4x_insn_t *insn) +{ + char *dst; + + /* Grab another fragment for opcode. */ + dst = frag_more (insn->nchars); + + /* Put out opcode word as a series of bytes in little endian order. */ + md_number_to_chars (dst, insn->opcode, insn->nchars); + + /* Put out the symbol-dependent stuff. */ + if (insn->reloc != NO_RELOC) + { + /* Where is the offset into the fragment for this instruction. */ + fix_new_exp (frag_now, + dst - frag_now->fr_literal, /* where */ + insn->nchars, /* size */ + &insn->exp, + insn->pcrel, + insn->reloc); + } +} + +/* Parse the operands. */ +int +c4x_operands_parse (char *s, c4x_operand_t *operands, int num_operands) +{ + if (!*s) + return num_operands; + + do + s = c4x_operand_parse (s, &operands[num_operands++]); + while (num_operands < C4X_OPERANDS_MAX && *s++ == ','); + + if (num_operands > C4X_OPERANDS_MAX) + { + as_bad ("Too many operands scanned"); + return -1; + } + return num_operands; +} + +/* Assemble a single instruction. Its label has already been handled + by the generic front end. We just parse mnemonic and operands, and + produce the bytes of data and relocation. */ +void +md_assemble (char *str) +{ + int ok = 0; + char *s; + int i; + int parsed = 0; + c4x_inst_t *inst; /* Instruction template. */ + + if (str && insn->parallel) + { + int star; + + /* Find mnemonic (second part of parallel instruction). */ + s = str; + /* Skip past instruction mnemonic. */ + while (*s && *s != ' ' && *s != '*') + s++; + star = *s == '*'; + if (*s) /* Null terminate for hash_find. */ + *s++ = '\0'; /* and skip past null. */ + strcat (insn->name, "_"); + strncat (insn->name, str, C4X_NAME_MAX - strlen (insn->name)); + + /* Kludge to overcome problems with scrubber removing + space between mnemonic and indirect operand (starting with *) + on second line of parallel instruction. */ + if (star) + *--s = '*'; + + insn->operands[insn->num_operands++].mode = M_PARALLEL; + + if ((i = c4x_operands_parse + (s, insn->operands, insn->num_operands)) < 0) + { + insn->parallel = 0; + insn->in_use = 0; + return; + } + insn->num_operands = i; + parsed = 1; + } + + if (insn->in_use) + { + if ((insn->inst = (struct c4x_inst *) + hash_find (c4x_op_hash, insn->name)) == NULL) + { + as_bad ("Unknown opcode `%s'.", insn->name); + insn->parallel = 0; + insn->in_use = 0; + return; + } + + /* FIXME: The list of templates should be scanned + for the candidates with the desired number of operands. + We shouldn't issue error messages until we have + whittled the list of candidate templates to the most + likely one... We could cache a parsed form of the templates + to reduce the time required to match a template. */ + + inst = insn->inst; + + do + ok = c4x_operands_match (inst, insn); + while (!ok && !strcmp (inst->name, inst[1].name) && inst++); + + if (ok > 0) + c4x_insn_output (insn); + else if (!ok) + as_bad ("Invalid operands for %s", insn->name); + else + as_bad ("Invalid instruction %s", insn->name); + } + + if (str && !parsed) + { + /* Find mnemonic. */ + s = str; + while (*s && *s != ' ') /* Skip past instruction mnemonic. */ + s++; + if (*s) /* Null terminate for hash_find. */ + *s++ = '\0'; /* and skip past null. */ + strncpy (insn->name, str, C4X_NAME_MAX - 3); + + if ((i = c4x_operands_parse (s, insn->operands, 0)) < 0) + { + insn->inst = NULL; /* Flag that error occured. */ + insn->parallel = 0; + insn->in_use = 0; + return; + } + insn->num_operands = i; + insn->in_use = 1; + } + else + insn->in_use = 0; + insn->parallel = 0; +} + +void +c4x_cleanup (void) +{ + if (insn->in_use) + md_assemble (NULL); +} + +/* Turn a string in input_line_pointer into a floating point constant + of type type, and store the appropriate bytes in *litP. The number + of LITTLENUMS emitted is stored in *sizeP. An error message is + returned, or NULL on OK. */ + +char * +md_atof (int type, char *litP, int *sizeP) +{ + int prec; + int ieee; + LITTLENUM_TYPE words[MAX_LITTLENUMS]; + LITTLENUM_TYPE *wordP; + unsigned char *t; + + switch (type) + { + case 's': /* .single */ + case 'S': + ieee = 0; + prec = 1; + break; + + case 'd': /* .double */ + case 'D': + case 'f': /* .float or .single */ + case 'F': + ieee = 0; + prec = 2; /* 1 32-bit word */ + break; + + case 'i': /* .ieee */ + prec = 2; + ieee = 1; + break; + + case 'l': /* .ldouble */ + prec = 4; /* 2 32-bit words */ + ieee = 1; + break; + + default: + *sizeP = 0; + return "Bad call to md_atof()"; + } + + if (ieee) + t = atof_ieee (input_line_pointer, type, words); + else + t = c4x_atof (input_line_pointer, type, words); + if (t) + input_line_pointer = t; + *sizeP = prec * sizeof (LITTLENUM_TYPE); + t = litP; + /* This loops outputs the LITTLENUMs in REVERSE order; in accord with + little endian byte order. */ + for (wordP = words + prec - 1; prec--;) + { + md_number_to_chars (litP, (valueT) (*wordP--), + sizeof (LITTLENUM_TYPE)); + litP += sizeof (LITTLENUM_TYPE); + } + return 0; +} + +void +md_apply_fix3 (fixS *fixP, valueT *value, segT seg ATTRIBUTE_UNUSED) +{ + char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; + valueT val = *value; + + switch (fixP->fx_r_type) + { + case BFD_RELOC_HI16: + val >>= 16; + break; + + case BFD_RELOC_LO16: + val &= 0xffff; + break; + default: + break; + } + + switch (fixP->fx_r_type) + { + case BFD_RELOC_32: + buf[3] = val >> 24; + case BFD_RELOC_24: + case BFD_RELOC_24_PCREL: + buf[2] = val >> 16; + case BFD_RELOC_16: + case BFD_RELOC_16_PCREL: + case BFD_RELOC_LO16: + case BFD_RELOC_HI16: + buf[1] = val >> 8; + buf[0] = val; + break; + + case NO_RELOC: + default: + as_bad ("Bad relocation type: 0x%02x", fixP->fx_r_type); + break; + } + + if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) fixP->fx_done = 1; +} + +/* Should never be called for c4x. */ +void +md_convert_frag (bfd *headers, segT sec, fragS *fragP) +{ + as_fatal ("md_convert_frag"); +} + +/* Should never be called for c4x. */ +void +md_create_short_jump (char *ptr, addressT from_addr, addressT to_addr, + fragS *frag, symbolS *to_symbol) +{ + as_fatal ("md_create_short_jmp\n"); +} + +/* Should never be called for c4x. */ +void +md_create_long_jump (char *ptr, addressT from_addr, addressT to_addr, + fragS *frag, symbolS *to_symbol) +{ + as_fatal ("md_create_long_jump\n"); +} + +/* Should never be called for c4x. */ +int +md_estimate_size_before_relax (register fragS *fragP, segT segtype) +{ + as_fatal ("md_estimate_size_before_relax\n"); + return 0; +} + +CONST char *md_shortopts = "bm:prs"; +struct option md_longopts[] = +{ + {NULL, no_argument, NULL, 0} +}; + +size_t md_longopts_size = sizeof (md_longopts); + +int +md_parse_option (int c, char *arg) +{ + switch (c) + { + case 'b': /* big model */ + c4x_big_model = 1; + break; + case 'm': /* -m[c][34]x */ + if (tolower (*arg) == 'c') + arg++; + c4x_cpu = atoi (arg); + if (!IS_CPU_C3X (c4x_cpu) && !IS_CPU_C4X (c4x_cpu)) + as_warn ("Unsupported processor generation %d\n", c4x_cpu); + break; + case 'p': /* push args */ + c4x_reg_args = 0; + break; + case 'r': /* register args */ + c4x_reg_args = 1; + break; + case 's': /* small model */ + c4x_big_model = 0; + break; + default: + return 0; + } + + return 1; +} + +void +md_show_usage (FILE *stream) +{ + fputs ("\ +C[34]x options:\n\ +-m30 | -m31 | -m32 | -m40 | -m44\n\ + specify variant of architecture\n\ +-b big memory model\n\ +-p pass arguments on stack\n\ +-r pass arguments in registers (default)\n\ +-s small memory model (default)\n", + stream); +} + +/* This is called when a line is unrecognized. This is used to handle + definitions of TI C3x tools style local labels $n where n is a single + decimal digit. */ +int +c4x_unrecognized_line (int c) +{ + int lab; + char *s; + + if (c != '$' || !isdigit (input_line_pointer[0])) + return 0; + + s = input_line_pointer; + + /* Let's allow multiple digit local labels. */ + lab = 0; + while (isdigit (*s)) + { + lab = lab * 10 + *s - '0'; + s++; + } + + if (dollar_label_defined (lab)) + { + as_bad ("Label \"$%d\" redefined", lab); + return 0; + } + + define_dollar_label (lab); + colon (dollar_label_name (lab, 0)); + input_line_pointer = s + 1; + + return 1; +} + +/* Handle local labels peculiar to us referred to in an expression. */ +symbolS * +md_undefined_symbol (char *name) +{ + /* Look for local labels of the form $n. */ + if (name[0] == '$' && isdigit (name[1])) + { + symbolS *symbolP; + char *s = name + 1; + int lab = 0; + + while (isdigit ((unsigned char) *s)) + { + lab = lab * 10 + *s - '0'; + s++; + } + if (dollar_label_defined (lab)) + { + name = dollar_label_name (lab, 0); + symbolP = symbol_find (name); + } + else + { + name = dollar_label_name (lab, 1); + symbolP = symbol_find_or_make (name); + } + + return symbolP; + } + return NULL; +} + +/* Parse an operand that is machine-specific. */ +void +md_operand (expressionS *expressionP) +{ +} + +/* Round up a section size to the appropriate boundary---do we need this? */ +valueT +md_section_align (segT segment, valueT size) +{ + return size; /* Byte (i.e., 32-bit) alignment is fine? */ +} + +static int +c4x_pc_offset (unsigned int op) +{ + /* Determine the PC offset for a C[34]x instruction. + This could be simplified using some boolean algebra + but at the expense of readability. */ + switch (op >> 24) + { + case 0x60: /* br */ + case 0x62: /* call (C4x) */ + case 0x64: /* rptb (C4x) */ + return 1; + case 0x61: /* brd */ + case 0x63: /* laj */ + case 0x65: /* rptbd (C4x) */ + return 3; + case 0x66: /* swi */ + case 0x67: + return 0; + default: + break; + } + + switch ((op & 0xffe00000) >> 20) + { + case 0x6a0: /* bB */ + case 0x720: /* callB */ + case 0x740: /* trapB */ + return 1; + + case 0x6a2: /* bBd */ + case 0x6a6: /* bBat */ + case 0x6aa: /* bBaf */ + case 0x722: /* lajB */ + case 0x748: /* latB */ + case 0x798: /* rptbd */ + return 3; + + default: + break; + } + + switch ((op & 0xfe200000) >> 20) + { + case 0x6e0: /* dbB */ + return 1; + + case 0x6e2: /* dbBd */ + return 3; + + default: + break; + } + + return 0; +} + +/* Exactly what point is a PC-relative offset relative TO? + With the C3x we have the following: + DBcond, Bcond disp + PC + 1 => PC + DBcondD, BcondD disp + PC + 3 => PC + */ +long +md_pcrel_from (fixS *fixP) +{ + unsigned char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; + unsigned int op; + + op = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; + + return ((fixP->fx_where + fixP->fx_frag->fr_address) >> 2) + + c4x_pc_offset (op); +} + +/* This is probably not necessary, if we have played our cards right, + since everything should be already aligned on a 4-byte boundary. */ +int +c4x_do_align (int alignment, const char *fill, int len, int max) +{ + char *p; + + p = frag_var (rs_align, 1, 1, (relax_substateT) 0, + (symbolS *) 0, (long) 2, (char *) 0); + + /* We could use frag_align_pattern (n, nop_pattern, sizeof (nop_pattern)); + to fill with our 32-bit nop opcode. */ + return 1; +} + +/* Look for and remove parallel instruction operator ||. */ +void +c4x_start_line (void) +{ + char *s = input_line_pointer; + + SKIP_WHITESPACE (); + + /* If parallel instruction prefix found at start of line, skip it. */ + if (*input_line_pointer == '|' && input_line_pointer[1] == '|') + { + if (insn->in_use) + { + insn->parallel = 1; + input_line_pointer += 2; + /* So line counters get bumped. */ + input_line_pointer[-1] = '\n'; + } + } + else + { + if (insn->in_use) + md_assemble (NULL); + input_line_pointer = s; + } +} + +arelent * +tc_gen_reloc (asection *seg, fixS *fixP) +{ + arelent *reloc; + + reloc = (arelent *) xmalloc (sizeof (arelent)); + + reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); + *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy); + reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; + reloc->address /= OCTETS_PER_BYTE; + reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); + if (reloc->howto == (reloc_howto_type *) NULL) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + "reloc %d not supported by object file format", + (int) fixP->fx_r_type); + return NULL; + } + + if (fixP->fx_r_type == BFD_RELOC_HI16) + reloc->addend = fixP->fx_offset; + else + reloc->addend = fixP->fx_addnumber; + + return reloc; +} + diff --git a/gas/config/tc-tic4x.h b/gas/config/tc-tic4x.h new file mode 100644 index 0000000000..185886a0e0 --- /dev/null +++ b/gas/config/tc-tic4x.h @@ -0,0 +1,98 @@ +/* tc-tic4x.h -- Assemble for the Texas TMS320C[34]X. + Copyright (C) 1997, 2002 Free Software Foundation. + + Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz) + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GAS; see the file COPYING. If not, write to + the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#define TC_TIC4X +#define C4X + +#ifndef BFD_ASSEMBLER +#error TMS320C4x requires BFD_ASSEMBLER +#endif + +#define TARGET_ARCH bfd_arch_tic4x + +#define WORKING_DOT_WORD + +/* There are a number of different formats used for local labels. gas + expects local labels either of the form `10$:' or `n:', where n is + a single digit. When LOCAL_LABEL_DOLLARS is defined labels of the + form `10$:' are expected. When LOCAL_LABEL_FB is defined labels of + the form `n:' are expected. The latter are expected to be referred + to using `nf' for a forward reference of `nb' for a backward + reference. + + The local labels expected by the TI tools are of the form `$n:', + where the colon is optional. Now the $ character is considered to + be valid symbol name character, so gas doesn't recognise our local + symbols by default. Defining LEX_DOLLAR to be 1 means that gas + won't allow labels starting with $ and thus the hook + tc_unrecognized_line() will be called from read.c. We can thus + parse lines starting with $n as having local labels. + + The other problem is the forward reference of local labels. If a + symbol is undefined, symbol_make() calls the md_undefined_symbol() + hook where we create a local label if recognised. */ + +/* Don't stick labels starting with 'L' into symbol table of COFF file. */ +#define LOCAL_LABEL(name) ((name)[0] == '$' || (name)[0] == 'L') + +#define TARGET_BYTES_BIG_ENDIAN 0 +#define OCTETS_PER_BYTE_POWER 2 + +#define TARGET_ARCH bfd_arch_tic4x +#define BFD_ARCH TARGET_ARCH + +#define TC_COUNT_RELOC(x) (x->fx_addsy) +#define TC_CONS_RELOC RELOC_32 +#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype (fixP) +#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep (frag) +#define NEED_FX_R_TYPE + +#define reloc_type int + +#define NO_RELOC 0 + +/* Labels are not required to have a colon for a suffix. */ +#define LABELS_WITHOUT_COLONS 1 + +/* Use $ as the section program counter (SPC). */ +#define DOLLAR_DOT + +/* Accept numbers with a suffix, e.g. 0ffffh, 1010b. */ +#define NUMBERS_WITH_SUFFIX 1 + +extern int c4x_unrecognized_line PARAMS ((int)); +#define tc_unrecognized_line(c) c4x_unrecognized_line (c) + +#define md_number_to_chars number_to_chars_littleendian + +extern int c4x_do_align PARAMS ((int, const char *, int, int)); +#define md_do_align(n,fill,len,max,l) if (c4x_do_align (n,fill,len,max)) goto l + +/* Start of line hook to remove parallel instruction operator || */ +extern void c4x_start_line PARAMS ((void)); +#define md_start_line_hook() c4x_start_line() + +extern void c4x_cleanup PARAMS ((void)); +#define md_cleanup() c4x_cleanup() + +extern void c4x_end PARAMS ((void)); +#define md_end() c4x_end() + diff --git a/gas/configure b/gas/configure index aa0f453e52..92962915b6 100755 --- a/gas/configure +++ b/gas/configure @@ -2617,6 +2617,7 @@ EOF tic30-*-*aout*) fmt=aout bfd_gas=yes ;; tic30-*-*coff*) fmt=coff bfd_gas=yes ;; + tic4x-*-* | c4x-*-*) fmt=coff bfd_gas=yes ;; tic54x-*-* | c54x*-*-*) fmt=coff bfd_gas=yes need_libm=yes;; tic80-*-*) fmt=coff ;; @@ -3173,7 +3174,7 @@ EOF # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3177: checking for $ac_word" >&5 +echo "configure:3178: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3203,7 +3204,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3207: checking for $ac_word" >&5 +echo "configure:3208: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3254,7 +3255,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3258: checking for $ac_word" >&5 +echo "configure:3259: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3286,7 +3287,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:3290: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:3291: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -3297,12 +3298,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 3301 "configure" +#line 3302 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:3306: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3307: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -3328,12 +3329,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:3332: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:3333: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:3337: checking whether we are using GNU C" >&5 +echo "configure:3338: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3342,7 +3343,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:3346: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:3347: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -3361,7 +3362,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:3365: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:3366: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3398,7 +3399,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3402: checking for $ac_word" >&5 +echo "configure:3403: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3429,7 +3430,7 @@ done test -n "$YACC" || YACC="yacc" echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:3433: checking how to run the C preprocessor" >&5 +echo "configure:3434: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= @@ -3444,13 +3445,13 @@ else # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext <<EOF -#line 3448 "configure" +#line 3449 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3454: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3455: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3461,13 +3462,13 @@ else rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext <<EOF -#line 3465 "configure" +#line 3466 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3471: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3472: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3478,13 +3479,13 @@ else rm -rf conftest* CPP="${CC-cc} -nologo -E" cat > conftest.$ac_ext <<EOF -#line 3482 "configure" +#line 3483 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3488: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3489: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3514,7 +3515,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3518: checking for $ac_word" >&5 +echo "configure:3519: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3547,7 +3548,7 @@ test -n "$LEX" || LEX="$missing_dir/missing flex" # Extract the first word of "flex", so it can be a program name with args. set dummy flex; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3551: checking for $ac_word" >&5 +echo "configure:3552: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3581,7 +3582,7 @@ then *) ac_lib=l ;; esac echo $ac_n "checking for yywrap in -l$ac_lib""... $ac_c" 1>&6 -echo "configure:3585: checking for yywrap in -l$ac_lib" >&5 +echo "configure:3586: checking for yywrap in -l$ac_lib" >&5 ac_lib_var=`echo $ac_lib'_'yywrap | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -3589,7 +3590,7 @@ else ac_save_LIBS="$LIBS" LIBS="-l$ac_lib $LIBS" cat > conftest.$ac_ext <<EOF -#line 3593 "configure" +#line 3594 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -3600,7 +3601,7 @@ int main() { yywrap() ; return 0; } EOF -if { (eval echo configure:3604: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3605: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -3623,7 +3624,7 @@ fi fi echo $ac_n "checking lex output file root""... $ac_c" 1>&6 -echo "configure:3627: checking lex output file root" >&5 +echo "configure:3628: checking lex output file root" >&5 if eval "test \"`echo '$''{'ac_cv_prog_lex_root'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3644,7 +3645,7 @@ echo "$ac_t""$ac_cv_prog_lex_root" 1>&6 LEX_OUTPUT_ROOT=$ac_cv_prog_lex_root echo $ac_n "checking whether yytext is a pointer""... $ac_c" 1>&6 -echo "configure:3648: checking whether yytext is a pointer" >&5 +echo "configure:3649: checking whether yytext is a pointer" >&5 if eval "test \"`echo '$''{'ac_cv_prog_lex_yytext_pointer'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3656,14 +3657,14 @@ echo 'extern char *yytext;' >>$LEX_OUTPUT_ROOT.c ac_save_LIBS="$LIBS" LIBS="$LIBS $LEXLIB" cat > conftest.$ac_ext <<EOF -#line 3660 "configure" +#line 3661 "configure" #include "confdefs.h" `cat $LEX_OUTPUT_ROOT.c` int main() { ; return 0; } EOF -if { (eval echo configure:3667: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3668: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_prog_lex_yytext_pointer=yes else @@ -3689,7 +3690,7 @@ ALL_LINGUAS="fr tr es" # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3693: checking for $ac_word" >&5 +echo "configure:3694: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3717,12 +3718,12 @@ else fi echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 -echo "configure:3721: checking for ANSI C header files" >&5 +echo "configure:3722: checking for ANSI C header files" >&5 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3726 "configure" +#line 3727 "configure" #include "confdefs.h" #include <stdlib.h> #include <stdarg.h> @@ -3730,7 +3731,7 @@ else #include <float.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3734: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3735: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3747,7 +3748,7 @@ rm -f conftest* if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 3751 "configure" +#line 3752 "configure" #include "confdefs.h" #include <string.h> EOF @@ -3765,7 +3766,7 @@ fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 3769 "configure" +#line 3770 "configure" #include "confdefs.h" #include <stdlib.h> EOF @@ -3786,7 +3787,7 @@ if test "$cross_compiling" = yes; then : else cat > conftest.$ac_ext <<EOF -#line 3790 "configure" +#line 3791 "configure" #include "confdefs.h" #include <ctype.h> #define ISLOWER(c) ('a' <= (c) && (c) <= 'z') @@ -3797,7 +3798,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } EOF -if { (eval echo configure:3801: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3802: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then : else @@ -3821,12 +3822,12 @@ EOF fi echo $ac_n "checking for working const""... $ac_c" 1>&6 -echo "configure:3825: checking for working const" >&5 +echo "configure:3826: checking for working const" >&5 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3830 "configure" +#line 3831 "configure" #include "confdefs.h" int main() { @@ -3875,7 +3876,7 @@ ccp = (char const *const *) p; ; return 0; } EOF -if { (eval echo configure:3879: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3880: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_const=yes else @@ -3896,21 +3897,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:3900: checking for inline" >&5 +echo "configure:3901: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <<EOF -#line 3907 "configure" +#line 3908 "configure" #include "confdefs.h" int main() { } $ac_kw foo() { ; return 0; } EOF -if { (eval echo configure:3914: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3915: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -3936,12 +3937,12 @@ EOF esac echo $ac_n "checking for off_t""... $ac_c" 1>&6 -echo "configure:3940: checking for off_t" >&5 +echo "configure:3941: checking for off_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3945 "configure" +#line 3946 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -3969,12 +3970,12 @@ EOF fi echo $ac_n "checking for size_t""... $ac_c" 1>&6 -echo "configure:3973: checking for size_t" >&5 +echo "configure:3974: checking for size_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3978 "configure" +#line 3979 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -4004,19 +4005,19 @@ fi # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:4008: checking for working alloca.h" >&5 +echo "configure:4009: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4013 "configure" +#line 4014 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:4020: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4021: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -4037,12 +4038,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:4041: checking for alloca" >&5 +echo "configure:4042: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4046 "configure" +#line 4047 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -4070,7 +4071,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:4074: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4075: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -4102,12 +4103,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:4106: checking whether alloca needs Cray hooks" >&5 +echo "configure:4107: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4111 "configure" +#line 4112 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -4132,12 +4133,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4136: checking for $ac_func" >&5 +echo "configure:4137: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4141 "configure" +#line 4142 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4160,7 +4161,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4164: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4165: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4187,7 +4188,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:4191: checking stack direction for C alloca" >&5 +echo "configure:4192: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4195,7 +4196,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 4199 "configure" +#line 4200 "configure" #include "confdefs.h" find_stack_direction () { @@ -4214,7 +4215,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:4218: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4219: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -4239,17 +4240,17 @@ for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4243: checking for $ac_hdr" >&5 +echo "configure:4244: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4248 "configure" +#line 4249 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4253: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4254: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4278,12 +4279,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4282: checking for $ac_func" >&5 +echo "configure:4283: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4287 "configure" +#line 4288 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4306,7 +4307,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4310: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4311: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4331,7 +4332,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:4335: checking for working mmap" >&5 +echo "configure:4336: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4339,7 +4340,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <<EOF -#line 4343 "configure" +#line 4344 "configure" #include "confdefs.h" /* Thanks to Mike Haertel and Jim Avera for this test. @@ -4492,7 +4493,7 @@ main() } EOF -if { (eval echo configure:4496: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4497: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -4520,17 +4521,17 @@ unistd.h values.h sys/param.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4524: checking for $ac_hdr" >&5 +echo "configure:4525: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4529 "configure" +#line 4530 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4534: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4535: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4560,12 +4561,12 @@ done __argz_count __argz_stringify __argz_next do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4564: checking for $ac_func" >&5 +echo "configure:4565: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4569 "configure" +#line 4570 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4588,7 +4589,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4592: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4593: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4617,12 +4618,12 @@ done for ac_func in stpcpy do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4621: checking for $ac_func" >&5 +echo "configure:4622: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4626 "configure" +#line 4627 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4645,7 +4646,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4649: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4650: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4679,19 +4680,19 @@ EOF if test $ac_cv_header_locale_h = yes; then echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6 -echo "configure:4683: checking for LC_MESSAGES" >&5 +echo "configure:4684: checking for LC_MESSAGES" >&5 if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4688 "configure" +#line 4689 "configure" #include "confdefs.h" #include <locale.h> int main() { return LC_MESSAGES ; return 0; } EOF -if { (eval echo configure:4695: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4696: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* am_cv_val_LC_MESSAGES=yes else @@ -4712,7 +4713,7 @@ EOF fi fi echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6 -echo "configure:4716: checking whether NLS is requested" >&5 +echo "configure:4717: checking whether NLS is requested" >&5 # Check whether --enable-nls or --disable-nls was given. if test "${enable_nls+set}" = set; then enableval="$enable_nls" @@ -4732,7 +4733,7 @@ fi EOF echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6 -echo "configure:4736: checking whether included gettext is requested" >&5 +echo "configure:4737: checking whether included gettext is requested" >&5 # Check whether --with-included-gettext or --without-included-gettext was given. if test "${with_included_gettext+set}" = set; then withval="$with_included_gettext" @@ -4751,17 +4752,17 @@ fi ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for libintl.h""... $ac_c" 1>&6 -echo "configure:4755: checking for libintl.h" >&5 +echo "configure:4756: checking for libintl.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4760 "configure" +#line 4761 "configure" #include "confdefs.h" #include <libintl.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4765: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4766: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4778,19 +4779,19 @@ fi if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6 -echo "configure:4782: checking for gettext in libc" >&5 +echo "configure:4783: checking for gettext in libc" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4787 "configure" +#line 4788 "configure" #include "confdefs.h" #include <libintl.h> int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:4794: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4795: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libc=yes else @@ -4806,7 +4807,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6 if test "$gt_cv_func_gettext_libc" != "yes"; then echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6 -echo "configure:4810: checking for bindtextdomain in -lintl" >&5 +echo "configure:4811: checking for bindtextdomain in -lintl" >&5 ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4814,7 +4815,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lintl $LIBS" cat > conftest.$ac_ext <<EOF -#line 4818 "configure" +#line 4819 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -4825,7 +4826,7 @@ int main() { bindtextdomain() ; return 0; } EOF -if { (eval echo configure:4829: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4830: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -4841,19 +4842,19 @@ fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6 -echo "configure:4845: checking for gettext in libintl" >&5 +echo "configure:4846: checking for gettext in libintl" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4850 "configure" +#line 4851 "configure" #include "confdefs.h" int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:4857: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4858: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libintl=yes else @@ -4881,7 +4882,7 @@ EOF # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4885: checking for $ac_word" >&5 +echo "configure:4886: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4915,12 +4916,12 @@ fi for ac_func in dcgettext do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4919: checking for $ac_func" >&5 +echo "configure:4920: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4924 "configure" +#line 4925 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4943,7 +4944,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4947: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4948: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4970,7 +4971,7 @@ done # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4974: checking for $ac_word" >&5 +echo "configure:4975: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5006,7 +5007,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5010: checking for $ac_word" >&5 +echo "configure:5011: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5038,7 +5039,7 @@ else fi cat > conftest.$ac_ext <<EOF -#line 5042 "configure" +#line 5043 "configure" #include "confdefs.h" int main() { @@ -5046,7 +5047,7 @@ extern int _nl_msg_cat_cntr; return _nl_msg_cat_cntr ; return 0; } EOF -if { (eval echo configure:5050: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5051: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* CATOBJEXT=.gmo DATADIRNAME=share @@ -5078,7 +5079,7 @@ fi # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5082: checking for $ac_word" >&5 +echo "configure:5083: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5112,7 +5113,7 @@ fi # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5116: checking for $ac_word" >&5 +echo "configure:5117: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5148,7 +5149,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5152: checking for $ac_word" >&5 +echo "configure:5153: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5238,7 +5239,7 @@ fi LINGUAS= else echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6 -echo "configure:5242: checking for catalogs to be installed" >&5 +echo "configure:5243: checking for catalogs to be installed" >&5 NEW_LINGUAS= for lang in ${LINGUAS=$ALL_LINGUAS}; do case "$ALL_LINGUAS" in @@ -5266,17 +5267,17 @@ echo "configure:5242: checking for catalogs to be installed" >&5 if test "$CATOBJEXT" = ".cat"; then ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6 -echo "configure:5270: checking for linux/version.h" >&5 +echo "configure:5271: checking for linux/version.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5275 "configure" +#line 5276 "configure" #include "confdefs.h" #include <linux/version.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:5280: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:5281: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -5339,7 +5340,7 @@ fi echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 -echo "configure:5343: checking whether to enable maintainer-specific portions of Makefiles" >&5 +echo "configure:5344: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" @@ -5364,7 +5365,7 @@ fi echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:5368: checking for executable suffix" >&5 +echo "configure:5369: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5374,7 +5375,7 @@ else rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= - if { (eval echo configure:5378: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + if { (eval echo configure:5379: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in *.c | *.o | *.obj) ;; @@ -5399,17 +5400,17 @@ for ac_hdr in string.h stdlib.h memory.h strings.h unistd.h stdarg.h varargs.h e do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:5403: checking for $ac_hdr" >&5 +echo "configure:5404: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5408 "configure" +#line 5409 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:5413: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:5414: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -5439,7 +5440,7 @@ done # Put this here so that autoconf's "cross-compiling" message doesn't confuse # people who are not cross-compiling but are compiling cross-assemblers. echo $ac_n "checking whether compiling a cross-assembler""... $ac_c" 1>&6 -echo "configure:5443: checking whether compiling a cross-assembler" >&5 +echo "configure:5444: checking whether compiling a cross-assembler" >&5 if test "${host}" = "${target}"; then cross_gas=no else @@ -5454,19 +5455,19 @@ echo "$ac_t""$cross_gas" 1>&6 # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:5458: checking for working alloca.h" >&5 +echo "configure:5459: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5463 "configure" +#line 5464 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:5470: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5471: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -5487,12 +5488,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:5491: checking for alloca" >&5 +echo "configure:5492: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5496 "configure" +#line 5497 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -5520,7 +5521,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:5524: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5525: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -5552,12 +5553,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:5556: checking whether alloca needs Cray hooks" >&5 +echo "configure:5557: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5561 "configure" +#line 5562 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -5582,12 +5583,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5586: checking for $ac_func" >&5 +echo "configure:5587: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5591 "configure" +#line 5592 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -5610,7 +5611,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:5614: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5615: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5637,7 +5638,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:5641: checking stack direction for C alloca" >&5 +echo "configure:5642: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5645,7 +5646,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 5649 "configure" +#line 5650 "configure" #include "confdefs.h" find_stack_direction () { @@ -5664,7 +5665,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:5668: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:5669: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -5686,21 +5687,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:5690: checking for inline" >&5 +echo "configure:5691: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <<EOF -#line 5697 "configure" +#line 5698 "configure" #include "confdefs.h" int main() { } $ac_kw foo() { ; return 0; } EOF -if { (eval echo configure:5704: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:5705: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -5730,12 +5731,12 @@ esac for ac_func in unlink remove do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5734: checking for $ac_func" >&5 +echo "configure:5735: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5739 "configure" +#line 5740 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -5758,7 +5759,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:5762: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5763: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5787,12 +5788,12 @@ done for ac_func in sbrk do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5791: checking for $ac_func" >&5 +echo "configure:5792: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5796 "configure" +#line 5797 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -5815,7 +5816,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:5819: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5820: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5850,7 +5851,7 @@ case $host in ;; *-ncr-sysv4.3*) echo $ac_n "checking for _mwvalidcheckl in -lmw""... $ac_c" 1>&6 -echo "configure:5854: checking for _mwvalidcheckl in -lmw" >&5 +echo "configure:5855: checking for _mwvalidcheckl in -lmw" >&5 ac_lib_var=`echo mw'_'_mwvalidcheckl | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5858,7 +5859,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lmw $LIBS" cat > conftest.$ac_ext <<EOF -#line 5862 "configure" +#line 5863 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -5869,7 +5870,7 @@ int main() { _mwvalidcheckl() ; return 0; } EOF -if { (eval echo configure:5873: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5874: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5890,7 +5891,7 @@ else fi echo $ac_n "checking for main in -lm""... $ac_c" 1>&6 -echo "configure:5894: checking for main in -lm" >&5 +echo "configure:5895: checking for main in -lm" >&5 ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5898,14 +5899,14 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <<EOF -#line 5902 "configure" +#line 5903 "configure" #include "confdefs.h" int main() { main() ; return 0; } EOF -if { (eval echo configure:5909: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5910: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5928,7 +5929,7 @@ fi ;; *) echo $ac_n "checking for main in -lm""... $ac_c" 1>&6 -echo "configure:5932: checking for main in -lm" >&5 +echo "configure:5933: checking for main in -lm" >&5 ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5936,14 +5937,14 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <<EOF -#line 5940 "configure" +#line 5941 "configure" #include "confdefs.h" int main() { main() ; return 0; } EOF -if { (eval echo configure:5947: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5948: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5974,12 +5975,12 @@ esac # enough, but on some of those systems, the assert macro relies on requoting # working properly! echo $ac_n "checking for working assert macro""... $ac_c" 1>&6 -echo "configure:5978: checking for working assert macro" >&5 +echo "configure:5979: checking for working assert macro" >&5 if eval "test \"`echo '$''{'gas_cv_assert_ok'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 5983 "configure" +#line 5984 "configure" #include "confdefs.h" #include <assert.h> #include <stdio.h> @@ -5995,7 +5996,7 @@ assert (a == b ; return 0; } EOF -if { (eval echo configure:5999: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6000: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_assert_ok=yes else @@ -6036,12 +6037,12 @@ gas_test_headers=" " echo $ac_n "checking whether declaration is required for strstr""... $ac_c" 1>&6 -echo "configure:6040: checking whether declaration is required for strstr" >&5 +echo "configure:6041: checking whether declaration is required for strstr" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_strstr'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6045 "configure" +#line 6046 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -6052,7 +6053,7 @@ x = (f) strstr; ; return 0; } EOF -if { (eval echo configure:6056: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6057: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_strstr=no else @@ -6073,12 +6074,12 @@ fi echo $ac_n "checking whether declaration is required for malloc""... $ac_c" 1>&6 -echo "configure:6077: checking whether declaration is required for malloc" >&5 +echo "configure:6078: checking whether declaration is required for malloc" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_malloc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6082 "configure" +#line 6083 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -6089,7 +6090,7 @@ x = (f) malloc; ; return 0; } EOF -if { (eval echo configure:6093: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6094: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_malloc=no else @@ -6110,12 +6111,12 @@ fi echo $ac_n "checking whether declaration is required for free""... $ac_c" 1>&6 -echo "configure:6114: checking whether declaration is required for free" >&5 +echo "configure:6115: checking whether declaration is required for free" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_free'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6119 "configure" +#line 6120 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -6126,7 +6127,7 @@ x = (f) free; ; return 0; } EOF -if { (eval echo configure:6130: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6131: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_free=no else @@ -6147,12 +6148,12 @@ fi echo $ac_n "checking whether declaration is required for sbrk""... $ac_c" 1>&6 -echo "configure:6151: checking whether declaration is required for sbrk" >&5 +echo "configure:6152: checking whether declaration is required for sbrk" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_sbrk'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6156 "configure" +#line 6157 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -6163,7 +6164,7 @@ x = (f) sbrk; ; return 0; } EOF -if { (eval echo configure:6167: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6168: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_sbrk=no else @@ -6184,12 +6185,12 @@ fi echo $ac_n "checking whether declaration is required for environ""... $ac_c" 1>&6 -echo "configure:6188: checking whether declaration is required for environ" >&5 +echo "configure:6189: checking whether declaration is required for environ" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_environ'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6193 "configure" +#line 6194 "configure" #include "confdefs.h" $gas_test_headers int main() { @@ -6200,7 +6201,7 @@ x = (f) environ; ; return 0; } EOF -if { (eval echo configure:6204: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6205: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_environ=no else @@ -6224,12 +6225,12 @@ fi # for it? echo $ac_n "checking whether declaration is required for errno""... $ac_c" 1>&6 -echo "configure:6228: checking whether declaration is required for errno" >&5 +echo "configure:6229: checking whether declaration is required for errno" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_errno'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 6233 "configure" +#line 6234 "configure" #include "confdefs.h" #ifdef HAVE_ERRNO_H @@ -6244,7 +6245,7 @@ x = (f) errno; ; return 0; } EOF -if { (eval echo configure:6248: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6249: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_errno=no else diff --git a/gas/configure.in b/gas/configure.in index 7e7016d9ee..7098fec53e 100644 --- a/gas/configure.in +++ b/gas/configure.in @@ -461,6 +461,7 @@ changequote([,])dnl tic30-*-*aout*) fmt=aout bfd_gas=yes ;; tic30-*-*coff*) fmt=coff bfd_gas=yes ;; + tic4x-*-* | c4x-*-*) fmt=coff bfd_gas=yes ;; tic54x-*-* | c54x*-*-*) fmt=coff bfd_gas=yes need_libm=yes;; tic80-*-*) fmt=coff ;; diff --git a/include/ChangeLog b/include/ChangeLog index 39f18740bd..e018f1ec50 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,11 @@ +2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * coff/internal.h: Add new relocation types. + * coff/ti.h: Add file-header flags for tic4x code. + * dis-asm.h: Add standard disassembler for tic4x. + * opcode/tic4x.h: New file. + * coff/tic4x.h: New file + 2002-08-07 H.J. Lu <hjl@gnu.org> * bfdlink.h (bfd_link_info): Add allow_undefined_version. diff --git a/include/coff/internal.h b/include/coff/internal.h index 4babbd4de5..b9b6368f03 100644 --- a/include/coff/internal.h +++ b/include/coff/internal.h @@ -600,6 +600,7 @@ struct internal_reloc }; #define R_DIR16 1 +#define R_REL24 5 #define R_DIR32 6 #define R_IMAGEBASE 7 #define R_RELBYTE 15 @@ -608,12 +609,15 @@ struct internal_reloc #define R_PCRBYTE 18 #define R_PCRWORD 19 #define R_PCRLONG 20 +#define R_PCR24 21 #define R_IPRSHORT 24 #define R_IPRLONG 26 #define R_GETSEG 29 #define R_GETPA 30 #define R_TAGWORD 31 #define R_JUMPTARG 32 /* strange 29k 00xx00xx reloc */ +#define R_PARTLS16 32 +#define R_PARTMS8 33 #define R_PCR16L 128 #define R_PCR26L 129 diff --git a/include/coff/ti.h b/include/coff/ti.h index d98fc89bd1..0a59b226a3 100644 --- a/include/coff/ti.h +++ b/include/coff/ti.h @@ -118,6 +118,7 @@ struct external_filehdr #define F_RELFLG (0x0001) #define F_EXEC (0x0002) #define F_LNNO (0x0004) +#define F_VERS (0x0010) /* TMS320C4x code */ /* F_LSYMS needs to be redefined in your source file */ #define F_LSYMS_TICOFF (0x0010) /* normal COFF is 0x8 */ diff --git a/include/coff/tic4x.h b/include/coff/tic4x.h new file mode 100644 index 0000000000..03215fb531 --- /dev/null +++ b/include/coff/tic4x.h @@ -0,0 +1,46 @@ +/* TI COFF information for Texas Instruments TMS320C4X/C3X. + This file customizes the settings in coff/ti.h. + + Copyright 2002 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef COFF_TIC4X_H +#define COFF_TIC4X_H + +#define TIC4X_TARGET_ID 0x0093 +/* Octets per byte, as a power of two. */ +#define TI_TARGET_ID TIC4X_TARGET_ID +#define OCTETS_PER_BYTE_POWER 2 +/* Add to howto to get absolute/sect-relative version. */ +#define HOWTO_BANK 6 +#define TICOFF_TARGET_ARCH bfd_arch_tic4x +/* We use COFF2. */ +#define TICOFF_DEFAULT_MAGIC TICOFF2MAGIC + +#define TICOFF_TARGET_MACHINE_GET (FLAGS) \ + (((FLAGS) & F_VERS) ? bfd_mach_c4x : bfd_mach_c3x) + +#define TICOFF_TARGET_MACHINE_SET (FLAGSP, MACHINE) \ + do \ + { \ + if ((MACHINE) == bfd_mach_c4x) \ + *(FLAGSP) = F_VERS; \ + } \ + while (0) + +#include "coff/ti.h" + +#endif /* COFF_TIC4X_H */ diff --git a/include/dis-asm.h b/include/dis-asm.h index 84c436d4f1..0109068f3f 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -229,6 +229,7 @@ extern int print_insn_rs6000 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_s390 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_sh PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*)); +extern int print_insn_tic4x PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_tic54x PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_tic80 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*)); diff --git a/include/opcode/tic4x.h b/include/opcode/tic4x.h new file mode 100644 index 0000000000..68d186d1d0 --- /dev/null +++ b/include/opcode/tic4x.h @@ -0,0 +1,1338 @@ +/* Table of opcodes for the Texas Instruments TMS320C[34]X family. + + Copyright (c) 2002 Free Software Foundation. + + Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + + +/* FIXME: Only allow floating point registers for floating point + instructions. Use another field in the instruction table? + This field could also flag which instructions are valid for + which architectures... + e.g., OP_FP | OP_C40 or OP_C40_FP */ + +#define IS_CPU_C3X(v) ((v) == 30 || (v) == 31 || (v) == 32) +#define IS_CPU_C4X(v) ((v) == 0 || (v) == 40 || (v) == 44) + +/* Define some bitfield extraction/insertion macros. */ +#define EXTR(inst, m, l) ((inst) << (31 - (m)) >> (31 - ((m) - (l)))) +#define EXTRU(inst, m, l) EXTR ((unsigned long)(inst), (m), (l)) +#define EXTRS(inst, m, l) EXTR ((long)(inst), (m), (l)) +#define INSERTU(inst, val, m, l) (inst |= ((val) << (l))) +#define INSERTS(inst, val, m, l) INSERTU (inst, ((val) & ((1 << ((m) - (l) + 1)) - 1)), m, l) + +/* Define register numbers. */ +typedef enum + { + REG_R0, REG_R1, REG_R2, REG_R3, + REG_R4, REG_R5, REG_R6, REG_R7, + REG_AR0, REG_AR1, REG_AR2, REG_AR3, + REG_AR4, REG_AR5, REG_AR6, REG_AR7, + REG_DP, REG_IR0, REG_IR1, REG_BK, + REG_SP, REG_ST, REG_DIE, REG_IIE, + REG_IIF, REG_RS, REG_RE, REG_RC, + REG_R8, REG_R9, REG_R10, REG_R11, + REG_IVTP, REG_TVTP + } +c4x_reg_t; + +/* Note that the actual register numbers for IVTP is 0 and TVTP is 1. */ + +#define REG_IE REG_DIE /* C3x only */ +#define REG_IF REG_IIE /* C3x only */ +#define REG_IOF REG_IIF /* C3x only */ + +#define C3X_REG_MAX REG_RC +#define C4X_REG_MAX REG_TVTP + +/* Register table size including C4x expansion regs. */ +#define REG_TABLE_SIZE (C4X_REG_MAX + 1) + +struct c4x_register +{ + char * name; + unsigned long regno; +}; + +typedef struct c4x_register c4x_register_t; + +/* We could store register synonyms here. */ +static const c4x_register_t c3x_registers[] = +{ + {"f0", REG_R0}, + {"r0", REG_R0}, + {"f1", REG_R1}, + {"r1", REG_R1}, + {"f2", REG_R2}, + {"r2", REG_R2}, + {"f3", REG_R3}, + {"r3", REG_R3}, + {"f4", REG_R4}, + {"r4", REG_R4}, + {"f5", REG_R5}, + {"r5", REG_R5}, + {"f6", REG_R6}, + {"r6", REG_R6}, + {"f7", REG_R7}, + {"r7", REG_R7}, + {"ar0", REG_AR0}, + {"ar1", REG_AR1}, + {"ar2", REG_AR2}, + {"ar3", REG_AR3}, + {"ar4", REG_AR4}, + {"ar5", REG_AR5}, + {"ar6", REG_AR6}, + {"ar7", REG_AR7}, + {"dp", REG_DP}, + {"ir0", REG_IR0}, + {"ir1", REG_IR1}, + {"bk", REG_BK}, + {"sp", REG_SP}, + {"st", REG_ST}, + {"ie", REG_IE}, + {"if", REG_IF}, + {"iof", REG_IOF}, + {"rs", REG_RS}, + {"re", REG_RE}, + {"rc", REG_RC}, + {"", 0} +}; + +const unsigned int c3x_num_registers = (((sizeof c3x_registers) / (sizeof c3x_registers[0])) - 1); + +/* Define C4x registers in addition to C3x registers. */ +static const c4x_register_t c4x_registers[] = +{ + {"die", REG_DIE}, /* Clobbers C3x REG_IE */ + {"iie", REG_IIE}, /* Clobbers C3x REG_IF */ + {"iif", REG_IIF}, /* Clobbers C3x REG_IOF */ + {"f8", REG_R8}, + {"r8", REG_R8}, + {"f9", REG_R9}, + {"r9", REG_R9}, + {"f10", REG_R10}, + {"r10", REG_R10}, + {"f11", REG_R11}, + {"r11", REG_R11}, + {"ivtp", REG_IVTP}, + {"tvtp", REG_TVTP}, + {"", 0} +}; + +const unsigned int c4x_num_registers = (((sizeof c4x_registers) / (sizeof c4x_registers[0])) - 1); + +/* Instruction template. */ +struct c4x_inst +{ + char * name; + unsigned long opcode; + unsigned long opmask; + char * args; +}; + +typedef struct c4x_inst c4x_inst_t; + +/* B condition 16--20 + C condition 23--27 + , required arg follows + ; optional arg follows + General addressing modes + * indirect 0--15 + # direct (for ldp only) 0--15 + @ direct 0--15 + F short float immediate 0--15 + Q register 0--15 + R register 16--20 + S short int immediate 0--15 + D src and dst same reg + Three operand addressing modes + E register 0--7 + G register 8--15 + I indirect(short) 0--7 + J indirect(short) 8--15 + R register 16--20 + W short int (C4x) 0--7 + C indirect(short) (C4x) 0--7 + O indirect(short) (C4x) 8--15 + Parallel instruction addressing modes + E register 0--7 + G register 8--15 + I indirect(short) 0--7 + J indirect(short) 8--15 + K register 19--21 + L register 22--24 + M register (R2,R3) 22--22 + N register (R0,R1) 23--23 + Misc. addressing modes + A address register 22--24 + B unsigned integer 0--23 (absolute on C3x, relative on C4x) + P displacement (PC Rel) 0--15 + U unsigned integer 0--15 + V vector 0--4 (C4x 0--8) + T integer (C4x stik) 16--20 + Y address reg (C4x) 16--20 + X expansion reg (C4x) 0--4 + Z expansion reg (C4x) 16--20. */ + +#define C4X_OPERANDS_MAX 7 /* Max number of operands for an inst. */ +#define C4X_NAME_MAX 16 /* Max number of chars in parallel name. */ + +/* General (two) operand group. */ +#define G_F_r "F,R" +#define G_I_r "S,R" +#define G_L_r "U,R" +#define G_Q_r "*,R" +#define G_T_r "@,R" +#define G_r_r "Q;R" + +/* Three operand group (Type 1 with missing third operand). */ +#define T_rr_ "E,G" +#define T_rS_ "E,J" +#define T_Sr_ "I,G" +#define T_SS_ "I,J" + +/* Three operand group (Type 2 with missing third operand). */ +#define T_Jr_ "W,G" /* C4x only */ +#define T_rJ_ "G,W" /* C4x only (commutative insns only) */ +#define T_Rr_ "C,G" /* C4x only */ +#define T_rR_ "G,C" /* C4x only (commutative insns only) */ +#define T_JR_ "W,O" /* C4x only */ +#define T_RJ_ "O,W" /* C4x only (commutative insns only) */ +#define T_RR_ "C,O" /* C4x only */ + +/* Three operand group (Type 1). */ +#define T_rrr "E,G;R" +#define T_Srr "E,J,R" +#define T_rSr "I,G;R" +#define T_SSr "I,J,R" + +/* Three operand group (Type 2). */ +#define T_Jrr "W,G;R" /* C4x only */ +#define T_rJr "G,W,R" /* C4x only (commutative insns only) */ +#define T_Rrr "C,G;R" /* C4x only */ +#define T_rRr "G,C,R" /* C4x only (commutative insns only) */ +#define T_JRr "W,O,R" /* C4x only */ +#define T_RJr "O,W,R" /* C4x only (commutative insns only) */ +#define T_RRr "C,O,R" /* C4x only */ + +/* Parallel group (store || op). */ +#define Q_rS_rSr "H,J|K,I,L" +#define Q_rS_Sr "H,J|I,L" +#define Q_rS_Srr "H,J|I,K;L" + +/* Parallel group (op || store). */ +#define P_rSr_rS "K,I,L|H,J" +#define P_Srr_rS "I,K;L|H,J" +#define P_rS_rS "L,I|H,J" + +/* Parallel group (load || load). */ +#define P_Sr_Sr "I,L|J,K" +#define Q_Sr_Sr "J,K|I,L" + +/* Parallel group (store || store). */ +#define P_Sr_rS "I,L|H,J" +#define Q_rS_rS "H,J|L,I" + +/* Parallel group (multiply || add/sub). */ +#define P_SSr_rrr "I,J,N|H,K;M" /* 00 (User manual transposes I,J) */ +#define P_Srr_rSr "J,K;N|H,I,M" /* 01 */ +#define P_rSr_rSr "K,J,N|H,I,M" /* 01 */ +#define P_rrr_SSr "H,K;N|I,J,M" /* 10 (User manual transposes H,K) */ +#define P_Srr_Srr "J,K;N|I,H;M" /* 11 */ +#define P_rSr_Srr "K,J,N|I,H;M" /* 11 */ + +#define Q_rrr_SSr "H,K;M|I,J,N" /* 00 (User manual transposes I,J) */ +#define Q_rSr_Srr "H,I,M|J,K;N" /* 01 */ +#define Q_rSr_rSr "H,I,M|K,J,N" /* 01 */ +#define Q_SSr_rrr "I,J,M|H,K;N" /* 10 (User manual transposes H,K) */ +#define Q_Srr_Srr "I,H;M|J,K;N" /* 11 */ +#define Q_Srr_rSr "I,H;M|K,J,N" /* 11 */ + +/* Define c3x opcodes for assembler and disassembler. */ +static const c4x_inst_t c3x_insts[] = +{ + /* Put synonyms after the desired forms in table so that they get + overwritten in the lookup table. The disassembler will thus + print the `proper' mnemonics. Note that the disassembler + only decodes the 11 MSBs, so instructions like ldp @0x500 will + be printed as ldiu 5, dp. Note that with parallel instructions, + the second part is executed before the first part, unless + the sti1||sti2 form is used. We also allow sti2||sti1 + which is equivalent to the default sti||sti form. + + Put most common forms first to speed up assembler. + + FIXME: Add all the other parallel/load forms, like absf1_stf2 + Perhaps I should have used a few macros...especially with + all the bloat after adding the C4x opcodes...too late now! */ + + /* Parallel instructions. */ + { "absf_stf", 0xc8000000, 0xfe000000, P_Sr_rS }, + { "absi_sti", 0xca000000, 0xfe000000, P_Sr_rS }, + { "addf_mpyf", 0x80000000, 0xff000000, Q_rrr_SSr }, + { "addf_mpyf", 0x81000000, 0xff000000, Q_rSr_Srr }, + { "addf_mpyf", 0x81000000, 0xff000000, Q_rSr_rSr }, + { "addf_mpyf", 0x82000000, 0xff000000, Q_SSr_rrr }, + { "addf_mpyf", 0x83000000, 0xff000000, Q_Srr_Srr }, + { "addf_mpyf", 0x83000000, 0xff000000, Q_Srr_rSr }, + { "addf3_mpyf3", 0x80000000, 0xff000000, Q_rrr_SSr }, + { "addf3_mpyf3", 0x81000000, 0xff000000, Q_rSr_Srr }, + { "addf3_mpyf3", 0x81000000, 0xff000000, Q_rSr_rSr }, + { "addf3_mpyf3", 0x82000000, 0xff000000, Q_SSr_rrr }, + { "addf3_mpyf3", 0x83000000, 0xff000000, Q_Srr_Srr }, + { "addf3_mpyf3", 0x83000000, 0xff000000, Q_Srr_rSr }, + { "addf_stf", 0xcc000000, 0xfe000000, P_Srr_rS }, + { "addf_stf", 0xcc000000, 0xfe000000, P_rSr_rS }, + { "addf3_stf", 0xcc000000, 0xfe000000, P_Srr_rS }, + { "addf3_stf", 0xcc000000, 0xfe000000, P_rSr_rS }, + { "addi_mpyi", 0x88000000, 0xff000000, Q_rrr_SSr }, + { "addi_mpyi", 0x89000000, 0xff000000, Q_rSr_Srr }, + { "addi_mpyi", 0x89000000, 0xff000000, Q_rSr_rSr }, + { "addi_mpyi", 0x8a000000, 0xff000000, Q_SSr_rrr }, + { "addi_mpyi", 0x8b000000, 0xff000000, Q_Srr_Srr }, + { "addi3_mpyi3", 0x88000000, 0xff000000, Q_rrr_SSr }, + { "addi3_mpyi3", 0x89000000, 0xff000000, Q_rSr_Srr }, + { "addi3_mpyi3", 0x8a000000, 0xff000000, Q_SSr_rrr }, + { "addi3_mpyi3", 0x8b000000, 0xff000000, Q_Srr_Srr }, + { "addi3_mpyi3", 0x8b000000, 0xff000000, Q_Srr_rSr }, + { "addi_sti", 0xce000000, 0xfe000000, P_Srr_rS }, + { "addi_sti", 0xce000000, 0xfe000000, P_rSr_rS }, + { "addi3_sti", 0xce000000, 0xfe000000, P_Srr_rS }, + { "addi3_sti", 0xce000000, 0xfe000000, P_rSr_rS }, + { "and_sti", 0xd0000000, 0xfe000000, P_Srr_rS }, + { "and_sti", 0xd0000000, 0xfe000000, P_rSr_rS }, + { "and3_sti", 0xd0000000, 0xfe000000, P_Srr_rS }, + { "and3_sti", 0xd0000000, 0xfe000000, P_rSr_rS }, + { "ash_sti", 0xd2000000, 0xfe000000, P_rSr_rS }, + { "ash3_sti", 0xd2000000, 0xfe000000, P_rSr_rS }, + { "fix_sti", 0xd4000000, 0xfe000000, P_Sr_rS }, + { "float_stf", 0xd6000000, 0xfe000000, P_Sr_rS }, + { "ldf_ldf", 0xc4000000, 0xfe000000, P_Sr_Sr }, + { "ldf1_ldf2", 0xc4000000, 0xfe000000, Q_Sr_Sr }, /* synonym */ + { "ldf2_ldf1", 0xc4000000, 0xfe000000, P_Sr_Sr }, /* synonym */ + { "ldf_stf", 0xd8000000, 0xfe000000, P_Sr_rS }, + { "ldi_ldi", 0xc6000000, 0xfe000000, P_Sr_Sr }, + { "ldi1_ldi2", 0xc6000000, 0xfe000000, Q_Sr_Sr }, /* synonym */ + { "ldi2_ldi1", 0xc6000000, 0xfe000000, P_Sr_Sr }, /* synonym */ + { "ldi_sti", 0xda000000, 0xfe000000, P_Sr_rS }, + { "lsh_sti", 0xdc000000, 0xfe000000, P_rSr_rS }, + { "lsh3_sti", 0xdc000000, 0xfe000000, P_rSr_rS }, + { "mpyf_addf", 0x80000000, 0xff000000, P_SSr_rrr }, + { "mpyf_addf", 0x81000000, 0xff000000, P_Srr_rSr }, + { "mpyf_addf", 0x81000000, 0xff000000, P_rSr_rSr }, + { "mpyf_addf", 0x82000000, 0xff000000, P_rrr_SSr }, + { "mpyf_addf", 0x83000000, 0xff000000, P_Srr_Srr }, + { "mpyf_addf", 0x83000000, 0xff000000, P_rSr_Srr }, + { "mpyf3_addf3", 0x80000000, 0xff000000, P_SSr_rrr }, + { "mpyf3_addf3", 0x81000000, 0xff000000, P_Srr_rSr }, + { "mpyf3_addf3", 0x81000000, 0xff000000, P_rSr_rSr }, + { "mpyf3_addf3", 0x82000000, 0xff000000, P_rrr_SSr }, + { "mpyf3_addf3", 0x83000000, 0xff000000, P_Srr_Srr }, + { "mpyf3_addf3", 0x83000000, 0xff000000, P_rSr_Srr }, + { "mpyf_stf", 0xde000000, 0xfe000000, P_Srr_rS }, + { "mpyf_stf", 0xde000000, 0xfe000000, P_rSr_rS }, + { "mpyf3_stf", 0xde000000, 0xfe000000, P_Srr_rS }, + { "mpyf3_stf", 0xde000000, 0xfe000000, P_rSr_rS }, + { "mpyf_subf", 0x84000000, 0xff000000, P_SSr_rrr }, + { "mpyf_subf", 0x85000000, 0xff000000, P_Srr_rSr }, + { "mpyf_subf", 0x85000000, 0xff000000, P_rSr_rSr }, + { "mpyf_subf", 0x86000000, 0xff000000, P_rrr_SSr }, + { "mpyf_subf", 0x87000000, 0xff000000, P_Srr_Srr }, + { "mpyf_subf", 0x87000000, 0xff000000, P_rSr_Srr }, + { "mpyf3_subf3", 0x84000000, 0xff000000, P_SSr_rrr }, + { "mpyf3_subf3", 0x85000000, 0xff000000, P_Srr_rSr }, + { "mpyf3_subf3", 0x85000000, 0xff000000, P_rSr_rSr }, + { "mpyf3_subf3", 0x86000000, 0xff000000, P_rrr_SSr }, + { "mpyf3_subf3", 0x87000000, 0xff000000, P_Srr_Srr }, + { "mpyf3_subf3", 0x87000000, 0xff000000, P_rSr_Srr }, + { "mpyi_addi", 0x88000000, 0xff000000, P_SSr_rrr }, + { "mpyi_addi", 0x89000000, 0xff000000, P_Srr_rSr }, + { "mpyi_addi", 0x89000000, 0xff000000, P_rSr_rSr }, + { "mpyi_addi", 0x8a000000, 0xff000000, P_rrr_SSr }, + { "mpyi_addi", 0x8b000000, 0xff000000, P_Srr_Srr }, + { "mpyi_addi", 0x8b000000, 0xff000000, P_rSr_Srr }, + { "mpyi3_addi3", 0x88000000, 0xff000000, P_SSr_rrr }, + { "mpyi3_addi3", 0x89000000, 0xff000000, P_Srr_rSr }, + { "mpyi3_addi3", 0x89000000, 0xff000000, P_rSr_rSr }, + { "mpyi3_addi3", 0x8a000000, 0xff000000, P_rrr_SSr }, + { "mpyi3_addi3", 0x8b000000, 0xff000000, P_Srr_Srr }, + { "mpyi3_addi3", 0x8b000000, 0xff000000, P_rSr_Srr }, + { "mpyi_sti", 0xe0000000, 0xfe000000, P_Srr_rS }, + { "mpyi_sti", 0xe0000000, 0xfe000000, P_rSr_rS }, + { "mpyi3_sti", 0xe0000000, 0xfe000000, P_Srr_rS }, + { "mpyi3_sti", 0xe0000000, 0xfe000000, P_rSr_rS }, + { "mpyi_subi", 0x8c000000, 0xff000000, P_SSr_rrr }, + { "mpyi_subi", 0x8d000000, 0xff000000, P_Srr_rSr }, + { "mpyi_subi", 0x8d000000, 0xff000000, P_rSr_rSr }, + { "mpyi_subi", 0x8e000000, 0xff000000, P_rrr_SSr }, + { "mpyi_subi", 0x8f000000, 0xff000000, P_Srr_Srr }, + { "mpyi_subi", 0x8f000000, 0xff000000, P_rSr_Srr }, + { "mpyi3_subi3", 0x8c000000, 0xff000000, P_SSr_rrr }, + { "mpyi3_subi3", 0x8d000000, 0xff000000, P_Srr_rSr }, + { "mpyi3_subi3", 0x8d000000, 0xff000000, P_rSr_rSr }, + { "mpyi3_subi3", 0x8e000000, 0xff000000, P_rrr_SSr }, + { "mpyi3_subi3", 0x8f000000, 0xff000000, P_Srr_Srr }, + { "mpyi3_subi3", 0x8f000000, 0xff000000, P_rSr_Srr }, + { "negf_stf", 0xe2000000, 0xfe000000, P_Sr_rS }, + { "negi_sti", 0xe4000000, 0xfe000000, P_Sr_rS }, + { "not_sti", 0xe6000000, 0xfe000000, P_Sr_rS }, + { "or3_sti", 0xe8000000, 0xfe000000, P_Srr_rS }, + { "or3_sti", 0xe8000000, 0xfe000000, P_rSr_rS }, + { "stf_absf", 0xc8000000, 0xfe000000, Q_rS_Sr }, + { "stf_addf", 0xcc000000, 0xfe000000, Q_rS_Srr }, + { "stf_addf", 0xcc000000, 0xfe000000, Q_rS_rSr }, + { "stf_addf3", 0xcc000000, 0xfe000000, Q_rS_Srr }, + { "stf_addf3", 0xcc000000, 0xfe000000, Q_rS_rSr }, + { "stf_float", 0xd6000000, 0xfe000000, Q_rS_Sr }, + { "stf_mpyf", 0xde000000, 0xfe000000, Q_rS_Srr }, + { "stf_mpyf", 0xde000000, 0xfe000000, Q_rS_rSr }, + { "stf_mpyf3", 0xde000000, 0xfe000000, Q_rS_Srr }, + { "stf_mpyf3", 0xde000000, 0xfe000000, Q_rS_rSr }, + { "stf_negf", 0xe2000000, 0xfe000000, Q_rS_Sr }, + { "stf_stf", 0xc0000000, 0xfe000000, P_rS_rS }, + { "stf1_stf2", 0xc0000000, 0xfe000000, Q_rS_rS }, /* synonym */ + { "stf2_stf1", 0xc0000000, 0xfe000000, P_rS_rS }, /* synonym */ + { "stf_subf", 0xea000000, 0xfe000000, Q_rS_rSr }, + { "stf_subf3", 0xea000000, 0xfe000000, Q_rS_rSr }, + { "sti_absi", 0xca000000, 0xfe000000, Q_rS_Sr }, + { "sti_addi", 0xce000000, 0xfe000000, Q_rS_Srr }, + { "sti_addi", 0xce000000, 0xfe000000, Q_rS_rSr }, + { "sti_addi3", 0xce000000, 0xfe000000, Q_rS_Srr }, + { "sti_addi3", 0xce000000, 0xfe000000, Q_rS_rSr }, + { "sti_and", 0xd0000000, 0xfe000000, Q_rS_Srr }, + { "sti_and", 0xd0000000, 0xfe000000, Q_rS_rSr }, + { "sti_and3", 0xd0000000, 0xfe000000, Q_rS_Srr }, + { "sti_and3", 0xd0000000, 0xfe000000, Q_rS_rSr }, + { "sti_ash3", 0xd2000000, 0xfe000000, Q_rS_rSr }, + { "sti_fix", 0xd4000000, 0xfe000000, Q_rS_Sr }, + { "sti_ldi", 0xda000000, 0xfe000000, Q_rS_Sr }, + { "sti_lsh", 0xdc000000, 0xfe000000, Q_rS_rSr }, + { "sti_lsh3", 0xdc000000, 0xfe000000, Q_rS_rSr }, + { "sti_mpyi", 0xe0000000, 0xfe000000, Q_rS_Srr }, + { "sti_mpyi", 0xe0000000, 0xfe000000, Q_rS_rSr }, + { "sti_mpyi3", 0xe0000000, 0xfe000000, Q_rS_Srr }, + { "sti_mpyi3", 0xe0000000, 0xfe000000, Q_rS_rSr }, + { "sti_negi", 0xe4000000, 0xfe000000, Q_rS_Sr }, + { "sti_not", 0xe6000000, 0xfe000000, Q_rS_Sr }, + { "sti_or", 0xe8000000, 0xfe000000, Q_rS_Srr }, + { "sti_or", 0xe8000000, 0xfe000000, Q_rS_rSr }, + { "sti_or3", 0xe8000000, 0xfe000000, Q_rS_Srr }, + { "sti_or3", 0xe8000000, 0xfe000000, Q_rS_rSr }, + { "sti_sti", 0xc2000000, 0xfe000000, P_rS_rS }, + { "sti1_sti2", 0xc2000000, 0xfe000000, Q_rS_rS }, /* synonym */ + { "sti2_sti1", 0xc2000000, 0xfe000000, P_rS_rS }, /* synonym */ + { "sti_subi", 0xec000000, 0xfe000000, Q_rS_rSr }, + { "sti_subi3", 0xec000000, 0xfe000000, Q_rS_rSr }, + { "sti_xor", 0xee000000, 0xfe000000, Q_rS_Srr }, + { "sti_xor", 0xee000000, 0xfe000000, Q_rS_rSr }, + { "sti_xor3", 0xee000000, 0xfe000000, Q_rS_Srr }, + { "sti_xor3", 0xee000000, 0xfe000000, Q_rS_rSr }, + { "subf_mpyf", 0x84000000, 0xff000000, Q_rrr_SSr }, + { "subf_mpyf", 0x85000000, 0xff000000, Q_rSr_Srr }, + { "subf_mpyf", 0x85000000, 0xff000000, Q_rSr_rSr }, + { "subf_mpyf", 0x86000000, 0xff000000, Q_SSr_rrr }, + { "subf_mpyf", 0x87000000, 0xff000000, Q_Srr_Srr }, + { "subf_mpyf", 0x87000000, 0xff000000, Q_Srr_rSr }, + { "subf3_mpyf3", 0x84000000, 0xff000000, Q_rrr_SSr }, + { "subf3_mpyf3", 0x85000000, 0xff000000, Q_rSr_Srr }, + { "subf3_mpyf3", 0x85000000, 0xff000000, Q_rSr_rSr }, + { "subf3_mpyf3", 0x86000000, 0xff000000, Q_SSr_rrr }, + { "subf3_mpyf3", 0x87000000, 0xff000000, Q_Srr_Srr }, + { "subf3_mpyf3", 0x87000000, 0xff000000, Q_Srr_rSr }, + { "subf_stf", 0xea000000, 0xfe000000, P_rSr_rS }, + { "subf3_stf", 0xea000000, 0xfe000000, P_rSr_rS }, + { "subi_mpyi", 0x8c000000, 0xff000000, Q_rrr_SSr }, + { "subi_mpyi", 0x8d000000, 0xff000000, Q_rSr_Srr }, + { "subi_mpyi", 0x8d000000, 0xff000000, Q_rSr_rSr }, + { "subi_mpyi", 0x8e000000, 0xff000000, Q_SSr_rrr }, + { "subi_mpyi", 0x8f000000, 0xff000000, Q_Srr_Srr }, + { "subi_mpyi", 0x8f000000, 0xff000000, Q_Srr_rSr }, + { "subi3_mpyi3", 0x8c000000, 0xff000000, Q_rrr_SSr }, + { "subi3_mpyi3", 0x8d000000, 0xff000000, Q_rSr_Srr }, + { "subi3_mpyi3", 0x8d000000, 0xff000000, Q_rSr_rSr }, + { "subi3_mpyi3", 0x8e000000, 0xff000000, Q_SSr_rrr }, + { "subi3_mpyi3", 0x8f000000, 0xff000000, Q_Srr_Srr }, + { "subi3_mpyi3", 0x8f000000, 0xff000000, Q_Srr_rSr }, + { "subi_sti", 0xec000000, 0xfe000000, P_rSr_rS }, + { "subi3_sti", 0xec000000, 0xfe000000, P_rSr_rS }, + { "xor_sti", 0xee000000, 0xfe000000, P_Srr_rS }, + { "xor_sti", 0xee000000, 0xfe000000, P_rSr_rS }, + { "xor3_sti", 0xee000000, 0xfe000000, P_Srr_rS }, + { "xor3_sti", 0xee000000, 0xfe000000, P_rSr_rS }, + + { "absf", 0x00000000, 0xffe00000, G_r_r }, + { "absf", 0x00200000, 0xffe00000, G_T_r }, + { "absf", 0x00400000, 0xffe00000, G_Q_r }, + { "absf", 0x00600000, 0xffe00000, G_F_r }, + { "absi", 0x00800000, 0xffe00000, G_r_r }, + { "absi", 0x00a00000, 0xffe00000, G_T_r }, + { "absi", 0x00c00000, 0xffe00000, G_Q_r }, + { "absi", 0x00e00000, 0xffe00000, G_I_r }, + { "addc", 0x01000000, 0xffe00000, G_r_r }, + { "addc", 0x01200000, 0xffe00000, G_T_r }, + { "addc", 0x01400000, 0xffe00000, G_Q_r }, + { "addc", 0x01600000, 0xffe00000, G_I_r }, + { "addc", 0x20000000, 0xffe00000, T_rrr }, + { "addc", 0x20200000, 0xffe00000, T_Srr }, + { "addc", 0x20400000, 0xffe00000, T_rSr }, + { "addc", 0x20600000, 0xffe00000, T_SSr }, + { "addc", 0x30000000, 0xffe00000, T_Jrr }, /* C4x */ + { "addc", 0x30000000, 0xffe00000, T_rJr }, /* C4x */ + { "addc", 0x30200000, 0xffe00000, T_rRr }, /* C4x */ + { "addc", 0x30200000, 0xffe00000, T_Rrr }, /* C4x */ + { "addc", 0x30400000, 0xffe00000, T_JRr }, /* C4x */ + { "addc", 0x30400000, 0xffe00000, T_RJr }, /* C4x */ + { "addc", 0x30600000, 0xffe00000, T_RRr }, /* C4x */ + { "addc3", 0x20000000, 0xffe00000, T_rrr }, + { "addc3", 0x20200000, 0xffe00000, T_Srr }, + { "addc3", 0x20400000, 0xffe00000, T_rSr }, + { "addc3", 0x20600000, 0xffe00000, T_SSr }, + { "addc3", 0x30000000, 0xffe00000, T_Jrr }, /* C4x */ + { "addc3", 0x30000000, 0xffe00000, T_rJr }, /* C4x */ + { "addc3", 0x30200000, 0xffe00000, T_rRr }, /* C4x */ + { "addc3", 0x30200000, 0xffe00000, T_Rrr }, /* C4x */ + { "addc3", 0x30400000, 0xffe00000, T_JRr }, /* C4x */ + { "addc3", 0x30400000, 0xffe00000, T_RJr }, /* C4x */ + { "addc3", 0x30600000, 0xffe00000, T_RRr }, /* C4x */ + { "addf", 0x01800000, 0xffe00000, G_r_r }, + { "addf", 0x01a00000, 0xffe00000, G_T_r }, + { "addf", 0x01c00000, 0xffe00000, G_Q_r }, + { "addf", 0x01e00000, 0xffe00000, G_F_r }, + { "addf", 0x20800000, 0xffe00000, T_rrr }, + { "addf", 0x20a00000, 0xffe00000, T_Srr }, + { "addf", 0x20c00000, 0xffe00000, T_rSr }, + { "addf", 0x20e00000, 0xffe00000, T_SSr }, + { "addf", 0x30800000, 0xffe00000, T_Jrr }, /* C4x */ + { "addf", 0x30800000, 0xffe00000, T_rJr }, /* C4x */ + { "addf", 0x30a00000, 0xffe00000, T_rRr }, /* C4x */ + { "addf", 0x30a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "addf", 0x30c00000, 0xffe00000, T_JRr }, /* C4x */ + { "addf", 0x30c00000, 0xffe00000, T_RJr }, /* C4x */ + { "addf", 0x30e00000, 0xffe00000, T_RRr }, /* C4x */ + { "addf3", 0x20800000, 0xffe00000, T_rrr }, + { "addf3", 0x20a00000, 0xffe00000, T_Srr }, + { "addf3", 0x20c00000, 0xffe00000, T_rSr }, + { "addf3", 0x20e00000, 0xffe00000, T_SSr }, + { "addf3", 0x30800000, 0xffe00000, T_Jrr }, /* C4x */ + { "addf3", 0x30800000, 0xffe00000, T_rJr }, /* C4x */ + { "addf3", 0x30a00000, 0xffe00000, T_rRr }, /* C4x */ + { "addf3", 0x30a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "addf3", 0x30c00000, 0xffe00000, T_JRr }, /* C4x */ + { "addf3", 0x30c00000, 0xffe00000, T_RJr }, /* C4x */ + { "addf3", 0x30e00000, 0xffe00000, T_RRr }, /* C4x */ + { "addi", 0x02000000, 0xffe00000, G_r_r }, + { "addi", 0x02200000, 0xffe00000, G_T_r }, + { "addi", 0x02400000, 0xffe00000, G_Q_r }, + { "addi", 0x02600000, 0xffe00000, G_I_r }, + { "addi", 0x21000000, 0xffe00000, T_rrr }, + { "addi", 0x21200000, 0xffe00000, T_Srr }, + { "addi", 0x21400000, 0xffe00000, T_rSr }, + { "addi", 0x21600000, 0xffe00000, T_SSr }, + { "addi", 0x31000000, 0xffe00000, T_Jrr }, /* C4x */ + { "addi", 0x31000000, 0xffe00000, T_rJr }, /* C4x */ + { "addi", 0x31200000, 0xffe00000, T_rRr }, /* C4x */ + { "addi", 0x31200000, 0xffe00000, T_Rrr }, /* C4x */ + { "addi", 0x31400000, 0xffe00000, T_JRr }, /* C4x */ + { "addi", 0x31400000, 0xffe00000, T_RJr }, /* C4x */ + { "addi", 0x31600000, 0xffe00000, T_RRr }, /* C4x */ + { "addi3", 0x21000000, 0xffe00000, T_rrr }, + { "addi3", 0x21200000, 0xffe00000, T_Srr }, + { "addi3", 0x21400000, 0xffe00000, T_rSr }, + { "addi3", 0x21600000, 0xffe00000, T_SSr }, + { "addi3", 0x31000000, 0xffe00000, T_Jrr }, /* C4x */ + { "addi3", 0x31000000, 0xffe00000, T_rJr }, /* C4x */ + { "addi3", 0x31200000, 0xffe00000, T_rRr }, /* C4x */ + { "addi3", 0x31200000, 0xffe00000, T_Rrr }, /* C4x */ + { "addi3", 0x31400000, 0xffe00000, T_JRr }, /* C4x */ + { "addi3", 0x31400000, 0xffe00000, T_RJr }, /* C4x */ + { "addi3", 0x31600000, 0xffe00000, T_RRr }, /* C4x */ + { "and", 0x02800000, 0xffe00000, G_r_r }, + { "and", 0x02a00000, 0xffe00000, G_T_r }, + { "and", 0x02c00000, 0xffe00000, G_Q_r }, + { "and", 0x02e00000, 0xffe00000, G_L_r }, + { "and", 0x21800000, 0xffe00000, T_rrr }, + { "and", 0x21a00000, 0xffe00000, T_Srr }, + { "and", 0x21c00000, 0xffe00000, T_rSr }, + { "and", 0x21e00000, 0xffe00000, T_SSr }, + { "and", 0x31800000, 0xffe00000, T_Jrr }, /* C4x */ + { "and", 0x31800000, 0xffe00000, T_rJr }, /* C4x */ + { "and", 0x31a00000, 0xffe00000, T_rRr }, /* C4x */ + { "and", 0x31a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "and", 0x31c00000, 0xffe00000, T_JRr }, /* C4x */ + { "and", 0x31c00000, 0xffe00000, T_RJr }, /* C4x */ + { "and", 0x31e00000, 0xffe00000, T_RRr }, /* C4x */ + { "and3", 0x21800000, 0xffe00000, T_rrr }, + { "and3", 0x21a00000, 0xffe00000, T_Srr }, + { "and3", 0x21c00000, 0xffe00000, T_rSr }, + { "and3", 0x21e00000, 0xffe00000, T_SSr }, + { "and3", 0x31800000, 0xffe00000, T_Jrr }, /* C4x */ + { "and3", 0x31800000, 0xffe00000, T_rJr }, /* C4x */ + { "and3", 0x31a00000, 0xffe00000, T_rRr }, /* C4x */ + { "and3", 0x31a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "and3", 0x31c00000, 0xffe00000, T_JRr }, /* C4x */ + { "and3", 0x31c00000, 0xffe00000, T_RJr }, /* C4x */ + { "and3", 0x31e00000, 0xffe00000, T_RRr }, /* C4x */ + { "andn", 0x03000000, 0xffe00000, G_r_r }, + { "andn", 0x03200000, 0xffe00000, G_T_r }, + { "andn", 0x03400000, 0xffe00000, G_Q_r }, + { "andn", 0x03600000, 0xffe00000, G_L_r }, + { "andn", 0x22000000, 0xffe00000, T_rrr }, + { "andn", 0x22200000, 0xffe00000, T_Srr }, + { "andn", 0x22400000, 0xffe00000, T_rSr }, + { "andn", 0x22600000, 0xffe00000, T_SSr }, + { "andn", 0x32000000, 0xffe00000, T_Jrr }, /* C4x */ + { "andn", 0x32200000, 0xffe00000, T_Rrr }, /* C4x */ + { "andn", 0x32400000, 0xffe00000, T_JRr }, /* C4x */ + { "andn", 0x32600000, 0xffe00000, T_RRr }, /* C4x */ + { "andn3", 0x22000000, 0xffe00000, T_rrr }, + { "andn3", 0x22200000, 0xffe00000, T_Srr }, + { "andn3", 0x22400000, 0xffe00000, T_rSr }, + { "andn3", 0x22600000, 0xffe00000, T_SSr }, + { "andn3", 0x32000000, 0xffe00000, T_Jrr }, /* C4x */ + { "andn3", 0x32200000, 0xffe00000, T_Rrr }, /* C4x */ + { "andn3", 0x32400000, 0xffe00000, T_JRr }, /* C4x */ + { "andn3", 0x32600000, 0xffe00000, T_RRr }, /* C4x */ + { "ash", 0x03800000, 0xffe00000, G_r_r }, + { "ash", 0x03a00000, 0xffe00000, G_T_r }, + { "ash", 0x03c00000, 0xffe00000, G_Q_r }, + { "ash", 0x03e00000, 0xffe00000, G_I_r }, + { "ash", 0x22800000, 0xffe00000, T_rrr }, + { "ash", 0x22a00000, 0xffe00000, T_Srr }, + { "ash", 0x22c00000, 0xffe00000, T_rSr }, + { "ash", 0x22e00000, 0xffe00000, T_SSr }, + { "ash", 0x32800000, 0xffe00000, T_Jrr }, /* C4x */ + { "ash", 0x32a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "ash", 0x32c00000, 0xffe00000, T_JRr }, /* C4x */ + { "ash", 0x32e00000, 0xffe00000, T_RRr }, /* C4x */ + { "ash3", 0x22800000, 0xffe00000, T_rrr }, + { "ash3", 0x22a00000, 0xffe00000, T_Srr }, + { "ash3", 0x22c00000, 0xffe00000, T_rSr }, + { "ash3", 0x22e00000, 0xffe00000, T_SSr }, + { "ash3", 0x32800000, 0xffe00000, T_Jrr }, /* C4x */ + { "ash3", 0x32a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "ash3", 0x32c00000, 0xffe00000, T_JRr }, /* C4x */ + { "ash3", 0x32e00000, 0xffe00000, T_RRr }, /* C4x */ + { "bB", 0x68000000, 0xffe00000, "Q" }, + { "bB", 0x6a000000, 0xffe00000, "P" }, + { "b", 0x68000000, 0xffe00000, "Q" }, /* synonym for bu */ + { "b", 0x6a000000, 0xffe00000, "P" }, /* synonym for bu */ + { "bBd", 0x68200000, 0xffe00000, "Q" }, + { "bBd", 0x6a200000, 0xffe00000, "P" }, + { "bd", 0x68200000, 0xffe00000, "Q" }, /* synonym for bud */ + { "bd", 0x6a200000, 0xffe00000, "P" }, /* synonym for bud */ + { "br", 0x60000000, 0xff000000, "B" }, + { "brd", 0x61000000, 0xff000000, "B" }, + { "call", 0x62000000, 0xff000000, "B" }, + { "callB", 0x70000000, 0xffe00000, "Q" }, + { "callB", 0x72000000, 0xffe00000, "P" }, + { "cmpf", 0x04000000, 0xffe00000, G_r_r }, + { "cmpf", 0x04200000, 0xffe00000, G_T_r }, + { "cmpf", 0x04400000, 0xffe00000, G_Q_r }, + { "cmpf", 0x04600000, 0xffe00000, G_F_r }, + { "cmpf", 0x23000000, 0xffe00000, T_rr_ }, + { "cmpf", 0x23200000, 0xffe00000, T_rS_ }, + { "cmpf", 0x23400000, 0xffe00000, T_Sr_ }, + { "cmpf", 0x23600000, 0xffe00000, T_SS_ }, + { "cmpf", 0x33200000, 0xffe00000, T_Rr_ }, /* C4x */ + { "cmpf", 0x33600000, 0xffe00000, T_RR_ }, /* C4x */ + { "cmpf3", 0x23000000, 0xffe00000, T_rr_ }, + { "cmpf3", 0x23200000, 0xffe00000, T_rS_ }, + { "cmpf3", 0x23400000, 0xffe00000, T_Sr_ }, + { "cmpf3", 0x23600000, 0xffe00000, T_SS_ }, + { "cmpf3", 0x33200000, 0xffe00000, T_Rr_ }, /* C4x */ + { "cmpf3", 0x33600000, 0xffe00000, T_RR_ }, /* C4x */ + { "cmpi", 0x04800000, 0xffe00000, G_r_r }, + { "cmpi", 0x04a00000, 0xffe00000, G_T_r }, + { "cmpi", 0x04c00000, 0xffe00000, G_Q_r }, + { "cmpi", 0x04e00000, 0xffe00000, G_I_r }, + { "cmpi", 0x23800000, 0xffe00000, T_rr_ }, + { "cmpi", 0x23a00000, 0xffe00000, T_rS_ }, + { "cmpi", 0x23c00000, 0xffe00000, T_Sr_ }, + { "cmpi", 0x23e00000, 0xffe00000, T_SS_ }, + { "cmpi", 0x33800000, 0xffe00000, T_Jr_ }, /* C4x */ + { "cmpi", 0x33a00000, 0xffe00000, T_Rr_ }, /* C4x */ + { "cmpi", 0x33c00000, 0xffe00000, T_JR_ }, /* C4x */ + { "cmpi", 0x33e00000, 0xffe00000, T_RR_ }, /* C4x */ + { "cmpi3", 0x23800000, 0xffe00000, T_rr_ }, + { "cmpi3", 0x23a00000, 0xffe00000, T_rS_ }, + { "cmpi3", 0x23c00000, 0xffe00000, T_Sr_ }, + { "cmpi3", 0x23e00000, 0xffe00000, T_SS_ }, + { "cmpi3", 0x33800000, 0xffe00000, T_Jr_ }, /* C4x */ + { "cmpi3", 0x33a00000, 0xffe00000, T_Rr_ }, /* C4x */ + { "cmpi3", 0x33c00000, 0xffe00000, T_JR_ }, /* C4x */ + { "cmpi3", 0x33e00000, 0xffe00000, T_RR_ }, /* C4x */ + { "dbB", 0x6c000000, 0xfe200000, "A,Q" }, + { "dbB", 0x6e000000, 0xfe200000, "A,P" }, + { "db", 0x6c000000, 0xfe200000, "A,Q" }, /* synonym for dbu */ + { "db", 0x6e000000, 0xfe200000, "A,P" }, /* synonym for dbu */ + { "dbBd", 0x6c200000, 0xfe200000, "A,Q" }, + { "dbBd", 0x6e200000, 0xfe200000, "A,P" }, + { "dbd", 0x6c200000, 0xfe200000, "A,Q" }, /* synonym for dbud */ + { "dbd", 0x6e200000, 0xfe200000, "A,P" }, /* synonym for dbud */ + { "fix", 0x05000000, 0xffe00000, G_r_r }, + { "fix", 0x05200000, 0xffe00000, G_T_r }, + { "fix", 0x05400000, 0xffe00000, G_Q_r }, + { "fix", 0x05600000, 0xffe00000, G_F_r }, + { "float", 0x05800000, 0xffe00000, G_r_r }, + { "float", 0x05a00000, 0xffe00000, G_T_r }, + { "float", 0x05c00000, 0xffe00000, G_Q_r }, + { "float", 0x05e00000, 0xffe00000, G_I_r }, + { "iack", 0x1b200000, 0xffe00000, "@" }, + { "iack", 0x1b400000, 0xffe00000, "*" }, + { "idle", 0x06000000, 0xffffffff, "" }, + { "lde", 0x06800000, 0xffe00000, G_r_r }, + { "lde", 0x06a00000, 0xffe00000, G_T_r }, + { "lde", 0x06c00000, 0xffe00000, G_Q_r }, + { "lde", 0x06e00000, 0xffe00000, G_F_r }, + { "ldf", 0x07000000, 0xffe00000, G_r_r }, + { "ldf", 0x07200000, 0xffe00000, G_T_r }, + { "ldf", 0x07400000, 0xffe00000, G_Q_r }, + { "ldf", 0x07600000, 0xffe00000, G_F_r }, + { "ldfC", 0x40000000, 0xf0600000, G_r_r }, + { "ldfC", 0x40200000, 0xf0600000, G_T_r }, + { "ldfC", 0x40400000, 0xf0600000, G_Q_r }, + { "ldfC", 0x40600000, 0xf0600000, G_F_r }, + { "ldfi", 0x07a00000, 0xffe00000, G_T_r }, + { "ldfi", 0x07c00000, 0xffe00000, G_Q_r }, + { "ldi", 0x08000000, 0xffe00000, G_r_r }, + { "ldi", 0x08200000, 0xffe00000, G_T_r }, + { "ldi", 0x08400000, 0xffe00000, G_Q_r }, + { "ldi", 0x08600000, 0xffe00000, G_I_r }, + { "ldiC", 0x50000000, 0xf0600000, G_r_r }, + { "ldiC", 0x50200000, 0xf0600000, G_T_r }, + { "ldiC", 0x50400000, 0xf0600000, G_Q_r }, + { "ldiC", 0x50600000, 0xf0600000, G_I_r }, + { "ldii", 0x08a00000, 0xffe00000, G_T_r }, + { "ldii", 0x08c00000, 0xffe00000, G_Q_r }, + { "ldp", 0x50700000, 0xffff0000, "#" }, /* synonym for ldiu #,dp */ + { "ldm", 0x09000000, 0xffe00000, G_r_r }, + { "ldm", 0x09200000, 0xffe00000, G_T_r }, + { "ldm", 0x09400000, 0xffe00000, G_Q_r }, + { "ldm", 0x09600000, 0xffe00000, G_F_r }, + { "lsh", 0x09800000, 0xffe00000, G_r_r }, + { "lsh", 0x09a00000, 0xffe00000, G_T_r }, + { "lsh", 0x09c00000, 0xffe00000, G_Q_r }, + { "lsh", 0x09e00000, 0xffe00000, G_I_r }, + { "lsh", 0x24000000, 0xffe00000, T_rrr }, + { "lsh", 0x24200000, 0xffe00000, T_Srr }, + { "lsh", 0x24400000, 0xffe00000, T_rSr }, + { "lsh", 0x24600000, 0xffe00000, T_SSr }, + { "lsh", 0x34000000, 0xffe00000, T_Jrr }, /* C4x */ + { "lsh", 0x34200000, 0xffe00000, T_Rrr }, /* C4x */ + { "lsh", 0x34400000, 0xffe00000, T_JRr }, /* C4x */ + { "lsh", 0x34600000, 0xffe00000, T_RRr }, /* C4x */ + { "lsh3", 0x24000000, 0xffe00000, T_rrr }, + { "lsh3", 0x24200000, 0xffe00000, T_Srr }, + { "lsh3", 0x24400000, 0xffe00000, T_rSr }, + { "lsh3", 0x24600000, 0xffe00000, T_SSr }, + { "lsh3", 0x34000000, 0xffe00000, T_Jrr }, /* C4x */ + { "lsh3", 0x34200000, 0xffe00000, T_Rrr }, /* C4x */ + { "lsh3", 0x34400000, 0xffe00000, T_JRr }, /* C4x */ + { "lsh3", 0x34600000, 0xffe00000, T_RRr }, /* C4x */ + { "mpyf", 0x0a000000, 0xffe00000, G_r_r }, + { "mpyf", 0x0a200000, 0xffe00000, G_T_r }, + { "mpyf", 0x0a400000, 0xffe00000, G_Q_r }, + { "mpyf", 0x0a600000, 0xffe00000, G_F_r }, + { "mpyf", 0x24800000, 0xffe00000, T_rrr }, + { "mpyf", 0x24a00000, 0xffe00000, T_Srr }, + { "mpyf", 0x24c00000, 0xffe00000, T_rSr }, + { "mpyf", 0x24e00000, 0xffe00000, T_SSr }, + { "mpyf", 0x34800000, 0xffe00000, T_Jrr }, /* C4x */ + { "mpyf", 0x34800000, 0xffe00000, T_rJr }, /* C4x */ + { "mpyf", 0x34a00000, 0xffe00000, T_rRr }, /* C4x */ + { "mpyf", 0x34a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "mpyf", 0x34c00000, 0xffe00000, T_JRr }, /* C4x */ + { "mpyf", 0x34c00000, 0xffe00000, T_RJr }, /* C4x */ + { "mpyf", 0x34e00000, 0xffe00000, T_RRr }, /* C4x */ + { "mpyf3", 0x24800000, 0xffe00000, T_rrr }, + { "mpyf3", 0x24a00000, 0xffe00000, T_Srr }, + { "mpyf3", 0x24c00000, 0xffe00000, T_rSr }, + { "mpyf3", 0x24e00000, 0xffe00000, T_SSr }, + { "mpyf3", 0x34800000, 0xffe00000, T_Jrr }, /* C4x */ + { "mpyf3", 0x34800000, 0xffe00000, T_rJr }, /* C4x */ + { "mpyf3", 0x34a00000, 0xffe00000, T_rRr }, /* C4x */ + { "mpyf3", 0x34a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "mpyf3", 0x34c00000, 0xffe00000, T_JRr }, /* C4x */ + { "mpyf3", 0x34c00000, 0xffe00000, T_RJr }, /* C4x */ + { "mpyf3", 0x34e00000, 0xffe00000, T_RRr }, /* C4x */ + { "mpyi", 0x0a800000, 0xffe00000, G_r_r }, + { "mpyi", 0x0aa00000, 0xffe00000, G_T_r }, + { "mpyi", 0x0ac00000, 0xffe00000, G_Q_r }, + { "mpyi", 0x0ae00000, 0xffe00000, G_I_r }, + { "mpyi", 0x25000000, 0xffe00000, T_rrr }, + { "mpyi", 0x25200000, 0xffe00000, T_Srr }, + { "mpyi", 0x25400000, 0xffe00000, T_rSr }, + { "mpyi", 0x25600000, 0xffe00000, T_SSr }, + { "mpyi", 0x35000000, 0xffe00000, T_Jrr }, /* C4x */ + { "mpyi", 0x35000000, 0xffe00000, T_rJr }, /* C4x */ + { "mpyi", 0x35200000, 0xffe00000, T_rRr }, /* C4x */ + { "mpyi", 0x35200000, 0xffe00000, T_Rrr }, /* C4x */ + { "mpyi", 0x35400000, 0xffe00000, T_JRr }, /* C4x */ + { "mpyi", 0x35400000, 0xffe00000, T_RJr }, /* C4x */ + { "mpyi", 0x35600000, 0xffe00000, T_RRr }, /* C4x */ + { "mpyi3", 0x25000000, 0xffe00000, T_rrr }, + { "mpyi3", 0x25200000, 0xffe00000, T_Srr }, + { "mpyi3", 0x25400000, 0xffe00000, T_rSr }, + { "mpyi3", 0x25600000, 0xffe00000, T_SSr }, + { "mpyi3", 0x35000000, 0xffe00000, T_Jrr }, /* C4x */ + { "mpyi3", 0x35000000, 0xffe00000, T_rJr }, /* C4x */ + { "mpyi3", 0x35200000, 0xffe00000, T_rRr }, /* C4x */ + { "mpyi3", 0x35200000, 0xffe00000, T_Rrr }, /* C4x */ + { "mpyi3", 0x35400000, 0xffe00000, T_JRr }, /* C4x */ + { "mpyi3", 0x35400000, 0xffe00000, T_RJr }, /* C4x */ + { "mpyi3", 0x35600000, 0xffe00000, T_RRr }, /* C4x */ + { "negb", 0x0b000000, 0xffe00000, G_r_r }, + { "negb", 0x0b200000, 0xffe00000, G_T_r }, + { "negb", 0x0b400000, 0xffe00000, G_Q_r }, + { "negb", 0x0b600000, 0xffe00000, G_I_r }, + { "negf", 0x0b800000, 0xffe00000, G_r_r }, + { "negf", 0x0ba00000, 0xffe00000, G_T_r }, + { "negf", 0x0bc00000, 0xffe00000, G_Q_r }, + { "negf", 0x0be00000, 0xffe00000, G_F_r }, + { "negi", 0x0c000000, 0xffe00000, G_r_r }, + { "negi", 0x0c200000, 0xffe00000, G_T_r }, + { "negi", 0x0c400000, 0xffe00000, G_Q_r }, + { "negi", 0x0c600000, 0xffe00000, G_I_r }, + { "nop", 0x0c800000, 0xffe00000, "Q" }, + { "nop", 0x0cc00000, 0xffe00000, "*" }, + { "nop", 0x0c800000, 0xffe00000, "" }, + { "norm", 0x0d000000, 0xffe00000, G_r_r }, + { "norm", 0x0d200000, 0xffe00000, G_T_r }, + { "norm", 0x0d400000, 0xffe00000, G_Q_r }, + { "norm", 0x0d600000, 0xffe00000, G_F_r }, + { "not", 0x0d800000, 0xffe00000, G_r_r }, + { "not", 0x0da00000, 0xffe00000, G_T_r }, + { "not", 0x0dc00000, 0xffe00000, G_Q_r }, + { "not", 0x0de00000, 0xffe00000, G_L_r }, + { "or", 0x10000000, 0xffe00000, G_r_r }, + { "or", 0x10200000, 0xffe00000, G_T_r }, + { "or", 0x10400000, 0xffe00000, G_Q_r }, + { "or", 0x10600000, 0xffe00000, G_L_r }, + { "or", 0x25800000, 0xffe00000, T_rrr }, + { "or", 0x25a00000, 0xffe00000, T_Srr }, + { "or", 0x25c00000, 0xffe00000, T_rSr }, + { "or", 0x25e00000, 0xffe00000, T_SSr }, + { "or", 0x35800000, 0xffe00000, T_Jrr }, /* C4x */ + { "or", 0x35800000, 0xffe00000, T_rJr }, /* C4x */ + { "or", 0x35a00000, 0xffe00000, T_rRr }, /* C4x */ + { "or", 0x35a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "or", 0x35c00000, 0xffe00000, T_JRr }, /* C4x */ + { "or", 0x35c00000, 0xffe00000, T_RJr }, /* C4x */ + { "or", 0x35e00000, 0xffe00000, T_RRr }, /* C4x */ + { "or3", 0x25800000, 0xffe00000, T_rrr }, + { "or3", 0x25a00000, 0xffe00000, T_Srr }, + { "or3", 0x25c00000, 0xffe00000, T_rSr }, + { "or3", 0x25e00000, 0xffe00000, T_SSr }, + { "or3", 0x35800000, 0xffe00000, T_Jrr }, /* C4x */ + { "or3", 0x35800000, 0xffe00000, T_rJr }, /* C4x */ + { "or3", 0x35a00000, 0xffe00000, T_rRr }, /* C4x */ + { "or3", 0x35a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "or3", 0x35c00000, 0xffe00000, T_JRr }, /* C4x */ + { "or3", 0x35c00000, 0xffe00000, T_RJr }, /* C4x */ + { "or3", 0x35e00000, 0xffe00000, T_RRr }, /* C4x */ + { "pop", 0x0e200000, 0xffe00000, "R" }, + { "popf", 0x0ea00000, 0xffe00000, "R" }, + { "push", 0x0f200000, 0xffe00000, "R" }, + { "pushf", 0x0fa00000, 0xffe00000, "R" }, + { "retiB", 0x78000000, 0xffe00000, "" }, + { "reti", 0x78000000, 0xffe00000, "" }, /* synonym for reti */ + { "retsB", 0x78800000, 0xffe00000, "" }, + { "rets", 0x78800000, 0xffe00000, "" }, /* synonym for rets */ + { "rnd", 0x11000000, 0xffe00000, G_r_r }, + { "rnd", 0x11200000, 0xffe00000, G_T_r }, + { "rnd", 0x11400000, 0xffe00000, G_Q_r }, + { "rnd", 0x11600000, 0xffe00000, G_F_r }, + { "rol", 0x11e00000, 0xffe00000, "R" }, + { "rolc", 0x12600000, 0xffe00000, "R" }, + { "ror", 0x12e00000, 0xffe00000, "R" }, + { "rorc", 0x13600000, 0xffe00000, "R" }, + { "rptb", 0x64000000, 0xff000000, "B" }, + { "rptb", 0x79000000, 0xff000000, "Q" }, /* C4x */ + { "rpts", 0x139b0000, 0xffff0000, "Q" }, + { "rpts", 0x13bb0000, 0xffff0000, "@" }, + { "rpts", 0x13db0000, 0xffff0000, "*" }, + { "rpts", 0x13fb0000, 0xffff0000, "U" }, + { "sigi", 0x16000000, 0xffe00000, "" }, /* C3x */ + { "sigi", 0x16200000, 0xffe00000, G_T_r }, /* C4x */ + { "sigi", 0x16400000, 0xffe00000, G_Q_r }, /* C4x */ + { "stf", 0x14200000, 0xffe00000, "R,@" }, + { "stf", 0x14400000, 0xffe00000, "R,*" }, + { "stfi", 0x14a00000, 0xffe00000, "R,@" }, + { "stfi", 0x14c00000, 0xffe00000, "R,*" }, + { "sti", 0x15000000, 0xffe00000, "T,@" }, /* C4x only */ + { "sti", 0x15200000, 0xffe00000, "R,@" }, + { "sti", 0x15400000, 0xffe00000, "R,*" }, + { "sti", 0x15600000, 0xffe00000, "T,*" }, /* C4x only */ + { "stii", 0x15a00000, 0xffe00000, "R,@" }, + { "stii", 0x15c00000, 0xffe00000, "R,*" }, + { "subb", 0x16800000, 0xffe00000, G_r_r }, + { "subb", 0x16a00000, 0xffe00000, G_T_r }, + { "subb", 0x16c00000, 0xffe00000, G_Q_r }, + { "subb", 0x16e00000, 0xffe00000, G_I_r }, + { "subb", 0x26000000, 0xffe00000, T_rrr }, + { "subb", 0x26200000, 0xffe00000, T_Srr }, + { "subb", 0x26400000, 0xffe00000, T_rSr }, + { "subb", 0x26600000, 0xffe00000, T_SSr }, + { "subb", 0x36000000, 0xffe00000, T_Jrr }, /* C4x */ + { "subb", 0x36200000, 0xffe00000, T_Rrr }, /* C4x */ + { "subb", 0x36400000, 0xffe00000, T_JRr }, /* C4x */ + { "subb", 0x36600000, 0xffe00000, T_RRr }, /* C4x */ + { "subb3", 0x26000000, 0xffe00000, T_rrr }, + { "subb3", 0x26200000, 0xffe00000, T_Srr }, + { "subb3", 0x26400000, 0xffe00000, T_rSr }, + { "subb3", 0x26600000, 0xffe00000, T_SSr }, + { "subb3", 0x36000000, 0xffe00000, T_Jrr }, /* C4x */ + { "subb3", 0x36200000, 0xffe00000, T_Rrr }, /* C4x */ + { "subb3", 0x36400000, 0xffe00000, T_JRr }, /* C4x */ + { "subb3", 0x36600000, 0xffe00000, T_RRr }, /* C4x */ + { "subc", 0x17000000, 0xffe00000, G_r_r }, + { "subc", 0x17200000, 0xffe00000, G_T_r }, + { "subc", 0x17400000, 0xffe00000, G_Q_r }, + { "subc", 0x17600000, 0xffe00000, G_I_r }, + { "subf", 0x17800000, 0xffe00000, G_r_r }, + { "subf", 0x17a00000, 0xffe00000, G_T_r }, + { "subf", 0x17c00000, 0xffe00000, G_Q_r }, + { "subf", 0x17e00000, 0xffe00000, G_F_r }, + { "subf", 0x26800000, 0xffe00000, T_rrr }, + { "subf", 0x26a00000, 0xffe00000, T_Srr }, + { "subf", 0x26c00000, 0xffe00000, T_rSr }, + { "subf", 0x26e00000, 0xffe00000, T_SSr }, + { "subf", 0x36800000, 0xffe00000, T_Jrr }, /* C4x */ + { "subf", 0x36a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "subf", 0x36c00000, 0xffe00000, T_JRr }, /* C4x */ + { "subf", 0x36e00000, 0xffe00000, T_RRr }, /* C4x */ + { "subf3", 0x26800000, 0xffe00000, T_rrr }, + { "subf3", 0x26a00000, 0xffe00000, T_Srr }, + { "subf3", 0x26c00000, 0xffe00000, T_rSr }, + { "subf3", 0x26e00000, 0xffe00000, T_SSr }, + { "subf3", 0x36800000, 0xffe00000, T_Jrr }, /* C4x */ + { "subf3", 0x36a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "subf3", 0x36c00000, 0xffe00000, T_JRr }, /* C4x */ + { "subf3", 0x36e00000, 0xffe00000, T_RRr }, /* C4x */ + { "subi", 0x18000000, 0xffe00000, G_r_r }, + { "subi", 0x18200000, 0xffe00000, G_T_r }, + { "subi", 0x18400000, 0xffe00000, G_Q_r }, + { "subi", 0x18600000, 0xffe00000, G_I_r }, + { "subi", 0x27000000, 0xffe00000, T_rrr }, + { "subi", 0x27200000, 0xffe00000, T_Srr }, + { "subi", 0x27400000, 0xffe00000, T_rSr }, + { "subi", 0x27600000, 0xffe00000, T_SSr }, + { "subi", 0x37000000, 0xffe00000, T_Jrr }, /* C4x */ + { "subi", 0x37200000, 0xffe00000, T_Rrr }, /* C4x */ + { "subi", 0x37400000, 0xffe00000, T_JRr }, /* C4x */ + { "subi", 0x37600000, 0xffe00000, T_RRr }, /* C4x */ + { "subi3", 0x27000000, 0xffe00000, T_rrr }, + { "subi3", 0x27200000, 0xffe00000, T_Srr }, + { "subi3", 0x27400000, 0xffe00000, T_rSr }, + { "subi3", 0x27600000, 0xffe00000, T_SSr }, + { "subi3", 0x37000000, 0xffe00000, T_Jrr }, /* C4x */ + { "subi3", 0x37200000, 0xffe00000, T_Rrr }, /* C4x */ + { "subi3", 0x37400000, 0xffe00000, T_JRr }, /* C4x */ + { "subi3", 0x37600000, 0xffe00000, T_RRr }, /* C4x */ + { "subrb", 0x18800000, 0xffe00000, G_r_r }, + { "subrb", 0x18a00000, 0xffe00000, G_T_r }, + { "subrb", 0x18c00000, 0xffe00000, G_Q_r }, + { "subrb", 0x18e00000, 0xffe00000, G_I_r }, + { "subrf", 0x19000000, 0xffe00000, G_r_r }, + { "subrf", 0x19200000, 0xffe00000, G_T_r }, + { "subrf", 0x19400000, 0xffe00000, G_Q_r }, + { "subrf", 0x19600000, 0xffe00000, G_F_r }, + { "subri", 0x19800000, 0xffe00000, G_r_r }, + { "subri", 0x19a00000, 0xffe00000, G_T_r }, + { "subri", 0x19c00000, 0xffe00000, G_Q_r }, + { "subri", 0x19e00000, 0xffe00000, G_I_r }, + { "swi", 0x66000000, 0xffffffff, "" }, + { "trapB", 0x74000000, 0xffe00000, "V" }, + { "trap", 0x74000000, 0xffe00000, "V" }, /* synonym for trapu */ + { "tstb", 0x1a000000, 0xffe00000, G_r_r }, + { "tstb", 0x1a200000, 0xffe00000, G_T_r }, + { "tstb", 0x1a400000, 0xffe00000, G_Q_r }, + { "tstb", 0x1a600000, 0xffe00000, G_L_r }, + { "tstb", 0x27800000, 0xffe00000, T_rr_ }, + { "tstb", 0x27a00000, 0xffe00000, T_rS_ }, + { "tstb", 0x27c00000, 0xffe00000, T_Sr_ }, + { "tstb", 0x27e00000, 0xffe00000, T_SS_ }, + { "tstb", 0x37800000, 0xffe00000, T_Jr_ }, /* C4x */ + { "tstb", 0x37800000, 0xffe00000, T_rJ_ }, /* C4x */ + { "tstb", 0x37a00000, 0xffe00000, T_rR_ }, /* C4x */ + { "tstb", 0x37a00000, 0xffe00000, T_Rr_ }, /* C4x */ + { "tstb", 0x37c00000, 0xffe00000, T_JR_ }, /* C4x */ + { "tstb", 0x37c00000, 0xffe00000, T_RJ_ }, /* C4x */ + { "tstb", 0x37e00000, 0xffe00000, T_RR_ }, /* C4x */ + { "tstb3", 0x27800000, 0xffe00000, T_rr_ }, + { "tstb3", 0x27a00000, 0xffe00000, T_rS_ }, + { "tstb3", 0x27c00000, 0xffe00000, T_Sr_ }, + { "tstb3", 0x27e00000, 0xffe00000, T_SS_ }, + { "tstb3", 0x37800000, 0xffe00000, T_Jr_ }, /* C4x */ + { "tstb3", 0x37800000, 0xffe00000, T_rJ_ }, /* C4x */ + { "tstb3", 0x37a00000, 0xffe00000, T_rR_ }, /* C4x */ + { "tstb3", 0x37a00000, 0xffe00000, T_Rr_ }, /* C4x */ + { "tstb3", 0x37c00000, 0xffe00000, T_JR_ }, /* C4x */ + { "tstb3", 0x37c00000, 0xffe00000, T_RJ_ }, /* C4x */ + { "tstb3", 0x37e00000, 0xffe00000, T_RR_ }, /* C4x */ + { "xor", 0x1a800000, 0xffe00000, G_r_r }, + { "xor", 0x1aa00000, 0xffe00000, G_T_r }, + { "xor", 0x1ac00000, 0xffe00000, G_Q_r }, + { "xor", 0x1ae00000, 0xffe00000, G_L_r }, + { "xor", 0x28000000, 0xffe00000, T_rrr }, + { "xor", 0x28200000, 0xffe00000, T_Srr }, + { "xor", 0x28400000, 0xffe00000, T_rSr }, + { "xor", 0x28600000, 0xffe00000, T_SSr }, + { "xor", 0x38000000, 0xffe00000, T_Jrr }, /* C4x */ + { "xor", 0x38000000, 0xffe00000, T_rJr }, /* C4x */ + { "xor", 0x38200000, 0xffe00000, T_rRr }, /* C4x */ + { "xor", 0x38200000, 0xffe00000, T_Rrr }, /* C4x */ + { "xor", 0x3c400000, 0xffe00000, T_JRr }, /* C4x */ + { "xor", 0x3c400000, 0xffe00000, T_RJr }, /* C4x */ + { "xor", 0x3c600000, 0xffe00000, T_RRr }, /* C4x */ + { "xor3", 0x28000000, 0xffe00000, T_rrr }, + { "xor3", 0x28200000, 0xffe00000, T_Srr }, + { "xor3", 0x28400000, 0xffe00000, T_rSr }, + { "xor3", 0x28600000, 0xffe00000, T_SSr }, + { "xor3", 0x38000000, 0xffe00000, T_Jrr }, /* C4x */ + { "xor3", 0x38000000, 0xffe00000, T_rJr }, /* C4x */ + { "xor3", 0x38200000, 0xffe00000, T_rRr }, /* C4x */ + { "xor3", 0x38200000, 0xffe00000, T_Rrr }, /* C4x */ + { "xor3", 0x3c400000, 0xffe00000, T_JRr }, /* C4x */ + { "xor3", 0x3c400000, 0xffe00000, T_RJr }, /* C4x */ + { "xor3", 0x3c600000, 0xffe00000, T_RRr }, /* C4x */ + + /* Dummy entry, not included in c3x_num_insts. This + lets code examine entry i + 1 without checking + if we've run off the end of the table. */ + { "", 0x0, 0x00, "" } +}; + +const unsigned int c3x_num_insts = (((sizeof c3x_insts) / (sizeof c3x_insts[0])) - 1); + +/* Define c4x additional opcodes for assembler and disassembler. */ +static const c4x_inst_t c4x_insts[] = +{ + /* Parallel instructions. */ + { "frieee_stf", 0xf2000000, 0xfe000000, P_Sr_rS }, + { "toieee_stf", 0xf0000000, 0xfe000000, P_Sr_rS }, + + { "bBaf", 0x68a00000, 0xffe00000, "Q" }, + { "bBaf", 0x6aa00000, 0xffe00000, "P" }, + { "baf", 0x68a00000, 0xffe00000, "Q" }, /* synonym for buaf */ + { "baf", 0x6aa00000, 0xffe00000, "P" }, /* synonym for buaf */ + { "bBat", 0x68600000, 0xffe00000, "Q" }, + { "bBat", 0x6a600000, 0xffe00000, "P" }, + { "bat", 0x68600000, 0xffe00000, "Q" }, /* synonym for buat */ + { "bat", 0x6a600000, 0xffe00000, "P" }, /* synonym for buat */ + { "laj", 0x63000000, 0xff000000, "B" }, + { "lajB", 0x70200000, 0xffe00000, "Q" }, + { "lajB", 0x72200000, 0xffe00000, "P" }, + { "latB", 0x74800000, 0xffe00000, "V" }, + + { "frieee", 0x1c000000, 0xffe00000, G_r_r }, + { "frieee", 0x1c200000, 0xffe00000, G_T_r }, + { "frieee", 0x1c400000, 0xffe00000, G_Q_r }, + { "frieee", 0x1c600000, 0xffe00000, G_F_r }, + + { "lb0", 0xb0000000, 0xffe00000, G_r_r }, + { "lb0", 0xb0200000, 0xffe00000, G_T_r }, + { "lb0", 0xb0400000, 0xffe00000, G_Q_r }, + { "lb0", 0xb0600000, 0xffe00000, G_I_r }, + { "lbu0", 0xb2000000, 0xffe00000, G_r_r }, + { "lbu0", 0xb2200000, 0xffe00000, G_T_r }, + { "lbu0", 0xb2400000, 0xffe00000, G_Q_r }, + { "lbu0", 0xb2600000, 0xffe00000, G_L_r }, + { "lb1", 0xb0800000, 0xffe00000, G_r_r }, + { "lb1", 0xb0a00000, 0xffe00000, G_T_r }, + { "lb1", 0xb0c00000, 0xffe00000, G_Q_r }, + { "lb1", 0xb0e00000, 0xffe00000, G_I_r }, + { "lbu1", 0xb2800000, 0xffe00000, G_r_r }, + { "lbu1", 0xb2a00000, 0xffe00000, G_T_r }, + { "lbu1", 0xb2c00000, 0xffe00000, G_Q_r }, + { "lbu1", 0xb2e00000, 0xffe00000, G_L_r }, + { "lb2", 0xb1000000, 0xffe00000, G_r_r }, + { "lb2", 0xb1200000, 0xffe00000, G_T_r }, + { "lb2", 0xb1400000, 0xffe00000, G_Q_r }, + { "lb2", 0xb1600000, 0xffe00000, G_I_r }, + { "lbu2", 0xb3000000, 0xffe00000, G_r_r }, + { "lbu2", 0xb3200000, 0xffe00000, G_T_r }, + { "lbu2", 0xb3400000, 0xffe00000, G_Q_r }, + { "lbu2", 0xb3600000, 0xffe00000, G_L_r }, + { "lb3", 0xb1800000, 0xffe00000, G_r_r }, + { "lb3", 0xb1a00000, 0xffe00000, G_T_r }, + { "lb3", 0xb1c00000, 0xffe00000, G_Q_r }, + { "lb3", 0xb1e00000, 0xffe00000, G_I_r }, + { "lbu3", 0xb3800000, 0xffe00000, G_r_r }, + { "lbu3", 0xb3a00000, 0xffe00000, G_T_r }, + { "lbu3", 0xb3c00000, 0xffe00000, G_Q_r }, + { "lbu3", 0xb3e00000, 0xffe00000, G_L_r }, + { "lda", 0x1e800000, 0xffe00000, "Q,Y" }, + { "lda", 0x1ea00000, 0xffe00000, "@,Y" }, + { "lda", 0x1ec00000, 0xffe00000, "*,Y" }, + { "lda", 0x1ee00000, 0xffe00000, "S,Y" }, + { "ldep", 0x76000000, 0xffe00000, "X,R" }, + { "ldhi", 0x1fe00000, 0xffe00000, G_L_r }, + { "ldhi", 0x1fe00000, 0xffe00000, "#,R" }, + { "ldpe", 0x76800000, 0xffe00000, "Q,Z" }, + { "ldpk", 0x1F700000, 0xffff0000, "#" }, + { "lh0", 0xba000000, 0xffe00000, G_r_r }, + { "lh0", 0xba200000, 0xffe00000, G_T_r }, + { "lh0", 0xba400000, 0xffe00000, G_Q_r }, + { "lh0", 0xba600000, 0xffe00000, G_I_r }, + { "lhu0", 0xbb000000, 0xffe00000, G_r_r }, + { "lhu0", 0xbb200000, 0xffe00000, G_T_r }, + { "lhu0", 0xbb400000, 0xffe00000, G_Q_r }, + { "lhu0", 0xbb600000, 0xffe00000, G_L_r }, + { "lh1", 0xba800000, 0xffe00000, G_r_r }, + { "lh1", 0xbaa00000, 0xffe00000, G_T_r }, + { "lh1", 0xbac00000, 0xffe00000, G_Q_r }, + { "lh1", 0xbae00000, 0xffe00000, G_I_r }, + { "lhu1", 0xbb800000, 0xffe00000, G_r_r }, + { "lhu1", 0xbba00000, 0xffe00000, G_T_r }, + { "lhu1", 0xbbc00000, 0xffe00000, G_Q_r }, + { "lhu1", 0xbbe00000, 0xffe00000, G_L_r }, + { "lwl0", 0xb4000000, 0xffe00000, G_r_r }, + { "lwl0", 0xb4200000, 0xffe00000, G_T_r }, + { "lwl0", 0xb4400000, 0xffe00000, G_Q_r }, + { "lwl0", 0xb4600000, 0xffe00000, G_I_r }, + { "lwl1", 0xb4800000, 0xffe00000, G_r_r }, + { "lwl1", 0xb4a00000, 0xffe00000, G_T_r }, + { "lwl1", 0xb4c00000, 0xffe00000, G_Q_r }, + { "lwl1", 0xb4e00000, 0xffe00000, G_I_r }, + { "lwl2", 0xb5000000, 0xffe00000, G_r_r }, + { "lwl2", 0xb5200000, 0xffe00000, G_T_r }, + { "lwl2", 0xb5400000, 0xffe00000, G_Q_r }, + { "lwl2", 0xb5600000, 0xffe00000, G_I_r }, + { "lwl3", 0xb5800000, 0xffe00000, G_r_r }, + { "lwl3", 0xb5a00000, 0xffe00000, G_T_r }, + { "lwl3", 0xb5c00000, 0xffe00000, G_Q_r }, + { "lwl3", 0xb5e00000, 0xffe00000, G_I_r }, + { "lwr0", 0xb6000000, 0xffe00000, G_r_r }, + { "lwr0", 0xb6200000, 0xffe00000, G_T_r }, + { "lwr0", 0xb6400000, 0xffe00000, G_Q_r }, + { "lwr0", 0xb6600000, 0xffe00000, G_I_r }, + { "lwr1", 0xb6800000, 0xffe00000, G_r_r }, + { "lwr1", 0xb6a00000, 0xffe00000, G_T_r }, + { "lwr1", 0xb6c00000, 0xffe00000, G_Q_r }, + { "lwr1", 0xb6e00000, 0xffe00000, G_I_r }, + { "lwr2", 0xb7000000, 0xffe00000, G_r_r }, + { "lwr2", 0xb7200000, 0xffe00000, G_T_r }, + { "lwr2", 0xb7400000, 0xffe00000, G_Q_r }, + { "lwr2", 0xb7600000, 0xffe00000, G_I_r }, + { "lwr3", 0xb7800000, 0xffe00000, G_r_r }, + { "lwr3", 0xb7a00000, 0xffe00000, G_T_r }, + { "lwr3", 0xb7c00000, 0xffe00000, G_Q_r }, + { "lwr3", 0xb7e00000, 0xffe00000, G_I_r }, + { "mb0", 0xb8000000, 0xffe00000, G_r_r }, + { "mb0", 0xb8200000, 0xffe00000, G_T_r }, + { "mb0", 0xb8400000, 0xffe00000, G_Q_r }, + { "mb0", 0xb8600000, 0xffe00000, G_I_r }, + { "mb1", 0xb8800000, 0xffe00000, G_r_r }, + { "mb1", 0xb8a00000, 0xffe00000, G_T_r }, + { "mb1", 0xb8c00000, 0xffe00000, G_Q_r }, + { "mb1", 0xb8e00000, 0xffe00000, G_I_r }, + { "mb2", 0xb9000000, 0xffe00000, G_r_r }, + { "mb2", 0xb9200000, 0xffe00000, G_T_r }, + { "mb2", 0xb9400000, 0xffe00000, G_Q_r }, + { "mb2", 0xb9600000, 0xffe00000, G_I_r }, + { "mb3", 0xb9800000, 0xffe00000, G_r_r }, + { "mb3", 0xb9a00000, 0xffe00000, G_T_r }, + { "mb3", 0xb9c00000, 0xffe00000, G_Q_r }, + { "mb3", 0xb9e00000, 0xffe00000, G_I_r }, + { "mh0", 0xbc000000, 0xffe00000, G_r_r }, + { "mh0", 0xbc200000, 0xffe00000, G_T_r }, + { "mh0", 0xbc400000, 0xffe00000, G_Q_r }, + { "mh0", 0xbc600000, 0xffe00000, G_I_r }, + { "mh1", 0xbc800000, 0xffe00000, G_r_r }, + { "mh1", 0xbca00000, 0xffe00000, G_T_r }, + { "mh1", 0xbcc00000, 0xffe00000, G_Q_r }, + { "mh1", 0xbce00000, 0xffe00000, G_I_r }, + { "mh2", 0xbd000000, 0xffe00000, G_r_r }, + { "mh2", 0xbd200000, 0xffe00000, G_T_r }, + { "mh2", 0xbd400000, 0xffe00000, G_Q_r }, + { "mh2", 0xbd600000, 0xffe00000, G_I_r }, + { "mh3", 0xbd800000, 0xffe00000, G_r_r }, + { "mh3", 0xbda00000, 0xffe00000, G_T_r }, + { "mh3", 0xbdc00000, 0xffe00000, G_Q_r }, + { "mh3", 0xbde00000, 0xffe00000, G_I_r }, + { "mpyshi", 0x1d800000, 0xffe00000, G_r_r }, + { "mpyshi", 0x1da00000, 0xffe00000, G_T_r }, + { "mpyshi", 0x1dc00000, 0xffe00000, G_Q_r }, + { "mpyshi", 0x1de00000, 0xffe00000, G_I_r }, + { "mpyshi", 0x28800000, 0xffe00000, T_rrr }, + { "mpyshi", 0x28a00000, 0xffe00000, T_Srr }, + { "mpyshi", 0x28c00000, 0xffe00000, T_rSr }, + { "mpyshi", 0x28e00000, 0xffe00000, T_SSr }, + { "mpyshi", 0x38800000, 0xffe00000, T_Jrr }, /* C4x */ + { "mpyshi", 0x38800000, 0xffe00000, T_rJr }, /* C4x */ + { "mpyshi", 0x38a00000, 0xffe00000, T_rRr }, /* C4x */ + { "mpyshi", 0x38a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "mpyshi", 0x38c00000, 0xffe00000, T_JRr }, /* C4x */ + { "mpyshi", 0x38c00000, 0xffe00000, T_RJr }, /* C4x */ + { "mpyshi", 0x38e00000, 0xffe00000, T_RRr }, /* C4x */ + { "mpyshi3", 0x28800000, 0xffe00000, T_rrr }, + { "mpyshi3", 0x28a00000, 0xffe00000, T_Srr }, + { "mpyshi3", 0x28c00000, 0xffe00000, T_rSr }, + { "mpyshi3", 0x28e00000, 0xffe00000, T_SSr }, + { "mpyshi3", 0x38800000, 0xffe00000, T_Jrr }, /* C4x */ + { "mpyshi3", 0x38800000, 0xffe00000, T_rJr }, /* C4x */ + { "mpyshi3", 0x38a00000, 0xffe00000, T_rRr }, /* C4x */ + { "mpyshi3", 0x38a00000, 0xffe00000, T_Rrr }, /* C4x */ + { "mpyshi3", 0x38c00000, 0xffe00000, T_JRr }, /* C4x */ + { "mpyshi3", 0x38c00000, 0xffe00000, T_RJr }, /* C4x */ + { "mpyshi3", 0x38e00000, 0xffe00000, T_RRr }, /* C4x */ + { "mpyuhi", 0x1e000000, 0xffe00000, G_r_r }, + { "mpyuhi", 0x1e200000, 0xffe00000, G_T_r }, + { "mpyuhi", 0x1e400000, 0xffe00000, G_Q_r }, + { "mpyuhi", 0x1e600000, 0xffe00000, G_I_r }, + { "mpyuhi", 0x29000000, 0xffe00000, T_rrr }, + { "mpyuhi", 0x29200000, 0xffe00000, T_Srr }, + { "mpyuhi", 0x29400000, 0xffe00000, T_rSr }, + { "mpyuhi", 0x29600000, 0xffe00000, T_SSr }, + { "mpyuhi", 0x39000000, 0xffe00000, T_Jrr }, /* C4x */ + { "mpyuhi", 0x39000000, 0xffe00000, T_rJr }, /* C4x */ + { "mpyuhi", 0x39200000, 0xffe00000, T_rRr }, /* C4x */ + { "mpyuhi", 0x39200000, 0xffe00000, T_Rrr }, /* C4x */ + { "mpyuhi", 0x39400000, 0xffe00000, T_JRr }, /* C4x */ + { "mpyuhi", 0x39400000, 0xffe00000, T_RJr }, /* C4x */ + { "mpyuhi", 0x39600000, 0xffe00000, T_RRr }, /* C4x */ + { "mpyuhi3", 0x29000000, 0xffe00000, T_rrr }, + { "mpyuhi3", 0x29200000, 0xffe00000, T_Srr }, + { "mpyuhi3", 0x29400000, 0xffe00000, T_rSr }, + { "mpyuhi3", 0x29600000, 0xffe00000, T_SSr }, + { "mpyuhi3", 0x39000000, 0xffe00000, T_Jrr }, /* C4x */ + { "mpyuhi3", 0x39000000, 0xffe00000, T_rJr }, /* C4x */ + { "mpyuhi3", 0x39200000, 0xffe00000, T_rRr }, /* C4x */ + { "mpyuhi3", 0x39200000, 0xffe00000, T_Rrr }, /* C4x */ + { "mpyuhi3", 0x39400000, 0xffe00000, T_JRr }, /* C4x */ + { "mpyuhi3", 0x39400000, 0xffe00000, T_RJr }, /* C4x */ + { "mpyuhi3", 0x39600000, 0xffe00000, T_RRr }, /* C4x */ + { "rcpf", 0x1d000000, 0xffe00000, G_r_r }, + { "rcpf", 0x1d200000, 0xffe00000, G_T_r }, + { "rcpf", 0x1d400000, 0xffe00000, G_Q_r }, + { "rcpf", 0x1d600000, 0xffe00000, G_F_r }, + { "retiBd", 0x78200000, 0xffe00000, "" }, + { "retid", 0x78200000, 0xffe00000, "" }, /* synonym for retiud */ + { "rptbd", 0x79800000, 0xff000000, "Q" }, + { "rptbd", 0x65000000, 0xff000000, "B" }, + { "rsqrf", 0x1c800000, 0xffe00000, G_r_r }, + { "rsqrf", 0x1ca00000, 0xffe00000, G_T_r }, + { "rsqrf", 0x1cc00000, 0xffe00000, G_Q_r }, + { "rsqrf", 0x1ce00000, 0xffe00000, G_F_r }, + { "stik", 0x15000000, 0xffe00000, "T,@" }, + { "stik", 0x15600000, 0xffe00000, "T,*" }, + { "toieee", 0x1b800000, 0xffe00000, G_r_r }, + { "toieee", 0x1ba00000, 0xffe00000, G_T_r }, + { "toieee", 0x1bc00000, 0xffe00000, G_Q_r }, + { "toieee", 0x1be00000, 0xffe00000, G_F_r }, + { "idle2", 0x06000001, 0xffffffff, "" }, + + /* Dummy entry, not included in num_insts. This + lets code examine entry i+1 without checking + if we've run off the end of the table. */ + { "", 0x0, 0x00, "" } +}; + +const unsigned int c4x_num_insts = (((sizeof c4x_insts) / (sizeof c4x_insts[0])) - 1); + + +struct c4x_cond +{ + char * name; + unsigned long cond; +}; + +typedef struct c4x_cond c4x_cond_t; + +/* Define conditional branch/load suffixes. Put desired form for + disassembler last. */ +static const c4x_cond_t c4x_conds[] = +{ + { "u", 0x00 }, + { "c", 0x01 }, { "lo", 0x01 }, + { "ls", 0x02 }, + { "hi", 0x03 }, + { "nc", 0x04 }, { "hs", 0x04 }, + { "z", 0x05 }, { "eq", 0x05 }, + { "nz", 0x06 }, { "ne", 0x06 }, + { "n", 0x07 }, { "l", 0x07 }, { "lt", 0x07 }, + { "le", 0x08 }, + { "p", 0x09 }, { "gt", 0x09 }, + { "nn", 0x0a }, { "ge", 0x0a }, + { "nv", 0x0c }, + { "v", 0x0d }, + { "nuf", 0x0e }, + { "uf", 0x0f }, + { "nlv", 0x10 }, + { "lv", 0x11 }, + { "nluf", 0x12 }, + { "luf", 0x13 }, + { "zuf", 0x14 }, + /* Dummy entry, not included in num_conds. This + lets code examine entry i+1 without checking + if we've run off the end of the table. */ + { "", 0x0} +}; + +const unsigned int num_conds = (((sizeof c4x_conds) / (sizeof c4x_conds[0])) - 1); + +struct c4x_indirect +{ + char * name; + unsigned long modn; +}; + +typedef struct c4x_indirect c4x_indirect_t; + +/* Define indirect addressing modes where: + d displacement (signed) + y ir0 + z ir1 */ + +static const c4x_indirect_t c4x_indirects[] = +{ + { "*+a(d)", 0x00 }, + { "*-a(d)", 0x01 }, + { "*++a(d)", 0x02 }, + { "*--a(d)", 0x03 }, + { "*a++(d)", 0x04 }, + { "*a--(d)", 0x05 }, + { "*a++(d)%", 0x06 }, + { "*a--(d)%", 0x07 }, + { "*+a(y)", 0x08 }, + { "*-a(y)", 0x09 }, + { "*++a(y)", 0x0a }, + { "*--a(y)", 0x0b }, + { "*a++(y)", 0x0c }, + { "*a--(y)", 0x0d }, + { "*a++(y)%", 0x0e }, + { "*a--(y)%", 0x0f }, + { "*+a(z)", 0x10 }, + { "*-a(z)", 0x11 }, + { "*++a(z)", 0x12 }, + { "*--a(z)", 0x13 }, + { "*a++(z)", 0x14 }, + { "*a--(z)", 0x15 }, + { "*a++(z)%", 0x16 }, + { "*a--(z)%", 0x17 }, + { "*a", 0x18 }, + { "*a++(y)b", 0x19 }, + /* Dummy entry, not included in num_indirects. This + lets code examine entry i+1 without checking + if we've run off the end of the table. */ + { "", 0x0} +}; + +#define C3X_MODN_MAX 0x19 + +const unsigned int num_indirects = (((sizeof c4x_indirects) / (sizeof c4x_indirects[0])) - 1); diff --git a/ld/ChangeLog b/ld/ChangeLog index f09a0ae13b..94e04ae20c 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,18 @@ +2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com> + + * Makefile.am: Add etic4xcoff.o in ALL_EMULATIONS list and + added makefile targets for this file. + * Makefile.in: Regenerate. + * configure.tgt: Added tic4x-coff and c4x-coff emulations. + * NEWS: Mention new port. + +2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * emulparams/tic3xcoff.sh: New file. + * emulparams/tic4xcoff.sh: New file. + * scripttempl/tic3xcoff.sc: New file. + * scripttempl/tic4xcoff.sc: New file. + 2002-08-28 Alan Modra <amodra@bigpond.net.au> * emultempl/aix.em (gld${EMULATION_NAME}_parse_args): Replace strtoll, diff --git a/ld/Makefile.am b/ld/Makefile.am index 5f783865ea..c89d37bd6d 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -282,6 +282,7 @@ ALL_EMULATIONS = \ esun4.o \ etic30aout.o \ etic30coff.o \ + etic4xcoff.o \ etic54xcoff.o \ etic80coff.o \ evanilla.o \ @@ -1078,6 +1079,9 @@ etic30aout.c: $(srcdir)/emulparams/tic30aout.sh \ etic30coff.c: $(srcdir)/emulparams/tic30coff.sh \ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/tic30coff.sc ${GEN_DEPENDS} ${GENSCRIPTS} tic30coff "$(tdir_tic30coff)" +etic4xcoff.c: $(srcdir)/emulparams/tic4xcoff.sh \ + $(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS} + ${GENSCRIPTS} tic4xcoff "$(tdir_tic4xcoff)" etic54xcoff.c: $(srcdir)/emulparams/tic54xcoff.sh \ $(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic54xcoff.sc ${GEN_DEPENDS} ${GENSCRIPTS} tic54xcoff "$(tdir_tic54xcoff)" diff --git a/ld/Makefile.in b/ld/Makefile.in index 886dd4f15a..b038e17b9e 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -393,6 +393,7 @@ ALL_EMULATIONS = \ esun4.o \ etic30aout.o \ etic30coff.o \ + etic4xcoff.o \ etic54xcoff.o \ etic80coff.o \ evanilla.o \ @@ -1801,6 +1802,9 @@ etic30aout.c: $(srcdir)/emulparams/tic30aout.sh \ etic30coff.c: $(srcdir)/emulparams/tic30coff.sh \ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/tic30coff.sc ${GEN_DEPENDS} ${GENSCRIPTS} tic30coff "$(tdir_tic30coff)" +etic4xcoff.c: $(srcdir)/emulparams/tic4xcoff.sh \ + $(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS} + ${GENSCRIPTS} tic4xcoff "$(tdir_tic4xcoff)" etic54xcoff.c: $(srcdir)/emulparams/tic54xcoff.sh \ $(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic54xcoff.sc ${GEN_DEPENDS} ${GENSCRIPTS} tic54xcoff "$(tdir_tic54xcoff)" @@ -1,5 +1,8 @@ -*- text -*- +* Support for Texas Instruments TMS320C4x series of microcontrollers + contributed by Michael Hayes and Svein E. Seldal. + * Added --with-lib-path configure switch to specify default value for LIB_PATH. diff --git a/ld/configure.tgt b/ld/configure.tgt index 9ee6d34aa2..0f1d1c915d 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -498,6 +498,7 @@ rs6000-*-aix5*) targ_emul=aix5rs6 ;; rs6000-*-aix*) targ_emul=aixrs6 ;; tic30-*-*aout*) targ_emul=tic30aout ;; tic30-*-*coff*) targ_emul=tic30coff ;; +tic4x-*-* | c4x-*-*) targ_emul=tic4xcoff ;; tic54x-*-* | c54x*-*-*) targ_emul=tic54xcoff ;; tic80-*-*) targ_emul=tic80coff ;; v850-*-*) targ_emul=v850 ;; diff --git a/ld/emulparams/tic3xcoff.sh b/ld/emulparams/tic3xcoff.sh new file mode 100644 index 0000000000..3d4fbf9978 --- /dev/null +++ b/ld/emulparams/tic3xcoff.sh @@ -0,0 +1,9 @@ +SCRIPT_NAME=tic4xcoff +OUTPUT_FORMAT="coff2-c4x" +OUTPUT_ARCH="c3x" +ARCH=c3x +#ENTRY=_c_int00 +TEXT_START_ADDR=0x0080 +TARGET_PAGE_SIZE=0x1000 +TEMPLATE_NAME=ticoff +OUTPUT_FORMAT_TEMPLATE=tic4x diff --git a/ld/emulparams/tic4xcoff.sh b/ld/emulparams/tic4xcoff.sh new file mode 100644 index 0000000000..d6b9dc6248 --- /dev/null +++ b/ld/emulparams/tic4xcoff.sh @@ -0,0 +1,9 @@ +SCRIPT_NAME=tic4xcoff +OUTPUT_FORMAT="coff2-c4x" +OUTPUT_ARCH="c4x" +ARCH=c4x +#ENTRY=_c_int00 +TEXT_START_ADDR=0x0080 +TARGET_PAGE_SIZE=0x1000 +TEMPLATE_NAME=ticoff +OUTPUT_FORMAT_TEMPLATE=tic4x diff --git a/ld/scripttempl/tic3xcoff.sc b/ld/scripttempl/tic3xcoff.sc new file mode 100644 index 0000000000..29dc400d65 --- /dev/null +++ b/ld/scripttempl/tic3xcoff.sc @@ -0,0 +1,92 @@ +# 32 interrupt vectors + 32 trap vectors each of 4 bytes +# The .bss and .data sections need to be contiguous for direct addressing +# The data page pointer gets loaded with the start of .bss +# TI C compiler uses .cinit to initialise variables in .bss + +test -z "$ENTRY" && ENTRY=_start +# These are substituted in as variables in order to get '}' in a shell +# conditional expansion. +INIT='.init : { *(.init) }' +FINI='.fini : { *(.fini) }' +cat <<EOF +OUTPUT_FORMAT("${OUTPUT_FORMAT}") +OUTPUT_ARCH("${OUTPUT_ARCH}") +${LIB_SEARCH_DIRS} + +ENTRY(${ENTRY}) +${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;} +${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;} + +SECTIONS +{ + .comms ${RELOCATING+ 64} : { + *(.comms) + } + .bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : { + ${RELOCATING+ .bss = .;} + *(.bss) + *(COMMON) + ${RELOCATING+ end = .;} + ${RELOCATING+ _end = end;} + } + .data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} : + { + ${RELOCATING+ .data = .;} + *(.data) + ${RELOCATING+ edata = .;} + } + .const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} : + { + *(.const) + } + .cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} : + { + ${RELOCATING+ cinit = .;} + *(.cinit) + LONG(0); + } + .text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : { + ${RELOCATING+ .text = .;} + ${RELOCATING+ *(.init)} + *(.text) + ${CONSTRUCTING+ ___CTOR_LIST__ = .;} + ${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)} + ${CONSTRUCTING+ *(.ctors)} + ${CONSTRUCTING+ LONG(0);} + ${CONSTRUCTING+ ___CTOR_END__ = .;} + ${CONSTRUCTING+ ___DTOR_LIST__ = .;} + ${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)} + ${CONSTRUCTING+ *(.dtors)} + ${CONSTRUCTING+ LONG(0)} + ${CONSTRUCTING+ ___DTOR_END__ = .;} + ${RELOCATING+ *(.fini)} + ${RELOCATING+ etext = .;} + ${RELOCATING+ _etext = etext;} + } + .stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} : + { + *(.stack) + ${RELOCATING+ . = . + __STACK_SIZE}; + } + .sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} : + { + *(.sysmem) + } + .heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} : + { + ${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)}; + } + ${RELOCATING- ${INIT}} + ${RELOCATING- ${FINI}} + .stab 0 ${RELOCATING+(NOLOAD)} : + { + [ .stab ] + } + .stabstr 0 ${RELOCATING+(NOLOAD)} : + { + [ .stabstr ] + } +/* The TI tools sets cinit to -1 if the ram model is used. */ + ${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;} +} +EOF diff --git a/ld/scripttempl/tic4xcoff.sc b/ld/scripttempl/tic4xcoff.sc new file mode 100644 index 0000000000..29dc400d65 --- /dev/null +++ b/ld/scripttempl/tic4xcoff.sc @@ -0,0 +1,92 @@ +# 32 interrupt vectors + 32 trap vectors each of 4 bytes +# The .bss and .data sections need to be contiguous for direct addressing +# The data page pointer gets loaded with the start of .bss +# TI C compiler uses .cinit to initialise variables in .bss + +test -z "$ENTRY" && ENTRY=_start +# These are substituted in as variables in order to get '}' in a shell +# conditional expansion. +INIT='.init : { *(.init) }' +FINI='.fini : { *(.fini) }' +cat <<EOF +OUTPUT_FORMAT("${OUTPUT_FORMAT}") +OUTPUT_ARCH("${OUTPUT_ARCH}") +${LIB_SEARCH_DIRS} + +ENTRY(${ENTRY}) +${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;} +${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;} + +SECTIONS +{ + .comms ${RELOCATING+ 64} : { + *(.comms) + } + .bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : { + ${RELOCATING+ .bss = .;} + *(.bss) + *(COMMON) + ${RELOCATING+ end = .;} + ${RELOCATING+ _end = end;} + } + .data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} : + { + ${RELOCATING+ .data = .;} + *(.data) + ${RELOCATING+ edata = .;} + } + .const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} : + { + *(.const) + } + .cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} : + { + ${RELOCATING+ cinit = .;} + *(.cinit) + LONG(0); + } + .text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : { + ${RELOCATING+ .text = .;} + ${RELOCATING+ *(.init)} + *(.text) + ${CONSTRUCTING+ ___CTOR_LIST__ = .;} + ${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)} + ${CONSTRUCTING+ *(.ctors)} + ${CONSTRUCTING+ LONG(0);} + ${CONSTRUCTING+ ___CTOR_END__ = .;} + ${CONSTRUCTING+ ___DTOR_LIST__ = .;} + ${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)} + ${CONSTRUCTING+ *(.dtors)} + ${CONSTRUCTING+ LONG(0)} + ${CONSTRUCTING+ ___DTOR_END__ = .;} + ${RELOCATING+ *(.fini)} + ${RELOCATING+ etext = .;} + ${RELOCATING+ _etext = etext;} + } + .stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} : + { + *(.stack) + ${RELOCATING+ . = . + __STACK_SIZE}; + } + .sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} : + { + *(.sysmem) + } + .heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} : + { + ${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)}; + } + ${RELOCATING- ${INIT}} + ${RELOCATING- ${FINI}} + .stab 0 ${RELOCATING+(NOLOAD)} : + { + [ .stab ] + } + .stabstr 0 ${RELOCATING+(NOLOAD)} : + { + [ .stabstr ] + } +/* The TI tools sets cinit to -1 if the ram model is used. */ + ${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;} +} +EOF diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 8bbcdffb45..7fd83af170 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,16 @@ +2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com> + + * configure.in: Added bfd_tic4x_arch. + * configure: Regenerate. + * Makefile.am: Added tic4x-dis.o target. + * Makefile.in: Regenerate. + +2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * disassemble.c: Added tic4x target and c4x + disassembler routine. + * tic4x-dis.c: New file. + 2002-08-16 Christian Groessler <chris@groessler.org> * z8k-dis.c (unparse_instr): case CLASS_BA: Designate hex diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index d2f043cf7d..d2c21434f0 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -140,6 +140,7 @@ CFILES = \ sparc-dis.c \ sparc-opc.c \ tic30-dis.c \ + tic4x-dis.c \ tic54x-dis.c \ tic54x-opc.c \ tic80-dis.c \ @@ -243,6 +244,7 @@ ALL_MACHINES = \ sparc-dis.lo \ sparc-opc.lo \ tic30-dis.lo \ + tic4x-dis.lo \ tic54x-dis.lo \ tic54x-opc.lo \ tic80-dis.lo \ @@ -721,6 +723,8 @@ sparc-opc.lo: sparc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/sparc.h tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic30.h +tic4x-dis.lo: tic4x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/tic4x.h tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h \ $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index c2a5c5afc5..634161834a 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -251,6 +251,7 @@ CFILES = \ sparc-dis.c \ sparc-opc.c \ tic30-dis.c \ + tic4x-dis.c \ tic54x-dis.c \ tic54x-opc.c \ tic80-dis.c \ @@ -355,6 +356,7 @@ ALL_MACHINES = \ sparc-dis.lo \ sparc-opc.lo \ tic30-dis.lo \ + tic4x-dis.lo \ tic54x-dis.lo \ tic54x-opc.lo \ tic80-dis.lo \ @@ -447,7 +449,7 @@ acinclude.m4 aclocal.m4 config.in configure configure.in DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) -TAR = tar +TAR = gtar GZIP_ENV = --best SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES) OBJECTS = libopcodes.a.$(OBJEXT) $(libopcodes_la_OBJECTS) @@ -1217,6 +1219,8 @@ sparc-opc.lo: sparc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/sparc.h tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic30.h +tic4x-dis.lo: tic4x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/tic4x.h tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h \ $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h diff --git a/opcodes/configure b/opcodes/configure index 9b6992b1fc..6825a0b020 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -4654,6 +4654,7 @@ if test x${all_targets} = xfalse ; then bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;; bfd_tahoe_arch) ;; bfd_tic30_arch) ta="$ta tic30-dis.lo" ;; + bfd_tic4x_arch) ta="$ta tic4x-dis.lo" ;; bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;; bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;; bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; diff --git a/opcodes/configure.in b/opcodes/configure.in index 3ce5e37921..0e5eb6f5fb 100644 --- a/opcodes/configure.in +++ b/opcodes/configure.in @@ -229,6 +229,7 @@ if test x${all_targets} = xfalse ; then bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;; bfd_tahoe_arch) ;; bfd_tic30_arch) ta="$ta tic30-dis.lo" ;; + bfd_tic4x_arch) ta="$ta tic4x-dis.lo" ;; bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;; bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;; bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;; diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 88fa63573a..4d78a73b40 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -60,6 +60,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARCH_sh #define ARCH_sparc #define ARCH_tic30 +#define ARCH_tic4x #define ARCH_tic54x #define ARCH_tic80 #define ARCH_v850 @@ -305,6 +306,11 @@ disassembler (abfd) disassemble = print_insn_tic30; break; #endif +#ifdef ARCH_tic4x + case bfd_arch_tic4x: + disassemble = print_insn_tic4x; + break; +#endif #ifdef ARCH_tic54x case bfd_arch_tic54x: disassemble = print_insn_tic54x; diff --git a/opcodes/tic4x-dis.c b/opcodes/tic4x-dis.c new file mode 100644 index 0000000000..eff4ebb8ff --- /dev/null +++ b/opcodes/tic4x-dis.c @@ -0,0 +1,677 @@ +/* Print instructions for the Texas TMS320C[34]X, for GDB and GNU Binutils. + + Copyright 2002 Free Software Foundation, Inc. + + Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include <math.h> +#include "libiberty.h" +#include "dis-asm.h" +#include "opcode/tic4x.h" + +#define C4X_DEBUG 0 + +#define C4X_HASH_SIZE 11 /* 11 and above should give unique entries. */ + +typedef enum + { + IMMED_SINT, + IMMED_SUINT, + IMMED_SFLOAT, + IMMED_INT, + IMMED_UINT, + IMMED_FLOAT + } +immed_t; + +typedef enum + { + INDIRECT_SHORT, + INDIRECT_LONG, + INDIRECT_C4X + } +indirect_t; + +static int c4x_version = 0; +static int c4x_dp = 0; + +static int +c4x_pc_offset (unsigned int op) +{ + /* Determine the PC offset for a C[34]x instruction. + This could be simplified using some boolean algebra + but at the expense of readability. */ + switch (op >> 24) + { + case 0x60: /* br */ + case 0x62: /* call (C4x) */ + case 0x64: /* rptb (C4x) */ + return 1; + case 0x61: /* brd */ + case 0x63: /* laj */ + case 0x65: /* rptbd (C4x) */ + return 3; + case 0x66: /* swi */ + case 0x67: + return 0; + default: + break; + } + + switch ((op & 0xffe00000) >> 20) + { + case 0x6a0: /* bB */ + case 0x720: /* callB */ + case 0x740: /* trapB */ + return 1; + + case 0x6a2: /* bBd */ + case 0x6a6: /* bBat */ + case 0x6aa: /* bBaf */ + case 0x722: /* lajB */ + case 0x748: /* latB */ + case 0x798: /* rptbd */ + return 3; + + default: + break; + } + + switch ((op & 0xfe200000) >> 20) + { + case 0x6e0: /* dbB */ + return 1; + + case 0x6e2: /* dbBd */ + return 3; + + default: + break; + } + + return 0; +} + +static int +c4x_print_char (struct disassemble_info * info, char ch) +{ + if (info != NULL) + (*info->fprintf_func) (info->stream, "%c", ch); + return 1; +} + +static int +c4x_print_str (struct disassemble_info *info, char *str) +{ + if (info != NULL) + (*info->fprintf_func) (info->stream, "%s", str); + return 1; +} + +static int +c4x_print_register (struct disassemble_info *info, + unsigned long regno) +{ + static c4x_register_t **registertable = NULL; + unsigned int i; + + if (registertable == NULL) + { + registertable = (c4x_register_t **) + xmalloc (sizeof (c4x_register_t *) * REG_TABLE_SIZE); + for (i = 0; i < c3x_num_registers; i++) + registertable[c3x_registers[i].regno] = (void *)&c3x_registers[i]; + if (IS_CPU_C4X (c4x_version)) + { + /* Add C4x additional registers, overwriting + any C3x registers if necessary. */ + for (i = 0; i < c4x_num_registers; i++) + registertable[c4x_registers[i].regno] = (void *)&c4x_registers[i]; + } + } + if ((int) regno > (IS_CPU_C4X (c4x_version) ? C4X_REG_MAX : C3X_REG_MAX)) + return 0; + if (info != NULL) + (*info->fprintf_func) (info->stream, "%s", registertable[regno]->name); + return 1; +} + +static int +c4x_print_addr (struct disassemble_info *info, + unsigned long addr) +{ + if (info != NULL) + (*info->print_address_func)(addr, info); + return 1; +} + +static int +c4x_print_relative (struct disassemble_info *info, + unsigned long pc, + long offset, + unsigned long opcode) +{ + return c4x_print_addr (info, pc + offset + c4x_pc_offset (opcode)); +} + +static int +c4x_print_direct (struct disassemble_info *info, + unsigned long arg) +{ + if (info != NULL) + { + (*info->fprintf_func) (info->stream, "@"); + c4x_print_addr (info, arg + (c4x_dp << 16)); + } + return 1; +} + +/* FIXME: make the floating point stuff not rely on host + floating point arithmetic. */ +void +c4x_print_ftoa (unsigned int val, + FILE *stream, + int (*pfunc)()) +{ + int e; + int s; + int f; + double num = 0.0; + + e = EXTRS (val, 31, 24); /* exponent */ + if (e != -128) + { + s = EXTRU (val, 23, 23); /* sign bit */ + f = EXTRU (val, 22, 0); /* mantissa */ + if (s) + f += -2 * (1 << 23); + else + f += (1 << 23); + num = f / (double)(1 << 23); + num = ldexp (num, e); + } + (*pfunc)(stream, "%.9g", num); +} + +static int +c4x_print_immed (struct disassemble_info *info, + immed_t type, + unsigned long arg) +{ + int s; + int f; + int e; + double num = 0.0; + + if (info == NULL) + return 1; + switch (type) + { + case IMMED_SINT: + case IMMED_INT: + (*info->fprintf_func) (info->stream, "%d", (long)arg); + break; + + case IMMED_SUINT: + case IMMED_UINT: + (*info->fprintf_func) (info->stream, "%u", arg); + break; + + case IMMED_SFLOAT: + e = EXTRS (arg, 15, 12); + if (e != -8) + { + s = EXTRU (arg, 11, 11); + f = EXTRU (arg, 10, 0); + if (s) + f += -2 * (1 << 11); + else + f += (1 << 11); + num = f / (double)(1 << 11); + num = ldexp (num, e); + } + (*info->fprintf_func) (info->stream, "%f", num); + break; + case IMMED_FLOAT: + e = EXTRS (arg, 31, 24); + if (e != -128) + { + s = EXTRU (arg, 23, 23); + f = EXTRU (arg, 22, 0); + if (s) + f += -2 * (1 << 23); + else + f += (1 << 23); + num = f / (double)(1 << 23); + num = ldexp (num, e); + } + (*info->fprintf_func) (info->stream, "%f", num); + break; + } + return 1; +} + +static int +c4x_print_cond (struct disassemble_info *info, + unsigned int cond) +{ + static c4x_cond_t **condtable = NULL; + unsigned int i; + + if (condtable == NULL) + { + condtable = (c4x_cond_t **)xmalloc (sizeof (c4x_cond_t *) * 32); + for (i = 0; i < num_conds; i++) + condtable[c4x_conds[i].cond] = (void *)&c4x_conds[i]; + } + if (cond > 31 || condtable[cond] == NULL) + return 0; + if (info != NULL) + (*info->fprintf_func) (info->stream, "%s", condtable[cond]->name); + return 1; +} + +static int +c4x_print_indirect (struct disassemble_info *info, + indirect_t type, + unsigned long arg) +{ + unsigned int aregno; + unsigned int modn; + unsigned int disp; + char *a; + + aregno = 0; + modn = 0; + disp = 1; + switch(type) + { + case INDIRECT_C4X: /* *+ARn(disp) */ + disp = EXTRU (arg, 7, 3); + aregno = EXTRU (arg, 2, 0) + REG_AR0; + modn = 0; + break; + case INDIRECT_SHORT: + disp = 1; + aregno = EXTRU (arg, 2, 0) + REG_AR0; + modn = EXTRU (arg, 7, 3); + break; + case INDIRECT_LONG: + disp = EXTRU (arg, 7, 0); + aregno = EXTRU (arg, 10, 8) + REG_AR0; + modn = EXTRU (arg, 15, 11); + if (modn > 7 && disp != 0) + return 0; + break; + default: + abort (); + } + if (modn > C3X_MODN_MAX) + return 0; + a = c4x_indirects[modn].name; + while (*a) + { + switch (*a) + { + case 'a': + c4x_print_register (info, aregno); + break; + case 'd': + c4x_print_immed (info, IMMED_UINT, disp); + break; + case 'y': + c4x_print_str (info, "ir0"); + break; + case 'z': + c4x_print_str (info, "ir1"); + break; + default: + c4x_print_char (info, *a); + break; + } + a++; + } + return 1; +} + +static int +c4x_print_op (struct disassemble_info *info, + unsigned long instruction, + c4x_inst_t *p, unsigned long pc) +{ + int val; + char *s; + char *parallel = NULL; + + /* Print instruction name. */ + s = p->name; + while (*s && parallel == NULL) + { + switch (*s) + { + case 'B': + if (! c4x_print_cond (info, EXTRU (instruction, 20, 16))) + return 0; + break; + case 'C': + if (! c4x_print_cond (info, EXTRU (instruction, 27, 23))) + return 0; + break; + case '_': + parallel = s + 1; /* Skip past `_' in name */ + break; + default: + c4x_print_char (info, *s); + break; + } + s++; + } + + /* Print arguments. */ + s = p->args; + if (*s) + c4x_print_char (info, ' '); + + while (*s) + { + switch (*s) + { + case '*': /* indirect 0--15 */ + if (! c4x_print_indirect (info, INDIRECT_LONG, + EXTRU (instruction, 15, 0))) + return 0; + break; + + case '#': /* only used for ldp, ldpk */ + c4x_print_immed (info, IMMED_UINT, EXTRU (instruction, 15, 0)); + break; + + case '@': /* direct 0--15 */ + c4x_print_direct (info, EXTRU (instruction, 15, 0)); + break; + + case 'A': /* address register 24--22 */ + if (! c4x_print_register (info, EXTRU (instruction, 24, 22) + + REG_AR0)) + return 0; + break; + + case 'B': /* 24-bit unsigned int immediate br(d)/call/rptb + address 0--23. */ + if (IS_CPU_C4X (c4x_version)) + c4x_print_relative (info, pc, EXTRS (instruction, 23, 0), + p->opcode); + else + c4x_print_addr (info, EXTRU (instruction, 23, 0)); + break; + + case 'C': /* indirect (short C4x) 0--7 */ + if (! IS_CPU_C4X (c4x_version)) + return 0; + if (! c4x_print_indirect (info, INDIRECT_C4X, + EXTRU (instruction, 7, 0))) + return 0; + break; + + case 'D': + /* Cockup if get here... */ + break; + + case 'E': /* register 0--7 */ + if (! c4x_print_register (info, EXTRU (instruction, 7, 0))) + return 0; + break; + + case 'F': /* 16-bit float immediate 0--15 */ + c4x_print_immed (info, IMMED_SFLOAT, + EXTRU (instruction, 15, 0)); + break; + + case 'I': /* indirect (short) 0--7 */ + if (! c4x_print_indirect (info, INDIRECT_SHORT, + EXTRU (instruction, 7, 0))) + return 0; + break; + + case 'J': /* indirect (short) 8--15 */ + if (! c4x_print_indirect (info, INDIRECT_SHORT, + EXTRU (instruction, 15, 8))) + return 0; + break; + + case 'G': /* register 8--15 */ + if (! c4x_print_register (info, EXTRU (instruction, 15, 8))) + return 0; + break; + + case 'H': /* register 16--18 */ + if (! c4x_print_register (info, EXTRU (instruction, 18, 16))) + return 0; + break; + + case 'K': /* register 19--21 */ + if (! c4x_print_register (info, EXTRU (instruction, 21, 19))) + return 0; + break; + + case 'L': /* register 22--24 */ + if (! c4x_print_register (info, EXTRU (instruction, 24, 22))) + return 0; + break; + + case 'M': /* register 22--22 */ + c4x_print_register (info, EXTRU (instruction, 22, 22) + REG_R2); + break; + + case 'N': /* register 23--23 */ + c4x_print_register (info, EXTRU (instruction, 22, 22) + REG_R0); + break; + + case 'O': /* indirect (short C4x) 8--15 */ + if (! IS_CPU_C4X (c4x_version)) + return 0; + if (! c4x_print_indirect (info, INDIRECT_C4X, + EXTRU (instruction, 15, 8))) + return 0; + break; + + case 'P': /* displacement 0--15 (used by Bcond and BcondD) */ + c4x_print_relative (info, pc, EXTRS (instruction, 15, 0), + p->opcode); + break; + + case 'Q': /* register 0--15 */ + if (! c4x_print_register (info, EXTRU (instruction, 15, 0))) + return 0; + break; + + case 'R': /* register 16--20 */ + if (! c4x_print_register (info, EXTRU (instruction, 20, 16))) + return 0; + break; + + case 'S': /* 16-bit signed immediate 0--15 */ + c4x_print_immed (info, IMMED_SINT, + EXTRS (instruction, 15, 0)); + break; + + case 'T': /* 5-bit signed immediate 16--20 (C4x stik) */ + if (! IS_CPU_C4X (c4x_version)) + return 0; + if (! c4x_print_immed (info, IMMED_SUINT, + EXTRU (instruction, 20, 16))) + return 0; + break; + + case 'U': /* 16-bit unsigned int immediate 0--15 */ + c4x_print_immed (info, IMMED_SUINT, EXTRU (instruction, 15, 0)); + break; + + case 'V': /* 5/9-bit unsigned vector 0--4/8 */ + c4x_print_immed (info, IMMED_SUINT, + IS_CPU_C4X (c4x_version) ? + EXTRU (instruction, 8, 0) : + EXTRU (instruction, 4, 0) & ~0x20); + break; + + case 'W': /* 8-bit signed immediate 0--7 */ + if (! IS_CPU_C4X (c4x_version)) + return 0; + c4x_print_immed (info, IMMED_SINT, EXTRS (instruction, 7, 0)); + break; + + case 'X': /* expansion register 4--0 */ + val = EXTRU (instruction, 4, 0) + REG_IVTP; + if (val < REG_IVTP || val > REG_TVTP) + return 0; + if (! c4x_print_register (info, val)) + return 0; + break; + + case 'Y': /* address register 16--20 */ + val = EXTRU (instruction, 20, 16); + if (val < REG_AR0 || val > REG_SP) + return 0; + if (! c4x_print_register (info, val)) + return 0; + break; + + case 'Z': /* expansion register 16--20 */ + val = EXTRU (instruction, 20, 16) + REG_IVTP; + if (val < REG_IVTP || val > REG_TVTP) + return 0; + if (! c4x_print_register (info, val)) + return 0; + break; + + case '|': /* Parallel instruction */ + c4x_print_str (info, " || "); + c4x_print_str (info, parallel); + c4x_print_char (info, ' '); + break; + + case ';': + c4x_print_char (info, ','); + break; + + default: + c4x_print_char (info, *s); + break; + } + s++; + } + return 1; +} + +static void +c4x_hash_opcode (c4x_inst_t **optable, + const c4x_inst_t *inst) +{ + int j; + int opcode = inst->opcode >> (32 - C4X_HASH_SIZE); + int opmask = inst->opmask >> (32 - C4X_HASH_SIZE); + + /* Use a C4X_HASH_SIZE bit index as a hash index. We should + have unique entries so there's no point having a linked list + for each entry? */ + for (j = opcode; j < opmask; j++) + if ((j & opmask) == opcode) + { +#if C4X_DEBUG + /* We should only have collisions for synonyms like + ldp for ldi. */ + if (optable[j] != NULL) + printf("Collision at index %d, %s and %s\n", + j, optable[j]->name, inst->name); +#endif + optable[j] = (void *)inst; + } +} + +/* Disassemble the instruction in 'instruction'. + 'pc' should be the address of this instruction, it will + be used to print the target address if this is a relative jump or call + the disassembled instruction is written to 'info'. + The function returns the length of this instruction in words. */ + +static int +c4x_disassemble (unsigned long pc, + unsigned long instruction, + struct disassemble_info *info) +{ + static c4x_inst_t **optable = NULL; + c4x_inst_t *p; + int i; + + c4x_version = info->mach; + + if (optable == NULL) + { + optable = (c4x_inst_t **) + xcalloc (sizeof (c4x_inst_t *), (1 << C4X_HASH_SIZE)); + /* Install opcodes in reverse order so that preferred + forms overwrite synonyms. */ + for (i = c3x_num_insts - 1; i >= 0; i--) + c4x_hash_opcode (optable, &c3x_insts[i]); + if (IS_CPU_C4X (c4x_version)) + { + for (i = c4x_num_insts - 1; i >= 0; i--) + c4x_hash_opcode (optable, &c4x_insts[i]); + } + } + + /* See if we can pick up any loading of the DP register... */ + if ((instruction >> 16) == 0x5070 || (instruction >> 16) == 0x1f70) + c4x_dp = EXTRU (instruction, 15, 0); + + p = optable[instruction >> (32 - C4X_HASH_SIZE)]; + if (p != NULL && ((instruction & p->opmask) == p->opcode) + && c4x_print_op (NULL, instruction, p, pc)) + c4x_print_op (info, instruction, p, pc); + else + (*info->fprintf_func) (info->stream, "%08x", instruction); + + /* Return size of insn in words. */ + return 1; +} + +/* The entry point from objdump and gdb. */ +int +print_insn_tic4x (memaddr, info) + bfd_vma memaddr; + struct disassemble_info *info; +{ + int status; + unsigned long pc; + unsigned long op; + bfd_byte buffer[4]; + + status = (*info->read_memory_func) (memaddr, buffer, 4, info); + if (status != 0) + { + (*info->memory_error_func) (status, memaddr, info); + return -1; + } + + pc = memaddr; + op = bfd_getl32 (buffer); + info->bytes_per_line = 4; + info->bytes_per_chunk = 4; + info->octets_per_byte = 4; + info->display_endian = BFD_ENDIAN_LITTLE; + return c4x_disassemble (pc, op, info) * 4; +} |
