sparc cgen port

1 files changed, 135 insertions, 0 deletions

diff --git a/sim/sparc/Makefile.in b/sim/sparc/Makefile.in
new file mode 100644
index 0000000000..e708a0c3a3
--- /dev/null
+++ b/sim/sparc/Makefile.in
@@ -0,0 +1,135 @@
+# Makefile template for Configure for the sparc simulator
+# Copyright (C) 1999 Cygnus Solutions.
+
+## COMMON_PRE_CONFIG_FRAG
+
+SPARC32_OBJS = sparc32.o trap32.o dev32.o cpu32.o decode32.o model32.o mloop32.o sem32.o
+SPARC64_OBJS = sparc64.o trap64.o cpu64.o decode64.o model64.o mloop64.o sem64.o
+
+SIM_OBJS = \
+	$(SIM_NEW_COMMON_OBJS) \
+	sim-cpu.o \
+	sim-hload.o \
+	sim-hrw.o \
+	sim-model.o \
+	sim-reg.o \
+	cgen-utils.o cgen-trace.o cgen-scache.o \
+	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
+	sim-if.o sparc.o arch.o \
+	$(SPARC32_OBJS)
+
+# Extra headers included by sim-main.h.
+# This plus sim_main_headers is used by Make-common.in for files in common.
+SIM_EXTRA_DEPS = \
+	$(CGEN_INCLUDE_DEPS) \
+	arch.h cpuall.h cpu-opc.h
+# sparc-sim.h kept out for now (too much unnecessary recompilation)
+
+SIM_EXTRA_CFLAGS =
+
+SIM_RUN_OBJS = nrun.o
+SIM_EXTRA_CLEAN = sparc-clean
+
+# This selects the sparc newlib/libgloss syscall definitions.
+NL_TARGET = -DNL_TARGET_sparc
+
+## COMMON_POST_CONFIG_FRAG
+
+arch = sparc
+
+sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h dev32.h
+sparc.o: sparc.c $(SIM_MAIN_DEPS) \
+	$(srcdir)/../common/cgen-mem.h \
+	$(srcdir)/../common/cgen-ops.h
+arch.o: arch.c $(SIM_MAIN_DEPS)
+
+# sparc32 objs
+
+SPARC32_INCLUDE_DEPS = \
+	$(CGEN_MAIN_CPU_DEPS) \
+	cpu32.h decode32.h eng32.h \
+	regs32.h trap32.h
+
+sparc32.o: sparc32.c $(SPARC32_INCLUDE_DEPS)
+trap32.o: trap32.c $(SPARC32_INCLUDE_DEPS)
+dev32.o: dev32.c $(SPARC32_INCLUDE_DEPS) dev32.h
+
+# FIXME: Use of `mono' is wip.
+# FIXME: Add -fast when switching from -simple to -pbb.
+# FIXME: Add -switch sem32-switch.c at same time.
+mloop32.c eng32.h: stamp-mloop32
+stamp-mloop32: $(srcdir)/../common/genmloop.sh mloop32.in Makefile
+	$(SHELL) $(srccom)/genmloop.sh \
+		-mono -simple \
+		-cpu sparc32 -infile $(srcdir)/mloop32.in
+	$(SHELL) $(srcroot)/move-if-change eng.hin eng32.h
+	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop32.c
+	touch stamp-mloop32
+mloop32.o: mloop32.c sem32-switch.c $(SPARC32_INCLUDE_DEPS)
+
+cpu32.o: cpu32.c $(SPARC32_INCLUDE_DEPS)
+decode32.o: decode32.c $(SPARC32_INCLUDE_DEPS)
+model32.o: model32.c $(SPARC32_INCLUDE_DEPS)
+sem32.o: sem32.c $(SPARC32_INCLUDE_DEPS)
+
+# sparc64 objs
+
+SPARC64_INCLUDE_DEPS = \
+	$(CGEN_MAIN_CPU_DEPS) \
+	cpu64.h decode64.h eng64.h \
+	regs64.h trap64.h
+
+sparc64.o: sparc64.c $(SPARC64_INCLUDE_DEPS)
+trap64.o: trap64.c $(SPARC64_INCLUDE_DEPS)
+
+# FIXME: Use of `mono' is wip.
+mloop64.c eng64.h: stamp-mloop64
+stamp-mloop64: $(srcdir)/../common/genmloop.sh mloop64.in Makefile
+	$(SHELL) $(srccom)/genmloop.sh \
+		-mono -fast -pbb -switch sem64-switch.c \
+		-cpu sparc64 -infile $(srcdir)/mloop64.in
+	$(SHELL) $(srcroot)/move-if-change eng.hin eng64.h
+	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop64.c
+	touch stamp-mloop64
+mloop64.o: mloop64.c sem64-switch.c $(SPARC64_INCLUDE_DEPS)
+
+cpu64.o: cpu64.c $(SPARC64_INCLUDE_DEPS)
+decode64.o: decode64.c $(SPARC64_INCLUDE_DEPS)
+model64.o: model64.c $(SPARC64_INCLUDE_DEPS)
+
+sparc-clean:
+	rm -f mloop32.c eng32.h mloop64.c eng64.h stamp-mloop32 stamp-mloop64
+	rm -f stamp-arch stamp-cpu32 stamp-cpu64
+	rm -f tmp-*
+
+# cgen support
+
+stamp-arch: $(CGEN_MAIN_SCM) $(CGEN_ARCH_SCM) \
+		$(srccgen)/sparc.cpu $(srccgen)/sparccom.cpu \
+		$(srccgen)/sparc32.cpu $(srccgen)/sparc64.cpu
+	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=sparc-v8,sparclite
+	touch stamp-arch
+arch.h arch.c cpuall.h: $(CGEN_MAIN) stamp-arch
+	@true
+
+# Add with-scache to FLAGS when switching to -pbb.
+stamp-cpu32: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) \
+		$(srccgen)/sparc.cpu $(srccgen)/sparccom.cpu $(srccgen)/sparc32.cpu
+	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+		cpu=sparc32 mach=sparc-v8,sparclite SUFFIX=32 \
+		FLAGS="with-profile fn" \
+		EXTRAFILES="$(CGEN_CPU_SEM)"
+	touch stamp-cpu32
+cpu32.h decode32.h decode32.c model32.c sem32.c sem32-switch.c: $(CGEN_MAINT) stamp-cpu32
+	@true
+
+# Add with-scache to FLAGS when switching to -pbb.
+stamp-cpu64: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) \
+		$(srccgen)/sparc.cpu $(srccgen)/sparccom.cpu $(srccgen)/sparc64.cpu
+	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+		cpu=sparc64 mach=sparc-v9,sparc-v9a SUFFIX=64 \
+		FLAGS="with-profile fn" \
+		EXTRAFILES="$(CGEN_CPU_SEM)"
+	touch stamp-cpu64
+cpu64.h decode64.h decode64.c model64.c sem64.c sem64-switch.c: $(CGEN_MAINT) stamp-cpu64
+	@true