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| author | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:06:30 +0000 |
|---|---|---|
| committer | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:06:30 +0000 |
| commit | 4ef2594f4ed0fe4191d9e791e84b6241f968fc7c (patch) | |
| tree | 545186364e09c607b926694db19d6ec5755133f7 /sim/arm/armemu.h | |
| parent | 8de8f17e3d3138b6f1e31105823d8bb4efc66723 (diff) | |
| download | ppe42-binutils-4ef2594f4ed0fe4191d9e791e84b6241f968fc7c.tar.gz ppe42-binutils-4ef2594f4ed0fe4191d9e791e84b6241f968fc7c.zip | |
* armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.
(SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros.
(SETPSR, SET_INTMODE, SETCC): Removed.
* armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit
mask. Use SETPSR_* to modify PSR.
(ARMul_SetCPSR): Load all bits from value.
* armemu.c (ARMul_Emulate, msr): Do not test bit mask.
Diffstat (limited to 'sim/arm/armemu.h')
| -rw-r--r-- | sim/arm/armemu.h | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/sim/arm/armemu.h b/sim/arm/armemu.h index a51c67ea20..5e832f2e66 100644 --- a/sim/arm/armemu.h +++ b/sim/arm/armemu.h @@ -102,6 +102,11 @@ extern ARMword isize; #define ASSIGNINT(res) state->IFFlags = (((res) >> 6) & 3) #define ASSIGNR15INT(res) state->IFFlags = (((res) >> 26) & 3) ; +#define PSR_FBITS (0xff000000L) +#define PSR_SBITS (0x00ff0000L) +#define PSR_XBITS (0x0000ff00L) +#define PSR_CBITS (0x000000ffL) + #define CCBITS (0xf0000000L) #define INTBITS (0xc0L) @@ -159,9 +164,10 @@ extern ARMword isize; #endif #define GETSPSR(bank) bank>0?state->Spsr[bank]:ECC | EINT | EMODE ; -#define SETPSR(d,s) d = (s) & (ARMword)(CCBITS | INTBITS | MODEBITS) -#define SETINTMODE(d,s) d = ((d) & CCBITS) | ((s) & (INTBITS | MODEBITS)) -#define SETCC(d,s) d = ((d) & (INTBITS | MODEBITS)) | ((s) & CCBITS) +#define SETPSR_F(d,s) d = ((d) & ~PSR_FBITS) | ((s) & PSR_FBITS) +#define SETPSR_S(d,s) d = ((d) & ~PSR_SBITS) | ((s) & PSR_SBITS) +#define SETPSR_X(d,s) d = ((d) & ~PSR_XBITS) | ((s) & PSR_XBITS) +#define SETPSR_C(d,s) d = ((d) & ~PSR_CBITS) | ((s) & PSR_CBITS) #define SETR15PSR(s) if (state->Mode == USER26MODE) { \ state->Reg[15] = ((s) & CCBITS) | R15PC | ER15INT | EMODE ; \ ASSIGNN((state->Reg[15] & NBIT) != 0) ; \ |
