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authorAlan Modra <amodra@gmail.com>2005-04-19 04:50:37 +0000
committerAlan Modra <amodra@gmail.com>2005-04-19 04:50:37 +0000
commiteed0d89a39b01af05d393dcf91d2886f9eb3190a (patch)
treeb73c31708dcf83109d29a32814a95a05fa489ca7 /opcodes
parentd959e1a1931e7b9f71454e3435efb1b11016297b (diff)
downloadppe42-binutils-eed0d89a39b01af05d393dcf91d2886f9eb3190a.tar.gz
ppe42-binutils-eed0d89a39b01af05d393dcf91d2886f9eb3190a.zip
* ppc-opc.c (RTO): Define.
(powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE entries to suit PPC440.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/ppc-opc.c10
2 files changed, 10 insertions, 6 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 98171b89d5..cba7480266 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2005-04-19 Alan Modra <amodra@bigpond.net.au>
+
+ * ppc-opc.c (RTO): Define.
+ (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
+ entries to suit PPC440.
+
2005-04-18 Mark Kettenis <kettenis@gnu.org>
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index bf1796fabb..adefd94786 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -428,6 +428,7 @@ const struct powerpc_operand powerpc_operands[] =
/* The RS field of the tlbwe instruction, which is optional. */
#define RSO RTQ + 1
+#define RTO RSO
{ 5, 21, NULL, NULL, PPC_OPERAND_GPR | PPC_OPERAND_OPTIONAL },
/* The SH field in an X or M form instruction. */
@@ -4336,10 +4337,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{ "mbar", X(31,854), X_MASK, BOOKE, { MO } },
{ "eieio", X(31,854), 0xffffffff, PPC, { 0 } },
-{ "tlbsx", XRC(31,914,0), X_MASK, BOOKE, { RA, RB } },
-{ "tlbsx", XRC(31,914,0), X_MASK, PPC403, { RT, RA, RB } },
-{ "tlbsx.", XRC(31,914,1), X_MASK, BOOKE, { RA, RB } },
-{ "tlbsx.", XRC(31,914,1), X_MASK, PPC403, { RT, RA, RB } },
+{ "tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE, { RTO, RA, RB } },
+{ "tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE, { RTO, RA, RB } },
{ "tlbsxe", XRC(31,915,0), X_MASK, BOOKE64, { RA, RB } },
{ "tlbsxe.", XRC(31,915,1), X_MASK, BOOKE64, { RA, RB } },
@@ -4364,8 +4363,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{ "tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, { RT, RA } },
{ "tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, { RT, RA } },
-{ "tlbre", X(31,946), X_MASK, BOOKE, { 0 } },
-{ "tlbre", X(31,946), X_MASK, PPC403, { RS, RA, SH } },
+{ "tlbre", X(31,946), X_MASK, PPC403|BOOKE, { RSO, RAOPT, SHO } },
{ "sraiq", XRC(31,952,0), X_MASK, M601, { RA, RS, SH } },
{ "sraiq.", XRC(31,952,1), X_MASK, M601, { RA, RS, SH } },
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