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authorH.J. Lu <hjl.tools@gmail.com>2012-09-04 13:52:06 +0000
committerH.J. Lu <hjl.tools@gmail.com>2012-09-04 13:52:06 +0000
commitb3e14edafcdc558d724452ee5b803ff096c32d0f (patch)
tree44a3814f838c0bdf05c27616bfc7828962d33eb9 /opcodes/ia64-asmtab.h
parentc6d8cab4ac5c906937dcd4f884e65fb4d1052381 (diff)
downloadppe42-binutils-b3e14edafcdc558d724452ee5b803ff096c32d0f.tar.gz
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Add Intel Itanium Series 9500 support
bfd/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * cpu-ia64-opc.c (ins_cnt6a): New function. (ext_cnt6a): Ditto. (ins_strd5b): Ditto. (ext_strd5b): Ditto. (elf64_ia64_operands): Add new operand types. gas/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * config/tc-ia64.c (reg_symbol): Add a new register. (indirect_reg): Ditto. (pseudo_func): Add new symbolic constants. (operand_match): Add new operand types recognition. (operand_insn): Add new register recognition. (md_begin): Add new register definition. (specify_resource): Add new register recognition. gas/testsuite/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * gas/testsuite/gas/ia64/psn.d: New file. * gas/testsuite/gas/ia64/psn.s: New file. * gas/testsuite/gas/ia64/ia64.exp: Add new testcase. * gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests. * gas/testsuite/gas/ia64/opc-m.d: Ditto. include/opcode/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * ia64.h (ia64_opnd): Add new operand types. opcodes/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * ia64-asmtab.h (completer_index): Extend bitfield to full uint. * ia64-gen.c: Promote completer index type to longlong. (irf_operand): Add new register recognition. (in_iclass_mov_x): Add an entry for the new mov_* instruction type. (lookup_specifier): Add new resource recognition. (insert_bit_table_ent): Relax abort condition according to the changed completer index type. (print_dis_table): Fix printf format for completer index. * ia64-ic.tbl: Add a new instruction class. * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions. * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions. * ia64-opc.h: Define short names for new operand types. * ia64-raw.tbl: Add new RAW resource for DAHR register. * ia64-waw.tbl: Add new WAW resource for DAHR register. * ia64-asmtab.c: Regenerate.
Diffstat (limited to 'opcodes/ia64-asmtab.h')
-rw-r--r--opcodes/ia64-asmtab.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/ia64-asmtab.h b/opcodes/ia64-asmtab.h
index fbca883a46..757daca253 100644
--- a/opcodes/ia64-asmtab.h
+++ b/opcodes/ia64-asmtab.h
@@ -131,7 +131,7 @@ struct ia64_dis_names
bits.
There is always at least one 1 bit. */
- unsigned int completer_index : 20;
+ unsigned int completer_index ;
/* The index in the main_table[] array for the instruction. */
unsigned short insn_index : 11;
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