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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-08-01 20:20:49 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-08-01 20:20:49 +0000 |
| commit | 41989114b803bc1da171c59f941adf2064504473 (patch) | |
| tree | ed9a9c5ebe2bdb9af13452f11f6f0efe567f9475 /opcodes/ChangeLog | |
| parent | b2ae85cf8a39ee70458c7e971181929e1b99aa65 (diff) | |
| download | ppe42-binutils-41989114b803bc1da171c59f941adf2064504473.tar.gz ppe42-binutils-41989114b803bc1da171c59f941adf2064504473.zip | |
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add FP_D to VR5400 vector
instructions. Fix them to use WR_MACC instead of WR_CC and
add missing RD_MACCs.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 35e96332ea..b021f906cd 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,11 @@ 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com> + * mips-opc.c (mips_builtin_opcodes): Add FP_D to VR5400 vector + instructions. Fix them to use WR_MACC instead of WR_CC and + add missing RD_MACCs. + +2013-08-01 Richard Sandiford <rdsandiford@googlemail.com> + * mips-dis.c (print_mips16_insn_arg): Include ISA bit in base address. 2013-07-29 Peter Bergner <bergner@vnet.ibm.com> |
