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author | Stan Shebs <shebs@codesourcery.com> | 1995-01-17 04:36:51 +0000 |
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committer | Stan Shebs <shebs@codesourcery.com> | 1995-01-17 04:36:51 +0000 |
commit | 18b46e7c5378bb16c32827413376fa5982a4d8eb (patch) | |
tree | bd8cfc626d718a51ef2326c9ba8f79e102525bc9 /gdb/pyr-tdep.c | |
parent | 83d9bb1416873498a6eb2da72e01fcdcb51b6370 (diff) | |
download | ppe42-binutils-18b46e7c5378bb16c32827413376fa5982a4d8eb.tar.gz ppe42-binutils-18b46e7c5378bb16c32827413376fa5982a4d8eb.zip |
General cleanup and simplication of disassembler interface.
* a29k-pinsn.c, arm-pinsn.c, convex-pinsn.c, gould-pinsn.c,
hppa-pinsn.c, i386-pinsn.c, i960-pinsn.c, m68k-pinsn.c,
m88k-pinsn.c, mips-pinsn.c, ns32k-pinsn.c, pyr-pinsn.c,
rs6000-pinsn.c, sparc-pinsn.c, tahoe-pinsn.c, vax-pinsn.c: Remove.
* gould-tdep.c, ns32k-tdep.c, tahoe-tdep.c, vax-tdep.c: New files,
had been -pinsn.c files.
* Makefile.in (ALLDEPFILES): Remove removed files.
(a29k-pinsn.o, arm-pinsn.o, convex-pinsn.o, gould-pinsn.o,
hppa-pinsn.o, i386-pinsn.o, i960-pinsn.o, m68k-pinsn.o,
m88k-pinsn.o, mips-pinsn.o, ns32k-pinsn.o, pyr-pinsn.o,
rs6000-pinsn.o, sparc-pinsn.o, tahoe-pinsn.o, vax-pinsn.o):
Remove compile actions.
* arm-tdep.o, gould-tdep.o, ns32k-tdep.o, tahoe-tdep.o,
vax-tdep.o: Add compile actions.
* defs.h (tm_print_insn): New global.
* a29k-tdep.c (gdb_print_insn_a29k): New function.
(_initialize_a29k_tdep): Rename from _initialize_29k,
set tm_print_insn.
* alpha-tdep.c (print_insn): Remove.
(_initialize_alpha_tdep): Set tm_print_insn.
* arm-tdep.c (arm_print_insn): New function, was print_insn
in arm-pinsn.c.
* convex-tdep.c (convex_print_insn): New function, was print_insn
in convex-pinsn.c.
* h8300-tdep.c (print_insn): Remove.
(gdb_print_insn_h8300): New function.
(_initialize_h8300_tdep): New function.
* h8500-tdep.c (print_insn): Remove.
(_initialize_h8500_tdep): New function.
* hppa-tdep.c (_initialize_hppa_tdep): Set tm_print_insn.
* i386-tdep.c (_initialize_i386_tdep): New function.
* i960-tdep.c (mem, next_insn): New functions, were in
i960-pinsn.c.
(_initialize_i960_tdep): Set tm_print_insn.
* m68k-tdep.c (_initialize_m68k_tdep): New function.
* m88k-tdep.c (_initialize_m88k_tdep): New function.
* mips-tdep.c (gdb_print_insn_mips): New function.
(_initialize_mips_tdep): Set tm_print_insn.
* pyr-tdep.c (pyr_print_insn): New function, was print_insn
in pyr-pinsn.c.
* rs6000-tdep.c (_initialize_rs6000_tdep): New function.
* sh-tdep.c (print_insn): Remove.
(gdb_print_insn_sh): New function.
(_initialize_sh_tdep): Set tm_print_insn.
* sparc-tdep.c (_initialize_sparc_tdep): New function.
* w65-tdep.c (print_insn): Remove.
(_initialize_w65_tdep): New function.
* z8k-tdep.c (print_insn): Remove.
(gdb_print_insn_z8k): New function.
(_initialize_z8k_tdep): Set tm_print_insn.
* printcmd.c (print_insn): New function, generic disassembler.
* config/*/*.mt (TDEPFILES): Remove refs to *-pinsn.o.
* defs.h (query_hook, error_hook): Fix prototypes.
Diffstat (limited to 'gdb/pyr-tdep.c')
-rw-r--r-- | gdb/pyr-tdep.c | 319 |
1 files changed, 319 insertions, 0 deletions
diff --git a/gdb/pyr-tdep.c b/gdb/pyr-tdep.c index 70d3e8c539..43548e8af0 100644 --- a/gdb/pyr-tdep.c +++ b/gdb/pyr-tdep.c @@ -131,3 +131,322 @@ CORE_ADDR frame_args_addr (frame) There seems to be a bug in the way the innermost frame is set up. */ return ((frame->next) ? result: frame->frame_cfp); } + +#include "symtab.h" +#include "opcode/pyr.h" +#include "gdbcore.h" + + +/* A couple of functions used for debugging frame-handling on + Pyramids. (The Pyramid-dependent handling of register values for + windowed registers is known to be buggy.) + + When debugging, these functions can supplant the normal definitions of some + of the macros in tm-pyramid.h The quantity of information produced + when these functions are used makes the gdb unusable as a + debugger for user programs. */ + +extern unsigned pyr_saved_pc(), pyr_frame_chain(); + +CORE_ADDR pyr_frame_chain(frame) + CORE_ADDR frame; +{ + int foo=frame - CONTROL_STACK_FRAME_SIZE; + /* printf_unfiltered ("...following chain from %x: got %x\n", frame, foo);*/ + return foo; +} + +CORE_ADDR pyr_saved_pc(frame) + CORE_ADDR frame; +{ + int foo=0; + foo = read_memory_integer (((CORE_ADDR)(frame))+60, 4); + printf_unfiltered ("..reading pc from frame 0x%0x+%d regs: got %0x\n", + frame, 60/4, foo); + return foo; +} + +/* Pyramid instructions are never longer than this many bytes. */ +#define MAXLEN 24 + +/* Number of elements in the opcode table. */ +/*const*/ static int nopcodes = (sizeof (pyr_opcodes) / sizeof( pyr_opcodes[0])); +#define NOPCODES (nopcodes) + +/* Let's be byte-independent so we can use this as a cross-assembler. */ + +#define NEXTLONG(p) \ + (p += 4, (((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]) + +/* Print one instruction at address MEMADDR in debugged memory, + on STREAM. Returns length of the instruction, in bytes. */ + +int +pyr_print_insn (memaddr, stream) + CORE_ADDR memaddr; + FILE *stream; +{ + unsigned char buffer[MAXLEN]; + register int i, nargs, insn_size =4; + register unsigned char *p; + register char *d; + register int insn_opcode, operand_mode; + register int index_multiplier, index_reg_regno, op_1_regno, op_2_regno ; + long insn; /* first word of the insn, not broken down. */ + pyr_insn_format insn_decode; /* the same, broken out into op{code,erands} */ + long extra_1, extra_2; + + read_memory (memaddr, buffer, MAXLEN); + insn_decode = *((pyr_insn_format *) buffer); + insn = * ((int *) buffer); + insn_opcode = insn_decode.operator; + operand_mode = insn_decode.mode; + index_multiplier = insn_decode.index_scale; + index_reg_regno = insn_decode.index_reg; + op_1_regno = insn_decode.operand_1; + op_2_regno = insn_decode.operand_2; + + + if (*((int *)buffer) == 0x0) { + /* "halt" looks just like an invalid "jump" to the insn decoder, + so is dealt with as a special case */ + fprintf_unfiltered (stream, "halt"); + return (4); + } + + for (i = 0; i < NOPCODES; i++) + if (pyr_opcodes[i].datum.code == insn_opcode) + break; + + if (i == NOPCODES) + /* FIXME: Handle unrecognised instructions better. */ + fprintf_unfiltered (stream, "???\t#%08x\t(op=%x mode =%x)", + insn, insn_decode.operator, insn_decode.mode); + else + { + /* Print the mnemonic for the instruction. Pyramid insn operands + are so regular that we can deal with almost all of them + separately. + Unconditional branches are an exception: they are encoded as + conditional branches (branch if false condition, I think) + with no condition specified. The average user will not be + aware of this. To maintain their illusion that an + unconditional branch insn exists, we will have to FIXME to + treat the insn mnemnonic of all branch instructions here as a + special case: check the operands of branch insn and print an + appropriate mnemonic. */ + + fprintf_unfiltered (stream, "%s\t", pyr_opcodes[i].name); + + /* Print the operands of the insn (as specified in + insn.operand_mode). + Branch operands of branches are a special case: they are a word + offset, not a byte offset. */ + + if (insn_decode.operator == 0x01 || insn_decode.operator == 0x02) { + register int bit_codes=(insn >> 16)&0xf; + register int i; + register int displacement = (insn & 0x0000ffff) << 2; + + static char cc_bit_names[] = "cvzn"; /* z,n,c,v: strange order? */ + + /* Is bfc and no bits specified an unconditional branch?*/ + for (i=0;i<4;i++) { + if ((bit_codes) & 0x1) + fputc_unfiltered (cc_bit_names[i], stream); + bit_codes >>= 1; + } + + fprintf_unfiltered (stream, ",%0x", + displacement + memaddr); + return (insn_size); + } + + switch (operand_mode) { + case 0: + fprintf_unfiltered (stream, "%s,%s", + reg_names [op_1_regno], + reg_names [op_2_regno]); + break; + + case 1: + fprintf_unfiltered (stream, " 0x%0x,%s", + op_1_regno, + reg_names [op_2_regno]); + break; + + case 2: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + fprintf_unfiltered (stream, " $0x%0x,%s", + extra_1, + reg_names [op_2_regno]); + break; + case 3: + fprintf_unfiltered (stream, " (%s),%s", + reg_names [op_1_regno], + reg_names [op_2_regno]); + break; + + case 4: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + fprintf_unfiltered (stream, " 0x%0x(%s),%s", + extra_1, + reg_names [op_1_regno], + reg_names [op_2_regno]); + break; + + /* S1 destination mode */ + case 5: + fprintf_unfiltered (stream, + ((index_reg_regno) ? "%s,(%s)[%s*%1d]" : "%s,(%s)"), + reg_names [op_1_regno], + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + + case 6: + fprintf_unfiltered (stream, + ((index_reg_regno) ? " $%#0x,(%s)[%s*%1d]" + : " $%#0x,(%s)"), + op_1_regno, + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + + case 7: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + fprintf_unfiltered (stream, + ((index_reg_regno) ? " $%#0x,(%s)[%s*%1d]" + : " $%#0x,(%s)"), + extra_1, + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + + case 8: + fprintf_unfiltered (stream, + ((index_reg_regno) ? " (%s),(%s)[%s*%1d]" : " (%s),(%s)"), + reg_names [op_1_regno], + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + + case 9: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + fprintf_unfiltered (stream, + ((index_reg_regno) + ? "%#0x(%s),(%s)[%s*%1d]" + : "%#0x(%s),(%s)"), + extra_1, + reg_names [op_1_regno], + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + + /* S2 destination mode */ + case 10: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + fprintf_unfiltered (stream, + ((index_reg_regno) ? "%s,%#0x(%s)[%s*%1d]" : "%s,%#0x(%s)"), + reg_names [op_1_regno], + extra_1, + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + case 11: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + fprintf_unfiltered (stream, + ((index_reg_regno) ? + " $%#0x,%#0x(%s)[%s*%1d]" : " $%#0x,%#0x(%s)"), + op_1_regno, + extra_1, + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + case 12: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + read_memory (memaddr+8, buffer, MAXLEN); + insn_size += 4; + extra_2 = * ((int *) buffer); + fprintf_unfiltered (stream, + ((index_reg_regno) ? + " $%#0x,%#0x(%s)[%s*%1d]" : " $%#0x,%#0x(%s)"), + extra_1, + extra_2, + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + + case 13: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + fprintf_unfiltered (stream, + ((index_reg_regno) + ? " (%s),%#0x(%s)[%s*%1d]" + : " (%s),%#0x(%s)"), + reg_names [op_1_regno], + extra_1, + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + case 14: + read_memory (memaddr+4, buffer, MAXLEN); + insn_size += 4; + extra_1 = * ((int *) buffer); + read_memory (memaddr+8, buffer, MAXLEN); + insn_size += 4; + extra_2 = * ((int *) buffer); + fprintf_unfiltered (stream, + ((index_reg_regno) ? "%#0x(%s),%#0x(%s)[%s*%1d]" + : "%#0x(%s),%#0x(%s) "), + extra_1, + reg_names [op_1_regno], + extra_2, + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + break; + + default: + fprintf_unfiltered (stream, + ((index_reg_regno) ? "%s,%s [%s*%1d]" : "%s,%s"), + reg_names [op_1_regno], + reg_names [op_2_regno], + reg_names [index_reg_regno], + index_multiplier); + fprintf_unfiltered (stream, + "\t\t# unknown mode in %08x", + insn); + break; + } /* switch */ + } + + { + return insn_size; + } + abort (); +} |