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| author | Ulrich Weigand <uweigand@de.ibm.com> | 2011-04-01 19:38:15 +0000 |
|---|---|---|
| committer | Ulrich Weigand <uweigand@de.ibm.com> | 2011-04-01 19:38:15 +0000 |
| commit | 2b9e5ea6041faa2392694bb215e12a134cef2145 (patch) | |
| tree | 2210f6633ca6c9301cf641f03f812416a1cde67f /gdb/arm-tdep.c | |
| parent | c5f5c3c232622ca70b0864974e1d89105caca9a8 (diff) | |
| download | ppe42-binutils-2b9e5ea6041faa2392694bb215e12a134cef2145.tar.gz ppe42-binutils-2b9e5ea6041faa2392694bb215e12a134cef2145.zip | |
* arm-tdep.c (arm_gdbarch_init): Enfore correct register number
for "fpscr" in target description.
Diffstat (limited to 'gdb/arm-tdep.c')
| -rw-r--r-- | gdb/arm-tdep.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 9d8f5ba86e..bb52ad4255 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -8387,8 +8387,13 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) if (!valid_p) break; } + if (!valid_p && i == 16) + valid_p = 1; - if (!valid_p && i != 16) + /* Also require FPSCR. */ + valid_p &= tdesc_numbered_register (feature, tdesc_data, + ARM_FPSCR_REGNUM, "fpscr"); + if (!valid_p) { tdesc_data_cleanup (tdesc_data); return NULL; |
