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authorH.J. Lu <hjl.tools@gmail.com>2008-06-03 17:31:52 +0000
committerH.J. Lu <hjl.tools@gmail.com>2008-06-03 17:31:52 +0000
commitcb19c0328d94a02c4754cc3d7b4ae2a28f888c46 (patch)
tree019f2214ff7061334785caf59911468bb7a51e25 /gas
parent4ecab7d4c2ad7a2bafc49e731fd22e9a74713d89 (diff)
downloadppe42-binutils-cb19c0328d94a02c4754cc3d7b4ae2a28f888c46.tar.gz
ppe42-binutils-cb19c0328d94a02c4754cc3d7b4ae2a28f888c46.zip
gas/
2008-06-03 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (set_sse_check): New. (md_pseudo_table): Add "sse_check". gas/testsuite/ 2008-06-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run sse-check-none and x86-64-sse-check-none. * gas/i386/sse-check-none.d: New. * gas/i386/sse-check-none.s: Likewise. * gas/i386/x86-64-sse-check-none.d: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-i386.c28
-rw-r--r--gas/testsuite/ChangeLog9
-rw-r--r--gas/testsuite/gas/i386/i386.exp2
-rw-r--r--gas/testsuite/gas/i386/sse-check-none.d16
-rw-r--r--gas/testsuite/gas/i386/sse-check-none.s21
-rw-r--r--gas/testsuite/gas/i386/x86-64-sse-check-none.d17
7 files changed, 98 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index afc296990f..46f9f8c00f 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (set_sse_check): New.
+ (md_pseudo_table): Add "sse_check".
+
2008-06-03 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (do_t_rbit): Populate both rm fields.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 19a3ff0a4a..eeab7dc56d 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -183,6 +183,7 @@ static void set_16bit_gcc_code_flag (int);
static void set_intel_syntax (int);
static void set_intel_mnemonic (int);
static void set_allow_index_reg (int);
+static void set_sse_check (int);
static void set_cpu_arch (int);
#ifdef TE_PE
static void pe_directive_secrel (int);
@@ -711,6 +712,7 @@ const pseudo_typeS md_pseudo_table[] =
{"att_mnemonic", set_intel_mnemonic, 0},
{"allow_index_reg", set_allow_index_reg, 1},
{"disallow_index_reg", set_allow_index_reg, 0},
+ {"sse_check", set_sse_check, 0},
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
{"largecomm", handle_large_common, 0},
#else
@@ -1852,6 +1854,32 @@ set_allow_index_reg (int flag)
}
static void
+set_sse_check (int dummy ATTRIBUTE_UNUSED)
+{
+ SKIP_WHITESPACE ();
+
+ if (!is_end_of_line[(unsigned char) *input_line_pointer])
+ {
+ char *string = input_line_pointer;
+ int e = get_symbol_end ();
+
+ if (strcmp (string, "none") == 0)
+ sse_check = sse_check_none;
+ else if (strcmp (string, "warning") == 0)
+ sse_check = sse_check_warning;
+ else if (strcmp (string, "error") == 0)
+ sse_check = sse_check_error;
+ else
+ as_bad (_("bad argument to sse_check directive."));
+ *input_line_pointer = e;
+ }
+ else
+ as_bad (_("missing argument for sse_check directive"));
+
+ demand_empty_rest_of_line ();
+}
+
+static void
set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
{
SKIP_WHITESPACE ();
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index dcc8f91db1..e5738e009b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/i386.exp: Run sse-check-none and
+ x86-64-sse-check-none.
+
+ * gas/i386/sse-check-none.d: New.
+ * gas/i386/sse-check-none.s: Likewise.
+ * gas/i386/x86-64-sse-check-none.d: Likewise.
+
2008-06-03 Paul Brook <paul@codesourcery.com>
* gas/arm/thumb32.d: Update expected output.
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 9805db7894..0afe9eb3a2 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -125,6 +125,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "sse2avx"
run_list_test "inval-avx" "-al"
run_dump_test "sse-check"
+ run_dump_test "sse-check-none"
run_dump_test "sse-check-warn"
run_list_test "sse-check-error" "-msse-check=error -I${srcdir}/$subdir -al"
run_dump_test "sse-noavx"
@@ -261,6 +262,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-sse2avx"
run_list_test "x86-64-inval-avx" "-al"
run_dump_test "x86-64-sse-check"
+ run_dump_test "x86-64-sse-check-none"
run_dump_test "x86-64-sse-check-warn"
run_list_test "x86-64-sse-check-error" "-msse-check=error -I${srcdir}/$subdir -al"
run_dump_test "x86-64-sse-noavx"
diff --git a/gas/testsuite/gas/i386/sse-check-none.d b/gas/testsuite/gas/i386/sse-check-none.d
new file mode 100644
index 0000000000..87189f616e
--- /dev/null
+++ b/gas/testsuite/gas/i386/sse-check-none.d
@@ -0,0 +1,16 @@
+#as: -msse-check=error
+#objdump: -dw
+#name: i386 SSE check (.sse_check none)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
+#pass
diff --git a/gas/testsuite/gas/i386/sse-check-none.s b/gas/testsuite/gas/i386/sse-check-none.s
new file mode 100644
index 0000000000..336dd9f733
--- /dev/null
+++ b/gas/testsuite/gas/i386/sse-check-none.s
@@ -0,0 +1,21 @@
+# Check SSE instructions
+
+ .sse_check none
+ .text
+_start:
+
+# SSE instruction
+ addps %xmm2,%xmm1
+
+# SSE2 instruction
+ addpd %xmm2,%xmm1
+
+# SSE3 instruction
+ addsubpd %xmm2,%xmm1
+
+# SSSE3 instruction
+ phaddw %xmm2,%xmm1
+
+# SSE4 instructions
+ blendvpd %xmm0,%xmm1,%xmm0
+ pcmpgtq %xmm1,%xmm0
diff --git a/gas/testsuite/gas/i386/x86-64-sse-check-none.d b/gas/testsuite/gas/i386/x86-64-sse-check-none.d
new file mode 100644
index 0000000000..ef38d8a8ab
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-sse-check-none.d
@@ -0,0 +1,17 @@
+#source: sse-check-none.s
+#as: -msse-check=error
+#objdump: -dw
+#name: x86-64 SSE check (.sse_check none)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
+#pass
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