gas/testsuite/

	* gas/arm/copro.d, gas/arm/fp-save.d, gas/arm/float.d,
	gas/arm/fpa-mem.d: Update for removed generic coprocessor instructions
	and expanded PC-relative offsets.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Use %A instead of %C.  Remove
	generic coprocessor instructions for FPA loads and stores.
	(print_insn_coprocessor): Remove %C support.  Display address for
	PC-relative offsets in %A.

5 files changed, 17 insertions, 11 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index ea1fd5148e..4b89cf0c01 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2009-11-12  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	* gas/arm/copro.d, gas/arm/fp-save.d, gas/arm/float.d,
+	gas/arm/fpa-mem.d: Update for removed generic coprocessor instructions
+	and expanded PC-relative offsets.
+
 2009-11-11  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/i386/prefix.d: Swap order of ADDR and REP prefixes.
diff --git a/gas/testsuite/gas/arm/copro.d b/gas/testsuite/gas/arm/copro.d
index 86340c4e91..e041270cac 100644
--- a/gas/testsuite/gas/arm/copro.d
+++ b/gas/testsuite/gas/arm/copro.d
@@ -13,12 +13,12 @@ Disassembly of section .text:
 0+00c <[^>]*> edd1e108 	ldfp	f6, \[r1, #32\]
 0+010 <[^>]*> 4db200ff 	ldcmi	0, cr0, \[r2, #1020\]!.*
 0+014 <[^>]*> 5cf31710 	ldclpl	7, cr1, \[r3\], #64.*
-0+018 <[^>]*> ed1f8001 	ldc	0, cr8, \[pc, #-4\]
+0+018 <[^>]*> ed1f8001 	ldc	0, cr8, \[pc, #-4\]	; .* <foo>
 0+01c <[^>]*> ed830500 	cfstr32	mvfx0, \[r3\]
 0+020 <[^>]*> edc0f302 	stcl	3, cr15, \[r0, #8\]
 0+024 <[^>]*> 0da2c419 	cfstrseq	mvf12, \[r2, #100\]!.*
 0+028 <[^>]*> 3ca4860c 	stccc	6, cr8, \[r4\], #48.*
-0+02c <[^>]*> ed0f7101 	stfs	f7, \[pc, #-4\]
+0+02c <[^>]*> ed0f7101 	stfs	f7, \[pc, #-4\]	; .* <bar>
 0+030 <[^>]*> ee715212 	mrc	2, 3, r5, cr1, cr2, \{0\}
 0+034 <[^>]*> aeb1f4f2 	mrcge	4, 5, pc, cr1, cr2, \{7\}
 0+038 <[^>]*> ee215711 	mcr	7, 1, r5, cr1, cr1, \{0\}
diff --git a/gas/testsuite/gas/arm/float.d b/gas/testsuite/gas/arm/float.d
index 16d7eba269..c04943099a 100644
--- a/gas/testsuite/gas/arm/float.d
+++ b/gas/testsuite/gas/arm/float.d
@@ -119,13 +119,13 @@ Disassembly of section .text:
 0+1bc <[^>]+> 0ef3f114 ?	cnfeeq	f3, f4
 0+1c0 <[^>]+> 0ef4f117 ?	cnfeeq	f4, f7
 0+1c4 <[^>]+> eef4f11d ?	cnfe	f4, #5\.0
-0+1c8 <[^>]+> ed900200 ?	lfm	f0, 4, \[r0\]	; \(ldc 2, cr0, \[r0\]\)
-0+1cc <[^>]+> ed900200 ?	lfm	f0, 4, \[r0\]	; \(ldc 2, cr0, \[r0\]\)
+0+1c8 <[^>]+> ed900200 ?	lfm	f0, 4, \[r0\]
+0+1cc <[^>]+> ed900200 ?	lfm	f0, 4, \[r0\]
 0+1d0 <[^>]+> ed911210 ?	lfm	f1, 4, \[r1, #64\].*
 0+1d4 <[^>]+> edae22ff ?	sfm	f2, 4, \[lr, #1020\]!.*
 0+1d8 <[^>]+> 0c68f2ff ?	sfmeq	f7, 3, \[r8\], #-1020.*
-0+1dc <[^>]+> eddf6200 ?	lfm	f6, 2, \[pc\]	; \(ldcl 2, cr6, \[pc\]\)
-0+1e0 <[^>]+> eca8f203 ?	sfm	f7, 1, \[r8\], #12	; \(stc 2, cr15, \[r8\], #12\)
+0+1dc <[^>]+> eddf6200 ?	lfm	f6, 2, \[pc\]	; .* <l\+.*>
+0+1e0 <[^>]+> eca8f203 ?	sfm	f7, 1, \[r8\], #12
 0+1e4 <[^>]+> 0d16520c ?	lfmeq	f5, 4, \[r6, #-48\].*
 0+1e8 <[^>]+> 1d42c209 ?	sfmne	f4, 3, \[r2, #-36\].*
 0+1ec <[^>]+> 1d62c209 ?	sfmne	f4, 3, \[r2, #-36\]!.*
diff --git a/gas/testsuite/gas/arm/fp-save.d b/gas/testsuite/gas/arm/fp-save.d
index ddf1beb881..d32d93065f 100644
--- a/gas/testsuite/gas/arm/fp-save.d
+++ b/gas/testsuite/gas/arm/fp-save.d
@@ -6,4 +6,4 @@
 .*: *file format .*arm.*
 
 Disassembly of section .text:
-0+00 <[^>]*> ed2dc203[ 	]+sfm[ 	]+f4, 1, \[sp, #-12\]!	; \(stc 2, cr12, \[sp, #-12\]!\)
+0+00 <[^>]*> ed2dc203[ 	]+sfm[ 	]+f4, 1, \[sp, #-12\]!
diff --git a/gas/testsuite/gas/arm/fpa-mem.d b/gas/testsuite/gas/arm/fpa-mem.d
index 18000b9dfc..4a638e1f90 100644
--- a/gas/testsuite/gas/arm/fpa-mem.d
+++ b/gas/testsuite/gas/arm/fpa-mem.d
@@ -24,11 +24,11 @@ Disassembly of section .text:
 0+34 <[^>]*> ec600101 ?	stfe	f0, \[r0\], #-4
 0+38 <[^>]*> edc08100 ?	stfp	f0, \[r0\]
 0+3c <[^>]*> ec608101 ?	stfp	f0, \[r0\], #-4
-0+40 <[^>]*> ed900200 ?	lfm	f0, 4, \[r0\]	; \(ldc 2, cr0, \[r0\]\)
-0+44 <[^>]*> ed900200 ?	lfm	f0, 4, \[r0\]	; \(ldc 2, cr0, \[r0\]\)
+0+40 <[^>]*> ed900200 ?	lfm	f0, 4, \[r0\]
+0+44 <[^>]*> ed900200 ?	lfm	f0, 4, \[r0\]
 0+48 <[^>]*> ed10020c ?	lfm	f0, 4, \[r0, #-48\].*
-0+4c <[^>]*> ed800200 ?	sfm	f0, 4, \[r0\]	; \(stc 2, cr0, \[r0\]\)
+0+4c <[^>]*> ed800200 ?	sfm	f0, 4, \[r0\]
 0+50 <[^>]*> ed00020c ?	sfm	f0, 4, \[r0, #-48\].*
-0+54 <[^>]*> ed800200 ?	sfm	f0, 4, \[r0\]	; \(stc 2, cr0, \[r0\]\)
+0+54 <[^>]*> ed800200 ?	sfm	f0, 4, \[r0\]
 0+58 <[^>]*> 5d800100 ?	stfpls	f0, \[r0\]
 0+5c <[^>]*> 5d800100 ?	stfpls	f0, \[r0\]