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| author | Paul Brook <paul@codesourcery.com> | 2006-02-24 15:36:36 +0000 |
|---|---|---|
| committer | Paul Brook <paul@codesourcery.com> | 2006-02-24 15:36:36 +0000 |
| commit | 62b3e31101ef2dfb96ee4652d5145e722b335e31 (patch) | |
| tree | 33f499d017d6339d98b731f279c3eb847a719d7f /gas/testsuite/gas/arm/thumb32.d | |
| parent | 15c46491c2ae1e2a5a9168f78e05c76bc3eb31a8 (diff) | |
| download | ppe42-binutils-62b3e31101ef2dfb96ee4652d5145e722b335e31.tar.gz ppe42-binutils-62b3e31101ef2dfb96ee4652d5145e722b335e31.zip | |
2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
(struct asm_barrier_opt): Define.
(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
(parse_psr): Accept V7M psr names.
(parse_barrier): New function.
(enum operand_parse_code): Add OP_oBARRIER.
(parse_operands): Implement OP_oBARRIER.
(do_barrier): New function.
(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
(do_t_cpsi): Add V7M restrictions.
(do_t_mrs, do_t_msr): Validate V7M variants.
(md_assemble): Check for NULL variants.
(v7m_psrs, barrier_opt_names): New tables.
(insns): Add V7 instructions. Mark V6 instructions absent from V7M.
(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
(struct cpu_arch_ver_table): Define.
(cpu_arch_ver): New.
(aeabi_set_public_attributes): Use cpu_arch_ver. Set
Tag_CPU_arch_profile.
* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected msr and mrs output.
* gas/arm/arch7.d: New test.
* gas/arm/arch7.s: New test.
* gas/arm/arch7m-bad.l: New test.
* gas/arm/arch7m-bad.d: New test.
* gas/arm/arch7m-bad.s: New test.
include/opcode/
* arm.h: Add V7 feature bits.
opcodes/
* arm-dis.c (arm_opcodes): Add V7 instructions.
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
(print_arm_address): New function.
(print_insn_arm): Use it. Add 'P' and 'U' cases.
(psr_name): New function.
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
Diffstat (limited to 'gas/testsuite/gas/arm/thumb32.d')
| -rw-r--r-- | gas/testsuite/gas/arm/thumb32.d | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d index e811b14ada..0aac53a0ca 100644 --- a/gas/testsuite/gas/arm/thumb32.d +++ b/gas/testsuite/gas/arm/thumb32.d @@ -631,16 +631,16 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> f240 5000 movw r0, #1280 ; 0x500 0[0-9a-f]+ <[^>]+> f240 0081 movw r0, #129 ; 0x81 0[0-9a-f]+ <[^>]+> f64f 70ff movw r0, #65535 ; 0xffff -0[0-9a-f]+ <[^>]+> f3ef 8000 mrs r0, SPSR -0[0-9a-f]+ <[^>]+> f3ff 8000 mrs r0, CPSR -0[0-9a-f]+ <[^>]+> f3ef 8900 mrs r9, SPSR -0[0-9a-f]+ <[^>]+> f3ff 8900 mrs r9, CPSR -0[0-9a-f]+ <[^>]+> f380 8100 msr SPSR_c, r0 -0[0-9a-f]+ <[^>]+> f390 8100 msr CPSR_c, r0 -0[0-9a-f]+ <[^>]+> f389 8100 msr SPSR_c, r9 -0[0-9a-f]+ <[^>]+> f380 8200 msr SPSR_x, r0 -0[0-9a-f]+ <[^>]+> f380 8400 msr SPSR_s, r0 -0[0-9a-f]+ <[^>]+> f380 8800 msr SPSR_f, r0 +0[0-9a-f]+ <[^>]+> f3ef 8000 mrs r0, CPSR +0[0-9a-f]+ <[^>]+> f3ff 8000 mrs r0, SPSR +0[0-9a-f]+ <[^>]+> f3ef 8900 mrs r9, CPSR +0[0-9a-f]+ <[^>]+> f3ff 8900 mrs r9, SPSR +0[0-9a-f]+ <[^>]+> f380 8100 msr CPSR_c, r0 +0[0-9a-f]+ <[^>]+> f390 8100 msr SPSR_c, r0 +0[0-9a-f]+ <[^>]+> f389 8100 msr CPSR_c, r9 +0[0-9a-f]+ <[^>]+> f380 8200 msr CPSR_x, r0 +0[0-9a-f]+ <[^>]+> f380 8400 msr CPSR_s, r0 +0[0-9a-f]+ <[^>]+> f380 8800 msr CPSR_f, r0 0[0-9a-f]+ <[^>]+> fb00 f000 mul\.w r0, r0, r0 0[0-9a-f]+ <[^>]+> fb09 f000 mul\.w r0, r9, r0 0[0-9a-f]+ <[^>]+> fb00 f009 mul\.w r0, r0, r9 |
