Support for Toshiba MeP and for complex relocations.

1 files changed, 326 insertions, 1 deletions

diff --git a/gas/cgen.c b/gas/cgen.c
index 5a53789995..5b0694b03e 100644
--- a/gas/cgen.c
+++ b/gas/cgen.c
@@ -26,6 +26,27 @@
 #include "cgen.h"
 #include "dwarf2dbg.h"
 
+#include "symbols.h"
+#include "struc-symbol.h"
+
+#ifdef OBJ_COMPLEX_RELC
+static expressionS * make_right_shifted_expr
+  (expressionS *, const int, const int);
+
+static unsigned long gas_cgen_encode_addend
+  (const unsigned long, const unsigned long, const unsigned long, \
+   const unsigned long, const unsigned long, const unsigned long, \
+   const unsigned long);
+
+static char * weak_operand_overflow_check
+  (const expressionS *, const CGEN_OPERAND *);
+
+static void queue_fixup_recursively
+  (const int, const int, expressionS *, \
+   const CGEN_MAYBE_MULTI_IFLD *, const int, const int);
+
+static int rightshift = 0;
+#endif
 static void queue_fixup (int, int, expressionS *);
 
 /* Opcode table descriptor, must be set by md_begin.  */
@@ -63,6 +84,8 @@ struct fixup
   int opindex;
   int opinfo;
   expressionS exp;
+  struct cgen_maybe_multi_ifield * field;
+  int msb_field_p;
 };
 
 static struct fixup fixups[GAS_CGEN_MAX_FIXUPS];
@@ -246,6 +269,8 @@ gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offse
 		     + (int) operand->type));
   fixP->fx_cgen.insn = insn;
   fixP->fx_cgen.opinfo = opinfo;
+  fixP->fx_cgen.field = NULL;
+  fixP->fx_cgen.msb_field_p = 0;
 
   return fixP;
 }
@@ -284,10 +309,26 @@ gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
 			 + (int) operand->type));
   fixP->fx_cgen.insn = insn;
   fixP->fx_cgen.opinfo = opinfo;
+  fixP->fx_cgen.field = NULL;
+  fixP->fx_cgen.msb_field_p = 0;
 
   return fixP;
 }
 
+#ifdef OBJ_COMPLEX_RELC
+static symbolS *
+expr_build_binary (operatorT op, symbolS * s1, symbolS * s2)
+{
+  expressionS e;
+
+  e.X_op = op;
+  e.X_add_symbol = s1;
+  e.X_op_symbol = s2;
+  e.X_add_number = 0;
+  return make_expr_symbol (& e);
+}
+#endif
+
 /* Used for communication between the next two procedures.  */
 static jmp_buf expr_jmp_buf;
 static int expr_jmp_buf_p;
@@ -305,7 +346,12 @@ static int expr_jmp_buf_p;
 
 const char *
 gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP)
+
+#ifdef OBJ_COMPLEX_RELC
+     CGEN_CPU_DESC cd;
+#else
      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
+#endif
      enum cgen_parse_operand_type want;
      const char **strP;
      int opindex;
@@ -326,6 +372,13 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP)
   const char *errmsg;
   expressionS exp;
 
+#ifdef OBJ_COMPLEX_RELC
+  volatile int              signed_p = 0;
+  symbolS *                 stmp = NULL;
+  bfd_reloc_code_real_type  reloc_type;
+  const CGEN_OPERAND *      operand;
+  fixS                      dummy_fixup;
+#endif
   if (want == CGEN_PARSE_OPERAND_INIT)
     {
       gas_cgen_init_parse ();
@@ -383,9 +436,82 @@ gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP)
       break;
     de_fault:
     default:
+#ifdef OBJ_COMPLEX_RELC
+      /* Look up operand, check to see if there's an obvious
+	 overflow (this helps disambiguate some insn parses).  */
+      operand = cgen_operand_lookup_by_num (cd, opindex);
+      errmsg = weak_operand_overflow_check (& exp, operand);
+
+      if (! errmsg)
+	{
+	  /* Fragment the expression as necessary, and queue a reloc.  */
+	  memset (& dummy_fixup, 0, sizeof (fixS));
+
+	  reloc_type = md_cgen_lookup_reloc (0, operand, & dummy_fixup);
+
+	  if (exp.X_op == O_symbol
+	      && reloc_type == BFD_RELOC_RELC
+	      && exp.X_add_symbol->sy_value.X_op == O_constant
+	      && exp.X_add_symbol->bsym->section != expr_section
+	      && exp.X_add_symbol->bsym->section != absolute_section
+	      && exp.X_add_symbol->bsym->section != undefined_section)
+	    {
+	      /* Local labels will have been (eagerly) turned into constants
+		 by now, due to the inappropriately deep insight of the
+		 expression parser.  Unfortunately make_expr_symbol
+		 prematurely dives into the symbol evaluator, and in this
+		 case it gets a bad answer, so we manually create the
+		 expression symbol we want here.  */
+	      stmp = symbol_create (FAKE_LABEL_NAME, expr_section, 0,
+				    & zero_address_frag);
+	      symbol_set_value_expression (stmp, & exp);
+	    } 
+	  else 
+	    stmp = make_expr_symbol (& exp);
+
+	  /* If this is a pc-relative RELC operand, we
+	     need to subtract "." from the expression.  */	  
+ 	  if (reloc_type == BFD_RELOC_RELC
+	      && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR))
+ 	    stmp = expr_build_binary (O_subtract, stmp, expr_build_dot ()); 
+
+	  /* FIXME: this is not a perfect heuristic for figuring out
+	     whether an operand is signed: it only works when the operand
+	     is an immediate. it's not terribly likely that any other
+	     values will be signed relocs, but it's possible. */
+	  if (operand && (operand->hw_type == HW_H_SINT))
+	    signed_p = 1;
+	  
+	  if (stmp->bsym && (stmp->bsym->section == expr_section))
+	    {
+	      if (signed_p)
+		stmp->bsym->flags |= BSF_SRELC;
+	      else
+		stmp->bsym->flags |= BSF_RELC;
+	    }
+	  
+	  /* Now package it all up for the fixup emitter.  */
+	  exp.X_op = O_symbol;
+	  exp.X_op_symbol = 0;
+	  exp.X_add_symbol = stmp;
+	  exp.X_add_number = 0;
+	      
+	  /* Re-init rightshift quantity, just in case.  */
+	  rightshift = operand->length;
+	  queue_fixup_recursively (opindex, opinfo_1, & exp,  
+				   (reloc_type == BFD_RELOC_RELC) ?
+				   & (operand->index_fields) : 0,
+				   signed_p, -1);
+	}
+      * resultP = errmsg
+	? CGEN_PARSE_OPERAND_RESULT_ERROR
+	: CGEN_PARSE_OPERAND_RESULT_QUEUED;
+      *valueP = 0;
+#else
       queue_fixup (opindex, opinfo_1, &exp);
       *valueP = 0;
       *resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED;
+#endif      
       break;
     }
 
@@ -553,6 +679,8 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result)
 				       insn, length, operand,
 				       fixups[i].opinfo,
 				       &fixups[i].exp);
+      fixP->fx_cgen.field = fixups[i].field;
+      fixP->fx_cgen.msb_field_p = fixups[i].msb_field_p;
       if (result)
 	result->fixups[i] = fixP;
     }
@@ -564,6 +692,167 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result)
     }
 }
 
+#ifdef OBJ_COMPLEX_RELC
+/* Queue many fixups, recursively. If the field is a multi-ifield,
+   repeatedly queue its sub-parts, right shifted to fit into the field (we
+   assume here multi-fields represent a left-to-right, MSB0-LSB0
+   reading). */
+
+static void
+queue_fixup_recursively (const int                      opindex,
+			 const int                      opinfo,
+			 expressionS *                  expP,
+			 const CGEN_MAYBE_MULTI_IFLD *  field,
+			 const int                      signed_p,
+			 const int                      part_of_multi)
+{
+  if (field && field->count)
+    {
+      int i;
+  
+      for (i = 0; i < field->count; ++ i)
+	queue_fixup_recursively (opindex, opinfo, expP, 
+				 & (field->val.multi[i]), signed_p, i);
+    }
+  else
+    {
+      expressionS * new_exp = expP;
+
+#ifdef DEBUG
+      printf ("queueing fixup for field %s\n",
+	      (field ? field->val.leaf->name : "??"));
+      print_symbol_value (expP->X_add_symbol);
+#endif
+      if (field && part_of_multi != -1)
+	{
+	  rightshift -= field->val.leaf->length;
+
+	  /* Shift reloc value by number of bits remaining after this
+	     field.  */
+	  if (rightshift)
+	    new_exp = make_right_shifted_expr (expP, rightshift, signed_p);	  
+	}
+      
+      /* Truncate reloc values to length, *after* leftmost one.  */
+      fixups[num_fixups].msb_field_p = (part_of_multi <= 0);
+      fixups[num_fixups].field = (CGEN_MAYBE_MULTI_IFLD *) field;
+      
+      queue_fixup (opindex, opinfo, new_exp);
+    }
+}
+
+/* Encode the self-describing RELC reloc format's addend.  */
+
+static unsigned long 
+gas_cgen_encode_addend (const unsigned long start,    /* in bits */
+			const unsigned long len,      /* in bits */
+			const unsigned long oplen,    /* in bits */
+			const unsigned long wordsz,   /* in bytes */
+			const unsigned long chunksz,  /* in bytes */
+			const unsigned long signed_p,
+			const unsigned long trunc_p)
+{
+  unsigned long res = 0L;
+
+  res |= start    & 0x3F;
+  res |= (oplen   & 0x3F) << 6;
+  res |= (len     & 0x3F) << 12;
+  res |= (wordsz  & 0xF)  << 18;
+  res |= (chunksz & 0xF)  << 22;
+  res |= (CGEN_INSN_LSB0_P ? 1 : 0) << 27;
+  res |= signed_p << 28;
+  res |= trunc_p << 29;
+
+  return res;
+}
+
+/* Purpose: make a weak check that the expression doesn't overflow the
+   operand it's to be inserted into.
+
+   Rationale: some insns used to use %operators to disambiguate during a
+   parse. when these %operators are translated to expressions by the macro
+   expander, the ambiguity returns. we attempt to disambiguate by field
+   size.
+   
+   Method: check to see if the expression's top node is an O_and operator,
+   and the mask is larger than the operand length. This would be an
+   overflow, so signal it by returning an error string. Any other case is
+   ambiguous, so we assume it's OK and return NULL.  */
+
+static char *
+weak_operand_overflow_check (const expressionS *  exp,
+			     const CGEN_OPERAND * operand)
+{
+  const unsigned long len = operand->length;
+  unsigned long mask;
+  unsigned long opmask = (((1L << (len - 1)) - 1) << 1) | 1;
+
+  if (!exp)
+    return NULL;
+
+  if (exp->X_op != O_bit_and)
+    {
+      /* Check for implicit overflow flag.  */
+      if (CGEN_OPERAND_ATTR_VALUE 
+	  (operand, CGEN_OPERAND_RELOC_IMPLIES_OVERFLOW))
+	return _("a reloc on this operand implies an overflow");
+      return NULL;
+    }
+  
+  mask = exp->X_add_number;
+
+  if (exp->X_add_symbol &&
+      exp->X_add_symbol->sy_value.X_op == O_constant)
+    mask |= exp->X_add_symbol->sy_value.X_add_number;
+
+  if (exp->X_op_symbol &&
+      exp->X_op_symbol->sy_value.X_op == O_constant)
+    mask |= exp->X_op_symbol->sy_value.X_add_number;
+
+  /* Want to know if mask covers more bits than opmask. 
+     this is the same as asking if mask has any bits not in opmask,
+     or whether (mask & ~opmask) is nonzero.  */
+  if (mask && (mask & ~opmask))
+    {
+#ifdef DEBUG
+      printf ("overflow: (mask = %8.8x, ~opmask = %8.8x, AND = %8.8x)\n",
+	      mask, ~opmask, (mask & ~opmask));
+#endif
+      return _("operand mask overflow");
+    }
+
+  return NULL;  
+}
+
+
+static expressionS *
+make_right_shifted_expr (expressionS * exp,
+			 const int     amount,
+			 const int     signed_p)
+{
+  symbolS * stmp = 0;
+  expressionS * new_exp;
+
+  stmp = expr_build_binary (O_right_shift, 
+			    make_expr_symbol (exp),
+			    expr_build_uconstant (amount));
+  
+  if (signed_p)
+    stmp->bsym->flags |= BSF_SRELC;
+  else
+    stmp->bsym->flags |= BSF_RELC;
+  
+  /* Then wrap that in a "symbol expr" for good measure.  */
+  new_exp = xmalloc (sizeof (expressionS));
+  memset (new_exp, 0, sizeof (expressionS));
+  new_exp->X_op = O_symbol;
+  new_exp->X_op_symbol = 0;
+  new_exp->X_add_symbol = stmp;
+  new_exp->X_add_number = 0;
+  
+  return new_exp;
+}
+#endif
 /* Apply a fixup to the object code.  This is called for all the
    fixups we generated by the call to fix_new_exp, above.  In the call
    above we used a reloc code which was the largest legal reloc code
@@ -602,6 +891,30 @@ gas_cgen_md_apply_fix (fixP, valP, seg)
       bfd_reloc_code_real_type reloc_type;
       CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
       const CGEN_INSN *insn = fixP->fx_cgen.insn;
+      int start;
+      int length;
+      int signed_p = 0;
+
+      if (fixP->fx_cgen.field)
+	{	      
+	  /* Use the twisty little pointer path
+	     back to the ifield if it exists.  */
+	  start = fixP->fx_cgen.field->val.leaf->start;
+	  length = fixP->fx_cgen.field->val.leaf->length;
+	}
+      else
+	{
+	  /* Or the far less useful operand-size guesstimate.  */
+	  start = operand->start;
+	  length = operand->length;
+	}
+
+      /* FIXME: this is not a perfect heuristic for figuring out
+         whether an operand is signed: it only works when the operand
+         is an immediate. it's not terribly likely that any other
+         values will be signed relocs, but it's possible. */
+      if (operand && (operand->hw_type == HW_H_SINT))
+        signed_p = 1;
 
       /* If the reloc has been fully resolved finish the operand here.  */
       /* FIXME: This duplicates the capabilities of code in BFD.  */
@@ -644,6 +957,18 @@ gas_cgen_md_apply_fix (fixP, valP, seg)
 	 partial_inplace == false.  */
 
       reloc_type = md_cgen_lookup_reloc (insn, operand, fixP);
+#ifdef OBJ_COMPLEX_RELC
+      if (reloc_type == BFD_RELOC_RELC)
+	{
+	  /* Change addend to "self-describing" form,
+	     for BFD to handle in the linker.  */
+	  value = gas_cgen_encode_addend (start, operand->length,
+					  length, fixP->fx_size, 
+					  cd->insn_chunk_bitsize / 8, 
+					  signed_p, 
+					  ! (fixP->fx_cgen.msb_field_p));
+	}
+#endif
 
       if (reloc_type != BFD_RELOC_NONE)
 	fixP->fx_r_type = reloc_type;
@@ -699,7 +1024,6 @@ gas_cgen_tc_gen_reloc (section, fixP)
      fixS *     fixP;
 {
   arelent *reloc;
-
   reloc = (arelent *) xmalloc (sizeof (arelent));
 
   reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
@@ -737,3 +1061,4 @@ gas_cgen_begin ()
   else
     cgen_clear_signed_overflow_ok (gas_cgen_cpu_desc);
 }
+