2012-11-30 Oleg Raikhman <oleg@adapteva.com>

            Joern Rennecke  <joern.rennecke@embecosm.com>

cpu:
        * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
        (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
        (testset-insn): Add NO_DIS attribute to t.l.
        (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
        (move-insns): Add NO-DIS attribute to cmov.l.
        (op-mmr-movts): Add NO-DIS attribute to movts.l.
        (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
        (op-rrr): Add NO-DIS attribute to .l.
        (shift-rrr): Add NO-DIS attribute to .l.
        (op-shift-rri): Add NO-DIS attribute to i32.l.
        (bitrl, movtl): Add NO-DIS attribute.
        (op-iextrrr): Add NO-DIS attribute to .l
        (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
        (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.

opcodes:
        * epiphany-desc.c, epiphany-desc.h, epiphany-opc.c: Regenerate.

2 files changed, 47 insertions, 28 deletions

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index bd82d13b5d..1dbf760968 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,21 @@
+2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
+	    Joern Rennecke  <joern.rennecke@embecosm.com>
+
+	* epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
+	(load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
+	(testset-insn): Add NO_DIS attribute to t.l.
+	(store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
+	(move-insns): Add NO-DIS attribute to cmov.l.
+	(op-mmr-movts): Add NO-DIS attribute to movts.l.
+	(op-mmr-movfs): Add NO-DIS attribute to movfs.l.
+	(op-rrr): Add NO-DIS attribute to .l.
+	(shift-rrr): Add NO-DIS attribute to .l.
+	(op-shift-rri): Add NO-DIS attribute to i32.l.
+	(bitrl, movtl): Add NO-DIS attribute.
+	(op-iextrrr): Add NO-DIS attribute to .l
+	(op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
+	(op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
+
 2012-02-27  Alan Modra  <amodra@gmail.com>
 
 	* mt.opc (print_dollarhex): Trim values to 32 bits.
diff --git a/cpu/epiphany.cpu b/cpu/epiphany.cpu
index a11011b879..33c81d004f 100644
--- a/cpu/epiphany.cpu
+++ b/cpu/epiphany.cpu
@@ -352,7 +352,7 @@
   (prefix "")
   (values
 ; some preferred aliases
-   (sb 9) (sl 10) (fp 11) (ip 12) (sp 13) (lr 14)
+   (fp 11) (sp 13) (lr 14)
 ; the default register names
    (r0  0)  (r1  1)  (r2  2)  (r3  3)  (r4  4)  (r5  5)  (r6  6)  (r7  7)
    (r8  8)  (r9  9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
@@ -365,6 +365,7 @@
 ; some less popular aliases
    (a1  0) (a2  1) (a3  2) (a4  3) (v1  4) (v2  5) (v3  6) (v4  7)
    (v5  8) (v6  9) (v7 10) (v8 11)
+   (sb 9) (sl 10) (ip 12)
    )
   )
 
@@ -1428,7 +1429,7 @@
 
     (dnmi (.sym name "x")
 	  (.str "load " mode " indexed")
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6,$direction$rm6]")
 	  (emit  (.sym name "x.l") rd6 rn6 direction rm6)
 	  )
@@ -1453,7 +1454,7 @@
 
     (dnmi (.sym name "p")
 	  (.str "load " mode " postmodify")
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6],$direction$rm6")
 	  (emit  (.sym name "p.l") rd6 rn6 direction rm6)
 	  )
@@ -1494,7 +1495,7 @@
 
     (dnmi (.sym name "d")
 	  (.str "load " mode " displacement")
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6,$dpmi$disp11]")
 	  (emit  (.sym name "d.l") rd6 rn6  dpmi disp11)
 	  )
@@ -1519,7 +1520,7 @@
 
     (dnmi (.sym name "dpm")
 	  (.str "load " mode " displacement post-modify")
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6],$dpmi$disp11")
 	  (emit  (.sym name "dpm.l") rd6 rn6  dpmi disp11)
 	  )
@@ -1532,12 +1533,12 @@
 	  (emit (.sym name "d16.s") rd rn (disp3 0))
 	  )
     (dnmi (.sym name "dl0") "load with 0 disp"
-    	  ()
+    	  (NO-DIS)
 	  (.str name " $rd6,[$rn6]")
 	  (emit (.sym name "d.l") rd6 rn6 (dpmi 0) (disp11 0))
 	  )
     (dnmi (.sym name "dl0.l") "load with 0 disp"
-    	  ()
+    	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6]")
 	  (emit (.sym name "d.l") rd6 rn6 (dpmi 0) (disp11 0))
 	  )
@@ -1594,7 +1595,7 @@
 
     (dnmi  (.sym name "t.l")
 	   (.str "testset " mode ".l indexed")
-	   ()
+	   (NO-DIS)
 	   (.str name ".l $rd6,[$rn6,$direction$rm6]")
 	   (emit (.sym name "t") rd6 rn6 direction rm6)
 	   )
@@ -1640,7 +1641,7 @@
 
     (dnmi (.sym name "x.l")
 	  (.str "store" mode " indexed")
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6,$direction$rm6]")
 	  (emit  (.sym name "x")  rd6 rn6 direction rm6)
 	  )
@@ -1676,7 +1677,7 @@
 		 )
     (dnmi (.sym name "p.l")
 	  (.str "store " mode " postmodify")
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6],$direction$rm6")
 	  (emit (.sym name "p") rd6 rn6 direction rm6)
 	  )
@@ -1714,7 +1715,7 @@
 
     (dnmi (.sym name "d.l")
 	  (.str "store " mode " displacement")
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6,$dpmi$disp11]")
 	  (emit (.sym name "d") rd6 rn6 dpmi disp11)
 	  )
@@ -1737,7 +1738,7 @@
 		 )
     (dnmi (.sym name "dpm.l")
 	  (.str "store " mode " displacement post-modify")
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6],$dpmi$disp11")
 	  (emit (.sym name "dpm") rd6 rn6 dpmi disp11)
 	  )
@@ -1756,7 +1757,7 @@
 	  )
 
     (dnmi (.sym name "dl0.l")  "store w 0 disp"
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,[$rn6]")
 	  (emit (.sym name "d") rd6 rn6 (dpmi 0) (disp11 0))
 	  )
@@ -1798,7 +1799,7 @@
 		 )
     (dnmi (.sym "cmov.l" cond)
 	  (.str "move register " cond)
-	  ()
+	  (NO-DIS)
 	  (.str "mov" name ".l $rd6,$rn6")
 	  (emit (.sym "cmov" cond) rd6 rn6)
 	  )
@@ -1859,7 +1860,7 @@
 
     (dnmi (.sym "movts.l" name)
 	  (.str "move to " name)
-	  ()
+	  (NO-DIS)
 	  (.str "movts.l $" sdreg ",$rd6")
 	  (emit (.sym "movts" name) sdreg rd6)
 	  )
@@ -1903,7 +1904,7 @@
 
     (dnmi (.sym "movfs.l" name)
 	  (.str "move from " name)
-	  ()
+	  (NO-DIS)
 	  (.str "movfs.l $rd6,$" snreg)
 	  (emit (.sym "movfs" name) rd6 snreg)
 	  )
@@ -2165,7 +2166,7 @@
 
     (dnmi (.sym name ".l")
 	  (.str name)
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,$rn6,$rm6")
 	  (emit (.sym name) rd6 rn6 rm6)
 	  )
@@ -2307,7 +2308,7 @@
 
     (dnmi (.sym name ".l")
 	  (.str name)
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,$rn6,$rm6")
 	  (emit (.sym name) rd6 rn6 rm6)
 	  )
@@ -2349,7 +2350,7 @@
 
     (dnmi (.sym name "i32.l")
 	  (.str name)
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,$rn6,$shift")
 	  (emit (.sym name "i32") rd6  rn6 shift)
 	  )
@@ -2411,7 +2412,7 @@
 	     ()
 	     )
 (dnmi bitrl "bit reverse l"
-      ()
+      (NO-DIS)
       ("bitr.l $rd6,$rn6")
       (emit bitr rd6 rn6)
       )
@@ -2441,7 +2442,7 @@
 
     (dnmi (.sym name ".l")
 	  (.str name)
-	  ()
+	  (NO-DIS)
 	  (.str name ".l $rd6,$rn6,$rm6")
 	  (emit (.sym name) rd6  rn6 rm6)
 	  )
@@ -2496,7 +2497,7 @@
 	     )
 (dnmi movtl
       "movt imm16"
-      ()
+      (NO-DIS)
       "movt.l $rd6,$imm16"
       (emit movt rd6 imm16)
       )
@@ -2581,7 +2582,7 @@
 
 	    (if (or (and invExcEnbit bisbit)
 		    (or (and ovfExcEnbit bvsbit) (and unExcEnbit busbit)))
-		(sequence ()	
+		(sequence ()
 		  (set expcause0bit (const 1))
 		  (set expcause1bit (const 1))
 		  (call-exception #x4 #x2)))
@@ -2602,7 +2603,7 @@
 
     (dnmi (.sym "f_" name "f32.l")
 	  (.str "f_" name)
-	  ()
+	  (NO-DIS)
 	  (.str "f" name ".l $rd6,$rn6,$rm6")
 	  (emit  (.sym "f_" name "f32") rd6  rn6 rm6)
 	  )
@@ -2686,7 +2687,7 @@
 
     (dnmi  (.sym "f_" name "f32.l")
 	   (.str "f_" name)
-	   ()
+	   (NO-DIS)
 	   (.str "f" name ".l $rd6,$rn6")
 	   (emit (.sym "f_" name "f32") rd6  rn6)
 	   )
@@ -2746,7 +2747,7 @@
 
     (dnmi (.sym "f_" name "f32.l")
 	  (.str "f_" name)
-	  ()
+	  (NO-DIS)
 	  (.str "f" name ".l $rd6,$rn6")
 	  (emit (.sym "f_" name "f32")  rd6 rn6)
 	  )
@@ -2830,7 +2831,7 @@
 
     (dnmi (.sym "f_" name "f32.l")
 	  (.str "f_" name)
-	  ()
+	  (NO-DIS)
 	  (.str "f" name ".l $rd6,$rn6")
 	  (emit (.sym "f_" name "f32") rd6  rn6)
 	  )
@@ -2919,7 +2920,7 @@
 
     (dnmi (.sym "f_" name "f32.l")
 	  (.str "f_" name)
-	  ()
+	  (NO-DIS)
 	  (.str "f" name ".l $frd6,$frn6")
 	  (emit (.sym "f_" name "f32") frd6 frn6)
 	  )