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| author | Walter Lee <walt@tilera.com> | 2012-02-25 19:51:34 +0000 |
|---|---|---|
| committer | Walter Lee <walt@tilera.com> | 2012-02-25 19:51:34 +0000 |
| commit | fb6ceddedd56805fc4fd64792a0e73baa8c22a21 (patch) | |
| tree | 035d5e8c3f9a3be2c2b82f975fcde4e4074ba612 /binutils/testsuite/binutils-all | |
| parent | 825902491e89db303b036d82eef32ef0b07d4317 (diff) | |
| download | ppe42-binutils-fb6ceddedd56805fc4fd64792a0e73baa8c22a21.tar.gz ppe42-binutils-fb6ceddedd56805fc4fd64792a0e73baa8c22a21.zip | |
Add big-endian support for tilegx.
bfd/
* config.bfd (tilegx-*-*): rename little endian vector; add big
endian vector.
(tilegxbe-*-*): New case.
* configure.in (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): New vector.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): New vector.
* configure: Regenerate.
* elf32-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* elf64-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* targets.c (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): Declare.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): Declare.
(_bfd_target_vector): Add / rename above vectors.
binutils/testsuite/
* binutils-all/objdump.exp (cpus_expected): Add tilegx.
gas/
* tc-tilegx.c (tilegx_target_format): Handle big endian.
(OPTION_EB): Define.
(OPTION_EL): Define.
(md_longopts): Add entries for "EB" and "EL".
(md_parse_option): Handle OPTION_EB and OPTION_EL.
(md_show_usage): Add -EB and -EL.
(md_number_to_chars): New.
* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
ifndef.
(md_number_to_chars): Delete.
* configure.tgt (tilegx*be): Handle.
* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
* doc/c-tilegx.texi: Ditto.
ld/
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c.
(eelf32tilegx_be.c): Add rule to build this file.
(eelf64tilegx_be.c): Ditto.
* Makefile.in: Regenerate.
* configure.tgt (tilegx-*-*): Support big endian.
(tilegxbe-*-*): New.
* emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf32tilegx_be.sh: New.
* emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf64tilegx_be.sh: New.
ld/testsuite/
* ld-tilegx/reloc-be.d: New.
* ld-tilegx/reloc-le.d: New.
* ld-tilegx/reloc.d: Delete.
* ld-tilegx/tilegx.exp: Test big and little endian.
Diffstat (limited to 'binutils/testsuite/binutils-all')
| -rw-r--r-- | binutils/testsuite/binutils-all/objdump.exp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/binutils/testsuite/binutils-all/objdump.exp b/binutils/testsuite/binutils-all/objdump.exp index e0ee45f1a6..267bcbd824 100644 --- a/binutils/testsuite/binutils-all/objdump.exp +++ b/binutils/testsuite/binutils-all/objdump.exp @@ -41,8 +41,8 @@ lappend cpus_expected d10v d30v fr30 fr500 fr550 h8 hppa i386 i860 i960 ip2022 lappend cpus_expected m16c m32c m32r m68hc11 m68hc12 m68k m88k MCore MicroBlaze lappend cpus_expected mips mn10200 mn10300 ms1 msp ns32k pj powerpc pyramid lappend cpus_expected romp rs6000 s390 sh sparc -lappend cpus_expected tahoe tic54x tic80 tms320c30 tms320c4x tms320c54x v850 -lappend cpus_expected vax we32k x86-64 xscale xtensa z8k z8001 z8002 +lappend cpus_expected tahoe tic54x tic80 tilegx tms320c30 tms320c4x tms320c54x +lappend cpus_expected v850 vax we32k x86-64 xscale xtensa z8k z8001 z8002 # Make sure the target CPU shows up in the list. lappend cpus_expected ${target_cpu} |
