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authorNathan Sidwell <nathan@codesourcery.com>2005-11-08 11:15:13 +0000
committerNathan Sidwell <nathan@codesourcery.com>2005-11-08 11:15:13 +0000
commit6f84a2a6497dab3564cb0fb0031632700158393b (patch)
treee2f6f244e27b5cc4d4c0e1ed433776221a7d12c5 /bfd/bfd-in2.h
parent16ac4ab5a8d7c4998e8a2648a452df6e96e5e4ef (diff)
downloadppe42-binutils-6f84a2a6497dab3564cb0fb0031632700158393b.tar.gz
ppe42-binutils-6f84a2a6497dab3564cb0fb0031632700158393b.zip
bfd:
Add ms2. * archures.c (bfd_mach_ms2): Define. * cpu-ms1.c (arch_info_struct): Add ms2 stanza. * elf32-ms1.c (elf32_ms1_machine): Add ms2 case. (ms1_elf_merge_private_bfd_data): Remove unused variables. Add correct merging logic, with workaround. (ms1_elf_print_private_bfd_data): Add ms2 case. * reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc. * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. cpu: Add ms2 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and model. (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, f-cb2incr, f-rc3): New fields. (LOOP): New instruction. (JAL-HAZARD): New hazard. (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): New operands. (mul, muli, dbnz, iflush): Enable for ms2 (jal, reti): Has JAL-HAZARD. (ldctxt, ldfb, stfb): Only ms1. (fbcb): Only ms1,ms1-003. (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, fbcbincrs, mfbcbincrs): Enable for ms2. (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. * ms1.opc (parse_loopsize): New. (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. (print_pcrel): New. gas: Add ms2. * config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1. (ms1_architectures): Add ms2. (md_parse_option): Add ms2. (md_show_usage): Add ms2. (md_assemble): Add JAL_HAZARD detection logic. (md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case. * doc/c-ms1.texi: New. * doc/all.texi: Add MS1. * doc/Makefile.am (CPU_DOCS): Add c-ms1.texi. * doc/Makefile.in: Rebuilt. * doc/Makefile: Rebuilt. gas/testsuite: Add ms2. * gas/ms1/allinsn.d: Adjust pcrel disassembly. * gas/ms1/errors.exp: Fix target triplet. * gas/ms1/ms1-16-003.d: Adjust pcrel disassembly. * gas/ms1/ms1-16-003.s: Tweak label. * gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test. * gas/ms1/ms2.d, gas/ms1/ms2.s: New. * gas/ms1/relocs.d: Adjust expected machine name and pcrel disassembly. * gas/ms1/relocs.exp: Adjust target triplet. include: Add ms2. * elf/ms1.h (EF_MS1_CPU_MS2): New. opcodes: Add ms2. * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h: Regenerated.
Diffstat (limited to 'bfd/bfd-in2.h')
-rw-r--r--bfd/bfd-in2.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 7afe43725a..d8570866fc 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1908,6 +1908,7 @@ enum bfd_architecture
bfd_arch_ms1,
#define bfd_mach_ms1 1
#define bfd_mach_mrisc2 2
+#define bfd_mach_ms2 3
bfd_arch_pj,
bfd_arch_avr, /* Atmel AVR microcontrollers. */
#define bfd_mach_avr1 1
@@ -3970,6 +3971,9 @@ This is the 5 bits of a value. */
/* Morpho MS1 - Used to tell the linker which vtable entries are used. */
BFD_RELOC_MS1_GNU_VTENTRY,
+/* Morpho MS1 - 8 bit immediate relocation. */
+ BFD_RELOC_MS1_PCINSN8,
+
/* msp430 specific relocation codes */
BFD_RELOC_MSP430_10_PCREL,
BFD_RELOC_MSP430_16_PCREL,
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