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authorH.J. Lu <hjl.tools@gmail.com>2010-07-05 16:40:32 +0000
committerH.J. Lu <hjl.tools@gmail.com>2010-07-05 16:40:32 +0000
commit77321f536016efc2e18fbef88016b1fbad25afd1 (patch)
tree1aa5a86f0b4433d34108a6260c1771fe695eb0a5
parentdf1c40a732c509d6729b2874d7e08987b7815490 (diff)
downloadppe42-binutils-77321f536016efc2e18fbef88016b1fbad25afd1.tar.gz
ppe42-binutils-77321f536016efc2e18fbef88016b1fbad25afd1.zip
Fix a typo in comments for CpuFSGSBase.
2010-07-05 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/i386-opc.h2
2 files changed, 6 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 111f1f82b7..96fffad213 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
+
2010-07-03 Andreas Schwab <schwab@linux-m68k.org>
* ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
@@ -47,7 +51,7 @@
(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
* i386-opc.h (CpuXsaveopt): New.
- (CpuFSGSBase):Likewise.
+ (CpuFSGSBase): Likewise.
(CpuRdRnd): Likewise.
(CpuF16C): Likewise.
(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 0fa7e85d87..9442211f22 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -114,7 +114,7 @@ enum
CpuEPT,
/* RDTSCP Instuction support required */
CpuRdtscp,
- /* FSBSBASE Instructions required */
+ /* FSGSBASE Instructions required */
CpuFSGSBase,
/* RDRND Instructions required */
CpuRdRnd,
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