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* libpdbg/p8chip.c: release special wakeups for P8Nicholas Piggin2019-03-271-9/+58
| | | | | | This copies the special wakeup release logic from p9chip.c Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* Revert incorrect version of "libpdbg/p8chip.c: Emulate sreset using ramming..."Alistair Popple2019-03-271-76/+6
| | | | | | This reverts commit 3ce2bc04c70bf6f961a62a380f7b4459445ed2da. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* Revert incorrect version of "libpdbg/p8chip.c: ram state setup sequence ..."Alistair Popple2019-03-271-13/+28
| | | | | | This reverts commit eb1d866e30a1f8488fb794776bb5a1e0bc42d2e5. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* Revert incorrect version of "libpdbg/p8chip.c: release special wakeups for P8"Alistair Popple2019-03-271-53/+8
| | | | | | | | This reverts commit 7de0ee34699e297f1f224fce1790c3cd03bc2f32. The incorrect version of "libpdbg/p8chip.c: release special wakeups for P8" was applied, the next patch will commit the correct version. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* libpdbg/p8chip.c: Emulate sreset using ramming for active threadsNicholas Piggin2019-03-081-6/+76
| | | | | | | | | | | Based on patch from Alistair, some fixes and changes: - account HILE bit, set/clear MSR_LE - clear MSR_PR - don't use raw ramming (clearer this way, not perf critical) At the moment, must manually stop all threads in the core, and manually restart them. Can change behaviour depending on what exactly we want (e.g., sreset all threads may be good for debugging).
* libpdbg/p8chip.c: ram state setup sequence match workbookNicholas Piggin2019-03-081-28/+13
| | | | | | | | | | | | | | | | | | This makes a few changes to stop and ram procedure. First of all, the existing thread_stop procedure is also setting up some of the ram state. Change that to just do the stop sequence from the workbook, and move the ram stuff into ram setup and destroy. The workbook calls for inactive threads being rammed to set a thread active state before ram mode is exited, in order for GPRs modified by ramming to avoid getting lost. Currently the code does that in the stop sequence before ram mode is activated. The code also currently deasserts the thread active bit after exiting ram mode, which is not part of the workbook, so this is no longer done. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg/p8chip.c: release special wakeups for P8Nicholas Piggin2019-03-081-8/+53
| | | | | | This copies the special wakeup release logic from p9chip.c Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg/p8chip.c: Only write the SP_STOP bit onceNicholas Piggin2019-03-081-2/+4
| | | | | | | | | The workbook recipe is to write SP_STOP once, then poll for status. Also add a small delay between polling to give a reasonable timeout and avoid hitting the scom bus hard for no good reason. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg/p8chip.c: read status from correct targetNicholas Piggin2019-03-081-1/+1
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* libpdbg: Rework target compatibleAlistair Popple2018-11-091-1/+1
| | | | | | | | | Rework the target compatible code to reuse existing libpdbg code where possible. Renames and exports these functions for use by external libraries. Signed-off-by: Alistair Popple <alistair@popple.id.au> Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg: Rework target addressingAlistair Popple2018-11-091-2/+2
| | | | | | | | Clean up the target addressing functions and rename them to be consistent with other libpdbg function names. Signed-off-by: Alistair Popple <alistair@popple.id.au> Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
* libpdbg/p8chip: Add in debug messagesRashmica Gupta2018-10-151-0/+3
| | | | | Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Reviewed-by: Alistair Popple <alistair@popple.id.au>
* libpdbg: Add in enable_attn function for p8Rashmica Gupta2018-09-121-0/+41
| | | | Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
* libpdbg: Add in getxer and putxer functionsRashmica Gupta2018-09-121-0/+86
| | | | | Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg: When searching for a parent ensure the correct class is enforcedAlistair Popple2018-08-131-5/+10
| | | | | | | | Functions were added to allow a targets parents to be traversed until a parent of the correct class is found. Switch to using those instead of blindly assuming a particular node is always a child of the desired class. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* libpdbg: Ensure threads are probed prior to setup in ram_setupAlistair Popple2018-08-131-0/+6
| | | | | | | | | p9chip.c called the probe function directly. Better to call pdbg_target_probe() so that any intermediate targets can also be probed. p8chip.c didn't probe the threads at all prior to use, so do that. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* p8chip: Restore RAS_MODE_REG to original valueMichael Neuling2018-06-251-3/+1
| | | | | | | This correctly restores the MR_THREAD_IN_DEBUG bit rather than always clearing it after. Signed-off-by: Michael Neuling <mikey@neuling.org>
* libpdbg: Always fail sreset on p8Rashmica Gupta2018-06-151-0/+7
| | | | | | | | | Currently attempting to do a './pdbg -p x -c x -t x sreset' segfaults as there is no sreset function defined for p8. Apparently we can't easily sreset on p8, so add in function that always fails as this is better than segfaulting. Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
* libpdbg: Abstract thread statusAlistair Popple2018-05-241-13/+79
| | | | | | | | | | | | | | | | There is currently no abstraction of thread status between library and application. It just passes the hardware specific values down. There is also no interface exported in the library headers to read status. This makes it difficult to implement more advanced functionality in the application as there is no way hardware agnostic way to determine if a thread is in powersave mode or not for example. Instead introduce a hardware agnostic thread state so that we can implement more advanced functionality such as automatically stopping threads if required. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* libpdbg: Start using pdbg logging apiAmitay Isaacs2018-05-181-0/+1
| | | | Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
* pdbg: add 'regs' commandNicholas Piggin2018-05-181-0/+10
| | | | | | | | | | | This uses ramming to pull out most registers. There are more SPRs to left to add. Ramming remains set over all register extraction, by keeping ram_is_setup target attribut. This helps to speed things up and minimise disturbance to the host. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg: staticify unit structsNicholas Piggin2018-05-161-2/+2
| | | | Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
* libpdbg/p8chip: Return thread SMT stateCyril Bur2018-04-241-1/+2
| | | | | | | | | | | | | | | | | Thread status can return the current hardware smt state of a thread pretty easily, the information is in POW_STATUS_REG which we already read. It should be noted that the value read by the scom has nothing to do with the ppc64_cpu --smt value. The value returned by the hardware is really how the hardware is operating, it will happy be in SMT1 and having a thread using the entire core. The other threads to not need to be asleep for SMT1 to be reported, something like the Linux idle loop (but without sleep states) will do it. This means that an SMT1 thread with three others active threads spinning could at any time jump report SMT4 depending on the load of the system. Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
* libpdbg: Move struct dt_node into struct pdbg_targetCyril Bur2018-04-241-10/+10
| | | | | | | | | | | Currently we have this terrible mess of dt_nodes pointing to targets and targets pointing to dt_nodes. This has been the cause of bugs due to folling NULL pointers from a target expecting a node and vice versa. Consolidating these structs means that there must be a node for a target. Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
* Rename chiplet to coreAlistair Popple2017-12-111-16/+16
| | | | | | | | A core is a specific subset of chiplets so rename the existing usage of chiplet to core so that we may add other types of chiplets to the system. No functional change. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* Refactor for an exportable APIAlistair Popple2017-12-081-1/+1
| | | | | | | | | | The existing API between libpdbg and pdbg was poorly defined. Other programs are beginning to utilise libpdbg so a more strictly defined API would be beneficial. This patch introduces a new header (libpdbg.h) which includes the definition of a public API for libpdbg and updates pdbg to only depend on this. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* Rename struct target to struct pdbg_targetAlistair Popple2017-12-061-2/+2
| | | | | | | In preparation for a better defined libpdbg API rename "struct target" to something less generic so that we can export the name. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* Makefile.am: Enable -Wall -Werror for libpdbgAlistair Popple2017-07-141-4/+11
| | | | | | | Several minor fixes were required to enable building on both x64 and ARM with -Wall -Werror, mostly related to unused variables and bad printf string formats. Signed-off-by: Alistair Popple <alistair@popple.id.au>
* libpdbg: Add support for P9 thread operationsAlistair Popple2017-06-281-0/+344
This patch adds support for starting and stopping threads on POWER9 as well as instruction ramming which is required to read/write GPRs, etc. Signed-off-by: Alistair Popple <alistair@popple.id.au>
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