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authorAlistair Popple <alistair@popple.id.au>2017-07-14 14:51:11 +1000
committerAlistair Popple <alistair@popple.id.au>2017-07-14 14:56:32 +1000
commit7754a6ebe08a5b4863fe24bdbfbb6fc9e15dd561 (patch)
tree1059647d639409915512d2aaf5a74e379bbe2f53 /libpdbg/p8chip.c
parent62ddc2bfa872aeaae3bf07e8ac1d9e6b028c87ce (diff)
downloadpdbg-7754a6ebe08a5b4863fe24bdbfbb6fc9e15dd561.tar.gz
pdbg-7754a6ebe08a5b4863fe24bdbfbb6fc9e15dd561.zip
Makefile.am: Enable -Wall -Werror for libpdbg
Several minor fixes were required to enable building on both x64 and ARM with -Wall -Werror, mostly related to unused variables and bad printf string formats. Signed-off-by: Alistair Popple <alistair@popple.id.au>
Diffstat (limited to 'libpdbg/p8chip.c')
-rw-r--r--libpdbg/p8chip.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c
index c11b68c..e882749 100644
--- a/libpdbg/p8chip.c
+++ b/libpdbg/p8chip.c
@@ -19,6 +19,7 @@
#include <stdlib.h>
#include <ccan/array_size/array_size.h>
#include <unistd.h>
+#include <inttypes.h>
#include "target.h"
#include "operations.h"
@@ -85,7 +86,7 @@ static int assert_special_wakeup(struct chiplet *chip)
CHECK_ERR(pib_read(&chip->target, EX_PM_GP0_REG, &gp0));
if (i++ > SPECIAL_WKUP_TIMEOUT) {
- PR_ERROR("Timeout waiting for special wakeup on %s@0x%08lx\n", chip->target.name,
+ PR_ERROR("Timeout waiting for special wakeup on %s@0x%08" PRIx64 "\n", chip->target.name,
dt_get_address(chip->target.dn, 0, NULL));
return -1;
}
@@ -94,6 +95,8 @@ static int assert_special_wakeup(struct chiplet *chip)
return 0;
}
+#if 0
+/* TODO: Work out when to do this. */
static int deassert_special_wakeup(struct chiplet *chip)
{
/* Assert special wakeup to prevent low power states */
@@ -101,6 +104,7 @@ static int deassert_special_wakeup(struct chiplet *chip)
return 0;
}
+#endif
static uint64_t get_thread_status(struct thread *thread)
{
@@ -168,7 +172,7 @@ static int p8_thread_stop(struct thread *thread)
/* Wait for thread to quiese */
CHECK_ERR(pib_read(&chip->target, RAS_STATUS_REG, &val));
if (i++ > RAS_STATUS_TIMEOUT) {
- PR_ERROR("Unable to quiesce thread %d (0x%016llx).\n",
+ PR_ERROR("Unable to quiesce thread %d (0x%016" PRIx64 ").\n",
thread->id, val);
PR_ERROR("Continuing anyway.\n");
if (val & PPC_BIT(48)) {
@@ -265,13 +269,15 @@ static int p8_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t *
if (GETFIELD(PPC_BITMASK(2,3), val) == 0x3) {
return 1;
} else {
- PR_ERROR("RAMMING failed with status 0x%llx\n", val);
+ PR_ERROR("RAMMING failed with status 0x%" PRIx64 "\n", val);
return 2;
}
}
/* Save the results */
CHECK_ERR(pib_read(&chip->target, SCR0_REG, scratch));
+
+ return 0;
}
static int p8_ram_destroy(struct thread *thread)
@@ -283,6 +289,8 @@ static int p8_ram_destroy(struct thread *thread)
CHECK_ERR(pib_read(&chip->target, RAM_MODE_REG, &ram_mode));
ram_mode &= ~RAM_MODE_ENABLE;
CHECK_ERR(pib_write(&chip->target, RAM_MODE_REG, ram_mode));
+
+ return 0;
}
/*
@@ -318,7 +326,6 @@ static int p8_chiplet_probe(struct target *target)
{
uint64_t value;
struct chiplet *chiplet = target_to_chiplet(target);
- int i, count = 0, rc = 0;
/* Work out if this chip is actually present */
if (pib_read(target, SCOM_EX_GP3, &value)) {
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