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| author | Cyril Bur <cyrilbur@gmail.com> | 2018-04-12 16:01:55 +1000 |
|---|---|---|
| committer | Alistair Popple <alistair@popple.id.au> | 2018-04-24 13:10:09 +1000 |
| commit | 09bc9478937c4ac3b620cff8812fcd44ebca1979 (patch) | |
| tree | efafdb5de7bce68724fc63571d29b4fdb0604e53 /libpdbg | |
| parent | cf7daf476c218cbca433cbccc52f53b629083181 (diff) | |
| download | pdbg-09bc9478937c4ac3b620cff8812fcd44ebca1979.tar.gz pdbg-09bc9478937c4ac3b620cff8812fcd44ebca1979.zip | |
libpdbg/p8chip: Return thread SMT state
Thread status can return the current hardware smt state of a thread
pretty easily, the information is in POW_STATUS_REG which we already
read.
It should be noted that the value read by the scom has nothing to do
with the ppc64_cpu --smt value. The value returned by the hardware is
really how the hardware is operating, it will happy be in SMT1 and
having a thread using the entire core. The other threads to not need to
be asleep for SMT1 to be reported, something like the Linux idle loop
(but without sleep states) will do it. This means that an SMT1 thread
with three others active threads spinning could at any time jump report
SMT4 depending on the load of the system.
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Diffstat (limited to 'libpdbg')
| -rw-r--r-- | libpdbg/libpdbg.h | 6 | ||||
| -rw-r--r-- | libpdbg/operations.h | 8 | ||||
| -rw-r--r-- | libpdbg/p8chip.c | 3 |
3 files changed, 16 insertions, 1 deletions
diff --git a/libpdbg/libpdbg.h b/libpdbg/libpdbg.h index 8c57193..8dec016 100644 --- a/libpdbg/libpdbg.h +++ b/libpdbg/libpdbg.h @@ -73,6 +73,12 @@ uint64_t thread_status(struct pdbg_target *target); #define THREAD_STATUS_NAP PPC_BIT(61) #define THREAD_STATUS_SLEEP PPC_BITMASK(61, 62) #define THREAD_STATUS_QUIESCE PPC_BIT(60) +#define THREAD_STATUS_SMT PPC_BITMASK(57, 59) +#define THREAD_STATUS_SMT_1 PPC_BIT(59) +#define THREAD_STATUS_SMT_2SH PPC_BIT(58) +#define THREAD_STATUS_SMT_2SP (PPC_BIT(58) | PPC_BIT(59)) +#define THREAD_STATUS_SMT_4 PPC_BIT(57) +#define THREAD_STATUS_SMT_8 (PPC_BIT(57) | PPC_BIT(59)) int htm_start(struct pdbg_target *target); int htm_stop(struct pdbg_target *target); diff --git a/libpdbg/operations.h b/libpdbg/operations.h index a0b7f01..d6c947f 100644 --- a/libpdbg/operations.h +++ b/libpdbg/operations.h @@ -16,6 +16,7 @@ #ifndef __OPERATIONS_H #define __OPERATIONS_H +#include "bitutils.h" #include "target.h" /* Error codes */ @@ -42,6 +43,13 @@ int adu_putmem(struct pdbg_target *target, uint64_t start_addr, uint8_t *input, #define THREAD_STATUS_NAP PPC_BIT(61) #define THREAD_STATUS_SLEEP PPC_BITMASK(61, 62) #define THREAD_STATUS_QUIESCE PPC_BIT(60) +#define THREAD_STATUS_SMT PPC_BITMASK(57, 59) +#define THREAD_STATUS_SMT_1 PPC_BIT(59) +#define THREAD_STATUS_SMT_2SH PPC_BIT(58) +#define THREAD_STATUS_SMT_2SP (PPC_BIT(58) | PPC_BIT(59)) +#define THREAD_STATUS_SMT_4 PPC_BIT(57) +#define THREAD_STATUS_SMT_8 (PPC_BIT(57) | PPC_BIT(59)) + /* Opcodes for instruction ramming */ #define OPCODE_MASK 0xfc0003ffUL diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c index d68a521..0123042 100644 --- a/libpdbg/p8chip.c +++ b/libpdbg/p8chip.c @@ -42,6 +42,7 @@ #define RAS_STATUS_TS_QUIESCE PPC_BIT(49) #define POW_STATUS_REG 0x4 #define PMC_POW_STATE PPC_BITMASK(4, 5) +#define PMC_POW_SMT PPC_BITMASK(6, 8) #define CORE_POW_STATE PPC_BITMASK(23, 25) #define THREAD_ACTIVE_REG 0x1310e #define THREAD_ACTIVE PPC_BITMASK(0, 7) @@ -124,7 +125,7 @@ static uint64_t get_thread_status(struct thread *thread) /* Read POW status */ CHECK_ERR(pib_read(&thread->target, POW_STATUS_REG, &val)); thread_status = SETFIELD(THREAD_STATUS_STATE, thread_status, GETFIELD(PMC_POW_STATE, val)); - + thread_status = SETFIELD(THREAD_STATUS_SMT, thread_status, GETFIELD(PMC_POW_SMT, val)); /* Clear debug mode */ mode_reg &= ~MR_THREAD_IN_DEBUG; CHECK_ERR(pib_write(&thread->target, RAS_MODE_REG, mode_reg)); |
