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| author | Alistair Popple <alistair@popple.id.au> | 2016-11-30 15:56:22 +1100 |
|---|---|---|
| committer | Alistair Popple <alistair@popple.id.au> | 2016-11-30 15:56:22 +1100 |
| commit | c305fd7f346a98ff5f24a1797146cd9e41e5a327 (patch) | |
| tree | fda0cc3643b93ad79f5f3d0d46b7869f0e322834 /libpdbg/chip.c | |
| parent | 9092af83c8fb59d86a209e203186e0f979f81d0d (diff) | |
| download | pdbg-c305fd7f346a98ff5f24a1797146cd9e41e5a327.tar.gz pdbg-c305fd7f346a98ff5f24a1797146cd9e41e5a327.zip | |
Fix thread status checks during instruction ramming
Instructions can only be rammed into a thread is all threads on a
chiplet are quiesced or sleeping. This was not properly enforced which
leads to system checkstops when ramming threads if the chip isn't
fully quiesced. This adds a check to ensure all threads are quiesced.
It also changes the startchip/stopchip behaviour to stop all threads
on the given chiplet regards of which threads are selected.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Diffstat (limited to 'libpdbg/chip.c')
| -rw-r--r-- | libpdbg/chip.c | 16 |
1 files changed, 3 insertions, 13 deletions
diff --git a/libpdbg/chip.c b/libpdbg/chip.c index 39a5194..14c92b3 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -172,7 +172,7 @@ uint64_t chiplet_thread_status(struct target *thread) static uint64_t get_thread_status(struct target *thread) { - uint64_t val, mode_reg, thread_status = 0; + uint64_t val, mode_reg, thread_status = thread->status; /* Need to activete debug mode to get complete status */ CHECK_ERR(read_target(thread, RAS_MODE_REG, &mode_reg)); @@ -182,11 +182,8 @@ static uint64_t get_thread_status(struct target *thread) /* Read status */ CHECK_ERR(read_target(thread, RAS_STATUS_REG, &val)); - if (val & RAS_STATUS_THREAD_ACTIVE) - thread_status |= THREAD_STATUS_ACTIVE; - - if (val & RAS_STATUS_TS_QUIESCE) - thread_status |= THREAD_STATUS_QUIESCE; + thread_status = SETFIELD(THREAD_STATUS_ACTIVE, thread_status, !!(val & RAS_STATUS_THREAD_ACTIVE)); + thread_status = SETFIELD(THREAD_STATUS_QUIESCE, thread_status, !!(val & RAS_STATUS_TS_QUIESCE)); /* Read POW status */ CHECK_ERR(read_target(thread, POW_STATUS_REG, &val)); @@ -235,10 +232,6 @@ int ram_stop_thread(struct target *thread) uint64_t val; struct target *chip = thread->next; - /* Skip inactive threads */ - if (!GETFIELD(THREAD_STATUS_ACTIVE, thread->status)) - return -1; - do { /* Quiese active thread */ CHECK_ERR(write_target(thread, DIRECT_CONTROLS_REG, DIRECT_CONTROL_SP_STOP)); @@ -278,9 +271,6 @@ int ram_start_thread(struct target *thread) struct target *chip = thread->next; int thread_id = (thread->base >> 4) & 0x7; - if (!GETFIELD(THREAD_STATUS_ACTIVE, thread->status)) - return -1; - /* Activate thread */ CHECK_ERR(write_target(thread, DIRECT_CONTROLS_REG, DIRECT_CONTROL_SP_START)); |
