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author | Rashmica Gupta <rashmica.g@gmail.com> | 2018-09-07 16:40:08 +1000 |
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committer | Alistair Popple <alistair@popple.id.au> | 2018-09-12 11:08:25 +1000 |
commit | 0f8d82a2e3f5aa16c4423cd1680b0cd9ead6298e (patch) | |
tree | 82dbef7a0d3dcd566d47dc81e77ebea089b20523 /libpdbg/chip.c | |
parent | 9333ef93aa771fa8ae61f44bbbbcff72f20f77fd (diff) | |
download | pdbg-0f8d82a2e3f5aa16c4423cd1680b0cd9ead6298e.tar.gz pdbg-0f8d82a2e3f5aa16c4423cd1680b0cd9ead6298e.zip |
libpdbg: Add in mtocrf and putcr function
Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'libpdbg/chip.c')
-rw-r--r-- | libpdbg/chip.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/libpdbg/chip.c b/libpdbg/chip.c index 31c8c80..7a93ab6 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -52,6 +52,20 @@ static uint64_t mfocrf(uint64_t reg, uint64_t cr) return MFOCRF_OPCODE | (reg << 21) | (1U << (12 + cr)); } +static uint64_t mtocrf(uint64_t cr, uint64_t reg) +{ + if (reg > 31) { + PR_ERROR("Invalid register specified for mfocrf\n"); + exit(1); + } + if (cr > 7) { + PR_ERROR("Invalid CR field specified\n"); + exit(1); + } + + return MTOCRF_OPCODE | (reg << 21) | (1U << (12 + cr)); +} + static uint64_t mfnia(uint64_t reg) { if (reg > 31) @@ -303,6 +317,18 @@ int ram_getcr(struct pdbg_target *thread, uint32_t *value) return 0; } +int ram_putcr(struct pdbg_target *thread, uint32_t value) +{ + uint64_t opcodes[] = {mfspr(0, 277), mtocrf(0, 0), mtocrf(1, 0), + mtocrf(2, 0), mtocrf(3, 0), mtocrf(4, 0), + mtocrf(5, 0), mtocrf(6, 0), mtocrf(7, 0)}; + uint64_t results[] = {value}; + + CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); + + return 0; +} + int ram_putmsr(struct pdbg_target *thread, uint64_t value) { uint64_t opcodes[] = {mfspr(0, 277), mtmsr(0)}; |