summaryrefslogtreecommitdiffstats
path: root/configure.ac
diff options
context:
space:
mode:
authorNicholas Piggin <npiggin@gmail.com>2019-03-12 11:49:20 +1000
committerAlistair Popple <alistair@popple.id.au>2019-03-27 17:02:19 +1100
commit51ca1a18d56948aeaae8599e6629aebb0b501519 (patch)
treeb662cc10916a95a53a093fd2e0a7b9196f88d7a8 /configure.ac
parentdccba372193c95469de633144c1f3ba2ba8ac223 (diff)
downloadpdbg-51ca1a18d56948aeaae8599e6629aebb0b501519.tar.gz
pdbg-51ca1a18d56948aeaae8599e6629aebb0b501519.zip
libpdbg/p8chip.c: Emulate sreset using ramming for active threads
Based on patch from Alistair, some fixes and changes: - account HILE bit, set/clear MSR_LE - clear MSR_PR - don't use raw ramming (clearer this way, not perf critical) At the moment, must manually stop all threads in the core, and manually restart them. Can change behaviour depending on what exactly we want (e.g., sreset all threads may be good for debugging). Signed-off-by: Alistair Popple <alistair@popple.id.au> Tested-by: Stewart Smith <stewart@linux.ibm.com>
Diffstat (limited to 'configure.ac')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud