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author | Matt Spinler <spinler@us.ibm.com> | 2017-02-28 10:10:50 -0600 |
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committer | Matt Spinler <spinler@us.ibm.com> | 2017-03-14 13:21:34 -0500 |
commit | 6419b6387728fecc3558a601f254cffc9ed6d008 (patch) | |
tree | a3fb57c1146028bac6dd42beff87d5ddb65de0c1 | |
parent | 0c0eeff6e991077f6a4570880b01396ac1b9e2e5 (diff) | |
download | openpower-proc-control-6419b6387728fecc3558a601f254cffc9ed6d008.tar.gz openpower-proc-control-6419b6387728fecc3558a601f254cffc9ed6d008.zip |
Fill in startHost and vcsWorkaround procedures
These will replace /usr/bin/start_host.sh and
/usr/bin/vcs_workaround.sh.
Change-Id: I799da6d6052e72fb05760a115dfeb202416dc34d
Signed-off-by: Matt Spinler <spinler@us.ibm.com>
-rw-r--r-- | p9_procedures.cpp | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/p9_procedures.cpp b/p9_procedures.cpp index 37a3b10..188fec0 100644 --- a/p9_procedures.cpp +++ b/p9_procedures.cpp @@ -13,20 +13,86 @@ * See the License for the specific language governing permissions and * limitations under the License. */ +#include <phosphor-logging/log.hpp> +#include "cfam_access.hpp" +#include "p9_cfam.hpp" +#include "targeting.hpp" + namespace openpower { namespace p9 { +using namespace phosphor::logging; +using namespace openpower::cfam::access; +using namespace openpower::cfam::p9; +using namespace openpower::targeting; + void startHost() { + Targeting targets; + const auto& master = *(targets.begin()); + + log<level::INFO>("Running P9 procedure startHost", + entry("NUM_PROCS=%d", targets.size())); + + + //Ensure asynchronous clock mode is set + writeReg(master, P9_LL_MODE_REG, 0x00000001); + + //Clock mux select override + for (const auto& t : targets) + { + writeRegWithMask(t, P9_ROOT_CTRL8, + 0x0000000C, 0x0000000C); + } + + //Enable P9 checkstop to be reported to the BMC + + //Setup FSI2PIB to report checkstop + writeReg(master, P9_FSI_A_SI1S, 0x20000000); + //Enable Xstop/ATTN interrupt + writeReg(master, P9_FSI2PIB_TRUE_MASK, 0x60000000); + + //Arm it + writeReg(master, P9_FSI2PIB_INTERRUPT, 0xFFFFFFFF); + + //Kick off the SBE to start the boot + + //First ensure ISTEP stepping isn't enabled + writeReg(master, P9_SCRATCH_REGISTER_8, 0x20000000); + + //Start the SBE + writeRegWithMask(master, P9_CBS_CS, 0x80000000, 0x80000000); } void vcsWorkaround() { + Targeting targets; + const auto& master = *(targets.begin()); + + log<level::INFO>("Running P9 procedure vcsWorkaround", + entry("NUM_PROCS=%d", targets.size())); + + //Set asynchronous clock mode + writeReg(master, P9_LL_MODE_REG, 0x00000001); + + for (const auto& t : targets) + { + //Unfence PLL controls + writeRegWithMask(t, P9_ROOT_CTRL0, + 0x00000000, 0x00010000); + + //Assert Perv chiplet endpoint reset + writeRegWithMask(t, P9_PERV_CTRL0, + 0x40000000, 0x40000000); + //Enable Nest PLL + writeRegWithMask(t, P9_PERV_CTRL0, + 0x00000001, 0x00000001); + } } } |