2.6.27.62-libre5-lemote_0lxo

9 files changed, 95701 insertions, 0 deletions

diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/100gnu+freedo.patch b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/100gnu+freedo.patch
new file mode 100644
index 000000000..6995228fc
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/100gnu+freedo.patch
@@ -0,0 +1,14669 @@
+By Alexandre Oliva, based on Ali Gündüz's
+http://www.aligunduz.org/gNewSense/librelogo-2.6.29-fshoppe1.patch
+
+Backported to 2.6.30 after update to 2.6.32, modified to use this image:
+http://fsfla.org/selibre/linux-libre/100gnu+freedo.png
+
+Image converted using the following commands:
+convert -background black -flatten 100gnu+freedo.png 100gnu+freedo.ppm &&
+ppmquant -fs 223 < 100gnu+freedo.ppm |
+pnmtoplainpnm > drivers/video/logo/logo_libre_clut224.ppm
+
+Index: linux-2.6.27.45/drivers/video/logo/Kconfig
+===================================================================
+--- linux-2.6.27.45.orig/drivers/video/logo/Kconfig	2010-01-28 23:21:45.000000000 +0000
++++ linux-2.6.27.45/drivers/video/logo/Kconfig	2010-01-29 07:26:20.000000000 +0000
+@@ -42,6 +42,10 @@
+ 	depends on MACH_DECSTATION || ALPHA
+ 	default y
+ 
++config LOGO_LIBRE_CLUT224
++	bool "224-color Linux-libre logo"
++	default y
++
+ config LOGO_MAC_CLUT224
+ 	bool "224-color Macintosh Linux logo"
+ 	depends on MAC
+Index: linux-2.6.27.45/drivers/video/logo/logo.c
+===================================================================
+--- linux-2.6.27.45.orig/drivers/video/logo/logo.c	2010-01-28 23:21:45.000000000 +0000
++++ linux-2.6.27.45/drivers/video/logo/logo.c	2010-01-29 07:26:20.000000000 +0000
+@@ -27,6 +27,7 @@
+ extern const struct linux_logo logo_blackfin_vga16;
+ extern const struct linux_logo logo_blackfin_clut224;
+ extern const struct linux_logo logo_dec_clut224;
++extern const struct linux_logo logo_libre_clut224;
+ extern const struct linux_logo logo_mac_clut224;
+ extern const struct linux_logo logo_parisc_clut224;
+ extern const struct linux_logo logo_sgi_clut224;
+@@ -90,6 +91,10 @@
+ 		/* DEC Linux logo on MIPS/MIPS64 or ALPHA */
+ 		logo = &logo_dec_clut224;
+ #endif
++#ifdef CONFIG_LOGO_LIBRE_CLUT224
++		/* Linux-libre logo */
++		logo = &logo_libre_clut224;
++#endif
+ #ifdef CONFIG_LOGO_MAC_CLUT224
+ 		/* Macintosh Linux logo on m68k */
+ 		if (MACH_IS_MAC)
+Index: linux-2.6.27.45/drivers/video/logo/logo_libre_clut224.ppm
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.27.45/drivers/video/logo/logo_libre_clut224.ppm	2010-01-29 07:26:21.000000000 +0000
+@@ -0,0 +1,14603 @@
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++0 0 0 0 0 0 0 0 0 0 0 0 128 128 128 
++128 128 128 128 128 128 257 257 257 257 257 257 257 257 257 
++257 257 257 257 257 257 257 257 257 257 257 257 257 257 257 
++257 257 257 257 257 257 257 257 257 128 128 128 128 128 128 
++0 0 0 0 0 0 0 0 0 128 128 128 128 128 128 
++128 128 128 0 0 0 0 0 0 0 0 0 0 0 0 
++257 257 257 128 128 128 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++128 128 128 128 128 128 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 128 128 128 128 128 128 
++1264 929 361 3855 2930 1607 0 0 0 0 0 0 128 128 128 
++0 0 0 257 257 257 128 128 128 128 128 128 0 0 0 
++0 0 0 128 128 128 257 257 257 257 257 257 128 128 128 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 128 128 128 128 128 128 128 128 128 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 128 128 128 128 128 128 
++128 128 128 128 128 128 0 0 0 0 0 0 0 0 0 
++0 0 0 128 128 128 128 128 128 0 0 0 0 0 0 
++0 0 0 0 0 0 257 257 257 128 128 128 0 0 0 
++0 0 0 0 0 0 0 0 0 128 128 128 3855 2930 1607 
++875 620 271 128 128 128 0 0 0 128 128 128 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 128 128 128 
++257 257 257 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 128 128 128 128 128 128 257 257 257 
++3038 2204 899 1264 929 361 128 128 128 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
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++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
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++128 128 128 128 128 128 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
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++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
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++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
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++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
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++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
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++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
++
+Index: linux-2.6.27.45/drivers/video/logo/Makefile
+===================================================================
+--- linux-2.6.27.45.orig/drivers/video/logo/Makefile	2010-01-28 23:21:45.000000000 +0000
++++ linux-2.6.27.45/drivers/video/logo/Makefile	2010-01-29 07:26:21.000000000 +0000
+@@ -7,6 +7,7 @@
+ obj-$(CONFIG_LOGO_BLACKFIN_CLUT224)	+= logo_blackfin_clut224.o
+ obj-$(CONFIG_LOGO_BLACKFIN_VGA16)	+= logo_blackfin_vga16.o
+ obj-$(CONFIG_LOGO_DEC_CLUT224)		+= logo_dec_clut224.o
++obj-$(CONFIG_LOGO_LIBRE_CLUT224)	+= logo_libre_clut224.o
+ obj-$(CONFIG_LOGO_MAC_CLUT224)		+= logo_mac_clut224.o
+ obj-$(CONFIG_LOGO_PARISC_CLUT224)	+= logo_parisc_clut224.o
+ obj-$(CONFIG_LOGO_SGI_CLUT224)		+= logo_sgi_clut224.o
diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27-loongson-fixes.patch b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27-loongson-fixes.patch
new file mode 100644
index 000000000..77e6f0258
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27-loongson-fixes.patch
@@ -0,0 +1,19 @@
+This is back-ported from 2.6.31, to bring in the assembler-introduced work-arounds
+that avoid CPU lock-ups in certain circumstances.
+
+Index: linux-2.6.27.43-libre3-lemote_0lxo/arch/mips/Makefile
+===================================================================
+--- linux-2.6.27.43-libre3-lemote_0lxo.orig/arch/mips/Makefile	2010-01-09 11:17:35.000000000 +0000
++++ linux-2.6.27.43-libre3-lemote_0lxo/arch/mips/Makefile	2010-01-09 11:18:08.000000000 +0000
+@@ -120,6 +120,11 @@
+ cflags-$(CONFIG_CPU_R4X00)	+= -march=r4600 -Wa,--trap
+ cflags-$(CONFIG_CPU_TX49XX)	+= -march=r4600 -Wa,--trap
+ cflags-$(CONFIG_CPU_LOONGSON2)	+= -march=r4600 -Wa,--trap
++cflags-$(CONFIG_MACH_LM2F) += \
++	$(call cc-option,-march=loongson2f,-march=r4600) \
++	$(call as-option,-Wa$(comma)-mfix-ls2f-kernel,) \
++	$(call as-option,-Wa$(comma)-mfix-loongson2f-nop,) \
++	$(call as-option,-Wa$(comma)-mfix-loongson2f-jump,)
+ cflags-$(CONFIG_CPU_MIPS32_R1)	+= $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
+ 			-Wa,-mips32 -Wa,--trap
+ cflags-$(CONFIG_CPU_MIPS32_R2)	+= $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27-mips-fixes.patch b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27-mips-fixes.patch
new file mode 100644
index 000000000..377ded6b7
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27-mips-fixes.patch
@@ -0,0 +1,51 @@
+commit 034b4c38bbb0208d63e5409c3575774949854153
+Author: Zhang Le <r0bertz@gentoo.org>
+Date:   Thu Mar 12 18:00:50 2009 +0800
+
+    MIPS: compat: Move TIF_32BIT definition.
+    
+    This will prevent a build error after the merge with v2.6.27.20.
+    
+    Signed-off-by: Zhang Le <r0bertz@gentoo.org>
+    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+    (cherry picked from commit 85f3112271a8b4b4d987335f6f28652dd432542f)
+
+Index: linux-2.6.27.43/include/asm-mips/seccomp.h
+===================================================================
+--- linux-2.6.27.43.orig/include/asm-mips/seccomp.h	2010-01-09 04:17:58.000000000 +0000
++++ linux-2.6.27.43/include/asm-mips/seccomp.h	2010-01-09 04:18:21.000000000 +0000
+@@ -15,8 +15,6 @@
+  */
+ #ifdef CONFIG_MIPS32_O32
+ 
+-#define TIF_32BIT TIF_32BIT_REGS
+-
+ #define __NR_seccomp_read_32		4003
+ #define __NR_seccomp_write_32		4004
+ #define __NR_seccomp_exit_32		4001
+@@ -24,8 +22,6 @@
+ 
+ #elif defined(CONFIG_MIPS32_N32)
+ 
+-#define TIF_32BIT _TIF_32BIT_ADDR
+-
+ #define __NR_seccomp_read_32		6000
+ #define __NR_seccomp_write_32		6001
+ #define __NR_seccomp_exit_32		6058
+Index: linux-2.6.27.43/include/asm-mips/thread_info.h
+===================================================================
+--- linux-2.6.27.43.orig/include/asm-mips/thread_info.h	2010-01-09 04:18:05.000000000 +0000
++++ linux-2.6.27.43/include/asm-mips/thread_info.h	2010-01-09 04:18:51.000000000 +0000
+@@ -126,6 +126,12 @@
+ #define TIF_FPUBOUND		24	/* thread bound to FPU-full CPU set */
+ #define TIF_SYSCALL_TRACE	31	/* syscall trace active */
+ 
++#ifdef CONFIG_MIPS32_O32
++#define TIF_32BIT TIF_32BIT_REGS
++#elif defined(CONFIG_MIPS32_N32)
++#define TIF_32BIT _TIF_32BIT_ADDR
++#endif /* CONFIG_MIPS32_O32 */
++
+ #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
+ #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
+ #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27.7-be75987188-loongson.patch b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27.7-be75987188-loongson.patch
new file mode 100644
index 000000000..293c1a9ce
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/2.6.27.7-be75987188-loongson.patch
@@ -0,0 +1,36968 @@
+diff --git a/Documentation/fb/00-INDEX b/Documentation/fb/00-INDEX
+index caabbd3..28227cc 100644
+--- a/Documentation/fb/00-INDEX
++++ b/Documentation/fb/00-INDEX
+@@ -43,6 +43,8 @@ sa1100fb.txt
+ 	- information about the driver for the SA-1100 LCD controller.
+ sisfb.txt
+ 	- info on the framebuffer device driver for various SiS chips.
++splash.txt
++	- info on the Framebuffer Splash
+ sstfb.txt
+ 	- info on the frame buffer driver for 3dfx' Voodoo Graphics boards.
+ tgafb.txt
+diff --git a/Documentation/fb/splash.txt b/Documentation/fb/splash.txt
+new file mode 100644
+index 0000000..6b281c9
+--- /dev/null
++++ b/Documentation/fb/splash.txt
+@@ -0,0 +1,207 @@
++What is it?
++-----------
++
++The framebuffer splash is a kernel feature that allows displaying a background
++picture on selected consoles.
++
++What do I need to get it to work?
++---------------------------------
++
++To get fb splash up-and-running you will have to:
++ 1) get a copy of splashutils [1] or a similar program
++ 2) get some splash themes
++ 3) build the kernel helper program
++ 4) build your kernel with the FB_SPLASH option enabled.
++
++To get fbsplash operational right after fbcon initialization is finished, you
++will have to include a theme and the kernel helper into your initramfs image.
++Please refer to splashutils documentation for instructions on how to do that.
++
++[1] The splashutils package can be downloaded from:
++    http://dev.gentoo.org/~spock/projects/splashutils/
++
++The userspace helper
++--------------------
++
++The userspace splash helper (by default: /sbin/splash_helper) is called by the
++kernel whenever an important event occurs and the kernel needs some kind of
++job to be carried out. Important events include console switches and video
++mode switches (the kernel requests background images and configuration
++parameters for the current console). The splash helper must be accessible at
++all times. If it's not, fbsplash will be switched off automatically.
++
++It's possible to set path to the splash helper by writing it to
++/proc/sys/kernel/fbsplash.
++
++*****************************************************************************
++
++The information below is mostly technical stuff. There's probably no need to
++read it unless you plan to develop a userspace helper.
++
++The splash protocol
++-------------------
++
++The splash protocol defines a communication interface between the kernel and
++the userspace splash helper.
++
++The kernel side is responsible for:
++
++ * rendering console text, using an image as a background (instead of a
++   standard solid color fbcon uses),
++ * accepting commands from the user via ioctls on the fbsplash device,
++ * calling the userspace helper to set things up as soon as the fb subsystem 
++   is initialized.
++
++The userspace helper is responsible for everything else, including parsing
++configuration files, decompressing the image files whenever the kernel needs
++it, and communicating with the kernel if necessary.
++
++The splash protocol specifies how communication is done in both ways:
++kernel->userspace and userspace->helper.
++  
++Kernel -> Userspace
++-------------------
++
++The kernel communicates with the userspace helper by calling it and specifying
++the task to be done in a series of arguments.
++
++The arguments follow the pattern:
++<splash protocol version> <command> <parameters>
++
++All commands defined in splash protocol v2 have the following parameters:
++ virtual console
++ framebuffer number
++ theme
++
++Splash protocol v1 specified an additional 'fbsplash mode' after the
++framebuffer number. Splash protocol v1 is deprecated and should not be used.
++
++Splash protocol v2 specifies the following commands:
++
++getpic
++------
++ The kernel issues this command to request image data. It's up to the 
++ userspace  helper to find a background image appropriate for the specified 
++ theme and the current resolution. The userspace helper should respond by 
++ issuing the FBIOSPLASH_SETPIC ioctl.
++
++init
++----
++ The kernel issues this command after the fbsplash device is created and
++ the fbsplash interface is initialized. Upon receiving 'init', the userspace
++ helper should parse the kernel command line (/proc/cmdline) or otherwise
++ decide whether fbsplash is to be activated.
++
++ To activate fbsplash on the first console the helper should issue the
++ FBIOSPLASH_SETCFG, FBIOSPLASH_SETPIC and FBIOSPLASH_SETSTATE commands,
++ in the above-mentioned order.
++
++ When the userspace helper is called in an early phase of the boot process
++ (right after the initialization of fbcon), no filesystems will be mounted.
++ The helper program should mount sysfs and then create the appropriate
++ framebuffer, fbsplash and tty0 devices (if they don't already exist) to get
++ current display settings and to be able to communicate with the kernel side.
++ It should probably also mount the procfs to be able to parse the kernel
++ command line parameters.
++
++ Note that the console sem is not held when the kernel calls splash_helper
++ with the 'init' command. The splash helper should perform all ioctls with
++ origin set to FB_SPLASH_IO_ORIG_USER.
++
++modechange
++----------
++ The kernel issues this command on a mode change. The helper's response should
++ be similar to the response to the 'init' command. Note that this time the
++ console sem is held and all ioctls must be performed with origin set to
++ FB_SPLASH_IO_ORIG_KERNEL.
++
++
++Userspace -> Kernel
++-------------------
++
++Userspace programs can communicate with fbsplash via ioctls on the fbsplash
++device. These ioctls are to be used by both the userspace helper (called
++only by the kernel) and userspace configuration tools (run by the users).
++
++The splash helper should set the origin field to FB_SPLASH_IO_ORIG_KERNEL
++when doing the appropriate ioctls. All userspace configuration tools should
++use FB_SPLASH_IO_ORIG_USER. Failure to set the appropriate value in the origin
++field when performing ioctls from the kernel helper will most likely result
++in a console deadlock.
++
++FB_SPLASH_IO_ORIG_KERNEL instructs fbsplash not to try to acquire the console
++semaphore. Not surprisingly, FB_SPLASH_IO_ORIG_USER instructs it to acquire
++the console sem.
++
++The framebuffer splash provides the following ioctls (all defined in 
++linux/fb.h):
++
++FBIOSPLASH_SETPIC
++description: loads a background picture for a virtual console
++argument: struct fb_splash_iowrapper*; data: struct fb_image*
++notes: 
++If called for consoles other than the current foreground one, the picture data
++will be ignored.
++
++If the current virtual console is running in a 8-bpp mode, the cmap substruct
++of fb_image has to be filled appropriately: start should be set to 16 (first
++16 colors are reserved for fbcon), len to a value <= 240 and red, green and
++blue should point to valid cmap data. The transp field is ingored. The fields
++dx, dy, bg_color, fg_color in fb_image are ignored as well.
++
++FBIOSPLASH_SETCFG
++description: sets the fbsplash config for a virtual console
++argument: struct fb_splash_iowrapper*; data: struct vc_splash*
++notes: The structure has to be filled with valid data.
++
++FBIOSPLASH_GETCFG
++description: gets the fbsplash config for a virtual console
++argument: struct fb_splash_iowrapper*; data: struct vc_splash*
++
++FBIOSPLASH_SETSTATE
++description: sets the fbsplash state for a virtual console
++argument: struct fb_splash_iowrapper*; data: unsigned int*
++          values: 0 = disabled, 1 = enabled.
++
++FBIOSPLASH_GETSTATE
++description: gets the fbsplash state for a virtual console
++argument: struct fb_splash_iowrapper*; data: unsigned int*
++          values: as in FBIOSPLASH_SETSTATE
++
++Info on used structures:
++
++Definition of struct vc_splash can be found in linux/console_splash.h. It's
++heavily commented. Note that the 'theme' field should point to a string
++no longer than FB_SPLASH_THEME_LEN. When FBIOSPLASH_GETCFG call is
++performed, the theme field should point to a char buffer of length
++FB_SPLASH_THEME_LEN.
++
++Definition of struct fb_splash_iowrapper can be found in linux/fb.h.
++The fields in this struct have the following meaning:
++
++vc: 
++Virtual console number.
++
++origin: 
++Specifies if the ioctl is performed as a response to a kernel request. The
++splash helper should set this field to FB_SPLASH_IO_ORIG_KERNEL, userspace
++programs should set it to FB_SPLASH_IO_ORIG_USER. This field is necessary to
++avoid console semaphore deadlocks.
++
++data: 
++Pointer to a data structure appropriate for the performed ioctl. Type of
++the data struct is specified in the ioctls description.
++
++*****************************************************************************
++
++Credit
++------
++
++Original 'bootsplash' project & implementation by:
++  Volker Poplawski <volker@poplawski.de>, Stefan Reinauer <stepan@suse.de>,
++  Steffen Winterfeldt <snwint@suse.de>, Michael Schroeder <mls@suse.de>,
++  Ken Wimer <wimer@suse.de>.
++
++Fbsplash, splash protocol design, current implementation & docs by:
++  Michal Januszewski <spock@gentoo.org>
++
+diff --git a/Makefile b/Makefile
+index b5f52f3..4ea8373 100644
+--- a/Makefile
++++ b/Makefile
+@@ -189,9 +189,10 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
+ # Alternatively CROSS_COMPILE can be set in the environment.
+ # Default value for CROSS_COMPILE is not to prefix executables
+ # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
++
+ export KBUILD_BUILDHOST := $(SUBARCH)
+-ARCH		?= $(SUBARCH)
+-CROSS_COMPILE	?=
++ARCH		?= mips
++CROSS_COMPILE	?= 
+ 
+ # Architecture as present in compile.h
+ UTS_MACHINE 	:= $(ARCH)
+diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
+index 1e06d23..5059abe 100644
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -6,7 +6,7 @@ config MIPS
+ 	select HAVE_ARCH_KGDB
+ 	# Horrible source of confusion.  Die, die, die ...
+ 	select EMBEDDED
+-	select RTC_LIB
++	select RTC_LIB if !MACH_LM2F
+ 
+ mainmenu "Linux/MIPS Kernel Configuration"
+ 
+@@ -181,6 +181,9 @@ config LEMOTE_FULONG
+ 	  Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
+ 	  an FPGA northbridge
+ 
++config MACH_LM2F
++	bool "Lemote LOONGSON2F based machines"
++
+ config MIPS_MALTA
+ 	bool "MIPS Malta board"
+ 	select ARCH_MAY_HAVE_PC_FDC
+@@ -607,6 +610,7 @@ source "arch/mips/sgi-ip27/Kconfig"
+ source "arch/mips/sibyte/Kconfig"
+ source "arch/mips/txx9/Kconfig"
+ source "arch/mips/vr41xx/Kconfig"
++source "arch/mips/lemote/lm2f/Kconfig"
+ 
+ endmenu
+ 
+@@ -954,7 +958,7 @@ config CPU_LOONGSON2
+ 	select CPU_SUPPORTS_64BIT_KERNEL
+ 	select CPU_SUPPORTS_HIGHMEM
+ 	help
+-	  The Loongson 2E processor implements the MIPS III instruction set
++	  The Loongson 2E/2F processor implements the MIPS III instruction set
+ 	  with many extensions.
+ 
+ config CPU_MIPS32_R1
+@@ -2015,6 +2019,9 @@ endmenu
+ 
+ menu "Power management options"
+ 
++config ARCH_HIBERNATION_POSSIBLE
++	def_bool y
++
+ config ARCH_SUSPEND_POSSIBLE
+ 	def_bool y
+ 	depends on !SMP
+@@ -2023,6 +2030,23 @@ source "kernel/power/Kconfig"
+ 
+ endmenu
+ 
++menu "CPU Frequency scaling"
++
++source "drivers/cpufreq/Kconfig"
++
++config LS2F_CPU_FREQ
++	tristate "Loongson-2F CPU Frequency driver"
++	depends on CPU_LOONGSON2 && CPU_FREQ
++	select CPU_FREQ_TABLE
++	help
++	  This adds the cpufreq driver for Loongson-2F.
++
++	  For details, take a look at <file:Documentation/cpu-freq>.
++
++	  If unsure, say N.
++
++endmenu
++
+ source "net/Kconfig"
+ 
+ source "drivers/Kconfig"
+diff --git a/arch/mips/Makefile b/arch/mips/Makefile
+index 9aab51c..95036fd 100644
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -305,6 +305,25 @@ load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
+ cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
+ 
+ #
++# common lemote loongson2f stuffs
++#
++core-$(CONFIG_MACH_LM2F) +=arch/mips/lemote/lm2f/common/
++
++#
++# lemote loongson2f fulong mini-PC board
++#
++core-$(CONFIG_LEMOTE_FULONG2F) +=arch/mips/lemote/lm2f/lmbox/
++load-$(CONFIG_LEMOTE_FULONG2F) +=0xffffffff80200000
++cflags-$(CONFIG_LEMOTE_FULONG2F) += -Iinclude/asm-mips/mach-lemote
++
++#
++# lemote loongson2f notebook
++#
++core-$(CONFIG_LEMOTE_2FNOTEBOOK) +=arch/mips/lemote/lm2f/lmbook/
++load-$(CONFIG_LEMOTE_2FNOTEBOOK) +=0xffffffff80200000
++cflags-$(CONFIG_LEMOTE_2FNOTEBOOK) += -Iinclude/asm-mips/mach-lemote
++
++#
+ # MIPS Malta board
+ #
+ core-$(CONFIG_MIPS_MALTA)	+= arch/mips/mti-malta/
+@@ -649,6 +668,9 @@ core-y			+= arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
+ 
+ drivers-$(CONFIG_OPROFILE)	+= arch/mips/oprofile/
+ 
++#Support hibernate
++drivers-$(CONFIG_PM)	+= arch/mips/power/
++
+ ifdef CONFIG_LASAT
+ rom.bin rom.sw: vmlinux
+ 	$(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
+@@ -695,6 +717,13 @@ ifdef CONFIG_MIPS32_O32
+ 	$(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32"
+ endif
+ 
++zboot := arch/mips/zboot
++bzImage: KBUILD_IMAGE := arch/mips/zboot/bzImage
++
++BOOT_TARGETS = bzImage
++
++$(BOOT_TARGETS):  vmlinux
++	$(Q)$(MAKE) $(build)=$(zboot) $(KBUILD_IMAGE) ZBOOT_FLAGS=$(CFLAGS)
+ archclean:
+ 	@$(MAKE) $(clean)=arch/mips/boot
+ 	@$(MAKE) $(clean)=arch/mips/lasat
+diff --git a/arch/mips/configs/ls2f_fuloong_defconfig b/arch/mips/configs/ls2f_fuloong_defconfig
+new file mode 100644
+index 0000000..da5d8e5
+--- /dev/null
++++ b/arch/mips/configs/ls2f_fuloong_defconfig
+@@ -0,0 +1,2274 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.27.1
++#
++CONFIG_MIPS=y
++
++#
++# Machine selection
++#
++# CONFIG_MACH_ALCHEMY is not set
++# CONFIG_BASLER_EXCITE is not set
++# CONFIG_BCM47XX is not set
++# CONFIG_MIPS_COBALT is not set
++# CONFIG_MACH_DECSTATION is not set
++# CONFIG_MACH_JAZZ is not set
++# CONFIG_LASAT is not set
++# CONFIG_LEMOTE_FULONG is not set
++CONFIG_MACH_LM2F=y
++# CONFIG_MIPS_MALTA is not set
++# CONFIG_MIPS_SIM is not set
++# CONFIG_MARKEINS is not set
++# CONFIG_MACH_VR41XX is not set
++# CONFIG_PNX8550_JBS is not set
++# CONFIG_PNX8550_STB810 is not set
++# CONFIG_PMC_MSP is not set
++# CONFIG_PMC_YOSEMITE is not set
++# CONFIG_SGI_IP22 is not set
++# CONFIG_SGI_IP27 is not set
++# CONFIG_SGI_IP28 is not set
++# CONFIG_SGI_IP32 is not set
++# CONFIG_SIBYTE_CRHINE is not set
++# CONFIG_SIBYTE_CARMEL is not set
++# CONFIG_SIBYTE_CRHONE is not set
++# CONFIG_SIBYTE_RHONE is not set
++# CONFIG_SIBYTE_SWARM is not set
++# CONFIG_SIBYTE_LITTLESUR is not set
++# CONFIG_SIBYTE_SENTOSA is not set
++# CONFIG_SIBYTE_BIGSUR is not set
++# CONFIG_SNI_RM is not set
++# CONFIG_MACH_TX39XX is not set
++# CONFIG_MACH_TX49XX is not set
++# CONFIG_MIKROTIK_RB532 is not set
++# CONFIG_WR_PPMC is not set
++CONFIG_LEMOTE_FULONG2F=y
++# CONFIG_LEMOTE_2FNOTEBOOK is not set
++CONFIG_CS5536_RTC_BUG=y
++CONFIG_CS5536=y
++# CONFIG_LEMOTE_NAS is not set
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_FIND_NEXT_BIT=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_GENERIC_TIME=y
++CONFIG_GENERIC_CMOS_UPDATE=y
++CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_CEVT_R4K=y
++CONFIG_CSRC_R4K=y
++CONFIG_DMA_NONCOHERENT=y
++CONFIG_DMA_NEED_PCI_MAP_STATE=y
++CONFIG_EARLY_PRINTK=y
++CONFIG_SYS_HAS_EARLY_PRINTK=y
++# CONFIG_HOTPLUG_CPU is not set
++CONFIG_I8259=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_ISA_DMA=y
++CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y
++# CONFIG_CPU_BIG_ENDIAN is not set
++CONFIG_CPU_LITTLE_ENDIAN=y
++CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
++CONFIG_IRQ_CPU=y
++CONFIG_BOOT_ELF32=y
++CONFIG_MIPS_L1_CACHE_SHIFT=5
++CONFIG_HAVE_STD_PC_SERIAL_PORT=y
++
++#
++# CPU selection
++#
++CONFIG_CPU_LOONGSON2=y
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS32_R2 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
++# CONFIG_CPU_MIPS64_R2 is not set
++# CONFIG_CPU_R3000 is not set
++# CONFIG_CPU_TX39XX is not set
++# CONFIG_CPU_VR41XX is not set
++# CONFIG_CPU_R4300 is not set
++# CONFIG_CPU_R4X00 is not set
++# CONFIG_CPU_TX49XX is not set
++# CONFIG_CPU_R5000 is not set
++# CONFIG_CPU_R5432 is not set
++# CONFIG_CPU_R6000 is not set
++# CONFIG_CPU_NEVADA is not set
++# CONFIG_CPU_R8000 is not set
++# CONFIG_CPU_R10000 is not set
++# CONFIG_CPU_RM7000 is not set
++# CONFIG_CPU_RM9000 is not set
++# CONFIG_CPU_SB1 is not set
++CONFIG_SYS_HAS_CPU_LOONGSON2=y
++CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
++CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
++CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
++CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
++
++#
++# Kernel type
++#
++# CONFIG_32BIT is not set
++CONFIG_64BIT=y
++# CONFIG_PAGE_SIZE_4KB is not set
++# CONFIG_PAGE_SIZE_8KB is not set
++CONFIG_PAGE_SIZE_16KB=y
++# CONFIG_PAGE_SIZE_64KB is not set
++CONFIG_BOARD_SCACHE=y
++CONFIG_MIPS_MT_DISABLED=y
++# CONFIG_MIPS_MT_SMP is not set
++# CONFIG_MIPS_MT_SMTC is not set
++CONFIG_CPU_HAS_WB=y
++CONFIG_CPU_HAS_SYNC=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_CPU_SUPPORTS_HIGHMEM=y
++CONFIG_SYS_SUPPORTS_HIGHMEM=y
++CONFIG_ARCH_FLATMEM_ENABLE=y
++CONFIG_ARCH_POPULATES_NODE_MAP=y
++CONFIG_ARCH_SPARSEMEM_ENABLE=y
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_SPARSEMEM_STATIC=y
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4
++CONFIG_RESOURCES_64BIT=y
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++# CONFIG_HZ_48 is not set
++# CONFIG_HZ_100 is not set
++# CONFIG_HZ_128 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_256 is not set
++# CONFIG_HZ_1000 is not set
++# CONFIG_HZ_1024 is not set
++CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
++CONFIG_HZ=250
++# CONFIG_PREEMPT_NONE is not set
++CONFIG_PREEMPT_VOLUNTARY=y
++# CONFIG_PREEMPT is not set
++CONFIG_KEXEC=y
++# CONFIG_SECCOMP is not set
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++# CONFIG_TASKSTATS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=15
++# CONFIG_CGROUPS is not set
++# CONFIG_GROUP_SCHED is not set
++# CONFIG_SYSFS_DEPRECATED_V2 is not set
++# CONFIG_RELAY is not set
++# CONFIG_NAMESPACES is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_PCSPKR_PLATFORM=y
++CONFIG_COMPAT_BRK=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++CONFIG_PROFILING=y
++# CONFIG_MARKERS is not set
++CONFIG_OPROFILE=m
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
++# CONFIG_HAVE_IOREMAP_PROT is not set
++# CONFIG_HAVE_KPROBES is not set
++# CONFIG_HAVE_KRETPROBES is not set
++# CONFIG_HAVE_ARCH_TRACEHOOK is not set
++# CONFIG_HAVE_DMA_ATTRS is not set
++# CONFIG_USE_GENERIC_SMP_HELPERS is not set
++# CONFIG_HAVE_CLK is not set
++CONFIG_PROC_PAGE_MONITOR=y
++# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++CONFIG_BLOCK_COMPAT=y
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++CONFIG_CLASSIC_RCU=y
++# CONFIG_PROBE_INITRD_HEADER is not set
++
++#
++# Bus options (PCI, PCMCIA, EISA, ISA, TC)
++#
++CONFIG_HW_HAS_PCI=y
++CONFIG_PCI=y
++CONFIG_PCI_DOMAINS=y
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCI_LEGACY=y
++CONFIG_ISA=y
++CONFIG_MMU=y
++# CONFIG_PCCARD is not set
++# CONFIG_HOTPLUG_PCI is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++CONFIG_BINFMT_MISC=m
++CONFIG_MIPS32_COMPAT=y
++CONFIG_COMPAT=y
++CONFIG_SYSVIPC_COMPAT=y
++CONFIG_MIPS32_O32=y
++CONFIG_MIPS32_N32=y
++CONFIG_BINFMT_ELF32=y
++
++#
++# Power management options
++#
++CONFIG_ARCH_HIBERNATION_POSSIBLE=y
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_PM=y
++# CONFIG_PM_DEBUG is not set
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++CONFIG_HIBERNATION=y
++CONFIG_PM_STD_PARTITION=""
++
++#
++# CPU Frequency scaling
++#
++# CONFIG_CPU_FREQ is not set
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++CONFIG_XFRM_USER=m
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++CONFIG_XFRM_IPCOMP=m
++CONFIG_NET_KEY=m
++# CONFIG_NET_KEY_MIGRATE is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_MULTIPATH=y
++CONFIG_IP_ROUTE_VERBOSE=y
++# CONFIG_IP_PNP is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
++CONFIG_NET_IPGRE_BROADCAST=y
++CONFIG_IP_MROUTE=y
++CONFIG_IP_PIMSM_V1=y
++CONFIG_IP_PIMSM_V2=y
++# CONFIG_ARPD is not set
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_TUNNEL=m
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=y
++CONFIG_INET_LRO=m
++CONFIG_INET_DIAG=m
++CONFIG_INET_TCP_DIAG=m
++CONFIG_TCP_CONG_ADVANCED=y
++CONFIG_TCP_CONG_BIC=y
++CONFIG_TCP_CONG_CUBIC=m
++CONFIG_TCP_CONG_WESTWOOD=m
++CONFIG_TCP_CONG_HTCP=m
++CONFIG_TCP_CONG_HSTCP=m
++CONFIG_TCP_CONG_HYBLA=m
++CONFIG_TCP_CONG_VEGAS=m
++CONFIG_TCP_CONG_SCALABLE=m
++CONFIG_TCP_CONG_LP=m
++CONFIG_TCP_CONG_VENO=m
++# CONFIG_TCP_CONG_YEAH is not set
++# CONFIG_TCP_CONG_ILLINOIS is not set
++CONFIG_DEFAULT_BIC=y
++# CONFIG_DEFAULT_CUBIC is not set
++# CONFIG_DEFAULT_HTCP is not set
++# CONFIG_DEFAULT_VEGAS is not set
++# CONFIG_DEFAULT_WESTWOOD is not set
++# CONFIG_DEFAULT_RENO is not set
++CONFIG_DEFAULT_TCP_CONG="bic"
++# CONFIG_TCP_MD5SIG is not set
++CONFIG_IP_VS=m
++# CONFIG_IP_VS_DEBUG is not set
++CONFIG_IP_VS_TAB_BITS=12
++
++#
++# IPVS transport protocol load balancing support
++#
++CONFIG_IP_VS_PROTO_TCP=y
++CONFIG_IP_VS_PROTO_UDP=y
++CONFIG_IP_VS_PROTO_ESP=y
++CONFIG_IP_VS_PROTO_AH=y
++
++#
++# IPVS scheduler
++#
++CONFIG_IP_VS_RR=m
++CONFIG_IP_VS_WRR=m
++CONFIG_IP_VS_LC=m
++CONFIG_IP_VS_WLC=m
++CONFIG_IP_VS_LBLC=m
++CONFIG_IP_VS_LBLCR=m
++CONFIG_IP_VS_DH=m
++CONFIG_IP_VS_SH=m
++CONFIG_IP_VS_SED=m
++CONFIG_IP_VS_NQ=m
++
++#
++# IPVS application helper
++#
++CONFIG_IP_VS_FTP=m
++CONFIG_IPV6=m
++CONFIG_IPV6_PRIVACY=y
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_NDISC_NODETYPE=y
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
++# CONFIG_IPV6_MROUTE is not set
++# CONFIG_NETLABEL is not set
++CONFIG_NETWORK_SECMARK=y
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++CONFIG_NETFILTER_ADVANCED=y
++CONFIG_BRIDGE_NETFILTER=y
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++# CONFIG_NF_CONNTRACK is not set
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
++# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
++CONFIG_NETFILTER_XT_TARGET_SECMARK=m
++# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
++# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_IP_NF_QUEUE=m
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_RECENT=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_RAW=m
++# CONFIG_IP_NF_SECURITY is not set
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++
++#
++# IPv6: Netfilter Configuration
++#
++CONFIG_IP6_NF_QUEUE=m
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_AH=m
++# CONFIG_IP6_NF_MATCH_MH is not set
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_LOG=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_TARGET_HL=m
++CONFIG_IP6_NF_RAW=m
++# CONFIG_IP6_NF_SECURITY is not set
++
++#
++# DECnet: Netfilter Configuration
++#
++CONFIG_DECNET_NF_GRABULATOR=m
++
++#
++# Bridge: Netfilter Configuration
++#
++CONFIG_BRIDGE_NF_EBTABLES=m
++CONFIG_BRIDGE_EBT_BROUTE=m
++CONFIG_BRIDGE_EBT_T_FILTER=m
++CONFIG_BRIDGE_EBT_T_NAT=m
++CONFIG_BRIDGE_EBT_802_3=m
++CONFIG_BRIDGE_EBT_AMONG=m
++CONFIG_BRIDGE_EBT_ARP=m
++CONFIG_BRIDGE_EBT_IP=m
++# CONFIG_BRIDGE_EBT_IP6 is not set
++CONFIG_BRIDGE_EBT_LIMIT=m
++CONFIG_BRIDGE_EBT_MARK=m
++CONFIG_BRIDGE_EBT_PKTTYPE=m
++CONFIG_BRIDGE_EBT_STP=m
++CONFIG_BRIDGE_EBT_VLAN=m
++CONFIG_BRIDGE_EBT_ARPREPLY=m
++CONFIG_BRIDGE_EBT_DNAT=m
++CONFIG_BRIDGE_EBT_MARK_T=m
++CONFIG_BRIDGE_EBT_REDIRECT=m
++CONFIG_BRIDGE_EBT_SNAT=m
++CONFIG_BRIDGE_EBT_LOG=m
++CONFIG_BRIDGE_EBT_ULOG=m
++# CONFIG_BRIDGE_EBT_NFLOG is not set
++CONFIG_IP_DCCP=m
++CONFIG_INET_DCCP_DIAG=m
++CONFIG_IP_DCCP_ACKVEC=y
++
++#
++# DCCP CCIDs Configuration (EXPERIMENTAL)
++#
++CONFIG_IP_DCCP_CCID2=m
++# CONFIG_IP_DCCP_CCID2_DEBUG is not set
++CONFIG_IP_DCCP_CCID3=m
++# CONFIG_IP_DCCP_CCID3_DEBUG is not set
++CONFIG_IP_DCCP_CCID3_RTO=100
++CONFIG_IP_DCCP_TFRC_LIB=m
++CONFIG_IP_SCTP=m
++# CONFIG_SCTP_DBG_MSG is not set
++# CONFIG_SCTP_DBG_OBJCNT is not set
++# CONFIG_SCTP_HMAC_NONE is not set
++# CONFIG_SCTP_HMAC_SHA1 is not set
++CONFIG_SCTP_HMAC_MD5=y
++CONFIG_TIPC=m
++CONFIG_TIPC_ADVANCED=y
++CONFIG_TIPC_ZONES=3
++CONFIG_TIPC_CLUSTERS=1
++CONFIG_TIPC_NODES=255
++CONFIG_TIPC_SLAVE_NODES=0
++CONFIG_TIPC_PORTS=8191
++CONFIG_TIPC_LOG=0
++# CONFIG_TIPC_DEBUG is not set
++CONFIG_ATM=y
++CONFIG_ATM_CLIP=y
++# CONFIG_ATM_CLIP_NO_ICMP is not set
++CONFIG_ATM_LANE=m
++CONFIG_ATM_MPOA=m
++CONFIG_ATM_BR2684=m
++# CONFIG_ATM_BR2684_IPFILTER is not set
++CONFIG_STP=m
++CONFIG_BRIDGE=m
++CONFIG_VLAN_8021Q=m
++# CONFIG_VLAN_8021Q_GVRP is not set
++CONFIG_DECNET=m
++# CONFIG_DECNET_ROUTER is not set
++CONFIG_LLC=m
++CONFIG_LLC2=m
++CONFIG_IPX=m
++# CONFIG_IPX_INTERN is not set
++CONFIG_ATALK=m
++CONFIG_DEV_APPLETALK=m
++# CONFIG_COPS is not set
++CONFIG_IPDDP=m
++CONFIG_IPDDP_ENCAP=y
++CONFIG_IPDDP_DECAP=y
++CONFIG_X25=m
++CONFIG_LAPB=m
++CONFIG_ECONET=m
++CONFIG_ECONET_AUNUDP=y
++CONFIG_ECONET_NATIVE=y
++CONFIG_WAN_ROUTER=m
++CONFIG_NET_SCHED=y
++
++#
++# Queueing/Scheduling
++#
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_ATM=m
++CONFIG_NET_SCH_PRIO=m
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_INGRESS=m
++
++#
++# Classification
++#
++CONFIG_NET_CLS=y
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_ROUTE=y
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_PERF=y
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++# CONFIG_NET_CLS_FLOW is not set
++CONFIG_NET_EMATCH=y
++CONFIG_NET_EMATCH_STACK=32
++CONFIG_NET_EMATCH_CMP=m
++CONFIG_NET_EMATCH_NBYTE=m
++CONFIG_NET_EMATCH_U32=m
++CONFIG_NET_EMATCH_META=m
++CONFIG_NET_EMATCH_TEXT=m
++CONFIG_NET_CLS_ACT=y
++CONFIG_NET_ACT_POLICE=m
++CONFIG_NET_ACT_GACT=m
++CONFIG_GACT_PROB=y
++CONFIG_NET_ACT_MIRRED=m
++CONFIG_NET_ACT_IPT=m
++# CONFIG_NET_ACT_NAT is not set
++CONFIG_NET_ACT_PEDIT=m
++CONFIG_NET_ACT_SIMP=m
++CONFIG_NET_CLS_IND=y
++CONFIG_NET_SCH_FIFO=y
++
++#
++# Network testing
++#
++CONFIG_NET_PKTGEN=m
++CONFIG_HAMRADIO=y
++
++#
++# Packet Radio protocols
++#
++CONFIG_AX25=m
++# CONFIG_AX25_DAMA_SLAVE is not set
++CONFIG_NETROM=m
++CONFIG_ROSE=m
++
++#
++# AX.25 network device drivers
++#
++CONFIG_MKISS=m
++CONFIG_6PACK=m
++CONFIG_BPQETHER=m
++CONFIG_BAYCOM_SER_FDX=m
++CONFIG_BAYCOM_SER_HDX=m
++CONFIG_YAM=m
++# CONFIG_CAN is not set
++CONFIG_IRDA=m
++
++#
++# IrDA protocols
++#
++CONFIG_IRLAN=m
++CONFIG_IRNET=m
++CONFIG_IRCOMM=m
++# CONFIG_IRDA_ULTRA is not set
++
++#
++# IrDA options
++#
++CONFIG_IRDA_CACHE_LAST_LSAP=y
++CONFIG_IRDA_FAST_RR=y
++CONFIG_IRDA_DEBUG=y
++
++#
++# Infrared-port device drivers
++#
++
++#
++# SIR device drivers
++#
++CONFIG_IRTTY_SIR=m
++
++#
++# Dongle support
++#
++CONFIG_DONGLE=y
++CONFIG_ESI_DONGLE=m
++CONFIG_ACTISYS_DONGLE=m
++CONFIG_TEKRAM_DONGLE=m
++CONFIG_TOIM3232_DONGLE=m
++CONFIG_LITELINK_DONGLE=m
++CONFIG_MA600_DONGLE=m
++CONFIG_GIRBIL_DONGLE=m
++CONFIG_MCP2120_DONGLE=m
++CONFIG_OLD_BELKIN_DONGLE=m
++CONFIG_ACT200L_DONGLE=m
++# CONFIG_KINGSUN_DONGLE is not set
++# CONFIG_KSDAZZLE_DONGLE is not set
++# CONFIG_KS959_DONGLE is not set
++
++#
++# FIR device drivers
++#
++CONFIG_USB_IRDA=m
++CONFIG_SIGMATEL_FIR=m
++CONFIG_VLSI_FIR=m
++CONFIG_MCS_FIR=m
++CONFIG_BT=m
++CONFIG_BT_L2CAP=m
++CONFIG_BT_SCO=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIUSB=m
++CONFIG_BT_HCIUSB_SCO=y
++# CONFIG_BT_HCIBTUSB is not set
++CONFIG_BT_HCIUART=m
++CONFIG_BT_HCIUART_H4=y
++CONFIG_BT_HCIUART_BCSP=y
++# CONFIG_BT_HCIUART_LL is not set
++CONFIG_BT_HCIBCM203X=m
++CONFIG_BT_HCIBPA10X=m
++CONFIG_BT_HCIBFUSB=m
++CONFIG_BT_HCIVHCI=m
++CONFIG_AF_RXRPC=m
++# CONFIG_AF_RXRPC_DEBUG is not set
++# CONFIG_RXKAD is not set
++CONFIG_FIB_RULES=y
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_EXT=y
++CONFIG_WIRELESS_EXT_SYSFS=y
++# CONFIG_MAC80211 is not set
++CONFIG_IEEE80211=m
++# CONFIG_IEEE80211_DEBUG is not set
++CONFIG_IEEE80211_CRYPT_WEP=m
++CONFIG_IEEE80211_CRYPT_CCMP=m
++CONFIG_IEEE80211_CRYPT_TKIP=m
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++CONFIG_MTD=m
++# CONFIG_MTD_DEBUG is not set
++CONFIG_MTD_CONCAT=m
++CONFIG_MTD_PARTITIONS=y
++CONFIG_MTD_REDBOOT_PARTS=m
++CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
++# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
++# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=m
++CONFIG_MTD_BLKDEVS=m
++CONFIG_MTD_BLOCK=m
++CONFIG_MTD_BLOCK_RO=m
++CONFIG_FTL=m
++CONFIG_NFTL=m
++CONFIG_NFTL_RW=y
++CONFIG_INFTL=m
++CONFIG_RFD_FTL=m
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=m
++CONFIG_MTD_JEDECPROBE=m
++CONFIG_MTD_GEN_PROBE=m
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++CONFIG_MTD_CFI_INTELEXT=m
++CONFIG_MTD_CFI_AMDSTD=m
++CONFIG_MTD_CFI_STAA=m
++CONFIG_MTD_CFI_UTIL=m
++CONFIG_MTD_RAM=m
++CONFIG_MTD_ROM=m
++CONFIG_MTD_ABSENT=m
++
++#
++# Mapping drivers for chip access
++#
++CONFIG_MTD_COMPLEX_MAPPINGS=y
++CONFIG_MTD_PHYSMAP=m
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x4000000
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++CONFIG_MTD_PCI=m
++# CONFIG_MTD_INTEL_VR_NOR is not set
++CONFIG_MTD_PLATRAM=m
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_PMC551=m
++# CONFIG_MTD_PMC551_BUGFIX is not set
++# CONFIG_MTD_PMC551_DEBUG is not set
++CONFIG_MTD_SLRAM=m
++CONFIG_MTD_PHRAM=m
++CONFIG_MTD_MTDRAM=m
++CONFIG_MTDRAM_TOTAL_SIZE=4096
++CONFIG_MTDRAM_ERASE_SIZE=128
++CONFIG_MTD_BLOCK2MTD=m
++
++#
++# Disk-On-Chip Device Drivers
++#
++CONFIG_MTD_DOC2000=m
++CONFIG_MTD_DOC2001=m
++CONFIG_MTD_DOC2001PLUS=m
++CONFIG_MTD_DOCPROBE=m
++CONFIG_MTD_DOCECC=m
++# CONFIG_MTD_DOCPROBE_ADVANCED is not set
++CONFIG_MTD_DOCPROBE_ADDRESS=0
++CONFIG_MTD_NAND=m
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++CONFIG_MTD_NAND_IDS=m
++CONFIG_MTD_NAND_DISKONCHIP=m
++# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
++CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
++# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
++# CONFIG_MTD_NAND_CAFE is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++CONFIG_MTD_ONENAND=m
++CONFIG_MTD_ONENAND_VERIFY_WRITE=y
++# CONFIG_MTD_ONENAND_OTP is not set
++# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
++# CONFIG_MTD_ONENAND_SIM is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_PNP is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_CPQ_DA is not set
++# CONFIG_BLK_CPQ_CISS_DA is not set
++# CONFIG_BLK_DEV_DAC960 is not set
++# CONFIG_BLK_DEV_UMEM is not set
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++CONFIG_BLK_DEV_CRYPTOLOOP=m
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_SX8=m
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=8192
++# CONFIG_BLK_DEV_XIP is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_BLK_DEV_HD is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_PHANTOM is not set
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_SGI_IOC4 is not set
++# CONFIG_TIFM_CORE is not set
++# CONFIG_ENCLOSURE_SERVICES is not set
++# CONFIG_HP_ILO is not set
++CONFIG_LOONGSON2_PLATFROM_SUPPORT=y
++CONFIG_BIOS_DRIVER=m
++# CONFIG_IO_MSR_DEBUG_DRIVER is not set
++CONFIG_HAVE_IDE=y
++CONFIG_IDE=y
++CONFIG_BLK_DEV_IDE=y
++
++#
++# Please see Documentation/ide/ide.txt for help/info on IDE drives
++#
++CONFIG_IDE_TIMINGS=y
++# CONFIG_BLK_DEV_IDE_SATA is not set
++CONFIG_BLK_DEV_IDEDISK=y
++# CONFIG_IDEDISK_MULTI_MODE is not set
++CONFIG_BLK_DEV_IDECD=y
++CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
++# CONFIG_BLK_DEV_IDETAPE is not set
++# CONFIG_BLK_DEV_IDEFLOPPY is not set
++# CONFIG_BLK_DEV_IDESCSI is not set
++CONFIG_IDE_TASK_IOCTL=y
++CONFIG_IDE_PROC_FS=y
++
++#
++# IDE chipset support/bugfixes
++#
++# CONFIG_IDE_GENERIC is not set
++# CONFIG_BLK_DEV_PLATFORM is not set
++CONFIG_BLK_DEV_IDEDMA_SFF=y
++
++#
++# PCI IDE chipsets support
++#
++CONFIG_BLK_DEV_IDEPCI=y
++CONFIG_IDEPCI_PCIBUS_ORDER=y
++# CONFIG_BLK_DEV_GENERIC is not set
++# CONFIG_BLK_DEV_OPTI621 is not set
++CONFIG_BLK_DEV_IDEDMA_PCI=y
++# CONFIG_BLK_DEV_AEC62XX is not set
++# CONFIG_BLK_DEV_ALI15X3 is not set
++CONFIG_BLK_DEV_AMD74XX=y
++# CONFIG_BLK_DEV_CMD64X is not set
++# CONFIG_BLK_DEV_TRIFLEX is not set
++# CONFIG_BLK_DEV_CS5520 is not set
++# CONFIG_BLK_DEV_CS5530 is not set
++# CONFIG_BLK_DEV_HPT366 is not set
++# CONFIG_BLK_DEV_JMICRON is not set
++# CONFIG_BLK_DEV_SC1200 is not set
++# CONFIG_BLK_DEV_PIIX is not set
++# CONFIG_BLK_DEV_IT8213 is not set
++# CONFIG_BLK_DEV_IT821X is not set
++# CONFIG_BLK_DEV_NS87415 is not set
++# CONFIG_BLK_DEV_PDC202XX_OLD is not set
++# CONFIG_BLK_DEV_PDC202XX_NEW is not set
++# CONFIG_BLK_DEV_SVWKS is not set
++# CONFIG_BLK_DEV_SIIMAGE is not set
++# CONFIG_BLK_DEV_SLC90E66 is not set
++# CONFIG_BLK_DEV_TRM290 is not set
++# CONFIG_BLK_DEV_VIA82CXXX is not set
++# CONFIG_BLK_DEV_TC86C001 is not set
++
++#
++# Other IDE chipsets support
++#
++
++#
++# Note: most of these also require special kernel boot parameters
++#
++# CONFIG_BLK_DEV_4DRIVES is not set
++# CONFIG_BLK_DEV_ALI14XX is not set
++# CONFIG_BLK_DEV_DTC2278 is not set
++# CONFIG_BLK_DEV_HT6560B is not set
++# CONFIG_BLK_DEV_QD65XX is not set
++# CONFIG_BLK_DEV_UMC8672 is not set
++CONFIG_BLK_DEV_IDEDMA=y
++
++#
++# SCSI device support
++#
++CONFIG_RAID_ATTRS=m
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++CONFIG_SCSI_NETLINK=y
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++CONFIG_CHR_DEV_SG=m
++CONFIG_CHR_DEV_SCH=m
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++CONFIG_SCSI_CONSTANTS=y
++CONFIG_SCSI_LOGGING=y
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++CONFIG_SCSI_SPI_ATTRS=m
++CONFIG_SCSI_FC_ATTRS=m
++CONFIG_SCSI_ISCSI_ATTRS=m
++# CONFIG_SCSI_SAS_LIBSAS is not set
++CONFIG_SCSI_SRP_ATTRS=m
++# CONFIG_SCSI_LOWLEVEL is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_ATA is not set
++CONFIG_MD=y
++CONFIG_BLK_DEV_MD=m
++CONFIG_MD_LINEAR=m
++CONFIG_MD_RAID0=m
++CONFIG_MD_RAID1=m
++CONFIG_MD_RAID10=m
++CONFIG_MD_RAID456=m
++CONFIG_MD_RAID5_RESHAPE=y
++CONFIG_MD_MULTIPATH=m
++CONFIG_MD_FAULTY=m
++CONFIG_BLK_DEV_DM=m
++# CONFIG_DM_DEBUG is not set
++CONFIG_DM_CRYPT=m
++CONFIG_DM_SNAPSHOT=m
++CONFIG_DM_MIRROR=m
++CONFIG_DM_ZERO=m
++CONFIG_DM_MULTIPATH=m
++# CONFIG_DM_DELAY is not set
++# CONFIG_DM_UEVENT is not set
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# Enable only one of the two stacks, unless you know what you are doing
++#
++# CONFIG_FIREWIRE is not set
++CONFIG_IEEE1394=m
++CONFIG_IEEE1394_OHCI1394=m
++CONFIG_IEEE1394_PCILYNX=m
++CONFIG_IEEE1394_SBP2=m
++# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
++CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y
++CONFIG_IEEE1394_ETH1394=m
++CONFIG_IEEE1394_RAWIO=m
++CONFIG_IEEE1394_VIDEO1394=m
++CONFIG_IEEE1394_DV1394=m
++# CONFIG_IEEE1394_VERBOSEDEBUG is not set
++# CONFIG_I2O is not set
++CONFIG_NETDEVICES=y
++CONFIG_IFB=m
++CONFIG_DUMMY=m
++CONFIG_BONDING=m
++# CONFIG_MACVLAN is not set
++CONFIG_EQUALIZER=m
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_ARCNET is not set
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_REALTEK_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_HAPPYMEAL is not set
++# CONFIG_SUNGEM is not set
++# CONFIG_CASSINI is not set
++# CONFIG_NET_VENDOR_3COM is not set
++# CONFIG_NET_VENDOR_SMC is not set
++# CONFIG_DM9000 is not set
++# CONFIG_NET_VENDOR_RACAL is not set
++# CONFIG_NET_TULIP is not set
++# CONFIG_AT1700 is not set
++# CONFIG_DEPCA is not set
++# CONFIG_HP100 is not set
++# CONFIG_NET_ISA is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++CONFIG_NET_PCI=y
++# CONFIG_PCNET32 is not set
++# CONFIG_AMD8111_ETH is not set
++# CONFIG_ADAPTEC_STARFIRE is not set
++# CONFIG_AC3200 is not set
++# CONFIG_APRICOT is not set
++# CONFIG_B44 is not set
++# CONFIG_FORCEDETH is not set
++# CONFIG_CS89x0 is not set
++# CONFIG_TC35815 is not set
++# CONFIG_EEPRO100 is not set
++# CONFIG_E100 is not set
++# CONFIG_FEALNX is not set
++# CONFIG_NATSEMI is not set
++# CONFIG_NE2K_PCI is not set
++# CONFIG_8139CP is not set
++CONFIG_8139TOO=y
++# CONFIG_8139TOO_PIO is not set
++# CONFIG_8139TOO_TUNE_TWISTER is not set
++# CONFIG_8139TOO_8129 is not set
++# CONFIG_8139_OLD_RX_RESET is not set
++# CONFIG_R6040 is not set
++# CONFIG_SIS900 is not set
++# CONFIG_EPIC100 is not set
++# CONFIG_SUNDANCE is not set
++# CONFIG_TLAN is not set
++# CONFIG_VIA_RHINE is not set
++# CONFIG_SC92031 is not set
++CONFIG_NETDEV_1000=y
++# CONFIG_ACENIC is not set
++# CONFIG_DL2K is not set
++# CONFIG_E1000 is not set
++# CONFIG_E1000E is not set
++# CONFIG_IP1000 is not set
++# CONFIG_IGB is not set
++# CONFIG_NS83820 is not set
++# CONFIG_HAMACHI is not set
++# CONFIG_YELLOWFIN is not set
++CONFIG_R8169=y
++CONFIG_R8169_VLAN=y
++# CONFIG_SIS190 is not set
++# CONFIG_SKGE is not set
++# CONFIG_SKY2 is not set
++# CONFIG_VIA_VELOCITY is not set
++# CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
++# CONFIG_QLA3XXX is not set
++# CONFIG_ATL1 is not set
++# CONFIG_ATL1E is not set
++# CONFIG_NETDEV_10000 is not set
++# CONFIG_TR is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_IWLWIFI_LEDS is not set
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_WAN is not set
++# CONFIG_ATM_DRIVERS is not set
++# CONFIG_FDDI is not set
++# CONFIG_HIPPI is not set
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++CONFIG_PPPOE=m
++CONFIG_PPPOATM=m
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_NET_FC is not set
++CONFIG_NETCONSOLE=y
++# CONFIG_NETCONSOLE_DYNAMIC is not set
++CONFIG_NETPOLL=y
++# CONFIG_NETPOLL_TRAP is not set
++CONFIG_NET_POLL_CONTROLLER=y
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++CONFIG_INPUT_JOYDEV=m
++CONFIG_INPUT_EVDEV=m
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++CONFIG_KEYBOARD_ATKBD=y
++CONFIG_KEYBOARD_SUNKBD=m
++CONFIG_KEYBOARD_LKKBD=m
++CONFIG_KEYBOARD_XTKBD=m
++CONFIG_KEYBOARD_NEWTON=m
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_INPUT_MOUSE=y
++CONFIG_MOUSE_PS2=m
++CONFIG_MOUSE_PS2_ALPS=y
++CONFIG_MOUSE_PS2_LOGIPS2PP=y
++CONFIG_MOUSE_PS2_SYNAPTICS=y
++CONFIG_MOUSE_PS2_LIFEBOOK=y
++CONFIG_MOUSE_PS2_TRACKPOINT=y
++# CONFIG_MOUSE_PS2_TOUCHKIT is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_BCM5974 is not set
++# CONFIG_MOUSE_INPORT is not set
++# CONFIG_MOUSE_LOGIBM is not set
++# CONFIG_MOUSE_PC110PAD is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_PCSPKR=m
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++CONFIG_INPUT_UINPUT=m
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++CONFIG_SERIO_I8042=y
++# CONFIG_SERIO_SERPORT is not set
++# CONFIG_SERIO_PCIPS2 is not set
++CONFIG_SERIO_LIBPS2=y
++CONFIG_SERIO_RAW=m
++CONFIG_GAMEPORT=m
++# CONFIG_GAMEPORT_NS558 is not set
++# CONFIG_GAMEPORT_L4 is not set
++# CONFIG_GAMEPORT_EMU10K1 is not set
++# CONFIG_GAMEPORT_FM801 is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_DEVKMEM=y
++CONFIG_SERIAL_NONSTANDARD=y
++# CONFIG_COMPUTONE is not set
++CONFIG_ROCKETPORT=m
++CONFIG_CYCLADES=m
++# CONFIG_CYZ_INTR is not set
++# CONFIG_DIGIEPCA is not set
++# CONFIG_MOXA_INTELLIO is not set
++CONFIG_MOXA_SMARTIO=m
++# CONFIG_ISI is not set
++CONFIG_SYNCLINKMP=m
++CONFIG_SYNCLINK_GT=m
++CONFIG_N_HDLC=m
++# CONFIG_RISCOM8 is not set
++# CONFIG_SPECIALIX is not set
++CONFIG_SX=m
++# CONFIG_RIO is not set
++CONFIG_STALDRV=y
++# CONFIG_STALLION is not set
++# CONFIG_ISTALLION is not set
++# CONFIG_NOZOMI is not set
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++CONFIG_SERIAL_8250_CONSOLE=y
++CONFIG_SERIAL_8250_PCI=y
++CONFIG_SERIAL_8250_NR_UARTS=16
++CONFIG_SERIAL_8250_RUNTIME_UARTS=4
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_MANY_PORTS=y
++CONFIG_SERIAL_8250_FOURPORT=m
++CONFIG_SERIAL_8250_ACCENT=m
++CONFIG_SERIAL_8250_BOCA=m
++# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
++CONFIG_SERIAL_8250_HUB6=m
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++# CONFIG_SERIAL_8250_DETECT_IRQ is not set
++CONFIG_SERIAL_8250_RSA=y
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_SERIAL_JSM=m
++CONFIG_UNIX98_PTYS=y
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=16
++CONFIG_IPMI_HANDLER=m
++# CONFIG_IPMI_PANIC_EVENT is not set
++CONFIG_IPMI_DEVICE_INTERFACE=m
++CONFIG_IPMI_SI=m
++CONFIG_IPMI_WATCHDOG=m
++CONFIG_IPMI_POWEROFF=m
++CONFIG_HW_RANDOM=y
++CONFIG_RTC=y
++CONFIG_DTLK=m
++CONFIG_R3964=m
++CONFIG_APPLICOM=m
++CONFIG_RAW_DRIVER=m
++CONFIG_MAX_RAW_DEVS=256
++# CONFIG_TCG_TPM is not set
++CONFIG_DEVPORT=y
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++CONFIG_I2C_HELPER_AUTO=y
++CONFIG_I2C_ALGOBIT=m
++CONFIG_I2C_ALGOPCA=m
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# PC SMBus host controller drivers
++#
++CONFIG_I2C_ALI1535=m
++CONFIG_I2C_ALI1563=m
++CONFIG_I2C_ALI15X3=m
++CONFIG_I2C_AMD756=m
++CONFIG_I2C_AMD756_S4882=m
++CONFIG_I2C_AMD8111=m
++CONFIG_I2C_I801=m
++# CONFIG_I2C_ISCH is not set
++CONFIG_I2C_PIIX4=m
++CONFIG_I2C_NFORCE2=m
++# CONFIG_I2C_NFORCE2_S4985 is not set
++CONFIG_I2C_SIS5595=m
++CONFIG_I2C_SIS630=m
++CONFIG_I2C_SIS96X=m
++CONFIG_I2C_VIA=m
++CONFIG_I2C_VIAPRO=m
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++CONFIG_I2C_OCORES=m
++# CONFIG_I2C_SIMTEC is not set
++
++#
++# External I2C/SMBus adapter drivers
++#
++CONFIG_I2C_PARPORT_LIGHT=m
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Graphics adapter I2C/DDC channel drivers
++#
++CONFIG_I2C_VOODOO3=m
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_ELEKTOR is not set
++CONFIG_I2C_PCA_ISA=m
++# CONFIG_I2C_PCA_PLATFORM is not set
++CONFIG_I2C_STUB=m
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_DS1682 is not set
++# CONFIG_AT24 is not set
++CONFIG_SENSORS_EEPROM=m
++CONFIG_SENSORS_PCF8574=m
++# CONFIG_PCF8575 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++CONFIG_SENSORS_PCF8591=m
++CONFIG_SENSORS_MAX6875=m
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++# CONFIG_SPI is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_THERMAL_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++CONFIG_SOFT_WATCHDOG=m
++# CONFIG_ALIM7101_WDT is not set
++
++#
++# ISA-based Watchdog Cards
++#
++# CONFIG_PCWATCHDOG is not set
++# CONFIG_MIXCOMWD is not set
++# CONFIG_WDT is not set
++
++#
++# PCI-based Watchdog Cards
++#
++# CONFIG_PCIPCWATCHDOG is not set
++# CONFIG_WDTPCI is not set
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_MFD_TMIO is not set
++
++#
++# Multimedia devices
++#
++
++#
++# Multimedia core support
++#
++CONFIG_VIDEO_DEV=m
++CONFIG_VIDEO_V4L2_COMMON=m
++CONFIG_VIDEO_ALLOW_V4L1=y
++CONFIG_VIDEO_V4L1_COMPAT=y
++# CONFIG_DVB_CORE is not set
++CONFIG_VIDEO_MEDIA=m
++
++#
++# Multimedia drivers
++#
++# CONFIG_MEDIA_ATTACH is not set
++CONFIG_MEDIA_TUNER=m
++# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
++CONFIG_MEDIA_TUNER_SIMPLE=m
++CONFIG_MEDIA_TUNER_TDA8290=m
++CONFIG_MEDIA_TUNER_TDA9887=m
++CONFIG_MEDIA_TUNER_TEA5761=m
++CONFIG_MEDIA_TUNER_TEA5767=m
++CONFIG_MEDIA_TUNER_MT20XX=m
++CONFIG_MEDIA_TUNER_XC2028=m
++CONFIG_MEDIA_TUNER_XC5000=m
++CONFIG_VIDEO_V4L2=m
++CONFIG_VIDEO_V4L1=m
++CONFIG_VIDEOBUF_GEN=m
++CONFIG_VIDEOBUF_VMALLOC=m
++CONFIG_VIDEO_IR=m
++CONFIG_VIDEO_TVEEPROM=m
++CONFIG_VIDEO_TUNER=m
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
++CONFIG_VIDEO_IR_I2C=m
++CONFIG_VIDEO_MSP3400=m
++CONFIG_VIDEO_CS53L32A=m
++CONFIG_VIDEO_WM8775=m
++CONFIG_VIDEO_SAA711X=m
++CONFIG_VIDEO_TVP5150=m
++CONFIG_VIDEO_CX25840=m
++CONFIG_VIDEO_CX2341X=m
++# CONFIG_VIDEO_VIVI is not set
++# CONFIG_VIDEO_BT848 is not set
++# CONFIG_VIDEO_PMS is not set
++# CONFIG_VIDEO_CPIA is not set
++# CONFIG_VIDEO_CPIA2 is not set
++# CONFIG_VIDEO_SAA5246A is not set
++# CONFIG_VIDEO_SAA5249 is not set
++# CONFIG_TUNER_3036 is not set
++# CONFIG_VIDEO_STRADIS is not set
++# CONFIG_VIDEO_ZORAN is not set
++# CONFIG_VIDEO_SAA7134 is not set
++# CONFIG_VIDEO_MXB is not set
++# CONFIG_VIDEO_DPC is not set
++# CONFIG_VIDEO_HEXIUM_ORION is not set
++# CONFIG_VIDEO_HEXIUM_GEMINI is not set
++# CONFIG_VIDEO_CX88 is not set
++# CONFIG_VIDEO_IVTV is not set
++# CONFIG_VIDEO_CAFE_CCIC is not set
++CONFIG_V4L_USB_DRIVERS=y
++# CONFIG_USB_VIDEO_CLASS is not set
++# CONFIG_USB_GSPCA is not set
++CONFIG_VIDEO_PVRUSB2=m
++CONFIG_VIDEO_PVRUSB2_SYSFS=y
++# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
++CONFIG_VIDEO_EM28XX=m
++# CONFIG_VIDEO_EM28XX_ALSA is not set
++# CONFIG_VIDEO_USBVISION is not set
++CONFIG_VIDEO_USBVIDEO=m
++CONFIG_USB_VICAM=m
++CONFIG_USB_IBMCAM=m
++CONFIG_USB_KONICAWC=m
++CONFIG_USB_QUICKCAM_MESSENGER=m
++CONFIG_USB_ET61X251=m
++CONFIG_VIDEO_OVCAMCHIP=m
++# CONFIG_USB_W9968CF is not set
++CONFIG_USB_OV511=m
++CONFIG_USB_SE401=m
++CONFIG_USB_SN9C102=m
++CONFIG_USB_STV680=m
++CONFIG_USB_ZC0301=m
++CONFIG_USB_PWC=m
++# CONFIG_USB_PWC_DEBUG is not set
++# CONFIG_USB_ZR364XX is not set
++# CONFIG_USB_STKWEBCAM is not set
++# CONFIG_USB_S2255 is not set
++# CONFIG_SOC_CAMERA is not set
++# CONFIG_VIDEO_SH_MOBILE_CEU is not set
++# CONFIG_RADIO_ADAPTERS is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++CONFIG_DRM=m
++# CONFIG_DRM_TDFX is not set
++# CONFIG_DRM_R128 is not set
++CONFIG_DRM_RADEON=m
++# CONFIG_DRM_MGA is not set
++# CONFIG_DRM_VIA is not set
++# CONFIG_DRM_SAVAGE is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++CONFIG_FIRMWARE_EDID=y
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++CONFIG_FB_MODE_HELPERS=y
++CONFIG_FB_TILEBLITTING=y
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_CIRRUS is not set
++# CONFIG_FB_PM2 is not set
++# CONFIG_FB_CYBER2000 is not set
++# CONFIG_FB_ASILIANT is not set
++# CONFIG_FB_IMSTT is not set
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_NVIDIA is not set
++# CONFIG_FB_RIVA is not set
++# CONFIG_FB_MATROX is not set
++# CONFIG_FB_RADEON is not set
++# CONFIG_FB_ATY128 is not set
++# CONFIG_FB_ATY is not set
++# CONFIG_FB_S3 is not set
++# CONFIG_FB_SAVAGE is not set
++CONFIG_FB_SIS=y
++CONFIG_FB_SIS_300=y
++CONFIG_FB_SIS_315=y
++# CONFIG_FB_NEOMAGIC is not set
++# CONFIG_FB_KYRO is not set
++# CONFIG_FB_3DFX is not set
++# CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_VT8623 is not set
++# CONFIG_FB_TRIDENT is not set
++# CONFIG_FB_ARK is not set
++# CONFIG_FB_PM3 is not set
++# CONFIG_FB_CARMINE is not set
++# CONFIG_FB_SILICONMOTION is not set
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++# CONFIG_LCD_CLASS_DEVICE is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_BACKLIGHT_CORGI is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++# CONFIG_MDA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
++# CONFIG_FONTS is not set
++CONFIG_FONT_8x8=y
++CONFIG_FONT_8x16=y
++# CONFIG_LOGO is not set
++CONFIG_SOUND=m
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++CONFIG_SND_HWDEP=m
++CONFIG_SND_RAWMIDI=m
++CONFIG_SND_SEQUENCER=m
++CONFIG_SND_SEQ_DUMMY=m
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++CONFIG_SND_SEQUENCER_OSS=y
++# CONFIG_SND_RTCTIMER is not set
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++CONFIG_SND_VMASTER=y
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DRIVERS is not set
++CONFIG_SND_PCI=y
++# CONFIG_SND_AD1889 is not set
++# CONFIG_SND_ALS300 is not set
++# CONFIG_SND_ALI5451 is not set
++# CONFIG_SND_ATIIXP is not set
++# CONFIG_SND_ATIIXP_MODEM is not set
++# CONFIG_SND_AU8810 is not set
++# CONFIG_SND_AU8820 is not set
++# CONFIG_SND_AU8830 is not set
++# CONFIG_SND_AW2 is not set
++# CONFIG_SND_AZT3328 is not set
++# CONFIG_SND_BT87X is not set
++# CONFIG_SND_CA0106 is not set
++# CONFIG_SND_CMIPCI is not set
++# CONFIG_SND_OXYGEN is not set
++# CONFIG_SND_CS4281 is not set
++# CONFIG_SND_CS46XX is not set
++CONFIG_SND_CS5535AUDIO=m
++# CONFIG_SND_DARLA20 is not set
++# CONFIG_SND_GINA20 is not set
++# CONFIG_SND_LAYLA20 is not set
++# CONFIG_SND_DARLA24 is not set
++# CONFIG_SND_GINA24 is not set
++# CONFIG_SND_LAYLA24 is not set
++# CONFIG_SND_MONA is not set
++# CONFIG_SND_MIA is not set
++# CONFIG_SND_ECHO3G is not set
++# CONFIG_SND_INDIGO is not set
++# CONFIG_SND_INDIGOIO is not set
++# CONFIG_SND_INDIGODJ is not set
++# CONFIG_SND_EMU10K1 is not set
++# CONFIG_SND_EMU10K1X is not set
++# CONFIG_SND_ENS1370 is not set
++# CONFIG_SND_ENS1371 is not set
++# CONFIG_SND_ES1938 is not set
++# CONFIG_SND_ES1968 is not set
++# CONFIG_SND_FM801 is not set
++# CONFIG_SND_HDA_INTEL is not set
++# CONFIG_SND_HDSP is not set
++# CONFIG_SND_HDSPM is not set
++# CONFIG_SND_HIFIER is not set
++# CONFIG_SND_ICE1712 is not set
++# CONFIG_SND_ICE1724 is not set
++# CONFIG_SND_INTEL8X0 is not set
++# CONFIG_SND_INTEL8X0M is not set
++# CONFIG_SND_KORG1212 is not set
++# CONFIG_SND_MAESTRO3 is not set
++# CONFIG_SND_MIXART is not set
++# CONFIG_SND_NM256 is not set
++# CONFIG_SND_PCXHR is not set
++# CONFIG_SND_RIPTIDE is not set
++# CONFIG_SND_RME32 is not set
++# CONFIG_SND_RME96 is not set
++# CONFIG_SND_RME9652 is not set
++# CONFIG_SND_SONICVIBES is not set
++# CONFIG_SND_TRIDENT is not set
++# CONFIG_SND_VIA82XX is not set
++# CONFIG_SND_VIA82XX_MODEM is not set
++# CONFIG_SND_VIRTUOSO is not set
++# CONFIG_SND_VX222 is not set
++# CONFIG_SND_YMFPCI is not set
++# CONFIG_SND_MIPS is not set
++CONFIG_SND_USB=y
++CONFIG_SND_USB_AUDIO=m
++# CONFIG_SND_USB_CAIAQ is not set
++# CONFIG_SND_SOC is not set
++CONFIG_SOUND_PRIME=m
++# CONFIG_SOUND_MSNDCLAS is not set
++# CONFIG_SOUND_MSNDPIN is not set
++CONFIG_AC97_BUS=m
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++CONFIG_USB_HIDDEV=y
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++# CONFIG_USB_OTG is not set
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++CONFIG_USB_MON=y
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_ROOT_HUB_TT=y
++# CONFIG_USB_EHCI_TT_NEWSCHED is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++CONFIG_USB_OHCI_HCD=m
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_UHCI_HCD is not set
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++
++#
++# USB Device Class drivers
++#
++CONFIG_USB_ACM=m
++CONFIG_USB_PRINTER=m
++# CONFIG_USB_WDM is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++CONFIG_USB_STORAGE_ISD200=y
++CONFIG_USB_STORAGE_DPCM=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++CONFIG_USB_MDC800=m
++CONFIG_USB_MICROTEK=m
++
++#
++# USB port drivers
++#
++CONFIG_USB_SERIAL=m
++CONFIG_USB_EZUSB=y
++CONFIG_USB_SERIAL_GENERIC=y
++# CONFIG_USB_SERIAL_AIRCABLE is not set
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++# CONFIG_USB_SERIAL_CH341 is not set
++# CONFIG_USB_SERIAL_WHITEHEAT is not set
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP2101=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_FUNSOFT=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++# CONFIG_USB_SERIAL_IUU is not set
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++# CONFIG_USB_SERIAL_KEYSPAN is not set
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++# CONFIG_USB_SERIAL_MOS7720 is not set
++# CONFIG_USB_SERIAL_MOS7840 is not set
++# CONFIG_USB_SERIAL_MOTOROLA is not set
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++# CONFIG_USB_SERIAL_OTI6858 is not set
++# CONFIG_USB_SERIAL_SPCP8X5 is not set
++CONFIG_USB_SERIAL_HP4X=m
++CONFIG_USB_SERIAL_SAFE=m
++# CONFIG_USB_SERIAL_SAFE_PADDED is not set
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++# CONFIG_USB_SERIAL_DEBUG is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++CONFIG_USB_IDMOUSE=m
++# CONFIG_USB_FTDI_ELAN is not set
++CONFIG_USB_APPLEDISPLAY=m
++CONFIG_USB_SISUSBVGA=m
++CONFIG_USB_SISUSBVGA_CON=y
++CONFIG_USB_LD=m
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_ATM is not set
++# CONFIG_USB_GADGET is not set
++# CONFIG_MMC is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_NEW_LEDS is not set
++# CONFIG_ACCESSIBILITY is not set
++# CONFIG_INFINIBAND is not set
++# CONFIG_RTC_CLASS is not set
++# CONFIG_DMADEVICES is not set
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS_XATTR=y
++CONFIG_EXT2_FS_POSIX_ACL=y
++CONFIG_EXT2_FS_SECURITY=y
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS_XATTR=y
++CONFIG_EXT3_FS_POSIX_ACL=y
++CONFIG_EXT3_FS_SECURITY=y
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++CONFIG_FS_MBCACHE=y
++CONFIG_REISERFS_FS=m
++# CONFIG_REISERFS_CHECK is not set
++# CONFIG_REISERFS_PROC_INFO is not set
++CONFIG_REISERFS_FS_XATTR=y
++CONFIG_REISERFS_FS_POSIX_ACL=y
++CONFIG_REISERFS_FS_SECURITY=y
++CONFIG_JFS_FS=m
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++# CONFIG_JFS_DEBUG is not set
++# CONFIG_JFS_STATISTICS is not set
++CONFIG_FS_POSIX_ACL=y
++CONFIG_XFS_FS=m
++CONFIG_XFS_QUOTA=y
++CONFIG_XFS_POSIX_ACL=y
++CONFIG_XFS_RT=y
++# CONFIG_XFS_DEBUG is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++CONFIG_QUOTA=y
++# CONFIG_QUOTA_NETLINK_INTERFACE is not set
++CONFIG_PRINT_QUOTA_WARNING=y
++CONFIG_QFMT_V1=m
++CONFIG_QFMT_V2=m
++CONFIG_QUOTACTL=y
++CONFIG_AUTOFS_FS=m
++CONFIG_AUTOFS4_FS=m
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++CONFIG_NTFS_FS=m
++# CONFIG_NTFS_DEBUG is not set
++CONFIG_NTFS_RW=y
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_ECRYPT_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++# CONFIG_JFFS2_FS is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=m
++CONFIG_NFS_V3=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_NFSD=m
++CONFIG_NFSD_V2_ACL=y
++CONFIG_NFSD_V3=y
++CONFIG_NFSD_V3_ACL=y
++CONFIG_NFSD_V4=y
++CONFIG_LOCKD=m
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_ACL_SUPPORT=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=m
++CONFIG_SUNRPC_GSS=m
++CONFIG_RPCSEC_GSS_KRB5=m
++CONFIG_RPCSEC_GSS_SPKM3=m
++CONFIG_SMB_FS=m
++# CONFIG_SMB_NLS_DEFAULT is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++# CONFIG_CIFS_UPCALL is not set
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
++# CONFIG_NCP_FS is not set
++CONFIG_CODA_FS=m
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++CONFIG_ACORN_PARTITION=y
++# CONFIG_ACORN_PARTITION_CUMANA is not set
++# CONFIG_ACORN_PARTITION_EESOX is not set
++CONFIG_ACORN_PARTITION_ICS=y
++# CONFIG_ACORN_PARTITION_ADFS is not set
++# CONFIG_ACORN_PARTITION_POWERTEC is not set
++CONFIG_ACORN_PARTITION_RISCIX=y
++CONFIG_OSF_PARTITION=y
++CONFIG_AMIGA_PARTITION=y
++CONFIG_ATARI_PARTITION=y
++CONFIG_MAC_PARTITION=y
++CONFIG_MSDOS_PARTITION=y
++CONFIG_BSD_DISKLABEL=y
++CONFIG_MINIX_SUBPARTITION=y
++CONFIG_SOLARIS_X86_PARTITION=y
++CONFIG_UNIXWARE_DISKLABEL=y
++CONFIG_LDM_PARTITION=y
++# CONFIG_LDM_DEBUG is not set
++CONFIG_SGI_PARTITION=y
++CONFIG_ULTRIX_PARTITION=y
++CONFIG_SUN_PARTITION=y
++CONFIG_KARMA_PARTITION=y
++CONFIG_EFI_PARTITION=y
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++CONFIG_NLS_CODEPAGE_737=m
++CONFIG_NLS_CODEPAGE_775=m
++CONFIG_NLS_CODEPAGE_850=m
++CONFIG_NLS_CODEPAGE_852=m
++CONFIG_NLS_CODEPAGE_855=m
++CONFIG_NLS_CODEPAGE_857=m
++CONFIG_NLS_CODEPAGE_860=m
++CONFIG_NLS_CODEPAGE_861=m
++CONFIG_NLS_CODEPAGE_862=m
++CONFIG_NLS_CODEPAGE_863=m
++CONFIG_NLS_CODEPAGE_864=m
++CONFIG_NLS_CODEPAGE_865=m
++CONFIG_NLS_CODEPAGE_866=m
++CONFIG_NLS_CODEPAGE_869=m
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++CONFIG_NLS_CODEPAGE_932=m
++CONFIG_NLS_CODEPAGE_949=m
++CONFIG_NLS_CODEPAGE_874=m
++CONFIG_NLS_ISO8859_8=m
++CONFIG_NLS_CODEPAGE_1250=m
++CONFIG_NLS_CODEPAGE_1251=m
++CONFIG_NLS_ASCII=m
++CONFIG_NLS_ISO8859_1=m
++CONFIG_NLS_ISO8859_2=m
++CONFIG_NLS_ISO8859_3=m
++CONFIG_NLS_ISO8859_4=m
++CONFIG_NLS_ISO8859_5=m
++CONFIG_NLS_ISO8859_6=m
++CONFIG_NLS_ISO8859_7=m
++CONFIG_NLS_ISO8859_9=m
++CONFIG_NLS_ISO8859_13=m
++CONFIG_NLS_ISO8859_14=m
++CONFIG_NLS_ISO8859_15=m
++CONFIG_NLS_KOI8_R=m
++CONFIG_NLS_KOI8_U=m
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++CONFIG_MAGIC_SYSRQ=y
++CONFIG_UNUSED_SYMBOLS=y
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_MEMORY_INIT is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++CONFIG_CMDLINE=""
++
++#
++# Security options
++#
++CONFIG_KEYS=y
++# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
++CONFIG_SECURITY=y
++CONFIG_SECURITY_NETWORK=y
++CONFIG_SECURITY_NETWORK_XFRM=y
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_SECURITY_ROOTPLUG is not set
++CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
++CONFIG_SECURITY_SELINUX=y
++CONFIG_SECURITY_SELINUX_BOOTPARAM=y
++CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
++CONFIG_SECURITY_SELINUX_DISABLE=y
++CONFIG_SECURITY_SELINUX_DEVELOP=y
++CONFIG_SECURITY_SELINUX_AVC_STATS=y
++CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
++# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
++# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
++CONFIG_XOR_BLOCKS=m
++CONFIG_ASYNC_CORE=m
++CONFIG_ASYNC_MEMCPY=m
++CONFIG_ASYNC_XOR=m
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_AEAD=m
++CONFIG_CRYPTO_BLKCIPHER=m
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_MANAGER=y
++# CONFIG_CRYPTO_GF128MUL is not set
++CONFIG_CRYPTO_NULL=m
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_AUTHENC=m
++CONFIG_CRYPTO_TEST=m
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=m
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=m
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++CONFIG_CRYPTO_HMAC=y
++# CONFIG_CRYPTO_XCBC is not set
++
++#
++# Digest
++#
++CONFIG_CRYPTO_CRC32C=m
++CONFIG_CRYPTO_MD4=m
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_MICHAEL_MIC=m
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++CONFIG_CRYPTO_SHA1=m
++CONFIG_CRYPTO_SHA256=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_WP512=m
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=m
++CONFIG_CRYPTO_ANUBIS=m
++CONFIG_CRYPTO_ARC4=m
++CONFIG_CRYPTO_BLOWFISH=m
++# CONFIG_CRYPTO_CAMELLIA is not set
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_CAST6=m
++CONFIG_CRYPTO_DES=m
++# CONFIG_CRYPTO_FCRYPT is not set
++CONFIG_CRYPTO_KHAZAD=m
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_SERPENT=m
++CONFIG_CRYPTO_TEA=m
++CONFIG_CRYPTO_TWOFISH=m
++CONFIG_CRYPTO_TWOFISH_COMMON=m
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=m
++# CONFIG_CRYPTO_LZO is not set
++CONFIG_CRYPTO_HW=y
++# CONFIG_CRYPTO_DEV_HIFN_795X is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_GENERIC_FIND_FIRST_BIT is not set
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=m
++# CONFIG_CRC_T10DIF is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=m
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=m
++CONFIG_ZLIB_DEFLATE=m
++CONFIG_REED_SOLOMON=m
++CONFIG_REED_SOLOMON_DEC16=y
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/mips/configs/ls2f_notebook_defconfig b/arch/mips/configs/ls2f_notebook_defconfig
+new file mode 100644
+index 0000000..e7a47d5
+--- /dev/null
++++ b/arch/mips/configs/ls2f_notebook_defconfig
+@@ -0,0 +1,1836 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.27.1
++# Fri Nov 13 10:27:01 2009
++#
++CONFIG_MIPS=y
++
++#
++# Machine selection
++#
++# CONFIG_MACH_ALCHEMY is not set
++# CONFIG_BASLER_EXCITE is not set
++# CONFIG_BCM47XX is not set
++# CONFIG_MIPS_COBALT is not set
++# CONFIG_MACH_DECSTATION is not set
++# CONFIG_MACH_JAZZ is not set
++# CONFIG_LASAT is not set
++# CONFIG_LEMOTE_FULONG is not set
++CONFIG_MACH_LM2F=y
++# CONFIG_MIPS_MALTA is not set
++# CONFIG_MIPS_SIM is not set
++# CONFIG_MARKEINS is not set
++# CONFIG_MACH_VR41XX is not set
++# CONFIG_PNX8550_JBS is not set
++# CONFIG_PNX8550_STB810 is not set
++# CONFIG_PMC_MSP is not set
++# CONFIG_PMC_YOSEMITE is not set
++# CONFIG_SGI_IP22 is not set
++# CONFIG_SGI_IP27 is not set
++# CONFIG_SGI_IP28 is not set
++# CONFIG_SGI_IP32 is not set
++# CONFIG_SIBYTE_CRHINE is not set
++# CONFIG_SIBYTE_CARMEL is not set
++# CONFIG_SIBYTE_CRHONE is not set
++# CONFIG_SIBYTE_RHONE is not set
++# CONFIG_SIBYTE_SWARM is not set
++# CONFIG_SIBYTE_LITTLESUR is not set
++# CONFIG_SIBYTE_SENTOSA is not set
++# CONFIG_SIBYTE_BIGSUR is not set
++# CONFIG_SNI_RM is not set
++# CONFIG_MACH_TX39XX is not set
++# CONFIG_MACH_TX49XX is not set
++# CONFIG_MIKROTIK_RB532 is not set
++# CONFIG_WR_PPMC is not set
++# CONFIG_LEMOTE_FULONG2F is not set
++CONFIG_LEMOTE_2FNOTEBOOK=y
++CONFIG_CS5536_RTC_BUG=y
++CONFIG_CS5536=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_FIND_NEXT_BIT=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_GENERIC_TIME=y
++CONFIG_GENERIC_CMOS_UPDATE=y
++CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_CEVT_R4K=y
++CONFIG_CSRC_R4K=y
++CONFIG_DMA_NONCOHERENT=y
++CONFIG_DMA_NEED_PCI_MAP_STATE=y
++CONFIG_EARLY_PRINTK=y
++CONFIG_SYS_HAS_EARLY_PRINTK=y
++# CONFIG_HOTPLUG_CPU is not set
++CONFIG_I8259=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_ISA_DMA=y
++CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y
++# CONFIG_CPU_BIG_ENDIAN is not set
++CONFIG_CPU_LITTLE_ENDIAN=y
++CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
++CONFIG_IRQ_CPU=y
++CONFIG_BOOT_ELF32=y
++CONFIG_MIPS_L1_CACHE_SHIFT=5
++CONFIG_HAVE_STD_PC_SERIAL_PORT=y
++
++#
++# CPU selection
++#
++CONFIG_CPU_LOONGSON2=y
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS32_R2 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
++# CONFIG_CPU_MIPS64_R2 is not set
++# CONFIG_CPU_R3000 is not set
++# CONFIG_CPU_TX39XX is not set
++# CONFIG_CPU_VR41XX is not set
++# CONFIG_CPU_R4300 is not set
++# CONFIG_CPU_R4X00 is not set
++# CONFIG_CPU_TX49XX is not set
++# CONFIG_CPU_R5000 is not set
++# CONFIG_CPU_R5432 is not set
++# CONFIG_CPU_R6000 is not set
++# CONFIG_CPU_NEVADA is not set
++# CONFIG_CPU_R8000 is not set
++# CONFIG_CPU_R10000 is not set
++# CONFIG_CPU_RM7000 is not set
++# CONFIG_CPU_RM9000 is not set
++# CONFIG_CPU_SB1 is not set
++CONFIG_SYS_HAS_CPU_LOONGSON2=y
++CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
++CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
++CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
++CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
++
++#
++# Kernel type
++#
++# CONFIG_32BIT is not set
++CONFIG_64BIT=y
++# CONFIG_PAGE_SIZE_4KB is not set
++# CONFIG_PAGE_SIZE_8KB is not set
++CONFIG_PAGE_SIZE_16KB=y
++# CONFIG_PAGE_SIZE_64KB is not set
++CONFIG_BOARD_SCACHE=y
++CONFIG_MIPS_MT_DISABLED=y
++# CONFIG_MIPS_MT_SMP is not set
++# CONFIG_MIPS_MT_SMTC is not set
++CONFIG_CPU_HAS_WB=y
++CONFIG_CPU_HAS_SYNC=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_CPU_SUPPORTS_HIGHMEM=y
++CONFIG_SYS_SUPPORTS_HIGHMEM=y
++CONFIG_ARCH_FLATMEM_ENABLE=y
++CONFIG_ARCH_POPULATES_NODE_MAP=y
++CONFIG_ARCH_SPARSEMEM_ENABLE=y
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_SPARSEMEM_STATIC=y
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4
++CONFIG_RESOURCES_64BIT=y
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++# CONFIG_HZ_48 is not set
++# CONFIG_HZ_100 is not set
++# CONFIG_HZ_128 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_256 is not set
++# CONFIG_HZ_1000 is not set
++# CONFIG_HZ_1024 is not set
++CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
++CONFIG_HZ=250
++# CONFIG_PREEMPT_NONE is not set
++CONFIG_PREEMPT_VOLUNTARY=y
++# CONFIG_PREEMPT is not set
++CONFIG_KEXEC=y
++# CONFIG_SECCOMP is not set
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++# CONFIG_TASKSTATS is not set
++CONFIG_AUDIT=y
++CONFIG_IKCONFIG=y
++# CONFIG_IKCONFIG_PROC is not set
++CONFIG_LOG_BUF_SHIFT=15
++# CONFIG_CGROUPS is not set
++# CONFIG_GROUP_SCHED is not set
++# CONFIG_SYSFS_DEPRECATED_V2 is not set
++# CONFIG_RELAY is not set
++# CONFIG_NAMESPACES is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_PCSPKR_PLATFORM=y
++CONFIG_COMPAT_BRK=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++CONFIG_PROFILING=y
++# CONFIG_MARKERS is not set
++CONFIG_OPROFILE=m
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
++# CONFIG_HAVE_IOREMAP_PROT is not set
++# CONFIG_HAVE_KPROBES is not set
++# CONFIG_HAVE_KRETPROBES is not set
++# CONFIG_HAVE_ARCH_TRACEHOOK is not set
++# CONFIG_HAVE_DMA_ATTRS is not set
++# CONFIG_USE_GENERIC_SMP_HELPERS is not set
++# CONFIG_HAVE_CLK is not set
++CONFIG_PROC_PAGE_MONITOR=y
++# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++CONFIG_BLOCK_COMPAT=y
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++CONFIG_CLASSIC_RCU=y
++# CONFIG_PROBE_INITRD_HEADER is not set
++
++#
++# Bus options (PCI, PCMCIA, EISA, ISA, TC)
++#
++CONFIG_HW_HAS_PCI=y
++CONFIG_PCI=y
++CONFIG_PCI_DOMAINS=y
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCI_LEGACY=y
++CONFIG_ISA=y
++CONFIG_MMU=y
++# CONFIG_PCCARD is not set
++CONFIG_HOTPLUG_PCI=m
++# CONFIG_HOTPLUG_PCI_FAKE is not set
++# CONFIG_HOTPLUG_PCI_CPCI is not set
++# CONFIG_HOTPLUG_PCI_SHPC is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++CONFIG_BINFMT_MISC=m
++CONFIG_MIPS32_COMPAT=y
++CONFIG_COMPAT=y
++CONFIG_SYSVIPC_COMPAT=y
++CONFIG_MIPS32_O32=y
++CONFIG_MIPS32_N32=y
++CONFIG_BINFMT_ELF32=y
++
++#
++# Power management options
++#
++CONFIG_ARCH_HIBERNATION_POSSIBLE=y
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_PM=y
++# CONFIG_PM_DEBUG is not set
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++CONFIG_HIBERNATION=y
++CONFIG_PM_STD_PARTITION="/dev/hda3"
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=y
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_LS2F_CPU_FREQ=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++CONFIG_XFRM_USER=m
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++CONFIG_NET_KEY=y
++# CONFIG_NET_KEY_MIGRATE is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_MULTIPATH=y
++CONFIG_IP_ROUTE_VERBOSE=y
++# CONFIG_IP_PNP is not set
++CONFIG_NET_IPIP=m
++# CONFIG_NET_IPGRE is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++CONFIG_INET_LRO=y
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IP_VS is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETLABEL is not set
++CONFIG_NETWORK_SECMARK=y
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++CONFIG_NETFILTER_ADVANCED=y
++CONFIG_BRIDGE_NETFILTER=y
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++# CONFIG_NF_CONNTRACK is not set
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
++# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
++CONFIG_NETFILTER_XT_TARGET_SECMARK=m
++# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
++# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_IP_NF_QUEUE=m
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_RECENT=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_RAW=m
++# CONFIG_IP_NF_SECURITY is not set
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++CONFIG_STP=m
++CONFIG_BRIDGE=m
++CONFIG_VLAN_8021Q=m
++# CONFIG_VLAN_8021Q_GVRP is not set
++# CONFIG_DECNET is not set
++CONFIG_LLC=m
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++CONFIG_NET_CLS_ROUTE=y
++
++#
++# Network testing
++#
++CONFIG_NET_PKTGEN=m
++# CONFIG_HAMRADIO is not set
++# CONFIG_CAN is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++CONFIG_AF_RXRPC=y
++# CONFIG_AF_RXRPC_DEBUG is not set
++# CONFIG_RXKAD is not set
++CONFIG_FIB_RULES=y
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_EXT=y
++CONFIG_WIRELESS_EXT_SYSFS=y
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++CONFIG_MTD=m
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++# CONFIG_MTD_CHAR is not set
++CONFIG_MTD_BLKDEVS=m
++CONFIG_MTD_BLOCK=m
++CONFIG_MTD_BLOCK_RO=m
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=m
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=m
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=m
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=m
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PHYSMAP is not set
++# CONFIG_MTD_INTEL_VR_NOR is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_PMC551 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_PNP is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_CPQ_DA is not set
++# CONFIG_BLK_CPQ_CISS_DA is not set
++# CONFIG_BLK_DEV_DAC960 is not set
++# CONFIG_BLK_DEV_UMEM is not set
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_SX8 is not set
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=8192
++# CONFIG_BLK_DEV_XIP is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_BLK_DEV_HD is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_PHANTOM is not set
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_SGI_IOC4 is not set
++# CONFIG_TIFM_CORE is not set
++# CONFIG_ENCLOSURE_SERVICES is not set
++# CONFIG_HP_ILO is not set
++CONFIG_LOONGSON2_PLATFROM_SUPPORT=y
++CONFIG_EC_COMMON_OPERATION=y
++CONFIG_EC_ROM_UPDATE_DRIVER=m
++CONFIG_EC_SCI_DRIVER=m
++CONFIG_LAPTOP_YEELOONG=m
++CONFIG_BIOS_DRIVER=m
++# CONFIG_IO_MSR_DEBUG_DRIVER is not set
++CONFIG_HAVE_IDE=y
++CONFIG_IDE=y
++CONFIG_BLK_DEV_IDE=y
++
++#
++# Please see Documentation/ide/ide.txt for help/info on IDE drives
++#
++CONFIG_IDE_TIMINGS=y
++# CONFIG_BLK_DEV_IDE_SATA is not set
++CONFIG_BLK_DEV_IDEDISK=y
++CONFIG_IDEDISK_MULTI_MODE=y
++CONFIG_BLK_DEV_IDECD=m
++CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
++# CONFIG_BLK_DEV_IDETAPE is not set
++# CONFIG_BLK_DEV_IDEFLOPPY is not set
++# CONFIG_BLK_DEV_IDESCSI is not set
++CONFIG_IDE_TASK_IOCTL=y
++CONFIG_IDE_PROC_FS=y
++
++#
++# IDE chipset support/bugfixes
++#
++# CONFIG_IDE_GENERIC is not set
++# CONFIG_BLK_DEV_PLATFORM is not set
++CONFIG_BLK_DEV_IDEDMA_SFF=y
++
++#
++# PCI IDE chipsets support
++#
++CONFIG_BLK_DEV_IDEPCI=y
++CONFIG_IDEPCI_PCIBUS_ORDER=y
++# CONFIG_BLK_DEV_OFFBOARD is not set
++CONFIG_BLK_DEV_GENERIC=y
++# CONFIG_BLK_DEV_OPTI621 is not set
++CONFIG_BLK_DEV_IDEDMA_PCI=y
++# CONFIG_BLK_DEV_AEC62XX is not set
++# CONFIG_BLK_DEV_ALI15X3 is not set
++CONFIG_BLK_DEV_AMD74XX=y
++# CONFIG_BLK_DEV_CMD64X is not set
++# CONFIG_BLK_DEV_TRIFLEX is not set
++# CONFIG_BLK_DEV_CS5520 is not set
++# CONFIG_BLK_DEV_CS5530 is not set
++# CONFIG_BLK_DEV_HPT366 is not set
++# CONFIG_BLK_DEV_JMICRON is not set
++# CONFIG_BLK_DEV_SC1200 is not set
++# CONFIG_BLK_DEV_PIIX is not set
++# CONFIG_BLK_DEV_IT8213 is not set
++# CONFIG_BLK_DEV_IT821X is not set
++# CONFIG_BLK_DEV_NS87415 is not set
++# CONFIG_BLK_DEV_PDC202XX_OLD is not set
++# CONFIG_BLK_DEV_PDC202XX_NEW is not set
++# CONFIG_BLK_DEV_SVWKS is not set
++# CONFIG_BLK_DEV_SIIMAGE is not set
++# CONFIG_BLK_DEV_SLC90E66 is not set
++# CONFIG_BLK_DEV_TRM290 is not set
++# CONFIG_BLK_DEV_VIA82CXXX is not set
++# CONFIG_BLK_DEV_TC86C001 is not set
++
++#
++# Other IDE chipsets support
++#
++
++#
++# Note: most of these also require special kernel boot parameters
++#
++# CONFIG_BLK_DEV_4DRIVES is not set
++# CONFIG_BLK_DEV_ALI14XX is not set
++# CONFIG_BLK_DEV_DTC2278 is not set
++# CONFIG_BLK_DEV_HT6560B is not set
++# CONFIG_BLK_DEV_QD65XX is not set
++# CONFIG_BLK_DEV_UMC8672 is not set
++CONFIG_BLK_DEV_IDEDMA=y
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++CONFIG_SCSI_NETLINK=y
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++CONFIG_BLK_DEV_SR_VENDOR=y
++CONFIG_CHR_DEV_SG=m
++CONFIG_CHR_DEV_SCH=m
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++CONFIG_SCSI_SPI_ATTRS=m
++CONFIG_SCSI_FC_ATTRS=m
++CONFIG_SCSI_ISCSI_ATTRS=m
++# CONFIG_SCSI_SAS_LIBSAS is not set
++CONFIG_SCSI_SRP_ATTRS=m
++# CONFIG_SCSI_LOWLEVEL is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# Enable only one of the two stacks, unless you know what you are doing
++#
++# CONFIG_FIREWIRE is not set
++CONFIG_IEEE1394=m
++CONFIG_IEEE1394_OHCI1394=m
++
++#
++# PCILynx controller requires I2C
++#
++CONFIG_IEEE1394_SBP2=m
++# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
++CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y
++CONFIG_IEEE1394_ETH1394=m
++CONFIG_IEEE1394_RAWIO=m
++CONFIG_IEEE1394_VIDEO1394=m
++CONFIG_IEEE1394_DV1394=m
++# CONFIG_IEEE1394_VERBOSEDEBUG is not set
++CONFIG_I2O=m
++CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
++CONFIG_I2O_EXT_ADAPTEC=y
++CONFIG_I2O_EXT_ADAPTEC_DMA64=y
++# CONFIG_I2O_CONFIG is not set
++# CONFIG_I2O_BUS is not set
++# CONFIG_I2O_BLOCK is not set
++# CONFIG_I2O_SCSI is not set
++# CONFIG_I2O_PROC is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++CONFIG_VETH=m
++# CONFIG_ARCNET is not set
++CONFIG_PHYLIB=m
++
++#
++# MII PHY device drivers
++#
++CONFIG_MARVELL_PHY=m
++CONFIG_DAVICOM_PHY=m
++CONFIG_QSEMI_PHY=m
++CONFIG_LXT_PHY=m
++CONFIG_CICADA_PHY=m
++CONFIG_VITESSE_PHY=m
++CONFIG_SMSC_PHY=m
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_REALTEK_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_HAPPYMEAL is not set
++# CONFIG_SUNGEM is not set
++# CONFIG_CASSINI is not set
++# CONFIG_NET_VENDOR_3COM is not set
++# CONFIG_NET_VENDOR_SMC is not set
++# CONFIG_DM9000 is not set
++# CONFIG_NET_VENDOR_RACAL is not set
++# CONFIG_NET_TULIP is not set
++# CONFIG_AT1700 is not set
++# CONFIG_DEPCA is not set
++# CONFIG_HP100 is not set
++# CONFIG_NET_ISA is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++CONFIG_NET_PCI=y
++# CONFIG_PCNET32 is not set
++# CONFIG_AMD8111_ETH is not set
++# CONFIG_ADAPTEC_STARFIRE is not set
++# CONFIG_AC3200 is not set
++# CONFIG_APRICOT is not set
++# CONFIG_B44 is not set
++# CONFIG_FORCEDETH is not set
++# CONFIG_CS89x0 is not set
++# CONFIG_TC35815 is not set
++# CONFIG_EEPRO100 is not set
++# CONFIG_E100 is not set
++# CONFIG_FEALNX is not set
++# CONFIG_NATSEMI is not set
++# CONFIG_NE2K_PCI is not set
++# CONFIG_8139CP is not set
++CONFIG_8139TOO=y
++# CONFIG_8139TOO_PIO is not set
++# CONFIG_8139TOO_TUNE_TWISTER is not set
++# CONFIG_8139TOO_8129 is not set
++# CONFIG_8139_OLD_RX_RESET is not set
++# CONFIG_R6040 is not set
++# CONFIG_SIS900 is not set
++# CONFIG_EPIC100 is not set
++# CONFIG_SUNDANCE is not set
++# CONFIG_TLAN is not set
++# CONFIG_VIA_RHINE is not set
++# CONFIG_SC92031 is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++# CONFIG_TR is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_IWLWIFI_LEDS is not set
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_WAN is not set
++# CONFIG_FDDI is not set
++# CONFIG_HIPPI is not set
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++CONFIG_PPPOE=m
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_NET_FC is not set
++CONFIG_NETCONSOLE=m
++# CONFIG_NETCONSOLE_DYNAMIC is not set
++CONFIG_NETPOLL=y
++# CONFIG_NETPOLL_TRAP is not set
++CONFIG_NET_POLL_CONTROLLER=y
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++CONFIG_INPUT_JOYDEV=m
++CONFIG_INPUT_EVDEV=m
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++CONFIG_KEYBOARD_ATKBD=y
++CONFIG_KEYBOARD_SUNKBD=m
++CONFIG_KEYBOARD_LKKBD=m
++CONFIG_KEYBOARD_XTKBD=m
++CONFIG_KEYBOARD_NEWTON=m
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_INPUT_MOUSE=y
++CONFIG_MOUSE_PS2=y
++CONFIG_MOUSE_PS2_ALPS=y
++CONFIG_MOUSE_PS2_LOGIPS2PP=y
++CONFIG_MOUSE_PS2_SYNAPTICS=y
++CONFIG_MOUSE_PS2_LIFEBOOK=y
++CONFIG_MOUSE_PS2_TRACKPOINT=y
++# CONFIG_MOUSE_PS2_TOUCHKIT is not set
++CONFIG_MOUSE_SERIAL=m
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_BCM5974 is not set
++CONFIG_MOUSE_INPORT=m
++# CONFIG_MOUSE_ATIXL is not set
++CONFIG_MOUSE_LOGIBM=m
++CONFIG_MOUSE_PC110PAD=m
++CONFIG_MOUSE_VSXXXAA=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_PCSPKR=m
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++CONFIG_INPUT_UINPUT=m
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++CONFIG_SERIO_I8042=y
++CONFIG_SERIO_SERPORT=m
++CONFIG_SERIO_PCIPS2=m
++CONFIG_SERIO_LIBPS2=y
++CONFIG_SERIO_RAW=m
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_DEVKMEM=y
++CONFIG_SERIAL_NONSTANDARD=y
++# CONFIG_COMPUTONE is not set
++CONFIG_ROCKETPORT=m
++CONFIG_CYCLADES=m
++# CONFIG_CYZ_INTR is not set
++# CONFIG_DIGIEPCA is not set
++# CONFIG_MOXA_INTELLIO is not set
++CONFIG_MOXA_SMARTIO=m
++# CONFIG_ISI is not set
++CONFIG_SYNCLINKMP=m
++CONFIG_SYNCLINK_GT=m
++CONFIG_N_HDLC=m
++# CONFIG_RISCOM8 is not set
++# CONFIG_SPECIALIX is not set
++CONFIG_SX=m
++# CONFIG_RIO is not set
++CONFIG_STALDRV=y
++# CONFIG_STALLION is not set
++# CONFIG_ISTALLION is not set
++# CONFIG_NOZOMI is not set
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++CONFIG_SERIAL_8250_CONSOLE=y
++CONFIG_SERIAL_8250_PCI=y
++CONFIG_SERIAL_8250_NR_UARTS=16
++CONFIG_SERIAL_8250_RUNTIME_UARTS=4
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_MANY_PORTS=y
++CONFIG_SERIAL_8250_FOURPORT=m
++CONFIG_SERIAL_8250_ACCENT=m
++CONFIG_SERIAL_8250_BOCA=m
++# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
++CONFIG_SERIAL_8250_HUB6=m
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++# CONFIG_SERIAL_8250_DETECT_IRQ is not set
++CONFIG_SERIAL_8250_RSA=y
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_SERIAL_JSM=m
++CONFIG_UNIX98_PTYS=y
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=16
++CONFIG_IPMI_HANDLER=m
++# CONFIG_IPMI_PANIC_EVENT is not set
++CONFIG_IPMI_DEVICE_INTERFACE=m
++CONFIG_IPMI_SI=m
++CONFIG_IPMI_WATCHDOG=m
++CONFIG_IPMI_POWEROFF=m
++CONFIG_HW_RANDOM=y
++CONFIG_RTC=y
++CONFIG_DTLK=m
++CONFIG_R3964=m
++CONFIG_APPLICOM=m
++CONFIG_RAW_DRIVER=m
++CONFIG_MAX_RAW_DEVS=256
++# CONFIG_TCG_TPM is not set
++CONFIG_DEVPORT=y
++# CONFIG_I2C is not set
++# CONFIG_SPI is not set
++# CONFIG_W1 is not set
++CONFIG_POWER_SUPPLY=m
++# CONFIG_POWER_SUPPLY_DEBUG is not set
++# CONFIG_PDA_POWER is not set
++# CONFIG_BATTERY_DS2760 is not set
++CONFIG_HWMON=m
++# CONFIG_HWMON_VID is not set
++# CONFIG_SENSORS_I5K_AMB is not set
++# CONFIG_SENSORS_F71805F is not set
++# CONFIG_SENSORS_F71882FG is not set
++# CONFIG_SENSORS_IBMAEM is not set
++# CONFIG_SENSORS_IBMPEX is not set
++# CONFIG_SENSORS_IT87 is not set
++# CONFIG_SENSORS_PC87360 is not set
++# CONFIG_SENSORS_PC87427 is not set
++# CONFIG_SENSORS_SIS5595 is not set
++# CONFIG_SENSORS_SMSC47M1 is not set
++# CONFIG_SENSORS_SMSC47B397 is not set
++# CONFIG_SENSORS_VIA686A is not set
++# CONFIG_SENSORS_VT1211 is not set
++# CONFIG_SENSORS_VT8231 is not set
++# CONFIG_SENSORS_W83627HF is not set
++# CONFIG_SENSORS_W83627EHF is not set
++# CONFIG_HWMON_DEBUG_CHIP is not set
++CONFIG_THERMAL=m
++# CONFIG_THERMAL_HWMON is not set
++# CONFIG_WATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++CONFIG_SSB=m
++CONFIG_SSB_SPROM=y
++CONFIG_SSB_PCIHOST_POSSIBLE=y
++CONFIG_SSB_PCIHOST=y
++# CONFIG_SSB_B43_PCI_BRIDGE is not set
++# CONFIG_SSB_SILENT is not set
++# CONFIG_SSB_DEBUG is not set
++CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
++CONFIG_SSB_DRIVER_PCICORE=y
++# CONFIG_SSB_DRIVER_MIPS is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_MFD_TMIO is not set
++
++#
++# Multimedia devices
++#
++
++#
++# Multimedia core support
++#
++CONFIG_VIDEO_DEV=y
++CONFIG_VIDEO_V4L2_COMMON=y
++CONFIG_VIDEO_ALLOW_V4L1=y
++CONFIG_VIDEO_V4L1_COMPAT=y
++# CONFIG_DVB_CORE is not set
++CONFIG_VIDEO_MEDIA=y
++
++#
++# Multimedia drivers
++#
++# CONFIG_MEDIA_ATTACH is not set
++CONFIG_VIDEO_V4L2=y
++CONFIG_VIDEO_V4L1=y
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
++# CONFIG_VIDEO_VIVI is not set
++# CONFIG_VIDEO_PMS is not set
++# CONFIG_VIDEO_CPIA is not set
++# CONFIG_VIDEO_CPIA2 is not set
++# CONFIG_VIDEO_STRADIS is not set
++CONFIG_V4L_USB_DRIVERS=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
++# CONFIG_USB_GSPCA is not set
++# CONFIG_USB_VICAM is not set
++# CONFIG_USB_IBMCAM is not set
++# CONFIG_USB_KONICAWC is not set
++# CONFIG_USB_QUICKCAM_MESSENGER is not set
++# CONFIG_USB_ET61X251 is not set
++# CONFIG_USB_OV511 is not set
++# CONFIG_USB_SE401 is not set
++# CONFIG_USB_SN9C102 is not set
++# CONFIG_USB_STV680 is not set
++# CONFIG_USB_ZC0301 is not set
++# CONFIG_USB_PWC is not set
++# CONFIG_USB_ZR364XX is not set
++# CONFIG_USB_STKWEBCAM is not set
++# CONFIG_USB_S2255 is not set
++# CONFIG_SOC_CAMERA is not set
++# CONFIG_VIDEO_SH_MOBILE_CEU is not set
++# CONFIG_RADIO_ADAPTERS is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++CONFIG_DRM=m
++# CONFIG_DRM_TDFX is not set
++# CONFIG_DRM_R128 is not set
++# CONFIG_DRM_RADEON is not set
++# CONFIG_DRM_MGA is not set
++# CONFIG_DRM_VIA is not set
++# CONFIG_DRM_SAVAGE is not set
++# CONFIG_VGASTATE is not set
++CONFIG_VIDEO_OUTPUT_CONTROL=m
++CONFIG_FB=y
++CONFIG_FIRMWARE_EDID=y
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++CONFIG_FB_MODE_HELPERS=y
++CONFIG_FB_TILEBLITTING=y
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_CIRRUS is not set
++# CONFIG_FB_PM2 is not set
++# CONFIG_FB_CYBER2000 is not set
++# CONFIG_FB_ASILIANT is not set
++# CONFIG_FB_IMSTT is not set
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_NVIDIA is not set
++# CONFIG_FB_RIVA is not set
++# CONFIG_FB_MATROX is not set
++# CONFIG_FB_RADEON is not set
++# CONFIG_FB_ATY128 is not set
++# CONFIG_FB_ATY is not set
++# CONFIG_FB_S3 is not set
++# CONFIG_FB_SAVAGE is not set
++# CONFIG_FB_SIS is not set
++# CONFIG_FB_NEOMAGIC is not set
++# CONFIG_FB_KYRO is not set
++# CONFIG_FB_3DFX is not set
++# CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_VT8623 is not set
++# CONFIG_FB_TRIDENT is not set
++# CONFIG_FB_ARK is not set
++# CONFIG_FB_PM3 is not set
++# CONFIG_FB_CARMINE is not set
++CONFIG_FB_SILICONMOTION=y
++CONFIG_FB_SM7XX=y
++CONFIG_FB_SM7XX_ACCEL=y
++# CONFIG_FB_SM7XX_DUALHEAD is not set
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++# CONFIG_LCD_CLASS_DEVICE is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_BACKLIGHT_CORGI is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++# CONFIG_MDA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
++# CONFIG_FONTS is not set
++CONFIG_FONT_8x8=y
++CONFIG_FONT_8x16=y
++# CONFIG_LOGO is not set
++CONFIG_SOUND=m
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++CONFIG_SND_RAWMIDI=m
++CONFIG_SND_SEQUENCER=m
++CONFIG_SND_SEQ_DUMMY=m
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++CONFIG_SND_SEQUENCER_OSS=y
++# CONFIG_SND_RTCTIMER is not set
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++CONFIG_SND_VMASTER=y
++CONFIG_SND_MPU401_UART=m
++CONFIG_SND_AC97_CODEC=m
++CONFIG_SND_DRIVERS=y
++CONFIG_SND_DUMMY=m
++CONFIG_SND_VIRMIDI=m
++CONFIG_SND_MTPAV=m
++CONFIG_SND_SERIAL_U16550=m
++CONFIG_SND_MPU401=m
++# CONFIG_SND_AC97_POWER_SAVE is not set
++CONFIG_SND_PCI=y
++# CONFIG_SND_AD1889 is not set
++# CONFIG_SND_ALS300 is not set
++# CONFIG_SND_ALI5451 is not set
++# CONFIG_SND_ATIIXP is not set
++# CONFIG_SND_ATIIXP_MODEM is not set
++# CONFIG_SND_AU8810 is not set
++# CONFIG_SND_AU8820 is not set
++# CONFIG_SND_AU8830 is not set
++# CONFIG_SND_AW2 is not set
++# CONFIG_SND_AZT3328 is not set
++# CONFIG_SND_BT87X is not set
++# CONFIG_SND_CA0106 is not set
++# CONFIG_SND_CMIPCI is not set
++# CONFIG_SND_OXYGEN is not set
++# CONFIG_SND_CS4281 is not set
++# CONFIG_SND_CS46XX is not set
++CONFIG_SND_CS5535AUDIO=m
++# CONFIG_SND_DARLA20 is not set
++# CONFIG_SND_GINA20 is not set
++# CONFIG_SND_LAYLA20 is not set
++# CONFIG_SND_DARLA24 is not set
++# CONFIG_SND_GINA24 is not set
++# CONFIG_SND_LAYLA24 is not set
++# CONFIG_SND_MONA is not set
++# CONFIG_SND_MIA is not set
++# CONFIG_SND_ECHO3G is not set
++# CONFIG_SND_INDIGO is not set
++# CONFIG_SND_INDIGOIO is not set
++# CONFIG_SND_INDIGODJ is not set
++# CONFIG_SND_EMU10K1 is not set
++# CONFIG_SND_EMU10K1X is not set
++# CONFIG_SND_ENS1370 is not set
++# CONFIG_SND_ENS1371 is not set
++# CONFIG_SND_ES1938 is not set
++# CONFIG_SND_ES1968 is not set
++# CONFIG_SND_FM801 is not set
++# CONFIG_SND_HDA_INTEL is not set
++# CONFIG_SND_HDSP is not set
++# CONFIG_SND_HDSPM is not set
++# CONFIG_SND_HIFIER is not set
++# CONFIG_SND_ICE1712 is not set
++# CONFIG_SND_ICE1724 is not set
++# CONFIG_SND_INTEL8X0 is not set
++# CONFIG_SND_INTEL8X0M is not set
++# CONFIG_SND_KORG1212 is not set
++# CONFIG_SND_MAESTRO3 is not set
++# CONFIG_SND_MIXART is not set
++# CONFIG_SND_NM256 is not set
++# CONFIG_SND_PCXHR is not set
++# CONFIG_SND_RIPTIDE is not set
++# CONFIG_SND_RME32 is not set
++# CONFIG_SND_RME96 is not set
++# CONFIG_SND_RME9652 is not set
++# CONFIG_SND_SONICVIBES is not set
++# CONFIG_SND_TRIDENT is not set
++CONFIG_SND_VIA82XX=m
++# CONFIG_SND_VIA82XX_MODEM is not set
++# CONFIG_SND_VIRTUOSO is not set
++# CONFIG_SND_VX222 is not set
++# CONFIG_SND_YMFPCI is not set
++# CONFIG_SND_MIPS is not set
++# CONFIG_SND_USB is not set
++# CONFIG_SND_SOC is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=m
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=m
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++CONFIG_USB_HIDDEV=y
++
++#
++# USB HID Boot Protocol drivers
++#
++# CONFIG_USB_KBD is not set
++# CONFIG_USB_MOUSE is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++# CONFIG_USB_SUSPEND is not set
++# CONFIG_USB_OTG is not set
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++# CONFIG_USB_MON is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++CONFIG_USB_EHCI_HCD=y
++# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
++# CONFIG_USB_EHCI_TT_NEWSCHED is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++CONFIG_USB_OHCI_HCD=m
++# CONFIG_USB_OHCI_HCD_SSB is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++CONFIG_USB_UHCI_HCD=m
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++CONFIG_USB_PRINTER=m
++# CONFIG_USB_WDM is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++CONFIG_USB_STORAGE_ISD200=y
++CONFIG_USB_STORAGE_DPCM=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++CONFIG_USB_LIBUSUAL=y
++
++#
++# USB Imaging devices
++#
++CONFIG_USB_MDC800=m
++CONFIG_USB_MICROTEK=m
++
++#
++# USB port drivers
++#
++CONFIG_USB_SERIAL=m
++CONFIG_USB_EZUSB=y
++CONFIG_USB_SERIAL_GENERIC=y
++# CONFIG_USB_SERIAL_AIRCABLE is not set
++# CONFIG_USB_SERIAL_ARK3116 is not set
++# CONFIG_USB_SERIAL_BELKIN is not set
++# CONFIG_USB_SERIAL_CH341 is not set
++# CONFIG_USB_SERIAL_WHITEHEAT is not set
++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
++# CONFIG_USB_SERIAL_CP2101 is not set
++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
++# CONFIG_USB_SERIAL_EMPEG is not set
++# CONFIG_USB_SERIAL_FTDI_SIO is not set
++# CONFIG_USB_SERIAL_FUNSOFT is not set
++# CONFIG_USB_SERIAL_VISOR is not set
++# CONFIG_USB_SERIAL_IPAQ is not set
++# CONFIG_USB_SERIAL_IR is not set
++# CONFIG_USB_SERIAL_EDGEPORT is not set
++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
++# CONFIG_USB_SERIAL_GARMIN is not set
++# CONFIG_USB_SERIAL_IPW is not set
++# CONFIG_USB_SERIAL_IUU is not set
++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
++# CONFIG_USB_SERIAL_KEYSPAN is not set
++# CONFIG_USB_SERIAL_KLSI is not set
++# CONFIG_USB_SERIAL_KOBIL_SCT is not set
++# CONFIG_USB_SERIAL_MCT_U232 is not set
++# CONFIG_USB_SERIAL_MOS7720 is not set
++# CONFIG_USB_SERIAL_MOS7840 is not set
++# CONFIG_USB_SERIAL_MOTOROLA is not set
++# CONFIG_USB_SERIAL_NAVMAN is not set
++# CONFIG_USB_SERIAL_PL2303 is not set
++# CONFIG_USB_SERIAL_OTI6858 is not set
++# CONFIG_USB_SERIAL_SPCP8X5 is not set
++# CONFIG_USB_SERIAL_HP4X is not set
++# CONFIG_USB_SERIAL_SAFE is not set
++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
++# CONFIG_USB_SERIAL_TI is not set
++# CONFIG_USB_SERIAL_CYBERJACK is not set
++# CONFIG_USB_SERIAL_XIRCOM is not set
++# CONFIG_USB_SERIAL_OPTION is not set
++# CONFIG_USB_SERIAL_OMNINET is not set
++# CONFIG_USB_SERIAL_DEBUG is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_SISUSBVGA is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++CONFIG_USB_TEST=m
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_GADGET is not set
++# CONFIG_MMC is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_NEW_LEDS is not set
++# CONFIG_ACCESSIBILITY is not set
++# CONFIG_INFINIBAND is not set
++# CONFIG_RTC_CLASS is not set
++# CONFIG_DMADEVICES is not set
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS_XATTR=y
++CONFIG_EXT2_FS_POSIX_ACL=y
++CONFIG_EXT2_FS_SECURITY=y
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS_XATTR=y
++CONFIG_EXT3_FS_POSIX_ACL=y
++CONFIG_EXT3_FS_SECURITY=y
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++CONFIG_FS_MBCACHE=y
++CONFIG_REISERFS_FS=m
++# CONFIG_REISERFS_CHECK is not set
++# CONFIG_REISERFS_PROC_INFO is not set
++CONFIG_REISERFS_FS_XATTR=y
++CONFIG_REISERFS_FS_POSIX_ACL=y
++CONFIG_REISERFS_FS_SECURITY=y
++CONFIG_JFS_FS=m
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++# CONFIG_JFS_DEBUG is not set
++# CONFIG_JFS_STATISTICS is not set
++CONFIG_FS_POSIX_ACL=y
++CONFIG_XFS_FS=m
++CONFIG_XFS_QUOTA=y
++CONFIG_XFS_POSIX_ACL=y
++CONFIG_XFS_RT=y
++# CONFIG_XFS_DEBUG is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++CONFIG_QUOTA=y
++# CONFIG_QUOTA_NETLINK_INTERFACE is not set
++CONFIG_PRINT_QUOTA_WARNING=y
++CONFIG_QFMT_V1=m
++CONFIG_QFMT_V2=m
++CONFIG_QUOTACTL=y
++CONFIG_AUTOFS_FS=m
++CONFIG_AUTOFS4_FS=m
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++CONFIG_UDF_FS=m
++CONFIG_UDF_NLS=y
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
++CONFIG_NTFS_FS=m
++# CONFIG_NTFS_DEBUG is not set
++CONFIG_NTFS_RW=y
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++CONFIG_ADFS_FS=m
++# CONFIG_ADFS_FS_RW is not set
++CONFIG_AFFS_FS=m
++# CONFIG_ECRYPT_FS is not set
++CONFIG_HFS_FS=m
++CONFIG_HFSPLUS_FS=m
++CONFIG_BEFS_FS=m
++# CONFIG_BEFS_DEBUG is not set
++CONFIG_BFS_FS=m
++CONFIG_EFS_FS=m
++# CONFIG_JFFS2_FS is not set
++CONFIG_CRAMFS=y
++CONFIG_VXFS_FS=m
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++CONFIG_ROMFS_FS=m
++CONFIG_SYSV_FS=m
++CONFIG_UFS_FS=m
++# CONFIG_UFS_FS_WRITE is not set
++# CONFIG_UFS_DEBUG is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=m
++CONFIG_NFS_V3=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_NFSD=m
++CONFIG_NFSD_V2_ACL=y
++CONFIG_NFSD_V3=y
++CONFIG_NFSD_V3_ACL=y
++CONFIG_NFSD_V4=y
++CONFIG_LOCKD=m
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_ACL_SUPPORT=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=m
++CONFIG_SUNRPC_GSS=m
++CONFIG_RPCSEC_GSS_KRB5=m
++CONFIG_RPCSEC_GSS_SPKM3=m
++CONFIG_SMB_FS=m
++# CONFIG_SMB_NLS_DEFAULT is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++# CONFIG_CIFS_UPCALL is not set
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
++CONFIG_NCP_FS=m
++CONFIG_NCPFS_PACKET_SIGNING=y
++CONFIG_NCPFS_IOCTL_LOCKING=y
++CONFIG_NCPFS_STRONG=y
++CONFIG_NCPFS_NFS_NS=y
++CONFIG_NCPFS_OS2_NS=y
++# CONFIG_NCPFS_SMALLDOS is not set
++CONFIG_NCPFS_NLS=y
++CONFIG_NCPFS_EXTRAS=y
++CONFIG_CODA_FS=m
++CONFIG_AFS_FS=m
++# CONFIG_AFS_DEBUG is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++CONFIG_ACORN_PARTITION=y
++# CONFIG_ACORN_PARTITION_CUMANA is not set
++# CONFIG_ACORN_PARTITION_EESOX is not set
++CONFIG_ACORN_PARTITION_ICS=y
++# CONFIG_ACORN_PARTITION_ADFS is not set
++# CONFIG_ACORN_PARTITION_POWERTEC is not set
++CONFIG_ACORN_PARTITION_RISCIX=y
++CONFIG_OSF_PARTITION=y
++CONFIG_AMIGA_PARTITION=y
++CONFIG_ATARI_PARTITION=y
++CONFIG_MAC_PARTITION=y
++CONFIG_MSDOS_PARTITION=y
++CONFIG_BSD_DISKLABEL=y
++CONFIG_MINIX_SUBPARTITION=y
++CONFIG_SOLARIS_X86_PARTITION=y
++CONFIG_UNIXWARE_DISKLABEL=y
++CONFIG_LDM_PARTITION=y
++# CONFIG_LDM_DEBUG is not set
++CONFIG_SGI_PARTITION=y
++CONFIG_ULTRIX_PARTITION=y
++CONFIG_SUN_PARTITION=y
++CONFIG_KARMA_PARTITION=y
++CONFIG_EFI_PARTITION=y
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="utf8"
++CONFIG_NLS_CODEPAGE_437=m
++CONFIG_NLS_CODEPAGE_737=m
++CONFIG_NLS_CODEPAGE_775=m
++CONFIG_NLS_CODEPAGE_850=m
++CONFIG_NLS_CODEPAGE_852=m
++CONFIG_NLS_CODEPAGE_855=m
++CONFIG_NLS_CODEPAGE_857=m
++CONFIG_NLS_CODEPAGE_860=m
++CONFIG_NLS_CODEPAGE_861=m
++CONFIG_NLS_CODEPAGE_862=m
++CONFIG_NLS_CODEPAGE_863=m
++CONFIG_NLS_CODEPAGE_864=m
++CONFIG_NLS_CODEPAGE_865=m
++CONFIG_NLS_CODEPAGE_866=m
++CONFIG_NLS_CODEPAGE_869=m
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++# CONFIG_NLS_CODEPAGE_932 is not set
++CONFIG_NLS_CODEPAGE_949=m
++CONFIG_NLS_CODEPAGE_874=m
++CONFIG_NLS_ISO8859_8=m
++CONFIG_NLS_CODEPAGE_1250=m
++CONFIG_NLS_CODEPAGE_1251=m
++CONFIG_NLS_ASCII=m
++CONFIG_NLS_ISO8859_1=m
++CONFIG_NLS_ISO8859_2=m
++CONFIG_NLS_ISO8859_3=m
++CONFIG_NLS_ISO8859_4=m
++CONFIG_NLS_ISO8859_5=m
++CONFIG_NLS_ISO8859_6=m
++CONFIG_NLS_ISO8859_7=m
++CONFIG_NLS_ISO8859_9=m
++CONFIG_NLS_ISO8859_13=m
++CONFIG_NLS_ISO8859_14=m
++CONFIG_NLS_ISO8859_15=m
++CONFIG_NLS_KOI8_R=m
++CONFIG_NLS_KOI8_U=m
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++CONFIG_MAGIC_SYSRQ=y
++CONFIG_UNUSED_SYMBOLS=y
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_MEMORY_INIT is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++CONFIG_CMDLINE=""
++
++#
++# Security options
++#
++CONFIG_KEYS=y
++# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
++CONFIG_SECURITY=y
++CONFIG_SECURITY_NETWORK=y
++CONFIG_SECURITY_NETWORK_XFRM=y
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_SECURITY_ROOTPLUG is not set
++CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
++CONFIG_SECURITY_SELINUX=y
++CONFIG_SECURITY_SELINUX_BOOTPARAM=y
++CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
++CONFIG_SECURITY_SELINUX_DISABLE=y
++CONFIG_SECURITY_SELINUX_DEVELOP=y
++CONFIG_SECURITY_SELINUX_AVC_STATS=y
++CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
++# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
++# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_AEAD=m
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_MANAGER=y
++# CONFIG_CRYPTO_GF128MUL is not set
++CONFIG_CRYPTO_NULL=m
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_AUTHENC=m
++CONFIG_CRYPTO_TEST=m
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=m
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=y
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++CONFIG_CRYPTO_HMAC=y
++# CONFIG_CRYPTO_XCBC is not set
++
++#
++# Digest
++#
++CONFIG_CRYPTO_CRC32C=m
++CONFIG_CRYPTO_MD4=m
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_MICHAEL_MIC=m
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++CONFIG_CRYPTO_SHA1=m
++CONFIG_CRYPTO_SHA256=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_WP512=m
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=y
++CONFIG_CRYPTO_ANUBIS=m
++CONFIG_CRYPTO_ARC4=y
++CONFIG_CRYPTO_BLOWFISH=m
++# CONFIG_CRYPTO_CAMELLIA is not set
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_CAST6=m
++CONFIG_CRYPTO_DES=m
++# CONFIG_CRYPTO_FCRYPT is not set
++CONFIG_CRYPTO_KHAZAD=m
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_SERPENT=m
++CONFIG_CRYPTO_TEA=m
++CONFIG_CRYPTO_TWOFISH=m
++CONFIG_CRYPTO_TWOFISH_COMMON=m
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=m
++# CONFIG_CRYPTO_LZO is not set
++CONFIG_CRYPTO_HW=y
++# CONFIG_CRYPTO_DEV_HIFN_795X is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_GENERIC_FIND_FIRST_BIT is not set
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=m
++# CONFIG_CRC_T10DIF is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=m
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=m
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/mips/configs/ls2f_notebook_fbsplash.config b/arch/mips/configs/ls2f_notebook_fbsplash.config
+new file mode 100644
+index 0000000..43d45cf
+--- /dev/null
++++ b/arch/mips/configs/ls2f_notebook_fbsplash.config
+@@ -0,0 +1,1804 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.27.7
++# Mon Feb 16 20:13:11 2009
++#
++CONFIG_MIPS=y
++
++#
++# Machine selection
++#
++# CONFIG_MACH_ALCHEMY is not set
++# CONFIG_BASLER_EXCITE is not set
++# CONFIG_BCM47XX is not set
++# CONFIG_MIPS_COBALT is not set
++# CONFIG_MACH_DECSTATION is not set
++# CONFIG_MACH_JAZZ is not set
++# CONFIG_LASAT is not set
++# CONFIG_LEMOTE_FULONG is not set
++CONFIG_MACH_LM2F=y
++# CONFIG_MIPS_MALTA is not set
++# CONFIG_MIPS_SIM is not set
++# CONFIG_MARKEINS is not set
++# CONFIG_MACH_VR41XX is not set
++# CONFIG_PNX8550_JBS is not set
++# CONFIG_PNX8550_STB810 is not set
++# CONFIG_PMC_MSP is not set
++# CONFIG_PMC_YOSEMITE is not set
++# CONFIG_SGI_IP22 is not set
++# CONFIG_SGI_IP27 is not set
++# CONFIG_SGI_IP28 is not set
++# CONFIG_SGI_IP32 is not set
++# CONFIG_SIBYTE_CRHINE is not set
++# CONFIG_SIBYTE_CARMEL is not set
++# CONFIG_SIBYTE_CRHONE is not set
++# CONFIG_SIBYTE_RHONE is not set
++# CONFIG_SIBYTE_SWARM is not set
++# CONFIG_SIBYTE_LITTLESUR is not set
++# CONFIG_SIBYTE_SENTOSA is not set
++# CONFIG_SIBYTE_BIGSUR is not set
++# CONFIG_SNI_RM is not set
++# CONFIG_MACH_TX39XX is not set
++# CONFIG_MACH_TX49XX is not set
++# CONFIG_MIKROTIK_RB532 is not set
++# CONFIG_WR_PPMC is not set
++# CONFIG_LEMOTE_FULONG2F is not set
++CONFIG_LEMOTE_2FNOTEBOOK=y
++CONFIG_CS5536_RTC_BUG=y
++CONFIG_CS5536=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_FIND_NEXT_BIT=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_GENERIC_TIME=y
++CONFIG_GENERIC_CMOS_UPDATE=y
++CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_CEVT_R4K=y
++CONFIG_CSRC_R4K=y
++CONFIG_DMA_NONCOHERENT=y
++CONFIG_DMA_NEED_PCI_MAP_STATE=y
++CONFIG_EARLY_PRINTK=y
++CONFIG_SYS_HAS_EARLY_PRINTK=y
++# CONFIG_HOTPLUG_CPU is not set
++CONFIG_I8259=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_ISA_DMA=y
++CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y
++# CONFIG_CPU_BIG_ENDIAN is not set
++CONFIG_CPU_LITTLE_ENDIAN=y
++CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
++CONFIG_IRQ_CPU=y
++CONFIG_BOOT_ELF32=y
++CONFIG_MIPS_L1_CACHE_SHIFT=5
++CONFIG_HAVE_STD_PC_SERIAL_PORT=y
++
++#
++# CPU selection
++#
++CONFIG_CPU_LOONGSON2=y
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS32_R2 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
++# CONFIG_CPU_MIPS64_R2 is not set
++# CONFIG_CPU_R3000 is not set
++# CONFIG_CPU_TX39XX is not set
++# CONFIG_CPU_VR41XX is not set
++# CONFIG_CPU_R4300 is not set
++# CONFIG_CPU_R4X00 is not set
++# CONFIG_CPU_TX49XX is not set
++# CONFIG_CPU_R5000 is not set
++# CONFIG_CPU_R5432 is not set
++# CONFIG_CPU_R6000 is not set
++# CONFIG_CPU_NEVADA is not set
++# CONFIG_CPU_R8000 is not set
++# CONFIG_CPU_R10000 is not set
++# CONFIG_CPU_RM7000 is not set
++# CONFIG_CPU_RM9000 is not set
++# CONFIG_CPU_SB1 is not set
++CONFIG_SYS_HAS_CPU_LOONGSON2=y
++CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
++CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
++CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
++CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
++
++#
++# Kernel type
++#
++# CONFIG_32BIT is not set
++CONFIG_64BIT=y
++# CONFIG_PAGE_SIZE_4KB is not set
++# CONFIG_PAGE_SIZE_8KB is not set
++CONFIG_PAGE_SIZE_16KB=y
++# CONFIG_PAGE_SIZE_64KB is not set
++CONFIG_BOARD_SCACHE=y
++CONFIG_MIPS_MT_DISABLED=y
++# CONFIG_MIPS_MT_SMP is not set
++# CONFIG_MIPS_MT_SMTC is not set
++CONFIG_CPU_HAS_WB=y
++CONFIG_CPU_HAS_SYNC=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_CPU_SUPPORTS_HIGHMEM=y
++CONFIG_SYS_SUPPORTS_HIGHMEM=y
++CONFIG_ARCH_FLATMEM_ENABLE=y
++CONFIG_ARCH_POPULATES_NODE_MAP=y
++CONFIG_ARCH_SPARSEMEM_ENABLE=y
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_SPARSEMEM_STATIC=y
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4
++CONFIG_RESOURCES_64BIT=y
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++# CONFIG_HZ_48 is not set
++# CONFIG_HZ_100 is not set
++# CONFIG_HZ_128 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_256 is not set
++# CONFIG_HZ_1000 is not set
++# CONFIG_HZ_1024 is not set
++CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
++CONFIG_HZ=250
++# CONFIG_PREEMPT_NONE is not set
++CONFIG_PREEMPT_VOLUNTARY=y
++# CONFIG_PREEMPT is not set
++CONFIG_KEXEC=y
++# CONFIG_SECCOMP is not set
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++# CONFIG_TASKSTATS is not set
++CONFIG_AUDIT=y
++CONFIG_IKCONFIG=y
++# CONFIG_IKCONFIG_PROC is not set
++CONFIG_LOG_BUF_SHIFT=15
++# CONFIG_CGROUPS is not set
++# CONFIG_GROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_SYSFS_DEPRECATED_V2=y
++# CONFIG_RELAY is not set
++# CONFIG_NAMESPACES is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_PCSPKR_PLATFORM=y
++CONFIG_COMPAT_BRK=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++CONFIG_PROFILING=y
++# CONFIG_MARKERS is not set
++CONFIG_OPROFILE=m
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
++# CONFIG_HAVE_IOREMAP_PROT is not set
++# CONFIG_HAVE_KPROBES is not set
++# CONFIG_HAVE_KRETPROBES is not set
++# CONFIG_HAVE_ARCH_TRACEHOOK is not set
++# CONFIG_HAVE_DMA_ATTRS is not set
++# CONFIG_USE_GENERIC_SMP_HELPERS is not set
++# CONFIG_HAVE_CLK is not set
++CONFIG_PROC_PAGE_MONITOR=y
++# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++CONFIG_BLOCK_COMPAT=y
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++CONFIG_CLASSIC_RCU=y
++# CONFIG_PROBE_INITRD_HEADER is not set
++
++#
++# Bus options (PCI, PCMCIA, EISA, ISA, TC)
++#
++CONFIG_HW_HAS_PCI=y
++CONFIG_PCI=y
++CONFIG_PCI_DOMAINS=y
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCI_LEGACY=y
++CONFIG_ISA=y
++CONFIG_MMU=y
++# CONFIG_PCCARD is not set
++CONFIG_HOTPLUG_PCI=m
++# CONFIG_HOTPLUG_PCI_FAKE is not set
++# CONFIG_HOTPLUG_PCI_CPCI is not set
++# CONFIG_HOTPLUG_PCI_SHPC is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++CONFIG_BINFMT_MISC=m
++CONFIG_MIPS32_COMPAT=y
++CONFIG_COMPAT=y
++CONFIG_SYSVIPC_COMPAT=y
++CONFIG_MIPS32_O32=y
++CONFIG_MIPS32_N32=y
++CONFIG_BINFMT_ELF32=y
++
++#
++# Power management options
++#
++CONFIG_ARCH_HIBERNATION_POSSIBLE=y
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_PM=y
++# CONFIG_PM_DEBUG is not set
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++CONFIG_HIBERNATION=y
++CONFIG_PM_STD_PARTITION="/dev/hda3"
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=y
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_LS2F_CPU_FREQ=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++CONFIG_XFRM_USER=m
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++CONFIG_NET_KEY=y
++# CONFIG_NET_KEY_MIGRATE is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_MULTIPATH=y
++CONFIG_IP_ROUTE_VERBOSE=y
++# CONFIG_IP_PNP is not set
++CONFIG_NET_IPIP=m
++# CONFIG_NET_IPGRE is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++CONFIG_INET_LRO=y
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IP_VS is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETLABEL is not set
++CONFIG_NETWORK_SECMARK=y
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++CONFIG_NETFILTER_ADVANCED=y
++CONFIG_BRIDGE_NETFILTER=y
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++# CONFIG_NF_CONNTRACK is not set
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
++# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
++CONFIG_NETFILTER_XT_TARGET_SECMARK=m
++# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
++# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
++# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_IP_NF_QUEUE=m
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_RECENT=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_RAW=m
++# CONFIG_IP_NF_SECURITY is not set
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++CONFIG_STP=m
++CONFIG_BRIDGE=m
++CONFIG_VLAN_8021Q=m
++# CONFIG_VLAN_8021Q_GVRP is not set
++# CONFIG_DECNET is not set
++CONFIG_LLC=m
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++CONFIG_NET_CLS_ROUTE=y
++
++#
++# Network testing
++#
++CONFIG_NET_PKTGEN=m
++# CONFIG_HAMRADIO is not set
++# CONFIG_CAN is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++CONFIG_AF_RXRPC=y
++# CONFIG_AF_RXRPC_DEBUG is not set
++# CONFIG_RXKAD is not set
++CONFIG_FIB_RULES=y
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++CONFIG_WIRELESS_EXT=y
++CONFIG_WIRELESS_EXT_SYSFS=y
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++CONFIG_MTD=m
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++# CONFIG_MTD_CHAR is not set
++CONFIG_MTD_BLKDEVS=m
++CONFIG_MTD_BLOCK=m
++CONFIG_MTD_BLOCK_RO=m
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=m
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=m
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=m
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=m
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PHYSMAP is not set
++# CONFIG_MTD_INTEL_VR_NOR is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_PMC551 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_PNP is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_CPQ_DA is not set
++# CONFIG_BLK_CPQ_CISS_DA is not set
++# CONFIG_BLK_DEV_DAC960 is not set
++# CONFIG_BLK_DEV_UMEM is not set
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_SX8 is not set
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=8192
++# CONFIG_BLK_DEV_XIP is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_BLK_DEV_HD is not set
++# CONFIG_MISC_DEVICES is not set
++CONFIG_HAVE_IDE=y
++CONFIG_IDE=y
++CONFIG_BLK_DEV_IDE=y
++
++#
++# Please see Documentation/ide/ide.txt for help/info on IDE drives
++#
++CONFIG_IDE_TIMINGS=y
++# CONFIG_BLK_DEV_IDE_SATA is not set
++CONFIG_BLK_DEV_IDEDISK=y
++CONFIG_IDEDISK_MULTI_MODE=y
++CONFIG_BLK_DEV_IDECD=m
++CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
++# CONFIG_BLK_DEV_IDETAPE is not set
++# CONFIG_BLK_DEV_IDEFLOPPY is not set
++# CONFIG_BLK_DEV_IDESCSI is not set
++CONFIG_IDE_TASK_IOCTL=y
++CONFIG_IDE_PROC_FS=y
++
++#
++# IDE chipset support/bugfixes
++#
++# CONFIG_IDE_GENERIC is not set
++# CONFIG_BLK_DEV_PLATFORM is not set
++CONFIG_BLK_DEV_IDEDMA_SFF=y
++
++#
++# PCI IDE chipsets support
++#
++CONFIG_BLK_DEV_IDEPCI=y
++CONFIG_IDEPCI_PCIBUS_ORDER=y
++# CONFIG_BLK_DEV_OFFBOARD is not set
++CONFIG_BLK_DEV_GENERIC=y
++# CONFIG_BLK_DEV_OPTI621 is not set
++CONFIG_BLK_DEV_IDEDMA_PCI=y
++# CONFIG_BLK_DEV_AEC62XX is not set
++# CONFIG_BLK_DEV_ALI15X3 is not set
++CONFIG_BLK_DEV_AMD74XX=y
++# CONFIG_BLK_DEV_CMD64X is not set
++# CONFIG_BLK_DEV_TRIFLEX is not set
++# CONFIG_BLK_DEV_CS5520 is not set
++# CONFIG_BLK_DEV_CS5530 is not set
++# CONFIG_BLK_DEV_HPT366 is not set
++# CONFIG_BLK_DEV_JMICRON is not set
++# CONFIG_BLK_DEV_SC1200 is not set
++# CONFIG_BLK_DEV_PIIX is not set
++# CONFIG_BLK_DEV_IT8213 is not set
++# CONFIG_BLK_DEV_IT821X is not set
++# CONFIG_BLK_DEV_NS87415 is not set
++# CONFIG_BLK_DEV_PDC202XX_OLD is not set
++# CONFIG_BLK_DEV_PDC202XX_NEW is not set
++# CONFIG_BLK_DEV_SVWKS is not set
++# CONFIG_BLK_DEV_SIIMAGE is not set
++# CONFIG_BLK_DEV_SLC90E66 is not set
++# CONFIG_BLK_DEV_TRM290 is not set
++# CONFIG_BLK_DEV_VIA82CXXX is not set
++# CONFIG_BLK_DEV_TC86C001 is not set
++
++#
++# Other IDE chipsets support
++#
++
++#
++# Note: most of these also require special kernel boot parameters
++#
++# CONFIG_BLK_DEV_4DRIVES is not set
++# CONFIG_BLK_DEV_ALI14XX is not set
++# CONFIG_BLK_DEV_DTC2278 is not set
++# CONFIG_BLK_DEV_HT6560B is not set
++# CONFIG_BLK_DEV_QD65XX is not set
++# CONFIG_BLK_DEV_UMC8672 is not set
++CONFIG_BLK_DEV_IDEDMA=y
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++CONFIG_SCSI_NETLINK=y
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++CONFIG_BLK_DEV_SR_VENDOR=y
++CONFIG_CHR_DEV_SG=m
++CONFIG_CHR_DEV_SCH=m
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++CONFIG_SCSI_SPI_ATTRS=m
++CONFIG_SCSI_FC_ATTRS=m
++CONFIG_SCSI_ISCSI_ATTRS=m
++# CONFIG_SCSI_SAS_LIBSAS is not set
++CONFIG_SCSI_SRP_ATTRS=m
++# CONFIG_SCSI_LOWLEVEL is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# Enable only one of the two stacks, unless you know what you are doing
++#
++# CONFIG_FIREWIRE is not set
++CONFIG_IEEE1394=m
++CONFIG_IEEE1394_OHCI1394=m
++
++#
++# PCILynx controller requires I2C
++#
++CONFIG_IEEE1394_SBP2=m
++# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
++CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y
++CONFIG_IEEE1394_ETH1394=m
++CONFIG_IEEE1394_RAWIO=m
++CONFIG_IEEE1394_VIDEO1394=m
++CONFIG_IEEE1394_DV1394=m
++# CONFIG_IEEE1394_VERBOSEDEBUG is not set
++CONFIG_I2O=m
++CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
++CONFIG_I2O_EXT_ADAPTEC=y
++CONFIG_I2O_EXT_ADAPTEC_DMA64=y
++# CONFIG_I2O_CONFIG is not set
++# CONFIG_I2O_BUS is not set
++# CONFIG_I2O_BLOCK is not set
++# CONFIG_I2O_SCSI is not set
++# CONFIG_I2O_PROC is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++CONFIG_VETH=m
++# CONFIG_ARCNET is not set
++CONFIG_PHYLIB=m
++
++#
++# MII PHY device drivers
++#
++CONFIG_MARVELL_PHY=m
++CONFIG_DAVICOM_PHY=m
++CONFIG_QSEMI_PHY=m
++CONFIG_LXT_PHY=m
++CONFIG_CICADA_PHY=m
++CONFIG_VITESSE_PHY=m
++CONFIG_SMSC_PHY=m
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_REALTEK_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_HAPPYMEAL is not set
++# CONFIG_SUNGEM is not set
++# CONFIG_CASSINI is not set
++# CONFIG_NET_VENDOR_3COM is not set
++# CONFIG_NET_VENDOR_SMC is not set
++# CONFIG_DM9000 is not set
++# CONFIG_NET_VENDOR_RACAL is not set
++# CONFIG_NET_TULIP is not set
++# CONFIG_AT1700 is not set
++# CONFIG_DEPCA is not set
++# CONFIG_HP100 is not set
++# CONFIG_NET_ISA is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++CONFIG_NET_PCI=y
++# CONFIG_PCNET32 is not set
++# CONFIG_AMD8111_ETH is not set
++# CONFIG_ADAPTEC_STARFIRE is not set
++# CONFIG_AC3200 is not set
++# CONFIG_APRICOT is not set
++# CONFIG_B44 is not set
++# CONFIG_FORCEDETH is not set
++# CONFIG_CS89x0 is not set
++# CONFIG_TC35815 is not set
++# CONFIG_EEPRO100 is not set
++# CONFIG_E100 is not set
++# CONFIG_FEALNX is not set
++# CONFIG_NATSEMI is not set
++# CONFIG_NE2K_PCI is not set
++# CONFIG_8139CP is not set
++CONFIG_8139TOO=y
++# CONFIG_8139TOO_PIO is not set
++# CONFIG_8139TOO_TUNE_TWISTER is not set
++# CONFIG_8139TOO_8129 is not set
++# CONFIG_8139_OLD_RX_RESET is not set
++# CONFIG_R6040 is not set
++# CONFIG_SIS900 is not set
++# CONFIG_EPIC100 is not set
++# CONFIG_SUNDANCE is not set
++# CONFIG_TLAN is not set
++# CONFIG_VIA_RHINE is not set
++# CONFIG_SC92031 is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++# CONFIG_TR is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_IWLWIFI_LEDS is not set
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_WAN is not set
++# CONFIG_FDDI is not set
++# CONFIG_HIPPI is not set
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++CONFIG_PPPOE=m
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_NET_FC is not set
++CONFIG_NETCONSOLE=m
++# CONFIG_NETCONSOLE_DYNAMIC is not set
++CONFIG_NETPOLL=y
++# CONFIG_NETPOLL_TRAP is not set
++CONFIG_NET_POLL_CONTROLLER=y
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++CONFIG_INPUT_JOYDEV=m
++CONFIG_INPUT_EVDEV=m
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++CONFIG_KEYBOARD_ATKBD=y
++CONFIG_KEYBOARD_SUNKBD=m
++CONFIG_KEYBOARD_LKKBD=m
++CONFIG_KEYBOARD_XTKBD=m
++CONFIG_KEYBOARD_NEWTON=m
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_INPUT_MOUSE=y
++CONFIG_MOUSE_PS2=y
++CONFIG_MOUSE_PS2_ALPS=y
++CONFIG_MOUSE_PS2_LOGIPS2PP=y
++CONFIG_MOUSE_PS2_SYNAPTICS=y
++CONFIG_MOUSE_PS2_LIFEBOOK=y
++CONFIG_MOUSE_PS2_TRACKPOINT=y
++# CONFIG_MOUSE_PS2_TOUCHKIT is not set
++CONFIG_MOUSE_SERIAL=m
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_BCM5974 is not set
++CONFIG_MOUSE_INPORT=m
++# CONFIG_MOUSE_ATIXL is not set
++CONFIG_MOUSE_LOGIBM=m
++CONFIG_MOUSE_PC110PAD=m
++CONFIG_MOUSE_VSXXXAA=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_PCSPKR=m
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++CONFIG_INPUT_UINPUT=m
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++CONFIG_SERIO_I8042=y
++CONFIG_SERIO_SERPORT=m
++CONFIG_SERIO_PCIPS2=m
++CONFIG_SERIO_LIBPS2=y
++CONFIG_SERIO_RAW=m
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_DEVKMEM=y
++CONFIG_SERIAL_NONSTANDARD=y
++# CONFIG_COMPUTONE is not set
++CONFIG_ROCKETPORT=m
++CONFIG_CYCLADES=m
++# CONFIG_CYZ_INTR is not set
++# CONFIG_DIGIEPCA is not set
++# CONFIG_MOXA_INTELLIO is not set
++CONFIG_MOXA_SMARTIO=m
++# CONFIG_ISI is not set
++CONFIG_SYNCLINKMP=m
++CONFIG_SYNCLINK_GT=m
++CONFIG_N_HDLC=m
++# CONFIG_RISCOM8 is not set
++# CONFIG_SPECIALIX is not set
++CONFIG_SX=m
++# CONFIG_RIO is not set
++CONFIG_STALDRV=y
++# CONFIG_STALLION is not set
++# CONFIG_ISTALLION is not set
++# CONFIG_NOZOMI is not set
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++CONFIG_SERIAL_8250_CONSOLE=y
++CONFIG_SERIAL_8250_PCI=y
++CONFIG_SERIAL_8250_NR_UARTS=16
++CONFIG_SERIAL_8250_RUNTIME_UARTS=4
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_MANY_PORTS=y
++CONFIG_SERIAL_8250_FOURPORT=m
++CONFIG_SERIAL_8250_ACCENT=m
++CONFIG_SERIAL_8250_BOCA=m
++# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
++CONFIG_SERIAL_8250_HUB6=m
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++# CONFIG_SERIAL_8250_DETECT_IRQ is not set
++CONFIG_SERIAL_8250_RSA=y
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_SERIAL_JSM=m
++CONFIG_UNIX98_PTYS=y
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=16
++CONFIG_IPMI_HANDLER=m
++# CONFIG_IPMI_PANIC_EVENT is not set
++CONFIG_IPMI_DEVICE_INTERFACE=m
++CONFIG_IPMI_SI=m
++CONFIG_IPMI_WATCHDOG=m
++CONFIG_IPMI_POWEROFF=m
++CONFIG_HW_RANDOM=y
++CONFIG_RTC=y
++CONFIG_DTLK=m
++CONFIG_R3964=m
++CONFIG_APPLICOM=m
++CONFIG_RAW_DRIVER=m
++CONFIG_MAX_RAW_DEVS=256
++# CONFIG_TCG_TPM is not set
++CONFIG_DEVPORT=y
++# CONFIG_I2C is not set
++# CONFIG_SPI is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_THERMAL_HWMON is not set
++# CONFIG_WATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++CONFIG_SSB=m
++CONFIG_SSB_SPROM=y
++CONFIG_SSB_PCIHOST_POSSIBLE=y
++CONFIG_SSB_PCIHOST=y
++# CONFIG_SSB_B43_PCI_BRIDGE is not set
++# CONFIG_SSB_SILENT is not set
++# CONFIG_SSB_DEBUG is not set
++CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
++CONFIG_SSB_DRIVER_PCICORE=y
++# CONFIG_SSB_DRIVER_MIPS is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_MFD_TMIO is not set
++
++#
++# Multimedia devices
++#
++
++#
++# Multimedia core support
++#
++CONFIG_VIDEO_DEV=y
++CONFIG_VIDEO_V4L2_COMMON=y
++CONFIG_VIDEO_ALLOW_V4L1=y
++CONFIG_VIDEO_V4L1_COMPAT=y
++# CONFIG_DVB_CORE is not set
++CONFIG_VIDEO_MEDIA=y
++
++#
++# Multimedia drivers
++#
++# CONFIG_MEDIA_ATTACH is not set
++CONFIG_VIDEO_V4L2=y
++CONFIG_VIDEO_V4L1=y
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
++# CONFIG_VIDEO_VIVI is not set
++# CONFIG_VIDEO_PMS is not set
++# CONFIG_VIDEO_CPIA is not set
++# CONFIG_VIDEO_CPIA2 is not set
++# CONFIG_VIDEO_STRADIS is not set
++CONFIG_V4L_USB_DRIVERS=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
++# CONFIG_USB_GSPCA is not set
++# CONFIG_USB_VICAM is not set
++# CONFIG_USB_IBMCAM is not set
++# CONFIG_USB_KONICAWC is not set
++# CONFIG_USB_QUICKCAM_MESSENGER is not set
++# CONFIG_USB_ET61X251 is not set
++# CONFIG_USB_OV511 is not set
++# CONFIG_USB_SE401 is not set
++# CONFIG_USB_SN9C102 is not set
++# CONFIG_USB_STV680 is not set
++# CONFIG_USB_ZC0301 is not set
++# CONFIG_USB_PWC is not set
++# CONFIG_USB_ZR364XX is not set
++# CONFIG_USB_STKWEBCAM is not set
++# CONFIG_USB_S2255 is not set
++# CONFIG_SOC_CAMERA is not set
++# CONFIG_VIDEO_SH_MOBILE_CEU is not set
++# CONFIG_RADIO_ADAPTERS is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++CONFIG_DRM=m
++# CONFIG_DRM_TDFX is not set
++# CONFIG_DRM_R128 is not set
++# CONFIG_DRM_RADEON is not set
++# CONFIG_DRM_MGA is not set
++# CONFIG_DRM_VIA is not set
++# CONFIG_DRM_SAVAGE is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++CONFIG_FIRMWARE_EDID=y
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++CONFIG_FB_MODE_HELPERS=y
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_CIRRUS is not set
++# CONFIG_FB_PM2 is not set
++# CONFIG_FB_CYBER2000 is not set
++# CONFIG_FB_ASILIANT is not set
++# CONFIG_FB_IMSTT is not set
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_NVIDIA is not set
++# CONFIG_FB_RIVA is not set
++# CONFIG_FB_MATROX is not set
++# CONFIG_FB_RADEON is not set
++# CONFIG_FB_ATY128 is not set
++# CONFIG_FB_ATY is not set
++# CONFIG_FB_S3 is not set
++# CONFIG_FB_SAVAGE is not set
++# CONFIG_FB_SIS is not set
++# CONFIG_FB_NEOMAGIC is not set
++# CONFIG_FB_KYRO is not set
++# CONFIG_FB_3DFX is not set
++# CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_VT8623 is not set
++# CONFIG_FB_TRIDENT is not set
++# CONFIG_FB_ARK is not set
++# CONFIG_FB_PM3 is not set
++# CONFIG_FB_CARMINE is not set
++CONFIG_FB_SILICONMOTION=y
++CONFIG_FB_SM7XX=y
++CONFIG_FB_SM7XX_ACCEL=y
++# CONFIG_FB_SM7XX_DUALHEAD is not set
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++# CONFIG_LCD_CLASS_DEVICE is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_BACKLIGHT_CORGI is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++# CONFIG_MDA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
++# CONFIG_FONTS is not set
++CONFIG_FONT_8x8=y
++CONFIG_FONT_8x16=y
++# CONFIG_LOGO is not set
++CONFIG_FB_SPLASH=y
++CONFIG_SOUND=m
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++CONFIG_SND_RAWMIDI=m
++CONFIG_SND_SEQUENCER=m
++CONFIG_SND_SEQ_DUMMY=m
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++CONFIG_SND_SEQUENCER_OSS=y
++# CONFIG_SND_RTCTIMER is not set
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++CONFIG_SND_VMASTER=y
++CONFIG_SND_MPU401_UART=m
++CONFIG_SND_AC97_CODEC=m
++CONFIG_SND_DRIVERS=y
++CONFIG_SND_DUMMY=m
++CONFIG_SND_VIRMIDI=m
++CONFIG_SND_MTPAV=m
++CONFIG_SND_SERIAL_U16550=m
++CONFIG_SND_MPU401=m
++# CONFIG_SND_AC97_POWER_SAVE is not set
++CONFIG_SND_PCI=y
++# CONFIG_SND_AD1889 is not set
++# CONFIG_SND_ALS300 is not set
++# CONFIG_SND_ALI5451 is not set
++# CONFIG_SND_ATIIXP is not set
++# CONFIG_SND_ATIIXP_MODEM is not set
++# CONFIG_SND_AU8810 is not set
++# CONFIG_SND_AU8820 is not set
++# CONFIG_SND_AU8830 is not set
++# CONFIG_SND_AW2 is not set
++# CONFIG_SND_AZT3328 is not set
++# CONFIG_SND_BT87X is not set
++# CONFIG_SND_CA0106 is not set
++# CONFIG_SND_CMIPCI is not set
++# CONFIG_SND_OXYGEN is not set
++# CONFIG_SND_CS4281 is not set
++# CONFIG_SND_CS46XX is not set
++CONFIG_SND_CS5535AUDIO=m
++# CONFIG_SND_DARLA20 is not set
++# CONFIG_SND_GINA20 is not set
++# CONFIG_SND_LAYLA20 is not set
++# CONFIG_SND_DARLA24 is not set
++# CONFIG_SND_GINA24 is not set
++# CONFIG_SND_LAYLA24 is not set
++# CONFIG_SND_MONA is not set
++# CONFIG_SND_MIA is not set
++# CONFIG_SND_ECHO3G is not set
++# CONFIG_SND_INDIGO is not set
++# CONFIG_SND_INDIGOIO is not set
++# CONFIG_SND_INDIGODJ is not set
++# CONFIG_SND_EMU10K1 is not set
++# CONFIG_SND_EMU10K1X is not set
++# CONFIG_SND_ENS1370 is not set
++# CONFIG_SND_ENS1371 is not set
++# CONFIG_SND_ES1938 is not set
++# CONFIG_SND_ES1968 is not set
++# CONFIG_SND_FM801 is not set
++# CONFIG_SND_HDA_INTEL is not set
++# CONFIG_SND_HDSP is not set
++# CONFIG_SND_HDSPM is not set
++# CONFIG_SND_HIFIER is not set
++# CONFIG_SND_ICE1712 is not set
++# CONFIG_SND_ICE1724 is not set
++# CONFIG_SND_INTEL8X0 is not set
++# CONFIG_SND_INTEL8X0M is not set
++# CONFIG_SND_KORG1212 is not set
++# CONFIG_SND_MAESTRO3 is not set
++# CONFIG_SND_MIXART is not set
++# CONFIG_SND_NM256 is not set
++# CONFIG_SND_PCXHR is not set
++# CONFIG_SND_RIPTIDE is not set
++# CONFIG_SND_RME32 is not set
++# CONFIG_SND_RME96 is not set
++# CONFIG_SND_RME9652 is not set
++# CONFIG_SND_SONICVIBES is not set
++# CONFIG_SND_TRIDENT is not set
++CONFIG_SND_VIA82XX=m
++# CONFIG_SND_VIA82XX_MODEM is not set
++# CONFIG_SND_VIRTUOSO is not set
++# CONFIG_SND_VX222 is not set
++# CONFIG_SND_YMFPCI is not set
++# CONFIG_SND_MIPS is not set
++# CONFIG_SND_USB is not set
++# CONFIG_SND_SOC is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=m
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=m
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++CONFIG_USB_HIDDEV=y
++
++#
++# USB HID Boot Protocol drivers
++#
++# CONFIG_USB_KBD is not set
++# CONFIG_USB_MOUSE is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++# CONFIG_USB_SUSPEND is not set
++# CONFIG_USB_OTG is not set
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++# CONFIG_USB_MON is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++CONFIG_USB_EHCI_HCD=y
++# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
++# CONFIG_USB_EHCI_TT_NEWSCHED is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++CONFIG_USB_OHCI_HCD=m
++# CONFIG_USB_OHCI_HCD_SSB is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++CONFIG_USB_UHCI_HCD=m
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++CONFIG_USB_PRINTER=m
++# CONFIG_USB_WDM is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++CONFIG_USB_STORAGE_ISD200=y
++CONFIG_USB_STORAGE_DPCM=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++CONFIG_USB_LIBUSUAL=y
++
++#
++# USB Imaging devices
++#
++CONFIG_USB_MDC800=m
++CONFIG_USB_MICROTEK=m
++
++#
++# USB port drivers
++#
++CONFIG_USB_SERIAL=m
++CONFIG_USB_EZUSB=y
++CONFIG_USB_SERIAL_GENERIC=y
++# CONFIG_USB_SERIAL_AIRCABLE is not set
++# CONFIG_USB_SERIAL_ARK3116 is not set
++# CONFIG_USB_SERIAL_BELKIN is not set
++# CONFIG_USB_SERIAL_CH341 is not set
++# CONFIG_USB_SERIAL_WHITEHEAT is not set
++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
++# CONFIG_USB_SERIAL_CP2101 is not set
++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
++# CONFIG_USB_SERIAL_EMPEG is not set
++# CONFIG_USB_SERIAL_FTDI_SIO is not set
++# CONFIG_USB_SERIAL_FUNSOFT is not set
++# CONFIG_USB_SERIAL_VISOR is not set
++# CONFIG_USB_SERIAL_IPAQ is not set
++# CONFIG_USB_SERIAL_IR is not set
++# CONFIG_USB_SERIAL_EDGEPORT is not set
++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
++# CONFIG_USB_SERIAL_GARMIN is not set
++# CONFIG_USB_SERIAL_IPW is not set
++# CONFIG_USB_SERIAL_IUU is not set
++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
++# CONFIG_USB_SERIAL_KEYSPAN is not set
++# CONFIG_USB_SERIAL_KLSI is not set
++# CONFIG_USB_SERIAL_KOBIL_SCT is not set
++# CONFIG_USB_SERIAL_MCT_U232 is not set
++# CONFIG_USB_SERIAL_MOS7720 is not set
++# CONFIG_USB_SERIAL_MOS7840 is not set
++# CONFIG_USB_SERIAL_MOTOROLA is not set
++# CONFIG_USB_SERIAL_NAVMAN is not set
++# CONFIG_USB_SERIAL_PL2303 is not set
++# CONFIG_USB_SERIAL_OTI6858 is not set
++# CONFIG_USB_SERIAL_SPCP8X5 is not set
++# CONFIG_USB_SERIAL_HP4X is not set
++# CONFIG_USB_SERIAL_SAFE is not set
++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
++# CONFIG_USB_SERIAL_TI is not set
++# CONFIG_USB_SERIAL_CYBERJACK is not set
++# CONFIG_USB_SERIAL_XIRCOM is not set
++# CONFIG_USB_SERIAL_OPTION is not set
++# CONFIG_USB_SERIAL_OMNINET is not set
++# CONFIG_USB_SERIAL_DEBUG is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_SISUSBVGA is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++CONFIG_USB_TEST=m
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_GADGET is not set
++# CONFIG_MMC is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_NEW_LEDS is not set
++# CONFIG_ACCESSIBILITY is not set
++# CONFIG_INFINIBAND is not set
++# CONFIG_RTC_CLASS is not set
++# CONFIG_DMADEVICES is not set
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS_XATTR=y
++CONFIG_EXT2_FS_POSIX_ACL=y
++CONFIG_EXT2_FS_SECURITY=y
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS_XATTR=y
++CONFIG_EXT3_FS_POSIX_ACL=y
++CONFIG_EXT3_FS_SECURITY=y
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++CONFIG_FS_MBCACHE=y
++CONFIG_REISERFS_FS=m
++# CONFIG_REISERFS_CHECK is not set
++# CONFIG_REISERFS_PROC_INFO is not set
++CONFIG_REISERFS_FS_XATTR=y
++CONFIG_REISERFS_FS_POSIX_ACL=y
++CONFIG_REISERFS_FS_SECURITY=y
++CONFIG_JFS_FS=m
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++# CONFIG_JFS_DEBUG is not set
++# CONFIG_JFS_STATISTICS is not set
++CONFIG_FS_POSIX_ACL=y
++CONFIG_XFS_FS=m
++CONFIG_XFS_QUOTA=y
++CONFIG_XFS_POSIX_ACL=y
++CONFIG_XFS_RT=y
++# CONFIG_XFS_DEBUG is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++CONFIG_QUOTA=y
++# CONFIG_QUOTA_NETLINK_INTERFACE is not set
++CONFIG_PRINT_QUOTA_WARNING=y
++CONFIG_QFMT_V1=m
++CONFIG_QFMT_V2=m
++CONFIG_QUOTACTL=y
++CONFIG_AUTOFS_FS=m
++CONFIG_AUTOFS4_FS=m
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++CONFIG_UDF_FS=m
++CONFIG_UDF_NLS=y
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
++CONFIG_NTFS_FS=m
++# CONFIG_NTFS_DEBUG is not set
++CONFIG_NTFS_RW=y
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++CONFIG_ADFS_FS=m
++# CONFIG_ADFS_FS_RW is not set
++CONFIG_AFFS_FS=m
++# CONFIG_ECRYPT_FS is not set
++CONFIG_HFS_FS=m
++CONFIG_HFSPLUS_FS=m
++CONFIG_BEFS_FS=m
++# CONFIG_BEFS_DEBUG is not set
++CONFIG_BFS_FS=m
++CONFIG_EFS_FS=m
++# CONFIG_JFFS2_FS is not set
++CONFIG_CRAMFS=y
++CONFIG_VXFS_FS=m
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++CONFIG_ROMFS_FS=m
++CONFIG_SYSV_FS=m
++CONFIG_UFS_FS=m
++# CONFIG_UFS_FS_WRITE is not set
++# CONFIG_UFS_DEBUG is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=m
++CONFIG_NFS_V3=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_NFSD=m
++CONFIG_NFSD_V2_ACL=y
++CONFIG_NFSD_V3=y
++CONFIG_NFSD_V3_ACL=y
++CONFIG_NFSD_V4=y
++CONFIG_LOCKD=m
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_ACL_SUPPORT=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=m
++CONFIG_SUNRPC_GSS=m
++CONFIG_RPCSEC_GSS_KRB5=m
++CONFIG_RPCSEC_GSS_SPKM3=m
++CONFIG_SMB_FS=m
++# CONFIG_SMB_NLS_DEFAULT is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++# CONFIG_CIFS_UPCALL is not set
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
++CONFIG_NCP_FS=m
++CONFIG_NCPFS_PACKET_SIGNING=y
++CONFIG_NCPFS_IOCTL_LOCKING=y
++CONFIG_NCPFS_STRONG=y
++CONFIG_NCPFS_NFS_NS=y
++CONFIG_NCPFS_OS2_NS=y
++# CONFIG_NCPFS_SMALLDOS is not set
++CONFIG_NCPFS_NLS=y
++CONFIG_NCPFS_EXTRAS=y
++CONFIG_CODA_FS=m
++CONFIG_AFS_FS=m
++# CONFIG_AFS_DEBUG is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++CONFIG_ACORN_PARTITION=y
++# CONFIG_ACORN_PARTITION_CUMANA is not set
++# CONFIG_ACORN_PARTITION_EESOX is not set
++CONFIG_ACORN_PARTITION_ICS=y
++# CONFIG_ACORN_PARTITION_ADFS is not set
++# CONFIG_ACORN_PARTITION_POWERTEC is not set
++CONFIG_ACORN_PARTITION_RISCIX=y
++CONFIG_OSF_PARTITION=y
++CONFIG_AMIGA_PARTITION=y
++CONFIG_ATARI_PARTITION=y
++CONFIG_MAC_PARTITION=y
++CONFIG_MSDOS_PARTITION=y
++CONFIG_BSD_DISKLABEL=y
++CONFIG_MINIX_SUBPARTITION=y
++CONFIG_SOLARIS_X86_PARTITION=y
++CONFIG_UNIXWARE_DISKLABEL=y
++CONFIG_LDM_PARTITION=y
++# CONFIG_LDM_DEBUG is not set
++CONFIG_SGI_PARTITION=y
++CONFIG_ULTRIX_PARTITION=y
++CONFIG_SUN_PARTITION=y
++CONFIG_KARMA_PARTITION=y
++CONFIG_EFI_PARTITION=y
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="utf8"
++CONFIG_NLS_CODEPAGE_437=m
++CONFIG_NLS_CODEPAGE_737=m
++CONFIG_NLS_CODEPAGE_775=m
++CONFIG_NLS_CODEPAGE_850=m
++CONFIG_NLS_CODEPAGE_852=m
++CONFIG_NLS_CODEPAGE_855=m
++CONFIG_NLS_CODEPAGE_857=m
++CONFIG_NLS_CODEPAGE_860=m
++CONFIG_NLS_CODEPAGE_861=m
++CONFIG_NLS_CODEPAGE_862=m
++CONFIG_NLS_CODEPAGE_863=m
++CONFIG_NLS_CODEPAGE_864=m
++CONFIG_NLS_CODEPAGE_865=m
++CONFIG_NLS_CODEPAGE_866=m
++CONFIG_NLS_CODEPAGE_869=m
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++# CONFIG_NLS_CODEPAGE_932 is not set
++CONFIG_NLS_CODEPAGE_949=m
++CONFIG_NLS_CODEPAGE_874=m
++CONFIG_NLS_ISO8859_8=m
++CONFIG_NLS_CODEPAGE_1250=m
++CONFIG_NLS_CODEPAGE_1251=m
++CONFIG_NLS_ASCII=m
++CONFIG_NLS_ISO8859_1=m
++CONFIG_NLS_ISO8859_2=m
++CONFIG_NLS_ISO8859_3=m
++CONFIG_NLS_ISO8859_4=m
++CONFIG_NLS_ISO8859_5=m
++CONFIG_NLS_ISO8859_6=m
++CONFIG_NLS_ISO8859_7=m
++CONFIG_NLS_ISO8859_9=m
++CONFIG_NLS_ISO8859_13=m
++CONFIG_NLS_ISO8859_14=m
++CONFIG_NLS_ISO8859_15=m
++CONFIG_NLS_KOI8_R=m
++CONFIG_NLS_KOI8_U=m
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++CONFIG_MAGIC_SYSRQ=y
++CONFIG_UNUSED_SYMBOLS=y
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_MEMORY_INIT is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++CONFIG_CMDLINE=""
++
++#
++# Security options
++#
++CONFIG_KEYS=y
++# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
++CONFIG_SECURITY=y
++CONFIG_SECURITY_NETWORK=y
++CONFIG_SECURITY_NETWORK_XFRM=y
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_SECURITY_ROOTPLUG is not set
++CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
++CONFIG_SECURITY_SELINUX=y
++CONFIG_SECURITY_SELINUX_BOOTPARAM=y
++CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
++CONFIG_SECURITY_SELINUX_DISABLE=y
++CONFIG_SECURITY_SELINUX_DEVELOP=y
++CONFIG_SECURITY_SELINUX_AVC_STATS=y
++CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
++# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
++# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_AEAD=m
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_MANAGER=y
++# CONFIG_CRYPTO_GF128MUL is not set
++CONFIG_CRYPTO_NULL=m
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_AUTHENC=m
++CONFIG_CRYPTO_TEST=m
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=m
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=y
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++CONFIG_CRYPTO_HMAC=y
++# CONFIG_CRYPTO_XCBC is not set
++
++#
++# Digest
++#
++CONFIG_CRYPTO_CRC32C=m
++CONFIG_CRYPTO_MD4=m
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_MICHAEL_MIC=m
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++CONFIG_CRYPTO_SHA1=m
++CONFIG_CRYPTO_SHA256=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_WP512=m
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=y
++CONFIG_CRYPTO_ANUBIS=m
++CONFIG_CRYPTO_ARC4=y
++CONFIG_CRYPTO_BLOWFISH=m
++# CONFIG_CRYPTO_CAMELLIA is not set
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_CAST6=m
++CONFIG_CRYPTO_DES=m
++# CONFIG_CRYPTO_FCRYPT is not set
++CONFIG_CRYPTO_KHAZAD=m
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_SERPENT=m
++CONFIG_CRYPTO_TEA=m
++CONFIG_CRYPTO_TWOFISH=m
++CONFIG_CRYPTO_TWOFISH_COMMON=m
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=m
++# CONFIG_CRYPTO_LZO is not set
++CONFIG_CRYPTO_HW=y
++# CONFIG_CRYPTO_DEV_HIFN_795X is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_GENERIC_FIND_FIRST_BIT is not set
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=m
++# CONFIG_CRC_T10DIF is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=m
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=m
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/mips/kernel/8250-platform.c b/arch/mips/kernel/8250-platform.c
+index cbf3fe2..6bf8ab3 100644
+--- a/arch/mips/kernel/8250-platform.c
++++ b/arch/mips/kernel/8250-platform.c
+@@ -9,6 +9,12 @@
+ #include <linux/init.h>
+ #include <linux/serial_8250.h>
+ 
++#ifdef CONFIG_64BIT
++#define	UART_BASE  (void*)0xffffffffbff003f8
++#else
++#define	UART_BASE  (void*)0xbff003f8
++#endif	
++
+ #define PORT(base, int)							\
+ {									\
+ 	.iobase		= base,						\
+@@ -20,10 +26,24 @@
+ }
+ 
+ static struct plat_serial8250_port uart8250_data[] = {
++#ifdef CONFIG_MACH_LM2F
++#if defined(CONFIG_LEMOTE_NAS) || defined(CONFIG_LEMOTE_2FNOTEBOOK)
++	{ .membase = UART_BASE,
++	  .irq = 19,
++	  .uartclk = 3686400,
++	  .iotype = UPIO_MEM,
++	  .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++	  .regshift = 0,
++	},
++#else
++	PORT(0x2F8, 3),
++#endif
++#else
+ 	PORT(0x3F8, 4),
+ 	PORT(0x2F8, 3),
+ 	PORT(0x3E8, 4),
+ 	PORT(0x2E8, 3),
++#endif
+ 	{ },
+ };
+ 
+diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
+index 25775cb..5724087 100644
+--- a/arch/mips/kernel/Makefile
++++ b/arch/mips/kernel/Makefile
+@@ -6,7 +6,7 @@ extra-y		:= head.o init_task.o vmlinux.lds
+ 
+ obj-y		+= cpu-probe.o branch.o entry.o genex.o irq.o process.o \
+ 		   ptrace.o reset.o setup.o signal.o syscall.o \
+-		   time.o topology.o traps.o unaligned.o
++		   time.o topology.o traps.o unaligned.o rtc.o
+ 
+ obj-$(CONFIG_CEVT_BCM1480)	+= cevt-bcm1480.o
+ obj-$(CONFIG_CEVT_R4K)		+= cevt-r4k.o
+@@ -71,6 +71,7 @@ obj-$(CONFIG_64BIT)		+= scall64-64.o
+ obj-$(CONFIG_MIPS32_COMPAT)	+= linux32.o ptrace32.o signal32.o
+ obj-$(CONFIG_MIPS32_N32)	+= binfmt_elfn32.o scall64-n32.o signal_n32.o
+ obj-$(CONFIG_MIPS32_O32)	+= binfmt_elfo32.o scall64-o32.o
++obj-$(CONFIG_LS2F_CPU_FREQ) += ls2f_freq.o
+ 
+ obj-$(CONFIG_KGDB)		+= kgdb.o
+ obj-$(CONFIG_PROC_FS)		+= proc.o
+diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
+index 7294222..b06921a 100644
+--- a/arch/mips/kernel/asm-offsets.c
++++ b/arch/mips/kernel/asm-offsets.c
+@@ -14,6 +14,7 @@
+ #include <linux/mm.h>
+ #include <linux/interrupt.h>
+ #include <linux/kbuild.h>
++#include <linux/suspend.h>
+ #include <asm/ptrace.h>
+ #include <asm/processor.h>
+ 
+@@ -295,3 +296,13 @@ void output_irq_cpustat_t_defines(void)
+ 	DEFINE(IC_IRQ_CPUSTAT_T, sizeof(irq_cpustat_t));
+ 	BLANK();
+ }
++
++void output_pbe_defines(void)
++{
++ 	COMMENT(" Linux struct pbe offsets. ");
++ 	OFFSET(PBE_ADDRESS , pbe, address);
++ 	OFFSET(PBE_ORIG_ADDRESS  , pbe, orig_address);
++ 	OFFSET(PBE_NEXT  , pbe, next);
++ 	DEFINE(PBE_SIZE  , sizeof(struct pbe));
++ 	BLANK();
++}
+diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c
+index 86e026f..74fb745 100644
+--- a/arch/mips/kernel/csrc-r4k.c
++++ b/arch/mips/kernel/csrc-r4k.c
+@@ -27,7 +27,7 @@ int __init init_mips_clocksource(void)
+ 	if (!cpu_has_counter || !mips_hpt_frequency)
+ 		return -ENXIO;
+ 
+-	/* Calclate a somewhat reasonable rating value */
++	/* Calculate a somewhat reasonable rating value */
+ 	clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
+ 
+ 	clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
+diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
+index 413bd1d..7f9e771 100644
+--- a/arch/mips/kernel/i8259.c
++++ b/arch/mips/kernel/i8259.c
+@@ -53,7 +53,7 @@ static struct irq_chip i8259A_chip = {
+ /*
+  * This contains the irq mask for both 8259A irq controllers,
+  */
+-static unsigned int cached_irq_mask = 0xffff;
++unsigned int cached_irq_mask = 0xffff;
+ 
+ #define cached_master_mask	(cached_irq_mask)
+ #define cached_slave_mask	(cached_irq_mask >> 8)
+@@ -175,11 +175,15 @@ handle_real_irq:
+ 	if (irq & 8) {
+ 		inb(PIC_SLAVE_IMR);	/* DUMMY - (do we need this?) */
+ 		outb(cached_slave_mask, PIC_SLAVE_IMR);
++		inb(PIC_SLAVE_IMR);	
+ 		outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
++		inb(PIC_SLAVE_CMD);
+ 		outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
++		inb(PIC_MASTER_CMD);
+ 	} else {
+ 		inb(PIC_MASTER_IMR);	/* DUMMY - (do we need this?) */
+ 		outb(cached_master_mask, PIC_MASTER_IMR);
++		inb(PIC_MASTER_IMR);
+ 		outb(0x60+irq, PIC_MASTER_CMD);	/* 'Specific EOI to master */
+ 	}
+ 	smtc_im_ack_irq(irq);
+@@ -203,8 +207,8 @@ spurious_8259A_irq:
+ 		 * At this point we can be sure the IRQ is spurious,
+ 		 * lets ACK and report it. [once per IRQ]
+ 		 */
+-		if (!(spurious_irq_mask & irqmask)) {
+-			printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq);
++		if (!(spurious_irq_mask & irqmask) || 1) {
++			printk("spurious 8259A interrupt: IRQ%d.\n", irq);
+ 			spurious_irq_mask |= irqmask;
+ 		}
+ 		atomic_inc(&irq_err_count);
+diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
+index 2fefb14..e07b1a1 100644
+--- a/arch/mips/kernel/linux32.c
++++ b/arch/mips/kernel/linux32.c
+@@ -555,3 +555,10 @@ _sys32_clone(nabi_no_regargs struct pt_regs regs)
+ 	return do_fork(clone_flags, newsp, &regs, 0,
+ 	               parent_tidptr, child_tidptr);
+ }
++
++asmlinkage long sys32_lookup_dcookie(u32 dcookie_a0, u32 dcookie_a1, char __user *buf,
++				     size_t len)
++{
++	return sys_lookup_dcookie(merge_64(dcookie_a0, dcookie_a1),
++				  buf, len);
++}
+diff --git a/arch/mips/kernel/ls2f_freq.c b/arch/mips/kernel/ls2f_freq.c
+new file mode 100644
+index 0000000..602eb46
+--- /dev/null
++++ b/arch/mips/kernel/ls2f_freq.c
+@@ -0,0 +1,216 @@
++/*
++ * arch/mips/kernel/cpufreq.c
++ *
++ * cpufreq driver for the loongson-2f processors.
++ *
++ * Copyright (C) 2006 - 2008 Yanhua
++ *
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ */
++#include <linux/types.h>
++#include <linux/cpufreq.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/err.h>
++#include <linux/cpumask.h>
++#include <linux/smp.h>
++#include <linux/sched.h>	/* set_cpus_allowed() */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <asm/delay.h>
++
++#include <asm/clock.h>
++
++static uint nowait = 0;
++
++static struct clk *cpuclk;
++extern unsigned long cpu_clock_freq;
++extern struct cpufreq_frequency_table ls2f_clockmod_table[];
++
++extern void (*cpu_wait)(void);
++extern void ls2f_cpu_wait(void);
++static void (*saved_cpu_wait)(void);
++
++static int
++ls2f_cpu_freq_notifier(struct notifier_block *nb, unsigned long val,
++	void *data);
++
++static struct notifier_block ls2f_cpufreq_notifier_block = {
++	.notifier_call = ls2f_cpu_freq_notifier
++};
++
++static int
++ls2f_cpu_freq_notifier(struct notifier_block *nb, unsigned long val, void *data)
++{
++	if (val == CPUFREQ_POSTCHANGE) {
++		__udelay_val = loops_per_jiffy;
++	}
++	return 0;
++}
++
++static unsigned int ls2f_cpufreq_get(unsigned int cpu)
++{
++	return clk_get_rate(cpuclk);
++}
++
++/*
++ * Here we notify other drivers of the proposed change and the final change.
++ */
++static int ls2f_cpufreq_target(struct cpufreq_policy *policy,
++			     unsigned int target_freq,
++			     unsigned int relation)
++{
++	unsigned int cpu = policy->cpu;
++	unsigned int newstate = 0;
++	cpumask_t cpus_allowed;
++	struct cpufreq_freqs freqs;
++	long freq;
++
++	if (!cpu_online(cpu))
++		return -ENODEV;
++
++	cpus_allowed = current->cpus_allowed;
++	set_cpus_allowed(current, cpumask_of_cpu(cpu));
++
++#ifdef CONFIG_SMP
++	BUG_ON(smp_processor_id() != cpu);
++#endif
++
++	if (cpufreq_frequency_table_target(policy, &ls2f_clockmod_table[0], target_freq, relation, &newstate))
++		return -EINVAL;
++
++	freq = cpu_clock_freq / 1000 * ls2f_clockmod_table[newstate].index / 8;
++	if (freq < policy->min || freq > policy->max )
++		return -EINVAL;
++
++	pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000);
++
++	freqs.cpu	= cpu;
++	freqs.old	= ls2f_cpufreq_get(cpu);
++	freqs.new	= freq;
++	freqs.flags	= 0;
++
++	if (freqs.new == freqs.old)
++		return 0;
++
++	/* notifiers */
++	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
++
++	set_cpus_allowed(current, cpus_allowed);
++
++	/* setting the cpu frequency */
++	clk_set_rate(cpuclk, freq);
++
++	/* notifiers */
++	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
++
++	pr_debug("cpufreq: set frequency %lu kHz\n", freq);
++
++	return 0;
++}
++
++static int ls2f_cpufreq_cpu_init(struct cpufreq_policy *policy)
++{
++	int i;
++	int result;
++
++	if (!cpu_online(policy->cpu))
++		return -ENODEV;
++
++	cpuclk = clk_get(NULL, "cpu_clk");
++	if (IS_ERR(cpuclk)) {
++		printk(KERN_ERR "cpufreq: couldn't get CPU clk\n");
++		return PTR_ERR(cpuclk);
++	}
++	
++	cpuclk->rate = cpu_clock_freq / 1000;
++	if(!cpuclk->rate)
++		return -EINVAL;
++
++	/* clock table init */
++	for (i=2; (ls2f_clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
++		ls2f_clockmod_table[i].frequency = (cpuclk->rate * i)/8;
++	}
++
++	policy->cur	= ls2f_cpufreq_get(policy->cpu);
++
++	cpufreq_frequency_table_get_attr(&ls2f_clockmod_table[0], policy->cpu);
++
++	result = cpufreq_frequency_table_cpuinfo(policy, &ls2f_clockmod_table[0]);
++	if (result)
++		return (result);
++
++	return 0;
++}
++
++static int ls2f_cpufreq_verify(struct cpufreq_policy *policy)
++{
++	return cpufreq_frequency_table_verify(policy, &ls2f_clockmod_table[0]);
++}
++
++static int ls2f_cpufreq_exit(struct cpufreq_policy *policy)
++{
++	clk_put(cpuclk);
++	return 0;
++}
++
++static struct freq_attr* ls2f_table_attr[] = {
++	&cpufreq_freq_attr_scaling_available_freqs,
++	NULL,
++};
++
++static struct cpufreq_driver ls2f_cpufreq_driver = {
++	.owner		= THIS_MODULE,
++	.name		= "ls2f",
++	.init		= ls2f_cpufreq_cpu_init,
++	.verify		= ls2f_cpufreq_verify,
++	.target		= ls2f_cpufreq_target,
++	.get		= ls2f_cpufreq_get,
++	.exit		= ls2f_cpufreq_exit,
++	.attr		= ls2f_table_attr,
++};
++
++static int __init ls2f_cpufreq_module_init(void)
++{
++	struct cpuinfo_mips *c = &cpu_data[0];
++	int result;
++	
++	if (c->processor_id != 0x6303)
++		return -ENODEV;
++
++	printk(KERN_INFO "cpufreq: Loongson-2F CPU frequency driver.\n");
++	result =  cpufreq_register_driver(&ls2f_cpufreq_driver);
++
++	if(!result && !nowait) {
++		saved_cpu_wait = cpu_wait;
++		cpu_wait = ls2f_cpu_wait;
++	}
++
++	cpufreq_register_notifier(&ls2f_cpufreq_notifier_block,
++				CPUFREQ_TRANSITION_NOTIFIER);
++	return result;
++}
++
++static void __exit ls2f_cpufreq_module_exit(void)
++{
++	if(!nowait && saved_cpu_wait)
++		cpu_wait = saved_cpu_wait;
++	cpufreq_unregister_driver(&ls2f_cpufreq_driver);
++	cpufreq_unregister_notifier(&ls2f_cpufreq_notifier_block, 
++				CPUFREQ_TRANSITION_NOTIFIER);
++}
++
++//late_initcall(ls2f_cpufreq_module_init);
++module_init(ls2f_cpufreq_module_init);
++module_exit(ls2f_cpufreq_module_exit);
++
++module_param(nowait, uint, 0644);
++MODULE_PARM_DESC(nowait, "Disable Loongson-2F specific wait");
++
++MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
++MODULE_DESCRIPTION("cpufreq driver for Loongson2F");
++MODULE_LICENSE("GPL");
+diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
+index 36f0653..98b38f6 100644
+--- a/arch/mips/kernel/proc.c
++++ b/arch/mips/kernel/proc.c
+@@ -38,7 +38,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
+ 	seq_printf(m, "processor\t\t: %ld\n", n);
+ 	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
+ 	        cpu_data[n].options & MIPS_CPU_FPU ? "  FPU V%d.%d" : "");
+-	seq_printf(m, fmt, __cpu_name[smp_processor_id()],
++	seq_printf(m, fmt, __cpu_name[n],
+ 	                           (version >> 4) & 0x0f, version & 0x0f,
+ 	                           (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
+ 	seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
+diff --git a/arch/mips/kernel/rtc.c b/arch/mips/kernel/rtc.c
+new file mode 100644
+index 0000000..e22f062
+--- /dev/null
++++ b/arch/mips/kernel/rtc.c
+@@ -0,0 +1,212 @@
++/*
++ * RTC related functions
++ */
++#include <linux/acpi.h>
++#include <linux/bcd.h>
++#include <linux/mc146818rtc.h>
++#include <linux/platform_device.h>
++#include <linux/pnp.h>
++
++#include <asm/time.h>
++
++#ifdef CONFIG_X86_32
++/*
++ * This is a special lock that is owned by the CPU and holds the index
++ * register we are working with.  It is required for NMI access to the
++ * CMOS/RTC registers.  See include/asm-i386/mc146818rtc.h for details.
++ */
++volatile unsigned long cmos_lock = 0;
++EXPORT_SYMBOL(cmos_lock);
++#endif
++
++/* For two digit years assume time is always after that */
++#define CMOS_YEARS_OFFS 2000
++
++#if 0
++DEFINE_SPINLOCK(rtc_lock);
++EXPORT_SYMBOL(rtc_lock);
++#else
++extern spinlock_t rtc_lock;
++#endif
++
++/*
++ * In order to set the CMOS clock precisely, set_rtc_mmss has to be
++ * called 500 ms after the second nowtime has started, because when
++ * nowtime is written into the registers of the CMOS clock, it will
++ * jump to the next second precisely 500 ms later. Check the Motorola
++ * MC146818A or Dallas DS12887 data sheet for details.
++ *
++ * BUG: This routine does not handle hour overflow properly; it just
++ *      sets the minutes. Usually you'll only notice that after reboot!
++ */
++int mach_set_rtc_mmss(unsigned long nowtime)
++{
++	int retval = 0;
++	int real_seconds, real_minutes, cmos_minutes;
++	unsigned char save_control, save_freq_select;
++
++	 /* tell the clock it's being set */
++	save_control = CMOS_READ(RTC_CONTROL);
++	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
++
++	/* stop and reset prescaler */
++	save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
++	CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
++
++	cmos_minutes = CMOS_READ(RTC_MINUTES);
++	if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
++		BCD_TO_BIN(cmos_minutes);
++
++	/*
++	 * since we're only adjusting minutes and seconds,
++	 * don't interfere with hour overflow. This avoids
++	 * messing with unknown time zones but requires your
++	 * RTC not to be off by more than 15 minutes
++	 */
++	real_seconds = nowtime % 60;
++	real_minutes = nowtime / 60;
++	/* correct for half hour time zone */
++	if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
++		real_minutes += 30;
++	real_minutes %= 60;
++
++	if (abs(real_minutes - cmos_minutes) < 30) {
++		if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
++			BIN_TO_BCD(real_seconds);
++			BIN_TO_BCD(real_minutes);
++		}
++		CMOS_WRITE(real_seconds,RTC_SECONDS);
++		CMOS_WRITE(real_minutes,RTC_MINUTES);
++	} else {
++		printk(KERN_WARNING
++		       "set_rtc_mmss: can't update from %d to %d\n",
++		       cmos_minutes, real_minutes);
++		retval = -1;
++	}
++
++	/* The following flags have to be released exactly in this order,
++	 * otherwise the DS12887 (popular MC146818A clone with integrated
++	 * battery and quartz) will not reset the oscillator and will not
++	 * update precisely 500 ms later. You won't find this mentioned in
++	 * the Dallas Semiconductor data sheets, but who believes data
++	 * sheets anyway ...                           -- Markus Kuhn
++	 */
++	CMOS_WRITE(save_control, RTC_CONTROL);
++	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
++
++	return retval;
++}
++
++unsigned long mach_get_cmos_time(void)
++{
++	unsigned int status, year, mon, day, hour, min, sec, century = 0;
++
++	/*
++	 * If UIP is clear, then we have >= 244 microseconds before
++	 * RTC registers will be updated.  Spec sheet says that this
++	 * is the reliable way to read RTC - registers. If UIP is set
++	 * then the register access might be invalid.
++	 */
++	while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
++		cpu_relax();
++
++	sec = CMOS_READ(RTC_SECONDS);
++	min = CMOS_READ(RTC_MINUTES);
++	hour = CMOS_READ(RTC_HOURS);
++	day = CMOS_READ(RTC_DAY_OF_MONTH);
++	mon = CMOS_READ(RTC_MONTH);
++	year = CMOS_READ(RTC_YEAR);
++
++#ifdef CONFIG_ACPI
++	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
++	    acpi_gbl_FADT.century)
++		century = CMOS_READ(acpi_gbl_FADT.century);
++#endif
++
++	status = CMOS_READ(RTC_CONTROL);
++	WARN_ON_ONCE(RTC_ALWAYS_BCD && (status & RTC_DM_BINARY));
++
++	if (RTC_ALWAYS_BCD || !(status & RTC_DM_BINARY)) {
++		BCD_TO_BIN(sec);
++		BCD_TO_BIN(min);
++		BCD_TO_BIN(hour);
++		BCD_TO_BIN(day);
++		BCD_TO_BIN(mon);
++		BCD_TO_BIN(year);
++	}
++
++	if (century) {
++		BCD_TO_BIN(century);
++		year += century * 100;
++		printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
++	} else
++		year += CMOS_YEARS_OFFS;
++
++	return mktime(year, mon, day, hour, min, sec);
++}
++
++/* Routines for accessing the CMOS RAM/RTC. */
++unsigned char rtc_cmos_read(unsigned char addr)
++{
++	unsigned char val;
++
++	lock_cmos_prefix(addr);
++	outb(addr, RTC_PORT(0));
++	val = inb(RTC_PORT(1));
++	lock_cmos_suffix(addr);
++	return val;
++}
++EXPORT_SYMBOL(rtc_cmos_read);
++
++void rtc_cmos_write(unsigned char val, unsigned char addr)
++{
++	lock_cmos_prefix(addr);
++	outb(addr, RTC_PORT(0));
++	outb(val, RTC_PORT(1));
++	lock_cmos_suffix(addr);
++}
++EXPORT_SYMBOL(rtc_cmos_write);
++
++int set_rtc_mmss(unsigned long nowtime)
++{
++	int retval;
++	unsigned long flags;
++
++	spin_lock_irqsave(&rtc_lock, flags);
++	retval = set_wallclock(nowtime);
++	spin_unlock_irqrestore(&rtc_lock, flags);
++
++	return retval;
++}
++
++static struct resource rtc_resources[] = {
++	[0] = {
++		.start	= RTC_PORT(0),
++		.end	= RTC_PORT(1),
++		.flags	= IORESOURCE_IO,
++	},
++	[1] = {
++		.start	= RTC_IRQ,
++		.end	= RTC_IRQ,
++		.flags	= IORESOURCE_IRQ,
++	}
++};
++
++static struct platform_device rtc_device = {
++	.name		= "rtc_cmos",
++	.id		= -1,
++	.resource	= rtc_resources,
++	.num_resources	= ARRAY_SIZE(rtc_resources),
++};
++
++static __init int add_rtc_cmos(void)
++{
++#ifdef CONFIG_PNP
++	if (!pnp_platform_devices)
++		platform_device_register(&rtc_device);
++#else
++	platform_device_register(&rtc_device);
++#endif /* CONFIG_PNP */
++	return 0;
++}
++device_initcall(add_rtc_cmos);
+diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
+index 5e75a31..759f680 100644
+--- a/arch/mips/kernel/scall32-o32.S
++++ b/arch/mips/kernel/scall32-o32.S
+@@ -180,7 +180,7 @@ bad_stack:
+ 	 * The system call does not exist in this kernel
+ 	 */
+ illegal_syscall:
+-	li	v0, -ENOSYS			# error
++	li	v0, ENOSYS			# error
+ 	sw	v0, PT_R2(sp)
+ 	li	t0, 1				# set error flag
+ 	sw	t0, PT_R7(sp)
+@@ -293,7 +293,7 @@ bad_alignment:
+ 	jr	t2
+ 	/* Unreached */
+ 
+-einval:	li	v0, -EINVAL
++einval:	li	v0, -ENOSYS
+ 	jr	ra
+ 	END(sys_syscall)
+ 
+diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
+index 3d58204..a9e1716 100644
+--- a/arch/mips/kernel/scall64-64.S
++++ b/arch/mips/kernel/scall64-64.S
+@@ -117,7 +117,7 @@ syscall_trace_entry:
+ 
+ illegal_syscall:
+ 	/* This also isn't a 64-bit syscall, throw an error.  */
+-	li	v0, -ENOSYS			# error
++	li	v0, ENOSYS			# error
+ 	sd	v0, PT_R2(sp)
+ 	li	t0, 1				# set error flag
+ 	sd	t0, PT_R7(sp)
+diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
+index d7cd1aa..e3271b9 100644
+--- a/arch/mips/kernel/scall64-o32.S
++++ b/arch/mips/kernel/scall64-o32.S
+@@ -452,7 +452,7 @@ sys_call_table:
+ 	PTR	sys_io_submit
+ 	PTR	sys_io_cancel			/* 4245 */
+ 	PTR	sys_exit_group
+-	PTR	sys_lookup_dcookie
++	PTR	sys32_lookup_dcookie
+ 	PTR	sys_epoll_create
+ 	PTR	sys_epoll_ctl
+ 	PTR	sys_epoll_wait			/* 4250 */
+diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
+index 16f8edf..4430a1f 100644
+--- a/arch/mips/kernel/setup.c
++++ b/arch/mips/kernel/setup.c
+@@ -601,8 +601,8 @@ static int __init debugfs_mips(void)
+ 	struct dentry *d;
+ 
+ 	d = debugfs_create_dir("mips", NULL);
+-	if (IS_ERR(d))
+-		return PTR_ERR(d);
++	if (!d)
++		return -ENOMEM;
+ 	mips_debugfs_dir = d;
+ 	return 0;
+ }
+diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
+index 4410f17..6d3d197 100644
+--- a/arch/mips/kernel/smp.c
++++ b/arch/mips/kernel/smp.c
+@@ -161,8 +161,10 @@ static void stop_this_cpu(void *dummy)
+ 	 * Remove this CPU:
+ 	 */
+ 	cpu_clear(smp_processor_id(), cpu_online_map);
+-	local_irq_enable();	/* May need to service _machine_restart IPI */
+-	for (;;);		/* Wait if available. */
++	for (;;) {
++		if (cpu_wait)
++			(*cpu_wait)();		/* Wait if available. */
++	}
+ }
+ 
+ void smp_send_stop(void)
+diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
+index 1f467d5..4ab3c9b 100644
+--- a/arch/mips/kernel/time.c
++++ b/arch/mips/kernel/time.c
+@@ -154,6 +154,9 @@ void __init time_init(void)
+ {
+ 	plat_time_init();
+ 
++#if defined(CONFIG_LS2F_CPU_FREQ) || defined(CONFIG_LEMOTE_FULONG2F)
++	return ;
++#endif
+ 	if (!mips_clockevent_init() || !cpu_has_mfc0_count_bug())
+ 		init_mips_clocksource();
+ }
+diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
+index c327b21..2070966 100644
+--- a/arch/mips/kernel/unaligned.c
++++ b/arch/mips/kernel/unaligned.c
+@@ -560,12 +560,12 @@ static int __init debugfs_unaligned(void)
+ 		return -ENODEV;
+ 	d = debugfs_create_u32("unaligned_instructions", S_IRUGO,
+ 			       mips_debugfs_dir, &unaligned_instructions);
+-	if (IS_ERR(d))
+-		return PTR_ERR(d);
++	if (!d)
++		return -ENOMEM;
+ 	d = debugfs_create_u32("unaligned_action", S_IRUGO | S_IWUSR,
+ 			       mips_debugfs_dir, &unaligned_action);
+-	if (IS_ERR(d))
+-		return PTR_ERR(d);
++	if (!d)
++		return -ENOMEM;
+ 	return 0;
+ }
+ __initcall(debugfs_unaligned);
+diff --git a/arch/mips/lemote/lm2e/mipsdha.c b/arch/mips/lemote/lm2e/mipsdha.c
+new file mode 100644
+index 0000000..fd90454
+--- /dev/null
++++ b/arch/mips/lemote/lm2e/mipsdha.c
+@@ -0,0 +1,164 @@
++/*
++ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/errno.h>
++#include <linux/mm.h>
++#include <linux/pci.h>
++#include <linux/init.h>
++#include <linux/proc_fs.h>
++#include <asm/uaccess.h>
++#include <asm/io.h>
++
++static ssize_t mipsdha_proc_read(struct file *file, char *buf, size_t len, loff_t *ppos);
++
++static ssize_t mipsdha_proc_write(struct file *file, const char *buf, size_t len, loff_t *ppos);
++
++
++static struct proc_dir_entry *mipsdha_proc_entry;
++
++#define INFO_SIZE 4096
++static char info_buf[INFO_SIZE];
++
++static struct file_operations mipsdha_fops =
++{
++    owner:	THIS_MODULE,
++    read:	mipsdha_proc_read,
++    write:	mipsdha_proc_write,
++};
++
++static enum {CMD_ERR, CMD_GIB, CMD_GPI} cmd;
++
++typedef struct pciinfo_s
++{
++  int		bus,card,func;
++  unsigned short command;
++  unsigned short vendor,device;
++  unsigned	base0,base1,base2,baserom;
++} pciinfo_t;
++
++
++extern struct proc_dir_entry proc_root;
++
++static int __init mipsdha_proc_init(void)
++{
++	mipsdha_proc_entry = create_proc_entry("mipsdha", S_IWUSR | S_IRUGO, &proc_root);
++	if (mipsdha_proc_entry == NULL) {
++		printk("MIPSDHA: register /proc/mipsdha failed!\n");
++		return 0;
++	}
++	
++	mipsdha_proc_entry->owner = THIS_MODULE;
++	mipsdha_proc_entry->proc_fops = &mipsdha_fops;
++
++	cmd=CMD_ERR;
++	return 0;
++}
++
++static ssize_t mipsdha_proc_write (struct file *file, const char *buf, size_t len, loff_t *ppos)
++{
++	char cmd_gib[]="GET IO BASE";
++	char cmd_gpi[]="GET PCI INFO";
++
++	if (len >= INFO_SIZE) return -ENOMEM;
++
++	if (copy_from_user(info_buf, buf, len)) return -EFAULT;
++	info_buf[len] = '\0';
++
++	if (strncmp(info_buf, cmd_gib, sizeof(cmd_gib)-1)==0) {
++		cmd = CMD_GIB;
++		return len;
++	} else if (strncmp(info_buf, cmd_gpi, sizeof(cmd_gpi)-1)==0) {
++		cmd = CMD_GPI;
++		return len;
++	} else {
++		return -EINVAL;
++	}
++}
++
++static ssize_t mipsdha_proc_read (struct file *file, char *buf, size_t len, loff_t *ppos)
++{
++	int info_cnt;
++	pciinfo_t *pciinfo;
++	struct pci_dev *dev = NULL;
++
++	switch (cmd) {
++		default:
++			printk("MIPSDHA: BUG found in function %s!(cmd=%d)\n", 
++					__FUNCTION__, cmd);
++			return -EINVAL;
++
++
++		case CMD_ERR:
++			return -EINVAL;
++
++
++		case CMD_GIB:
++			*(unsigned long *)info_buf = 
++				virt_to_phys((void *) mips_io_port_base);
++			info_cnt=sizeof(unsigned long);
++			break;
++
++
++		case CMD_GPI:
++			pciinfo = (pciinfo_t *) info_buf;
++			info_cnt = 0;
++			for_each_pci_dev(dev) {
++
++				if (info_cnt+sizeof(pciinfo_t)>INFO_SIZE) return -ENOMEM;
++
++				pciinfo->bus = dev->bus->number;
++				pciinfo->card = PCI_SLOT(dev->devfn);
++				pciinfo->func = PCI_FUNC(dev->devfn);
++
++				if (pci_read_config_word(dev, PCI_COMMAND, &pciinfo->command)
++						!= PCIBIOS_SUCCESSFUL) {
++					printk("MIPSDHA: BUG found in function %s!\n", 
++							__FUNCTION__);
++					pciinfo->command=0;
++				}
++
++				pciinfo->vendor = dev->vendor;
++				pciinfo->device = dev->device;
++
++				pciinfo->base0 = (dev->resource[0]).start;
++				pciinfo->base1 = (dev->resource[1]).start;
++				pciinfo->base2 = (dev->resource[2]).start;
++				pciinfo->baserom = (dev->resource[PCI_ROM_RESOURCE]).start;
++
++				pciinfo++;
++				info_cnt += sizeof(pciinfo_t);
++			}
++			break;
++	}
++
++	if (len < info_cnt) return -ENOMEM;
++	if (copy_to_user(buf, info_buf, info_cnt)) return -EFAULT;
++
++	return info_cnt;
++}
++
++__initcall(mipsdha_proc_init);
+diff --git a/arch/mips/lemote/lm2f/Kconfig b/arch/mips/lemote/lm2f/Kconfig
+new file mode 100644
+index 0000000..25c2b3d
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/Kconfig
+@@ -0,0 +1,72 @@
++choice
++	prompt "Machine type"
++	depends on MACH_LM2F
++	default LEMOTE_FULONG2F
++
++config LEMOTE_FULONG2F
++	bool "Lemote Fulong mini-PC"
++	select ARCH_SPARSEMEM_ENABLE
++	select CEVT_R4K
++	select CSRC_R4K
++	select SYS_HAS_CPU_LOONGSON2
++	select DMA_NONCOHERENT
++	select BOOT_ELF32
++	select BOARD_SCACHE
++	select HAVE_STD_PC_SERIAL_PORT
++	select HW_HAS_PCI
++	select I8259
++	select ISA
++	select IRQ_CPU
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_HAS_EARLY_PRINTK
++	select GENERIC_HARDIRQS_NO__DO_IRQ
++	select GENERIC_ISA_DMA_SUPPORT_BROKEN
++	select CPU_HAS_WB
++	select CS5536
++	help
++	  Lemote Fulong mini-PC board based on the Chinese Loongson-2F CPU
++
++config LEMOTE_2FNOTEBOOK
++	bool "Lemote mini Notebook"
++	select ARCH_SPARSEMEM_ENABLE
++	select CEVT_R4K
++	select CSRC_R4K
++	select SYS_HAS_CPU_LOONGSON2
++	select DMA_NONCOHERENT
++	select BOOT_ELF32
++	select BOARD_SCACHE
++	select HAVE_STD_PC_SERIAL_PORT
++	select HW_HAS_PCI
++	select I8259
++	select ISA
++	select IRQ_CPU
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_HAS_EARLY_PRINTK
++	select GENERIC_HARDIRQS_NO__DO_IRQ
++	select GENERIC_ISA_DMA_SUPPORT_BROKEN
++	select CPU_HAS_WB
++	select CS5536
++	help
++	  Lemote Notebook based on the Chinese Loongson-2F CPU
++
++endchoice
++
++config CS5536_RTC_BUG
++	bool
++
++config CS5536
++	bool
++	select CS5536_RTC_BUG
++
++config LEMOTE_NAS
++	bool "Lemote NAS machine"
++	depends on LEMOTE_FULONG2F
++	help 
++	  Lemote's Loongson-2F based network attached system
++
+diff --git a/arch/mips/lemote/lm2f/common/Makefile b/arch/mips/lemote/lm2f/common/Makefile
+new file mode 100644
+index 0000000..deac453
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/Makefile
+@@ -0,0 +1,9 @@
++#
++#  Copyright 2007, 2008 Lemote Tec
++#  Author: www.lemote.com Inc
++#
++# Makefile for the loongson2f CPUS, generic files
++#
++
++obj-y += mem.o mipsdha.o pci.o clock.o
++obj-$(CONFIG_CS5536) += cs5536_vsm.o mfgpt.o
+diff --git a/arch/mips/lemote/lm2f/common/clock.c b/arch/mips/lemote/lm2f/common/clock.c
+new file mode 100644
+index 0000000..8c9602f
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/clock.c
+@@ -0,0 +1,160 @@
++#include <linux/cpufreq.h>
++#include <linux/platform_device.h>
++#include <asm/clock.h>
++
++#ifdef CONFIG_64BIT
++#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long)(p)))
++#else
++#define PTR_PAD(p) (p)
++#endif
++
++static LIST_HEAD(clock_list);
++static DEFINE_SPINLOCK(clock_lock);
++static DEFINE_MUTEX(clock_list_sem);
++
++/* Minimum CLK support */
++enum {
++	DC_ZERO, DC_25PT=2, DC_37PT, DC_50PT, DC_62PT, DC_75PT,
++	DC_87PT, DC_DISABLE, DC_RESV
++};
++
++struct cpufreq_frequency_table ls2f_clockmod_table[] = {
++	{DC_RESV, CPUFREQ_ENTRY_INVALID},
++	{DC_ZERO, CPUFREQ_ENTRY_INVALID},
++	{DC_25PT, 0},
++	{DC_37PT, 0},
++	{DC_50PT, 0},
++	{DC_62PT, 0},
++	{DC_75PT, 0},
++	{DC_87PT, 0},
++	{DC_DISABLE, 0},
++	{DC_RESV, CPUFREQ_TABLE_END},
++};
++
++
++static struct clk cpu_clk = {
++	.name		= "cpu_clk",
++	.flags		= CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
++	.rate		= 800000000,
++};
++
++struct clk *clk_get(struct device *dev, const char *id)
++{
++	return &cpu_clk;
++}
++EXPORT_SYMBOL(clk_get);
++
++static void propagate_rate(struct clk *clk)
++{
++	struct clk *clkp;
++
++	list_for_each_entry(clkp, &clock_list, node) {
++		if (likely(clkp->parent != clk))
++			continue;
++		if (likely(clkp->ops && clkp->ops->recalc))
++			clkp->ops->recalc(clkp);
++		if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
++			propagate_rate(clkp);
++	}
++}
++
++int clk_enable(struct clk *clk)
++{
++	return 0;
++}
++EXPORT_SYMBOL(clk_enable);
++
++void clk_disable(struct clk *clk)
++{
++}
++EXPORT_SYMBOL(clk_disable);
++
++unsigned long clk_get_rate(struct clk *clk)
++{
++	return (unsigned long)clk->rate;
++}
++EXPORT_SYMBOL(clk_get_rate);
++
++void clk_put(struct clk *clk)
++{
++}
++EXPORT_SYMBOL(clk_put);
++
++int clk_set_rate(struct clk *clk, unsigned long rate)
++{
++	return clk_set_rate_ex(clk, rate, 0);
++}
++EXPORT_SYMBOL_GPL(clk_set_rate);
++
++int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
++{
++	//int ret = -EOPNOTSUPP;
++	int ret = 0; //-EOPNOTSUPP;
++	int regval;
++	int i;
++
++	if (likely(clk->ops && clk->ops->set_rate)) {
++		unsigned long flags;
++
++		spin_lock_irqsave(&clock_lock, flags);
++		ret = clk->ops->set_rate(clk, rate, algo_id);
++		spin_unlock_irqrestore(&clock_lock, flags);
++	}
++
++	if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
++		propagate_rate(clk);
++	
++	for (i =0; ls2f_clockmod_table[i].frequency != CPUFREQ_TABLE_END; i++) {
++		if (ls2f_clockmod_table[i].frequency == CPUFREQ_ENTRY_INVALID)
++			continue;
++		if (rate == ls2f_clockmod_table[i].frequency)
++			break;
++	}
++	if (rate != ls2f_clockmod_table[i].frequency)
++		return -ENOTSUPP;
++
++	clk->rate = rate;
++
++	regval = *(volatile unsigned int*) PTR_PAD(0xbfe00180);
++	regval = (regval & ~0x7) | (ls2f_clockmod_table[i].index -1);
++	*(volatile unsigned int *) PTR_PAD(0xbfe00180) = regval;
++
++	return ret;
++}
++EXPORT_SYMBOL_GPL(clk_set_rate_ex);
++
++long clk_round_rate(struct clk *clk, unsigned long rate)
++{
++	if (likely(clk->ops && clk->ops->round_rate)) {
++		unsigned long flags, rounded;
++
++		spin_lock_irqsave(&clock_lock, flags);
++		rounded = clk->ops->round_rate(clk, rate);
++		spin_unlock_irqrestore(&clock_lock, flags);
++
++		return rounded;
++	}
++
++	return rate; //clk_get_rate(clk);
++}
++EXPORT_SYMBOL_GPL(clk_round_rate);
++
++/*
++ * This is the simple version of Loongson-2F wait
++ * Maybe we need do this in interrupt disabled content
++ */
++DEFINE_SPINLOCK(ls2f_wait_lock);
++void ls2f_cpu_wait(void)
++{
++	u32 cpu_freq;
++	unsigned long flags;
++
++	spin_lock_irqsave(&ls2f_wait_lock, flags);	
++	cpu_freq = *(volatile u32*)PTR_PAD(0xbfe00180);
++	*(volatile u32*)PTR_PAD(0xbfe00180) &= ~0x7;  //Put CPU into wait mode
++	*(volatile u32*)PTR_PAD(0xbfe00180) = cpu_freq; //Restore CPU state
++	spin_unlock_irqrestore(&ls2f_wait_lock, flags);
++}
++
++EXPORT_SYMBOL_GPL(ls2f_cpu_wait);
++EXPORT_SYMBOL_GPL(ls2f_clockmod_table);
+diff --git a/arch/mips/lemote/lm2f/common/cs5536.h b/arch/mips/lemote/lm2f/common/cs5536.h
+new file mode 100644
+index 0000000..c18522a
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/cs5536.h
+@@ -0,0 +1,578 @@
++/*
++ * cs5536.h
++ * 
++ * The include file of cs5536 sourthbridge define which is used in the pmon only.
++ * you can modify it or change it, please set the modify time and steps.
++ *
++ * Author : jlliu <liujl@lemote.com>
++ * Data : 07-6-27
++ */
++
++#ifndef	_CS5536_H
++#define	_CS5536_H
++
++/*************************************************************************/
++
++/*
++ * basic define
++ */
++#define	PCI_IO_BASE		0x1fd00000	//( < 0x1fe00000)
++#define	PCI_IO_BASE_VA		0xbfd00000
++#define	PCI_MEM_BASE		0x10000000	//( < 0x1c000000 )
++#define	PCI_MEM_BASE_VA		0xb0000000
++
++/*
++ * MSR module base
++ */ 
++#define	CS5536_SB_MSR_BASE		(0x00000000)
++#define	CS5536_GLIU_MSR_BASE		(0x10000000)
++#define	CS5536_ILLEGAL_MSR_BASE		(0x20000000)
++#define	CS5536_USB_MSR_BASE		(0x40000000)
++#define	CS5536_IDE_MSR_BASE		(0x60000000)
++#define	CS5536_DIVIL_MSR_BASE		(0x80000000)
++#define	CS5536_ACC_MSR_BASE		(0xa0000000)
++#define	CS5536_UNUSED_MSR_BASE		(0xc0000000)
++#define	CS5536_GLCP_MSR_BASE		(0xe0000000)
++
++#define	SB_MSR_REG(offset)	(CS5536_SB_MSR_BASE	| offset)
++#define	GLIU_MSR_REG(offset)	(CS5536_GLIU_MSR_BASE	| offset)
++#define	ILLEGAL_MSR_REG(offset)	(CS5536_ILLEGAL_MSR_BASE| offset)
++#define	USB_MSR_REG(offset)	(CS5536_USB_MSR_BASE	| offset)
++#define	IDE_MSR_REG(offset)	(CS5536_IDE_MSR_BASE	| offset)
++#define	DIVIL_MSR_REG(offset)	(CS5536_DIVIL_MSR_BASE	| offset)
++#define	ACC_MSR_REG(offset)	(CS5536_ACC_MSR_BASE	| offset)
++#define	UNUSED_MSR_REG(offset)	(CS5536_UNUSED_MSR_BASE	| offset)
++#define	GLCP_MSR_REG(offset)	(CS5536_GLCP_MSR_BASE	| offset)
++
++/*
++ * BAR SPACE OF VIRTUAL PCI : range for pci probe use, length is the actual size. 
++ */
++// IO space for all DIVIL modules
++#define	CS5536_IRQ_RANGE		0xffffffe0	// USERD FOR PCI PROBE
++#define	CS5536_IRQ_LENGTH		0x20		// THE REGS ACTUAL LENGTH
++#define	CS5536_SMB_RANGE		0xfffffff8
++#define	CS5536_SMB_LENGTH		0x08
++#define	CS5536_GPIO_RANGE		0xffffff00
++#define	CS5536_GPIO_LENGTH		0x100
++#define	CS5536_MFGPT_RANGE		0xffffffc0
++#define	CS5536_MFGPT_LENGTH		0x40
++#define	CS5536_ACPI_RANGE		0xffffffe0
++#define	CS5536_ACPI_LENGTH		0x20
++#define	CS5536_PMS_RANGE		0xffffff80
++#define	CS5536_PMS_LENGTH		0x80
++// MEM space for 4KB nand flash; IO space for 16B nor flash.
++#ifdef	CS5536_USE_NOR_FLASH
++#define	CS5536_FLSH0_RANGE	0xfffffff0
++#define	CS5536_FLSH0_LENGTH	0x10
++#define	CS5536_FLSH1_RANGE	0xfffffff0
++#define	CS5536_FLSH1_LENGTH	0x10
++#define	CS5536_FLSH2_RANGE	0xfffffff0
++#define	CS5536_FLSH2_LENGTH	0x10
++#define	CS5536_FLSH3_RANGE	0xfffffff0
++#define	CS5536_FLSH3_LENGTH	0x10
++#else
++#define	CS5536_FLSH0_RANGE	0xfffff000
++#define	CS5536_FLSH0_LENGTH	0x1000
++#define	CS5536_FLSH1_RANGE	0xfffff000
++#define	CS5536_FLSH1_LENGTH	0x1000
++#define	CS5536_FLSH2_RANGE	0xfffff000
++#define	CS5536_FLSH2_LENGTH	0x1000
++#define	CS5536_FLSH3_RANGE	0xfffff000
++#define	CS5536_FLSH3_LENGTH	0x1000
++#endif
++// IO space for IDE
++#define	CS5536_IDE_RANGE	0xfffffff0
++#define	CS5536_IDE_LENGTH	0x10
++// IO space for ACC
++#define	CS5536_ACC_RANGE	0xffffff80
++#define	CS5536_ACC_LENGTH	0x80
++// MEM space for ALL USB modules
++//#define	CS5536_OHCI_RANGE	0xfffffff0
++#define	CS5536_OHCI_RANGE	0xfffff000
++#define	CS5536_OHCI_LENGTH	0x1000
++//#define	CS5536_EHCI_RANGE	0xfffffff0
++#define	CS5536_EHCI_RANGE	0xfffff000
++#define	CS5536_EHCI_LENGTH	0x1000
++#define	CS5536_UDC_RANGE	0xffffe000
++#define	CS5536_UDC_LENGTH	0x2000
++#define	CS5536_OTG_RANGE	0xfffff000
++#define	CS5536_OTG_LENGTH	0x1000
++
++/*
++ * PCI MSR ACCESS
++ */
++#define	PCI_MSR_CTRL		0xF0
++#define	PCI_MSR_ADDR		0xF4
++#define	PCI_MSR_DATA_LO		0xF8
++#define	PCI_MSR_DATA_HI		0xFC
++
++/******************************* MSR *********************************************/
++
++/*
++ * GLIU STANDARD MSR
++ */
++#define	GLIU_CAP		0x00
++#define	GLIU_CONFIG		0x01
++#define	GLIU_SMI		0x02
++#define	GLIU_ERROR		0x03
++#define	GLIU_PM			0x04
++#define	GLIU_DIAG		0x05
++
++/*
++ * GLIU SPEC. MSR
++ */
++#define	GLIU_P2D_BM0		0x20 
++#define	GLIU_P2D_BM1		0x21 
++#define	GLIU_P2D_BM2		0x22 
++#define	GLIU_P2D_BMK0		0x23
++#define	GLIU_P2D_BMK1		0x24
++#define	GLIU_P2D_BM3		0x25 
++#define	GLIU_P2D_BM4		0x26 
++#define	GLIU_COH		0x80
++#define	GLIU_PAE		0x81	
++#define	GLIU_ARB		0x82
++#define	GLIU_ASMI		0x83
++#define	GLIU_AERR		0x84
++#define	GLIU_DEBUG		0x85
++#define	GLIU_PHY_CAP		0x86
++#define	GLIU_NOUT_RESP		0x87
++#define	GLIU_NOUT_WDATA		0x88
++#define	GLIU_WHOAMI		0x8B
++#define	GLIU_SLV_DIS		0x8C
++#define	GLIU_IOD_BM0		0xE0
++#define	GLIU_IOD_BM1		0xE1
++#define	GLIU_IOD_BM2		0xE2
++#define	GLIU_IOD_BM3		0xE3
++#define	GLIU_IOD_BM4		0xE4
++#define	GLIU_IOD_BM5		0xE5
++#define	GLIU_IOD_BM6		0xE6
++#define	GLIU_IOD_BM7		0xE7
++#define	GLIU_IOD_BM8		0xE8
++#define	GLIU_IOD_BM9		0xE9
++#define	GLIU_IOD_SC0		0xEA
++#define	GLIU_IOD_SC1		0xEB
++#define	GLIU_IOD_SC2		0xEC
++#define	GLIU_IOD_SC3		0xED
++#define	GLIU_IOD_SC4		0xEE
++#define	GLIU_IOD_SC5		0xEF
++#define	GLIU_IOD_SC6		0xF0
++#define	GLIU_IOD_SC7		0xF1
++
++/*
++ * SB STANDARD
++ */
++#define	SB_CAP		0x00
++#define	SB_CONFIG	0x01
++#define	SB_SMI		0x02
++#define	SB_ERROR	0x03
++#define	SB_MAR_ERR_EN		0x00000001
++#define	SB_TAR_ERR_EN		0x00000002
++#define	SB_RSVD_BIT1		0x00000004
++#define	SB_EXCEP_ERR_EN		0x00000008
++#define	SB_SYSE_ERR_EN		0x00000010
++#define	SB_PARE_ERR_EN		0x00000020
++#define	SB_TAS_ERR_EN		0x00000040
++#define	SB_MAR_ERR_FLAG		0x00010000
++#define	SB_TAR_ERR_FLAG		0x00020000
++#define	SB_RSVD_BIT2		0x00040000
++#define	SB_EXCEP_ERR_FLAG	0x00080000
++#define	SB_SYSE_ERR_FLAG	0x00100000
++#define	SB_PARE_ERR_FLAG	0x00200000
++#define	SB_TAS_ERR_FLAG		0x00400000
++#define	SB_PM		0x04
++#define	SB_DIAG		0x05
++
++/*
++ * SB SPEC.
++ */
++#define	SB_CTRL		0x10
++#define	SB_R0		0x20
++#define	SB_R1		0x21
++#define	SB_R2		0x22
++#define	SB_R3		0x23
++#define	SB_R4		0x24
++#define	SB_R5		0x25
++#define	SB_R6		0x26
++#define	SB_R7		0x27
++#define	SB_R8		0x28
++#define	SB_R9		0x29
++#define	SB_R10		0x2A
++#define	SB_R11		0x2B
++#define	SB_R12		0x2C
++#define	SB_R13		0x2D
++#define	SB_R14		0x2E
++#define	SB_R15		0x2F
++
++/*
++ * GLCP STANDARD
++ */
++#define	GLCP_CAP		0x00
++#define	GLCP_CONFIG		0x01
++#define	GLCP_SMI		0x02
++#define	GLCP_ERROR		0x03
++#define	GLCP_PM			0x04
++#define	GLCP_DIAG		0x05
++
++/*
++ * GLCP SPEC. 
++ */
++#define	GLCP_CLK_DIS_DELAY	0x08
++#define	GLCP_PM_CLK_DISABLE	0x09
++#define	GLCP_GLB_PM		0x0B
++#define	GLCP_DBG_OUT		0x0C
++#define	GLCP_RSVD1		0x0D
++#define	GLCP_SOFT_COM		0x0E
++#define	SOFT_BAR_SMB_FLAG		0x00000001
++#define	SOFT_BAR_GPIO_FLAG		0x00000002
++#define	SOFT_BAR_MFGPT_FLAG		0x00000004
++#define	SOFT_BAR_IRQ_FLAG		0x00000008
++#define	SOFT_BAR_PMS_FLAG		0x00000010
++#define	SOFT_BAR_ACPI_FLAG		0x00000020
++#define	SOFT_BAR_FLSH0_FLAG		0x00000040
++#define	SOFT_BAR_FLSH1_FLAG		0x00000080
++#define	SOFT_BAR_FLSH2_FLAG		0x00000100
++#define	SOFT_BAR_FLSH3_FLAG		0x00000200
++#define	SOFT_BAR_IDE_FLAG		0x00000400
++#define	SOFT_BAR_ACC_FLAG		0x00000800
++#define	SOFT_BAR_OHCI_FLAG		0x00001000
++#define	SOFT_BAR_EHCI_FLAG		0x00002000
++#define	SOFT_BAR_UDC_FLAG		0x00004000
++#define	SOFT_BAR_OTG_FLAG		0x00008000
++#define	GLCP_RSVD2		0x0F
++#define	GLCP_CLK_OFF		0x10
++#define	GLCP_CLK_ACTIVE		0x11
++#define	GLCP_CLK_DISABLE	0x12
++#define	GLCP_CLK4ACK		0x13
++#define	GLCP_SYS_RST		0x14
++#define	GLCP_RSVD3		0x15
++#define	GLCP_DBG_CLK_CTRL	0x16
++#define	GLCP_CHIP_REV_ID	0x17
++
++/*
++ * DIVIL STANDARD
++ */
++#define	DIVIL_CAP		0x00
++#define	DIVIL_CONFIG		0x01
++#define	DIVIL_SMI		0x02
++#define	DIVIL_ERROR		0x03
++#define	DIVIL_PM		0x04
++#define	DIVIL_DIAG		0x05
++
++/*
++ * DIVIL SPEC. 
++ */
++#define	DIVIL_LBAR_IRQ		0x08
++#define	DIVIL_LBAR_KEL		0x09
++#define	DIVIL_LBAR_SMB		0x0B
++#define	DIVIL_LBAR_GPIO		0x0C
++#define	DIVIL_LBAR_MFGPT	0x0D
++#define	DIVIL_LBAR_ACPI		0x0E
++#define	DIVIL_LBAR_PMS		0x0F
++#define	DIVIL_LBAR_FLSH0	0x10
++#define	DIVIL_LBAR_FLSH1	0x11
++#define	DIVIL_LBAR_FLSH2	0x12
++#define	DIVIL_LBAR_FLSH3	0x13
++#define	DIVIL_LEG_IO		0x14
++#define	DIVIL_BALL_OPTS		0x15
++#define	DIVIL_SOFT_IRQ		0x16
++#define	DIVIL_SOFT_RESET	0x17
++// NOR FLASH
++#define	NORF_CTRL		0x18
++#define	NORF_T01		0x19
++#define	NORF_T23		0x1A
++// NAND FLASH
++#define	NANDF_DATA		0x1B
++#define	NANDF_CTRL		0x1C
++#define	NANDF_RSVD		0x1D
++// KEL Keyboard Emulation Logic
++#define	KEL_CTRL		0x1F
++// PIC
++#define	PIC_YSEL_LOW		0x20
++#define	PIC_YSEL_LOW_USB_SHIFT		8
++#define	PIC_YSEL_LOW_ACC_SHIFT		16
++#define	PIC_YSEL_LOW_FLASH_SHIFT	24
++#define	PIC_YSEL_HIGH		0x21
++#define	PIC_ZSEL_LOW		0x22
++#define	PIC_ZSEL_HIGH		0x23
++#define	PIC_IRQM_PRIM		0x24
++#define	PIC_IRQM_LPC		0x25
++#define	PIC_XIRR_STS_LOW	0x26
++#define	PIC_XIRR_STS_HIGH	0x27
++#define	PCI_SHDW		0x34
++// MFGPT
++#define	MFGPT_IRQ		0x28
++#define	MFGPT_NR		0x29
++#define	MFGPT_RSVD		0x2A
++#define	MFGPT_SETUP		0x2B
++// FLOPPY
++#define	FLPY_3F2_SHDW		0x30
++#define	FLPY_3F7_SHDW		0x31
++#define	FLPY_372_SHDW		0x32
++#define	FLPY_377_SHDW		0x33
++// PIT
++#define	PIT_SHDW		0x36
++#define	PIT_CNTRL		0x37
++// UART
++#define	UART1_MOD		0x38
++#define	UART1_DONG		0x39
++#define	UART1_CONF		0x3A
++#define	UART1_RSVD		0x3B
++#define	UART2_MOD		0x3C
++#define	UART2_DONG		0x3D
++#define	UART2_CONF		0x3E
++#define	UART2_RSVD		0x3F
++// DMA
++#define	DIVIL_AC_DMA		0x1E
++#define	DMA_MAP			0x40
++#define	DMA_SHDW_CH0		0x41
++#define	DMA_SHDW_CH1		0x42
++#define	DMA_SHDW_CH2		0x43
++#define	DMA_SHDW_CH3		0x44
++#define	DMA_SHDW_CH4		0x45
++#define	DMA_SHDW_CH5		0x46
++#define	DMA_SHDW_CH6		0x47
++#define	DMA_SHDW_CH7		0x48
++#define	DMA_MSK_SHDW		0x49
++// LPC
++#define	LPC_EADDR		0x4C
++#define	LPC_ESTAT		0x4D
++#define	LPC_SIRQ		0x4E
++#define	LPC_RSVD		0x4F
++// PMC
++#define	PMC_LTMR		0x50
++#define	PMC_RSVD		0x51
++// RTC
++#define	RTC_RAM_LOCK		0x54
++#define	RTC_DOMA_OFFSET		0x55
++#define	RTC_MONA_OFFSET		0x56
++#define	RTC_CEN_OFFSET		0x57
++
++/*
++ * IDE STANDARD 
++ */
++#define	IDE_CAP		0x00
++#define	IDE_CONFIG	0x01
++#define	IDE_SMI		0x02
++#define	IDE_ERROR	0x03
++#define	IDE_PM		0x04
++#define	IDE_DIAG	0x05
++
++/*
++ * IDE SPEC. 
++ */
++#define	IDE_IO_BAR	0x08
++#define	IDE_CFG		0x10
++#define	IDE_DTC		0x12
++#define	IDE_CAST	0x13
++#define	IDE_ETC		0x14
++#define	IDE_INTERNAL_PM	0x15
++
++/*
++ * ACC STANDARD
++ */
++#define	ACC_CAP		0x00
++#define	ACC_CONFIG	0x01
++#define	ACC_SMI		0x02
++#define	ACC_ERROR	0x03
++#define	ACC_PM		0x04
++#define	ACC_DIAG	0x05
++
++/*
++ * USB STANDARD
++ */
++#define	USB_CAP		0x00
++#define	USB_CONFIG	0x01
++#define	USB_SMI		0x02
++#define	USB_ERROR	0x03
++#define	USB_PM		0x04
++#define	USB_DIAG	0x05
++
++/*
++ * USB SPEC.
++ */
++#define	USB_OHCI	0x08
++#define	USB_EHCI	0x09
++#define	USB_UDC		0x0A
++#define	USB_OTG		0x0B
++
++/********************************** NATIVE ****************************************/
++// IDE NATIVE registers
++#define	IDE_BM_CMD	0x00
++#define	IDE_BM_STS	0x02
++#define	IDE_BM_PRD	0x04
++
++// OHCI native registers
++#define	OHCI_REVISION		0x00
++#define	OHCI_CONTROL		0x04
++#define	OHCI_COMMAND_STATUS	0x08
++#define	OHCI_INT_STATUS		0x0C
++#define	OHCI_INT_ENABLE		0x10
++#define	OHCI_INT_DISABLE	0x14
++#define	OHCI_HCCA		0x18
++#define	OHCI_PERI_CUR_ED	0x1C
++#define	OHCI_CTRL_HEAD_ED	0x20
++#define	OHCI_CTRL_CUR_ED	0x24
++#define	OHCI_BULK_HEAD_ED	0x28
++#define	OHCI_BULK_CUR_ED	0x2C
++#define	OHCI_DONE_HEAD		0x30
++#define	OHCI_FM_INTERVAL	0x34
++#define	OHCI_FM_REMAINING	0x38
++#define	OHCI_FM_NUMBER		0x3C
++#define	OHCI_PERI_START		0x40
++#define	OHCI_LS_THRESHOLD	0x44
++#define	OHCI_RH_DESCRIPTORA	0x48
++#define	OHCI_RH_DESCRIPTORB	0x4C
++#define	OHCI_RH_STATUS		0x50
++#define	OHCI_RH_PORT_STATUS1	0x54
++#define	OHCI_RH_PORT_STATUS2	0x58
++#define	OHCI_RH_PORT_STATUS3	0x5C
++#define	OHCI_RH_PORT_STATUS4	0x60
++
++// KEL : MEM SPACE; REG :32BITS WIDTH
++#define	KEL_HCE_CTRL	0x100
++#define	KEL_HCE_IN	0x104
++#define	KEL_HCE_OUT	0x108
++#define	KEL_HCE_STS	0x10C
++#define	KEL_PORTA	0x92	//8bits
++// PIC : I/O SPACE; REG : 8BITS
++#define	PIC_ICW1_MASTER	0x20
++#define	PIC_ICW1_SLAVE	0xA0
++#define	PIC_ICW2_MASTER	0x21
++#define	PIC_ICW2_SLAVE	0xA1
++#define	PIC_ICW3_MASTER	0x21
++#define	PIC_ICW3_SLAVE	0xA1
++#define	PIC_ICW4_MASTER	0x21
++#define	PIC_ICW4_SLAVE	0xA1
++#define	PIC_OCW1_MASTER	0x21
++#define	PIC_OCW1_SLAVE	0xA1
++#define	PIC_OCW2_MASTER	0x20
++#define	PIC_OCW2_SLAVE	0xA0
++#define	PIC_OCW3_MASTER	0x20
++#define	PIC_OCW3_SLAVE	0xA0
++#define	PIC_IRR_MASTER	0x20
++#define	PIC_IRR_SLAVE	0xA0
++#define	PIC_ISR_MASTER	0x20
++#define	PIC_ISR_SLAVE	0xA0
++#define	PIC_INT_SEL1	0x4D0
++#define	PIC_INT_SEL2	0x4D1
++// GPIO : I/O SPACE; REG : 32BITS
++#define	GPIOL_OUT_VAL		0x00
++#define	GPIOL_OUT_EN		0x04
++#define	GPIOL_OUT_OD_EN		0x08
++#define	GPIOL_OUT_INVRT_EN	0x0c
++#define	GPIOL_OUT_AUX1_SEL	0x10
++#define	GPIOL_OUT_AUX2_SEL	0x14
++#define	GPIOL_PU_EN		0x18
++#define	GPIOL_PD_EN		0x1c
++#define	GPIOL_IN_EN		0x20
++#define	GPIOL_IN_INVRT_EN	0x24
++#define	GPIOL_IN_FLTR_EN	0x28
++#define	GPIOL_IN_EVNTCNT_EN	0x2c
++#define	GPIOL_IN_READBACK	0x30
++#define	GPIOL_IN_AUX1_SEL	0x34
++#define	GPIOL_EVNT_EN		0x38
++#define	GPIOL_LOCK_EN		0x3c
++#define	GPIOL_IN_POSEDGE_EN	0x40
++#define	GPIOL_IN_NEGEDGE_EN	0x44
++#define	GPIOL_IN_POSEDGE_STS	0x48
++#define	GPIOL_IN_NEGEDGE_STS	0x4c
++#define	GPIOH_OUT_VAL		0x80
++#define	GPIOH_OUT_EN		0x84
++#define	GPIOH_OUT_OD_EN		0x88
++#define	GPIOH_OUT_INVRT_EN	0x8c
++#define	GPIOH_OUT_AUX1_SEL	0x90
++#define	GPIOH_OUT_AUX2_SEL	0x94
++#define	GPIOH_PU_EN		0x98
++#define	GPIOH_PD_EN		0x9c
++#define	GPIOH_IN_EN		0xA0
++#define	GPIOH_IN_INVRT_EN	0xA4
++#define	GPIOH_IN_FLTR_EN	0xA8
++#define	GPIOH_IN_EVNTCNT_EN	0xAc
++#define	GPIOH_IN_READBACK	0xB0
++#define	GPIOH_IN_AUX1_SEL	0xB4
++#define	GPIOH_EVNT_EN		0xB8
++#define	GPIOH_LOCK_EN		0xBc
++#define	GPIOH_IN_POSEDGE_EN	0xC0
++#define	GPIOH_IN_NEGEDGE_EN	0xC4
++#define	GPIOH_IN_POSEDGE_STS	0xC8
++#define	GPIOH_IN_NEGEDGE_STS	0xCC
++// SMB : I/O SPACE, REG : 8BITS WIDTH
++#define	SMB_SDA				0x00
++#define	SMB_STS				0x01
++#define	SMB_STS_SLVSTP		(1 << 7)
++#define	SMB_STS_SDAST		(1 << 6)
++#define	SMB_STS_BER		(1 << 5)
++#define	SMB_STS_NEGACK		(1 << 4)
++#define	SMB_STS_STASTR		(1 << 3)
++#define	SMB_STS_NMATCH		(1 << 2)
++#define	SMB_STS_MASTER		(1 << 1)
++#define	SMB_STS_XMIT		(1 << 0)
++#define	SMB_CTRL_STS			0x02
++#define	SMB_CSTS_TGSTL		(1 << 5)
++#define	SMB_CSTS_TSDA		(1 << 4)
++#define	SMB_CSTS_GCMTCH		(1 << 3)
++#define	SMB_CSTS_MATCH		(1 << 2)
++#define	SMB_CSTS_BB		(1 << 1)
++#define	SMB_CSTS_BUSY		(1 << 0)
++#define	SMB_CTRL1			0x03
++#define	SMB_CTRL1_STASTRE	(1 << 7)
++#define	SMB_CTRL1_NMINTE	(1 << 6)
++#define	SMB_CTRL1_GCMEN		(1 << 5)
++#define	SMB_CTRL1_ACK		(1 << 4)
++#define	SMB_CTRL1_RSVD		(1 << 3)
++#define	SMB_CTRL1_INTEN		(1 << 2)
++#define	SMB_CTRL1_STOP		(1 << 1)
++#define	SMB_CTRL1_START		(1 << 0)
++#define	SMB_ADDR			0x04
++#define	SMB_ADDR_SAEN		(1 << 7)
++#define	SMB_CONTROLLER_ADDR	(0xef << 0)
++#define	SMB_CTRL2			0x05
++#define	SMB_FREQ		(0x20 << 1)	//(0x7f << 1)
++#define	SMB_ENABLE		(0x01 << 0)
++#define	SMB_CTRL3			0x06
++
++/*********************************** LEGACY I/O *******************************/
++
++/*
++ * LEGACY I/O SPACE BASE
++ */
++#define	CS5536_LEGACY_BASE_ADDR		(PCI_IO_BASE_VA | 0x0000)
++
++/*
++ * IDE LEGACY REG : legacy IO address is 0x170~0x177 and 0x376 (0x1f0~0x1f7 and 0x3f6)
++ * all registers are 16bits except the IDE_LEGACY_DATA reg
++ * some registers are read only and the 
++ */
++#define	PRI_IDE_LEGACY_REG(offset) 	(CS5536_LEGACY_BASE_ADDR | 0x1f0 | offset)
++#define	SEC_IDE_LEGACY_REG(offset)	(CS5536_LEGACY_BASE_ADDR | 0x170 | offset)
++
++#define	IDE_LEGACY_DATA		0x00 // RW
++#define	IDE_LEGACY_ERROR	0x01 // RO
++#define	IDE_LEGACY_FEATURE	0x01 // WO
++#define	IDE_LEGACY_SECTOR_COUNT	0x02 // RW
++#define	IDE_LEGACY_SECTOR_NUM	0x03 // RW
++#define	IDE_LEGACY_CYL_LO	0x04 // RW
++#define	IDE_LEGACY_CYL_HI	0x05 // RW
++#define	IDE_LEGACY_HEAD		0x06 // RW
++#define	IDE_LEGACY_HEAD_DRV		(1 << 4)
++#define	IDE_LEGACY_HEAD_LBA		(1 << 6)
++#define	IDE_LEGACY_HEAD_IBM		(1 << 7 | 1 << 5)
++#define	IDE_LEGACY_STATUS	0x07 // RO
++#define IDE_LEGACY_STATUS_ERR		(1 << 0)
++#define	IDE_LEGACY_STATUS_IDX		(1 << 1)
++#define IDE_LEGACY_STATUS_CORR		(1 << 2)
++#define	IDE_LEGACY_STATUS_DRQ		(1 << 3)
++#define	IDE_LEGACY_STATUS_DSC 		(1 << 4)
++#define	IDE_LEGACY_STATUS_DWF		(1 << 5)
++#define	IDE_LEGACY_STATUS_DRDY		(1 << 6)
++#define	IDE_LEGACY_STATUS_BUSY		(1 << 7)
++#define	IDE_LEGACY_COMMAND	0x07 // WO
++#define	IDE_LEGACY_ASTATUS	0x206 // RO
++#define	IDE_LEGACY_CTRL		0x206 // WO
++#define	IDE_LEGACY_CTRL_IDS	0x02
++#define	IDE_LEGACY_CTRL_RST	0x04
++#define	IDE_LEGACY_CTRL_4BIT	0x08
++
++/**********************************************************************************/
++
++#endif	/* _CS5536_H */
+diff --git a/arch/mips/lemote/lm2f/common/cs5536_pci.h b/arch/mips/lemote/lm2f/common/cs5536_pci.h
+new file mode 100644
+index 0000000..eed94fb
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/cs5536_pci.h
+@@ -0,0 +1,181 @@
++/*
++ * cs5536_vsm.h
++ * the definition file of cs5536 Virtual Support Module(VSM).
++ * pci configuration space can be accessed through the VSM, so
++ * there is no need the MSR read/write now, except the spec. MSR
++ * registers which are not implemented yet.
++ *
++ * Author : jlliu <liujl@lemote.com>
++ * Date : 07-07-04
++ *
++ */
++
++#ifndef	_CS5536_PCI_H
++#define	_CS5536_PCI_H
++
++/**********************************************************************/
++
++//#define	TEST_CS5536_USE_FLASH
++//#ifdef	TEST_CS5536_USE_FLASH
++//#define	TEST_CS5536_USE_NOR_FLASH
++//#endif
++#define		TEST_CS5536_USE_EHCI
++#define	TEST_CS5536_USE_UDC
++#define	TEST_CS5536_USE_OTG
++
++/**********************************************************************/
++
++#define	PCI_SPECIAL_SHUTDOWN	1
++#define	CS5536_FLASH_INTR	6
++#define	CS5536_ACC_INTR		9
++#define	CS5536_IDE_INTR		14
++#define	CS5536_USB_INTR		11
++#define	CS5536_UART1_INTR	4
++#define	CS5536_UART2_INTR	3
++
++/************************* PCI BUS DEVICE FUNCTION ********************/
++
++/*
++ * PCI bus device function
++ */
++#define	PCI_BUS_CS5536		0
++#define	PCI_IDSEL_CS5536	14
++#define	PCI_CFG_BASE		0x02000000
++
++#define	CS5536_ISA_FUNC		0
++#define	CS5536_FLASH_FUNC	1
++#define	CS5536_IDE_FUNC		2
++#define	CS5536_ACC_FUNC		3
++#define	CS5536_OHCI_FUNC	4
++#define	CS5536_EHCI_FUNC	5
++#define	CS5536_UDC_FUNC		6
++#define	CS5536_OTG_FUNC		7
++#define	CS5536_FUNC_START	0
++#define	CS5536_FUNC_END		7
++#define	CS5536_FUNC_COUNT	(CS5536_FUNC_END - CS5536_FUNC_START + 1)
++
++/***************************** STANDARD PCI-2.2 EXPANSION ***********************/
++
++/*
++ * PCI configuration space
++ * we have to virtualize the PCI configure space head, so we should
++ * define the necessary IDs and some others.
++ */
++/* VENDOR ID */ 
++#define	CS5536_VENDOR_ID	0x1022
++
++/* DEVICE ID */
++#define	CS5536_ISA_DEVICE_ID		0x2090
++#define	CS5536_FLASH_DEVICE_ID		0x2091
++#define	CS5536_IDE_DEVICE_ID		0x209a
++#define	CS5536_ACC_DEVICE_ID		0x2093
++#define	CS5536_OHCI_DEVICE_ID		0x2094
++#define	CS5536_EHCI_DEVICE_ID		0x2095
++#define	CS5536_UDC_DEVICE_ID		0x2096
++#define	CS5536_OTG_DEVICE_ID		0x2097
++
++/* CLASS CODE : CLASS SUB-CLASS INTERFACE */
++#define	CS5536_ISA_CLASS_CODE		0x060100
++#define	CS5536_FLASH_CLASS_CODE		0x050100
++#define CS5536_IDE_CLASS_CODE		0x010180
++#define	CS5536_ACC_CLASS_CODE		0x040100
++#define	CS5536_OHCI_CLASS_CODE		0x0C0310
++#define	CS5536_EHCI_CLASS_CODE		0x0C0320
++#define	CS5536_UDC_CLASS_CODE		0x0C03FE
++#define	CS5536_OTG_CLASS_CODE		0x0C0380
++
++/* BHLC : BIST HEADER-TYPE LATENCY-TIMER CACHE-LINE-SIZE */
++#define	PCI_NONE_BIST			0x00	//RO not implemented yet.
++#define	PCI_BRIDGE_HEADER_TYPE		0x80	//RO
++#define	PCI_NORMAL_HEADER_TYPE		0x00
++#define	PCI_NORMAL_LATENCY_TIMER	0x00
++#define	PCI_NORMAL_CACHE_LINE_SIZE	0x08	//RW
++
++/* BAR */
++#define	PCI_BAR0_REG			0x10
++#define	PCI_BAR1_REG			0x14
++#define	PCI_BAR2_REG			0x18
++#define	PCI_BAR3_REG			0x1c
++#define	PCI_BAR4_REG			0x20
++#define	PCI_BAR5_REG			0x24
++#define	PCI_BAR_COUNT			6
++#define	PCI_BAR_RANGE_MASK		0xFFFFFFFF
++
++/* CARDBUS CIS POINTER */
++#define	PCI_CARDBUS_CIS_POINTER		0x00000000
++
++/* SUBSYSTEM VENDOR ID  */
++#define	CS5536_SUB_VENDOR_ID		CS5536_VENDOR_ID
++
++/* SUBSYSTEM ID */
++#define	CS5536_ISA_SUB_ID		CS5536_ISA_DEVICE_ID
++#define	CS5536_FLASH_SUB_ID		CS5536_FLASH_DEVICE_ID
++#define	CS5536_IDE_SUB_ID		CS5536_IDE_DEVICE_ID
++#define	CS5536_ACC_SUB_ID		CS5536_ACC_DEVICE_ID
++#define	CS5536_OHCI_SUB_ID		CS5536_OHCI_DEVICE_ID
++#define	CS5536_EHCI_SUB_ID		CS5536_EHCI_DEVICE_ID
++#define	CS5536_UDC_SUB_ID		CS5536_UDC_DEVICE_ID
++#define	CS5536_OTG_SUB_ID		CS5536_OTG_DEVICE_ID
++
++/* EXPANSION ROM BAR */
++#define	PCI_EXPANSION_ROM_BAR		0x00000000
++
++/* CAPABILITIES POINTER */
++#define	PCI_CAPLIST_POINTER		0x00000000
++#define PCI_CAPLIST_USB_POINTER		0x40
++/* INTERRUPT */
++#define	PCI_MAX_LATENCY			0x40
++#define	PCI_MIN_GRANT			0x00
++#define	PCI_DEFAULT_PIN			0x01
++
++/**************************** EXPANSION PCI REG **************************************/
++
++/*
++ * ISA EXPANSION
++ */
++#define	PCI_UART1_INT_REG 	0x50
++#define PCI_UART2_INT_REG	0x54
++#define	PCI_ISA_FIXUP_REG	0x58
++
++/*
++ * FLASH EXPANSION
++ */
++#define	PCI_FLASH_INT_REG		0x50
++#define	PCI_NOR_FLASH_CTRL_REG		0x40
++#define	PCI_NOR_FLASH_T01_REG		0x44
++#define	PCI_NOR_FLASH_T23_REG		0x48
++#define	PCI_NAND_FLASH_TDATA_REG	0x60
++#define	PCI_NAND_FLASH_TCTRL_REG	0x64
++#define	PCI_NAND_FLASH_RSVD_REG		0x68
++#define	PCI_FLASH_SELECT_REG		0x70
++
++/*
++ * IDE EXPANSION
++ */ 
++#define	PCI_IDE_CFG_REG		0x40
++#define	CS5536_IDE_FLASH_SIGNATURE	0xDEADBEEF
++#define	PCI_IDE_DTC_REG		0x48
++#define	PCI_IDE_CAST_REG	0x4C
++#define	PCI_IDE_ETC_REG		0x50
++#define	PCI_IDE_PM_REG		0x54
++#define	PCI_IDE_INT_REG		0x60
++
++/*
++ * ACC EXPANSION
++ */
++#define	PCI_ACC_INT_REG		0x50
++
++/*
++ * OHCI EXPANSION : INTTERUPT IS IMPLEMENTED BY THE OHCI
++ */
++#define	PCI_OHCI_PM_REG		0x40
++#define	PCI_OHCI_INT_REG	0x50
++
++/*
++ * EHCI EXPANSION
++ */
++#define	PCI_EHCI_LEGSMIEN_REG	0x50
++#define	PCI_EHCI_LEGSMISTS_REG	0x54
++#define	PCI_EHCI_FLADJ_REG	0x60
++
++#endif /* _CS5536_PCI_H_ */
+diff --git a/arch/mips/lemote/lm2f/common/cs5536_vsm.c b/arch/mips/lemote/lm2f/common/cs5536_vsm.c
+new file mode 100644
+index 0000000..01b06b1
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/cs5536_vsm.c
+@@ -0,0 +1,2294 @@
++/*
++ * pci_machdep_cs5536.c  
++ * 	the Virtual Support Module(VSM) for virtulize the PCI configure  
++ * 	space. so user can access the PCI configure space directly as
++ *	a normal multi-function PCI device which following the PCI-2.2 spec.
++ *
++ * Author : jlliu <liujl@lemote.com>
++ * Date : 07-07-05
++ *
++ */
++#include <linux/types.h>
++
++#include "cs5536.h"
++#include "cs5536_pci.h"
++#include "pcireg.h"
++
++extern void _wrmsr(u32 reg, u32 hi, u32 lo);
++extern void _rdmsr(u32 reg, u32 *hi, u32 *lo);
++
++/******************************INTERNAL USED FUNCTIONS***********************************/
++
++/*
++ * divil_lbar_enable_disable : enable/disable the divil module bar space.
++ * For all the DIVIL module LBAR, you should control the DIVIL LBAR reg
++ * and the RCONFx(0~5) reg to use the modules.
++ */
++static void divil_lbar_enable_disable(int enable)
++{
++	u32 hi, lo;
++	
++	/* 
++	 * The DIVIL IRQ is not used yet. and make the RCONF0 reserved.
++	 */
++	
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), hi, lo);
++
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), hi, lo);
++
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), hi, lo);
++
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_PMS), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_PMS), hi, lo);
++
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_ACPI), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_ACPI), hi, lo);
++	
++	/*
++	 * RCONF0 is reserved to the DIVIL IRQ mdoule
++	 */
++#if	0	
++	_rdmsr(SB_MSR_REG(SB_R1), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R1), hi, lo);
++	
++	_rdmsr(SB_MSR_REG(SB_R2), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R2), hi, lo);
++
++	_rdmsr(SB_MSR_REG(SB_R3), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R3), hi, lo);
++	
++	_rdmsr(SB_MSR_REG(SB_R4), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R4), hi, lo);
++
++	_rdmsr(SB_MSR_REG(SB_R5), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R5), hi, lo);
++#endif	
++	return;
++}
++
++#ifdef	TEST_CS5536_USE_FLASH
++/*
++ * flash_lbar_enable_disable : enable or disable the region of flashs(NOR or NAND)
++ * the same as the DIVIL other modules above, two groups of regs should be modified
++ * here to control the region. DIVIL flash LBAR and the RCONFx(6~9 reserved).
++ */
++static void flash_lbar_enable_disable(int enable)
++{
++	u32 hi, lo;
++	
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), hi, lo);
++
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH1), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH1), hi, lo);
++
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH2), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH2), hi, lo);
++
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH3), &hi, &lo);
++	if(enable)
++		hi |= 0x01;
++	else
++		hi &= ~0x01;
++	_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH3), hi, lo);
++
++	_rdmsr(SB_MSR_REG(SB_R6), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R6), hi, lo);
++	
++	_rdmsr(SB_MSR_REG(SB_R7), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R7), hi, lo);
++	
++	_rdmsr(SB_MSR_REG(SB_R8), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R8), hi, lo);
++
++	_rdmsr(SB_MSR_REG(SB_R9), &hi, &lo);
++	if(enable)
++		lo |= 0x01;
++	else
++		lo &= ~0x01;
++	_wrmsr(SB_MSR_REG(SB_R9), hi, lo);
++	
++	return;
++}
++#endif
++
++
++/**********************************MODULES*********************************************/
++
++/*
++ * isa_write : isa write transfering.
++ * WE assume that the ISA is not the BUS MASTER.!!!
++ */
++/* FAST BACK TO BACK '1' for BUS MASTER '0' for BUS SALVE */
++/* COMMAND :
++ * 	bit0 : IO SPACE ENABLE
++ *	bit1 : MEMORY SPACE ENABLE(ignore)
++ *	bit2 : BUS MASTER ENABLE(ignore)
++ *	bit3 : SPECIAL CYCLE(ignore)? default is ignored.
++ *	bit4 : MEMORY WRITE and INVALIDATE(ignore)
++ *	bit5 : VGA PALETTE(ignore)
++ *	bit6 : PARITY ERROR(ignore)? : default is ignored.
++ *	bit7 : WAIT CYCLE CONTROL(ignore)
++ *	bit8 : SYSTEM ERROR(ignore)
++ *	bit9 : FAST BACK TO BACK(ignore)
++ *	bit10-bit15 : RESERVED
++ * STATUS :
++ *	bit0-bit3 : RESERVED
++ *	bit4 : CAPABILITY LIST(ignore)
++ *	bit5 : 66MHZ CAPABLE
++ *	bit6 : RESERVED
++ *	bit7 : FAST BACK TO BACK(ignore)
++ *	bit8 : DATA PARITY ERROR DETECED(ignore)
++ *	bit9-bit10 : DEVSEL TIMING(ALL MEDIUM)
++ *	bit11: SIGNALED TARGET ABORT
++ *	bit12: RECEIVED TARGET ABORT
++ *	bit13: RECEIVED MASTER ABORT
++ *	bit14: SIGNALED SYSTEM ERROR
++ *	bit15: DETECTED PARITY ERROR
++ */
++static void pci_isa_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++	u32 temp;
++
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// command
++			if( value & PCI_COMMAND_IO_ENABLE ){
++				divil_lbar_enable_disable(1);
++			}else{
++				divil_lbar_enable_disable(0);
++			}
++#if	0
++			/* PER response enable or disable. */
++			if( value & PCI_COMMAND_PARITY_ENABLE ){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				lo |= SB_PARE_ERR_EN;
++				_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);			
++			}else{
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				lo &= ~SB_PARE_ERR_EN;
++				_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);			
++			}
++#endif
++			// status
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			temp = lo & 0x0000ffff;
++			if( (value & PCI_STATUS_TARGET_TARGET_ABORT) && 
++				(lo & SB_TAS_ERR_EN) ){
++				temp |= SB_TAS_ERR_FLAG;
++			}
++			if( (value & PCI_STATUS_MASTER_TARGET_ABORT) &&
++				(lo & SB_TAR_ERR_EN) ){
++				temp |= SB_TAR_ERR_FLAG;
++			}
++			if( (value & PCI_STATUS_MASTER_ABORT) &&
++				(lo & SB_MAR_ERR_EN) ){
++				temp |= SB_MAR_ERR_FLAG;
++			}
++			if( (value & PCI_STATUS_PARITY_DETECT) &&
++				(lo & SB_PARE_ERR_EN) ){
++				temp |= SB_PARE_ERR_FLAG; 
++			}
++			lo = temp;
++			_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++			break;
++		case PCI_BHLC_REG :
++			value &= 0x0000ff00;
++			_rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);
++			hi &= 0xffffff00;
++			hi |= (value >> 8);
++			_wrmsr(SB_MSR_REG(SB_CTRL), hi, lo);
++			break;
++		case PCI_BAR0_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_SMB_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// SMB NATIVE IO space has 8bytes
++				hi = 0x0000f001;
++				lo = value & 0x0000fff8;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), hi, lo);
++				
++				// RCONFx is 4bytes in units for IO space.
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_SMB_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R0), hi, lo);
++			}
++			break;
++		case PCI_BAR1_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_GPIO_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// GPIO NATIVE reg is 256bytes
++				hi = 0x0000f001;
++				lo = value & 0x0000ff00;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), hi, lo);
++
++				// RCONFx is 4bytes in units for IO space
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_GPIO_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R1), hi, lo);
++			}
++			break;
++		case PCI_BAR2_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_MFGPT_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// MFGPT NATIVE reg is 64bytes
++				hi = 0x0000f001;
++				lo = value & 0x0000ffc0;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), hi, lo);
++
++				// RCONFx is 4bytes in units for IO space
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_MFGPT_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R2), hi, lo);
++			}
++			break;
++		case PCI_BAR3_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_IRQ_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// IRQ NATIVE reg is 32bytes
++				hi = 0x0000f001;
++				lo = value & 0x0000ffc0;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_IRQ), hi, lo);
++
++				// RCONFx is 4bytes in units for IO space
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_IRQ_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R3), hi, lo);
++			}
++			break;
++		case PCI_BAR4_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_PMS_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// PMS NATIVE reg is 128bytes
++				hi = 0x0000f001;
++				lo = value & 0x0000ff80;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_PMS), hi, lo);
++
++				// RCONFx is 4bytes in units for IO space.
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_PMS_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R4), hi, lo);
++			}
++			break;
++		case PCI_BAR5_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_ACPI_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// ACPI NATIVE reg is 32bytes
++				hi = 0x0000f001;
++				lo = value & 0x0000ffe0;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_ACPI), hi, lo);
++				
++				// RCONFx is 4bytes in units for IO space.
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_ACPI_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R5), hi, lo);
++			}
++			break;
++		case PCI_UART1_INT_REG :
++			if(value){
++			/* enable uart1 interrupt in PIC */	
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo);
++				lo &= ~(0xf << 24);
++				lo |= (CS5536_UART1_INTR << 24);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo);
++			}else{
++			/* disable uart1 interrupt in PIC */
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo);
++				lo &= ~(0xf << 24);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo);
++			}
++			break;
++		case PCI_UART2_INT_REG :
++			if(value){
++			/* enable uart2 interrupt in PIC */	
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo);
++				lo &= ~(0xf << 28);
++				lo |= (CS5536_UART2_INTR << 28);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo);
++			}else{
++			/* disable uart2 interrupt in PIC */
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo);
++				lo &= ~(0xf << 28);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo);
++			}
++			break;
++		case PCI_ISA_FIXUP_REG :
++			if(value){
++				/* enable the TARGET ABORT/MASTER ABORT etc. */
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				lo |= 0x00000063;
++				_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++			}
++
++		default :
++			/* ALL OTHER PCI CONFIG SPACE HEADER IS NOT IMPLEMENTED. */
++			break;			
++	}
++	
++	return;
++}
++
++/*
++ * isa_read : isa read transfering.
++ * we assume that the ISA is not the BUS MASTER. 
++ */
++ 
++ /* COMMAND :
++ * 	bit0 : IO SPACE ENABLE
++ *	bit1 : MEMORY SPACE ENABLE(ignore)
++ *	bit2 : BUS MASTER ENABLE(ignore)
++ *	bit3 : SPECIAL CYCLE(ignore)? default is ignored.
++ *	bit4 : MEMORY WRITE and INVALIDATE(ignore)
++ *	bit5 : VGA PALETTE(ignore)
++ *	bit6 : PARITY ERROR(ignore)? : default is ignored.
++ *	bit7 : WAIT CYCLE CONTROL(ignore)
++ *	bit8 : SYSTEM ERROR(ignore)
++ *	bit9 : FAST BACK TO BACK(ignore)
++ *	bit10-bit15 : RESERVED
++ * STATUS :
++ *	bit0-bit3 : RESERVED
++ *	bit4 : CAPABILITY LIST(ignore)
++ *	bit5 : 66MHZ CAPABLE
++ *	bit6 : RESERVED
++ *	bit7 : FAST BACK TO BACK(ignore)
++ *	bit8 : DATA PARITY ERROR DETECED(ignore)?
++ *	bit9-bit10 : DEVSEL TIMING(ALL MEDIUM)
++ *	bit11: SIGNALED TARGET ABORT
++ *	bit12: RECEIVED TARGET ABORT
++ *	bit13: RECEIVED MASTER ABORT
++ *	bit14: SIGNALED SYSTEM ERROR
++ *	bit15: DETECTED PARITY ERROR(?)
++ */
++
++static u32 pci_isa_read_reg(int reg)
++{
++	u32 conf_data;
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_ISA_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			conf_data = 0;
++			// COMMAND
++			// we just check the first LBAR for the IO enable bit,
++			// maybe we should changed later.
++			_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), &hi, &lo);
++			if(hi & 0x01){
++				conf_data |= PCI_COMMAND_IO_ENABLE;
++			}
++			//conf_data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
++#if	0
++			conf_data |= PCI_COMMAND_SPECIAL_ENABLE;
++#endif
++#if	0
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_EN){
++				conf_data |= PCI_COMMAND_PARITY_ENABLE;
++			}else{
++				conf_data &= ~PCI_COMMAND_PARITY_ENABLE;
++			}
++#endif
++			// STATUS	
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++#if	1
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++#endif
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_TAS_ERR_FLAG)
++				conf_data |= PCI_STATUS_TARGET_TARGET_ABORT;
++			if(lo & SB_TAR_ERR_FLAG)
++				conf_data |= PCI_STATUS_MASTER_TARGET_ABORT;
++			if(lo & SB_MAR_ERR_FLAG)
++				conf_data |= PCI_STATUS_MASTER_ABORT;
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_DETECT;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_CHIP_REV_ID), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_ISA_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			_rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);
++			hi &= 0x000000f8;
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_BRIDGE_HEADER_TYPE << 16) |
++				(hi << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		/*
++		 * we only use the LBAR of DIVIL, no RCONF used. 
++		 * all of them are IO space.
++		 */
++		case PCI_BAR0_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_SMB_FLAG){
++				conf_data = CS5536_SMB_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_SMB_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), &hi, &lo);
++				conf_data = lo & 0x0000fff8;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_BAR1_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_GPIO_FLAG){
++				conf_data = CS5536_GPIO_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_GPIO_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &lo);
++				conf_data = lo & 0x0000ff00;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_BAR2_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_MFGPT_FLAG){
++				conf_data = CS5536_MFGPT_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_MFGPT_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), &hi, &lo);
++				conf_data = lo & 0x0000ffc0;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++#if	1
++		case PCI_BAR3_REG :
++			conf_data = 0;
++			break;
++#else
++		case PCI_BAR3_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_IRQ_FLAG){
++				conf_data = CS5536_IRQ_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_IRQ_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_IRQ), &hi, &lo);
++				conf_data = lo & 0x0000ffc0;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++#endif
++		case PCI_BAR4_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_PMS_FLAG){
++				conf_data = CS5536_PMS_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_PMS_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_PMS), &hi, &lo);
++				conf_data = lo & 0x0000ff80;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_BAR5_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_ACPI_FLAG){
++				conf_data = CS5536_ACPI_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_ACPI_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_ACPI), &hi, &lo);
++				conf_data = lo & 0x0000ffe0;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_ISA_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(0x00 << 8) | 0x00;
++			break;
++		default :
++			conf_data = 0;
++			break;
++	}
++	
++	return conf_data;
++}
++
++#ifdef	TEST_CS5536_USE_FLASH
++
++#ifndef	TEST_CS5536_USE_NOR_FLASH	/* for nand flash */
++static void pci_flash_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// command
++			if( value & PCI_COMMAND_MEM_ENABLE ){
++				flash_lbar_enable_disable(1);
++			}else{
++				flash_lbar_enable_disable(0);
++			}
++			// STATUS
++			if(value & PCI_STATUS_PARITY_ERROR){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				if(lo & SB_PARE_ERR_FLAG){
++					lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
++					_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++				}				
++			}
++			break;
++		case PCI_BAR0_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				// make the flag for reading the bar length.
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_FLSH0_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( (value & 0x01) == 0x00 ){
++				// mem space nand flash native reg base addr
++				hi = 0xfffff007;
++				lo = value & 0xfffff000;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), hi, lo);
++	
++				// RCONFx is 4KB in units for mem space.
++				hi = ((value & 0xfffff000) << 12) | ( (CS5536_FLSH0_LENGTH & 0xfffff000) - (1 << 12) ) | 0x00;
++				lo = ((value & 0xfffff000) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R6), hi, lo);			
++			}
++			break;
++		case PCI_BAR1_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_FLSH1_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( (value & 0x01) == 0x00 ){
++				// mem space nand flash native reg base addr
++				hi = 0xfffff007;
++				lo = value & 0xfffff000;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH1), hi, lo);
++	
++				// RCONFx is 4KB in units for mem space.
++				hi = ((value & 0xfffff000) << 12) | ( (CS5536_FLSH1_LENGTH & 0xfffff000) - (1 << 12) ) | 0x00;
++				lo = ((value & 0xfffff000) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R7), hi, lo);
++			}
++			break;
++		case PCI_BAR2_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_FLSH2_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( (value & 0x01) == 0x00 ){
++				// mem space nand flash native reg base addr
++				hi = 0xfffff007;
++				lo = value & 0xfffff000;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH2), hi, lo);
++	
++				// RCONFx is 4KB in units for mem space.
++				hi = ((value & 0xfffff000) << 12) | ( (CS5536_FLSH2_LENGTH & 0xfffff000) - (1 << 12) ) | 0x00;
++				lo = ((value & 0xfffff000) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R8), hi, lo);
++			}
++			break;		
++		case PCI_BAR3_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_FLSH3_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( (value & 0x01) == 0x00 ){
++				// mem space nand flash native reg base addr
++				hi = 0xfffff007;
++				lo = value & 0xfffff000;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH3), hi, lo);
++	
++				// RCONFx is 4KB in units for mem space.
++				hi = ((value & 0xfffff000) << 12) | ( (CS5536_FLSH3_LENGTH & 0xfffff000)- (1 << 12) ) | 0x00;
++				lo = ((value & 0xfffff000) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R9), hi, lo);
++			}
++			break;
++		case PCI_FLASH_INT_REG :
++			if(value){
++			/* enable all the flash interrupt in PIC */	
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
++				lo &= ~(0xf << PIC_YSEL_LOW_FLASH_SHIFT);
++				lo |= (CS5536_FLASH_INTR << PIC_YSEL_LOW_FLASH_SHIFT);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
++			}else{
++			/* disable all the flash interrupt in PIC */
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
++				lo &= ~(0xf << PIC_YSEL_LOW_FLASH_SHIFT);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
++			}
++			break;
++		case PCI_NAND_FLASH_TDATA_REG :
++			hi = 0;
++			lo = value;
++			_wrmsr(DIVIL_MSR_REG(NANDF_DATA), hi, lo);
++			break;
++		case PCI_NAND_FLASH_TCTRL_REG :
++			hi = 0;
++			lo = value & 0x00000fff;
++			_wrmsr(DIVIL_MSR_REG(NANDF_CTRL), hi, lo);
++			break;
++		case PCI_NAND_FLASH_RSVD_REG :
++			hi = 0;
++			lo = value;
++			_wrmsr(DIVIL_MSR_REG(NANDF_RSVD), hi, lo);
++			break;
++		case PCI_FLASH_SELECT_REG :
++			if(value == CS5536_IDE_FLASH_SIGNATURE){
++				_rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
++				lo &= ~0x01;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo);
++			}
++			break;
++		default :
++			break;
++	}
++	
++	return;
++}
++
++static u32 pci_flash_read_reg(int reg)
++{
++	u32 conf_data;
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_FLASH_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			conf_data = 0;
++			// COMMAND
++			// we just read one lbar for returning.
++			_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), &hi, &lo);
++			if(hi & 0x01)
++				conf_data |= PCI_COMMAND_MEM_ENABLE;
++			//STATUS
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_ERROR;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(DIVIL_MSR_REG(DIVIL_CAP), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_FLASH_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_NORMAL_HEADER_TYPE << 16) |
++				(PCI_NORMAL_LATENCY_TIMER << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		case PCI_BAR0_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_FLSH0_FLAG){
++				conf_data = CS5536_FLSH0_RANGE | PCI_MAPREG_TYPE_MEM;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_FLSH0_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), &hi, &lo);
++				conf_data = lo;
++				conf_data &= ~0x0f;
++			}
++			break;
++		case PCI_BAR1_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_FLSH1_FLAG){
++				conf_data = CS5536_FLSH1_RANGE | PCI_MAPREG_TYPE_MEM;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_FLSH1_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH1), &hi, &lo);
++				conf_data = lo;
++				conf_data &= ~0x0f;
++			}
++			break;
++		case PCI_BAR2_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_FLSH2_FLAG){
++				conf_data = CS5536_FLSH2_RANGE | PCI_MAPREG_TYPE_MEM;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_FLSH2_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH2), &hi, &lo);
++				conf_data = lo;
++				conf_data &= ~0x0f;
++			}
++			break;
++		case PCI_BAR3_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_FLSH3_FLAG){
++				conf_data = CS5536_FLSH3_RANGE | PCI_MAPREG_TYPE_MEM;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_FLSH3_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH3), &hi, &lo);
++				conf_data = lo;
++				conf_data &= ~0x0f;
++			}
++			break;	
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_FLASH_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_FLASH_INTR);
++			break;
++		case PCI_NAND_FLASH_TDATA_REG :
++			_rdmsr(DIVIL_MSR_REG(NANDF_DATA), &hi, &lo);
++			conf_data = lo;
++			break;
++		case PCI_NAND_FLASH_TCTRL_REG :
++			_rdmsr(DIVIL_MSR_REG(NANDF_CTRL), &hi, &lo);
++			conf_data = lo & 0x00000fff;
++			break;
++		case PCI_NAND_FLASH_RSVD_REG :
++			_rdmsr(DIVIL_MSR_REG(NANDF_RSVD), &hi, &lo);
++			conf_data = lo;
++			break;
++		case PCI_FLASH_SELECT_REG :
++			_rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
++			conf_data = lo & 0x01;
++			break;
++
++		}
++	return 0;
++}
++
++#else /* nor flash */
++
++static void pci_flash_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// command
++			if( value & PCI_COMMAND_IO_ENABLE ){
++				flash_lbar_enable_disable(1);
++			}else{
++				flash_lbar_enable_disable(0);
++			}
++			// STATUS
++			if(value & PCI_STATUS_PARITY_ERROR){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				if(lo & SB_PARE_ERR_FLAG){
++					lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
++					_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++				}				
++			}
++			break;
++		case PCI_BAR0_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_FLSH0_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// IO space of 16bytes nor flash
++				hi = 0x0000fff1;
++				lo = value & 0x0000fff0;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), hi, lo);
++	
++				// RCONFx used for 16bytes reserved.
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_FLSH0_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R6), hi, lo);
++			}
++			break;
++		case PCI_BAR1_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_FLSH1_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// IO space of 16bytes nor flash
++				hi = 0x0000fff1;
++				lo = value & 0x0000fff0;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH1), hi, lo);
++	
++				// RCONFx used for 16bytes reserved.
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_FLSH1_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R7), hi, lo);			
++			}
++			break;
++		case PCI_BAR2_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_FLSH2_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				hi = 0x0000fff1;
++				lo = value & 0x0000fff0;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH2), hi, lo);
++	
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_FLSH2_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R8), hi, lo);				
++			}
++			break;		
++		case PCI_BAR3_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_FLSH3_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				// 16bytes for nor flash
++				hi = 0x0000fff1;
++				lo = value & 0x0000fff0;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH3), hi, lo);
++	
++				// 16bytes of IO space of RCONFx region.
++				hi = ((value & 0x000ffffc) << 12) | ((CS5536_FLSH3_LENGTH - 4) << 12) | 0x01;
++				lo = ((value & 0x000ffffc) << 12) | 0x01;
++				_wrmsr(SB_MSR_REG(SB_R9), hi, lo);	
++			}
++			break;
++			
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_FLASH_INTR);
++			break;
++		case PCI_FLASH_INT_REG :
++			if(value){
++			/* enable all the flash interrupt in PIC */	
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
++				lo &= ~(0xf << PIC_YSEL_LOW_FLASH_SHIFT);
++				lo |= (CS5536_FLASH_INTR << PIC_YSEL_LOW_FLASH_SHIFT);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
++			}else{
++			/* disable all the flash interrupt in PIC */
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
++				lo &= ~(0xf << PIC_YSEL_LOW_FLASH_SHIFT);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
++			}
++			break;
++		case PCI_NOR_FLASH_CTRL_REG :
++			hi = 0;
++			lo = value & 0x000000ff;
++			_wrmsr(DIVIL_MSR_REG(NORF_CTRL), hi, lo);
++			break;
++		case PCI_NOR_FLASH_T01_REG :
++			hi = 0;
++			lo = value;
++			_wrmsr(DIVIL_MSR_REG(NORF_T01), hi, lo);
++			break;
++		case PCI_NOR_FLASH_T23_REG :
++			hi = 0;
++			lo = value;
++			_wrmsr(DIVIL_MSR_REG(NORF_T23), hi, lo);
++			break;
++		case PCI_FLASH_SELECT_REG :
++			if(value == CS5536_IDE_FLASH_SIGNATURE){
++				_rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
++				lo &= ~0x01;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo);
++			}
++			break;
++
++		default :
++			break;			
++	}
++	
++	return;
++}
++
++static u32 pci_flash_read_reg(int reg)
++{
++	u32 conf_data;
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_FLASH_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			conf_data = 0;
++			// COMMAND
++			// we just check one flash bar for returning.
++			_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), &hi, &lo);
++			if(hi & 0x01)
++				conf_data |= PCI_COMMAND_IO_ENABLE;
++			//STATUS
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_ERROR;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(DIVIL_MSR_REG(DIVIL_CAP), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_FLASH_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_NORMAL_HEADER_TYPE << 16) |
++				(PCI_NORMAL_LATENCY_TIMER << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		case PCI_BAR0_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_FLSH0_FLAG){
++				conf_data = CS5536_FLSH0_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_FLSH0_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH0), &hi, &lo);
++				conf_data = lo & 0x0000ffff;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_BAR1_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_FLSH1_FLAG){
++				conf_data = CS5536_FLSH1_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_FLSH1_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH1), &hi, &lo);
++				conf_data = lo & 0x0000ffff;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_BAR2_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_FLSH2_FLAG){
++				conf_data = CS5536_FLSH2_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_FLSH2_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH2), &hi, &lo);
++				conf_data = lo & 0x0000ffff;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_BAR3_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_FLSH3_FLAG){
++				conf_data = CS5536_FLSH3_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_FLSH3_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_FLSH3), &hi, &lo);
++				conf_data = lo & 0x0000ffff;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;	
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_FLASH_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_FLASH_INTR);
++			break;
++		case PCI_NOR_FLASH_CTRL_REG :
++			_rdmsr(DIVIL_MSR_REG(NORF_CTRL), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			break;
++		case PCI_NOR_FLASH_T01_REG :
++			_rdmsr(DIVIL_MSR_REG(NORF_T01), &hi, &lo);
++			conf_data = lo;
++			break;
++		case PCI_NOR_FLASH_T23_REG :
++			_rdmsr(DIVIL_MSR_REG(NORF_T23), &hi, &lo);
++			conf_data = lo;
++			break;
++		default :
++			conf_data = 0;
++			break;
++	}
++	return conf_data;
++}
++#endif  /* TEST_CS5536_USE_NOR_FLASH */
++
++#else	/* TEST_CS5536_USE_FLASH */
++
++static void pci_flash_write_reg(int reg, u32 value)
++{
++	return;
++}
++
++static u32 pci_flash_read_reg(int reg)
++{
++	return 0xffffffff;
++}
++
++#endif	/* TEST_CS5536_USE_FLASH */
++
++/*
++ * ide_write : ide write transfering
++ */
++static void pci_ide_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// COMMAND
++			if(value & PCI_COMMAND_MASTER_ENABLE){
++				_rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
++				lo |= (0x03 << 4);
++				_wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo);			
++			}else{
++				_rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
++				lo &= ~(0x03 << 4);
++				_wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo);	
++			}
++			// STATUS
++			if(value & PCI_STATUS_PARITY_ERROR){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				if(lo & SB_PARE_ERR_FLAG){
++					lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
++					_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++				}				
++			}
++			break;
++		case PCI_BHLC_REG :
++			value &= 0x0000ff00;
++			_rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);
++			hi &= 0xffffff00;
++			hi |= (value >> 8);
++			_wrmsr(SB_MSR_REG(SB_CTRL), hi, lo);
++			break;
++		case PCI_BAR4_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_IDE_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if(value & 0x01){
++				hi = 0x00000000;
++				//lo = ((value & 0x0fffffff) << 4) | 0x001;
++				lo = (value & 0xfffffff0) | 0x1;
++				_wrmsr(IDE_MSR_REG(IDE_IO_BAR), hi, lo);
++
++				value &= 0xfffffffc;
++				hi = 0x60000000 | ((value & 0x000ff000) >> 12);
++				lo = 0x000ffff0 | ((value & 0x00000fff) << 20);
++				_wrmsr(GLIU_MSR_REG(GLIU_IOD_BM2), hi, lo);
++	   		}
++			break;
++		case PCI_IDE_CFG_REG :
++			if(value == CS5536_IDE_FLASH_SIGNATURE){
++				_rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo);
++				lo |= 0x01;
++				_wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo);
++			}else{
++				hi = 0;
++				lo = value;
++				_wrmsr(IDE_MSR_REG(IDE_CFG), hi, lo);			
++			}
++			break;
++		case PCI_IDE_DTC_REG :
++			hi = 0;
++			lo = value;
++			_wrmsr(IDE_MSR_REG(IDE_DTC), hi, lo);
++			break;
++		case PCI_IDE_CAST_REG :
++			hi = 0;
++			lo = value;
++			_wrmsr(IDE_MSR_REG(IDE_CAST), hi, lo);
++			break;
++		case PCI_IDE_ETC_REG :
++			hi = 0;
++			lo = value;
++			_wrmsr(IDE_MSR_REG(IDE_ETC), hi, lo);
++			break;
++		case PCI_IDE_PM_REG :
++			hi = 0;
++			lo = value;
++			_wrmsr(IDE_MSR_REG(IDE_INTERNAL_PM), hi, lo);
++			break;
++		default :
++			break;			
++	}
++	
++	return;
++}
++
++/*
++ * ide_read : ide read tranfering.
++ */
++static u32 pci_ide_read_reg(int reg)
++{
++	u32 conf_data;
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_IDE_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			conf_data = 0;
++			// COMMAND
++			_rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo);
++			if(lo & 0xfffffff0)
++				conf_data |= PCI_COMMAND_IO_ENABLE;
++			_rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
++			if( (lo & 0x30) == 0x30 )
++				conf_data |= PCI_COMMAND_MASTER_ENABLE;
++			/* conf_data |= PCI_COMMAND_BACKTOBACK_ENABLE??? HOW TO GET..*/
++			//STATUS
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_ERROR;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(IDE_MSR_REG(IDE_CAP), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_IDE_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			_rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo);
++			hi &= 0x000000f8;
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_NORMAL_HEADER_TYPE << 16) |
++				(hi << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		case PCI_BAR0_REG :
++			conf_data = 0x00000000;
++			break;
++		case PCI_BAR1_REG :
++			conf_data = 0x00000000;
++			break;
++		case PCI_BAR2_REG :
++			conf_data = 0x00000000;
++			break;
++		case PCI_BAR3_REG :
++			conf_data = 0x00000000;
++			break;
++		case PCI_BAR4_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_IDE_FLAG){
++				conf_data = CS5536_IDE_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_IDE_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo);
++				//conf_data = lo >> 4;
++				conf_data = lo & 0xfffffff0;
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_BAR5_REG :
++			conf_data = 0x00000000;
++			break;
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_IDE_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_IDE_INTR);
++			break;
++		case PCI_IDE_CFG_REG :
++			_rdmsr(IDE_MSR_REG(IDE_CFG), &hi, &lo);
++			conf_data = lo;
++			break;
++		case PCI_IDE_DTC_REG :
++			_rdmsr(IDE_MSR_REG(IDE_DTC), &hi, &lo);
++			conf_data = lo;
++			break;
++		case PCI_IDE_CAST_REG :
++			_rdmsr(IDE_MSR_REG(IDE_CAST), &hi, &lo);
++			conf_data = lo;
++			break;
++		case PCI_IDE_ETC_REG :
++			_rdmsr(IDE_MSR_REG(IDE_ETC), &hi, &lo);
++			conf_data = lo;
++		case PCI_IDE_PM_REG :
++			_rdmsr(IDE_MSR_REG(IDE_INTERNAL_PM), &hi, &lo);
++			conf_data = lo;
++			break;
++			
++		default :
++			conf_data = 0;
++			break;
++	}
++
++	return conf_data;
++}
++
++static void pci_acc_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// COMMAND
++			if(value & PCI_COMMAND_MASTER_ENABLE){
++				_rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
++				lo |= (0x03 << 8);
++				_wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo);			
++			}else{
++				_rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
++				lo &= ~(0x03 << 8);
++				_wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo);	
++			}
++			// STATUS
++			if(value & PCI_STATUS_PARITY_ERROR){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				if(lo & SB_PARE_ERR_FLAG){
++					lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
++					_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++				}				
++			}
++			break;
++		case PCI_BAR0_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_ACC_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( value & 0x01 ){
++				value &= 0xfffffffc;
++				hi = 0xA0000000 | ((value & 0x000ff000) >> 12);
++				lo = 0x000fff80 | ((value & 0x00000fff) << 20);
++				_wrmsr(GLIU_MSR_REG(GLIU_IOD_BM1), hi, lo);
++			}
++			break;
++		case PCI_ACC_INT_REG :
++			if(value){
++			/* enable all the acc interrupt in PIC */	
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
++				lo &= ~(0xf << PIC_YSEL_LOW_ACC_SHIFT);
++				lo |= (CS5536_ACC_INTR << PIC_YSEL_LOW_ACC_SHIFT);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
++			}else{
++			/* disable all the usb interrupt in PIC */
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
++				lo &= ~(0xf << PIC_YSEL_LOW_ACC_SHIFT);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
++			}
++			break;
++		default :
++			break;			
++	}
++
++	return;
++}
++
++static u32 pci_acc_read_reg(int reg)
++{
++	u32 hi, lo;
++	u32 conf_data;
++
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_ACC_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			
++			conf_data = 0;
++			// COMMAND
++			_rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo);
++			if( ( (lo & 0xfff00000) || (hi & 0x000000ff) ) 
++					&& ((hi & 0xf0000000) == 0xa0000000) )
++				conf_data |= PCI_COMMAND_IO_ENABLE;
++			_rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo);
++			if( (lo & 0x300) == 0x300 )
++				conf_data |= PCI_COMMAND_MASTER_ENABLE;
++			/* conf_data |= PCI_COMMAND_BACKTOBACK_ENABLE??? HOW TO GET..*/
++			//STATUS
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_ERROR;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(ACC_MSR_REG(ACC_CAP), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_ACC_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_NORMAL_HEADER_TYPE << 16) |
++				(PCI_NORMAL_LATENCY_TIMER << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		case PCI_BAR0_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_ACC_FLAG){
++				conf_data = CS5536_ACC_RANGE | PCI_MAPREG_TYPE_IO;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_ACC_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo);
++				conf_data = (hi & 0x000000ff) << 12;
++				conf_data |= (lo & 0xfff00000) >> 20; 
++				conf_data |= 0x01;
++				conf_data &= ~0x02;
++			}
++			break;
++		case PCI_BAR1_REG :
++			conf_data = 0x000000;
++			break;		
++		case PCI_BAR2_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR3_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR4_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR5_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_ACC_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_USB_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_ACC_INTR);
++			break;
++		default :
++			conf_data = 0;
++			break;
++	}
++
++	return conf_data;
++}
++
++
++/*
++ * ohci_write : ohci write tranfering.
++ */
++static void pci_ohci_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// COMMAND
++			if(value & PCI_COMMAND_MASTER_ENABLE){
++				_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
++				hi |= (1 << 2);
++				_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
++				hi &= ~(1 << 2);
++				_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);
++			}
++			if(value & PCI_COMMAND_MEM_ENABLE){
++				_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
++				hi |= (1 << 1);
++				_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
++				hi &= ~(1 << 1);
++				_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);				
++			}
++			// STATUS
++			if(value & PCI_STATUS_PARITY_ERROR){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				if(lo & SB_PARE_ERR_FLAG){
++					lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
++					_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++				}				
++			}
++			break;
++		case PCI_BAR0_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_OHCI_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( (value & 0x01) == 0x00 ){
++				_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
++				//lo = (value & 0xffffff00) << 8;
++				lo = value;
++				_wrmsr(USB_MSR_REG(USB_OHCI), hi, lo);
++				
++				value &= 0xfffffff0;
++				hi = 0x40000000 | ((value & 0xff000000) >> 24);
++				lo = 0x000fffff | ((value & 0x00fff000) << 8);
++				_wrmsr(GLIU_MSR_REG(GLIU_P2D_BM3), hi, lo);
++			}
++			break;
++		case PCI_INTERRUPT_REG :
++			value &= 0x000000ff;
++			break;
++		case PCI_OHCI_PM_REG :
++			break;
++		case PCI_OHCI_INT_REG :
++			if(value){
++			/* enable all the usb interrupt in PIC */	
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
++				lo &= ~(0xf << 8);
++				lo |= (CS5536_USB_INTR << 8);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
++			}else{
++			/* disable all the usb interrupt in PIC */
++				_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
++				lo &= ~(0xf << 8);
++				_wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo);
++			}
++			break;
++		default :
++			break;			
++	}
++	
++	return;
++}
++
++/*
++ * ohci_read : ohci read transfering.
++ */
++static u32 pci_ohci_read_reg(int reg)
++{
++	u32 conf_data;
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_OHCI_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			conf_data = 0;
++			// COMMAND
++			_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
++			if(hi & 0x04)
++				conf_data |= PCI_COMMAND_MASTER_ENABLE;
++			if(hi & 0x02)
++				conf_data |= PCI_COMMAND_MEM_ENABLE;
++			// STATUS
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_ERROR;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_OHCI_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_NORMAL_HEADER_TYPE << 16) |
++				(0x00 << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		case PCI_BAR0_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_OHCI_FLAG){
++				conf_data = CS5536_OHCI_RANGE | PCI_MAPREG_TYPE_MEM;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_OHCI_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo);
++				//conf_data = lo >> 8;
++				conf_data = lo & 0xffffff00;
++				conf_data &= ~0x0000000f; // 32bit mem
++			}
++			break;
++		case PCI_BAR1_REG :
++			conf_data = 0x000000;
++			break;		
++		case PCI_BAR2_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR3_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR4_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR5_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_OHCI_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_USB_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_USB_INTR);
++			break;
++		case PCI_OHCI_PM_REG :
++			conf_data = 0;
++			break;
++		case PCI_OHCI_INT_REG :
++			_rdmsr(DIVIL_MSR_REG(0x20), &hi, &lo);
++			if((lo & 0x00000f00) == 11)
++				conf_data = 1;
++			else
++				conf_data = 0;
++			break;
++		default :
++			conf_data = 0;
++			break;
++	}
++
++	return conf_data;
++}
++
++#ifdef	TEST_CS5536_USE_EHCI
++static void pci_ehci_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// COMMAND
++			if(value & PCI_COMMAND_MASTER_ENABLE){
++				_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++				hi |= (1 << 2);
++				_wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++				hi &= ~(1 << 2);
++				_wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
++			}
++			if(value & PCI_COMMAND_MEM_ENABLE){
++				_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++				hi |= (1 << 1);
++				_wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++				hi &= ~(1 << 1);
++				_wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);				
++			}
++			// STATUS
++			if(value & PCI_STATUS_PARITY_ERROR){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				if(lo & SB_PARE_ERR_FLAG){
++					lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
++					_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++				}				
++			}
++			break;
++		case PCI_BAR0_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_EHCI_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( (value & 0x01) == 0x00 ){
++				_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++				lo = value;
++				_wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
++				
++				value &= 0xfffffff0;
++				hi = 0x40000000 | ((value & 0xff000000) >> 24);
++				lo = 0x000fffff | ((value & 0x00fff000) << 8);
++				_wrmsr(GLIU_MSR_REG(GLIU_P2D_BM4), hi, lo);
++			}
++			break;
++		case PCI_EHCI_LEGSMIEN_REG :
++			_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++			hi &= 0x003f0000;
++			hi |= (value & 0x3f) << 16;
++			_wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
++			break;
++		case PCI_EHCI_FLADJ_REG :
++			_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++			hi &= ~0x00003f00;
++			hi |= value & 0x00003f00;
++			_wrmsr(USB_MSR_REG(USB_EHCI), hi, lo);
++			break;
++		default :
++			break;			
++	}
++	
++	return;
++}
++
++static u32 pci_ehci_read_reg(int reg)
++{
++	u32 conf_data;
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_EHCI_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			conf_data = 0;
++			// COMMAND
++			_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++			if(hi & 0x04)
++				conf_data |= PCI_COMMAND_MASTER_ENABLE;
++			if(hi & 0x02)
++				conf_data |= PCI_COMMAND_MEM_ENABLE;
++			// STATUS
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_ERROR;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_EHCI_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_NORMAL_HEADER_TYPE << 16) |
++				(PCI_NORMAL_LATENCY_TIMER << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		case PCI_BAR0_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_EHCI_FLAG){
++				conf_data = CS5536_EHCI_RANGE | PCI_MAPREG_TYPE_MEM;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_EHCI_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++				conf_data = lo & 0xfffff000;
++			}
++			break;
++		case PCI_BAR1_REG :
++			conf_data = 0x000000;
++			break;		
++		case PCI_BAR2_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR3_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR4_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR5_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_EHCI_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_USB_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_USB_INTR);
++			break;
++		case PCI_EHCI_LEGSMIEN_REG :
++			_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++			conf_data = (hi & 0x003f0000) >> 16;
++			break;
++		case PCI_EHCI_LEGSMISTS_REG :
++			_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++			conf_data = (hi & 0x3f000000) >> 24;
++			break;
++		case PCI_EHCI_FLADJ_REG :
++			_rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo);
++			conf_data = hi & 0x00003f00;
++			break;
++		default :
++			conf_data = 0;
++			break;
++	}
++
++	return conf_data;
++}
++#else
++static void pci_ehci_write_reg(int reg, u32 value)
++{
++	return;
++}
++
++static u32 pci_ehci_read_reg(int reg)
++{
++	return  0xffffffff;
++}
++
++
++#endif
++
++#ifdef	TEST_CS5536_USE_UDC
++static void pci_udc_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// COMMAND
++			if(value & PCI_COMMAND_MASTER_ENABLE){
++				_rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
++				hi |= (1 << 2);
++				_wrmsr(USB_MSR_REG(USB_UDC), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
++				hi &= ~(1 << 2);
++				_wrmsr(USB_MSR_REG(USB_UDC), hi, lo);
++			}
++			if(value & PCI_COMMAND_MEM_ENABLE){
++				_rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
++				hi |= (1 << 1);
++				_wrmsr(USB_MSR_REG(USB_UDC), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
++				hi &= ~(1 << 1);
++				_wrmsr(USB_MSR_REG(USB_UDC), hi, lo);				
++			}
++			// STATUS
++			if(value & PCI_STATUS_PARITY_ERROR){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				if(lo & SB_PARE_ERR_FLAG){
++					lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
++					_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++				}				
++			}
++			break;
++		case PCI_BAR0_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_UDC_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( (value & 0x01) == 0x00 ){
++				_rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
++				lo = value;
++				_wrmsr(USB_MSR_REG(USB_UDC), hi, lo);
++				
++				value &= 0xfffffff0;
++				hi = 0x40000000 | ((value & 0xff000000) >> 24);
++				lo = 0x000fffff | ((value & 0x00fff000) << 8);
++				_wrmsr(GLIU_MSR_REG(GLIU_P2D_BM0), hi, lo);
++			}
++			break;
++		default :
++			break;			
++	}
++	
++	return;
++}
++
++static u32 pci_udc_read_reg(int reg)
++{
++	u32 conf_data;
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_UDC_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			conf_data = 0;
++			// COMMAND
++			_rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
++			if(hi & 0x04)
++				conf_data |= PCI_COMMAND_MASTER_ENABLE;
++			if(hi & 0x02)
++				conf_data |= PCI_COMMAND_MEM_ENABLE;
++			// STATUS
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_ERROR;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_UDC_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_NORMAL_HEADER_TYPE << 16) |
++				(0x00 << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		case PCI_BAR0_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_UDC_FLAG){
++				conf_data = CS5536_UDC_RANGE | PCI_MAPREG_TYPE_MEM;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_UDC_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_UDC), &hi, &lo);
++				conf_data = lo & 0xfffff000;
++				conf_data &= ~0x0000000f; // 32bit mem
++			}
++			break;
++		case PCI_BAR1_REG :
++			conf_data = 0x000000;
++			break;		
++		case PCI_BAR2_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR3_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR4_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR5_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_UDC_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_USB_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_USB_INTR);
++			break;
++		default :
++			conf_data = 0;
++			break;
++	}
++
++	return conf_data;
++}
++
++#else	/* TEST_CS5536_USE_UDC */
++
++static void pci_udc_write_reg(int reg, u32 value)
++{
++	return;
++}
++
++static u32 pci_udc_read_reg(int reg)
++{
++	return  0xffffffff;
++}
++
++#endif	/* TEST_CS5536_USE_UDC */
++
++
++#ifdef	TEST_CS5536_USE_OTG
++static void pci_otg_write_reg(int reg, u32 value)
++{
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_COMMAND_STATUS_REG :
++			// COMMAND
++			if(value & PCI_COMMAND_MEM_ENABLE){
++				_rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
++				hi |= (1 << 1);
++				_wrmsr(USB_MSR_REG(USB_OTG), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
++				hi &= ~(1 << 1);
++				_wrmsr(USB_MSR_REG(USB_OTG), hi, lo);				
++			}
++			// STATUS
++			if(value & PCI_STATUS_PARITY_ERROR){
++				_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++				if(lo & SB_PARE_ERR_FLAG){
++					lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG;
++					_wrmsr(SB_MSR_REG(SB_ERROR), hi, lo);
++				}				
++			}
++			break;
++		case PCI_BAR0_REG :
++			if(value == PCI_BAR_RANGE_MASK){
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo |= SOFT_BAR_OTG_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else if( (value & 0x01) == 0x00 ){
++				_rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
++				lo = value & 0xffffff00;
++				_wrmsr(USB_MSR_REG(USB_OTG), hi, lo);
++				
++				value &= 0xfffffff0;
++				hi = 0x40000000 | ((value & 0xff000000) >> 24);
++				lo = 0x000fffff | ((value & 0x00fff000) << 8);
++				_wrmsr(GLIU_MSR_REG(GLIU_P2D_BM1), hi, lo);
++			}
++			break;
++		default :
++			break;			
++	}
++	
++	return;
++}
++
++static u32 pci_otg_read_reg(int reg)
++{
++	u32 conf_data;
++	u32 hi, lo;
++	
++	switch(reg){
++		case PCI_ID_REG :
++			conf_data = (CS5536_OTG_DEVICE_ID << 16 | CS5536_VENDOR_ID);
++			break;
++		case PCI_COMMAND_STATUS_REG :
++			conf_data = 0;
++			// COMMAND
++			_rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
++			if(hi & 0x02)
++				conf_data |= PCI_COMMAND_MEM_ENABLE;
++			// STATUS
++			conf_data |= PCI_STATUS_66MHZ_SUPPORT;
++			conf_data |= PCI_STATUS_BACKTOBACK_SUPPORT;
++			_rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo);
++			if(lo & SB_PARE_ERR_FLAG)
++				conf_data |= PCI_STATUS_PARITY_ERROR;
++			conf_data |= PCI_STATUS_DEVSEL_MEDIUM;
++			break;
++		case PCI_CLASS_REG :
++			_rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo);
++			conf_data = lo & 0x000000ff;
++			conf_data |= (CS5536_OTG_CLASS_CODE << 8);
++			break;
++		case PCI_BHLC_REG :
++			conf_data = (PCI_NONE_BIST << 24) | (PCI_NORMAL_HEADER_TYPE << 16) |
++				(0x00 << 8) | PCI_NORMAL_CACHE_LINE_SIZE;
++			break;
++		case PCI_BAR0_REG :
++			_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++			if(lo & SOFT_BAR_OTG_FLAG){
++				conf_data = CS5536_OTG_RANGE | PCI_MAPREG_TYPE_MEM;
++				_rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);
++				lo &= ~SOFT_BAR_OTG_FLAG;
++				_wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo);
++			}else{
++				_rdmsr(USB_MSR_REG(USB_OTG), &hi, &lo);
++				conf_data = lo & 0xffffff00;
++				conf_data &= ~0x0000000f;
++			}
++			break;
++		case PCI_BAR1_REG :
++			conf_data = 0x000000;
++			break;		
++		case PCI_BAR2_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR3_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR4_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_BAR5_REG :
++			conf_data = 0x000000;
++			break;
++		case PCI_CARDBUS_CIS_REG :
++			conf_data = PCI_CARDBUS_CIS_POINTER;
++			break;
++		case PCI_SUBSYS_ID_REG :
++			conf_data = (CS5536_OTG_SUB_ID << 16) | CS5536_SUB_VENDOR_ID;
++			break;
++		case PCI_MAPREG_ROM :
++			conf_data = PCI_EXPANSION_ROM_BAR;
++			break;
++		case PCI_CAPLISTPTR_REG :
++			conf_data = PCI_CAPLIST_USB_POINTER;
++			break;
++		case PCI_INTERRUPT_REG :
++			conf_data = (PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | 
++				(PCI_DEFAULT_PIN << 8) | (CS5536_USB_INTR);
++			break;
++		default :
++			conf_data = 0;
++			break;
++	}
++
++	return conf_data;
++}
++
++#else	/* TEST_CS5536_USE_OTG */
++
++static void pci_otg_write_reg(int reg, u32 value)
++{
++	return;
++}
++
++static u32 pci_otg_read_reg(int reg)
++{
++	return 0xffffffff;
++}
++
++#endif	/* TEST_CS5536_USE_OTG */
++
++/*******************************************************************************/
++
++/*
++ * writen : write to PCI config space and transfer it to MSR write.
++ */
++void cs5536_pci_conf_write4(int function, int reg, u32 value)
++{
++	/* some basic checking. */
++	if( (function < CS5536_FUNC_START) || (function > CS5536_FUNC_END) ){
++		return;
++	}
++	if( (reg < 0) || (reg > 0x100) || ((reg & 0x03) != 0) ){
++		return;
++	}
++	
++	switch(function){
++		case CS5536_ISA_FUNC :
++			pci_isa_write_reg(reg, value);		
++			break;
++
++		case CS5536_FLASH_FUNC :
++			pci_flash_write_reg(reg, value);
++			break;
++		
++		case CS5536_IDE_FUNC :
++			pci_ide_write_reg(reg, value);
++			break;
++
++		case CS5536_ACC_FUNC :
++			pci_acc_write_reg(reg, value);
++			break;
++
++		case CS5536_OHCI_FUNC :
++			pci_ohci_write_reg(reg, value);
++			break;
++
++		case CS5536_EHCI_FUNC :
++			pci_ehci_write_reg(reg, value);
++			break;
++
++		case CS5536_UDC_FUNC :
++			pci_udc_write_reg(reg, value);
++			break;
++
++		case CS5536_OTG_FUNC :
++			pci_otg_write_reg(reg, value);
++			break;
++		
++		default :
++			break;
++	}
++	
++	return;
++}
++
++/*
++ * readn : read PCI config space and transfer it to MSR access.
++ */
++u32 cs5536_pci_conf_read4(int function, int reg)
++{
++	u32 data = 0;
++
++	/* some basic checking. */
++	if( (function < CS5536_FUNC_START) || (function > CS5536_FUNC_END) ){
++		return 0;
++	}
++	if( (reg < 0) || ((reg & 0x03) != 0) ){
++		return 0;
++	}
++	if( reg > 0x100 )
++		return 0xffffffff;
++	
++	switch(function){
++		case CS5536_ISA_FUNC :
++			data = pci_isa_read_reg(reg);
++			break;
++
++		case CS5536_FLASH_FUNC :
++			data = pci_flash_read_reg(reg);
++			break;
++		
++		case CS5536_IDE_FUNC :
++			data = pci_ide_read_reg(reg);
++			break;
++
++		case CS5536_ACC_FUNC :
++			data = pci_acc_read_reg(reg);
++			break;
++
++		case CS5536_OHCI_FUNC :
++			data = pci_ohci_read_reg(reg);
++			break;
++
++		case CS5536_EHCI_FUNC :
++			data = pci_ehci_read_reg(reg);
++			break;
++
++		case CS5536_UDC_FUNC :
++			data = pci_udc_read_reg(reg);
++			break;
++
++		case CS5536_OTG_FUNC :
++			data = pci_otg_read_reg(reg);
++			break;
++		
++		default :
++			break;
++	
++	}
++	
++	return data;
++}
++
++/**************************************************************************/
++
+diff --git a/arch/mips/lemote/lm2f/common/mem.c b/arch/mips/lemote/lm2f/common/mem.c
+new file mode 100644
+index 0000000..5916ed6
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/mem.c
+@@ -0,0 +1,23 @@
++/*
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++#include <linux/fs.h>
++#include <linux/fcntl.h>
++#include <linux/mm.h>
++
++/* override of arch/mips/mm/cache.c: __uncached_access */
++int __uncached_access(struct file *file, unsigned long addr)
++{
++	if (file->f_flags & O_SYNC)
++		return 1;
++
++	/*
++	 * On the Lemote Loongson 2f system, the peripheral registers
++	 * reside between 0x1000:0000 and 0x8000:0000.
++	 */
++	return addr >= __pa(high_memory) ||
++		((addr >= 0x10000000) && (addr < 0x80000000));
++}
+diff --git a/arch/mips/lemote/lm2f/common/mfgpt.c b/arch/mips/lemote/lm2f/common/mfgpt.c
+new file mode 100644
+index 0000000..e62a7fd
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/mfgpt.c
+@@ -0,0 +1,222 @@
++/*
++ * CS5536 General timer functions
++ *
++ */
++#include <linux/clockchips.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/jiffies.h>
++#include <linux/module.h>
++#include <linux/spinlock.h>
++
++#include <asm/delay.h>
++#include <asm/io.h>
++#include <asm/time.h>
++
++DEFINE_SPINLOCK(mfgpt_lock);
++
++#if 1
++#define MFGFT_TICK_RATE 14318000
++#else
++#define MFGFT_TICK_RATE (14318180 / 8)
++#endif
++#define COMPARE  ((MFGFT_TICK_RATE + HZ/2) / HZ)
++
++extern void _wrmsr(u32 reg, u32 hi, u32 lo);
++extern void _rdmsr(u32 reg, u32 *hi, u32 *lo);
++
++static u32 base ;
++
++/*
++ * Initialize the MFGPT timer.
++ *
++ * This is also called after resume to bring the MFGPT into operation again.
++ */
++/* setup register bit fields:
++   15: counter enable
++   14: compare2 output status, write 1 to clear when in event mode
++   13: compare1 output status
++   12: setup(ro)
++   11: stop enable, stop on sleep
++   10: external enable
++   9:8 compare2 mode; 00: disable, 01: compare on equal; 10: compare on GE, 11 event: GE + irq
++   7:6 compare1 mode
++   5:  reverse enable, bit reverse of the counter
++   4:  clock select. 0: 32KHz, 1: 14.318MHz
++   3:0 counter prescaler scale factor. select the input clock divide-by value. 2^n
++   bit 11:0 is write once.
++*/
++   
++ 
++static void init_mfgpt_timer(enum clock_event_mode mode,
++			   struct clock_event_device *evt)
++{
++	spin_lock(&mfgpt_lock);
++
++	switch(mode) {
++	case CLOCK_EVT_MODE_PERIODIC:
++		/* set comparator2 */
++		outw(COMPARE, base + 2);
++		/* set counter to 0 */
++		outw(0, base + 4);
++		/* setup; enable, comparator2 to event mode,14.318MHz clock */
++		//outw(0xe313, base + 6);
++		outw(0xe310, base + 6);
++		break;
++
++	case CLOCK_EVT_MODE_SHUTDOWN:
++	case CLOCK_EVT_MODE_UNUSED:
++		if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
++		    evt->mode == CLOCK_EVT_MODE_ONESHOT) {
++			/* disable counter */
++			outw(inw(base+6) & 0x7fff, base + 6);
++		}
++		break;
++
++	case CLOCK_EVT_MODE_ONESHOT:
++		/* One shot setup */
++		break;
++
++	case CLOCK_EVT_MODE_RESUME:
++		/* Nothing to do here */
++		break;
++	}
++	spin_unlock(&mfgpt_lock);
++}
++
++/*
++ * Program the next event in oneshot mode
++ *
++ * Delta is given in MFGPT ticks
++ */
++static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
++{
++	spin_lock(&mfgpt_lock);
++
++	/* set comparator2 */
++	outw(delta & 0xffff, base + 2);
++	/* set counter to 0 */
++	outw(0, base + 4);
++	/* setup; enable, comparator2 */
++	outw(0xe310, base + 6);
++
++	spin_unlock(&mfgpt_lock);
++
++	return 0;
++}
++
++static struct clock_event_device mfgpt_clockevent = {
++	.name		= "mfgpt",
++	.features	= CLOCK_EVT_FEAT_PERIODIC,
++	.set_mode	= init_mfgpt_timer,
++	.set_next_event = mfgpt_next_event,
++	.rating         = 2000,
++	.irq		= 5,
++};
++
++static irqreturn_t timer_interrupt(int irq, void *dev_id)
++{
++	u32 basehi,baselo;
++
++	_rdmsr(0x8000000d,&basehi,&baselo);
++
++	base = baselo;
++	/* ack */
++//	outw(0x0, baselo + 4);
++	outw(0xc000, baselo + 6);
++
++	mfgpt_clockevent.event_handler(&mfgpt_clockevent);
++
++	return IRQ_HANDLED;
++}
++
++static struct irqaction irq5  = {
++	.handler = timer_interrupt,
++	.flags = IRQF_DISABLED | IRQF_NOBALANCING,
++	.mask = CPU_MASK_NONE,
++	.name = "timer"
++};
++
++/*
++ * Initialize the conversion factor and the min/max deltas of the clock event
++ * structure and register the clock event source with the framework.
++ */
++void __init setup_mfgpt_timer(void)
++{
++	u32 basehi;
++	struct clock_event_device *cd = &mfgpt_clockevent;
++	unsigned int cpu = smp_processor_id();
++
++	cd->cpumask = cpumask_of_cpu(cpu);
++	clockevent_set_clock(cd, MFGFT_TICK_RATE);
++	cd->max_delta_ns = clockevent_delta2ns(0xFFFF, cd);
++	cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
++
++	/* connect multifunction timer0 comparator 2 to irq mapper*/
++	_wrmsr(0x80000028, 0, 0x100);
++
++	/* map unrestricted interrupt source Z4 to IG5 */
++	_wrmsr(0x80000022, 0, 0x50000);
++
++	_rdmsr(0x8000000d, &basehi, &base);
++
++	irq5.mask = cpumask_of_cpu(cpu);
++
++	clockevents_register_device(cd);
++
++	setup_irq(5, &irq5);
++
++}
++
++/*
++ * Since the MFGPT overflows every tick, its not very useful
++ * to just read by itself. So use jiffies to emulate a free
++ * running counter:
++ */
++static cycle_t mfgpt_read(void)
++{
++	static cycle_t count, old_count;
++	static unsigned long old_jifs;
++	unsigned long jifs;
++	unsigned long flags;
++
++	spin_lock_irqsave(&mfgpt_lock, flags);
++
++	jifs = jiffies;
++
++	count =  inw(base + 4);
++
++	/* overflow ?*/
++	if (count < old_count && jifs == old_jifs) {
++		count = old_count;
++	}
++	old_count = count;
++	old_jifs = jifs;
++
++	spin_unlock_irqrestore(&mfgpt_lock, flags);
++
++	return (cycle_t)(jifs * COMPARE) + count;
++}
++
++static struct clocksource clocksource_mfgpt = {
++	.name	= "mfgpt",
++	.rating = 1200,
++	.read	= mfgpt_read,
++	.mask	= CLOCKSOURCE_MASK(32),
++	.mult	= 0,
++	.shift	= 22,
++};
++
++int __init init_mfgpt_clocksource(void)
++{
++
++	if (num_possible_cpus() > 1) /* MFGPT does not scale! */
++		return 0;
++
++	setup_mfgpt_timer();
++
++	clocksource_mfgpt.mult = clocksource_hz2mult(MFGFT_TICK_RATE, 22);
++	return clocksource_register(&clocksource_mfgpt);
++}
++/* Too late for kernel calc delay */
++//arch_initcall(init_mfgpt_clocksource);
+diff --git a/arch/mips/lemote/lm2f/common/mipsdha.c b/arch/mips/lemote/lm2f/common/mipsdha.c
+new file mode 100644
+index 0000000..fd90454
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/mipsdha.c
+@@ -0,0 +1,164 @@
++/*
++ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/errno.h>
++#include <linux/mm.h>
++#include <linux/pci.h>
++#include <linux/init.h>
++#include <linux/proc_fs.h>
++#include <asm/uaccess.h>
++#include <asm/io.h>
++
++static ssize_t mipsdha_proc_read(struct file *file, char *buf, size_t len, loff_t *ppos);
++
++static ssize_t mipsdha_proc_write(struct file *file, const char *buf, size_t len, loff_t *ppos);
++
++
++static struct proc_dir_entry *mipsdha_proc_entry;
++
++#define INFO_SIZE 4096
++static char info_buf[INFO_SIZE];
++
++static struct file_operations mipsdha_fops =
++{
++    owner:	THIS_MODULE,
++    read:	mipsdha_proc_read,
++    write:	mipsdha_proc_write,
++};
++
++static enum {CMD_ERR, CMD_GIB, CMD_GPI} cmd;
++
++typedef struct pciinfo_s
++{
++  int		bus,card,func;
++  unsigned short command;
++  unsigned short vendor,device;
++  unsigned	base0,base1,base2,baserom;
++} pciinfo_t;
++
++
++extern struct proc_dir_entry proc_root;
++
++static int __init mipsdha_proc_init(void)
++{
++	mipsdha_proc_entry = create_proc_entry("mipsdha", S_IWUSR | S_IRUGO, &proc_root);
++	if (mipsdha_proc_entry == NULL) {
++		printk("MIPSDHA: register /proc/mipsdha failed!\n");
++		return 0;
++	}
++	
++	mipsdha_proc_entry->owner = THIS_MODULE;
++	mipsdha_proc_entry->proc_fops = &mipsdha_fops;
++
++	cmd=CMD_ERR;
++	return 0;
++}
++
++static ssize_t mipsdha_proc_write (struct file *file, const char *buf, size_t len, loff_t *ppos)
++{
++	char cmd_gib[]="GET IO BASE";
++	char cmd_gpi[]="GET PCI INFO";
++
++	if (len >= INFO_SIZE) return -ENOMEM;
++
++	if (copy_from_user(info_buf, buf, len)) return -EFAULT;
++	info_buf[len] = '\0';
++
++	if (strncmp(info_buf, cmd_gib, sizeof(cmd_gib)-1)==0) {
++		cmd = CMD_GIB;
++		return len;
++	} else if (strncmp(info_buf, cmd_gpi, sizeof(cmd_gpi)-1)==0) {
++		cmd = CMD_GPI;
++		return len;
++	} else {
++		return -EINVAL;
++	}
++}
++
++static ssize_t mipsdha_proc_read (struct file *file, char *buf, size_t len, loff_t *ppos)
++{
++	int info_cnt;
++	pciinfo_t *pciinfo;
++	struct pci_dev *dev = NULL;
++
++	switch (cmd) {
++		default:
++			printk("MIPSDHA: BUG found in function %s!(cmd=%d)\n", 
++					__FUNCTION__, cmd);
++			return -EINVAL;
++
++
++		case CMD_ERR:
++			return -EINVAL;
++
++
++		case CMD_GIB:
++			*(unsigned long *)info_buf = 
++				virt_to_phys((void *) mips_io_port_base);
++			info_cnt=sizeof(unsigned long);
++			break;
++
++
++		case CMD_GPI:
++			pciinfo = (pciinfo_t *) info_buf;
++			info_cnt = 0;
++			for_each_pci_dev(dev) {
++
++				if (info_cnt+sizeof(pciinfo_t)>INFO_SIZE) return -ENOMEM;
++
++				pciinfo->bus = dev->bus->number;
++				pciinfo->card = PCI_SLOT(dev->devfn);
++				pciinfo->func = PCI_FUNC(dev->devfn);
++
++				if (pci_read_config_word(dev, PCI_COMMAND, &pciinfo->command)
++						!= PCIBIOS_SUCCESSFUL) {
++					printk("MIPSDHA: BUG found in function %s!\n", 
++							__FUNCTION__);
++					pciinfo->command=0;
++				}
++
++				pciinfo->vendor = dev->vendor;
++				pciinfo->device = dev->device;
++
++				pciinfo->base0 = (dev->resource[0]).start;
++				pciinfo->base1 = (dev->resource[1]).start;
++				pciinfo->base2 = (dev->resource[2]).start;
++				pciinfo->baserom = (dev->resource[PCI_ROM_RESOURCE]).start;
++
++				pciinfo++;
++				info_cnt += sizeof(pciinfo_t);
++			}
++			break;
++	}
++
++	if (len < info_cnt) return -ENOMEM;
++	if (copy_to_user(buf, info_buf, info_cnt)) return -EFAULT;
++
++	return info_cnt;
++}
++
++__initcall(mipsdha_proc_init);
+diff --git a/arch/mips/lemote/lm2f/common/pci.c b/arch/mips/lemote/lm2f/common/pci.c
+new file mode 100644
+index 0000000..91f6abb
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/pci.c
+@@ -0,0 +1,89 @@
++/*
++ * pci.c
++ *
++ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/types.h>
++#include <linux/pci.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++
++extern struct pci_ops loongson2f_pci_pci_ops;
++/* if you want to expand the pci memory space, you should config 64bits kernel too. */
++
++static struct resource loongson2f_pci_mem_resource = {
++	.name   = "LOONGSON2F PCI MEM",
++	.start  = 0x14000000UL,
++	.end    = 0x1fffffffUL,
++	.flags  = IORESOURCE_MEM,
++};
++
++static struct resource loongson2f_pci_io_resource = {
++	.name   = "LOONGSON2F PCI IO MEM",
++	.start  = 0x00004000UL,
++	.end    = 0x0000ffffUL,
++	.flags  = IORESOURCE_IO,
++};
++
++
++static struct pci_controller  loongson2f_pci_controller = {
++	.pci_ops        = &loongson2f_pci_pci_ops,
++	.io_resource    = &loongson2f_pci_io_resource,
++	.mem_resource   = &loongson2f_pci_mem_resource,
++	.mem_offset     = 0x00000000UL,
++	.io_offset      = 0x00000000UL,
++};
++
++static int __init pcibios_init(void)
++{
++	extern int pci_probe_only;
++	pci_probe_only = 0;
++
++#ifdef CONFIG_TRACE_BOOT
++	printk(KERN_INFO"arch_initcall:pcibios_init\n");
++	printk(KERN_INFO"register_pci_controller : %x\n",&loongson2f_pci_controller);
++#endif
++	
++#ifdef	CONFIG_64BIT
++	loongson2f_pci_mem_resource.start	= 0x50000000UL; 
++	loongson2f_pci_mem_resource.end		= 0x7fffffffUL;
++	__asm__(".set mips3\n"
++	         "dli $2,0x900000003ff00000\n"
++		 "li $3,0x40000000\n"
++		 "sd $3,0x18($2)\n"
++		 "or $3,1\n"
++		 "sd $3,0x58($2)\n"
++		 "dli $3,0xffffffffc0000000\n"
++		 "sd $3,0x38($2)\n"
++		 ".set mips0\n"
++		 :::"$2","$3","memory"
++			   );
++#endif
++	loongson2f_pci_controller.io_map_base = mips_io_port_base;
++	register_pci_controller(&loongson2f_pci_controller);
++	return 0;
++}
++
++arch_initcall(pcibios_init);
+diff --git a/arch/mips/lemote/lm2f/common/pcireg.h b/arch/mips/lemote/lm2f/common/pcireg.h
+new file mode 100644
+index 0000000..aa823d3
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/common/pcireg.h
+@@ -0,0 +1,485 @@
++/*
++ * Copyright (c) 2001, 2006 www.ict.ac.cn.
++ * Copyright (c) 2006, 2008 www.lemote.com.cn.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the named License,
++ * or any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#ifndef _DEV_PCI_PCIREG_H_
++#define	_DEV_PCI_PCIREG_H_
++
++
++/*
++ * Standardized PCI configuration information
++ *
++ * XXX This is not complete.
++ */
++
++/*
++ * Device identification register; contains a vendor ID and a device ID.
++ */
++#define	PCI_ID_REG			0x00
++
++typedef u_int16_t pci_vendor_id_t;
++typedef u_int16_t pci_product_id_t;
++
++#define	PCI_VENDOR_SHIFT			0
++#define	PCI_VENDOR_MASK				0xffff
++#define	PCI_VENDOR(id) \
++	    (((id) >> PCI_VENDOR_SHIFT) & PCI_VENDOR_MASK)
++
++#define	PCI_PRODUCT_SHIFT			16
++#define	PCI_PRODUCT_MASK			0xffff
++#define	PCI_PRODUCT(id) \
++	    (((id) >> PCI_PRODUCT_SHIFT) & PCI_PRODUCT_MASK)
++
++/*
++ * Command and status register.
++ */
++#define	PCI_COMMAND_STATUS_REG			0x04
++
++#define	PCI_COMMAND_IO_ENABLE			0x00000001
++#define	PCI_COMMAND_MEM_ENABLE			0x00000002
++#define	PCI_COMMAND_MASTER_ENABLE		0x00000004
++#define	PCI_COMMAND_SPECIAL_ENABLE		0x00000008
++#define	PCI_COMMAND_INVALIDATE_ENABLE		0x00000010
++#define	PCI_COMMAND_PALETTE_ENABLE		0x00000020
++#define	PCI_COMMAND_PARITY_ENABLE		0x00000040
++#define	PCI_COMMAND_STEPPING_ENABLE		0x00000080
++#define	PCI_COMMAND_SERR_ENABLE			0x00000100
++#define	PCI_COMMAND_BACKTOBACK_ENABLE		0x00000200
++
++#define	PCI_STATUS_CAPLIST_SUPPORT		0x00100000
++#define	PCI_STATUS_66MHZ_SUPPORT		0x00200000
++#define	PCI_STATUS_UDF_SUPPORT			0x00400000
++#define	PCI_STATUS_BACKTOBACK_SUPPORT		0x00800000
++#define	PCI_STATUS_PARITY_ERROR			0x01000000
++#define	PCI_STATUS_DEVSEL_FAST			0x00000000
++#define	PCI_STATUS_DEVSEL_MEDIUM		0x02000000
++#define	PCI_STATUS_DEVSEL_SLOW			0x04000000
++#define	PCI_STATUS_DEVSEL_MASK			0x06000000
++#define	PCI_STATUS_TARGET_TARGET_ABORT		0x08000000
++#define	PCI_STATUS_MASTER_TARGET_ABORT		0x10000000
++#define	PCI_STATUS_MASTER_ABORT			0x20000000
++#define	PCI_STATUS_SPECIAL_ERROR		0x40000000
++#define	PCI_STATUS_PARITY_DETECT		0x80000000
++
++/*
++ * PCI Class and Revision Register; defines type and revision of device.
++ */
++#define	PCI_CLASS_REG			0x08
++
++typedef u_int8_t pci_class_t;
++typedef u_int8_t pci_subclass_t;
++typedef u_int8_t pci_interface_t;
++typedef u_int8_t pci_revision_t;
++
++#define	PCI_CLASS_SHIFT				24
++#define	PCI_CLASS_MASK				0xff
++#define	PCI_CLASS(cr) \
++	    (((cr) >> PCI_CLASS_SHIFT) & PCI_CLASS_MASK)
++
++#define	PCI_SUBCLASS_SHIFT			16
++#define	PCI_SUBCLASS_MASK			0xff
++#define	PCI_SUBCLASS(cr) \
++	    (((cr) >> PCI_SUBCLASS_SHIFT) & PCI_SUBCLASS_MASK)
++
++#define PCI_ISCLASS(what, class, subclass) \
++	(((what) & 0xffff0000) == (class << 24 | subclass << 16))
++
++#define	PCI_INTERFACE_SHIFT			8
++#define	PCI_INTERFACE_MASK			0xff
++#define	PCI_INTERFACE(cr) \
++	    (((cr) >> PCI_INTERFACE_SHIFT) & PCI_INTERFACE_MASK)
++
++#define	PCI_REVISION_SHIFT			0
++#define	PCI_REVISION_MASK			0xff
++#define	PCI_REVISION(cr) \
++	    (((cr) >> PCI_REVISION_SHIFT) & PCI_REVISION_MASK)
++
++/* base classes */
++#define	PCI_CLASS_PREHISTORIC			0x00
++#define	PCI_CLASS_MASS_STORAGE			0x01
++#define	PCI_CLASS_NETWORK			0x02
++#define	PCI_CLASS_DISPLAY			0x03
++#define	PCI_CLASS_MULTIMEDIA			0x04
++#define	PCI_CLASS_MEMORY			0x05
++#define	PCI_CLASS_BRIDGE			0x06
++#define	PCI_CLASS_COMMUNICATIONS		0x07
++#define	PCI_CLASS_SYSTEM			0x08
++#define	PCI_CLASS_INPUT				0x09
++#define	PCI_CLASS_DOCK				0x0a
++#define	PCI_CLASS_PROCESSOR			0x0b
++#define	PCI_CLASS_SERIALBUS			0x0c
++#define	PCI_CLASS_WIRELESS			0x0d
++#define	PCI_CLASS_I2O				0x0e
++#define	PCI_CLASS_SATCOM			0x0f
++#define	PCI_CLASS_CRYPTO			0x10
++#define	PCI_CLASS_DASP				0x11
++#define	PCI_CLASS_UNDEFINED			0xff
++
++/* 0x00 prehistoric subclasses */
++#define	PCI_SUBCLASS_PREHISTORIC_MISC		0x00
++#define	PCI_SUBCLASS_PREHISTORIC_VGA		0x01
++
++/* 0x01 mass storage subclasses */
++#define	PCI_SUBCLASS_MASS_STORAGE_SCSI		0x00
++#define	PCI_SUBCLASS_MASS_STORAGE_IDE		0x01
++#define	PCI_SUBCLASS_MASS_STORAGE_FLOPPY	0x02
++#define	PCI_SUBCLASS_MASS_STORAGE_IPI		0x03
++#define	PCI_SUBCLASS_MASS_STORAGE_RAID		0x04
++#define	PCI_SUBCLASS_MASS_STORAGE_ATA		0x05
++#define	PCI_SUBCLASS_MASS_STORAGE_MISC		0x80
++
++/* 0x02 network subclasses */
++#define	PCI_SUBCLASS_NETWORK_ETHERNET		0x00
++#define	PCI_SUBCLASS_NETWORK_TOKENRING		0x01
++#define	PCI_SUBCLASS_NETWORK_FDDI		0x02
++#define	PCI_SUBCLASS_NETWORK_ATM		0x03
++#define	PCI_SUBCLASS_NETWORK_ISDN		0x04
++#define	PCI_SUBCLASS_NETWORK_WORLDFIP		0x05
++#define	PCI_SUBCLASS_NETWORK_PCIMGMULTICOMP	0x06
++#define	PCI_SUBCLASS_NETWORK_MISC		0x80
++
++/* 0x03 display subclasses */
++#define	PCI_SUBCLASS_DISPLAY_VGA		0x00
++#define	PCI_SUBCLASS_DISPLAY_XGA		0x01
++#define	PCI_SUBCLASS_DISPLAY_3D			0x02
++#define	PCI_SUBCLASS_DISPLAY_MISC		0x80
++
++/* 0x04 multimedia subclasses */
++#define	PCI_SUBCLASS_MULTIMEDIA_VIDEO		0x00
++#define	PCI_SUBCLASS_MULTIMEDIA_AUDIO		0x01
++#define	PCI_SUBCLASS_MULTIMEDIA_TELEPHONY	0x02
++#define	PCI_SUBCLASS_MULTIMEDIA_MISC		0x80
++
++/* 0x05 memory subclasses */
++#define	PCI_SUBCLASS_MEMORY_RAM			0x00
++#define	PCI_SUBCLASS_MEMORY_FLASH		0x01
++#define	PCI_SUBCLASS_MEMORY_MISC		0x80
++
++/* 0x06 bridge subclasses */
++#define	PCI_SUBCLASS_BRIDGE_HOST		0x00
++#define	PCI_SUBCLASS_BRIDGE_ISA			0x01
++#define	PCI_SUBCLASS_BRIDGE_EISA		0x02
++#define	PCI_SUBCLASS_BRIDGE_MC			0x03
++#define	PCI_SUBCLASS_BRIDGE_PCI			0x04
++#define	PCI_SUBCLASS_BRIDGE_PCMCIA		0x05
++#define	PCI_SUBCLASS_BRIDGE_NUBUS		0x06
++#define	PCI_SUBCLASS_BRIDGE_CARDBUS		0x07
++#define	PCI_SUBCLASS_BRIDGE_RACEWAY		0x08
++#define	PCI_SUBCLASS_BRIDGE_STPCI		0x09
++#define	PCI_SUBCLASS_BRIDGE_INFINIBAND		0x0a
++#define	PCI_SUBCLASS_BRIDGE_MISC		0x80
++
++/* 0x07 communications subclasses */
++#define	PCI_SUBCLASS_COMMUNICATIONS_SERIAL	0x00
++#define	PCI_SUBCLASS_COMMUNICATIONS_PARALLEL	0x01
++#define	PCI_SUBCLASS_COMMUNICATIONS_MPSERIAL	0x02
++#define	PCI_SUBCLASS_COMMUNICATIONS_MODEM	0x03
++#define	PCI_SUBCLASS_COMMUNICATIONS_MISC	0x80
++
++/* 0x08 system subclasses */
++#define	PCI_SUBCLASS_SYSTEM_PIC			0x00
++#define	PCI_SUBCLASS_SYSTEM_DMA			0x01
++#define	PCI_SUBCLASS_SYSTEM_TIMER		0x02
++#define	PCI_SUBCLASS_SYSTEM_RTC			0x03
++#define	PCI_SUBCLASS_SYSTEM_PCIHOTPLUG		0x04
++#define	PCI_SUBCLASS_SYSTEM_MISC		0x80
++
++/* 0x09 input subclasses */
++#define	PCI_SUBCLASS_INPUT_KEYBOARD		0x00
++#define	PCI_SUBCLASS_INPUT_DIGITIZER		0x01
++#define	PCI_SUBCLASS_INPUT_MOUSE		0x02
++#define	PCI_SUBCLASS_INPUT_SCANNER		0x03
++#define	PCI_SUBCLASS_INPUT_GAMEPORT		0x04
++#define	PCI_SUBCLASS_INPUT_MISC			0x80
++
++/* 0x0a dock subclasses */
++#define	PCI_SUBCLASS_DOCK_GENERIC		0x00
++#define	PCI_SUBCLASS_DOCK_MISC			0x80
++
++/* 0x0b processor subclasses */
++#define	PCI_SUBCLASS_PROCESSOR_386		0x00
++#define	PCI_SUBCLASS_PROCESSOR_486		0x01
++#define	PCI_SUBCLASS_PROCESSOR_PENTIUM		0x02
++#define	PCI_SUBCLASS_PROCESSOR_ALPHA		0x10
++#define	PCI_SUBCLASS_PROCESSOR_POWERPC		0x20
++#define	PCI_SUBCLASS_PROCESSOR_MIPS		0x30
++#define	PCI_SUBCLASS_PROCESSOR_COPROC		0x40
++
++/* 0x0c serial bus subclasses */
++#define	PCI_SUBCLASS_SERIALBUS_FIREWIRE		0x00
++#define	PCI_SUBCLASS_SERIALBUS_ACCESS		0x01
++#define	PCI_SUBCLASS_SERIALBUS_SSA		0x02
++#define	PCI_SUBCLASS_SERIALBUS_USB		0x03
++#define	PCI_SUBCLASS_SERIALBUS_FIBER		0x04
++#define	PCI_SUBCLASS_SERIALBUS_SMBUS		0x05
++#define	PCI_SUBCLASS_SERIALBUS_INFINIBAND	0x06
++#define	PCI_SUBCLASS_SERIALBUS_IPMI		0x07
++#define	PCI_SUBCLASS_SERIALBUS_SERCOS		0x08
++#define	PCI_SUBCLASS_SERIALBUS_CANBUS		0x09
++
++/* 0x0d wireless subclasses */
++#define	PCI_SUBCLASS_WIRELESS_IRDA		0x00
++#define	PCI_SUBCLASS_WIRELESS_CONSUMERIR	0x01
++#define	PCI_SUBCLASS_WIRELESS_RF		0x10
++#define	PCI_SUBCLASS_WIRELESS_MISC		0x80
++
++/* 0x0e I2O (Intelligent I/O) subclasses */
++#define	PCI_SUBCLASS_I2O_STANDARD		0x00
++
++/* 0x0f satellite communication subclasses */
++/*	PCI_SUBCLASS_SATCOM_???			0x00    / * XXX ??? */
++#define	PCI_SUBCLASS_SATCOM_TV			0x01
++#define	PCI_SUBCLASS_SATCOM_AUDIO		0x02
++#define	PCI_SUBCLASS_SATCOM_VOICE		0x03
++#define	PCI_SUBCLASS_SATCOM_DATA		0x04
++
++/* 0x10 encryption/decryption subclasses */
++#define	PCI_SUBCLASS_CRYPTO_NETCOMP		0x00
++#define	PCI_SUBCLASS_CRYPTO_ENTERTAINMENT	0x10
++#define	PCI_SUBCLASS_CRYPTO_MISC		0x80
++
++/* 0x11 data acquisition and signal processing subclasses */
++#define	PCI_SUBCLASS_DASP_DPIO			0x00
++#define	PCI_SUBCLASS_DASP_TIMEFREQ		0x01
++#define	PCI_SUBCLASS_DASP_MISC			0x80
++
++/*
++ * PCI BIST/Header Type/Latency Timer/Cache Line Size Register.
++ */
++#define	PCI_BHLC_REG			0x0c
++
++#define	PCI_BIST_SHIFT				24
++#define	PCI_BIST_MASK				0xff
++#define	PCI_BIST(bhlcr) \
++	    (((bhlcr) >> PCI_BIST_SHIFT) & PCI_BIST_MASK)
++
++#define	PCI_HDRTYPE_SHIFT			16
++#define	PCI_HDRTYPE_MASK			0xff
++#define	PCI_HDRTYPE(bhlcr) \
++	    (((bhlcr) >> PCI_HDRTYPE_SHIFT) & PCI_HDRTYPE_MASK)
++
++#define PCI_HDRTYPE_TYPE(bhlcr) \
++	    (PCI_HDRTYPE(bhlcr) & 0x7f)
++#define	PCI_HDRTYPE_MULTIFN(bhlcr) \
++	    ((PCI_HDRTYPE(bhlcr) & 0x80) != 0)
++
++#define	PCI_LATTIMER_SHIFT			8
++#define	PCI_LATTIMER_MASK			0xff
++#define	PCI_LATTIMER(bhlcr) \
++	    (((bhlcr) >> PCI_LATTIMER_SHIFT) & PCI_LATTIMER_MASK)
++
++#define	PCI_CACHELINE_SHIFT			0
++#define	PCI_CACHELINE_MASK			0xff
++#define	PCI_CACHELINE(bhlcr) \
++	    (((bhlcr) >> PCI_CACHELINE_SHIFT) & PCI_CACHELINE_MASK)
++
++/* config registers for header type 0 devices */
++
++#define PCI_MAPS	0x10
++#define PCI_CARDBUSCIS	0x28
++#define PCI_SUBVEND_0	0x2c
++#define PCI_SUBDEV_0	0x2e
++#define PCI_INTLINE	0x3c
++#define PCI_INTPIN	0x3d
++#define PCI_MINGNT	0x3e
++#define PCI_MAXLAT	0x3f
++
++/* config registers for header type 1 devices */
++
++#define PCI_SECSTAT_1	0 /**/
++
++#define PCI_PRIBUS_1	0x18
++#define PCI_SECBUS_1	0x19
++#define PCI_SUBBUS_1	0x1a
++#define PCI_SECLAT_1	0x1b
++
++#define PCI_IOBASEL_1	0x1c
++#define PCI_IOLIMITL_1	0x1d
++#define PCI_IOBASEH_1	0x30 /**/
++#define PCI_IOLIMITH_1	0x32 /**/ 
++
++#define PCI_MEMBASE_1	0x20
++#define PCI_MEMLIMIT_1	0x22
++
++#define PCI_PMBASEL_1	0x24
++#define PCI_PMLIMITL_1	0x26
++#define PCI_PMBASEH_1	0 /**/
++#define PCI_PMLIMITH_1	0 /**/
++
++#define PCI_BRIDGECTL_1 0 /**/
++
++#define PCI_SUBVEND_1	0x34
++#define PCI_SUBDEV_1	0x36
++
++/* config registers for header type 2 devices */
++
++#define PCI_SECSTAT_2	0x16
++
++#define PCI_PRIBUS_2	0x18
++#define PCI_SECBUS_2	0x19
++#define PCI_SUBBUS_2	0x1a
++#define PCI_SECLAT_2	0x1b
++
++#define PCI_MEMBASE0_2	0x1c
++#define PCI_MEMLIMIT0_2 0x20
++#define PCI_MEMBASE1_2	0x24
++#define PCI_MEMLIMIT1_2 0x28
++#define PCI_IOBASE0_2	0x2c
++#define PCI_IOLIMIT0_2	0x30
++#define PCI_IOBASE1_2	0x34
++#define PCI_IOLIMIT1_2	0x38
++
++#define PCI_BRIDGECTL_2 0x3e
++
++#define PCI_SUBVEND_2	0x40
++#define PCI_SUBDEV_2	0x42
++
++#define PCI_PCCARDIF_2	0x44
++
++/*
++ * Mapping registers
++ */
++#define	PCI_MAPREG_START		0x10
++#define	PCI_MAPREG_END			0x28
++#define	PCI_MAPREG_ROM			0x30
++#define	PCI_MAPREG_PPB_END		0x18
++#define	PCI_MAPREG_PCB_END		0x14
++
++#define	PCI_MAPREG_TYPE(mr)						\
++	    ((mr) & PCI_MAPREG_TYPE_MASK)
++#define	PCI_MAPREG_TYPE_MASK			0x00000001
++
++#define	PCI_MAPREG_TYPE_MEM			0x00000000
++#define	PCI_MAPREG_TYPE_IO			0x00000001
++#define	PCI_MAPREG_TYPE_ROM			0x00000001
++
++#define	PCI_MAPREG_MEM_TYPE(mr)						\
++	    ((mr) & PCI_MAPREG_MEM_TYPE_MASK)
++#define	PCI_MAPREG_MEM_TYPE_MASK		0x00000006
++
++#define	PCI_MAPREG_MEM_TYPE_32BIT		0x00000000
++#define	PCI_MAPREG_MEM_TYPE_32BIT_1M		0x00000002
++#define	PCI_MAPREG_MEM_TYPE_64BIT		0x00000004
++
++#define	PCI_MAPREG_MEM_CACHEABLE(mr)					\
++	    (((mr) & PCI_MAPREG_MEM_CACHEABLE_MASK) != 0)
++#define	PCI_MAPREG_MEM_CACHEABLE_MASK		0x00000008
++
++#define	PCI_MAPREG_MEM_PREFETCHABLE(mr)					\
++	    (((mr) & PCI_MAPREG_MEM_PREFETCHABLE_MASK) != 0)
++#define	PCI_MAPREG_MEM_PREFETCHABLE_MASK	0x00000008
++
++#define	PCI_MAPREG_MEM_ADDR(mr)						\
++	    ((mr) & PCI_MAPREG_MEM_ADDR_MASK)
++#define	PCI_MAPREG_MEM_SIZE(mr)						\
++	    (PCI_MAPREG_MEM_ADDR(mr) & -PCI_MAPREG_MEM_ADDR(mr))
++#define	PCI_MAPREG_MEM_ADDR_MASK		0xfffffff0
++
++#define	PCI_MAPREG_MEM64_ADDR(mr)					\
++	    ((mr) & PCI_MAPREG_MEM64_ADDR_MASK)
++#define	PCI_MAPREG_MEM64_SIZE(mr)					\
++	    (PCI_MAPREG_MEM64_ADDR(mr) & -PCI_MAPREG_MEM64_ADDR(mr))
++#define	PCI_MAPREG_MEM64_ADDR_MASK		0xfffffffffffffff0
++
++#define	PCI_MAPREG_IO_ADDR(mr)						\
++	    ((mr) & PCI_MAPREG_IO_ADDR_MASK)
++#define	PCI_MAPREG_IO_SIZE(mr)						\
++	    (PCI_MAPREG_IO_ADDR(mr) & -PCI_MAPREG_IO_ADDR(mr))
++#define	PCI_MAPREG_IO_ADDR_MASK			0xfffffffe
++
++#define	PCI_MAPREG_ROM_ADDR(mr)						\
++	    ((mr) & PCI_MAPREG_ROM_ADDR_MASK)
++#define	PCI_MAPREG_ROM_SIZE(mr)						\
++	    (PCI_MAPREG_ROM_ADDR(mr) & -PCI_MAPREG_ROM_ADDR(mr))
++#define	PCI_MAPREG_ROM_ADDR_MASK		0xfffff800
++
++/*
++ * Cardbus CIS pointer (PCI rev. 2.1)
++ */
++#define PCI_CARDBUS_CIS_REG 0x28
++
++/*
++ * Subsystem identification register; contains a vendor ID and a device ID.
++ * Types/macros for PCI_ID_REG apply.
++ * (PCI rev. 2.1)
++ */
++#define PCI_SUBSYS_ID_REG 0x2c
++
++/*
++ * capabilities link list (PCI rev. 2.2)
++ */
++#define PCI_CAPLISTPTR_REG		0x34
++#define PCI_CAPLIST_PTR(cpr) ((cpr) & 0xff)
++#define PCI_CAPLIST_NEXT(cr) (((cr) >> 8) & 0xff)
++#define PCI_CAPLIST_CAP(cr) ((cr) & 0xff)
++
++#define PCI_CAP_REESSERVED	0x00
++#define PCI_CAP_PWRMGMT		0x01
++#define PCI_CAP_AGP		0x02
++#define PCI_CAP_VPD		0x03
++#define PCI_CAP_SLOTID		0x04
++#define PCI_CAP_MBI		0x05
++#define PCI_CAP_CPCI_HOTSWAP	0x06
++#define PCI_CAP_PCIX		0x07
++#define PCI_CAP_LDT		0x08
++#define PCI_CAP_VENDSPEC	0x09
++#define PCI_CAP_DEBUGPORT	0x0a
++#define PCI_CAP_CPCI_RSRCCTL	0x0b
++#define PCI_CAP_HOTPLUG		0x0c
++
++/*
++ * Power Management Control Status Register; access via capability pointer.
++ */
++#define PCI_PMCSR_STATE_MASK	0x03
++#define PCI_PMCSR_STATE_D0	0x00
++#define PCI_PMCSR_STATE_D1	0x01
++#define PCI_PMCSR_STATE_D2	0x02
++#define PCI_PMCSR_STATE_D3	0x03
++
++/*
++ * Interrupt Configuration Register; contains interrupt pin and line.
++ */
++#define	PCI_INTERRUPT_REG		0x3c
++
++typedef u_int8_t pci_intr_pin_t;
++typedef u_int8_t pci_intr_line_t;
++
++#define	PCI_INTERRUPT_PIN_SHIFT			8
++#define	PCI_INTERRUPT_PIN_MASK			0xff
++#define	PCI_INTERRUPT_PIN(icr) \
++	    (((icr) >> PCI_INTERRUPT_PIN_SHIFT) & PCI_INTERRUPT_PIN_MASK)
++
++#define	PCI_INTERRUPT_LINE_SHIFT		0
++#define	PCI_INTERRUPT_LINE_MASK			0xff
++#define	PCI_INTERRUPT_LINE(icr) \
++	    (((icr) >> PCI_INTERRUPT_LINE_SHIFT) & PCI_INTERRUPT_LINE_MASK)
++
++#define	PCI_MIN_GNT_SHIFT			16
++#define	PCI_MIN_GNT_MASK			0xff
++#define	PCI_MIN_GNT(icr) \
++	    (((icr) >> PCI_MIN_GNT_SHIFT) & PCI_MIN_GNT_MASK)
++
++#define	PCI_MAX_LAT_SHIFT			24
++#define	PCI_MAX_LAT_MASK			0xff
++#define	PCI_MAX_LAT(icr) \
++	    (((icr) >> PCI_MAX_LAT_SHIFT) & PCI_MAX_LAT_MASK)
++
++#define	PCI_INTERRUPT_PIN_NONE			0x00
++#define	PCI_INTERRUPT_PIN_A			0x01
++#define	PCI_INTERRUPT_PIN_B			0x02
++#define	PCI_INTERRUPT_PIN_C			0x03
++#define	PCI_INTERRUPT_PIN_D			0x04
++#define	PCI_INTERRUPT_PIN_MAX			0x04
++
++#endif /* _DEV_PCI_PCIREG_H_ */
+diff --git a/arch/mips/lemote/lm2f/lmbook/Makefile b/arch/mips/lemote/lm2f/lmbook/Makefile
+new file mode 100644
+index 0000000..deacf01
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbook/Makefile
+@@ -0,0 +1,9 @@
++#
++# Makefile for Lemote Loongson-2F mini notebook
++#
++
++obj-y	+= setup.o prom.o reset.o irq.o bonito-irq.o dbg_io.o
++
++obj-$(CONFIG_SUSPEND) += pm.o
++
++EXTRA_AFLAGS := $(CFLAGS)
+diff --git a/arch/mips/lemote/lm2f/lmbook/bonito-irq.c b/arch/mips/lemote/lm2f/lmbook/bonito-irq.c
+new file mode 100644
+index 0000000..ce04b4d
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbook/bonito-irq.c
+@@ -0,0 +1,105 @@
++/*
++ * Copyright 2001 MontaVista Software Inc.
++ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
++ * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
++ *
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/errno.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <asm/io.h>
++
++#include <asm/mips-boards/bonito64.h>
++
++#define	bonito_irq_shutdown	bonito_irq_disable
++
++
++static inline void bonito_irq_enable(unsigned int irq)
++{
++	BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE));
++	(void)BONITO_INTENSET;
++	mmiowb();
++}
++
++static unsigned int bonito_irq_startup(unsigned int irq) 
++{
++	bonito_irq_enable(irq);
++	return 0;
++}
++
++static inline void bonito_irq_ack(unsigned int irq) 
++{
++	BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE));
++	(void)BONITO_INTENCLR;
++	mmiowb();
++}
++
++static inline void bonito_irq_end(unsigned int irq) 
++{
++	BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE ));
++	mmiowb();
++}
++
++static inline void bonito_irq_disable(unsigned int irq)
++{
++	BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE));
++	(void)BONITO_INTENCLR; 
++	mmiowb();
++}
++
++static struct irq_chip bonito_irq_type = {
++	.name	= "bonito_irq",
++	.startup = bonito_irq_startup,
++	.shutdown = bonito_irq_shutdown,
++	.enable = bonito_irq_enable,
++	.disable = bonito_irq_disable,
++	.ack	= bonito_irq_ack,
++	.end    = bonito_irq_end,
++	.mask	= bonito_irq_disable,
++	.mask_ack = bonito_irq_disable,
++	.unmask	= bonito_irq_enable,
++};
++
++/* There is no need to handle the DMA IO problem on godson2f any more. */
++/*
++static struct irqaction dma_timeout_irqaction = {
++	.handler	= no_action,
++	.name		= "dma_timeout",
++};
++*/
++
++void bonito_irq_init(void)
++{
++	u32 i;
++
++	for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++) {
++		set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
++	}
++
++	/* setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction); */
++}
+diff --git a/arch/mips/lemote/lm2f/lmbook/dbg_io.c b/arch/mips/lemote/lm2f/lmbook/dbg_io.c
+new file mode 100644
+index 0000000..be80ca0
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbook/dbg_io.c
+@@ -0,0 +1,170 @@
++/*
++ * Copyright 2001 MontaVista Software Inc.
++ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
++ * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
++ *
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#include <linux/io.h>
++#include <asm/types.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <asm/serial.h>		/* For the serial port location and base baud */
++
++#define         UART16550_BAUD_2400             2400
++#define         UART16550_BAUD_4800             4800
++#define         UART16550_BAUD_9600             9600
++#define         UART16550_BAUD_19200            19200
++#define         UART16550_BAUD_38400            38400
++#define         UART16550_BAUD_57600            57600
++#define         UART16550_BAUD_115200           115200
++
++#define         UART16550_PARITY_NONE           0
++#define         UART16550_PARITY_ODD            0x08
++#define         UART16550_PARITY_EVEN           0x18
++#define         UART16550_PARITY_MARK           0x28
++#define         UART16550_PARITY_SPACE          0x38
++
++#define         UART16550_DATA_5BIT             0x0
++#define         UART16550_DATA_6BIT             0x1
++#define         UART16550_DATA_7BIT             0x2
++#define         UART16550_DATA_8BIT             0x3
++
++#define         UART16550_STOP_1BIT             0x0
++#define         UART16550_STOP_2BIT             0x4
++
++/* ----------------------------------------------------- */
++
++/* === CONFIG === */
++#ifdef CONFIG_64BIT
++#define         BASE                    (0xffffffffbff003f8)
++#else
++#define         BASE                    (0xbff003f8)
++#endif
++
++#define         MAX_BAUD                BASE_BAUD
++/* === END OF CONFIG === */
++
++#define         REG_OFFSET              1
++
++/* register offset */
++#define         OFS_RCV_BUFFER          0
++#define         OFS_TRANS_HOLD          0
++#define         OFS_SEND_BUFFER         0
++#define         OFS_INTR_ENABLE         (1*REG_OFFSET)
++#define         OFS_INTR_ID             (2*REG_OFFSET)
++#define         OFS_DATA_FORMAT         (3*REG_OFFSET)
++#define         OFS_LINE_CONTROL        (3*REG_OFFSET)
++#define         OFS_MODEM_CONTROL       (4*REG_OFFSET)
++#define         OFS_RS232_OUTPUT        (4*REG_OFFSET)
++#define         OFS_LINE_STATUS         (5*REG_OFFSET)
++#define         OFS_MODEM_STATUS        (6*REG_OFFSET)
++#define         OFS_RS232_INPUT         (6*REG_OFFSET)
++#define         OFS_SCRATCH_PAD         (7*REG_OFFSET)
++
++#define         OFS_DIVISOR_LSB         (0*REG_OFFSET)
++#define         OFS_DIVISOR_MSB         (1*REG_OFFSET)
++
++/* memory-mapped read/write of the port */
++#define         UART16550_READ(y)    (*((volatile u8*)(BASE + y)))
++#define         UART16550_WRITE(y, z)  ((*((volatile u8*)(BASE + y))) = z)
++
++void debugInit(u32 baud, u8 data, u8 parity, u8 stop)
++{
++	/* disable interrupts */
++	UART16550_WRITE(OFS_INTR_ENABLE, 0);
++
++	/* set up buad rate */
++	{
++		u32 divisor;
++
++		/* set DIAB bit */
++		UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
++
++		/* set divisor */
++		divisor = MAX_BAUD / baud;
++		UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
++		UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
++
++		/* clear DIAB bit */
++		UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
++	}
++
++	/* set data format */
++	UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
++}
++
++static int remoteDebugInitialized = 0;
++
++u8 getDebugChar(void)
++{
++	if (!remoteDebugInitialized) {
++		remoteDebugInitialized = 1;
++		debugInit(UART16550_BAUD_115200,
++			  UART16550_DATA_8BIT,
++			  UART16550_PARITY_NONE, UART16550_STOP_1BIT);
++	}
++
++	while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0) ;
++	return UART16550_READ(OFS_RCV_BUFFER);
++}
++
++int putDebugChar(u8 byte)
++{
++	if (!remoteDebugInitialized) {
++		remoteDebugInitialized = 1;
++		/*
++		   debugInit(UART16550_BAUD_115200,
++		   UART16550_DATA_8BIT,
++		   UART16550_PARITY_NONE, UART16550_STOP_1BIT); */
++	}
++
++	while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0) ;
++	UART16550_WRITE(OFS_SEND_BUFFER, byte);
++	return 1;
++}
++
++extern void prom_putchar(char c);
++
++void prom_printf(char *fmt, ...)
++{
++	va_list args;
++	char ppbuf[1024];
++	char *bptr;
++
++	va_start(args, fmt);
++	vsprintf(ppbuf, fmt, args);
++
++	bptr = ppbuf;
++
++	while (*bptr != 0) {
++		if (*bptr == '\n')
++			prom_putchar('\r');
++
++		prom_putchar(*bptr++);
++	}
++	va_end(args);
++}
+diff --git a/arch/mips/lemote/lm2f/lmbook/irq.c b/arch/mips/lemote/lm2f/lmbook/irq.c
+new file mode 100644
+index 0000000..57f3b76
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbook/irq.c
+@@ -0,0 +1,234 @@
++/*
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/irq_cpu.h>
++#include <asm/i8259.h>
++#include <asm/mipsregs.h>
++#include <asm/delay.h>
++#include <asm/mips-boards/bonito64.h>
++
++#define	BONITO_INT_BIT_GPIO0		(1 << 0)
++#define	BONITO_INT_BIT_GPIO1		(1 << 1)
++#define	BONITO_INT_BIT_GPIO2		(1 << 2)
++#define	BONITO_INT_BIT_GPIO3		(1 << 3)
++#define	BONITO_INT_BIT_PCI_INTA		(1 << 4)
++#define	BONITO_INT_BIT_PCI_INTB		(1 << 5)
++#define	BONITO_INT_BIT_PCI_INTC		(1 << 6)
++#define	BONITO_INT_BIT_PCI_INTD		(1 << 7)
++#define	BONITO_INT_BIT_PCI_PERR		(1 << 8)
++#define	BONITO_INT_BIT_PCI_SERR		(1 << 9)
++#define	BONITO_INT_BIT_DDR		(1 << 10)
++#define	BONITO_INT_BIT_INT0		(1 << 11)
++#define	BONITO_INT_BIT_INT1		(1 << 12)
++#define	BONITO_INT_BIT_INT2		(1 << 13)
++#define	BONITO_INT_BIT_INT3		(1 << 14)
++
++#define	BONITO_INT_TIMER_OFF		7
++#define	BONITO_INT_BONITO_OFF		6
++#define	BONITO_INT_UART_OFF			3
++#define	BONITO_INT_I8259_OFF		2
++
++/****************************************************************/
++
++static void loongson2f_timer_dispatch(void)
++{
++	/* place the loongson2f timer interrupt on 23 */
++	do_IRQ(MIPS_CPU_IRQ_BASE + BONITO_INT_TIMER_OFF);
++	return;
++}
++
++static void loongson2f_bonito_dispatch(void)
++{
++	int int_status;
++	int i = 0;
++
++	/* place the other interrupt on bit6 for bonito, inclding PCI and so on */
++	int_status = BONITO_INTISR & BONITO_INTEN;
++	
++	for(i = 0; (i < 10) && int_status; i++){
++		if(int_status & (1 << i)){
++			if(i == 10)
++				printk("ddr int.\n");
++			if(int_status & 0x000000f0)
++				do_IRQ(BONITO_IRQ_BASE + i);
++			int_status &= ~(1 << i);
++		}
++	}
++	
++	return;
++}
++
++static void loongson2f_int3_dispatch(void)
++{
++	int int_status;
++	
++	int_status = BONITO_INTISR & BONITO_INTEN;
++	if(int_status & BONITO_INT_BIT_INT3){
++	}
++	
++	return;
++}
++
++static void loongson2f_int2_dispatch(void)
++{
++	int int_status;
++	
++	int_status = BONITO_INTISR & BONITO_INTEN;
++	if(int_status & BONITO_INT_BIT_INT2){
++	}
++	
++	return;
++}
++
++static void loongson2f_int1_dispatch(void)
++{
++	/* place the loongson2f uart interrupt on int1 */
++	do_IRQ(MIPS_CPU_IRQ_BASE + BONITO_INT_UART_OFF);
++}
++
++static void i8259_irqdispatch(void)
++{
++	int irq, isr;
++	extern unsigned int cached_irq_mask;
++
++	if((BONITO_INTISR & BONITO_INTEN) & BONITO_INT_BIT_INT0) {
++
++		isr = inb(0x20) | (inb(0xa0) << 8);
++		isr &= ~0x4; // irq2 for cascade
++		isr &= ~cached_irq_mask;
++		irq = ffs(isr) - 1;
++
++		if(irq >= 0) {
++			do_IRQ(irq);
++		} else {
++			spurious_interrupt();
++		}
++	}
++}
++
++static void loongson2f_steer1_dispatch(void)
++{
++	return;
++}
++
++static void loongson2f_steer0_dispatch(void)
++{
++	return;
++}
++
++
++asmlinkage void plat_irq_dispatch(void)
++{
++	unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
++
++	if(pending & CAUSEF_IP7){
++		loongson2f_timer_dispatch();
++	}else if(pending & CAUSEF_IP6){ /*north bridge*/
++		do_IRQ(MIPS_CPU_IRQ_BASE + 6);
++		loongson2f_bonito_dispatch();
++	}else if(pending & CAUSEF_IP5){
++		loongson2f_int3_dispatch();
++	}else if(pending & CAUSEF_IP4){
++		loongson2f_int2_dispatch();
++	}else if(pending & CAUSEF_IP3){ /*cpu uart*/
++		loongson2f_int1_dispatch();
++	}else if(pending & CAUSEF_IP2){ /*south bridge*/
++		i8259_irqdispatch();
++	}else if(pending & CAUSEF_IP1){
++		loongson2f_steer1_dispatch();
++	}else if(pending & CAUSEF_IP0){
++		loongson2f_steer0_dispatch();
++	}else{
++		spurious_interrupt();
++	}
++	return;
++}
++
++static struct irqaction cascade_irqaction = {
++	.handler = no_action,
++	.mask = CPU_MASK_NONE,
++	.name = "cascade",
++};
++
++irqreturn_t ip6_action(int cpl, void *dev_id, struct pt_regs *regs)
++{
++	return IRQ_HANDLED;
++}
++
++static struct irqaction ip6_irqaction = {
++	.handler = ip6_action,
++	.mask = CPU_MASK_NONE,
++	.name = "cascade",
++	.flags = IRQF_SHARED,
++};
++
++void __init arch_init_irq(void)
++{
++	extern void bonito_irq_init(void);
++
++	/*
++	 * Clear all of the interrupts while we change the able around a bit.
++	 * int-handler is not on bootstrap
++	 */
++	clear_c0_status(ST0_IM | ST0_BEV);
++	local_irq_disable();
++	
++	/* setup cs5536 as high level */
++	BONITO_INTPOL  = (1 << 11 | 1 << 12);
++	BONITO_INTEDGE &= ~(1 << 11 | 1 << 12);
++
++	/* no steer */
++	BONITO_INTSTEER = 0;
++
++	/*
++	 * Mask out all interrupt by writing "1" to all bit position in
++	 * the interrupt reset reg.
++	 */
++	BONITO_INTENCLR = ~0;
++
++	/* init all controller
++	 *   0-15         ------> i8259 interrupt
++	 *   16-23        ------> mips cpu interrupt
++	 *   32-63        ------> bonito irq
++	 */
++	
++	/* Sets the first-level interrupt dispatcher. */
++	mips_cpu_irq_init();
++
++	init_i8259_irqs();
++	bonito_irq_init();
++	
++	/* setup bonito interrupt */
++	setup_irq(MIPS_CPU_IRQ_BASE + BONITO_INT_BONITO_OFF, &ip6_irqaction);
++	/* 8259 irq at IP2 */
++	setup_irq(MIPS_CPU_IRQ_BASE + BONITO_INT_I8259_OFF, &cascade_irqaction);
++
++}
+diff --git a/arch/mips/lemote/lm2f/lmbook/pm.c b/arch/mips/lemote/lm2f/lmbook/pm.c
+new file mode 100644
+index 0000000..f759200
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbook/pm.c
+@@ -0,0 +1,240 @@
++/*
++ * Loongson2F-specific STR/Standby
++ *
++ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
++ * Author: Wu Zhangjin <wuzj@lemote.com>
++ * Author: Hongbing Hu <huhb@lemote.com>
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#include <linux/delay.h>
++#include <linux/i8042.h>
++#include <linux/kernel.h>
++#include <linux/suspend.h>
++
++#include <asm/i8259.h>
++#include <asm/io.h>
++#include <asm/mips-boards/bonito64.h>
++
++#include "../../../../../drivers/misc/loongson/ec.h"
++
++#define KBD_ENABLE   0x01
++#define I8042_KBD_IRQ  1
++#define SCI_IRQ_NUM  10
++
++#ifdef CONFIG_64BIT
++#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p)))
++#else
++#define PTR_PAD(p) (p)
++#endif
++
++static unsigned int cached_master_mask; /* i8259A */
++static unsigned int cached_slave_mask;
++static unsigned int cached_bonito_irq_mask; /* bonito */
++
++extern void ec_write(unsigned short addr, unsigned char val);
++extern unsigned char ec_read(unsigned short addr);
++extern int i8042_flush();
++
++void shutdown_devices(void)
++{
++	unsigned int value;
++
++	/* close crt output */
++	outb(0x21, 0x3c4);
++	value = inb(0x3c5);
++	value |= (1 << 7);
++	outb(0x21, 0x3c4);
++	outb(value, 0x3c5);
++
++	/* close lcd output */
++	outb(0x31, 0x3c4);
++	value = inb(0x3c5);
++	value = (value & 0xf8) | 0x02;
++	outb(0x31, 0x3c4);
++	outb(value, 0x3c5);
++
++	/* LCD backlight off */
++	ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_OFF);
++
++	/* shutdown three usb ports */
++	ec_write(0xf461,0x00);
++	ec_write(0xf462,0x00);
++	ec_write(0xf463,0x00);
++}
++
++void poweron_devices(void)
++{
++	unsigned int value;
++
++	/* open lcd output */
++	outb(0x31, 0x3c4);
++	value = inb(0x3c5);
++	value = (value & 0xf8) | 0x03;
++	outb(0x31, 0x3c4);
++	outb(value, 0x3c5);
++
++	/* LCD backlight on */
++	ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_ON);
++
++	/* three usb ports power on */
++	ec_write(0xf461,0x01);
++	ec_write(0xf462,0x01);
++	ec_write(0xf463,0x01);
++}
++
++void mach_irqs_disable(void)
++{
++	/* disable all interrupts of i8259A */
++	cached_slave_mask = inb(PIC_SLAVE_IMR);
++	cached_master_mask = inb(PIC_MASTER_IMR);
++
++	outb(0xff, PIC_SLAVE_IMR);
++	inb(PIC_SLAVE_IMR);
++	outb(0xff, PIC_MASTER_IMR);
++	inb(PIC_MASTER_IMR);
++
++	/* disable all interrupts of bonito */
++	cached_bonito_irq_mask = BONITO_INTEN;
++	BONITO_INTENCLR = 0xffff;
++	(void)BONITO_INTENCLR;
++	mmiowb();
++}
++
++void mach_irqs_enable(void)
++{
++	/* only enable the cached interrupts of i8259A */
++	outb(cached_slave_mask, PIC_SLAVE_IMR);
++	outb(cached_master_mask, PIC_MASTER_IMR);
++
++	/* enable all cached interrupts of bonito */
++	BONITO_INTENSET = cached_bonito_irq_mask;
++	(void)BONITO_INTENSET;
++	mmiowb();
++}
++extern int sci_get_event_num(void);
++extern int ec_query_seq(unsigned char cmd);
++
++int check_wakeup_event(void)
++{
++	int irq, isr;
++
++	/* query the interrupt number */
++	isr = inb(0x20) | (inb(0xa0) << 8);
++	isr &= ~0x4; // irq2 for cascade
++        isr &= ~(cached_master_mask|cached_slave_mask << 8);
++        irq = ffs(isr) - 1;
++
++        if (irq < 0)
++                return 0;
++        printk("irq = %d\n", irq);
++
++        if (irq == I8042_KBD_IRQ)
++                return 1;
++#if 0
++        else if (irq == SCI_IRQ_NUM) {
++                int ret, sci_event;
++                /* query the event number */
++                ret = ec_query_seq(CMD_GET_EVENT_NUM);
++                if (ret < 0)
++                        return 0;
++                sci_event = sci_get_event_num();
++                if (sci_event < 0)
++                        return 0;
++       			if (sci_event == SCI_EVENT_NUM_LID) {
++                        int lid_status;
++                        /* check the LID status */
++                        lid_status = ec_read(REG_LID_DETECT);
++                        /* wakeup cpu when people open the LID */
++                        if (lid_status == BIT_LID_DETECT_ON)
++                                return 1;
++                }
++        }
++#endif
++        return 0;
++} 
++
++static int ls2f_pm_standby(void)
++{
++	unsigned int cpu_freq, hi, lo, error, irq_mask;	
++	unsigned char kbd = KBD_ENABLE;
++
++	mach_irqs_disable();	
++	shutdown_devices();
++	/* Enable kbd to wakeup cpu */	
++	outb((0xff & ~(1 << I8042_KBD_IRQ)), PIC_MASTER_IMR);
++	inb(PIC_MASTER_IMR);
++	error = i8042_command(&kbd, I8042_CMD_CTL_WCTR);
++	if(error){
++		printk(KERN_ERR "Can't enable kbd\n");
++		return error;
++	}
++#if 0
++	/* Enable the feature that open notebook to wakeup cpu */ 
++	irq_mask = inb(PIC_MASTER_IMR);
++	outb(irq_mask & ~(1 << (SCI_IRQ_NUM - 8)), PIC_MASTER_IMR);
++	inb(PIC_MASTER_IMR);
++	outb(0xff & ~(1 << (SCI_IRQ_NUM - 8)), PIC_SLAVE_IMR);
++	inb(PIC_SLAVE_IMR);
++#endif
++	cpu_freq = *(volatile u32*)PTR_PAD(0xbfe00180);
++	/* Put CPU into wait mode zzzz....., wait for wakeup event */
++	*(volatile u32*)PTR_PAD(0xbfe00180) &= ~0x7;
++	i8042_flush();
++	*(volatile u32*)PTR_PAD(0xbfe00180) &= ~0x7;
++	/* Wakeup......, restore CPU freq */
++	*(volatile u32*)PTR_PAD(0xbfe00180) = cpu_freq;
++	
++wait:
++        if (!check_wakeup_event()) {
++                *(volatile u32*)PTR_PAD(0xbfe00180)&= ~0x7;
++                goto wait;
++        }
++	
++	poweron_devices();
++	mach_irqs_enable();
++
++	return 0;
++}
++
++/* Need to hardware support,later it will be ok -) */
++static int ls2f_pm_mem(void)
++{
++	return 0;
++}
++
++/* For standby, for mem in the future */
++static int ls2f_pm_valid_state(suspend_state_t state)
++{
++	return  state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM; 
++}
++
++static int ls2f_pm_enter(suspend_state_t state)
++{
++	switch(state){
++	case PM_SUSPEND_STANDBY:
++	case PM_SUSPEND_MEM:		
++			return ls2f_pm_standby();
++	default:
++			return 0;
++	}
++}
++
++struct platform_suspend_ops ls2f_pm_ops ={
++	.valid = ls2f_pm_valid_state,
++	.enter = ls2f_pm_enter,
++};
++
++static int __init ls2f_pm_init(void)
++{
++	printk(KERN_INFO "Loongson2F Power Management \n");
++	suspend_set_ops(&ls2f_pm_ops);
++	
++	return 0;
++}
++arch_initcall(ls2f_pm_init);
+diff --git a/arch/mips/lemote/lm2f/lmbook/prom.c b/arch/mips/lemote/lm2f/lmbook/prom.c
+new file mode 100644
+index 0000000..795fe8e
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbook/prom.c
+@@ -0,0 +1,157 @@
++/*
++ * Based on Ocelot Linux port, which is
++ * Copyright 2001 MontaVista Software Inc.
++ * Author: jsun@mvista.com or jsun@junsun.net
++ *
++ * Copyright 2003 ICT CAS
++ * Author: Michael Guo <guoyi@ict.ac.cn>
++ *
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/sched.h>
++#include <linux/bootmem.h>
++
++#include <asm/addrspace.h>
++#include <asm/bootinfo.h>
++
++extern unsigned long bus_clock;
++extern unsigned long cpu_clock_freq;
++extern unsigned int memsize, highmemsize;
++extern int putDebugChar(unsigned char byte);
++
++static int argc;
++/* pmon passes arguments in 32bit pointers */
++static int *arg;
++static int *env;
++
++const char *get_system_type(void)
++{
++	return "lemote-yeeloong";
++}
++
++void __init prom_init_cmdline(void)
++{
++	int i;
++	long l;
++
++	/* arg[0] is "g", the rest is boot parameters */
++	arcs_cmdline[0] = '\0';
++	for (i = 1; i < argc; i++) {
++		l = (long)arg[i];
++		if (strlen(arcs_cmdline) + strlen(((char *)l) + 1)
++		    >= sizeof(arcs_cmdline))
++			break;
++		strcat(arcs_cmdline, ((char *)l));
++		strcat(arcs_cmdline, " ");
++	}
++}
++
++extern void _wrmsr(u32 msr, u32 hi, u32 lo);
++
++void __init prom_init(void)
++{
++	long l;
++	unsigned char default_root[50] = "/dev/hda1";
++	argc = fw_arg0;
++	arg = (int *)fw_arg1;
++	env = (int *)fw_arg2;
++
++	 /* set lpc irq to quiet mode*/
++	//_wrmsr(0x8000004e, 0, 0);
++	//_wrmsr(0x8000004e, 0, 0xc0);
++	_wrmsr(0x80000014, 0x00, 0x16000003);
++
++	/*Emulate post for usb*/
++	_wrmsr(0x40000001, 0x4, 0xBF000);
++
++	prom_init_cmdline();
++
++#if 1
++	if (!strstr(arcs_cmdline, "no_auto_cmd")) {
++		char *pmon_ver, *ec_ver, *p, version[60], ec_version[64];
++		
++		p = arcs_cmdline;
++
++		pmon_ver = strstr(arcs_cmdline, "PMON_VER");
++		if (pmon_ver) {
++			if((p = strstr(pmon_ver, " ")))
++				*p++ = '\0';
++			strncpy(version, pmon_ver, 60);
++		} else
++			strncpy(version, "PMON_VER=Unknown", 60);
++
++		ec_ver = strstr(p, "EC_VER");
++		if (ec_ver) {
++			if((p = strstr(ec_ver, " ")))
++				*p = '\0';
++			strncpy(ec_version, ec_ver, 64);
++		} else
++			strncpy(ec_version, "EC_VER=Unknown", 64);
++
++		p = strstr(arcs_cmdline, "root=");
++		if(p) {
++			strncpy(default_root, p, sizeof(default_root));
++			if(p=strstr(default_root, " "))
++				*p = '\0';
++		}
++
++		memset(arcs_cmdline, 0, sizeof(arcs_cmdline));
++		strcat(arcs_cmdline, version);
++		strcat(arcs_cmdline, " ");
++		strcat(arcs_cmdline, ec_version);
++		strcat(arcs_cmdline, " ");
++		strcat(arcs_cmdline, " console=tty2");
++		strcat(arcs_cmdline, " quiet");
++		strcat(arcs_cmdline, " splash=silent,theme:yeeloong");
++	}
++#endif
++	if ((strstr(arcs_cmdline, "console=")) == NULL)
++		strcat(arcs_cmdline, " console=ttyS0,115200");
++
++	if ((strstr(arcs_cmdline, "root=")) == NULL)
++		strcat(arcs_cmdline, " root=/dev/hda1");
++
++	l = (long)*env;
++	while (l != 0) {
++		if (strncmp("busclock", (char *)l, strlen("busclock")) == 0) {
++			bus_clock = simple_strtol((char *)l + strlen("busclock="),
++					NULL, 10);
++		}
++		if (strncmp("cpuclock", (char *)l, strlen("cpuclock")) == 0) {
++			cpu_clock_freq = simple_strtol((char *)l + strlen("cpuclock="),
++					NULL, 10);
++		}
++		if (strncmp("memsize", (char *)l, strlen("memsize")) == 0) {
++			memsize = simple_strtol((char *)l + strlen("memsize="),
++						NULL, 10);
++		}
++		if (strncmp("highmemsize", (char *)l, strlen("highmemsize")) == 0) {
++			highmemsize = simple_strtol((char *)l + strlen("highmemsize="),
++					  NULL, 10);
++		}
++		env++;
++		l = (long)*env;
++	}
++	if (memsize == 0)
++		memsize = 256;
++
++	printk("busclock=%ld, cpuclock=%ld,memsize=%d,highmemsize=%d\n",
++	       bus_clock, cpu_clock_freq, memsize, highmemsize);
++}
++
++void __init prom_free_prom_memory(void)
++{
++}
++
++void prom_putchar(char c)
++{
++	putDebugChar(c);
++}
+diff --git a/arch/mips/lemote/lm2f/lmbook/reset.c b/arch/mips/lemote/lm2f/lmbook/reset.c
+new file mode 100644
+index 0000000..a4af771
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbook/reset.c
+@@ -0,0 +1,80 @@
++/*
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ *
++ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ */
++
++#include <asm/io.h>
++#include <asm/pgtable.h>
++#include <asm/processor.h>
++#include <asm/reboot.h>
++#include <asm/system.h>
++
++#include <linux/sched.h>
++#include <linux/mm.h>
++#include <linux/pm.h>
++#include <linux/delay.h>
++
++extern void _wrmsr(u32 reg, u32 hi, u32 lo);
++extern void _rdmsr(u32 reg, u32 *hi, u32 *lo);
++
++static void loongson2f_restart(char *command)
++{
++#ifdef CONFIG_32BIT
++	*(volatile u32*)0xbfe00180 |= 0x7;
++#else
++	*(volatile u32*)0xffffffffbfe00180 |= 0x7;
++#endif
++
++#ifdef	CONFIG_64BIT
++	*((volatile u8*)(0xffffffffbfd00381)) = 0xf4;
++	*((volatile u8*)(0xffffffffbfd00382)) = 0xec;
++	*((volatile u8*)(0xffffffffbfd00383)) = 0x01;
++#else
++	*((volatile u8*)(0xbfd00381)) = 0xf4;
++	*((volatile u8*)(0xbfd00382)) = 0xec;
++	*((volatile u8*)(0xbfd00383)) = 0x01;
++#endif
++
++	while (1);
++	/* Wait the system reset completely */
++#if 0
++	__asm__ __volatile__ (
++					".long 0x3c02bfc0\n"
++					".long 0x00400008\n"
++					:::"v0"
++					);
++#endif
++}
++
++static void loongson2f_halt(void)
++{
++#ifdef	CONFIG_64BIT
++	/* cpu-gpio0 output low */
++	*((volatile u32*)(0xffffffffbfe0011c)) &= ~0x00000001;
++	/* cpu-gpio0 as output */
++	*((volatile u32*)(0xffffffffbfe00120)) &= ~0x00000001;
++#else
++	/* cpu-gpio0 output low */
++	*((volatile u32*)(0xbfe0011c)) &= ~0x00000001;
++	/* cpu-gpio0 as output */
++	*((volatile u32*)(0xbfe00120)) &= ~0x00000001;
++#endif
++
++}
++
++static void loongson2f_power_off(void)
++{
++	loongson2f_halt();
++}
++
++void mips_reboot_setup(void)
++{
++	_machine_restart = loongson2f_restart;
++	_machine_halt = loongson2f_halt;
++	pm_power_off = loongson2f_power_off;
++}
+diff --git a/arch/mips/lemote/lm2f/lmbook/setup.c b/arch/mips/lemote/lm2f/lmbook/setup.c
+new file mode 100644
+index 0000000..33c422c
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbook/setup.c
+@@ -0,0 +1,134 @@
++/*
++ * BRIEF MODULE DESCRIPTION
++ * setup.c - board dependent boot routines
++ *
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/bootmem.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++
++#include <asm/bootinfo.h>
++#include <asm/mc146818-time.h>
++#include <asm/time.h>
++#include <asm/wbflush.h>
++
++#ifdef CONFIG_VT
++#include <linux/console.h>
++#include <linux/screen_info.h>
++#endif
++
++extern void mips_reboot_setup(void);
++
++#ifdef CONFIG_64BIT
++#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p)))
++#else
++#define PTR_PAD(p) (p)
++#endif
++
++unsigned long cpu_clock_freq;
++unsigned long bus_clock;
++unsigned int memsize;
++unsigned int highmemsize = 0;
++
++extern int __init init_mfgpt_clocksource(void);
++
++void __init plat_time_init(void)
++{
++	/* setup mips r4k timer */
++	mips_hpt_frequency = cpu_clock_freq / 2;
++
++#ifdef CONFIG_LS2F_CPU_FREQ
++	init_mfgpt_clocksource();
++#endif
++}
++
++unsigned long read_persistent_clock(void)
++{
++	return mc146818_get_cmos_time();
++}
++
++void (*__wbflush)(void);
++EXPORT_SYMBOL(__wbflush);
++
++static void wbflush_loongson2f(void)
++{
++	asm(".set\tpush\n\t"
++	    ".set\tnoreorder\n\t"
++	    ".set mips3\n\t"
++	    "sync\n\t"
++	    "nop\n\t"
++	    ".set\tpop\n\t"
++	    ".set mips0\n\t");
++}
++
++void __init plat_mem_setup(void)
++{
++	set_io_port_base(PTR_PAD(0xbfd00000));
++
++	mips_reboot_setup();
++
++	__wbflush = wbflush_loongson2f;
++
++	add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM);
++#ifdef CONFIG_64BIT
++	__asm__(
++		".set mips3\n"			
++		"dli $2, 0x900000003ff00000\n"
++		"dli $3, 0x0000000080000000\n"
++		"sd  $3, 0x10($2)\n"
++		"sd  $0, 0x50($2)\n"
++		"dli $3, 0xffffffffc0000000\n"
++		"sd  $3, 0x30($2)\n"
++		".set mips0\n"
++		:::"$2","$3","memory");
++	if (highmemsize > 0) {
++		add_memory_region(0x90000000, highmemsize << 20, BOOT_MEM_RAM);
++	}
++#endif
++
++#ifdef CONFIG_VT
++#if defined(CONFIG_VGA_CONSOLE)
++	conswitchp = &vga_con;
++
++	screen_info = (struct screen_info) {
++		0, 25,		/* orig-x, orig-y */
++		    0,		/* unused */
++		    0,		/* orig-video-page */
++		    0,		/* orig-video-mode */
++		    80,		/* orig-video-cols */
++		    0, 0, 0,	/* ega_ax, ega_bx, ega_cx */
++		    25,		/* orig-video-lines */
++		    VIDEO_TYPE_VGAC,	/* orig-video-isVGA */
++		    16		/* orig-video-points */
++	};
++#elif defined(CONFIG_DUMMY_CONSOLE)
++	conswitchp = &dummy_con;
++#endif
++#endif
++
++}
++
++EXPORT_SYMBOL(cpu_clock_freq);
+diff --git a/arch/mips/lemote/lm2f/lmbox/Makefile b/arch/mips/lemote/lm2f/lmbox/Makefile
+new file mode 100644
+index 0000000..e8f2740
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbox/Makefile
+@@ -0,0 +1,9 @@
++#
++# Makefile for Lemote Loongson-2F based mini box.
++#
++
++obj-y	+= setup.o prom.o reset.o irq.o bonito-irq.o dbg_io.o 
++
++obj-$(CONFIG_SUSPEND) += pm.o
++
++EXTRA_AFLAGS := $(CFLAGS)
+diff --git a/arch/mips/lemote/lm2f/lmbox/bonito-irq.c b/arch/mips/lemote/lm2f/lmbox/bonito-irq.c
+new file mode 100644
+index 0000000..ce04b4d
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbox/bonito-irq.c
+@@ -0,0 +1,105 @@
++/*
++ * Copyright 2001 MontaVista Software Inc.
++ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
++ * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
++ *
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/errno.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <asm/io.h>
++
++#include <asm/mips-boards/bonito64.h>
++
++#define	bonito_irq_shutdown	bonito_irq_disable
++
++
++static inline void bonito_irq_enable(unsigned int irq)
++{
++	BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE));
++	(void)BONITO_INTENSET;
++	mmiowb();
++}
++
++static unsigned int bonito_irq_startup(unsigned int irq) 
++{
++	bonito_irq_enable(irq);
++	return 0;
++}
++
++static inline void bonito_irq_ack(unsigned int irq) 
++{
++	BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE));
++	(void)BONITO_INTENCLR;
++	mmiowb();
++}
++
++static inline void bonito_irq_end(unsigned int irq) 
++{
++	BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE ));
++	mmiowb();
++}
++
++static inline void bonito_irq_disable(unsigned int irq)
++{
++	BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE));
++	(void)BONITO_INTENCLR; 
++	mmiowb();
++}
++
++static struct irq_chip bonito_irq_type = {
++	.name	= "bonito_irq",
++	.startup = bonito_irq_startup,
++	.shutdown = bonito_irq_shutdown,
++	.enable = bonito_irq_enable,
++	.disable = bonito_irq_disable,
++	.ack	= bonito_irq_ack,
++	.end    = bonito_irq_end,
++	.mask	= bonito_irq_disable,
++	.mask_ack = bonito_irq_disable,
++	.unmask	= bonito_irq_enable,
++};
++
++/* There is no need to handle the DMA IO problem on godson2f any more. */
++/*
++static struct irqaction dma_timeout_irqaction = {
++	.handler	= no_action,
++	.name		= "dma_timeout",
++};
++*/
++
++void bonito_irq_init(void)
++{
++	u32 i;
++
++	for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++) {
++		set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
++	}
++
++	/* setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction); */
++}
+diff --git a/arch/mips/lemote/lm2f/lmbox/dbg_io.c b/arch/mips/lemote/lm2f/lmbox/dbg_io.c
+new file mode 100644
+index 0000000..5900fdc
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbox/dbg_io.c
+@@ -0,0 +1,182 @@
++/*
++ * Copyright 2001 MontaVista Software Inc.
++ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
++ * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
++ *
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#include <linux/io.h>
++#include <asm/types.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <asm/serial.h>		/* For the serial port location and base baud */
++
++#define         UART16550_BAUD_2400             2400
++#define         UART16550_BAUD_4800             4800
++#define         UART16550_BAUD_9600             9600
++#define         UART16550_BAUD_19200            19200
++#define         UART16550_BAUD_38400            38400
++#define         UART16550_BAUD_57600            57600
++#define         UART16550_BAUD_115200           115200
++
++#define         UART16550_PARITY_NONE           0
++#define         UART16550_PARITY_ODD            0x08
++#define         UART16550_PARITY_EVEN           0x18
++#define         UART16550_PARITY_MARK           0x28
++#define         UART16550_PARITY_SPACE          0x38
++
++#define         UART16550_DATA_5BIT             0x0
++#define         UART16550_DATA_6BIT             0x1
++#define         UART16550_DATA_7BIT             0x2
++#define         UART16550_DATA_8BIT             0x3
++
++#define         UART16550_STOP_1BIT             0x0
++#define         UART16550_STOP_2BIT             0x4
++
++/* ----------------------------------------------------- */
++
++#ifdef	USE_GODSON2F_UART
++
++/* === CONFIG === */
++#ifdef CONFIG_64BIT
++#define         BASE                    (0xffffffffbff003f8)
++#else
++#define         BASE                    (0xbff003f8)
++#endif
++
++#else	/* USE_CS5536_UART1/2 */
++
++#ifdef CONFIG_64BIT
++#define         BASE                    0xffffffffbfd002f8
++#else
++#define         BASE                    0xbfd002f8
++#endif
++
++#endif	/* end of USE_GODSON2F_UART */
++
++#define         MAX_BAUD                BASE_BAUD
++/* === END OF CONFIG === */
++
++#define         REG_OFFSET              1
++
++/* register offset */
++#define         OFS_RCV_BUFFER          0
++#define         OFS_TRANS_HOLD          0
++#define         OFS_SEND_BUFFER         0
++#define         OFS_INTR_ENABLE         (1*REG_OFFSET)
++#define         OFS_INTR_ID             (2*REG_OFFSET)
++#define         OFS_DATA_FORMAT         (3*REG_OFFSET)
++#define         OFS_LINE_CONTROL        (3*REG_OFFSET)
++#define         OFS_MODEM_CONTROL       (4*REG_OFFSET)
++#define         OFS_RS232_OUTPUT        (4*REG_OFFSET)
++#define         OFS_LINE_STATUS         (5*REG_OFFSET)
++#define         OFS_MODEM_STATUS        (6*REG_OFFSET)
++#define         OFS_RS232_INPUT         (6*REG_OFFSET)
++#define         OFS_SCRATCH_PAD         (7*REG_OFFSET)
++
++#define         OFS_DIVISOR_LSB         (0*REG_OFFSET)
++#define         OFS_DIVISOR_MSB         (1*REG_OFFSET)
++
++/* memory-mapped read/write of the port */
++#define         UART16550_READ(y)    (*((volatile u8*)(BASE + y)))
++#define         UART16550_WRITE(y, z)  ((*((volatile u8*)(BASE + y))) = z)
++
++void debugInit(u32 baud, u8 data, u8 parity, u8 stop)
++{
++	/* disable interrupts */
++	UART16550_WRITE(OFS_INTR_ENABLE, 0);
++
++	/* set up buad rate */
++	{
++		u32 divisor;
++
++		/* set DIAB bit */
++		UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
++
++		/* set divisor */
++		divisor = MAX_BAUD / baud;
++		UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
++		UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
++
++		/* clear DIAB bit */
++		UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
++	}
++
++	/* set data format */
++	UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
++}
++
++static int remoteDebugInitialized = 0;
++
++u8 getDebugChar(void)
++{
++	if (!remoteDebugInitialized) {
++		remoteDebugInitialized = 1;
++		debugInit(UART16550_BAUD_115200,
++			  UART16550_DATA_8BIT,
++			  UART16550_PARITY_NONE, UART16550_STOP_1BIT);
++	}
++
++	while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0) ;
++	return UART16550_READ(OFS_RCV_BUFFER);
++}
++
++int putDebugChar(u8 byte)
++{
++	if (!remoteDebugInitialized) {
++		remoteDebugInitialized = 1;
++		/*
++		   debugInit(UART16550_BAUD_115200,
++		   UART16550_DATA_8BIT,
++		   UART16550_PARITY_NONE, UART16550_STOP_1BIT); */
++	}
++
++	while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0) ;
++	UART16550_WRITE(OFS_SEND_BUFFER, byte);
++	return 1;
++}
++
++extern void prom_putchar(char c);
++
++void prom_printf(char *fmt, ...)
++{
++	va_list args;
++	char ppbuf[1024];
++	char *bptr;
++
++	va_start(args, fmt);
++	vsprintf(ppbuf, fmt, args);
++
++	bptr = ppbuf;
++
++	while (*bptr != 0) {
++		if (*bptr == '\n')
++			prom_putchar('\r');
++
++		prom_putchar(*bptr++);
++	}
++	va_end(args);
++}
+diff --git a/arch/mips/lemote/lm2f/lmbox/irq.c b/arch/mips/lemote/lm2f/lmbox/irq.c
+new file mode 100644
+index 0000000..57f3b76
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbox/irq.c
+@@ -0,0 +1,234 @@
++/*
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/irq_cpu.h>
++#include <asm/i8259.h>
++#include <asm/mipsregs.h>
++#include <asm/delay.h>
++#include <asm/mips-boards/bonito64.h>
++
++#define	BONITO_INT_BIT_GPIO0		(1 << 0)
++#define	BONITO_INT_BIT_GPIO1		(1 << 1)
++#define	BONITO_INT_BIT_GPIO2		(1 << 2)
++#define	BONITO_INT_BIT_GPIO3		(1 << 3)
++#define	BONITO_INT_BIT_PCI_INTA		(1 << 4)
++#define	BONITO_INT_BIT_PCI_INTB		(1 << 5)
++#define	BONITO_INT_BIT_PCI_INTC		(1 << 6)
++#define	BONITO_INT_BIT_PCI_INTD		(1 << 7)
++#define	BONITO_INT_BIT_PCI_PERR		(1 << 8)
++#define	BONITO_INT_BIT_PCI_SERR		(1 << 9)
++#define	BONITO_INT_BIT_DDR		(1 << 10)
++#define	BONITO_INT_BIT_INT0		(1 << 11)
++#define	BONITO_INT_BIT_INT1		(1 << 12)
++#define	BONITO_INT_BIT_INT2		(1 << 13)
++#define	BONITO_INT_BIT_INT3		(1 << 14)
++
++#define	BONITO_INT_TIMER_OFF		7
++#define	BONITO_INT_BONITO_OFF		6
++#define	BONITO_INT_UART_OFF			3
++#define	BONITO_INT_I8259_OFF		2
++
++/****************************************************************/
++
++static void loongson2f_timer_dispatch(void)
++{
++	/* place the loongson2f timer interrupt on 23 */
++	do_IRQ(MIPS_CPU_IRQ_BASE + BONITO_INT_TIMER_OFF);
++	return;
++}
++
++static void loongson2f_bonito_dispatch(void)
++{
++	int int_status;
++	int i = 0;
++
++	/* place the other interrupt on bit6 for bonito, inclding PCI and so on */
++	int_status = BONITO_INTISR & BONITO_INTEN;
++	
++	for(i = 0; (i < 10) && int_status; i++){
++		if(int_status & (1 << i)){
++			if(i == 10)
++				printk("ddr int.\n");
++			if(int_status & 0x000000f0)
++				do_IRQ(BONITO_IRQ_BASE + i);
++			int_status &= ~(1 << i);
++		}
++	}
++	
++	return;
++}
++
++static void loongson2f_int3_dispatch(void)
++{
++	int int_status;
++	
++	int_status = BONITO_INTISR & BONITO_INTEN;
++	if(int_status & BONITO_INT_BIT_INT3){
++	}
++	
++	return;
++}
++
++static void loongson2f_int2_dispatch(void)
++{
++	int int_status;
++	
++	int_status = BONITO_INTISR & BONITO_INTEN;
++	if(int_status & BONITO_INT_BIT_INT2){
++	}
++	
++	return;
++}
++
++static void loongson2f_int1_dispatch(void)
++{
++	/* place the loongson2f uart interrupt on int1 */
++	do_IRQ(MIPS_CPU_IRQ_BASE + BONITO_INT_UART_OFF);
++}
++
++static void i8259_irqdispatch(void)
++{
++	int irq, isr;
++	extern unsigned int cached_irq_mask;
++
++	if((BONITO_INTISR & BONITO_INTEN) & BONITO_INT_BIT_INT0) {
++
++		isr = inb(0x20) | (inb(0xa0) << 8);
++		isr &= ~0x4; // irq2 for cascade
++		isr &= ~cached_irq_mask;
++		irq = ffs(isr) - 1;
++
++		if(irq >= 0) {
++			do_IRQ(irq);
++		} else {
++			spurious_interrupt();
++		}
++	}
++}
++
++static void loongson2f_steer1_dispatch(void)
++{
++	return;
++}
++
++static void loongson2f_steer0_dispatch(void)
++{
++	return;
++}
++
++
++asmlinkage void plat_irq_dispatch(void)
++{
++	unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
++
++	if(pending & CAUSEF_IP7){
++		loongson2f_timer_dispatch();
++	}else if(pending & CAUSEF_IP6){ /*north bridge*/
++		do_IRQ(MIPS_CPU_IRQ_BASE + 6);
++		loongson2f_bonito_dispatch();
++	}else if(pending & CAUSEF_IP5){
++		loongson2f_int3_dispatch();
++	}else if(pending & CAUSEF_IP4){
++		loongson2f_int2_dispatch();
++	}else if(pending & CAUSEF_IP3){ /*cpu uart*/
++		loongson2f_int1_dispatch();
++	}else if(pending & CAUSEF_IP2){ /*south bridge*/
++		i8259_irqdispatch();
++	}else if(pending & CAUSEF_IP1){
++		loongson2f_steer1_dispatch();
++	}else if(pending & CAUSEF_IP0){
++		loongson2f_steer0_dispatch();
++	}else{
++		spurious_interrupt();
++	}
++	return;
++}
++
++static struct irqaction cascade_irqaction = {
++	.handler = no_action,
++	.mask = CPU_MASK_NONE,
++	.name = "cascade",
++};
++
++irqreturn_t ip6_action(int cpl, void *dev_id, struct pt_regs *regs)
++{
++	return IRQ_HANDLED;
++}
++
++static struct irqaction ip6_irqaction = {
++	.handler = ip6_action,
++	.mask = CPU_MASK_NONE,
++	.name = "cascade",
++	.flags = IRQF_SHARED,
++};
++
++void __init arch_init_irq(void)
++{
++	extern void bonito_irq_init(void);
++
++	/*
++	 * Clear all of the interrupts while we change the able around a bit.
++	 * int-handler is not on bootstrap
++	 */
++	clear_c0_status(ST0_IM | ST0_BEV);
++	local_irq_disable();
++	
++	/* setup cs5536 as high level */
++	BONITO_INTPOL  = (1 << 11 | 1 << 12);
++	BONITO_INTEDGE &= ~(1 << 11 | 1 << 12);
++
++	/* no steer */
++	BONITO_INTSTEER = 0;
++
++	/*
++	 * Mask out all interrupt by writing "1" to all bit position in
++	 * the interrupt reset reg.
++	 */
++	BONITO_INTENCLR = ~0;
++
++	/* init all controller
++	 *   0-15         ------> i8259 interrupt
++	 *   16-23        ------> mips cpu interrupt
++	 *   32-63        ------> bonito irq
++	 */
++	
++	/* Sets the first-level interrupt dispatcher. */
++	mips_cpu_irq_init();
++
++	init_i8259_irqs();
++	bonito_irq_init();
++	
++	/* setup bonito interrupt */
++	setup_irq(MIPS_CPU_IRQ_BASE + BONITO_INT_BONITO_OFF, &ip6_irqaction);
++	/* 8259 irq at IP2 */
++	setup_irq(MIPS_CPU_IRQ_BASE + BONITO_INT_I8259_OFF, &cascade_irqaction);
++
++}
+diff --git a/arch/mips/lemote/lm2f/lmbox/pm.c b/arch/mips/lemote/lm2f/lmbox/pm.c
+new file mode 100644
+index 0000000..0b1f3eb
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbox/pm.c
+@@ -0,0 +1,186 @@
++/*
++ * loongson-specific STR/Standby support
++ *
++ *  Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
++ *  Author: Wu Zhangjin <wuzj@lemote.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#include <linux/suspend.h>
++#include <linux/interrupt.h>
++#include <linux/pm.h>
++
++#include <asm/i8259.h>
++#include <asm/mipsregs.h>
++
++#include <asm/mips-boards/bonito64.h>
++
++#include "../common/cs5536_pci.h"
++#include "../common/cs5536.h"
++
++#define BONITO_CHIPCFG0	BONITO(BONITO_REGBASE + 0x80)
++
++extern void _rdmsr(u32 reg, u32 *hi, u32 *lo);
++static u32 mfgpt_base, gpio_base, smb_base;
++
++static unsigned int cached_master_mask;	/* i8259A */
++static unsigned int cached_slave_mask;
++static unsigned int cached_bonito_irq_mask; /* bonito */
++
++void arch_suspend_disable_irqs(void)
++{
++	/* disable all mips eventss */
++	local_irq_disable();
++
++	/* disable all eventss of i8259A */
++	cached_slave_mask = inb(PIC_SLAVE_IMR);
++	cached_master_mask = inb(PIC_MASTER_IMR);
++
++	outb(0xff, PIC_SLAVE_IMR);
++	inb(PIC_SLAVE_IMR);
++	outb(0xff, PIC_MASTER_IMR);
++	inb(PIC_MASTER_IMR);
++
++	/* disable all eventss of bonito */
++	cached_bonito_irq_mask = BONITO_INTEN;
++	BONITO_INTENCLR = 0xffff;
++	(void)BONITO_INTENCLR;
++}
++
++void arch_suspend_enable_irqs(void)
++{
++	/* enable all mips eventss */
++	local_irq_enable();
++
++	/* only enable the cached eventss of i8259A */
++	outb(cached_slave_mask, PIC_SLAVE_IMR);
++	outb(cached_master_mask, PIC_MASTER_IMR);
++
++	/* enable all cached eventss of bonito */
++	BONITO_INTENSET = cached_bonito_irq_mask;
++	(void)BONITO_INTENSET;
++}
++
++/* setup the board-specific events for waking up loongson from wait mode */
++void __attribute__((weak)) setup_wakeup_events(void)
++{
++}
++
++/* check wakeup events */
++int __attribute__((weak)) wakeup_loongson(void)
++{
++	return 1;
++}
++
++/* if the events are really what we want to wakeup cpu, wake up it, otherwise,
++ * we Put CPU into wait mode again.
++ */
++static void wait_for_wakeup_events(void)
++{
++	while (!wakeup_loongson())
++		BONITO_CHIPCFG0 &= ~0x7;
++}
++
++/* stop all perf counters by default
++ *   $24 is the control register of loongson perf counter
++ */
++static inline void stop_perf_counters(void)
++{
++	__write_64bit_c0_register($24, 0, 0);
++}
++
++
++static void loongson_suspend_enter(void)
++{
++	static unsigned int cached_cpu_freq;
++
++	/* setup wakeup events via enabling the IRQs */
++	setup_wakeup_events();
++
++	/* stop all perf counters */
++	stop_perf_counters();
++
++	cached_cpu_freq = BONITO_CHIPCFG0;
++
++	/* Put CPU into wait mode */
++	BONITO_CHIPCFG0 &= ~0x7;
++
++	/* wait for the given events to wakeup cpu from wait mode */
++	wait_for_wakeup_events();
++
++	BONITO_CHIPCFG0 = cached_cpu_freq;
++	mmiowb();
++}
++
++#define MFGPT0_SETUP (mfgpt_base + 6)
++
++void __attribute__((weak)) mach_suspend(void)
++{
++	/* disable mfgpt */
++	outw(inw(MFGPT0_SETUP) & 0x7fff, MFGPT0_SETUP);
++}
++
++void __attribute__((weak)) mach_resume(void)
++{
++	/* enable mfgpt */
++	outw(0xe310, MFGPT0_SETUP);
++}
++
++static int loongson_pm_enter(suspend_state_t state)
++{
++	/* mach specific suspend */
++	mach_suspend();
++
++	/* processor specific suspend */
++	loongson_suspend_enter();
++
++	/* mach specific resume */
++	mach_resume();
++
++	return 0;
++}
++
++static int loongson_pm_valid_state(suspend_state_t state)
++{
++	switch (state) {
++	case PM_SUSPEND_ON:
++	case PM_SUSPEND_STANDBY:
++	case PM_SUSPEND_MEM:
++		return 1;
++
++	default:
++		return 0;
++	}
++}
++
++static int loongson_pm_prepare(void)
++{
++	u32 hi;
++
++	/* get gpio_base */
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &gpio_base);
++	/* get mfgpt base */
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), &hi, &mfgpt_base);
++	/* get smb base */
++	_rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), &hi, &smb_base);
++
++	return 0;
++}
++
++static struct platform_suspend_ops loongson_pm_ops = {
++	.prepare = loongson_pm_prepare,
++	.valid	= loongson_pm_valid_state,
++	.enter	= loongson_pm_enter,
++};
++
++static int __init loongson_pm_init(void)
++{
++	suspend_set_ops(&loongson_pm_ops);
++
++	return 0;
++}
++arch_initcall(loongson_pm_init);
+diff --git a/arch/mips/lemote/lm2f/lmbox/prom.c b/arch/mips/lemote/lm2f/lmbox/prom.c
+new file mode 100644
+index 0000000..3ea4216
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbox/prom.c
+@@ -0,0 +1,106 @@
++/*
++ * Based on Ocelot Linux port, which is
++ * Copyright 2001 MontaVista Software Inc.
++ * Author: jsun@mvista.com or jsun@junsun.net
++ *
++ * Copyright 2003 ICT CAS
++ * Author: Michael Guo <guoyi@ict.ac.cn>
++ *
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/sched.h>
++#include <linux/bootmem.h>
++
++#include <asm/addrspace.h>
++#include <asm/bootinfo.h>
++
++extern unsigned long bus_clock;
++extern unsigned long cpu_clock_freq;
++extern unsigned int memsize, highmemsize;
++extern int putDebugChar(unsigned char byte);
++
++static int argc;
++/* pmon passes arguments in 32bit pointers */
++static int *arg;
++static int *env;
++
++const char *get_system_type(void)
++{
++	return "lemote-fuloong";
++}
++
++void __init prom_init_cmdline(void)
++{
++	int i;
++	long l;
++
++	/* arg[0] is "g", the rest is boot parameters */
++	arcs_cmdline[0] = '\0';
++	for (i = 1; i < argc; i++) {
++		l = (long)arg[i];
++		if (strlen(arcs_cmdline) + strlen(((char *)l) + 1)
++		    >= sizeof(arcs_cmdline))
++			break;
++		strcat(arcs_cmdline, ((char *)l));
++		strcat(arcs_cmdline, " ");
++	}
++}
++
++void __init prom_init(void)
++{
++	long l;
++	argc = fw_arg0;
++	arg = (int *)fw_arg1;
++	env = (int *)fw_arg2;
++
++	prom_init_cmdline();
++
++	if ((strstr(arcs_cmdline, "console=")) == NULL)
++		strcat(arcs_cmdline, " console=ttyS0,115200");
++	if ((strstr(arcs_cmdline, "root=")) == NULL)
++		strcat(arcs_cmdline, " root=/dev/hda1");
++
++	l = (long)*env;
++	while (l != 0) {
++		if (strncmp("busclock", (char *)l, strlen("busclock")) == 0) {
++			bus_clock = simple_strtol((char *)l + strlen("busclock="),
++					NULL, 10);
++		}
++		if (strncmp("cpuclock", (char *)l, strlen("cpuclock")) == 0) {
++			cpu_clock_freq = simple_strtol((char *)l + strlen("cpuclock="),
++					NULL, 10);
++		}
++		if (strncmp("memsize", (char *)l, strlen("memsize")) == 0) {
++			memsize = simple_strtol((char *)l + strlen("memsize="),
++						NULL, 10);
++		}
++		if (strncmp("highmemsize", (char *)l, strlen("highmemsize")) == 0) {
++			highmemsize = simple_strtol((char *)l + strlen("highmemsize="),
++					  NULL, 10);
++		}
++		env++;
++		l = (long)*env;
++	}
++	if (memsize == 0)
++		memsize = 256;
++
++	printk("busclock=%ld, cpuclock=%ld,memsize=%d,highmemsize=%d\n",
++	       bus_clock, cpu_clock_freq, memsize, highmemsize);
++}
++
++void __init prom_free_prom_memory(void)
++{
++}
++
++void prom_putchar(char c)
++{
++	putDebugChar(c);
++}
+diff --git a/arch/mips/lemote/lm2f/lmbox/reset.c b/arch/mips/lemote/lm2f/lmbox/reset.c
+new file mode 100644
+index 0000000..64dfe84
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbox/reset.c
+@@ -0,0 +1,87 @@
++/*
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ *
++ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ */
++
++#include <asm/io.h>
++#include <asm/pgtable.h>
++#include <asm/processor.h>
++#include <asm/reboot.h>
++#include <asm/system.h>
++
++#include <linux/sched.h>
++#include <linux/mm.h>
++#include <linux/pm.h>
++#include <linux/delay.h>
++
++extern void _wrmsr(u32 reg, u32 hi, u32 lo);
++extern void _rdmsr(u32 reg, u32 *hi, u32 *lo);
++
++static void loongson2f_restart(char *command)
++{
++	u32 hi, lo;
++
++#ifdef CONFIG_32BIT
++	*(volatile u32*)0xbfe00180 |= 0x7;
++#else
++	*(volatile u32*)0xffffffffbfe00180 |= 0x7;
++#endif
++	_rdmsr(0xe0000014, &hi, &lo);
++	lo |= 0x00000001;
++	_wrmsr(0xe0000014, hi, lo);
++
++	printk("Hard reset not take effect!!\n");
++	__asm__ __volatile__ (
++					".long 0x3c02bfc0\n"
++					".long 0x00400008\n"
++					:::"v0"
++					);
++}
++
++
++static void delay(void)
++{
++	volatile int i;
++	for (i=0; i<0x10000; i++);
++}
++static void loongson2f_halt(void)
++{
++#ifdef CONFIG_32BIT
++	u32 base;
++#else
++	u64 base;
++#endif
++	u32 hi, lo, val;
++	
++	_rdmsr(0x8000000c, &hi, &lo);
++#ifdef CONFIG_32BIT
++	base = (lo & 0xff00) | 0xbfd00000;
++#else
++	base = (lo & 0xff00) | 0xffffffffbfd00000ULL;
++#endif
++	val = (val & ~(1 << (16 + 13))) | (1 << 13);
++	delay();
++	*(__volatile__ u32 *)(base + 0x04) = val;
++	delay();
++	val = (val & ~(1 << (13))) | (1 << (16 + 13));
++	delay();
++	*(__volatile__ u32 *)(base + 0x00) = val;
++	delay();
++}
++
++static void loongson2f_power_off(void)
++{
++	loongson2f_halt();
++}
++
++void mips_reboot_setup(void)
++{
++	_machine_restart = loongson2f_restart;
++	_machine_halt = loongson2f_halt;
++	pm_power_off = loongson2f_power_off;
++}
+diff --git a/arch/mips/lemote/lm2f/lmbox/setup.c b/arch/mips/lemote/lm2f/lmbox/setup.c
+new file mode 100644
+index 0000000..6cd278a
+--- /dev/null
++++ b/arch/mips/lemote/lm2f/lmbox/setup.c
+@@ -0,0 +1,130 @@
++/*
++ * BRIEF MODULE DESCRIPTION
++ * setup.c - board dependent boot routines
++ *
++ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/bootmem.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++
++#include <asm/bootinfo.h>
++#include <asm/mc146818-time.h>
++#include <asm/time.h>
++#include <asm/wbflush.h>
++
++#ifdef CONFIG_VT
++#include <linux/console.h>
++#include <linux/screen_info.h>
++#endif
++
++extern void mips_reboot_setup(void);
++
++#ifdef CONFIG_64BIT
++#define PTR_PAD(p) ((0xffffffff00000000)|((unsigned long long)(p)))
++#else
++#define PTR_PAD(p) (p)
++#endif
++
++unsigned long cpu_clock_freq;
++unsigned long bus_clock;
++unsigned int memsize;
++unsigned int highmemsize = 0;
++
++extern int __init init_mfgpt_clocksource(void);
++
++void __init plat_time_init(void)
++{
++	/* setup mips r4k timer */
++	mips_hpt_frequency = cpu_clock_freq / 2;
++
++	init_mfgpt_clocksource();
++}
++
++unsigned long read_persistent_clock(void)
++{
++	return mc146818_get_cmos_time();
++}
++
++void (*__wbflush)(void);
++EXPORT_SYMBOL(__wbflush);
++
++static void wbflush_loongson2f(void)
++{
++	asm(".set\tpush\n\t"
++	    ".set\tnoreorder\n\t"
++	    ".set mips3\n\t"
++	    "sync\n\t"
++	    "nop\n\t"
++	    ".set\tpop\n\t"
++	    ".set mips0\n\t");
++}
++
++void __init plat_mem_setup(void)
++{
++	set_io_port_base(PTR_PAD(0xbfd00000));
++
++	mips_reboot_setup();
++
++	__wbflush = wbflush_loongson2f;
++
++	add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM);
++#ifdef CONFIG_64BIT
++	__asm__(
++		".set mips3\n"			
++		"dli $2, 0x900000003ff00000\n"
++		"dli $3, 0x0000000080000000\n"
++		"sd  $3, 0x10($2)\n"
++		"sd  $0, 0x50($2)\n"
++		"dli $3, 0xffffffff80000000\n"
++		"sd  $3, 0x30($2)\n"
++		".set mips0\n"
++		:::"$2","$3","memory");
++	if (highmemsize > 0) {
++		add_memory_region(0x90000000, highmemsize << 20, BOOT_MEM_RAM);
++	}
++#endif
++
++#ifdef CONFIG_VT
++#if defined(CONFIG_VGA_CONSOLE)
++	conswitchp = &vga_con;
++
++	screen_info = (struct screen_info) {
++		0, 25,		/* orig-x, orig-y */
++		    0,		/* unused */
++		    0,		/* orig-video-page */
++		    0,		/* orig-video-mode */
++		    80,		/* orig-video-cols */
++		    0, 0, 0,	/* ega_ax, ega_bx, ega_cx */
++		    25,		/* orig-video-lines */
++		    VIDEO_TYPE_VGAC,	/* orig-video-isVGA */
++		    16		/* orig-video-points */
++	};
++#elif defined(CONFIG_DUMMY_CONSOLE)
++	conswitchp = &dummy_con;
++#endif
++#endif
++
++}
+diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
+index b08fc65..7ec0b21 100644
+--- a/arch/mips/math-emu/cp1emu.c
++++ b/arch/mips/math-emu/cp1emu.c
+@@ -1299,12 +1299,12 @@ static int __init debugfs_fpuemu(void)
+ 	if (!mips_debugfs_dir)
+ 		return -ENODEV;
+ 	dir = debugfs_create_dir("fpuemustats", mips_debugfs_dir);
+-	if (IS_ERR(dir))
+-		return PTR_ERR(dir);
++	if (!dir)
++		return -ENOMEM;
+ 	for (i = 0; i < ARRAY_SIZE(vars); i++) {
+ 		d = debugfs_create_u32(vars[i].name, S_IRUGO, dir, vars[i].v);
+-		if (IS_ERR(d))
+-			return PTR_ERR(d);
++		if (!d)
++			return -ENOMEM;
+ 	}
+ 	return 0;
+ }
+diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
+index 891312f..e6acb0c 100644
+--- a/arch/mips/mm/dma-default.c
++++ b/arch/mips/mm/dma-default.c
+@@ -40,6 +40,12 @@ static inline int cpu_is_noncoherent_r10000(struct device *dev)
+ 	       current_cpu_type() == CPU_R12000);
+ }
+ 
++static inline int cpu_is_noncoherent_loongson(struct device *dev)
++{
++	return !plat_device_is_coherent(dev) &&
++			(current_cpu_data.cputype == CPU_LOONGSON2);
++}
++
+ static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
+ {
+ 	/* ignore region specifiers */
+@@ -166,7 +172,7 @@ EXPORT_SYMBOL(dma_map_single);
+ void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+ 	enum dma_data_direction direction)
+ {
+-	if (cpu_is_noncoherent_r10000(dev))
++	if (cpu_is_noncoherent_r10000(dev) || cpu_is_noncoherent_loongson(dev))
+ 		__dma_sync(dma_addr_to_virt(dma_addr), size,
+ 		           direction);
+ 
+@@ -257,7 +263,7 @@ void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+ {
+ 	BUG_ON(direction == DMA_NONE);
+ 
+-	if (cpu_is_noncoherent_r10000(dev)) {
++	if (cpu_is_noncoherent_r10000(dev) || cpu_is_noncoherent_loongson(dev)) {
+ 		unsigned long addr;
+ 
+ 		addr = dma_addr_to_virt(dma_handle);
+@@ -324,7 +330,6 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
+ 		if (cpu_is_noncoherent_r10000(dev))
+ 			__dma_sync((unsigned long)page_address(sg_page(sg)),
+ 			           sg->length, direction);
+-		plat_unmap_dma_mem(sg->dma_address);
+ 	}
+ }
+ 
+@@ -342,7 +347,6 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nele
+ 		if (!plat_device_is_coherent(dev))
+ 			__dma_sync((unsigned long)page_address(sg_page(sg)),
+ 			           sg->length, direction);
+-		plat_unmap_dma_mem(sg->dma_address);
+ 	}
+ }
+ 
+diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile
+index bf3be6f..d039d6b 100644
+--- a/arch/mips/oprofile/Makefile
++++ b/arch/mips/oprofile/Makefile
+@@ -15,3 +15,4 @@ oprofile-$(CONFIG_CPU_MIPS64)		+= op_model_mipsxx.o
+ oprofile-$(CONFIG_CPU_R10000)		+= op_model_mipsxx.o
+ oprofile-$(CONFIG_CPU_SB1)		+= op_model_mipsxx.o
+ oprofile-$(CONFIG_CPU_RM9000)		+= op_model_rm9000.o
++oprofile-$(CONFIG_CPU_LOONGSON2)  	+= op_model_loongson2.o
+diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
+index dd2fbd6..cee1e3b 100644
+--- a/arch/mips/oprofile/common.c
++++ b/arch/mips/oprofile/common.c
+@@ -16,6 +16,7 @@
+ 
+ extern struct op_mips_model op_model_mipsxx_ops __attribute__((weak));
+ extern struct op_mips_model op_model_rm9000_ops __attribute__((weak));
++extern struct op_mips_model op_model_loongson2_ops __attribute__((weak));
+ 
+ static struct op_mips_model *model;
+ 
+@@ -93,6 +94,10 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
+ 	case CPU_RM9000:
+ 		lmodel = &op_model_rm9000_ops;
+ 		break;
++	
++	case CPU_LOONGSON2:
++		lmodel = &op_model_loongson2_ops;
++		break;
+ 	};
+ 
+ 	if (!lmodel)
+diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c
+new file mode 100644
+index 0000000..c0120f6
+--- /dev/null
++++ b/arch/mips/oprofile/op_model_loongson2.c
+@@ -0,0 +1,197 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ */
++#include <linux/init.h>
++#include <linux/oprofile.h>
++#include <linux/interrupt.h>
++#include <linux/smp.h>
++#include <linux/spinlock.h>
++#include <linux/proc_fs.h>
++#include <asm/uaccess.h>
++
++#include <irq.h>
++#include "op_impl.h"
++
++#define PERF_IRQ (MIPS_CPU_IRQ_BASE + 6 )
++
++#define LOONGSON_COUNTER1_EVENT(event)	((event&0x0f) << 5)
++#define LOONGSON_COUNTER1_SUPERVISOR	(1UL    <<  2)
++#define LOONGSON_COUNTER1_KERNEL		(1UL    <<  1)
++#define LOONGSON_COUNTER1_USER		(1UL    <<  3)
++#define LOONGSON_COUNTER1_ENABLE		(1UL    << 4)
++#define LOONGSON_COUNTER1_OVERFLOW	(1ULL    << 31)
++#define LOONGSON_COUNTER1_EXL			(1UL	<< 0)
++
++#define LOONGSON_COUNTER2_EVENT(event)	((event&0x0f) << 9)
++#define LOONGSON_COUNTER2_SUPERVISOR	LOONGSON_COUNTER1_SUPERVISOR
++#define LOONGSON_COUNTER2_KERNEL		LOONGSON_COUNTER1_KERNEL
++#define LOONGSON_COUNTER2_USER		LOONGSON_COUNTER1_USER
++#define LOONGSON_COUNTER2_ENABLE		LOONGSON_COUNTER1_ENABLE
++#define LOONGSON_COUNTER2_OVERFLOW	(1ULL   << 31)
++#define LOONGSON_COUNTER2_EXL			(1UL	<< 0 )
++#define LOONGSON_COUNTER_EXL		    (1UL << 0)	
++
++/* Loongson2 PerfCount performance counter register */
++#define read_c0_perflo() __read_64bit_c0_register($24, 0)
++#define write_c0_perflo(val) __write_64bit_c0_register($24, 0, val)
++#define read_c0_perfhi() __read_64bit_c0_register($25, 0)
++#define write_c0_perfhi(val) __write_64bit_c0_register($25, 0, val)
++
++extern unsigned int loongson2_perfcount_irq;
++
++static struct loongson2_register_config {
++	unsigned int control;
++	unsigned long long reset_counter1;
++	unsigned long long reset_counter2;
++	int ctr1_enable, ctr2_enable;
++} reg;
++
++#if 0
++unsigned long ctr3_enable, ctr3_count;
++#endif
++
++DEFINE_SPINLOCK(sample_lock);
++
++static char *oprofid = "LoongsonPerf";
++static irqreturn_t loongson2_perfcount_handler(int irq, void * dev_id);
++/* Compute all of the registers in preparation for enabling profiling.  */
++
++static void loongson2_reg_setup(struct op_counter_config *ctr)
++{
++	unsigned int control = 0;
++
++	reg.reset_counter1 = 0;
++	reg.reset_counter2 = 0;
++	/* Compute the performance counter control word.  */
++	/* For now count kernel and user mode */
++	if (ctr[0].enabled){
++		control |= LOONGSON_COUNTER1_EVENT(ctr[0].event) |
++					LOONGSON_COUNTER1_ENABLE;
++		if(ctr[0].kernel)
++			control |= LOONGSON_COUNTER1_KERNEL;
++		if(ctr[0].user)
++			control |= LOONGSON_COUNTER1_USER;
++		reg.reset_counter1 = 0x80000000ULL - ctr[0].count;
++	}
++
++	if (ctr[1].enabled){
++		control |= LOONGSON_COUNTER2_EVENT(ctr[1].event) |
++		           LOONGSON_COUNTER2_ENABLE;
++		if(ctr[1].kernel)
++			control |= LOONGSON_COUNTER2_KERNEL;
++		if(ctr[1].user)
++			control |= LOONGSON_COUNTER2_USER;
++		reg.reset_counter2 = (0x80000000ULL- ctr[1].count) ;
++	}
++
++	if(ctr[0].enabled ||ctr[1].enabled)
++		control |= LOONGSON_COUNTER_EXL;
++
++#if 0
++	if(ctr[2].enabled){
++		ctr3_enable = 1;
++		ctr3_count = ctr[2].count;
++	}
++#endif
++
++	reg.control = control;
++
++	reg.ctr1_enable = ctr[0].enabled;
++	reg.ctr2_enable = ctr[1].enabled;
++
++}
++
++/* Program all of the registers in preparation for enabling profiling.  */
++
++static void loongson2_cpu_setup (void *args)
++{
++	uint64_t perfcount;
++
++	perfcount = (reg.reset_counter2 << 32) |reg.reset_counter1; 
++	write_c0_perfhi(perfcount);
++}
++
++static void loongson2_cpu_start(void *args)
++{
++	/* Start all counters on current CPU */
++	if(reg.ctr1_enable || reg.ctr2_enable) {
++		write_c0_perflo(reg.control);
++	}
++}
++
++static void loongson2_cpu_stop(void *args)
++{
++	/* Stop all counters on current CPU */
++	//ctr3_enable = 0;
++	write_c0_perflo(0);
++	memset(&reg, 0, sizeof(reg));
++}
++
++static irqreturn_t loongson2_perfcount_handler(int irq, void * dev_id)
++{
++	uint64_t counter, counter1, counter2;
++	struct pt_regs *regs = get_irq_regs();
++	int enabled;
++	unsigned long flags;
++	
++	/*
++	 * LOONGSON2 defines two 32-bit performance counters.
++	 * To avoid a race updating the registers we need to stop the counters 
++	 * while we're messing with
++	 * them ...
++	 */
++	
++	/* Check whether the irq belongs to me*/
++	enabled = reg.ctr1_enable| reg.ctr2_enable;
++	if(!enabled){
++		return IRQ_NONE;
++	}
++
++	counter = read_c0_perfhi();
++	counter1 = counter & 0xffffffff;
++	counter2 = counter >> 32;
++
++	spin_lock_irqsave(&sample_lock, flags);
++
++	if (counter1 & LOONGSON_COUNTER1_OVERFLOW) {
++		if(reg.ctr1_enable) 
++			oprofile_add_sample(regs, 0);
++		counter1 = reg.reset_counter1;
++	}
++	if (counter2 & LOONGSON_COUNTER2_OVERFLOW) {
++		if(reg.ctr2_enable)
++			oprofile_add_sample(regs, 1);
++		counter2 = reg.reset_counter2;
++	}
++
++	spin_unlock_irqrestore(&sample_lock, flags);
++
++	write_c0_perfhi((counter2 << 32) | counter1);
++
++	return IRQ_HANDLED;
++}
++
++static int __init loongson2_init(void)
++{
++	return  request_irq(PERF_IRQ, loongson2_perfcount_handler,
++	                   IRQF_SHARED, "Perfcounter", oprofid);
++}
++
++static void loongson2_exit(void)
++{
++	free_irq(PERF_IRQ, oprofid);
++}
++
++struct op_mips_model op_model_loongson2_ops = {
++	.reg_setup	= loongson2_reg_setup,
++	.cpu_setup	= loongson2_cpu_setup,
++	.init		= loongson2_init,	
++	.exit		= loongson2_exit,
++	.cpu_start	= loongson2_cpu_start,
++	.cpu_stop	= loongson2_cpu_stop,
++	.cpu_type	= "mips/loongson2",
++	.num_counters	= 2
++};
+diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
+index c8c32f4..b023e1c 100644
+--- a/arch/mips/pci/Makefile
++++ b/arch/mips/pci/Makefile
+@@ -27,6 +27,8 @@ obj-$(CONFIG_SOC_AU1500)	+= fixup-au1000.o ops-au1000.o
+ obj-$(CONFIG_SOC_AU1550)	+= fixup-au1000.o ops-au1000.o
+ obj-$(CONFIG_SOC_PNX8550)	+= fixup-pnx8550.o ops-pnx8550.o
+ obj-$(CONFIG_LEMOTE_FULONG)	+= fixup-lm2e.o ops-bonito64.o
++obj-$(CONFIG_LEMOTE_FULONG2F)	+= fixup-lm2f.o ops-loongson2f.o
++obj-$(CONFIG_LEMOTE_2FNOTEBOOK)	+= fixup-lmbook.o ops-loongson2f.o
+ obj-$(CONFIG_MIPS_MALTA)	+= fixup-malta.o
+ obj-$(CONFIG_PMC_MSP7120_GW)	+= fixup-pmcmsp.o ops-pmcmsp.o
+ obj-$(CONFIG_PMC_MSP7120_EVAL)	+= fixup-pmcmsp.o ops-pmcmsp.o
+diff --git a/arch/mips/pci/fixup-lm2f.c b/arch/mips/pci/fixup-lm2f.c
+new file mode 100644
+index 0000000..c8b2f81
+--- /dev/null
++++ b/arch/mips/pci/fixup-lm2f.c
+@@ -0,0 +1,239 @@
++/*
++ * fixup-lm2f.c
++ *
++ * Copyright (C) 2004 ICT CAS
++ * Author: Li xiaoyu, ICT CAS
++ *   lixy@ict.ac.cn
++ *
++ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/init.h>
++#include <linux/pci.h>
++#include <asm/mips-boards/bonito64.h>
++
++/* PCI interrupt pins */
++/* These should not be changed, or you should consider godson2f interrupt register and
++ * your pci card dispatch
++ */
++#define PCIA		4
++#define PCIB		5
++#define PCIC		6
++#define PCID		7
++
++/* all the pci device has the PCIA pin, check the datasheet. */
++static char irq_tab[][5] __initdata = {
++	/*      INTA    INTB    INTC    INTD */
++	{0,	0,	0,	0,	0 },	/*  11: Unused */
++	{0,	0,	0,	0,	0 },	/*  12: Unused */
++	{0,	0,	0,	0,	0 },	/*  13: Unused */
++	{0,	0,	0,	0,	0 },	/*  14: Unused */
++	{0,	0,	0,	0,	0 },	/*  15: Unused */
++	{0,	0,	0,	0,	0 },	/*  16: Unused */
++	{0,	PCIA,	0,	0,	0 },	/*  17: RTL8110-0 */
++	{0,	PCIB,	0,	0,	0 },	/*  18: RTL8110-1 */
++	{0,	PCIC,	0,	0,	0 },	/*  19: SiI3114 */
++	{0,	0,	0,	0,	0 },	/*  20: Unused */
++	{0,	PCIA,	PCIB,	PCIC,	PCID },	/*  21: PCI-SLOT */
++	{0,	0,	0,	0,	0 },	/*  22: Unused */
++	{0,	0,	0,	0,	0 },	/*  23: Unused */
++	{0,	0,	0,	0,	0 },	/*  24: Unused */
++	{0,	0,	0,	0,	0 },	/*  25: Unused */
++	{0,	0,	0,	0,	0 },	/*  26: Unused */
++	{0,	0,	0,	0,	0 },	/*  27: Unused */
++};
++
++int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
++{
++	int virq;
++#if 0
++	if(PCI_SLOT(dev->devfn) == (17 - 11) ){		/* RTL8110SC_0 */
++		dev->irq = BONITO_IRQ_BASE + 25 + 1;
++		(void) pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
++		return dev->irq;
++	}else if(PCI_SLOT(dev->devfn) == (18 - 11)){	/* RTL8110SC_1 */
++		dev->irq = BONITO_IRQ_BASE + 25 + 2;
++		(void) pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
++		return dev->irq;
++	}else if(PCI_SLOT(dev->devfn) == (19 - 11)){	/* SiI3114 */
++		dev->irq = BONITO_IRQ_BASE + 25 + 3;
++		(void) pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
++		return dev->irq;
++	//}
++	//else if(PCI_SLOT(dev->devfn) == (21 - 11)){	/* PCI SLOT */
++	//	dev->irq = BONITO_IRQ_BASE + 25 + 4;
++	//	(void) pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
++	//	return dev->irq;
++	}else 
++#endif
++
++	if( (PCI_SLOT(dev->devfn) != (14)) && (PCI_SLOT(dev->devfn) < 32) ){
++		virq = irq_tab[slot][pin];
++		printk("slot: %d, pin: %d, irq: %d\n", slot, pin, virq+BONITO_IRQ_BASE);
++		if(virq != 0)
++			return (BONITO_IRQ_BASE + virq);
++		else	
++			return 0;
++	}else if( PCI_SLOT(dev->devfn) == 14){	// cs5536
++		switch(PCI_FUNC(dev->devfn)){
++			case 2 :
++				pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 14);
++				return 14;	// for IDE
++			case 3 :
++				pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 9);
++				return 9;	// for AUDIO
++			case 4 :		// for OHCI
++			case 5 :		// for EHCI
++			case 6 :		// for UDC
++			case 7 :		// for OTG
++				pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
++				return 11;	
++		}
++		return dev->irq;
++	}else{
++		printk(" strange pci slot number.\n");
++		return 0;
++	}
++}
++
++/* Do platform specific device initialization at pci_enable_device() time */
++int pcibios_plat_dev_init(struct pci_dev *dev)
++{
++	return 0;
++}
++
++#ifndef	TEST_NO_CS5536
++/* CS5536 SPEC. fixup */
++static void __init loongson2e_cs5536_isa_fixup(struct pci_dev *pdev)
++{
++	/* the uart1 and uart2 interrupt in PIC is enabled as default */
++	pci_write_config_dword(pdev, 0x50, 1);
++	pci_write_config_dword(pdev, 0x54, 1);
++	/* enable the pci MASTER ABORT/ TARGET ABORT etc. */
++	pci_write_config_dword(pdev, 0x58, 1);
++	return;
++}
++
++
++static void __init loongson2e_cs5536_ide_fixup(struct pci_dev *pdev)
++{
++	/* setting the mutex pin as IDE function */
++	/* the IDE interrupt in PIC is enabled as default */
++	pci_write_config_dword(pdev, 0x40, 0xDEADBEEF);
++	return;
++}
++
++static void __init loongson2e_cs5536_acc_fixup(struct pci_dev *pdev)
++{
++	u8 val;
++
++	/* enable the AUDIO interrupt in PIC  */
++	pci_write_config_dword(pdev, 0x50, 1);
++
++#if 1
++	pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val);
++	printk("cs5536 acc latency %x\n", val);
++	pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0);
++#endif
++	return;
++}
++
++static void __init loongson2e_cs5536_ohci_fixup(struct pci_dev *pdev)
++{
++	/* enable the OHCI interrupt in PIC */
++	/* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */
++	pci_write_config_dword(pdev, 0x50, 1);
++	return;
++}
++
++static void __init loongson2e_cs5536_ehci_fixup(struct pci_dev *pdev)
++{
++	/* setting the USB2.0 micro frame length */
++	pci_write_config_dword(pdev, 0x60, 0x2000);
++	return;
++}
++#endif	/* TEST_NO_CS5536 */
++
++static void __init loongson2e_fixup_pcimap(struct pci_dev *pdev)
++{
++	static int first = 1;
++	u32 tmp;
++
++	(void)pdev;
++	if (first)
++		first = 0;
++	else
++		return;
++
++	/* local to PCI mapping: [256M,512M] -> [256M,512M]; differ from pmon */
++	/*
++	 *       cpu address space [256M,448M] is window for accessing pci space
++	 *       we set pcimap_lo[0,1,2] to map it to pci space [256M,448M]
++	 *        pcimap: bit18,pcimap_2; bit[17-12],lo2;bit[11-6],lo1;bit[5-0],lo0
++	 */
++	/* 1,00 0110 ,0001 01,00 0000 */
++	BONITO_PCIMAP = 0x46140;
++	//1, 00 0010, 0000,01, 00 0000
++	//BONITO_PCIMAP = 0x42040;
++
++	/*
++	 * PCI to local mapping: [2G,2G+256M] -> [0,256M]
++	 */
++#if	1	// for GODSON2F
++	BONITO_PCIBASE0 = 0x80000000;
++	BONITO_PCIBASE1 = 0x00000000;
++	BONITO(BONITO_REGBASE + 0x50) = 0x8000000c;
++	BONITO(BONITO_REGBASE + 0x54) = 0xffffffff;
++#else		// for GODSON2E
++	BONITO_PCIBASE0 = 0x80000000;
++	BONITO_PCIBASE1 = 0x00800000;
++	BONITO_PCIBASE2 = 0x90000000;
++#endif
++
++#ifdef CONFIG_64BIT
++	*(volatile u32*)0xffffffffbfe0004c = 0xd2000001;
++/*
++	tmp = *(volatile u32*)0xffffffffbfe00058ULL;
++	tmp &= ~0x0000ff00;
++	tmp |= 0x0000ff80;
++	*(volatile u32*)0xffffffffbfe00058 = tmp;
++*/
++#else
++	 *(volatile u32*)0xbfe0004c = 0xd2000001;
++#endif
++}
++
++#ifndef	TEST_NO_CS5536
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, 
++			 loongson2e_cs5536_isa_fixup);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OHC, 
++			 loongson2e_cs5536_ohci_fixup);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_EHC, 
++			 loongson2e_cs5536_ehci_fixup);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_AUDIO, 
++			 loongson2e_cs5536_acc_fixup);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, 
++			 loongson2e_cs5536_ide_fixup);
++#endif	/* TEST_NO_CS5536 */
++DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, loongson2e_fixup_pcimap);
+diff --git a/arch/mips/pci/fixup-lmbook.c b/arch/mips/pci/fixup-lmbook.c
+new file mode 100644
+index 0000000..58a1a18
+--- /dev/null
++++ b/arch/mips/pci/fixup-lmbook.c
+@@ -0,0 +1,256 @@
++/*
++ * fixup-lm2f.c
++ *
++ * Copyright (C) 2004 ICT CAS
++ * Author: Li xiaoyu, ICT CAS
++ *   lixy@ict.ac.cn
++ *
++ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/init.h>
++#include <linux/pci.h>
++#include <asm/mips-boards/bonito64.h>
++
++/* PCI interrupt pins */
++/* These should not be changed, or you should consider godson2f interrupt register and
++ * your pci card dispatch
++ */
++#define PCIA		4
++#define PCIB		5
++#define PCIC		6
++#define PCID		7
++
++/* all the pci device has the PCIA pin, check the datasheet. */
++static char irq_tab[][5] __initdata = {
++	/*      INTA    INTB    INTC    INTD */
++	{0,	0,	0,	0,	0 },	/*  11: Unused */
++	{0,	0,	0,	0,	0 },	/*  12: Unused */
++	{0,	0,	0,	0,	0 },	/*  13: Unused */
++	{0,	0,	0,	0,	0 },	/*  14: Unused */
++	{0,	0,	0,	0,	0 },	/*  15: Unused */
++	{0,	0,	0,	0,	0 },	/*  16: Unused */
++	{0,	PCIA,	0,	0,	0 },	/*  17: RTL8110-0 */
++	{0,	PCIB,	0,	0,	0 },	/*  18: RTL8110-1 */
++	{0,	PCIC,	0,	0,	0 },	/*  19: SiI3114 */
++	{0,	PCID,	0,	0,	0 },	/*  20: 3-ports nec usb*/
++	{0,	PCIA,	PCIB,	PCIC,	PCID },	/*  21: PCI-SLOT */
++	{0,	0,	0,	0,	0 },	/*  22: Unused */
++	{0,	0,	0,	0,	0 },	/*  23: Unused */
++	{0,	0,	0,	0,	0 },	/*  24: Unused */
++	{0,	0,	0,	0,	0 },	/*  25: Unused */
++	{0,	0,	0,	0,	0 },	/*  26: Unused */
++	{0,	0,	0,	0,	0 },	/*  27: Unused */
++};
++
++int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
++{
++	int virq;
++
++	if( (PCI_SLOT(dev->devfn) != (14)) && (PCI_SLOT(dev->devfn) < 32) ){
++		virq = irq_tab[slot][pin];
++		printk("slot: %d, pin: %d, irq: %d\n", slot, pin, virq+BONITO_IRQ_BASE);
++		if(virq != 0)
++			return (BONITO_IRQ_BASE + virq);
++		else	
++			return 0;
++	}else if( PCI_SLOT(dev->devfn) == 14){	// cs5536
++		switch(PCI_FUNC(dev->devfn)){
++			case 2 :
++				pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 14);
++				return 14;	// for IDE
++			case 3 :
++				pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 9);
++				return 9;	// for AUDIO
++			case 4 :		// for OHCI
++			case 5 :		// for EHCI
++			case 6 :		// for UDC
++			case 7 :		// for OTG
++				pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
++				return 11;	
++		}
++		return dev->irq;
++	}else{
++		printk(" strange pci slot number.\n");
++		return 0;
++	}
++}
++
++/* Do platform specific device initialization at pci_enable_device() time */
++int pcibios_plat_dev_init(struct pci_dev *dev)
++{
++	return 0;
++}
++
++#ifndef	TEST_NO_CS5536
++
++extern void _wrmsr(u32 reg, u32 hi, u32 lo);
++extern void _rdmsr(u32 reg, u32 *hi, u32 *lo);
++
++/* CS5536 SPEC. fixup */
++static void __init loongson2f_cs5536_isa_fixup(struct pci_dev *pdev)
++{
++	/* the uart1 and uart2 interrupt in PIC is enabled as default */
++	pci_write_config_dword(pdev, 0x50, 1);
++	pci_write_config_dword(pdev, 0x54, 1);
++	/* enable the pci MASTER ABORT/ TARGET ABORT etc. */
++	//pci_write_config_dword(pdev, 0x58, 1);
++	return;
++}
++
++
++static void __init loongson2f_cs5536_ide_fixup(struct pci_dev *pdev)
++{
++	/* setting the mutex pin as IDE function */
++	/* the IDE interrupt in PIC is enabled as default */
++	pci_write_config_dword(pdev, 0x40, 0xDEADBEEF);
++	return;
++}
++
++static void __init loongson2f_cs5536_acc_fixup(struct pci_dev *pdev)
++{
++	u8 val;
++
++	/* enable the AUDIO interrupt in PIC  */
++	pci_write_config_dword(pdev, 0x50, 1);
++
++#if 1
++	pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val);
++	printk("cs5536 acc latency %x\n", val);
++	pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0);
++#endif
++	return;
++}
++
++static void __init loongson2f_cs5536_ohci_fixup(struct pci_dev *pdev)
++{
++	/* enable the OHCI interrupt in PIC */
++	/* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */
++	pci_write_config_dword(pdev, 0x50, 1);
++	return;
++}
++
++static void __init loongson2f_cs5536_ehci_fixup(struct pci_dev *pdev)
++{
++	u32 hi, lo;
++#if 0
++	u32 bar;
++	void __iomem *base;
++#endif
++	
++	/* Serial short detect enable */
++	_rdmsr(0x40000001, &hi, &lo);
++	_wrmsr(0x40000001, (1<<1)|(1<<2)|(1<<3), lo);
++
++#if 0
++	/* Write to clear diag register */
++	_rdmsr(0x40000005, &hi, &lo);
++	_wrmsr(0x40000005, hi, lo);
++
++	pci_read_config_dword(pdev, 0x10, &bar);
++	base = ioremap_nocache(bar, 0x100);
++
++	/* Make HCCAPARMS writable */
++	writel(readl(base + 0xA0) | (1<<1), (base + 0xA0));
++	
++	/* EECP=50h, IST=01h, ASPC=1h */
++	writel(0x00000012, base + 0x08);
++	iounmap(base);
++#endif
++
++	/* setting the USB2.0 micro frame length */
++	pci_write_config_dword(pdev, 0x60, 0x2000);
++	return;
++}
++#endif	/* TEST_NO_CS5536 */
++
++static void __init loongson2f_fixup_pcimap(struct pci_dev *pdev)
++{
++	static int first = 1;
++
++	(void)pdev;
++	if (first)
++		first = 0;
++	else
++		return;
++
++	/* local to PCI mapping: [256M,512M] -> [256M,512M]; differ from pmon */
++	/*
++	 *       cpu address space [256M,448M] is window for accessing pci space
++	 *       we set pcimap_lo[0,1,2] to map it to pci space [256M,448M]
++	 *        pcimap: bit18,pcimap_2; bit[17-12],lo2;bit[11-6],lo1;bit[5-0],lo0
++	 */
++	/* 1,00 0110 ,0001 01,00 0000 */
++	BONITO_PCIMAP = 0x46140;
++	//1, 00 0010, 0000,01, 00 0000
++	//BONITO_PCIMAP = 0x42040;
++
++	/*
++	 * PCI to local mapping: [2G,2G+256M] -> [0,256M]
++	 */
++#if	1	// for GODSON2F
++	BONITO_PCIBASE0 = 0x80000000;
++	BONITO_PCIBASE1 = 0x00000000;
++	BONITO(BONITO_REGBASE + 0x50) = 0xc000000c;
++	BONITO(BONITO_REGBASE + 0x54) = 0xffffffff;
++	BONITO(BONITO_REGBASE + 0x58) = 0x00000006;
++	BONITO(BONITO_REGBASE + 0x5c) = 0x00000000;
++	BONITO(BONITO_REGBASE + 0x60) = 0x00000006;
++	BONITO(BONITO_REGBASE + 0x64) = 0x00000000;
++#else		// for GODSON2E
++	BONITO_PCIBASE0 = 0x80000000;
++	BONITO_PCIBASE1 = 0x00800000;
++	BONITO_PCIBASE2 = 0x90000000;
++#endif
++
++#ifdef CONFIG_64BIT
++	*(volatile u32*)0xffffffffbfe0004c = 0xd2000001;
++#else
++	*(volatile u32*)0xbfe0004c = 0xd2000001;
++#endif
++}
++
++static void __init loongson2f_nec_fixup(struct pci_dev *pdev) 
++{ 
++	unsigned int val; 
++
++	/* Configues port 1, 2, 3 to be validate*/ 
++	pci_read_config_dword(pdev, 0xe0, &val); 
++	pci_write_config_dword(pdev, 0xe0, (val & ~3) | 0x2); /*Only 2 port be used*/
++}
++#ifndef	TEST_NO_CS5536
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, 
++			 loongson2f_cs5536_isa_fixup);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OHC, 
++			 loongson2f_cs5536_ohci_fixup);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_EHC, 
++			 loongson2f_cs5536_ehci_fixup);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_AUDIO, 
++			 loongson2f_cs5536_acc_fixup);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, 
++			 loongson2f_cs5536_ide_fixup);
++#endif	/* TEST_NO_CS5536 */
++DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, loongson2f_fixup_pcimap);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
++			loongson2f_nec_fixup);
+diff --git a/arch/mips/pci/ops-loongson2f.c b/arch/mips/pci/ops-loongson2f.c
+new file mode 100644
+index 0000000..08e8b7f
+--- /dev/null
++++ b/arch/mips/pci/ops-loongson2f.c
+@@ -0,0 +1,205 @@
++/*
++ * ops-lm2f.c
++ *
++ * Copyright (C) 2004 ICT CAS
++ * Author: Li xiaoyu, ICT CAS
++ *   lixy@ict.ac.cn
++ *
++ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
++ * Author: Fuxin Zhang, zhangfx@lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/pci.h>
++#include <linux/kernel.h>
++
++#include <asm/mips-boards/bonito64.h>
++
++#define	PCI_OPS_CS5536_IDSEL	14
++
++#define PCI_ACCESS_READ  0
++#define PCI_ACCESS_WRITE 1
++
++extern void	cs5536_pci_conf_write4(int function, int reg, u32 value);
++extern u32	cs5536_pci_conf_read4(int function, int reg);
++
++static inline void bflush(void)
++{
++	/* flush Bonito register writes */
++	(void)BONITO_PCICMD;
++}
++
++static int lm2f_pci_config_access(unsigned char access_type,
++				  struct pci_bus *bus, unsigned int devfn,
++				  int where, u32 *data)
++{
++	u32 busnum = bus->number;
++	u32 addr, type;
++	void *addrp;
++	int device = PCI_SLOT(devfn);
++	int function = PCI_FUNC(devfn);
++	int reg = where & ~3;
++	
++	/************************************************************************/
++	/* CS5536 PCI ACCESS ROUTINE :						*/
++	/*	Note the functions circle call :				*/
++	/* lm2e_pci_config_access()--->cs5536_pci_conf_read/write4()--->	*/
++	/* _rdmsr/_wrmsr()--->lm2e_pci_config_access()				*/
++	/************************************************************************/
++	if( (busnum == 0) && (device == PCI_OPS_CS5536_IDSEL) && (reg < 0xF0) ){
++		switch(access_type){
++			case PCI_ACCESS_READ :
++				*data = cs5536_pci_conf_read4(function, reg);
++				break;
++			case PCI_ACCESS_WRITE :
++				cs5536_pci_conf_write4(function, reg, *data);
++				break;
++		}
++		return 0;
++	}
++	
++	if (busnum == 0) {
++		/* Type 0 configuration on onboard PCI bus */
++		if (device > 20 || function > 7) {
++			*data = -1;	/* device out of range */
++			return PCIBIOS_DEVICE_NOT_FOUND;
++		}
++		addr = (1 << (device + 11)) | (function << 8) | reg;
++		type = 0;
++	} else {
++		/* Type 1 configuration on offboard PCI bus */
++		if (device > 31 || function > 7) {
++			*data = -1;	/* device out of range */
++			return PCIBIOS_DEVICE_NOT_FOUND;
++		}
++		addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
++		type = 0x10000;
++	}
++
++	/* clear aborts */
++	BONITO_PCICMD |= BONITO_PCICMD_MABORT_CLR | BONITO_PCICMD_MTABORT_CLR;
++
++	BONITO_PCIMAP_CFG = (addr >> 16) | type;
++	bflush();
++
++	addrp = (void *)CKSEG1ADDR(BONITO_PCICFG_BASE | (addr & 0xffff));
++	if (access_type == PCI_ACCESS_WRITE) {
++		*(volatile unsigned int *)addrp = cpu_to_le32(*data);
++	} else {
++		*data = le32_to_cpu(*(volatile unsigned int *)addrp);
++	}
++
++	/* Detect Master/Target abort */
++	if (BONITO_PCICMD & (BONITO_PCICMD_MABORT_CLR | BONITO_PCICMD_MTABORT_CLR)) {
++		BONITO_PCICMD |= BONITO_PCICMD_MABORT_CLR | BONITO_PCICMD_MTABORT_CLR;
++		*data = -1;
++		return PCIBIOS_DEVICE_NOT_FOUND;
++	}
++
++	return PCIBIOS_SUCCESSFUL;
++
++}
++
++static int lm2f_pci_pcibios_read(struct pci_bus *bus, unsigned int devfn,
++				 int where, int size, u32 * val)
++{
++	u32 data = 0;
++
++	int ret = lm2f_pci_config_access(PCI_ACCESS_READ,
++			bus, devfn, where, &data);
++
++	if (ret != PCIBIOS_SUCCESSFUL)
++		return ret;
++
++	if (size == 1)
++		*val = (data >> ((where & 3) << 3)) & 0xff;
++	else if (size == 2)
++		*val = (data >> ((where & 3) << 3)) & 0xffff;
++	else
++		*val = data;
++
++	return PCIBIOS_SUCCESSFUL;
++}
++
++static int lm2f_pci_pcibios_write(struct pci_bus *bus, unsigned int devfn,
++				  int where, int size, u32 val)
++{
++	u32 data = 0;
++	int ret;
++
++	if (size == 4)
++		data = val;
++	else {
++		ret = lm2f_pci_config_access(PCI_ACCESS_READ,
++				bus, devfn, where, &data);
++		if (ret != PCIBIOS_SUCCESSFUL)
++			return ret;
++
++		if (size == 1)
++			data = (data & ~(0xff << ((where & 3) << 3))) |
++			    (val << ((where & 3) << 3));
++		else if (size == 2)
++			data = (data & ~(0xffff << ((where & 3) << 3))) |
++			    (val << ((where & 3) << 3));
++	}
++
++	ret = lm2f_pci_config_access(PCI_ACCESS_WRITE,
++			bus, devfn, where, &data);
++	if (ret != PCIBIOS_SUCCESSFUL)
++		return ret;
++
++	return PCIBIOS_SUCCESSFUL;
++}
++
++void _rdmsr(u32 msr, u32 *hi, u32 *lo)
++{
++	struct pci_bus bus = {
++		.number = 0
++	};
++	u32 devfn = PCI_DEVFN(14, 0);
++	lm2f_pci_pcibios_write(&bus, devfn, 0xf4, 4, msr);
++	lm2f_pci_pcibios_read(&bus, devfn, 0xf8, 4, lo);
++	lm2f_pci_pcibios_read(&bus, devfn, 0xfc, 4, hi);
++	//printk("rdmsr msr %x, lo %x, hi %x\n", msr, *lo, *hi);
++}
++
++void _wrmsr(u32 msr, u32 hi, u32 lo)
++{
++	struct pci_bus bus = {
++		.number = 0
++	};
++	u32 devfn = PCI_DEVFN(14, 0);
++	lm2f_pci_pcibios_write(&bus, devfn, 0xf4, 4, msr);
++	lm2f_pci_pcibios_write(&bus, devfn, 0xf8, 4, lo);
++	lm2f_pci_pcibios_write(&bus, devfn, 0xfc, 4, hi);
++	//printk("wrmsr msr %x, lo %x, hi %x\n", msr, lo, hi); 
++}
++
++EXPORT_SYMBOL(_rdmsr);
++EXPORT_SYMBOL(_wrmsr);
++
++struct pci_ops loongson2f_pci_pci_ops = {
++	.read = lm2f_pci_pcibios_read,
++	.write = lm2f_pci_pcibios_write
++};
+diff --git a/arch/mips/power/Makefile b/arch/mips/power/Makefile
+new file mode 100644
+index 0000000..73d56b8
+--- /dev/null
++++ b/arch/mips/power/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_HIBERNATION) += cpu.o hibernate.o
+diff --git a/arch/mips/power/cpu.c b/arch/mips/power/cpu.c
+new file mode 100644
+index 0000000..b799bfe
+--- /dev/null
++++ b/arch/mips/power/cpu.c
+@@ -0,0 +1,48 @@
++/*
++ * Suspend support specific for mips.
++ *
++ */
++#include <linux/mm.h>
++#include <asm/mipsregs.h>
++#include <asm/page.h>
++#include <asm/suspend.h>
++
++/* References to section boundaries */
++extern const void __nosave_begin, __nosave_end;
++static uint32_t saved_status;
++unsigned long 
++	 saved_ra,
++	 saved_sp,
++	 saved_fp,
++	 saved_gp,
++	 saved_s0,
++	 saved_s1,
++	 saved_s2,
++	 saved_s3,
++	 saved_s4,
++	 saved_s5,
++	 saved_s6,
++	 saved_s7,
++	 saved_a0,
++	 saved_a1,
++	 saved_a2,
++	 saved_a3,
++	 saved_v0,
++	 saved_v1;
++
++void save_processor_state(void)
++{
++	saved_status = read_c0_status();
++}
++
++void restore_processor_state(void)
++{
++	write_c0_status(saved_status);
++}
++
++int pfn_is_nosave(unsigned long pfn)
++{
++ 	unsigned long nosave_begin_pfn = __pa(&__nosave_begin) >> PAGE_SHIFT;
++ 	unsigned long nosave_end_pfn = PAGE_ALIGN(__pa(&__nosave_end)) >> PAGE_SHIFT;
++ 	return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
++}
+diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S
+new file mode 100644
+index 0000000..e45ec45
+--- /dev/null
++++ b/arch/mips/power/hibernate.S
+@@ -0,0 +1,78 @@
++#incldue <linux/linkage.h>
++#include <asm/asm-offsets.h>
++#include <asm/regdef.h>
++#include <asm/asm.h>
++
++.text 
++LEAF(swsusp_arch_suspend)
++	 PTR_LA t0, saved_ra
++	 PTR_S ra, (t0)
++	 PTR_LA t0, saved_sp
++	 PTR_S sp, (t0)
++	 PTR_LA t0, saved_fp
++	 PTR_S fp, (t0)
++	 PTR_LA t0, saved_gp
++	 PTR_S gp, (t0)
++	 PTR_LA t0, saved_s0
++	 PTR_S s0, (t0) 
++	 PTR_LA t0, saved_s1
++	 PTR_S s1, (t0)
++	 PTR_LA t0, saved_s2
++	 PTR_S s2, (t0)
++	 PTR_LA t0, saved_s3
++	 PTR_S s3, (t0)
++	 PTR_LA t0, saved_s4
++	 PTR_S s4, (t0)
++	 PTR_LA t0, saved_s5
++	 PTR_S s5, (t0)
++	 PTR_LA t0, saved_s6
++	 PTR_S s6, (t0)
++	 PTR_LA t0, saved_s7
++	 PTR_S s7, (t0)
++	 PTR_LA t0, saved_a0
++	 PTR_S a0, (t0)
++	 PTR_LA t0, saved_a1
++	 PTR_S a1, (t0)
++	 PTR_LA t0, saved_a2
++	 PTR_S a2, (t0)
++	 PTR_LA t0, saved_v1
++	 PTR_S v1, (t0)
++	 j swsusp_save
++	 nop
++END(swsusp_arch_suspend)
++
++LEAF(swsusp_arch_resume)
++	PTR_L t0, restore_pblist
++0: 
++	PTR_L t1, PBE_ADDRESS(t0)   /* source */
++ 	PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */
++ 	PTR_ADDIU t3, t1, _PAGE_SIZE
++1: 
++	REG_L t8, (t1)
++ 	REG_S t8, (t2)
++ 	PTR_ADDIU t1, t1, SZREG
++ 	PTR_ADDIU t2, t2, SZREG
++ 	bne t1, t3, 1b
++ 	PTR_L t0, PBE_NEXT(t0)
++ 	bnez t0, 0b
++	//flush cache and tlb. no need?I am not sure.
++	PTR_L ra, saved_ra
++	PTR_L sp, saved_sp
++	PTR_L fp, saved_fp
++	PTR_L s0, saved_s0
++	PTR_L s1, saved_s1
++	PTR_L s2, saved_s2
++	PTR_L s3, saved_s3
++	PTR_L s4, saved_s4
++	PTR_L s5, saved_s5
++	PTR_L s6, saved_s6
++	PTR_L s7, saved_s7
++	PTR_L a0, saved_a0
++	PTR_L a1, saved_a1
++	PTR_L a2, saved_a2
++	PTR_L a3, saved_a3
++	PTR_LI v0, 0x0 
++	PTR_L v1, saved_v1
++	jr ra
++	nop
++END(swsusp_arch_resume)
+diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
+index f6d9bf4..d061481 100644
+--- a/arch/mips/sgi-ip22/ip22-int.c
++++ b/arch/mips/sgi-ip22/ip22-int.c
+@@ -68,7 +68,7 @@ static void enable_local1_irq(unsigned int irq)
+ 		sgint->imask1 |= (1 << (irq - SGINT_LOCAL1));
+ }
+ 
+-void disable_local1_irq(unsigned int irq)
++static void disable_local1_irq(unsigned int irq)
+ {
+ 	sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
+ }
+@@ -87,7 +87,7 @@ static void enable_local2_irq(unsigned int irq)
+ 	sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
+ }
+ 
+-void disable_local2_irq(unsigned int irq)
++static void disable_local2_irq(unsigned int irq)
+ {
+ 	sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
+ 	if (!sgint->cmeimask0)
+@@ -108,7 +108,7 @@ static void enable_local3_irq(unsigned int irq)
+ 	sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3));
+ }
+ 
+-void disable_local3_irq(unsigned int irq)
++static void disable_local3_irq(unsigned int irq)
+ {
+ 	sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3));
+ 	if (!sgint->cmeimask1)
+@@ -344,6 +344,6 @@ void __init arch_init_irq(void)
+ 
+ #ifdef CONFIG_EISA
+ 	if (ip22_is_fullhouse())	/* Only Indigo-2 has EISA stuff */
+-	        ip22_eisa_init();
++		ip22_eisa_init();
+ #endif
+ }
+diff --git a/arch/mips/zboot/Makefile b/arch/mips/zboot/Makefile
+new file mode 100644
+index 0000000..9c3bc8a
+--- /dev/null
++++ b/arch/mips/zboot/Makefile
+@@ -0,0 +1,62 @@
++#
++# arch/mips/zboot/Makefile
++#
++# This file is subject to the terms and conditions of the GNU General Public
++# License.  See the file "COPYING" in the main directory of this archive
++# for more details.
++
++# Adapted for MIPS Pete Popov, Dan Malek
++#
++# Copyright (C) 1994 by Linus Torvalds
++# Adapted for PowerPC by Gary Thomas
++# modified by Cort (cort@cs.nmt.edu)
++#
++
++targets 	:= bzImage
++
++EXTRA_CFLAGS := -I$(TOPDIR)/arch/mips/zboot/include 
++
++CFLAGS := $(ZBOOT_FLAGS)
++
++
++.c.s:
++	$(CC) $(CFLAGS) -S -o $*.s $<
++.s.o:
++	$(AS) -o $*.o $<
++.c.o:
++	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c -o $*.o $<
++.S.s:
++	$(CPP) $(AFLAGS) -o $*.o $<
++.S.o:
++	$(CC) $(AFLAGS) -c -o $*.o $<
++
++GZIP_FLAGS = -v9f
++EXTRA_CFLAGS := $(CFLAGS) \
++		-I$(TOPDIR)/arch/$(ARCH)/zboot/include \
++		-I$(TOPDIR)/include/asm
++AFLAGS	+= -D__BOOTER__
++
++BOOT_TARGETS = zImage zImage.initrd zImage.flash zImage.initrd.flash
++
++images/vmlinux.gz: $(TOPDIR)/vmlinux
++	$(MAKE) -C images vmlinux.gz
++
++$(BOOT_TARGETS): lib/zlib.a images/vmlinux.gz
++
++ifdef CONFIG_LEMOTE_FULONG
++SUBARCH := $(obj)/lm2e
++KBUILD_IMAGE := arch/mips/zboot/lm2e/bzImage
++endif
++ifdef CONFIG_MACH_LM2F
++SUBARCH := $(obj)/lm2f
++KBUILD_IMAGE := arch/mips/zboot/lm2f/bzImage
++endif
++
++$(obj)/bzImage:
++	$(Q)$(MAKE) $(build)=$(SUBARCH)  $(KBUILD_IMAGE)
++	
++# Do the dirs
++clean:
++	$(MAKE) -C common clean
++	$(MAKE) -C images clean
++
+diff --git a/arch/mips/zboot/common/Makefile b/arch/mips/zboot/common/Makefile
+new file mode 100644
+index 0000000..1beb038
+--- /dev/null
++++ b/arch/mips/zboot/common/Makefile
+@@ -0,0 +1,26 @@
++#
++# arch/mips/zboot/common/Makefile
++#
++# This file is subject to the terms and conditions of the GNU General Public
++# License.  See the file "COPYING" in the main directory of this archive
++# for more details.
++#
++# Tom Rini	January 2001
++#
++
++CFLAGS :=$(CFLAGS) -fno-builtin
++.c.s:
++	$(CC) $(CFLAGS) -S -o $*.s $<
++.s.o:
++	$(AS) -o $*.o $<
++.c.o:
++	$(CC) $(CFLAGS) -c -o $*.o $<
++.S.s:
++	$(CPP) $(AFLAGS) -o $*.o $<
++.S.o:
++	$(CC) $(AFLAGS) -c -o $*.o $<
++
++clean:
++	rm -rf *.o
++
++OBJCOPY_ARGS = -O elf32-tradlittlemips
+diff --git a/arch/mips/zboot/common/au1k_uart.c b/arch/mips/zboot/common/au1k_uart.c
+new file mode 100644
+index 0000000..a8cf1e1
+--- /dev/null
++++ b/arch/mips/zboot/common/au1k_uart.c
+@@ -0,0 +1,103 @@
++/*
++ * BRIEF MODULE DESCRIPTION
++ *	Simple Au1000 uart routines.
++ *
++ * Copyright 2001 MontaVista Software Inc.
++ * Author: MontaVista Software, Inc.
++ *		ppopov@mvista.com or source@mvista.com
++ *
++ *  This program is free software; you can redistribute	 it and/or modify it
++ *  under  the terms of	 the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the	License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED	  ``AS	IS'' AND   ANY	EXPRESS OR IMPLIED
++ *  WARRANTIES,	  INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO	EVENT  SHALL   THE AUTHOR  BE	 LIABLE FOR ANY	  DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED	  TO, PROCUREMENT OF  SUBSTITUTE GOODS	OR SERVICES; LOSS OF
++ *  USE, DATA,	OR PROFITS; OR	BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN	 CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ *  You should have received a copy of the  GNU General Public License along
++ *  with this program; if not, write  to the Free Software Foundation, Inc.,
++ *  675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++#include <linux/config.h>
++#include <asm/io.h>
++#include <asm/au1000.h>
++#include "ns16550.h"
++
++typedef         unsigned char uint8;
++typedef         unsigned int  uint32;
++
++#define         UART16550_BAUD_2400             2400
++#define         UART16550_BAUD_4800             4800
++#define         UART16550_BAUD_9600             9600
++#define         UART16550_BAUD_19200            19200
++#define         UART16550_BAUD_38400            38400
++#define         UART16550_BAUD_57600            57600
++#define         UART16550_BAUD_115200           115200
++
++#define         UART16550_PARITY_NONE           0
++#define         UART16550_PARITY_ODD            0x08
++#define         UART16550_PARITY_EVEN           0x18
++#define         UART16550_PARITY_MARK           0x28
++#define         UART16550_PARITY_SPACE          0x38
++
++#define         UART16550_DATA_5BIT             0x0
++#define         UART16550_DATA_6BIT             0x1
++#define         UART16550_DATA_7BIT             0x2
++#define         UART16550_DATA_8BIT             0x3
++
++#define         UART16550_STOP_1BIT             0x0
++#define         UART16550_STOP_2BIT             0x4
++
++/* It would be nice if we had a better way to do this.
++ * It could be a variable defined in one of the board specific files.
++ */
++#undef UART_BASE
++#ifdef CONFIG_COGENT_CSB250
++#define UART_BASE UART3_ADDR
++#else
++#define UART_BASE UART0_ADDR
++#endif
++
++/* memory-mapped read/write of the port */
++#define UART16550_READ(y)    (readl(UART_BASE + y) & 0xff)
++#define UART16550_WRITE(y,z) (writel(z&0xff, UART_BASE + y))
++
++/*
++ * We use uart 0, which is already initialized by
++ * yamon. 
++ */
++volatile struct NS16550 *
++serial_init(int chan)
++{
++	volatile struct NS16550 *com_port;
++	com_port = (struct NS16550 *) UART_BASE;
++	return (com_port);
++}
++
++void
++serial_putc(volatile struct NS16550 *com_port, unsigned char c)
++{
++	while ((UART16550_READ(UART_LSR)&0x40) == 0);
++	UART16550_WRITE(UART_TX, c);
++}
++
++unsigned char
++serial_getc(volatile struct NS16550 *com_port)
++{
++	while((UART16550_READ(UART_LSR) & 0x1) == 0);
++	return UART16550_READ(UART_RX);
++}
++
++int
++serial_tstc(volatile struct NS16550 *com_port)
++{
++	return((UART16550_READ(UART_LSR) & LSR_DR) != 0);
++}
+diff --git a/arch/mips/zboot/common/ctype.c b/arch/mips/zboot/common/ctype.c
+new file mode 100644
+index 0000000..b5f72a5
+--- /dev/null
++++ b/arch/mips/zboot/common/ctype.c
+@@ -0,0 +1,35 @@
++/*
++ *  linux/lib/ctype.c
++ *
++ *  Copyright (C) 1991, 1992  Linus Torvalds
++ */
++
++#include <linux/ctype.h>
++
++unsigned char _ctype[] = {
++_C,_C,_C,_C,_C,_C,_C,_C,			/* 0-7 */
++_C,_C|_S,_C|_S,_C|_S,_C|_S,_C|_S,_C,_C,		/* 8-15 */
++_C,_C,_C,_C,_C,_C,_C,_C,			/* 16-23 */
++_C,_C,_C,_C,_C,_C,_C,_C,			/* 24-31 */
++_S|_SP,_P,_P,_P,_P,_P,_P,_P,			/* 32-39 */
++_P,_P,_P,_P,_P,_P,_P,_P,			/* 40-47 */
++_D,_D,_D,_D,_D,_D,_D,_D,			/* 48-55 */
++_D,_D,_P,_P,_P,_P,_P,_P,			/* 56-63 */
++_P,_U|_X,_U|_X,_U|_X,_U|_X,_U|_X,_U|_X,_U,	/* 64-71 */
++_U,_U,_U,_U,_U,_U,_U,_U,			/* 72-79 */
++_U,_U,_U,_U,_U,_U,_U,_U,			/* 80-87 */
++_U,_U,_U,_P,_P,_P,_P,_P,			/* 88-95 */
++_P,_L|_X,_L|_X,_L|_X,_L|_X,_L|_X,_L|_X,_L,	/* 96-103 */
++_L,_L,_L,_L,_L,_L,_L,_L,			/* 104-111 */
++_L,_L,_L,_L,_L,_L,_L,_L,			/* 112-119 */
++_L,_L,_L,_P,_P,_P,_P,_C,			/* 120-127 */
++0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,		/* 128-143 */
++0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,		/* 144-159 */
++_S|_SP,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,   /* 160-175 */
++_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,       /* 176-191 */
++_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,       /* 192-207 */
++_U,_U,_U,_U,_U,_U,_U,_P,_U,_U,_U,_U,_U,_U,_U,_L,       /* 208-223 */
++_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,       /* 224-239 */
++_L,_L,_L,_L,_L,_L,_L,_P,_L,_L,_L,_L,_L,_L,_L,_L};      /* 240-255 */
++
++
+diff --git a/arch/mips/zboot/common/dummy.c b/arch/mips/zboot/common/dummy.c
+new file mode 100644
+index 0000000..31dbf45
+--- /dev/null
++++ b/arch/mips/zboot/common/dummy.c
+@@ -0,0 +1,4 @@
++int main(void)
++{
++	return 0;
++}
+diff --git a/arch/mips/zboot/common/misc-common.c b/arch/mips/zboot/common/misc-common.c
+new file mode 100644
+index 0000000..e363e1a
+--- /dev/null
++++ b/arch/mips/zboot/common/misc-common.c
+@@ -0,0 +1,437 @@
++/*
++ * arch/mips/zboot/common/misc-common.c
++ * 
++ * Misc. bootloader code (almost) all platforms can use
++ *
++ * Author: Johnnie Peters <jpeters@mvista.com>
++ * Editor: Tom Rini <trini@mvista.com>
++ *
++ * Derived from arch/ppc/boot/prep/misc.c
++ *
++ * Ported by Pete Popov <ppopov@mvista.com> to
++ * support mips board(s).  I also got rid of the vga console
++ * code.
++ *
++ * Copyright 2000-2001 MontaVista Software Inc.
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ *
++ * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
++ * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ * You should have received a copy of the  GNU General Public License along
++ * with this program; if not, write  to the Free Software Foundation, Inc.,
++ * 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#include "zlib.h"
++#include <stdarg.h>
++
++extern char *avail_ram;
++extern char *end_avail;
++extern char _end[];
++
++int puts(const char *);
++void exit(void);
++void putc(const char c);
++void puthex(unsigned long val);
++void _bcopy(char *src, char *dst, int len);
++void gunzip(void *, int, unsigned char *, int *);
++static int _cvt(unsigned long val, char *buf, long radix, char *digits);
++int strlen(const char *s);
++void _vprintk(void(*)(const char), const char *, va_list ap);
++
++struct NS16550 *com_port;
++
++int serial_tstc(volatile struct NS16550 *);
++unsigned char serial_getc(volatile struct NS16550 *);
++void serial_putc(volatile struct NS16550 *, unsigned char);
++
++void pause(void)
++{
++	puts("pause\n");
++}
++
++void exit(void)
++{
++	puts("exit\n");
++	while(1); 
++}
++
++int tstc(void)
++{
++	return (serial_tstc(com_port));
++}
++
++int getc(void)
++{
++	while (1) {
++		if (serial_tstc(com_port))
++			return (serial_getc(com_port));
++	}
++}
++
++void 
++putc(const char c)
++{
++	serial_putc(com_port, c);
++	if ( c == '\n' )
++		serial_putc(com_port, '\r');
++}
++
++int puts(const char *s)
++{
++	char c;
++	while ( ( c = *s++ ) != '\0' ) {
++	        serial_putc(com_port, c);
++	        if ( c == '\n' ) serial_putc(com_port, '\r');
++	}
++
++	return 0;
++}
++
++void error(char *x)
++{
++	puts("\n\n");
++	puts(x);
++	puts("\n\n -- System halted");
++
++	while(1);	/* Halt */
++}
++
++void *zalloc(void *x, unsigned items, unsigned size)
++{
++	void *p = avail_ram;
++	
++	size *= items;
++	size = (size + 7) & -8;
++	avail_ram += size;
++	if (avail_ram > end_avail) {
++		puts("oops... out of memory\n");
++		pause();
++	}
++	return p;
++}
++
++void zfree(void *x, void *addr, unsigned nb)
++{
++}
++
++#define HEAD_CRC	2
++#define EXTRA_FIELD	4
++#define ORIG_NAME	8
++#define COMMENT		0x10
++#define RESERVED	0xe0
++
++#define DEFLATED	8
++
++void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
++{
++	z_stream s;
++	int r, i, flags;
++	
++	/* skip header */
++	i = 10;
++	flags = src[3];
++	if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
++		puts("bad gzipped data\n");
++		exit();
++	}
++	if ((flags & EXTRA_FIELD) != 0)
++		i = 12 + src[10] + (src[11] << 8);
++	if ((flags & ORIG_NAME) != 0)
++		while (src[i++] != 0)
++			;
++	if ((flags & COMMENT) != 0)
++		while (src[i++] != 0)
++			;
++	if ((flags & HEAD_CRC) != 0)
++		i += 2;
++	if (i >= *lenp) {
++		puts("gunzip: ran out of data in header\n");
++		exit();
++	}
++	
++	s.zalloc = zalloc;
++	s.zfree = zfree;
++	r = inflateInit2(&s, -MAX_WBITS);
++	if (r != Z_OK) {
++		puts("inflateInit2 returned %d\n");
++		exit();
++	}
++	s.next_in = src + i;
++	s.avail_in = *lenp - i;
++	s.next_out = dst;
++	s.avail_out = dstlen;
++	r = inflate(&s, Z_FINISH);
++	if (r != Z_OK && r != Z_STREAM_END) {
++		puts("inflate returned %d\n");
++		exit();
++	}
++	*lenp = s.next_out - (unsigned char *) dst;
++	inflateEnd(&s);
++}
++
++void
++puthex(unsigned long val)
++{
++
++	unsigned char buf[10];
++	int i;
++	for (i = 7;  i >= 0;  i--)
++	{
++		buf[i] = "0123456789ABCDEF"[val & 0x0F];
++		val >>= 4;
++	}
++	buf[8] = '\0';
++	puts(buf);
++}
++
++#define FALSE 0
++#define TRUE  1
++
++void
++_printk(char const *fmt, ...)
++{
++	va_list ap;
++
++	va_start(ap, fmt);
++	_vprintk(putc, fmt, ap);
++	va_end(ap);
++	return;
++}
++
++#define is_digit(c) ((c >= '0') && (c <= '9'))
++
++void
++_vprintk(void(*putc)(const char), const char *fmt0, va_list ap)
++{
++	char c, sign, *cp = 0;
++	int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right;
++	char buf[32];
++	long val;
++	while ((c = *fmt0++))
++	{
++		if (c == '%')
++		{
++			c = *fmt0++;
++			left_prec = right_prec = pad_on_right = 0;
++			if (c == '-')
++			{
++				c = *fmt0++;
++				pad_on_right++;
++			}
++			if (c == '0')
++			{
++				zero_fill = TRUE;
++				c = *fmt0++;
++			} else
++			{
++				zero_fill = FALSE;
++			}
++			while (is_digit(c))
++			{
++				left_prec = (left_prec * 10) + (c - '0');
++				c = *fmt0++;
++			}
++			if (c == '.')
++			{
++				c = *fmt0++;
++				zero_fill++;
++				while (is_digit(c))
++				{
++					right_prec = (right_prec * 10) + (c - '0');
++					c = *fmt0++;
++				}
++			} else
++			{
++				right_prec = left_prec;
++			}
++			sign = '\0';
++			switch (c)
++			{
++			case 'd':
++			case 'x':
++			case 'X':
++				val = va_arg(ap, long);
++				switch (c)
++				{
++				case 'd':
++					if (val < 0)
++					{
++						sign = '-';
++						val = -val;
++					}
++					length = _cvt(val, buf, 10, "0123456789");
++					break;
++				case 'x':
++					length = _cvt(val, buf, 16, "0123456789abcdef");
++					break;
++				case 'X':
++					length = _cvt(val, buf, 16, "0123456789ABCDEF");
++					break;
++				}
++				cp = buf;
++				break;
++			case 's':
++				cp = va_arg(ap, char *);
++				length = strlen(cp);
++				break;
++			case 'c':
++				c = va_arg(ap, long /*char*/);
++				(*putc)(c);
++				continue;
++			default:
++				(*putc)('?');
++			}
++			pad = left_prec - length;
++			if (sign != '\0')
++			{
++				pad--;
++			}
++			if (zero_fill)
++			{
++				c = '0';
++				if (sign != '\0')
++				{
++					(*putc)(sign);
++					sign = '\0';
++				}
++			} else
++			{
++				c = ' ';
++			}
++			if (!pad_on_right)
++			{
++				while (pad-- > 0)
++				{
++					(*putc)(c);
++				}
++			}
++			if (sign != '\0')
++			{
++				(*putc)(sign);
++			}
++			while (length-- > 0)
++			{
++				(*putc)(c = *cp++);
++				if (c == '\n')
++				{
++					(*putc)('\r');
++				}
++			}
++			if (pad_on_right)
++			{
++				while (pad-- > 0)
++				{
++					(*putc)(c);
++				}
++			}
++		} else
++		{
++			(*putc)(c);
++			if (c == '\n')
++			{
++				(*putc)('\r');
++			}
++		}
++	}
++}
++
++int
++_cvt(unsigned long val, char *buf, long radix, char *digits)
++{
++	char temp[80];
++	char *cp = temp;
++	int length = 0;
++	if (val == 0)
++	{ /* Special case */
++		*cp++ = '0';
++	} else
++		while (val)
++		{
++			*cp++ = digits[val % radix];
++			val /= radix;
++		}
++	while (cp != temp)
++	{
++		*buf++ = *--cp;
++		length++;
++	}
++	*buf = '\0';
++	return (length);
++}
++
++void
++_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base)
++{
++	int i, c;
++	if ((unsigned int)s > (unsigned int)p)
++	{
++		s = (unsigned int)s - (unsigned int)p;
++	}
++	while (s > 0)
++	{
++		if (base)
++		{
++			_printk("%06X: ", (int)p - (int)base);
++		} else
++		{
++			_printk("%06X: ", p);
++		}
++		for (i = 0;  i < 16;  i++)
++		{
++			if (i < s)
++			{
++				_printk("%02X", p[i] & 0xFF);
++			} else
++			{
++				_printk("  ");
++			}
++			if ((i % 2) == 1) _printk(" ");
++			if ((i % 8) == 7) _printk(" ");
++		}
++		_printk(" |");
++		for (i = 0;  i < 16;  i++)
++		{
++			if (i < s)
++			{
++				c = p[i] & 0xFF;
++				if ((c < 0x20) || (c >= 0x7F)) c = '.';
++			} else
++			{
++				c = ' ';
++			}
++			_printk("%c", c);
++		}
++		_printk("|\n");
++		s -= 16;
++		p += 16;
++	}
++}
++
++void
++_dump_buf(unsigned char *p, int s)
++{
++	_printk("\n");
++	_dump_buf_with_offset(p, s, 0);
++}
++
++/*
++ * Local variables:
++ *  c-indent-level: 8
++ *  c-basic-offset: 8
++ *  tab-width: 8
++ * End:
++ */
+diff --git a/arch/mips/zboot/common/misc-simple.c b/arch/mips/zboot/common/misc-simple.c
+new file mode 100644
+index 0000000..982c6e8
+--- /dev/null
++++ b/arch/mips/zboot/common/misc-simple.c
+@@ -0,0 +1,126 @@
++/*
++ * arch/mips/zboot/common/misc-simple.c
++ *
++ * Misc. bootloader code for many machines.  This assumes you have are using
++ * a 6xx/7xx/74xx CPU in your machine.  This assumes the chunk of memory
++ * below 8MB is free.  Finally, it assumes you have a NS16550-style uart for 
++ * your serial console.  If a machine meets these requirements, it can quite
++ * likely use this code during boot.
++ * 
++ * Author: Matt Porter <mporter@mvista.com>
++ * Derived from arch/ppc/boot/prep/misc.c
++ *
++ * Copyright 2001 MontaVista Software Inc.
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++
++#include <config.h>
++#include <linux/types.h>
++#include <asm/page.h>
++#include <asm/processor.h>
++#include <asm/mmu.h>
++
++#include "zlib.h"
++
++extern struct NS16550 *com_port;
++
++char *avail_ram;
++char *end_avail;
++extern char _end[];
++char *zimage_start;
++
++#ifdef CONFIG_CMDLINE
++#define CMDLINE CONFIG_CMDLINE
++#else
++#define CMDLINE ""
++#endif
++char cmd_preset[] = CMDLINE;
++char cmd_buf[256];
++char *cmd_line = cmd_buf;
++
++/* The linker tells us where the image is.
++*/
++extern unsigned char __image_begin, __image_end;
++extern unsigned char __ramdisk_begin, __ramdisk_end;
++unsigned long initrd_size;
++
++extern void puts(const char *);
++extern void putc(const char c);
++extern void puthex(unsigned long val);
++extern void *memcpy(void * __dest, __const void * __src,
++			    __kernel_size_t __n);
++extern void gunzip(void *, int, unsigned char *, int *);
++extern void udelay(long delay);
++extern int tstc(void);
++extern int getc(void);
++extern volatile struct NS16550 *serial_init(int chan);
++
++extern	void flush_cache_all(void);
++void
++decompress_kernel(unsigned long load_addr, int num_words, 
++		unsigned long cksum, unsigned long *sp)
++{
++	extern unsigned long start;
++	int	zimage_size;
++
++	com_port = (struct NS16550 *)serial_init(0);
++
++	initrd_size = (unsigned long)(&__ramdisk_end) -
++		(unsigned long)(&__ramdisk_begin);
++
++	/*
++	 * Reveal where we were loaded at and where we
++	 * were relocated to.
++	 */
++	puts("loaded at:     "); puthex(load_addr);
++	puts(" "); puthex((unsigned long)(load_addr + (4*num_words))); puts("\n");
++	if ( (unsigned long)load_addr != (unsigned long)&start )
++	{
++		puts("relocated to:  "); puthex((unsigned long)&start);
++		puts(" ");
++		puthex((unsigned long)((unsigned long)&start + (4*num_words)));
++		puts("\n");
++	}
++
++	/*
++	 * We link ourself to an arbitrary low address.  When we run, we
++	 * relocate outself to that address.  __image_being points to
++	 * the part of the image where the zImage is. -- Tom
++	 */
++	zimage_start = (char *)(unsigned long)(&__image_begin);
++	zimage_size = (unsigned long)(&__image_end) -
++			(unsigned long)(&__image_begin);
++
++	/*
++	 * The zImage and initrd will be between start and _end, so they've
++	 * already been moved once.  We're good to go now. -- Tom
++	 */
++	puts("zimage at:     "); puthex((unsigned long)zimage_start);
++	puts(" "); puthex((unsigned long)(zimage_size+zimage_start));
++	puts("\n");
++
++	if ( initrd_size ) {
++		puts("initrd at:     ");
++		puthex((unsigned long)(&__ramdisk_begin));
++		puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n");
++	}
++
++	/* assume the chunk below 8M is free */
++	avail_ram = (char *)AVAIL_RAM_START;
++	end_avail = (char *)AVAIL_RAM_END;
++
++	/* Display standard Linux/MIPS boot prompt for kernel args */
++	puts("Uncompressing Linux at load address ");
++	puthex(LOADADDR);
++	puts("\n");
++	/* I don't like this hard coded gunzip size (fixme) */
++	gunzip((void *)LOADADDR, 0x1000000, zimage_start, &zimage_size);
++#if 1
++	flush_cache_all();
++#endif
++	puts("Now booting the kernel\n");
++}
+diff --git a/arch/mips/zboot/common/no_initrd.c b/arch/mips/zboot/common/no_initrd.c
+new file mode 100644
+index 0000000..ed5dcdb
+--- /dev/null
++++ b/arch/mips/zboot/common/no_initrd.c
+@@ -0,0 +1,2 @@
++char initrd_data[1];
++int initrd_len = 0;
+diff --git a/arch/mips/zboot/common/ns16550.c b/arch/mips/zboot/common/ns16550.c
+new file mode 100644
+index 0000000..0477ec5
+--- /dev/null
++++ b/arch/mips/zboot/common/ns16550.c
+@@ -0,0 +1,57 @@
++/*
++ * NS16550 support
++ */
++
++#include <config.h>
++#include <asm/serial.h>
++#include "ns16550.h"
++
++typedef struct NS16550 *NS16550_t;
++
++const NS16550_t COM_PORTS[] = { (NS16550_t) COM1,
++    (NS16550_t) COM2,
++    (NS16550_t) COM3,
++    (NS16550_t) COM4 };
++
++volatile struct NS16550 *
++serial_init(int chan)
++{
++	volatile struct NS16550 *com_port;
++	com_port = (struct NS16550 *) COM_PORTS[chan];
++	/* See if port is present */
++	com_port->lcr = 0x00;
++	com_port->ier = 0xFF;
++#if 0
++	if (com_port->ier != 0x0F) return ((struct NS16550 *)0);
++#endif
++	com_port->ier = 0x00;
++	com_port->lcr = 0x80;  /* Access baud rate */
++#ifdef CONFIG_SERIAL_CONSOLE_NONSTD
++	com_port->dll = (BASE_BAUD / CONFIG_SERIAL_CONSOLE_BAUD);
++	com_port->dlm = (BASE_BAUD / CONFIG_SERIAL_CONSOLE_BAUD) >> 8;
++#endif
++	com_port->lcr = 0x03;  /* 8 data, 1 stop, no parity */
++	com_port->mcr = 0x03;  /* RTS/DTR */
++	com_port->fcr = 0x07;  /* Clear & enable FIFOs */
++	return (com_port);
++}
++
++void
++serial_putc(volatile struct NS16550 *com_port, unsigned char c)
++{
++	while ((com_port->lsr & LSR_THRE) == 0) ;
++	com_port->thr = c;
++}
++
++unsigned char
++serial_getc(volatile struct NS16550 *com_port)
++{
++	while ((com_port->lsr & LSR_DR) == 0) ;
++	return (com_port->rbr);
++}
++
++int
++serial_tstc(volatile struct NS16550 *com_port)
++{
++	return ((com_port->lsr & LSR_DR) != 0);
++}
+diff --git a/arch/mips/zboot/common/string.c b/arch/mips/zboot/common/string.c
+new file mode 100644
+index 0000000..c6cf31b
+--- /dev/null
++++ b/arch/mips/zboot/common/string.c
+@@ -0,0 +1,497 @@
++/*
++ *  linux/lib/string.c
++ *
++ *  Copyright (C) 1991, 1992  Linus Torvalds
++ */
++
++/*
++ * stupid library routines.. The optimized versions should generally be found
++ * as inline code in <asm-xx/string.h>
++ *
++ * These are buggy as well..
++ *
++ * * Fri Jun 25 1999, Ingo Oeser <ioe@informatik.tu-chemnitz.de>
++ * -  Added strsep() which will replace strtok() soon (because strsep() is
++ *    reentrant and should be faster). Use only strsep() in new code, please.
++ */
++ 
++#include <linux/types.h>
++#include <linux/string.h>
++#include <linux/ctype.h>
++
++/**
++ * strnicmp - Case insensitive, length-limited string comparison
++ * @s1: One string
++ * @s2: The other string
++ * @len: the maximum number of characters to compare
++ */
++int strnicmp(const char *s1, const char *s2, size_t len)
++{
++	/* Yes, Virginia, it had better be unsigned */
++	unsigned char c1, c2;
++
++	c1 = 0;	c2 = 0;
++	if (len) {
++		do {
++			c1 = *s1; c2 = *s2;
++			s1++; s2++;
++			if (!c1)
++				break;
++			if (!c2)
++				break;
++			if (c1 == c2)
++				continue;
++			c1 = tolower(c1);
++			c2 = tolower(c2);
++			if (c1 != c2)
++				break;
++		} while (--len);
++	}
++	return (int)c1 - (int)c2;
++}
++
++char * ___strtok;
++
++/**
++ * strcpy - Copy a %NUL terminated string
++ * @dest: Where to copy the string to
++ * @src: Where to copy the string from
++ */
++ #ifndef __HAVE_ARCH_MEMCPY
++char * strcpy(char * dest,const char *src)
++{
++	char *tmp = dest;
++
++	while ((*dest++ = *src++) != '\0')
++		/* nothing */;
++	return tmp;
++}
++#endif
++
++/**
++ * strncpy - Copy a length-limited, %NUL-terminated string
++ * @dest: Where to copy the string to
++ * @src: Where to copy the string from
++ * @count: The maximum number of bytes to copy
++ *
++ * Note that unlike userspace strncpy, this does not %NUL-pad the buffer.
++ * However, the result is not %NUL-terminated if the source exceeds
++ * @count bytes.
++ */
++ #ifndef __HAVE_ARCH_STRNCPY
++char * strncpy(char * dest,const char *src,size_t count)
++{
++	char *tmp = dest;
++
++	while (count-- && (*dest++ = *src++) != '\0')
++		/* nothing */;
++
++	return tmp;
++}
++#endif
++
++/**
++ * strcat - Append one %NUL-terminated string to another
++ * @dest: The string to be appended to
++ * @src: The string to append to it
++ */
++char * strcat(char * dest, const char * src)
++{
++	char *tmp = dest;
++
++	while (*dest)
++		dest++;
++	while ((*dest++ = *src++) != '\0')
++		;
++
++	return tmp;
++}
++
++/**
++ * strncat - Append a length-limited, %NUL-terminated string to another
++ * @dest: The string to be appended to
++ * @src: The string to append to it
++ * @count: The maximum numbers of bytes to copy
++ *
++ * Note that in contrast to strncpy, strncat ensures the result is
++ * terminated.
++ */
++char * strncat(char *dest, const char *src, size_t count)
++{
++	char *tmp = dest;
++
++	if (count) {
++		while (*dest)
++			dest++;
++		while ((*dest++ = *src++)) {
++			if (--count == 0) {
++				*dest = '\0';
++				break;
++			}
++		}
++	}
++
++	return tmp;
++}
++
++/**
++ * strcmp - Compare two strings
++ * @cs: One string
++ * @ct: Another string
++ */
++ #ifndef __HAVE_ARCH_STRCMP
++int strcmp(const char * cs,const char * ct)
++{
++	register signed char __res;
++
++	while (1) {
++		if ((__res = *cs - *ct++) != 0 || !*cs++)
++			break;
++	}
++
++	return __res;
++}
++#endif
++
++/**
++ * strncmp - Compare two length-limited strings
++ * @cs: One string
++ * @ct: Another string
++ * @count: The maximum number of bytes to compare
++ */
++ #ifndef __HAVE_ARCH_STRNCMP
++int strncmp(const char * cs,const char * ct,size_t count)
++{
++	register signed char __res = 0;
++
++	while (count) {
++		if ((__res = *cs - *ct++) != 0 || !*cs++)
++			break;
++		count--;
++	}
++
++	return __res;
++}
++#endif
++
++/**
++ * strchr - Find the first occurrence of a character in a string
++ * @s: The string to be searched
++ * @c: The character to search for
++ */
++char * strchr(const char * s, int c)
++{
++	for(; *s != (char) c; ++s)
++		if (*s == '\0')
++			return NULL;
++	return (char *) s;
++}
++
++/**
++ * strrchr - Find the last occurrence of a character in a string
++ * @s: The string to be searched
++ * @c: The character to search for
++ */
++size_t strlen(const char * s);
++
++char * strrchr(const char * s, int c)
++{
++       const char *p = s + strlen(s);
++       do {
++           if (*p == (char)c)
++               return (char *)p;
++       } while (--p >= s);
++       return NULL;
++}
++
++/**
++ * strlen - Find the length of a string
++ * @s: The string to be sized
++ */
++size_t strlen(const char * s)
++{
++	const char *sc;
++
++	for (sc = s; *sc != '\0'; ++sc)
++		/* nothing */;
++	return sc - s;
++}
++
++/**
++ * strnlen - Find the length of a length-limited string
++ * @s: The string to be sized
++ * @count: The maximum number of bytes to search
++ */
++size_t strnlen(const char * s, size_t count)
++{
++	const char *sc;
++
++	for (sc = s; count-- && *sc != '\0'; ++sc)
++		/* nothing */;
++	return sc - s;
++}
++
++/**
++ * strspn - Calculate the length of the initial substring of @s which only
++ * 	contain letters in @accept
++ * @s: The string to be searched
++ * @accept: The string to search for
++ */
++size_t strspn(const char *s, const char *accept)
++{
++	const char *p;
++	const char *a;
++	size_t count = 0;
++
++	for (p = s; *p != '\0'; ++p) {
++		for (a = accept; *a != '\0'; ++a) {
++			if (*p == *a)
++				break;
++		}
++		if (*a == '\0')
++			return count;
++		++count;
++	}
++
++	return count;
++}
++
++/**
++ * strpbrk - Find the first occurrence of a set of characters
++ * @cs: The string to be searched
++ * @ct: The characters to search for
++ */
++char * strpbrk(const char * cs,const char * ct)
++{
++	const char *sc1,*sc2;
++
++	for( sc1 = cs; *sc1 != '\0'; ++sc1) {
++		for( sc2 = ct; *sc2 != '\0'; ++sc2) {
++			if (*sc1 == *sc2)
++				return (char *) sc1;
++		}
++	}
++	return NULL;
++}
++
++/**
++ * strtok - Split a string into tokens
++ * @s: The string to be searched
++ * @ct: The characters to search for
++ *
++ * WARNING: strtok is deprecated, use strsep instead.
++ */
++char * strtok(char * s,const char * ct)
++{
++	char *sbegin, *send;
++
++	sbegin  = s ? s : ___strtok;
++	if (!sbegin) {
++		return NULL;
++	}
++	sbegin += strspn(sbegin,ct);
++	if (*sbegin == '\0') {
++		___strtok = NULL;
++		return( NULL );
++	}
++	send = strpbrk( sbegin, ct);
++	if (send && *send != '\0')
++		*send++ = '\0';
++	___strtok = send;
++	return (sbegin);
++}
++
++/**
++ * strsep - Split a string into tokens
++ * @s: The string to be searched
++ * @ct: The characters to search for
++ *
++ * strsep() updates @s to point after the token, ready for the next call.
++ *
++ * It returns empty tokens, too, behaving exactly like the libc function
++ * of that name. In fact, it was stolen from glibc2 and de-fancy-fied.
++ * Same semantics, slimmer shape. ;)
++ */
++char * strsep(char **s, const char *ct)
++{
++	char *sbegin = *s, *end;
++
++	if (sbegin == NULL)
++		return NULL;
++
++	end = strpbrk(sbegin, ct);
++	if (end)
++		*end++ = '\0';
++	*s = end;
++
++	return sbegin;
++}
++
++/**
++ * memset - Fill a region of memory with the given value
++ * @s: Pointer to the start of the area.
++ * @c: The byte to fill the area with
++ * @count: The size of the area.
++ *
++ * Do not use memset() to access IO space, use memset_io() instead.
++ */
++void * memset(void * s,int c, size_t count)
++{
++	char *xs = (char *) s;
++
++	while (count--)
++		*xs++ = c;
++
++	return s;
++}
++
++/**
++ * bcopy - Copy one area of memory to another
++ * @src: Where to copy from
++ * @dest: Where to copy to
++ * @count: The size of the area.
++ *
++ * Note that this is the same as memcpy(), with the arguments reversed.
++ * memcpy() is the standard, bcopy() is a legacy BSD function.
++ *
++ * You should not use this function to access IO space, use memcpy_toio()
++ * or memcpy_fromio() instead.
++ */
++char * bcopy(const char * src, char * dest, int count)
++{
++	char *tmp = dest;
++
++	while (count--)
++		*tmp++ = *src++;
++
++	return dest;
++}
++
++/**
++ * memcpy - Copy one area of memory to another
++ * @dest: Where to copy to
++ * @src: Where to copy from
++ * @count: The size of the area.
++ *
++ * You should not use this function to access IO space, use memcpy_toio()
++ * or memcpy_fromio() instead.
++ */
++void * memcpy(void * dest,const void *src,size_t count)
++{
++	char *tmp = (char *) dest, *s = (char *) src;
++
++	while (count--)
++		*tmp++ = *s++;
++
++	return dest;
++}
++
++/**
++ * memmove - Copy one area of memory to another
++ * @dest: Where to copy to
++ * @src: Where to copy from
++ * @count: The size of the area.
++ *
++ * Unlike memcpy(), memmove() copes with overlapping areas.
++ */
++void * memmove(void * dest,const void *src,size_t count)
++{
++	char *tmp, *s;
++
++	if (dest <= src) {
++		tmp = (char *) dest;
++		s = (char *) src;
++		while (count--)
++			*tmp++ = *s++;
++		}
++	else {
++		tmp = (char *) dest + count;
++		s = (char *) src + count;
++		while (count--)
++			*--tmp = *--s;
++		}
++
++	return dest;
++}
++
++/**
++ * memcmp - Compare two areas of memory
++ * @cs: One area of memory
++ * @ct: Another area of memory
++ * @count: The size of the area.
++ */
++int memcmp(const void * cs,const void * ct,size_t count)
++{
++	const unsigned char *su1, *su2;
++	signed char res = 0;
++
++	for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
++		if ((res = *su1 - *su2) != 0)
++			break;
++	return res;
++}
++
++/**
++ * memscan - Find a character in an area of memory.
++ * @addr: The memory area
++ * @c: The byte to search for
++ * @size: The size of the area.
++ *
++ * returns the address of the first occurrence of @c, or 1 byte past
++ * the area if @c is not found
++ */
++void * memscan(void * addr, int c, size_t size)
++{
++	unsigned char * p = (unsigned char *) addr;
++	unsigned char * e = p + size;
++
++	while (p != e) {
++		if (*p == c)
++			return (void *) p;
++		p++;
++	}
++
++	return (void *) p;
++}
++
++/**
++ * strstr - Find the first substring in a %NUL terminated string
++ * @s1: The string to be searched
++ * @s2: The string to search for
++ */
++char * strstr(const char * s1,const char * s2)
++{
++	int l1, l2;
++
++	l2 = strlen(s2);
++	if (!l2)
++		return (char *) s1;
++	l1 = strlen(s1);
++	while (l1 >= l2) {
++		l1--;
++		if (!memcmp(s1,s2,l2))
++			return (char *) s1;
++		s1++;
++	}
++	return NULL;
++}
++
++/**
++ * memchr - Find a character in an area of memory.
++ * @s: The memory area
++ * @c: The byte to search for
++ * @n: The size of the area.
++ *
++ * returns the address of the first occurrence of @c, or %NULL
++ * if @c is not found
++ */
++void *memchr(const void *s, int c, size_t n)
++{
++	const unsigned char *p = s;
++	while (n-- != 0) {
++        	if ((unsigned char)c == *p++) {
++			return (void *)(p-1);
++		}
++	}
++	return NULL;
++}
+diff --git a/arch/mips/zboot/images/Makefile b/arch/mips/zboot/images/Makefile
+new file mode 100644
+index 0000000..d980c29
+--- /dev/null
++++ b/arch/mips/zboot/images/Makefile
+@@ -0,0 +1,12 @@
++STRIPFLAGS := --strip-all
++ifdef CONFIG_32BIT
++vmlinux.gz: $(TOPDIR)/vmlinux
++else
++vmlinux.gz: $(TOPDIR)/vmlinux.32
++endif
++	$(Q)echo "  GZIP   "   vmlinux
++	$(Q)$(OBJCOPY) -O binary $(STRIPFLAGS) $< $(obj)/vmlinux
++	$(Q)gzip -cf $(obj)/vmlinux >$(obj)/$@
++
++clean:
++	rm -f $(obj)/vmlinux.*  $(obj)/zImage.*
+diff --git a/arch/mips/zboot/include/config.h b/arch/mips/zboot/include/config.h
+new file mode 100644
+index 0000000..4bf63fd
+--- /dev/null
++++ b/arch/mips/zboot/include/config.h
+@@ -0,0 +1,8 @@
++#ifndef __CONFIG_H__
++#define __CONFIG_H__
++#include <linux/autoconf.h>
++#ifdef CONFIG_64BIT
++#undef CONFIG_64BIT
++#define CONFIG_32BIT
++#endif
++#endif
+diff --git a/arch/mips/zboot/include/nonstdio.h b/arch/mips/zboot/include/nonstdio.h
+new file mode 100644
+index 0000000..664b838
+--- /dev/null
++++ b/arch/mips/zboot/include/nonstdio.h
+@@ -0,0 +1,18 @@
++/*
++ * Copyright (C) Paul Mackerras 1997.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++typedef int	FILE;
++extern FILE *stdin, *stdout;
++#define NULL	((void *)0)
++#define EOF	(-1)
++#define fopen(n, m)	NULL
++#define fflush(f)	0
++#define fclose(f)	0
++extern char *fgets();
++
++#define perror(s)	printf("%s: no files!\n", (s))
+diff --git a/arch/mips/zboot/include/ns16550.h b/arch/mips/zboot/include/ns16550.h
+new file mode 100644
+index 0000000..eebce89
+--- /dev/null
++++ b/arch/mips/zboot/include/ns16550.h
+@@ -0,0 +1,43 @@
++/*
++ * NS16550 Serial Port
++ */
++
++
++/* Some machines have their uart registers 16 bytes apart.  Most don't.
++ * TODO: Make this work like drivers/char/serial does - Tom */
++#if !defined(UART_REG_PAD)
++#define UART_REG_PAD(x)
++#endif
++
++struct NS16550
++ {
++  unsigned char rbr;  /* 0 */
++  UART_REG_PAD(rbr)
++  unsigned char ier;  /* 1 */
++  UART_REG_PAD(ier)
++  unsigned char fcr;  /* 2 */
++  UART_REG_PAD(fcr)
++  unsigned char lcr;  /* 3 */
++  UART_REG_PAD(lcr)
++  unsigned char mcr;  /* 4 */
++  UART_REG_PAD(mcr)
++  unsigned char lsr;  /* 5 */
++  UART_REG_PAD(lsr)
++  unsigned char msr;  /* 6 */
++  UART_REG_PAD(msr)
++  unsigned char scr;  /* 7 */
++ };
++
++#define thr rbr
++#define iir fcr
++#define dll rbr
++#define dlm ier
++
++#define LSR_DR   0x01  /* Data ready */
++#define LSR_OE   0x02  /* Overrun */
++#define LSR_PE   0x04  /* Parity error */
++#define LSR_FE   0x08  /* Framing error */
++#define LSR_BI   0x10  /* Break */
++#define LSR_THRE 0x20  /* Xmit holding register empty */
++#define LSR_TEMT 0x40  /* Xmitter empty */
++#define LSR_ERR  0x80  /* Error */
+diff --git a/arch/mips/zboot/include/pb1000_serial.h b/arch/mips/zboot/include/pb1000_serial.h
+new file mode 100644
+index 0000000..eb907f8
+--- /dev/null
++++ b/arch/mips/zboot/include/pb1000_serial.h
+@@ -0,0 +1,20 @@
++/*
++ * arch/ppc/boot/include/sandpoint_serial.h
++ * 
++ * Location of the COM ports on Motorola SPS Sandpoint machines
++ *
++ * Author: Mark A. Greer
++ * 	   mgreer@mvista.com
++ *
++ * Copyright 2001 MontaVista Software Inc.
++ *
++ * This program is free software; you can redistribute  it and/or modify it
++ * under  the terms of  the GNU General  Public License as published by the
++ * Free Software Foundation;  either version 2 of the  License, or (at your
++ * option) any later version.
++ */
++
++#define COM1 0xfe0003f8
++#define COM2 0xfe0002f8
++#define COM3 0x00000000		/* No COM3 */
++#define COM4 0x00000000		/* No COM4 */
+diff --git a/arch/mips/zboot/include/zlib.h b/arch/mips/zboot/include/zlib.h
+new file mode 100644
+index 0000000..8e1b48b
+--- /dev/null
++++ b/arch/mips/zboot/include/zlib.h
+@@ -0,0 +1,432 @@
++/*	$Id: zlib.h,v 1.1.1.1 2006/05/08 03:33:28 cpu Exp $	*/
++
++/*
++ * This file is derived from zlib.h and zconf.h from the zlib-0.95
++ * distribution by Jean-loup Gailly and Mark Adler, with some additions
++ * by Paul Mackerras to aid in implementing Deflate compression and
++ * decompression for PPP packets.
++ */
++
++/*
++ *  ==FILEVERSION 960122==
++ *
++ * This marker is used by the Linux installation script to determine
++ * whether an up-to-date version of this file is already installed.
++ */
++
++/* zlib.h -- interface of the 'zlib' general purpose compression library
++  version 0.95, Aug 16th, 1995.
++
++  Copyright (C) 1995 Jean-loup Gailly and Mark Adler
++
++  This software is provided 'as-is', without any express or implied
++  warranty.  In no event will the authors be held liable for any damages
++  arising from the use of this software.
++
++  Permission is granted to anyone to use this software for any purpose,
++  including commercial applications, and to alter it and redistribute it
++  freely, subject to the following restrictions:
++
++  1. The origin of this software must not be misrepresented; you must not
++     claim that you wrote the original software. If you use this software
++     in a product, an acknowledgment in the product documentation would be
++     appreciated but is not required.
++  2. Altered source versions must be plainly marked as such, and must not be
++     misrepresented as being the original software.
++  3. This notice may not be removed or altered from any source distribution.
++
++  Jean-loup Gailly        Mark Adler
++  gzip@prep.ai.mit.edu    madler@alumni.caltech.edu
++ */
++
++#ifndef _ZLIB_H
++#define _ZLIB_H
++
++/* #include "zconf.h" */	/* included directly here */
++
++/* zconf.h -- configuration of the zlib compression library
++ * Copyright (C) 1995 Jean-loup Gailly.
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* From: zconf.h,v 1.12 1995/05/03 17:27:12 jloup Exp */
++
++/*
++     The library does not install any signal handler. It is recommended to
++  add at least a handler for SIGSEGV when decompressing; the library checks
++  the consistency of the input data whenever possible but may go nuts
++  for some forms of corrupted input.
++ */
++
++/*
++ * Compile with -DMAXSEG_64K if the alloc function cannot allocate more
++ * than 64k bytes at a time (needed on systems with 16-bit int).
++ * Compile with -DUNALIGNED_OK if it is OK to access shorts or ints
++ * at addresses which are not a multiple of their size.
++ * Under DOS, -DFAR=far or -DFAR=__far may be needed.
++ */
++
++#ifndef STDC
++#  if defined(MSDOS) || defined(__STDC__) || defined(__cplusplus)
++#    define STDC
++#  endif
++#endif
++
++#ifdef	__MWERKS__ /* Metrowerks CodeWarrior declares fileno() in unix.h */
++#  include <unix.h>
++#endif
++
++/* Maximum value for memLevel in deflateInit2 */
++#ifndef MAX_MEM_LEVEL
++#  ifdef MAXSEG_64K
++#    define MAX_MEM_LEVEL 8
++#  else
++#    define MAX_MEM_LEVEL 9
++#  endif
++#endif
++
++#ifndef FAR
++#  define FAR
++#endif
++
++/* Maximum value for windowBits in deflateInit2 and inflateInit2 */
++#ifndef MAX_WBITS
++#  define MAX_WBITS   15 /* 32K LZ77 window */
++#endif
++
++/* The memory requirements for deflate are (in bytes):
++            1 << (windowBits+2)   +  1 << (memLevel+9)
++ that is: 128K for windowBits=15  +  128K for memLevel = 8  (default values)
++ plus a few kilobytes for small objects. For example, if you want to reduce
++ the default memory requirements from 256K to 128K, compile with
++     make CFLAGS="-O -DMAX_WBITS=14 -DMAX_MEM_LEVEL=7"
++ Of course this will generally degrade compression (there's no free lunch).
++
++   The memory requirements for inflate are (in bytes) 1 << windowBits
++ that is, 32K for windowBits=15 (default value) plus a few kilobytes
++ for small objects.
++*/
++
++                        /* Type declarations */
++
++#ifndef OF /* function prototypes */
++#  ifdef STDC
++#    define OF(args)  args
++#  else
++#    define OF(args)  ()
++#  endif
++#endif
++
++typedef unsigned char  Byte;  /* 8 bits */
++typedef unsigned int   uInt;  /* 16 bits or more */
++typedef unsigned long  uLong; /* 32 bits or more */
++
++typedef Byte FAR Bytef;
++typedef char FAR charf;
++typedef int FAR intf;
++typedef uInt FAR uIntf;
++typedef uLong FAR uLongf;
++
++#ifdef STDC
++   typedef void FAR *voidpf;
++   typedef void     *voidp;
++#else
++   typedef Byte FAR *voidpf;
++   typedef Byte     *voidp;
++#endif
++
++/* end of original zconf.h */
++
++#define ZLIB_VERSION "0.95P"
++
++/* 
++     The 'zlib' compression library provides in-memory compression and
++  decompression functions, including integrity checks of the uncompressed
++  data.  This version of the library supports only one compression method
++  (deflation) but other algorithms may be added later and will have the same
++  stream interface.
++
++     For compression the application must provide the output buffer and
++  may optionally provide the input buffer for optimization. For decompression,
++  the application must provide the input buffer and may optionally provide
++  the output buffer for optimization.
++
++     Compression can be done in a single step if the buffers are large
++  enough (for example if an input file is mmap'ed), or can be done by
++  repeated calls of the compression function.  In the latter case, the
++  application must provide more input and/or consume the output
++  (providing more output space) before each call.
++*/
++
++typedef voidpf (*alloc_func) OF((voidpf opaque, uInt items, uInt size));
++typedef void   (*free_func)  OF((voidpf opaque, voidpf address, uInt nbytes));
++
++struct internal_state;
++
++typedef struct z_stream_s {
++    Bytef    *next_in;  /* next input byte */
++    uInt     avail_in;  /* number of bytes available at next_in */
++    uLong    total_in;  /* total nb of input bytes read so far */
++
++    Bytef    *next_out; /* next output byte should be put there */
++    uInt     avail_out; /* remaining free space at next_out */
++    uLong    total_out; /* total nb of bytes output so far */
++
++    char     *msg;      /* last error message, NULL if no error */
++    struct internal_state FAR *state; /* not visible by applications */
++
++    alloc_func zalloc;  /* used to allocate the internal state */
++    free_func  zfree;   /* used to free the internal state */
++    voidp      opaque;  /* private data object passed to zalloc and zfree */
++
++    Byte     data_type; /* best guess about the data type: ascii or binary */
++
++} z_stream;
++
++/*
++   The application must update next_in and avail_in when avail_in has
++   dropped to zero. It must update next_out and avail_out when avail_out
++   has dropped to zero. The application must initialize zalloc, zfree and
++   opaque before calling the init function. All other fields are set by the
++   compression library and must not be updated by the application.
++
++   The opaque value provided by the application will be passed as the first
++   parameter for calls of zalloc and zfree. This can be useful for custom
++   memory management. The compression library attaches no meaning to the
++   opaque value.
++
++   zalloc must return Z_NULL if there is not enough memory for the object.
++   On 16-bit systems, the functions zalloc and zfree must be able to allocate
++   exactly 65536 bytes, but will not be required to allocate more than this
++   if the symbol MAXSEG_64K is defined (see zconf.h). WARNING: On MSDOS,
++   pointers returned by zalloc for objects of exactly 65536 bytes *must*
++   have their offset normalized to zero. The default allocation function
++   provided by this library ensures this (see zutil.c). To reduce memory
++   requirements and avoid any allocation of 64K objects, at the expense of
++   compression ratio, compile the library with -DMAX_WBITS=14 (see zconf.h).
++
++   The fields total_in and total_out can be used for statistics or
++   progress reports. After compression, total_in holds the total size of
++   the uncompressed data and may be saved for use in the decompressor
++   (particularly if the decompressor wants to decompress everything in
++   a single step).
++*/
++
++                        /* constants */
++
++#define Z_NO_FLUSH      0
++#define Z_PARTIAL_FLUSH 1
++#define Z_FULL_FLUSH    2
++#define Z_SYNC_FLUSH    3 /* experimental: partial_flush + byte align */
++#define Z_FINISH        4
++#define Z_PACKET_FLUSH	5
++/* See deflate() below for the usage of these constants */
++
++#define Z_OK            0
++#define Z_STREAM_END    1
++#define Z_ERRNO        (-1)
++#define Z_STREAM_ERROR (-2)
++#define Z_DATA_ERROR   (-3)
++#define Z_MEM_ERROR    (-4)
++#define Z_BUF_ERROR    (-5)
++/* error codes for the compression/decompression functions */
++
++#define Z_BEST_SPEED             1
++#define Z_BEST_COMPRESSION       9
++#define Z_DEFAULT_COMPRESSION  (-1)
++/* compression levels */
++
++#define Z_FILTERED            1
++#define Z_HUFFMAN_ONLY        2
++#define Z_DEFAULT_STRATEGY    0
++
++#define Z_BINARY   0
++#define Z_ASCII    1
++#define Z_UNKNOWN  2
++/* Used to set the data_type field */
++
++#define Z_NULL  0  /* for initializing zalloc, zfree, opaque */
++
++extern char *zlib_version;
++/* The application can compare zlib_version and ZLIB_VERSION for consistency.
++   If the first character differs, the library code actually used is
++   not compatible with the zlib.h header file used by the application.
++ */
++
++                        /* basic functions */
++
++extern int inflateInit OF((z_stream *strm));
++/* 
++     Initializes the internal stream state for decompression. The fields
++   zalloc and zfree must be initialized before by the caller.  If zalloc and
++   zfree are set to Z_NULL, inflateInit updates them to use default allocation
++   functions.
++
++     inflateInit returns Z_OK if success, Z_MEM_ERROR if there was not
++   enough memory.  msg is set to null if there is no error message.
++   inflateInit does not perform any decompression: this will be done by
++   inflate().
++*/
++
++
++extern int inflate OF((z_stream *strm, int flush));
++/*
++  Performs one or both of the following actions:
++
++  - Decompress more input starting at next_in and update next_in and avail_in
++    accordingly. If not all input can be processed (because there is not
++    enough room in the output buffer), next_in is updated and processing
++    will resume at this point for the next call of inflate().
++
++  - Provide more output starting at next_out and update next_out and avail_out
++    accordingly.  inflate() always provides as much output as possible
++    (until there is no more input data or no more space in the output buffer).
++
++  Before the call of inflate(), the application should ensure that at least
++  one of the actions is possible, by providing more input and/or consuming
++  more output, and updating the next_* and avail_* values accordingly.
++  The application can consume the uncompressed output when it wants, for
++  example when the output buffer is full (avail_out == 0), or after each
++  call of inflate().
++
++    If the parameter flush is set to Z_PARTIAL_FLUSH or Z_PACKET_FLUSH,
++  inflate flushes as much output as possible to the output buffer. The
++  flushing behavior of inflate is not specified for values of the flush
++  parameter other than Z_PARTIAL_FLUSH, Z_PACKET_FLUSH or Z_FINISH, but the
++  current implementation actually flushes as much output as possible
++  anyway.  For Z_PACKET_FLUSH, inflate checks that once all the input data
++  has been consumed, it is expecting to see the length field of a stored
++  block; if not, it returns Z_DATA_ERROR.
++
++    inflate() should normally be called until it returns Z_STREAM_END or an
++  error. However if all decompression is to be performed in a single step
++  (a single call of inflate), the parameter flush should be set to
++  Z_FINISH. In this case all pending input is processed and all pending
++  output is flushed; avail_out must be large enough to hold all the
++  uncompressed data. (The size of the uncompressed data may have been saved
++  by the compressor for this purpose.) The next operation on this stream must
++  be inflateEnd to deallocate the decompression state. The use of Z_FINISH
++  is never required, but can be used to inform inflate that a faster routine
++  may be used for the single inflate() call.
++
++    inflate() returns Z_OK if some progress has been made (more input
++  processed or more output produced), Z_STREAM_END if the end of the
++  compressed data has been reached and all uncompressed output has been
++  produced, Z_DATA_ERROR if the input data was corrupted, Z_STREAM_ERROR if
++  the stream structure was inconsistent (for example if next_in or next_out
++  was NULL), Z_MEM_ERROR if there was not enough memory, Z_BUF_ERROR if no
++  progress is possible or if there was not enough room in the output buffer
++  when Z_FINISH is used. In the Z_DATA_ERROR case, the application may then
++  call inflateSync to look for a good compression block.  */
++
++
++extern int inflateEnd OF((z_stream *strm));
++/*
++     All dynamically allocated data structures for this stream are freed.
++   This function discards any unprocessed input and does not flush any
++   pending output.
++
++     inflateEnd returns Z_OK if success, Z_STREAM_ERROR if the stream state
++   was inconsistent. In the error case, msg may be set but then points to a
++   static string (which must not be deallocated).
++*/
++
++                        /* advanced functions */
++
++extern int inflateInit2 OF((z_stream *strm,
++                            int  windowBits));
++/*   
++     This is another version of inflateInit with more compression options. The
++   fields next_out, zalloc and zfree must be initialized before by the caller.
++
++     The windowBits parameter is the base two logarithm of the maximum window
++   size (the size of the history buffer).  It should be in the range 8..15 for
++   this version of the library (the value 16 will be allowed soon). The
++   default value is 15 if inflateInit is used instead. If a compressed stream
++   with a larger window size is given as input, inflate() will return with
++   the error code Z_DATA_ERROR instead of trying to allocate a larger window.
++
++     If next_out is not null, the library will use this buffer for the history
++   buffer; the buffer must either be large enough to hold the entire output
++   data, or have at least 1<<windowBits bytes.  If next_out is null, the
++   library will allocate its own buffer (and leave next_out null). next_in
++   need not be provided here but must be provided by the application for the
++   next call of inflate().
++
++     If the history buffer is provided by the application, next_out must
++   never be changed by the application since the decompressor maintains
++   history information inside this buffer from call to call; the application
++   can only reset next_out to the beginning of the history buffer when
++   avail_out is zero and all output has been consumed.
++
++      inflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was
++   not enough memory, Z_STREAM_ERROR if a parameter is invalid (such as
++   windowBits < 8). msg is set to null if there is no error message.
++   inflateInit2 does not perform any decompression: this will be done by
++   inflate().
++*/
++
++extern int inflateSync OF((z_stream *strm));
++/* 
++    Skips invalid compressed data until the special marker (see deflate()
++  above) can be found, or until all available input is skipped. No output
++  is provided.
++
++    inflateSync returns Z_OK if the special marker has been found, Z_BUF_ERROR
++  if no more input was provided, Z_DATA_ERROR if no marker has been found,
++  or Z_STREAM_ERROR if the stream structure was inconsistent. In the success
++  case, the application may save the current current value of total_in which
++  indicates where valid compressed data was found. In the error case, the
++  application may repeatedly call inflateSync, providing more input each time,
++  until success or end of the input data.
++*/
++
++extern int inflateReset OF((z_stream *strm));
++/*
++     This function is equivalent to inflateEnd followed by inflateInit,
++   but does not free and reallocate all the internal decompression state.
++   The stream will keep attributes that may have been set by inflateInit2.
++
++      inflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source
++   stream state was inconsistent (such as zalloc or state being NULL).
++*/
++
++extern int inflateIncomp OF((z_stream *strm));
++/*
++     This function adds the data at next_in (avail_in bytes) to the output
++   history without performing any output.  There must be no pending output,
++   and the decompressor must be expecting to see the start of a block.
++   Calling this function is equivalent to decompressing a stored block
++   containing the data at next_in (except that the data is not output).
++*/
++
++                        /* checksum functions */
++
++/*
++     This function is not related to compression but is exported
++   anyway because it might be useful in applications using the
++   compression library.
++*/
++
++extern uLong adler32 OF((uLong adler, Bytef *buf, uInt len));
++
++/*
++     Update a running Adler-32 checksum with the bytes buf[0..len-1] and
++   return the updated checksum. If buf is NULL, this function returns
++   the required initial value for the checksum.
++   An Adler-32 checksum is almost as reliable as a CRC32 but can be computed
++   much faster. Usage example:
++
++     uLong adler = adler32(0L, Z_NULL, 0);
++
++     while (read_buffer(buffer, length) != EOF) {
++       adler = adler32(adler, buffer, length);
++     }
++     if (adler != original_adler) error();
++*/
++
++#ifndef _Z_UTIL_H
++    struct internal_state {int dummy;}; /* hack for buggy compilers */
++#endif
++
++#endif /* _ZLIB_H */
+diff --git a/arch/mips/zboot/ld.script b/arch/mips/zboot/ld.script
+new file mode 100644
+index 0000000..6834c5c
+--- /dev/null
++++ b/arch/mips/zboot/ld.script
+@@ -0,0 +1,151 @@
++OUTPUT_ARCH(mips)
++ENTRY(start)
++SECTIONS
++{
++  /* Read-only sections, merged into text segment: */
++  /* . = 0x81000000; */
++  .init          : { *(.init)		} =0
++  .text      :
++  {
++    _ftext = . ;
++    *(.text)
++    *(.rodata)
++    *(.rodata1)
++    /* .gnu.warning sections are handled specially by elf32.em.  */
++    *(.gnu.warning)
++  } =0
++  .kstrtab : { *(.kstrtab) }
++
++  . = ALIGN(16);		/* Exception table */
++  __start___ex_table = .;
++  __ex_table : { *(__ex_table) }
++  __stop___ex_table = .;
++
++  __start___dbe_table = .;	/* Exception table for data bus errors */
++  __dbe_table : { *(__dbe_table) }
++  __stop___dbe_table = .;
++
++  __start___ksymtab = .;	/* Kernel symbol table */
++  __ksymtab : { *(__ksymtab) }
++  __stop___ksymtab = .;
++
++  _etext = .;
++
++  . = ALIGN(8192);
++  .data.init_task : { *(.data.init_task) }
++
++  /* Startup code */
++  . = ALIGN(4096);
++  __init_begin = .;
++  .text.init : { *(.text.init) }
++  .data.init : { *(.data.init) }
++  . = ALIGN(16);
++  __setup_start = .;
++  .setup.init : { *(.setup.init) }
++  __setup_end = .;
++  __initcall_start = .;
++  .initcall.init : { *(.initcall.init) }
++  __initcall_end = .;
++  . = ALIGN(4096);	/* Align double page for init_task_union */
++  __init_end = .;
++
++  . = ALIGN(4096);
++  .data.page_aligned : { *(.data.idt) }
++
++  . = ALIGN(32);
++  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
++
++  .fini      : { *(.fini)    } =0
++  .reginfo : { *(.reginfo) }
++  /* Adjust the address for the data segment.  We want to adjust up to
++     the same address within the page on the next page up.  It would
++     be more correct to do this:
++       . = .;
++     The current expression does not correctly handle the case of a
++     text segment ending precisely at the end of a page; it causes the
++     data segment to skip a page.  The above expression does not have
++     this problem, but it will currently (2/95) cause BFD to allocate
++     a single segment, combining both text and data, for this case.
++     This will prevent the text segment from being shared among
++     multiple executions of the program; I think that is more
++     important than losing a page of the virtual address space (note
++     that no actual memory is lost; the page which is skipped can not
++     be referenced).  */
++  . = .;
++  .data    :
++  {
++    _fdata = . ;
++    *(.data)
++
++   /* Put the compressed image here, so bss is on the end. */
++   __image_begin = .;
++   *(.image)
++   __image_end = .;
++   /* Align the initial ramdisk image (INITRD) on page boundaries. */
++   . = ALIGN(4096);
++   __ramdisk_begin = .;
++   *(.initrd)
++   __ramdisk_end = .;
++   . = ALIGN(4096);
++
++    CONSTRUCTORS
++  }
++  .data1   : { *(.data1) }
++  _gp = . + 0x8000;
++  .lit8 : { *(.lit8) }
++  .lit4 : { *(.lit4) }
++  .ctors         : { *(.ctors)   }
++  .dtors         : { *(.dtors)   }
++  .got           : { *(.got.plt) *(.got) }
++  .dynamic       : { *(.dynamic) }
++  /* We want the small data sections together, so single-instruction offsets
++     can access them all, and initialized data all before uninitialized, so
++     we can shorten the on-disk segment size.  */
++  .sdata     : { *(.sdata) }
++  . = ALIGN(4);
++  _edata  =  .;
++  PROVIDE (edata = .);
++
++  __bss_start = .;
++  _fbss = .;
++  .sbss      : { *(.sbss) *(.scommon) }
++  .bss       :
++  {
++   *(.dynbss)
++   *(.bss)
++   *(COMMON)
++   .  = ALIGN(4);
++  _end = . ;
++  PROVIDE (end = .);
++  }
++
++  /* Sections to be discarded */
++  /DISCARD/ :
++  {
++        *(.text.exit)
++        *(.data.exit)
++        *(.exitcall.exit)
++  }
++
++  /* This is the MIPS specific mdebug section.  */
++  .mdebug : { *(.mdebug) }
++  /* These are needed for ELF backends which have not yet been
++     converted to the new style linker.  */
++  .stab 0 : { *(.stab) }
++  .stabstr 0 : { *(.stabstr) }
++  /* DWARF debug sections.
++     Symbols in the .debug DWARF section are relative to the beginning of the
++     section so we begin .debug at 0.  It's not clear yet what needs to happen
++     for the others.   */
++  .debug          0 : { *(.debug) }
++  .debug_srcinfo  0 : { *(.debug_srcinfo) }
++  .debug_aranges  0 : { *(.debug_aranges) }
++  .debug_pubnames 0 : { *(.debug_pubnames) }
++  .debug_sfnames  0 : { *(.debug_sfnames) }
++  .line           0 : { *(.line) }
++  /* These must appear regardless of  .  */
++  .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
++  .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
++  .comment : { *(.comment) }
++  .note : { *(.note) }
++}
+diff --git a/arch/mips/zboot/lib/Makefile b/arch/mips/zboot/lib/Makefile
+new file mode 100644
+index 0000000..3990c17
+--- /dev/null
++++ b/arch/mips/zboot/lib/Makefile
+@@ -0,0 +1,6 @@
++#
++# Makefile for some libs needed by zImage.
++#
++
++zlib.o: zlib.c
++	$(CC) $(CFLAGS) -o $@ $<
+diff --git a/arch/mips/zboot/lib/zlib.c b/arch/mips/zboot/lib/zlib.c
+new file mode 100644
+index 0000000..ee676cd
+--- /dev/null
++++ b/arch/mips/zboot/lib/zlib.c
+@@ -0,0 +1,2147 @@
++/*
++ * This file is derived from various .h and .c files from the zlib-0.95
++ * distribution by Jean-loup Gailly and Mark Adler, with some additions
++ * by Paul Mackerras to aid in implementing Deflate compression and
++ * decompression for PPP packets.  See zlib.h for conditions of
++ * distribution and use.
++ *
++ * Changes that have been made include:
++ * - changed functions not used outside this file to "local"
++ * - added minCompression parameter to deflateInit2
++ * - added Z_PACKET_FLUSH (see zlib.h for details)
++ * - added inflateIncomp
++ *
++ * $Id: zlib.c,v 1.1.1.1 2006/05/08 03:33:28 cpu Exp $
++ */
++
++/*+++++*/
++/* zutil.h -- internal interface and configuration of the compression library
++ * Copyright (C) 1995 Jean-loup Gailly.
++ * For conditions of distribution and use, see copyright notice in zlib.h
++ */
++
++/* WARNING: this file should *not* be used by applications. It is
++   part of the implementation of the compression library and is
++   subject to change. Applications should only use zlib.h.
++ */
++
++/* From: zutil.h,v 1.9 1995/05/03 17:27:12 jloup Exp */
++
++#define _Z_UTIL_H
++
++#include "zlib.h"
++
++#ifndef local
++#  define local static
++#endif
++/* compile with -Dlocal if your debugger can't find static symbols */
++
++#define FAR
++
++typedef unsigned char  uch;
++typedef uch FAR uchf;
++typedef unsigned short ush;
++typedef ush FAR ushf;
++typedef unsigned long  ulg;
++
++extern char *z_errmsg[]; /* indexed by 1-zlib_error */
++
++#define ERR_RETURN(strm,err) return (strm->msg=z_errmsg[1-err], err)
++/* To be used only when the state is known to be valid */
++
++#ifndef NULL
++#define NULL	((void *) 0)
++#endif
++
++        /* common constants */
++
++#define DEFLATED   8
++
++#ifndef DEF_WBITS
++#  define DEF_WBITS MAX_WBITS
++#endif
++/* default windowBits for decompression. MAX_WBITS is for compression only */
++
++#if MAX_MEM_LEVEL >= 8
++#  define DEF_MEM_LEVEL 8
++#else
++#  define DEF_MEM_LEVEL  MAX_MEM_LEVEL
++#endif
++/* default memLevel */
++
++#define STORED_BLOCK 0
++#define STATIC_TREES 1
++#define DYN_TREES    2
++/* The three kinds of block type */
++
++#define MIN_MATCH  3
++#define MAX_MATCH  258
++/* The minimum and maximum match lengths */
++
++         /* functions */
++
++#include <linux/string.h>
++#define zmemcpy memcpy
++#define zmemzero(dest, len)	memset(dest, 0, len)
++
++/* Diagnostic functions */
++#ifdef DEBUG_ZLIB
++#  include <stdio.h>
++#  ifndef verbose
++#    define verbose 0
++#  endif
++#  define Assert(cond,msg) {if(!(cond)) z_error(msg);}
++#  define Trace(x) fprintf x
++#  define Tracev(x) {if (verbose) fprintf x ;}
++#  define Tracevv(x) {if (verbose>1) fprintf x ;}
++#  define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
++#  define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
++#else
++#  define Assert(cond,msg)
++#  define Trace(x)
++#  define Tracev(x)
++#  define Tracevv(x)
++#  define Tracec(c,x)
++#  define Tracecv(c,x)
++#endif
++
++
++typedef uLong (*check_func) OF((uLong check, Bytef *buf, uInt len));
++
++/* voidpf zcalloc OF((voidpf opaque, unsigned items, unsigned size)); */
++/* void   zcfree  OF((voidpf opaque, voidpf ptr)); */
++
++#define ZALLOC(strm, items, size) \
++           (*((strm)->zalloc))((strm)->opaque, (items), (size))
++#define ZFREE(strm, addr, size)	\
++	   (*((strm)->zfree))((strm)->opaque, (voidpf)(addr), (size))
++#define TRY_FREE(s, p, n) {if (p) ZFREE(s, p, n);}
++
++/* deflate.h -- internal compression state
++ * Copyright (C) 1995 Jean-loup Gailly
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* WARNING: this file should *not* be used by applications. It is
++   part of the implementation of the compression library and is
++   subject to change. Applications should only use zlib.h.
++ */
++
++/*+++++*/
++/* infblock.h -- header to use infblock.c
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* WARNING: this file should *not* be used by applications. It is
++   part of the implementation of the compression library and is
++   subject to change. Applications should only use zlib.h.
++ */
++
++struct inflate_blocks_state;
++typedef struct inflate_blocks_state FAR inflate_blocks_statef;
++
++local inflate_blocks_statef * inflate_blocks_new OF((
++    z_stream *z,
++    check_func c,               /* check function */
++    uInt w));                   /* window size */
++
++local int inflate_blocks OF((
++    inflate_blocks_statef *,
++    z_stream *,
++    int));                      /* initial return code */
++
++local void inflate_blocks_reset OF((
++    inflate_blocks_statef *,
++    z_stream *,
++    uLongf *));                  /* check value on output */
++
++local int inflate_blocks_free OF((
++    inflate_blocks_statef *,
++    z_stream *,
++    uLongf *));                  /* check value on output */
++
++local int inflate_addhistory OF((
++    inflate_blocks_statef *,
++    z_stream *));
++
++local int inflate_packet_flush OF((
++    inflate_blocks_statef *));
++
++/*+++++*/
++/* inftrees.h -- header to use inftrees.c
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* WARNING: this file should *not* be used by applications. It is
++   part of the implementation of the compression library and is
++   subject to change. Applications should only use zlib.h.
++ */
++
++/* Huffman code lookup table entry--this entry is four bytes for machines
++   that have 16-bit pointers (e.g. PC's in the small or medium model). */
++
++typedef struct inflate_huft_s FAR inflate_huft;
++
++struct inflate_huft_s {
++  union {
++    struct {
++      Byte Exop;        /* number of extra bits or operation */
++      Byte Bits;        /* number of bits in this code or subcode */
++    } what;
++    uInt Nalloc;	/* number of these allocated here */
++    Bytef *pad;         /* pad structure to a power of 2 (4 bytes for */
++  } word;               /*  16-bit, 8 bytes for 32-bit machines) */
++  union {
++    uInt Base;          /* literal, length base, or distance base */
++    inflate_huft *Next; /* pointer to next level of table */
++  } more;
++};
++
++#ifdef DEBUG_ZLIB
++  local uInt inflate_hufts;
++#endif
++
++local int inflate_trees_bits OF((
++    uIntf *,                    /* 19 code lengths */
++    uIntf *,                    /* bits tree desired/actual depth */
++    inflate_huft * FAR *,       /* bits tree result */
++    z_stream *));               /* for zalloc, zfree functions */
++
++local int inflate_trees_dynamic OF((
++    uInt,                       /* number of literal/length codes */
++    uInt,                       /* number of distance codes */
++    uIntf *,                    /* that many (total) code lengths */
++    uIntf *,                    /* literal desired/actual bit depth */
++    uIntf *,                    /* distance desired/actual bit depth */
++    inflate_huft * FAR *,       /* literal/length tree result */
++    inflate_huft * FAR *,       /* distance tree result */
++    z_stream *));               /* for zalloc, zfree functions */
++
++local int inflate_trees_fixed OF((
++    uIntf *,                    /* literal desired/actual bit depth */
++    uIntf *,                    /* distance desired/actual bit depth */
++    inflate_huft * FAR *,       /* literal/length tree result */
++    inflate_huft * FAR *));     /* distance tree result */
++
++local int inflate_trees_free OF((
++    inflate_huft *,             /* tables to free */
++    z_stream *));               /* for zfree function */
++
++
++/*+++++*/
++/* infcodes.h -- header to use infcodes.c
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* WARNING: this file should *not* be used by applications. It is
++   part of the implementation of the compression library and is
++   subject to change. Applications should only use zlib.h.
++ */
++
++struct inflate_codes_state;
++typedef struct inflate_codes_state FAR inflate_codes_statef;
++
++local inflate_codes_statef *inflate_codes_new OF((
++    uInt, uInt,
++    inflate_huft *, inflate_huft *,
++    z_stream *));
++
++local int inflate_codes OF((
++    inflate_blocks_statef *,
++    z_stream *,
++    int));
++
++local void inflate_codes_free OF((
++    inflate_codes_statef *,
++    z_stream *));
++
++
++/*+++++*/
++/* inflate.c -- zlib interface to inflate modules
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* inflate private state */
++struct internal_state {
++
++  /* mode */
++  enum {
++      METHOD,   /* waiting for method byte */
++      FLAG,     /* waiting for flag byte */
++      BLOCKS,   /* decompressing blocks */
++      CHECK4,   /* four check bytes to go */
++      CHECK3,   /* three check bytes to go */
++      CHECK2,   /* two check bytes to go */
++      CHECK1,   /* one check byte to go */
++      DONE,     /* finished check, done */
++      BAD}      /* got an error--stay here */
++    mode;               /* current inflate mode */
++
++  /* mode dependent information */
++  union {
++    uInt method;        /* if FLAGS, method byte */
++    struct {
++      uLong was;                /* computed check value */
++      uLong need;               /* stream check value */
++    } check;            /* if CHECK, check values to compare */
++    uInt marker;        /* if BAD, inflateSync's marker bytes count */
++  } sub;        /* submode */
++
++  /* mode independent information */
++  int  nowrap;          /* flag for no wrapper */
++  uInt wbits;           /* log2(window size)  (8..15, defaults to 15) */
++  inflate_blocks_statef 
++    *blocks;            /* current inflate_blocks state */
++
++};
++
++
++int inflateReset(z)
++z_stream *z;
++{
++  uLong c;
++
++  if (z == Z_NULL || z->state == Z_NULL)
++    return Z_STREAM_ERROR;
++  z->total_in = z->total_out = 0;
++  z->msg = Z_NULL;
++  z->state->mode = z->state->nowrap ? BLOCKS : METHOD;
++  inflate_blocks_reset(z->state->blocks, z, &c);
++  Trace((stderr, "inflate: reset\n"));
++  return Z_OK;
++}
++
++
++int inflateEnd(z)
++z_stream *z;
++{
++  uLong c;
++
++  if (z == Z_NULL || z->state == Z_NULL || z->zfree == Z_NULL)
++    return Z_STREAM_ERROR;
++  if (z->state->blocks != Z_NULL)
++    inflate_blocks_free(z->state->blocks, z, &c);
++  ZFREE(z, z->state, sizeof(struct internal_state));
++  z->state = Z_NULL;
++  Trace((stderr, "inflate: end\n"));
++  return Z_OK;
++}
++
++
++int inflateInit2(z, w)
++z_stream *z;
++int w;
++{
++  /* initialize state */
++  if (z == Z_NULL)
++    return Z_STREAM_ERROR;
++/*  if (z->zalloc == Z_NULL) z->zalloc = zcalloc; */
++/*  if (z->zfree == Z_NULL) z->zfree = zcfree; */
++  if ((z->state = (struct internal_state FAR *)
++       ZALLOC(z,1,sizeof(struct internal_state))) == Z_NULL)
++    return Z_MEM_ERROR;
++  z->state->blocks = Z_NULL;
++
++  /* handle undocumented nowrap option (no zlib header or check) */
++  z->state->nowrap = 0;
++  if (w < 0)
++  {
++    w = - w;
++    z->state->nowrap = 1;
++  }
++
++  /* set window size */
++  if (w < 8 || w > 15)
++  {
++    inflateEnd(z);
++    return Z_STREAM_ERROR;
++  }
++  z->state->wbits = (uInt)w;
++
++  /* create inflate_blocks state */
++  if ((z->state->blocks =
++       inflate_blocks_new(z, z->state->nowrap ? Z_NULL : adler32, 1 << w))
++      == Z_NULL)
++  {
++    inflateEnd(z);
++    return Z_MEM_ERROR;
++  }
++  Trace((stderr, "inflate: allocated\n"));
++
++  /* reset state */
++  inflateReset(z);
++  return Z_OK;
++}
++
++
++int inflateInit(z)
++z_stream *z;
++{
++  return inflateInit2(z, DEF_WBITS);
++}
++
++
++#define NEEDBYTE {if(z->avail_in==0)goto empty;r=Z_OK;}
++#define NEXTBYTE (z->avail_in--,z->total_in++,*z->next_in++)
++
++int inflate(z, f)
++z_stream *z;
++int f;
++{
++  int r;
++  uInt b;
++
++  if (z == Z_NULL || z->next_in == Z_NULL)
++    return Z_STREAM_ERROR;
++  r = Z_BUF_ERROR;
++  while (1) switch (z->state->mode)
++  {
++    case METHOD:
++      NEEDBYTE
++      if (((z->state->sub.method = NEXTBYTE) & 0xf) != DEFLATED)
++      {
++        z->state->mode = BAD;
++        z->msg = "unknown compression method";
++        z->state->sub.marker = 5;       /* can't try inflateSync */
++        break;
++      }
++      if ((z->state->sub.method >> 4) + 8 > z->state->wbits)
++      {
++        z->state->mode = BAD;
++        z->msg = "invalid window size";
++        z->state->sub.marker = 5;       /* can't try inflateSync */
++        break;
++      }
++      z->state->mode = FLAG;
++    case FLAG:
++      NEEDBYTE
++      if ((b = NEXTBYTE) & 0x20)
++      {
++        z->state->mode = BAD;
++        z->msg = "invalid reserved bit";
++        z->state->sub.marker = 5;       /* can't try inflateSync */
++        break;
++      }
++      if (((z->state->sub.method << 8) + b) % 31)
++      {
++        z->state->mode = BAD;
++        z->msg = "incorrect header check";
++        z->state->sub.marker = 5;       /* can't try inflateSync */
++        break;
++      }
++      Trace((stderr, "inflate: zlib header ok\n"));
++      z->state->mode = BLOCKS;
++    case BLOCKS:
++      r = inflate_blocks(z->state->blocks, z, r);
++      if (f == Z_PACKET_FLUSH && z->avail_in == 0 && z->avail_out != 0)
++	  r = inflate_packet_flush(z->state->blocks);
++      if (r == Z_DATA_ERROR)
++      {
++        z->state->mode = BAD;
++        z->state->sub.marker = 0;       /* can try inflateSync */
++        break;
++      }
++      if (r != Z_STREAM_END)
++        return r;
++      r = Z_OK;
++      inflate_blocks_reset(z->state->blocks, z, &z->state->sub.check.was);
++      if (z->state->nowrap)
++      {
++        z->state->mode = DONE;
++        break;
++      }
++      z->state->mode = CHECK4;
++    case CHECK4:
++      NEEDBYTE
++      z->state->sub.check.need = (uLong)NEXTBYTE << 24;
++      z->state->mode = CHECK3;
++    case CHECK3:
++      NEEDBYTE
++      z->state->sub.check.need += (uLong)NEXTBYTE << 16;
++      z->state->mode = CHECK2;
++    case CHECK2:
++      NEEDBYTE
++      z->state->sub.check.need += (uLong)NEXTBYTE << 8;
++      z->state->mode = CHECK1;
++    case CHECK1:
++      NEEDBYTE
++      z->state->sub.check.need += (uLong)NEXTBYTE;
++
++      if (z->state->sub.check.was != z->state->sub.check.need)
++      {
++        z->state->mode = BAD;
++        z->msg = "incorrect data check";
++        z->state->sub.marker = 5;       /* can't try inflateSync */
++        break;
++      }
++      Trace((stderr, "inflate: zlib check ok\n"));
++      z->state->mode = DONE;
++    case DONE:
++      return Z_STREAM_END;
++    case BAD:
++      return Z_DATA_ERROR;
++    default:
++      return Z_STREAM_ERROR;
++  }
++
++ empty:
++  if (f != Z_PACKET_FLUSH)
++    return r;
++  z->state->mode = BAD;
++  z->state->sub.marker = 0;       /* can try inflateSync */
++  return Z_DATA_ERROR;
++}
++
++/*
++ * This subroutine adds the data at next_in/avail_in to the output history
++ * without performing any output.  The output buffer must be "caught up";
++ * i.e. no pending output (hence s->read equals s->write), and the state must
++ * be BLOCKS (i.e. we should be willing to see the start of a series of
++ * BLOCKS).  On exit, the output will also be caught up, and the checksum
++ * will have been updated if need be.
++ */
++
++int inflateIncomp(z)
++z_stream *z;
++{
++    if (z->state->mode != BLOCKS)
++	return Z_DATA_ERROR;
++    return inflate_addhistory(z->state->blocks, z);
++}
++
++
++int inflateSync(z)
++z_stream *z;
++{
++  uInt n;       /* number of bytes to look at */
++  Bytef *p;     /* pointer to bytes */
++  uInt m;       /* number of marker bytes found in a row */
++  uLong r, w;   /* temporaries to save total_in and total_out */
++
++  /* set up */
++  if (z == Z_NULL || z->state == Z_NULL)
++    return Z_STREAM_ERROR;
++  if (z->state->mode != BAD)
++  {
++    z->state->mode = BAD;
++    z->state->sub.marker = 0;
++  }
++  if ((n = z->avail_in) == 0)
++    return Z_BUF_ERROR;
++  p = z->next_in;
++  m = z->state->sub.marker;
++
++  /* search */
++  while (n && m < 4)
++  {
++    if (*p == (Byte)(m < 2 ? 0 : 0xff))
++      m++;
++    else if (*p)
++      m = 0;
++    else
++      m = 4 - m;
++    p++, n--;
++  }
++
++  /* restore */
++  z->total_in += p - z->next_in;
++  z->next_in = p;
++  z->avail_in = n;
++  z->state->sub.marker = m;
++
++  /* return no joy or set up to restart on a new block */
++  if (m != 4)
++    return Z_DATA_ERROR;
++  r = z->total_in;  w = z->total_out;
++  inflateReset(z);
++  z->total_in = r;  z->total_out = w;
++  z->state->mode = BLOCKS;
++  return Z_OK;
++}
++
++#undef NEEDBYTE
++#undef NEXTBYTE
++
++/*+++++*/
++/* infutil.h -- types and macros common to blocks and codes
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* WARNING: this file should *not* be used by applications. It is
++   part of the implementation of the compression library and is
++   subject to change. Applications should only use zlib.h.
++ */
++
++/* inflate blocks semi-private state */
++struct inflate_blocks_state {
++
++  /* mode */
++  enum {
++      TYPE,     /* get type bits (3, including end bit) */
++      LENS,     /* get lengths for stored */
++      STORED,   /* processing stored block */
++      TABLE,    /* get table lengths */
++      BTREE,    /* get bit lengths tree for a dynamic block */
++      DTREE,    /* get length, distance trees for a dynamic block */
++      CODES,    /* processing fixed or dynamic block */
++      DRY,      /* output remaining window bytes */
++      DONEB,     /* finished last block, done */
++      BADB}      /* got a data error--stuck here */
++    mode;               /* current inflate_block mode */
++
++  /* mode dependent information */
++  union {
++    uInt left;          /* if STORED, bytes left to copy */
++    struct {
++      uInt table;               /* table lengths (14 bits) */
++      uInt index;               /* index into blens (or border) */
++      uIntf *blens;             /* bit lengths of codes */
++      uInt bb;                  /* bit length tree depth */
++      inflate_huft *tb;         /* bit length decoding tree */
++      int nblens;		/* # elements allocated at blens */
++    } trees;            /* if DTREE, decoding info for trees */
++    struct {
++      inflate_huft *tl, *td;    /* trees to free */
++      inflate_codes_statef 
++         *codes;
++    } decode;           /* if CODES, current state */
++  } sub;                /* submode */
++  uInt last;            /* true if this block is the last block */
++
++  /* mode independent information */
++  uInt bitk;            /* bits in bit buffer */
++  uLong bitb;           /* bit buffer */
++  Bytef *window;        /* sliding window */
++  Bytef *end;           /* one byte after sliding window */
++  Bytef *read;          /* window read pointer */
++  Bytef *write;         /* window write pointer */
++  check_func checkfn;   /* check function */
++  uLong check;          /* check on output */
++
++};
++
++
++/* defines for inflate input/output */
++/*   update pointers and return */
++#define UPDBITS {s->bitb=b;s->bitk=k;}
++#define UPDIN {z->avail_in=n;z->total_in+=p-z->next_in;z->next_in=p;}
++#define UPDOUT {s->write=q;}
++#define UPDATE {UPDBITS UPDIN UPDOUT}
++#define LEAVE {UPDATE return inflate_flush(s,z,r);}
++/*   get bytes and bits */
++#define LOADIN {p=z->next_in;n=z->avail_in;b=s->bitb;k=s->bitk;}
++#define NEEDBYTE {if(n)r=Z_OK;else LEAVE}
++#define NEXTBYTE (n--,*p++)
++#define NEEDBITS(j) {while(k<(j)){NEEDBYTE;b|=((uLong)NEXTBYTE)<<k;k+=8;}}
++#define DUMPBITS(j) {b>>=(j);k-=(j);}
++/*   output bytes */
++#define WAVAIL (q<s->read?s->read-q-1:s->end-q)
++#define LOADOUT {q=s->write;m=WAVAIL;}
++#define WRAP {if(q==s->end&&s->read!=s->window){q=s->window;m=WAVAIL;}}
++#define FLUSH {UPDOUT r=inflate_flush(s,z,r); LOADOUT}
++#define NEEDOUT {if(m==0){WRAP if(m==0){FLUSH WRAP if(m==0) LEAVE}}r=Z_OK;}
++#define OUTBYTE(a) {*q++=(Byte)(a);m--;}
++/*   load local pointers */
++#define LOAD {LOADIN LOADOUT}
++
++/*
++ * The IBM 150 firmware munges the data right after _etext[].  This
++ * protects it. -- Cort
++ */
++/* And'ing with mask[n] masks the lower n bits */
++local uInt inflate_mask[] = {
++    0x0000,
++    0x0001, 0x0003, 0x0007, 0x000f, 0x001f, 0x003f, 0x007f, 0x00ff,
++    0x01ff, 0x03ff, 0x07ff, 0x0fff, 0x1fff, 0x3fff, 0x7fff, 0xffff
++};
++
++/* copy as much as possible from the sliding window to the output area */
++local int inflate_flush OF((
++    inflate_blocks_statef *,
++    z_stream *,
++    int));
++
++/*+++++*/
++/* inffast.h -- header to use inffast.c
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* WARNING: this file should *not* be used by applications. It is
++   part of the implementation of the compression library and is
++   subject to change. Applications should only use zlib.h.
++ */
++
++local int inflate_fast OF((
++    uInt,
++    uInt,
++    inflate_huft *,
++    inflate_huft *,
++    inflate_blocks_statef *,
++    z_stream *));
++
++
++/*+++++*/
++/* infblock.c -- interpret and process block types to last block
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* Table for deflate from PKZIP's appnote.txt. */
++local uInt border[] = { /* Order of the bit length code lengths */
++        16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
++
++/*
++   Notes beyond the 1.93a appnote.txt:
++
++   1. Distance pointers never point before the beginning of the output
++      stream.
++   2. Distance pointers can point back across blocks, up to 32k away.
++   3. There is an implied maximum of 7 bits for the bit length table and
++      15 bits for the actual data.
++   4. If only one code exists, then it is encoded using one bit.  (Zero
++      would be more efficient, but perhaps a little confusing.)  If two
++      codes exist, they are coded using one bit each (0 and 1).
++   5. There is no way of sending zero distance codes--a dummy must be
++      sent if there are none.  (History: a pre 2.0 version of PKZIP would
++      store blocks with no distance codes, but this was discovered to be
++      too harsh a criterion.)  Valid only for 1.93a.  2.04c does allow
++      zero distance codes, which is sent as one code of zero bits in
++      length.
++   6. There are up to 286 literal/length codes.  Code 256 represents the
++      end-of-block.  Note however that the static length tree defines
++      288 codes just to fill out the Huffman codes.  Codes 286 and 287
++      cannot be used though, since there is no length base or extra bits
++      defined for them.  Similarily, there are up to 30 distance codes.
++      However, static trees define 32 codes (all 5 bits) to fill out the
++      Huffman codes, but the last two had better not show up in the data.
++   7. Unzip can check dynamic Huffman blocks for complete code sets.
++      The exception is that a single code would not be complete (see #4).
++   8. The five bits following the block type is really the number of
++      literal codes sent minus 257.
++   9. Length codes 8,16,16 are interpreted as 13 length codes of 8 bits
++      (1+6+6).  Therefore, to output three times the length, you output
++      three codes (1+1+1), whereas to output four times the same length,
++      you only need two codes (1+3).  Hmm.
++  10. In the tree reconstruction algorithm, Code = Code + Increment
++      only if BitLength(i) is not zero.  (Pretty obvious.)
++  11. Correction: 4 Bits: # of Bit Length codes - 4     (4 - 19)
++  12. Note: length code 284 can represent 227-258, but length code 285
++      really is 258.  The last length deserves its own, short code
++      since it gets used a lot in very redundant files.  The length
++      258 is special since 258 - 3 (the min match length) is 255.
++  13. The literal/length and distance code bit lengths are read as a
++      single stream of lengths.  It is possible (and advantageous) for
++      a repeat code (16, 17, or 18) to go across the boundary between
++      the two sets of lengths.
++ */
++
++
++local void inflate_blocks_reset(s, z, c)
++inflate_blocks_statef *s;
++z_stream *z;
++uLongf *c;
++{
++  if (s->checkfn != Z_NULL)
++    *c = s->check;
++  if (s->mode == BTREE || s->mode == DTREE)
++    ZFREE(z, s->sub.trees.blens, s->sub.trees.nblens * sizeof(uInt));
++  if (s->mode == CODES)
++  {
++    inflate_codes_free(s->sub.decode.codes, z);
++    inflate_trees_free(s->sub.decode.td, z);
++    inflate_trees_free(s->sub.decode.tl, z);
++  }
++  s->mode = TYPE;
++  s->bitk = 0;
++  s->bitb = 0;
++  s->read = s->write = s->window;
++  if (s->checkfn != Z_NULL)
++    s->check = (*s->checkfn)(0L, Z_NULL, 0);
++  Trace((stderr, "inflate:   blocks reset\n"));
++}
++
++
++local inflate_blocks_statef *inflate_blocks_new(z, c, w)
++z_stream *z;
++check_func c;
++uInt w;
++{
++  inflate_blocks_statef *s;
++
++  if ((s = (inflate_blocks_statef *)ZALLOC
++       (z,1,sizeof(struct inflate_blocks_state))) == Z_NULL)
++    return s;
++  if ((s->window = (Bytef *)ZALLOC(z, 1, w)) == Z_NULL)
++  {
++    ZFREE(z, s, sizeof(struct inflate_blocks_state));
++    return Z_NULL;
++  }
++  s->end = s->window + w;
++  s->checkfn = c;
++  s->mode = TYPE;
++  Trace((stderr, "inflate:   blocks allocated\n"));
++  inflate_blocks_reset(s, z, &s->check);
++  return s;
++}
++
++
++local int inflate_blocks(s, z, r)
++inflate_blocks_statef *s;
++z_stream *z;
++int r;
++{
++  uInt t;               /* temporary storage */
++  uLong b;              /* bit buffer */
++  uInt k;               /* bits in bit buffer */
++  Bytef *p;             /* input data pointer */
++  uInt n;               /* bytes available there */
++  Bytef *q;             /* output window write pointer */
++  uInt m;               /* bytes to end of window or read pointer */
++
++  /* copy input/output information to locals (UPDATE macro restores) */
++  LOAD
++
++  /* process input based on current state */
++  while (1) switch (s->mode)
++  {
++    case TYPE:
++      NEEDBITS(3)
++      t = (uInt)b & 7;
++      s->last = t & 1;
++      switch (t >> 1)
++      {
++        case 0:                         /* stored */
++          Trace((stderr, "inflate:     stored block%s\n",
++                 s->last ? " (last)" : ""));
++          DUMPBITS(3)
++          t = k & 7;                    /* go to byte boundary */
++          DUMPBITS(t)
++          s->mode = LENS;               /* get length of stored block */
++          break;
++        case 1:                         /* fixed */
++          Trace((stderr, "inflate:     fixed codes block%s\n",
++                 s->last ? " (last)" : ""));
++          {
++            uInt bl, bd;
++            inflate_huft *tl, *td;
++
++            inflate_trees_fixed(&bl, &bd, &tl, &td);
++            s->sub.decode.codes = inflate_codes_new(bl, bd, tl, td, z);
++            if (s->sub.decode.codes == Z_NULL)
++            {
++              r = Z_MEM_ERROR;
++              LEAVE
++            }
++            s->sub.decode.tl = Z_NULL;  /* don't try to free these */
++            s->sub.decode.td = Z_NULL;
++          }
++          DUMPBITS(3)
++          s->mode = CODES;
++          break;
++        case 2:                         /* dynamic */
++          Trace((stderr, "inflate:     dynamic codes block%s\n",
++                 s->last ? " (last)" : ""));
++          DUMPBITS(3)
++          s->mode = TABLE;
++          break;
++        case 3:                         /* illegal */
++          DUMPBITS(3)
++          s->mode = BADB;
++          z->msg = "invalid block type";
++          r = Z_DATA_ERROR;
++          LEAVE
++      }
++      break;
++    case LENS:
++      NEEDBITS(32)
++      if (((~b) >> 16) != (b & 0xffff))
++      {
++        s->mode = BADB;
++        z->msg = "invalid stored block lengths";
++        r = Z_DATA_ERROR;
++        LEAVE
++      }
++      s->sub.left = (uInt)b & 0xffff;
++      b = k = 0;                      /* dump bits */
++      Tracev((stderr, "inflate:       stored length %u\n", s->sub.left));
++      s->mode = s->sub.left ? STORED : TYPE;
++      break;
++    case STORED:
++      if (n == 0)
++        LEAVE
++      NEEDOUT
++      t = s->sub.left;
++      if (t > n) t = n;
++      if (t > m) t = m;
++      zmemcpy(q, p, t);
++      p += t;  n -= t;
++      q += t;  m -= t;
++      if ((s->sub.left -= t) != 0)
++        break;
++      Tracev((stderr, "inflate:       stored end, %lu total out\n",
++              z->total_out + (q >= s->read ? q - s->read :
++              (s->end - s->read) + (q - s->window))));
++      s->mode = s->last ? DRY : TYPE;
++      break;
++    case TABLE:
++      NEEDBITS(14)
++      s->sub.trees.table = t = (uInt)b & 0x3fff;
++#ifndef PKZIP_BUG_WORKAROUND
++      if ((t & 0x1f) > 29 || ((t >> 5) & 0x1f) > 29)
++      {
++        s->mode = BADB;
++        z->msg = "too many length or distance symbols";
++        r = Z_DATA_ERROR;
++        LEAVE
++      }
++#endif
++      t = 258 + (t & 0x1f) + ((t >> 5) & 0x1f);
++      if (t < 19)
++        t = 19;
++      if ((s->sub.trees.blens = (uIntf*)ZALLOC(z, t, sizeof(uInt))) == Z_NULL)
++      {
++        r = Z_MEM_ERROR;
++        LEAVE
++      }
++      s->sub.trees.nblens = t;
++      DUMPBITS(14)
++      s->sub.trees.index = 0;
++      Tracev((stderr, "inflate:       table sizes ok\n"));
++      s->mode = BTREE;
++    case BTREE:
++      while (s->sub.trees.index < 4 + (s->sub.trees.table >> 10))
++      {
++        NEEDBITS(3)
++        s->sub.trees.blens[border[s->sub.trees.index++]] = (uInt)b & 7;
++        DUMPBITS(3)
++      }
++      while (s->sub.trees.index < 19)
++        s->sub.trees.blens[border[s->sub.trees.index++]] = 0;
++      s->sub.trees.bb = 7;
++      t = inflate_trees_bits(s->sub.trees.blens, &s->sub.trees.bb,
++                             &s->sub.trees.tb, z);
++      if (t != Z_OK)
++      {
++        r = t;
++        if (r == Z_DATA_ERROR)
++          s->mode = BADB;
++        LEAVE
++      }
++      s->sub.trees.index = 0;
++      Tracev((stderr, "inflate:       bits tree ok\n"));
++      s->mode = DTREE;
++    case DTREE:
++      while (t = s->sub.trees.table,
++             s->sub.trees.index < 258 + (t & 0x1f) + ((t >> 5) & 0x1f))
++      {
++        inflate_huft *h;
++        uInt i, j, c;
++
++        t = s->sub.trees.bb;
++        NEEDBITS(t)
++        h = s->sub.trees.tb + ((uInt)b & inflate_mask[t]);
++        t = h->word.what.Bits;
++        c = h->more.Base;
++        if (c < 16)
++        {
++          DUMPBITS(t)
++          s->sub.trees.blens[s->sub.trees.index++] = c;
++        }
++        else /* c == 16..18 */
++        {
++          i = c == 18 ? 7 : c - 14;
++          j = c == 18 ? 11 : 3;
++          NEEDBITS(t + i)
++          DUMPBITS(t)
++          j += (uInt)b & inflate_mask[i];
++          DUMPBITS(i)
++          i = s->sub.trees.index;
++          t = s->sub.trees.table;
++          if (i + j > 258 + (t & 0x1f) + ((t >> 5) & 0x1f) ||
++              (c == 16 && i < 1))
++          {
++            s->mode = BADB;
++            z->msg = "invalid bit length repeat";
++            r = Z_DATA_ERROR;
++            LEAVE
++          }
++          c = c == 16 ? s->sub.trees.blens[i - 1] : 0;
++          do {
++            s->sub.trees.blens[i++] = c;
++          } while (--j);
++          s->sub.trees.index = i;
++        }
++      }
++      inflate_trees_free(s->sub.trees.tb, z);
++      s->sub.trees.tb = Z_NULL;
++      {
++        uInt bl, bd;
++        inflate_huft *tl, *td;
++        inflate_codes_statef *c;
++
++        bl = 9;         /* must be <= 9 for lookahead assumptions */
++        bd = 6;         /* must be <= 9 for lookahead assumptions */
++        t = s->sub.trees.table;
++        t = inflate_trees_dynamic(257 + (t & 0x1f), 1 + ((t >> 5) & 0x1f),
++                                  s->sub.trees.blens, &bl, &bd, &tl, &td, z);
++        if (t != Z_OK)
++        {
++          if (t == (uInt)Z_DATA_ERROR)
++            s->mode = BADB;
++          r = t;
++          LEAVE
++        }
++        Tracev((stderr, "inflate:       trees ok\n"));
++        if ((c = inflate_codes_new(bl, bd, tl, td, z)) == Z_NULL)
++        {
++          inflate_trees_free(td, z);
++          inflate_trees_free(tl, z);
++          r = Z_MEM_ERROR;
++          LEAVE
++        }
++        ZFREE(z, s->sub.trees.blens, s->sub.trees.nblens * sizeof(uInt));
++        s->sub.decode.codes = c;
++        s->sub.decode.tl = tl;
++        s->sub.decode.td = td;
++      }
++      s->mode = CODES;
++    case CODES:
++      UPDATE
++      if ((r = inflate_codes(s, z, r)) != Z_STREAM_END)
++        return inflate_flush(s, z, r);
++      r = Z_OK;
++      inflate_codes_free(s->sub.decode.codes, z);
++      inflate_trees_free(s->sub.decode.td, z);
++      inflate_trees_free(s->sub.decode.tl, z);
++      LOAD
++      Tracev((stderr, "inflate:       codes end, %lu total out\n",
++              z->total_out + (q >= s->read ? q - s->read :
++              (s->end - s->read) + (q - s->window))));
++      if (!s->last)
++      {
++        s->mode = TYPE;
++        break;
++      }
++      if (k > 7)              /* return unused byte, if any */
++      {
++        Assert(k < 16, "inflate_codes grabbed too many bytes")
++        k -= 8;
++        n++;
++        p--;                    /* can always return one */
++      }
++      s->mode = DRY;
++    case DRY:
++      FLUSH
++      if (s->read != s->write)
++        LEAVE
++      s->mode = DONEB;
++    case DONEB:
++      r = Z_STREAM_END;
++      LEAVE
++    case BADB:
++      r = Z_DATA_ERROR;
++      LEAVE
++    default:
++      r = Z_STREAM_ERROR;
++      LEAVE
++  }
++}
++
++
++local int inflate_blocks_free(s, z, c)
++inflate_blocks_statef *s;
++z_stream *z;
++uLongf *c;
++{
++  inflate_blocks_reset(s, z, c);
++  ZFREE(z, s->window, s->end - s->window);
++  ZFREE(z, s, sizeof(struct inflate_blocks_state));
++  Trace((stderr, "inflate:   blocks freed\n"));
++  return Z_OK;
++}
++
++/*
++ * This subroutine adds the data at next_in/avail_in to the output history
++ * without performing any output.  The output buffer must be "caught up";
++ * i.e. no pending output (hence s->read equals s->write), and the state must
++ * be BLOCKS (i.e. we should be willing to see the start of a series of
++ * BLOCKS).  On exit, the output will also be caught up, and the checksum
++ * will have been updated if need be.
++ */
++local int inflate_addhistory(s, z)
++inflate_blocks_statef *s;
++z_stream *z;
++{
++    uLong b;              /* bit buffer */  /* NOT USED HERE */
++    uInt k;               /* bits in bit buffer */ /* NOT USED HERE */
++    uInt t;               /* temporary storage */
++    Bytef *p;             /* input data pointer */
++    uInt n;               /* bytes available there */
++    Bytef *q;             /* output window write pointer */
++    uInt m;               /* bytes to end of window or read pointer */
++
++    if (s->read != s->write)
++	return Z_STREAM_ERROR;
++    if (s->mode != TYPE)
++	return Z_DATA_ERROR;
++
++    /* we're ready to rock */
++    LOAD
++    /* while there is input ready, copy to output buffer, moving
++     * pointers as needed.
++     */
++    while (n) {
++	t = n;  /* how many to do */
++	/* is there room until end of buffer? */
++	if (t > m) t = m;
++	/* update check information */
++	if (s->checkfn != Z_NULL)
++	    s->check = (*s->checkfn)(s->check, q, t);
++	zmemcpy(q, p, t);
++	q += t;
++	p += t;
++	n -= t;
++	z->total_out += t;
++	s->read = q;    /* drag read pointer forward */
++/*      WRAP  */ 	/* expand WRAP macro by hand to handle s->read */
++	if (q == s->end) {
++	    s->read = q = s->window;
++	    m = WAVAIL;
++	}
++    }
++    UPDATE
++    return Z_OK;
++}
++
++
++/*
++ * At the end of a Deflate-compressed PPP packet, we expect to have seen
++ * a `stored' block type value but not the (zero) length bytes.
++ */
++local int inflate_packet_flush(s)
++    inflate_blocks_statef *s;
++{
++    if (s->mode != LENS)
++	return Z_DATA_ERROR;
++    s->mode = TYPE;
++    return Z_OK;
++}
++
++
++/*+++++*/
++/* inftrees.c -- generate Huffman trees for efficient decoding
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* simplify the use of the inflate_huft type with some defines */
++#define base more.Base
++#define next more.Next
++#define exop word.what.Exop
++#define bits word.what.Bits
++
++
++local int huft_build OF((
++    uIntf *,            /* code lengths in bits */
++    uInt,               /* number of codes */
++    uInt,               /* number of "simple" codes */
++    uIntf *,            /* list of base values for non-simple codes */
++    uIntf *,            /* list of extra bits for non-simple codes */
++    inflate_huft * FAR*,/* result: starting table */
++    uIntf *,            /* maximum lookup bits (returns actual) */
++    z_stream *));       /* for zalloc function */
++
++local voidpf falloc OF((
++    voidpf,             /* opaque pointer (not used) */
++    uInt,               /* number of items */
++    uInt));             /* size of item */
++
++local void ffree OF((
++    voidpf q,           /* opaque pointer (not used) */
++    voidpf p,           /* what to free (not used) */
++    uInt n));		/* number of bytes (not used) */
++
++/* Tables for deflate from PKZIP's appnote.txt. */
++local uInt cplens[] = { /* Copy lengths for literal codes 257..285 */
++        3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31,
++        35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0};
++        /* actually lengths - 2; also see note #13 above about 258 */
++local uInt cplext[] = { /* Extra bits for literal codes 257..285 */
++        0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2,
++        3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 192, 192}; /* 192==invalid */
++local uInt cpdist[] = { /* Copy offsets for distance codes 0..29 */
++        1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193,
++        257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145,
++        8193, 12289, 16385, 24577};
++local uInt cpdext[] = { /* Extra bits for distance codes */
++        0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6,
++        7, 7, 8, 8, 9, 9, 10, 10, 11, 11,
++        12, 12, 13, 13};
++
++/*
++   Huffman code decoding is performed using a multi-level table lookup.
++   The fastest way to decode is to simply build a lookup table whose
++   size is determined by the longest code.  However, the time it takes
++   to build this table can also be a factor if the data being decoded
++   is not very long.  The most common codes are necessarily the
++   shortest codes, so those codes dominate the decoding time, and hence
++   the speed.  The idea is you can have a shorter table that decodes the
++   shorter, more probable codes, and then point to subsidiary tables for
++   the longer codes.  The time it costs to decode the longer codes is
++   then traded against the time it takes to make longer tables.
++
++   This results of this trade are in the variables lbits and dbits
++   below.  lbits is the number of bits the first level table for literal/
++   length codes can decode in one step, and dbits is the same thing for
++   the distance codes.  Subsequent tables are also less than or equal to
++   those sizes.  These values may be adjusted either when all of the
++   codes are shorter than that, in which case the longest code length in
++   bits is used, or when the shortest code is *longer* than the requested
++   table size, in which case the length of the shortest code in bits is
++   used.
++
++   There are two different values for the two tables, since they code a
++   different number of possibilities each.  The literal/length table
++   codes 286 possible values, or in a flat code, a little over eight
++   bits.  The distance table codes 30 possible values, or a little less
++   than five bits, flat.  The optimum values for speed end up being
++   about one bit more than those, so lbits is 8+1 and dbits is 5+1.
++   The optimum values may differ though from machine to machine, and
++   possibly even between compilers.  Your mileage may vary.
++ */
++
++
++/* If BMAX needs to be larger than 16, then h and x[] should be uLong. */
++#define BMAX 15         /* maximum bit length of any code */
++#define N_MAX 288       /* maximum number of codes in any set */
++
++#ifdef DEBUG_ZLIB
++  uInt inflate_hufts;
++#endif
++
++local int huft_build(b, n, s, d, e, t, m, zs)
++uIntf *b;               /* code lengths in bits (all assumed <= BMAX) */
++uInt n;                 /* number of codes (assumed <= N_MAX) */
++uInt s;                 /* number of simple-valued codes (0..s-1) */
++uIntf *d;               /* list of base values for non-simple codes */
++uIntf *e;               /* list of extra bits for non-simple codes */  
++inflate_huft * FAR *t;  /* result: starting table */
++uIntf *m;               /* maximum lookup bits, returns actual */
++z_stream *zs;           /* for zalloc function */
++/* Given a list of code lengths and a maximum table size, make a set of
++   tables to decode that set of codes.  Return Z_OK on success, Z_BUF_ERROR
++   if the given code set is incomplete (the tables are still built in this
++   case), Z_DATA_ERROR if the input is invalid (all zero length codes or an
++   over-subscribed set of lengths), or Z_MEM_ERROR if not enough memory. */
++{
++
++  uInt a;                       /* counter for codes of length k */
++  uInt c[BMAX+1];               /* bit length count table */
++  uInt f;                       /* i repeats in table every f entries */
++  int g;                        /* maximum code length */
++  int h;                        /* table level */
++  register uInt i;              /* counter, current code */
++  register uInt j;              /* counter */
++  register int k;               /* number of bits in current code */
++  int l;                        /* bits per table (returned in m) */
++  register uIntf *p;            /* pointer into c[], b[], or v[] */
++  inflate_huft *q;              /* points to current table */
++  struct inflate_huft_s r;      /* table entry for structure assignment */
++  inflate_huft *u[BMAX];        /* table stack */
++  uInt v[N_MAX];                /* values in order of bit length */
++  register int w;               /* bits before this table == (l * h) */
++  uInt x[BMAX+1];               /* bit offsets, then code stack */
++  uIntf *xp;                    /* pointer into x */
++  int y;                        /* number of dummy codes added */
++  uInt z;                       /* number of entries in current table */
++
++
++  /* Generate counts for each bit length */
++  p = c;
++#define C0 *p++ = 0;
++#define C2 C0 C0 C0 C0
++#define C4 C2 C2 C2 C2
++  C4                            /* clear c[]--assume BMAX+1 is 16 */
++  p = b;  i = n;
++  do {
++    c[*p++]++;                  /* assume all entries <= BMAX */
++  } while (--i);
++  if (c[0] == n)                /* null input--all zero length codes */
++  {
++    *t = (inflate_huft *)Z_NULL;
++    *m = 0;
++    return Z_OK;
++  }
++
++
++  /* Find minimum and maximum length, bound *m by those */
++  l = *m;
++  for (j = 1; j <= BMAX; j++)
++    if (c[j])
++      break;
++  k = j;                        /* minimum code length */
++  if ((uInt)l < j)
++    l = j;
++  for (i = BMAX; i; i--)
++    if (c[i])
++      break;
++  g = i;                        /* maximum code length */
++  if ((uInt)l > i)
++    l = i;
++  *m = l;
++
++
++  /* Adjust last length count to fill out codes, if needed */
++  for (y = 1 << j; j < i; j++, y <<= 1)
++    if ((y -= c[j]) < 0)
++      return Z_DATA_ERROR;
++  if ((y -= c[i]) < 0)
++    return Z_DATA_ERROR;
++  c[i] += y;
++
++
++  /* Generate starting offsets into the value table for each length */
++  x[1] = j = 0;
++  p = c + 1;  xp = x + 2;
++  while (--i) {                 /* note that i == g from above */
++    *xp++ = (j += *p++);
++  }
++
++
++  /* Make a table of values in order of bit lengths */
++  p = b;  i = 0;
++  do {
++    if ((j = *p++) != 0)
++      v[x[j]++] = i;
++  } while (++i < n);
++
++
++  /* Generate the Huffman codes and for each, make the table entries */
++  x[0] = i = 0;                 /* first Huffman code is zero */
++  p = v;                        /* grab values in bit order */
++  h = -1;                       /* no tables yet--level -1 */
++  w = -l;                       /* bits decoded == (l * h) */
++  u[0] = (inflate_huft *)Z_NULL;        /* just to keep compilers happy */
++  q = (inflate_huft *)Z_NULL;   /* ditto */
++  z = 0;                        /* ditto */
++
++  /* go through the bit lengths (k already is bits in shortest code) */
++  for (; k <= g; k++)
++  {
++    a = c[k];
++    while (a--)
++    {
++      /* here i is the Huffman code of length k bits for value *p */
++      /* make tables up to required level */
++      while (k > w + l)
++      {
++        h++;
++        w += l;                 /* previous table always l bits */
++
++        /* compute minimum size table less than or equal to l bits */
++        z = (z = g - w) > (uInt)l ? l : z;      /* table size upper limit */
++        if ((f = 1 << (j = k - w)) > a + 1)     /* try a k-w bit table */
++        {                       /* too few codes for k-w bit table */
++          f -= a + 1;           /* deduct codes from patterns left */
++          xp = c + k;
++          if (j < z)
++            while (++j < z)     /* try smaller tables up to z bits */
++            {
++              if ((f <<= 1) <= *++xp)
++                break;          /* enough codes to use up j bits */
++              f -= *xp;         /* else deduct codes from patterns */
++            }
++        }
++        z = 1 << j;             /* table entries for j-bit table */
++
++        /* allocate and link in new table */
++        if ((q = (inflate_huft *)ZALLOC
++             (zs,z + 1,sizeof(inflate_huft))) == Z_NULL)
++        {
++          if (h)
++            inflate_trees_free(u[0], zs);
++          return Z_MEM_ERROR;   /* not enough memory */
++        }
++	q->word.Nalloc = z + 1;
++#ifdef DEBUG_ZLIB
++        inflate_hufts += z + 1;
++#endif
++        *t = q + 1;             /* link to list for huft_free() */
++        *(t = &(q->next)) = Z_NULL;
++        u[h] = ++q;             /* table starts after link */
++
++        /* connect to last table, if there is one */
++        if (h)
++        {
++          x[h] = i;             /* save pattern for backing up */
++          r.bits = (Byte)l;     /* bits to dump before this table */
++          r.exop = (Byte)j;     /* bits in this table */
++          r.next = q;           /* pointer to this table */
++          j = i >> (w - l);     /* (get around Turbo C bug) */
++          u[h-1][j] = r;        /* connect to last table */
++        }
++      }
++
++      /* set up table entry in r */
++      r.bits = (Byte)(k - w);
++      if (p >= v + n)
++        r.exop = 128 + 64;      /* out of values--invalid code */
++      else if (*p < s)
++      {
++        r.exop = (Byte)(*p < 256 ? 0 : 32 + 64);     /* 256 is end-of-block */
++        r.base = *p++;          /* simple code is just the value */
++      }
++      else
++      {
++        r.exop = (Byte)e[*p - s] + 16 + 64; /* non-simple--look up in lists */
++        r.base = d[*p++ - s];
++      }
++
++      /* fill code-like entries with r */
++      f = 1 << (k - w);
++      for (j = i >> w; j < z; j += f)
++        q[j] = r;
++
++      /* backwards increment the k-bit code i */
++      for (j = 1 << (k - 1); i & j; j >>= 1)
++        i ^= j;
++      i ^= j;
++
++      /* backup over finished tables */
++      while ((i & ((1 << w) - 1)) != x[h])
++      {
++        h--;                    /* don't need to update q */
++        w -= l;
++      }
++    }
++  }
++
++
++  /* Return Z_BUF_ERROR if we were given an incomplete table */
++  return y != 0 && g != 1 ? Z_BUF_ERROR : Z_OK;
++}
++
++
++local int inflate_trees_bits(c, bb, tb, z)
++uIntf *c;               /* 19 code lengths */
++uIntf *bb;              /* bits tree desired/actual depth */
++inflate_huft * FAR *tb; /* bits tree result */
++z_stream *z;            /* for zfree function */
++{
++  int r;
++
++  r = huft_build(c, 19, 19, (uIntf*)Z_NULL, (uIntf*)Z_NULL, tb, bb, z);
++  if (r == Z_DATA_ERROR)
++    z->msg = "oversubscribed dynamic bit lengths tree";
++  else if (r == Z_BUF_ERROR)
++  {
++    inflate_trees_free(*tb, z);
++    z->msg = "incomplete dynamic bit lengths tree";
++    r = Z_DATA_ERROR;
++  }
++  return r;
++}
++
++
++local int inflate_trees_dynamic(nl, nd, c, bl, bd, tl, td, z)
++uInt nl;                /* number of literal/length codes */
++uInt nd;                /* number of distance codes */
++uIntf *c;               /* that many (total) code lengths */
++uIntf *bl;              /* literal desired/actual bit depth */
++uIntf *bd;              /* distance desired/actual bit depth */
++inflate_huft * FAR *tl; /* literal/length tree result */
++inflate_huft * FAR *td; /* distance tree result */
++z_stream *z;            /* for zfree function */
++{
++  int r;
++
++  /* build literal/length tree */
++  if ((r = huft_build(c, nl, 257, cplens, cplext, tl, bl, z)) != Z_OK)
++  {
++    if (r == Z_DATA_ERROR)
++      z->msg = "oversubscribed literal/length tree";
++    else if (r == Z_BUF_ERROR)
++    {
++      inflate_trees_free(*tl, z);
++      z->msg = "incomplete literal/length tree";
++      r = Z_DATA_ERROR;
++    }
++    return r;
++  }
++
++  /* build distance tree */
++  if ((r = huft_build(c + nl, nd, 0, cpdist, cpdext, td, bd, z)) != Z_OK)
++  {
++    if (r == Z_DATA_ERROR)
++      z->msg = "oversubscribed literal/length tree";
++    else if (r == Z_BUF_ERROR) {
++#ifdef PKZIP_BUG_WORKAROUND
++      r = Z_OK;
++    }
++#else
++      inflate_trees_free(*td, z);
++      z->msg = "incomplete literal/length tree";
++      r = Z_DATA_ERROR;
++    }
++    inflate_trees_free(*tl, z);
++    return r;
++#endif
++  }
++
++  /* done */
++  return Z_OK;
++}
++
++
++/* build fixed tables only once--keep them here */
++local int fixed_lock = 0;
++local int fixed_built = 0;
++#define FIXEDH 530      /* number of hufts used by fixed tables */
++local uInt fixed_left = FIXEDH;
++local inflate_huft fixed_mem[FIXEDH];
++local uInt fixed_bl;
++local uInt fixed_bd;
++local inflate_huft *fixed_tl;
++local inflate_huft *fixed_td;
++
++
++local voidpf falloc(q, n, s)
++voidpf q;        /* opaque pointer (not used) */
++uInt n;         /* number of items */
++uInt s;         /* size of item */
++{
++  Assert(s == sizeof(inflate_huft) && n <= fixed_left,
++         "inflate_trees falloc overflow");
++  if (q) s++; /* to make some compilers happy */
++  fixed_left -= n;
++  return (voidpf)(fixed_mem + fixed_left);
++}
++
++
++local void ffree(q, p, n)
++voidpf q;
++voidpf p;
++uInt n;
++{
++  Assert(0, "inflate_trees ffree called!");
++  if (q) q = p; /* to make some compilers happy */
++}
++
++
++local int inflate_trees_fixed(bl, bd, tl, td)
++uIntf *bl;               /* literal desired/actual bit depth */
++uIntf *bd;               /* distance desired/actual bit depth */
++inflate_huft * FAR *tl;  /* literal/length tree result */
++inflate_huft * FAR *td;  /* distance tree result */
++{
++  /* build fixed tables if not built already--lock out other instances */
++  while (++fixed_lock > 1)
++    fixed_lock--;
++  if (!fixed_built)
++  {
++    int k;              /* temporary variable */
++    unsigned c[288];    /* length list for huft_build */
++    z_stream z;         /* for falloc function */
++
++    /* set up fake z_stream for memory routines */
++    z.zalloc = falloc;
++    z.zfree = ffree;
++    z.opaque = Z_NULL;
++
++    /* literal table */
++    for (k = 0; k < 144; k++)
++      c[k] = 8;
++    for (; k < 256; k++)
++      c[k] = 9;
++    for (; k < 280; k++)
++      c[k] = 7;
++    for (; k < 288; k++)
++      c[k] = 8;
++    fixed_bl = 7;
++    huft_build(c, 288, 257, cplens, cplext, &fixed_tl, &fixed_bl, &z);
++
++    /* distance table */
++    for (k = 0; k < 30; k++)
++      c[k] = 5;
++    fixed_bd = 5;
++    huft_build(c, 30, 0, cpdist, cpdext, &fixed_td, &fixed_bd, &z);
++
++    /* done */
++    fixed_built = 1;
++  }
++  fixed_lock--;
++  *bl = fixed_bl;
++  *bd = fixed_bd;
++  *tl = fixed_tl;
++  *td = fixed_td;
++  return Z_OK;
++}
++
++
++local int inflate_trees_free(t, z)
++inflate_huft *t;        /* table to free */
++z_stream *z;            /* for zfree function */
++/* Free the malloc'ed tables built by huft_build(), which makes a linked
++   list of the tables it made, with the links in a dummy first entry of
++   each table. */
++{
++  register inflate_huft *p, *q;
++
++  /* Go through linked list, freeing from the malloced (t[-1]) address. */
++  p = t;
++  while (p != Z_NULL)
++  {
++    q = (--p)->next;
++    ZFREE(z, p, p->word.Nalloc * sizeof(inflate_huft));
++    p = q;
++  } 
++  return Z_OK;
++}
++
++/*+++++*/
++/* infcodes.c -- process literals and length/distance pairs
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* simplify the use of the inflate_huft type with some defines */
++#define base more.Base
++#define next more.Next
++#define exop word.what.Exop
++#define bits word.what.Bits
++
++/* inflate codes private state */
++struct inflate_codes_state {
++
++  /* mode */
++  enum {        /* waiting for "i:"=input, "o:"=output, "x:"=nothing */
++      START,    /* x: set up for LEN */
++      LEN,      /* i: get length/literal/eob next */
++      LENEXT,   /* i: getting length extra (have base) */
++      DIST,     /* i: get distance next */
++      DISTEXT,  /* i: getting distance extra */
++      COPY,     /* o: copying bytes in window, waiting for space */
++      LIT,      /* o: got literal, waiting for output space */
++      WASH,     /* o: got eob, possibly still output waiting */
++      END,      /* x: got eob and all data flushed */
++      BADCODE}  /* x: got error */
++    mode;               /* current inflate_codes mode */
++
++  /* mode dependent information */
++  uInt len;
++  union {
++    struct {
++      inflate_huft *tree;       /* pointer into tree */
++      uInt need;                /* bits needed */
++    } code;             /* if LEN or DIST, where in tree */
++    uInt lit;           /* if LIT, literal */
++    struct {
++      uInt get;                 /* bits to get for extra */
++      uInt dist;                /* distance back to copy from */
++    } copy;             /* if EXT or COPY, where and how much */
++  } sub;                /* submode */
++
++  /* mode independent information */
++  Byte lbits;           /* ltree bits decoded per branch */
++  Byte dbits;           /* dtree bits decoder per branch */
++  inflate_huft *ltree;          /* literal/length/eob tree */
++  inflate_huft *dtree;          /* distance tree */
++
++};
++
++
++local inflate_codes_statef *inflate_codes_new(bl, bd, tl, td, z)
++uInt bl, bd;
++inflate_huft *tl, *td;
++z_stream *z;
++{
++  inflate_codes_statef *c;
++
++  if ((c = (inflate_codes_statef *)
++       ZALLOC(z,1,sizeof(struct inflate_codes_state))) != Z_NULL)
++  {
++    c->mode = START;
++    c->lbits = (Byte)bl;
++    c->dbits = (Byte)bd;
++    c->ltree = tl;
++    c->dtree = td;
++    Tracev((stderr, "inflate:       codes new\n"));
++  }
++  return c;
++}
++
++
++local int inflate_codes(s, z, r)
++inflate_blocks_statef *s;
++z_stream *z;
++int r;
++{
++  uInt j;               /* temporary storage */
++  inflate_huft *t;      /* temporary pointer */
++  uInt e;               /* extra bits or operation */
++  uLong b;              /* bit buffer */
++  uInt k;               /* bits in bit buffer */
++  Bytef *p;             /* input data pointer */
++  uInt n;               /* bytes available there */
++  Bytef *q;             /* output window write pointer */
++  uInt m;               /* bytes to end of window or read pointer */
++  Bytef *f;             /* pointer to copy strings from */
++  inflate_codes_statef *c = s->sub.decode.codes;  /* codes state */
++
++  /* copy input/output information to locals (UPDATE macro restores) */
++  LOAD
++
++  /* process input and output based on current state */
++  while (1) switch (c->mode)
++  {             /* waiting for "i:"=input, "o:"=output, "x:"=nothing */
++    case START:         /* x: set up for LEN */
++#ifndef SLOW
++      if (m >= 258 && n >= 10)
++      {
++        UPDATE
++        r = inflate_fast(c->lbits, c->dbits, c->ltree, c->dtree, s, z);
++        LOAD
++        if (r != Z_OK)
++        {
++          c->mode = r == Z_STREAM_END ? WASH : BADCODE;
++          break;
++        }
++      }
++#endif /* !SLOW */
++      c->sub.code.need = c->lbits;
++      c->sub.code.tree = c->ltree;
++      c->mode = LEN;
++    case LEN:           /* i: get length/literal/eob next */
++      j = c->sub.code.need;
++      NEEDBITS(j)
++      t = c->sub.code.tree + ((uInt)b & inflate_mask[j]);
++      DUMPBITS(t->bits)
++      e = (uInt)(t->exop);
++      if (e == 0)               /* literal */
++      {
++        c->sub.lit = t->base;
++        Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
++                 "inflate:         literal '%c'\n" :
++                 "inflate:         literal 0x%02x\n", t->base));
++        c->mode = LIT;
++        break;
++      }
++      if (e & 16)               /* length */
++      {
++        c->sub.copy.get = e & 15;
++        c->len = t->base;
++        c->mode = LENEXT;
++        break;
++      }
++      if ((e & 64) == 0)        /* next table */
++      {
++        c->sub.code.need = e;
++        c->sub.code.tree = t->next;
++        break;
++      }
++      if (e & 32)               /* end of block */
++      {
++        Tracevv((stderr, "inflate:         end of block\n"));
++        c->mode = WASH;
++        break;
++      }
++      c->mode = BADCODE;        /* invalid code */
++      z->msg = "invalid literal/length code";
++      r = Z_DATA_ERROR;
++      LEAVE
++    case LENEXT:        /* i: getting length extra (have base) */
++      j = c->sub.copy.get;
++      NEEDBITS(j)
++      c->len += (uInt)b & inflate_mask[j];
++      DUMPBITS(j)
++      c->sub.code.need = c->dbits;
++      c->sub.code.tree = c->dtree;
++      Tracevv((stderr, "inflate:         length %u\n", c->len));
++      c->mode = DIST;
++    case DIST:          /* i: get distance next */
++      j = c->sub.code.need;
++      NEEDBITS(j)
++      t = c->sub.code.tree + ((uInt)b & inflate_mask[j]);
++      DUMPBITS(t->bits)
++      e = (uInt)(t->exop);
++      if (e & 16)               /* distance */
++      {
++        c->sub.copy.get = e & 15;
++        c->sub.copy.dist = t->base;
++        c->mode = DISTEXT;
++        break;
++      }
++      if ((e & 64) == 0)        /* next table */
++      {
++        c->sub.code.need = e;
++        c->sub.code.tree = t->next;
++        break;
++      }
++      c->mode = BADCODE;        /* invalid code */
++      z->msg = "invalid distance code";
++      r = Z_DATA_ERROR;
++      LEAVE
++    case DISTEXT:       /* i: getting distance extra */
++      j = c->sub.copy.get;
++      NEEDBITS(j)
++      c->sub.copy.dist += (uInt)b & inflate_mask[j];
++      DUMPBITS(j)
++      Tracevv((stderr, "inflate:         distance %u\n", c->sub.copy.dist));
++      c->mode = COPY;
++    case COPY:          /* o: copying bytes in window, waiting for space */
++#ifndef __TURBOC__ /* Turbo C bug for following expression */
++      f = (uInt)(q - s->window) < c->sub.copy.dist ?
++          s->end - (c->sub.copy.dist - (q - s->window)) :
++          q - c->sub.copy.dist;
++#else
++      f = q - c->sub.copy.dist;
++      if ((uInt)(q - s->window) < c->sub.copy.dist)
++        f = s->end - (c->sub.copy.dist - (q - s->window));
++#endif
++      while (c->len)
++      {
++        NEEDOUT
++        OUTBYTE(*f++)
++        if (f == s->end)
++          f = s->window;
++        c->len--;
++      }
++      c->mode = START;
++      break;
++    case LIT:           /* o: got literal, waiting for output space */
++      NEEDOUT
++      OUTBYTE(c->sub.lit)
++      c->mode = START;
++      break;
++    case WASH:          /* o: got eob, possibly more output */
++      FLUSH
++      if (s->read != s->write)
++        LEAVE
++      c->mode = END;
++    case END:
++      r = Z_STREAM_END;
++      LEAVE
++    case BADCODE:       /* x: got error */
++      r = Z_DATA_ERROR;
++      LEAVE
++    default:
++      r = Z_STREAM_ERROR;
++      LEAVE
++  }
++}
++
++
++local void inflate_codes_free(c, z)
++inflate_codes_statef *c;
++z_stream *z;
++{
++  ZFREE(z, c, sizeof(struct inflate_codes_state));
++  Tracev((stderr, "inflate:       codes free\n"));
++}
++
++/*+++++*/
++/* inflate_util.c -- data and routines common to blocks and codes
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* copy as much as possible from the sliding window to the output area */
++local int inflate_flush(s, z, r)
++inflate_blocks_statef *s;
++z_stream *z;
++int r;
++{
++  uInt n;
++  Bytef *p, *q;
++
++  /* local copies of source and destination pointers */
++  p = z->next_out;
++  q = s->read;
++
++  /* compute number of bytes to copy as far as end of window */
++  n = (uInt)((q <= s->write ? s->write : s->end) - q);
++  if (n > z->avail_out) n = z->avail_out;
++  if (n && r == Z_BUF_ERROR) r = Z_OK;
++
++  /* update counters */
++  z->avail_out -= n;
++  z->total_out += n;
++
++  /* update check information */
++  if (s->checkfn != Z_NULL)
++    s->check = (*s->checkfn)(s->check, q, n);
++
++  /* copy as far as end of window */
++  zmemcpy(p, q, n);
++  p += n;
++  q += n;
++
++  /* see if more to copy at beginning of window */
++  if (q == s->end)
++  {
++    /* wrap pointers */
++    q = s->window;
++    if (s->write == s->end)
++      s->write = s->window;
++
++    /* compute bytes to copy */
++    n = (uInt)(s->write - q);
++    if (n > z->avail_out) n = z->avail_out;
++    if (n && r == Z_BUF_ERROR) r = Z_OK;
++
++    /* update counters */
++    z->avail_out -= n;
++    z->total_out += n;
++
++    /* update check information */
++    if (s->checkfn != Z_NULL)
++      s->check = (*s->checkfn)(s->check, q, n);
++
++    /* copy */
++    zmemcpy(p, q, n);
++    p += n;
++    q += n;
++  }
++
++  /* update pointers */
++  z->next_out = p;
++  s->read = q;
++
++  /* done */
++  return r;
++}
++
++
++/*+++++*/
++/* inffast.c -- process literals and length/distance pairs fast
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* simplify the use of the inflate_huft type with some defines */
++#define base more.Base
++#define next more.Next
++#define exop word.what.Exop
++#define bits word.what.Bits
++
++/* macros for bit input with no checking and for returning unused bytes */
++#define GRABBITS(j) {while(k<(j)){b|=((uLong)NEXTBYTE)<<k;k+=8;}}
++#define UNGRAB {n+=(c=k>>3);p-=c;k&=7;}
++
++/* Called with number of bytes left to write in window at least 258
++   (the maximum string length) and number of input bytes available
++   at least ten.  The ten bytes are six bytes for the longest length/
++   distance pair plus four bytes for overloading the bit buffer. */
++
++local int inflate_fast(bl, bd, tl, td, s, z)
++uInt bl, bd;
++inflate_huft *tl, *td;
++inflate_blocks_statef *s;
++z_stream *z;
++{
++  inflate_huft *t;      /* temporary pointer */
++  uInt e;               /* extra bits or operation */
++  uLong b;              /* bit buffer */
++  uInt k;               /* bits in bit buffer */
++  Bytef *p;             /* input data pointer */
++  uInt n;               /* bytes available there */
++  Bytef *q;             /* output window write pointer */
++  uInt m;               /* bytes to end of window or read pointer */
++  uInt ml;              /* mask for literal/length tree */
++  uInt md;              /* mask for distance tree */
++  uInt c;               /* bytes to copy */
++  uInt d;               /* distance back to copy from */
++  Bytef *r;             /* copy source pointer */
++
++  /* load input, output, bit values */
++  LOAD
++
++  /* initialize masks */
++  ml = inflate_mask[bl];
++  md = inflate_mask[bd];
++
++  /* do until not enough input or output space for fast loop */
++  do {                          /* assume called with m >= 258 && n >= 10 */
++    /* get literal/length code */
++    GRABBITS(20)                /* max bits for literal/length code */
++    if ((e = (t = tl + ((uInt)b & ml))->exop) == 0)
++    {
++      DUMPBITS(t->bits)
++      Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
++                "inflate:         * literal '%c'\n" :
++                "inflate:         * literal 0x%02x\n", t->base));
++      *q++ = (Byte)t->base;
++      m--;
++      continue;
++    }
++    do {
++      DUMPBITS(t->bits)
++      if (e & 16)
++      {
++        /* get extra bits for length */
++        e &= 15;
++        c = t->base + ((uInt)b & inflate_mask[e]);
++        DUMPBITS(e)
++        Tracevv((stderr, "inflate:         * length %u\n", c));
++
++        /* decode distance base of block to copy */
++        GRABBITS(15);           /* max bits for distance code */
++        e = (t = td + ((uInt)b & md))->exop;
++        do {
++          DUMPBITS(t->bits)
++          if (e & 16)
++          {
++            /* get extra bits to add to distance base */
++            e &= 15;
++            GRABBITS(e)         /* get extra bits (up to 13) */
++            d = t->base + ((uInt)b & inflate_mask[e]);
++            DUMPBITS(e)
++            Tracevv((stderr, "inflate:         * distance %u\n", d));
++
++            /* do the copy */
++            m -= c;
++            if ((uInt)(q - s->window) >= d)     /* offset before dest */
++            {                                   /*  just copy */
++              r = q - d;
++              *q++ = *r++;  c--;        /* minimum count is three, */
++              *q++ = *r++;  c--;        /*  so unroll loop a little */
++            }
++            else                        /* else offset after destination */
++            {
++              e = d - (q - s->window);  /* bytes from offset to end */
++              r = s->end - e;           /* pointer to offset */
++              if (c > e)                /* if source crosses, */
++              {
++                c -= e;                 /* copy to end of window */
++                do {
++                  *q++ = *r++;
++                } while (--e);
++                r = s->window;          /* copy rest from start of window */
++              }
++            }
++            do {                        /* copy all or what's left */
++              *q++ = *r++;
++            } while (--c);
++            break;
++          }
++          else if ((e & 64) == 0)
++            e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop;
++          else
++          {
++            z->msg = "invalid distance code";
++            UNGRAB
++            UPDATE
++            return Z_DATA_ERROR;
++          }
++        } while (1);
++        break;
++      }
++      if ((e & 64) == 0)
++      {
++        if ((e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop) == 0)
++        {
++          DUMPBITS(t->bits)
++          Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
++                    "inflate:         * literal '%c'\n" :
++                    "inflate:         * literal 0x%02x\n", t->base));
++          *q++ = (Byte)t->base;
++          m--;
++          break;
++        }
++      }
++      else if (e & 32)
++      {
++        Tracevv((stderr, "inflate:         * end of block\n"));
++        UNGRAB
++        UPDATE
++        return Z_STREAM_END;
++      }
++      else
++      {
++        z->msg = "invalid literal/length code";
++        UNGRAB
++        UPDATE
++        return Z_DATA_ERROR;
++      }
++    } while (1);
++  } while (m >= 258 && n >= 10);
++
++  /* not enough input or output--restore pointers and return */
++  UNGRAB
++  UPDATE
++  return Z_OK;
++}
++
++
++/*+++++*/
++/* zutil.c -- target dependent utility functions for the compression library
++ * Copyright (C) 1995 Jean-loup Gailly.
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* From: zutil.c,v 1.8 1995/05/03 17:27:12 jloup Exp */
++
++char *zlib_version = ZLIB_VERSION;
++
++char *z_errmsg[] = {
++"stream end",          /* Z_STREAM_END    1 */
++"",                    /* Z_OK            0 */
++"file error",          /* Z_ERRNO        (-1) */
++"stream error",        /* Z_STREAM_ERROR (-2) */
++"data error",          /* Z_DATA_ERROR   (-3) */
++"insufficient memory", /* Z_MEM_ERROR    (-4) */
++"buffer error",        /* Z_BUF_ERROR    (-5) */
++""};
++
++
++/*+++++*/
++/* adler32.c -- compute the Adler-32 checksum of a data stream
++ * Copyright (C) 1995 Mark Adler
++ * For conditions of distribution and use, see copyright notice in zlib.h 
++ */
++
++/* From: adler32.c,v 1.6 1995/05/03 17:27:08 jloup Exp */
++
++#define BASE 65521L /* largest prime smaller than 65536 */
++#define NMAX 5552
++/* NMAX is the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1 */
++
++#define DO1(buf)  {s1 += *buf++; s2 += s1;}
++#define DO2(buf)  DO1(buf); DO1(buf);
++#define DO4(buf)  DO2(buf); DO2(buf);
++#define DO8(buf)  DO4(buf); DO4(buf);
++#define DO16(buf) DO8(buf); DO8(buf);
++
++/* ========================================================================= */
++uLong adler32(adler, buf, len)
++    uLong adler;
++    Bytef *buf;
++    uInt len;
++{
++    unsigned long s1 = adler & 0xffff;
++    unsigned long s2 = (adler >> 16) & 0xffff;
++    int k;
++
++    if (buf == Z_NULL) return 1L;
++
++    while (len > 0) {
++        k = len < NMAX ? len : NMAX;
++        len -= k;
++        while (k >= 16) {
++            DO16(buf);
++            k -= 16;
++        }
++        if (k != 0) do {
++            DO1(buf);
++        } while (--k);
++        s1 %= BASE;
++        s2 %= BASE;
++    }
++    return (s2 << 16) | s1;
++}
+diff --git a/arch/mips/zboot/lm2f/Makefile b/arch/mips/zboot/lm2f/Makefile
+new file mode 100644
+index 0000000..e92e567
+--- /dev/null
++++ b/arch/mips/zboot/lm2f/Makefile
+@@ -0,0 +1,130 @@
++# arch/mips/zboot/lm2f/Makefile
++# 
++# Makefile for Alchemy Semiconductor Pb1[015]00 boards.
++# All of the boot loader code was derived from the ppc
++# boot code.
++#
++# Copyright 2001,2002 MontaVista Software Inc.
++#
++# Author: Mark A. Greer
++#	  mgreer@mvista.com
++# Ported and modified for mips support by 
++# Pete Popov <ppopov@mvista.com>
++#
++# This program is free software; you can redistribute  it and/or modify it
++# under  the terms of  the GNU General  Public License as published by the
++# Free Software Foundation;  either version 2 of the  License, or (at your
++# option) any later version.
++
++#########################################################################
++# START BOARD SPECIFIC VARIABLES
++BNAME=lm2f
++
++# These two variables control where the zImage is stored
++# in flash and loaded in memory.  It only controls how the srec
++# file is generated, the code is the same.
++ZBOOT_CFLAGS := -fno-pic -pipe -msoft-float -ffreestanding  -march=r4600 -Wa,--trap -G 0 -mno-abicalls  
++ZBOOT_CFLAGS += -D__KERNEL__
++ZBOOT_CFLAGS += -I$(TOPDIR)/include -I$(TOPDIR)/includ/asm/ -I$(TOPDIR)/include/asm/mach-lemote/ -I$(TOPDIR)/include/asm/mach-generic -I$(TOPDIR)/arch/mips/zboot/include
++ZBOOT_CFLAGS += -fno-builtin -isystem
++ZBOOT_AFLAGS := -fno-pic -pipe -msoft-float -ffreestanding  -march=r4600 -Wa,--trap 
++
++RAM_RUN_ADDR = 0x81000000
++FLASH_LOAD_ADDR = 0xBFD00000
++
++# These two variables specify the free ram region
++# that can be used for temporary malloc area
++AVAIL_RAM_START=0x83000000
++AVAIL_RAM_END=0x83f00000
++
++# This one must match the LOADADDR in arch/mips/Makefile!
++LOADADDR=0x80200000
++# END BOARD SPECIFIC VARIABLES
++#########################################################################
++
++targets 	:= bzImage
++
++libs-y  := $(obj)/../lib
++obj-y	+= $(obj)/../images
++OBJECTS := $(obj)/head.o $(obj)/cache.o $(obj)/../common/misc-common.o \
++		$(obj)/../common/misc-simple.o \
++		$(obj)/ns16550.o $(obj)/../common/ctype.o $(obj)/../lib/zlib.o \
++		$(obj)/../common/string.o 
++
++ENTRY := $(obj)/../utils/entry
++OFFSET := ../utils/offset
++SIZE := ../utils/size
++
++LD_ARGS := -T $(obj)/../ld.script -Ttext $(RAM_RUN_ADDR) -Bstatic
++OBJCOPY_ARGS = -O elf32-tradlittlemips
++
++all: bzImage
++
++clean:
++	rm -rf *.o vmlinux* zvmlinux.* ../images/*.srec
++
++$(obj)/head.o:  $(obj)/head.S $(TOPDIR)/vmlinux
++	$(Q)$(CC) $(ZBOOT_CFLAGS) -I$(TOPDIR)/include -D__ASSEMBLY__ \
++	  -DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) $(TOPDIR)/vmlinux )	-c -o $@ $<
++
++$(obj)/cache.o: $(obj)/cache.c $(TOPDIR)/vmlinux	
++	$(Q)$(CC) $(ZBOOT_CFLAGS) -I$(TOPDIR)/include -c -o $@ $<
++
++$(obj)/../common/misc-common.o:  $(obj)/../common/misc-common.c
++	$(Q)$(CC) $(ZBOOT_CFLAGS) -I$(TOPDIR)/include -c -o $@ $<
++
++$(obj)/../common/ctype.o: $(obj)/../common/ctype.c
++	$(Q)$(CC) $(ZBOOT_CFLAGS) -I$(TOPDIR)/include -c -o $@ $< 
++
++$(obj)/../common/string.o: $(obj)/../common/string.c
++	$(Q)$(CC) $(ZBOOT_CFLAGS) -I$(TOPDIR)/include -c -o $@ $< 
++
++$(obj)/../common/dummy.o: $(obj)/../common/dummy.c
++	$(Q)$(CC) $(ZBOOT_CFLAGS) -I$(TOPDIR)/include -c -o $@ $< 
++
++$(obj)/../lib/zlib.o: $(obj)/../lib/zlib.c
++	$(Q)$(CC) $(ZBOOT_CFLAGS) -I$(TOPDIR)/include -c -o $@ $< 
++
++$(obj)/../common/misc-simple.o: $(obj)/../common/misc-simple.c
++	$(Q)$(CC)  $(ZBOOT_CFLAGS) \
++	   	-I$(TOPDIR)/include/asm/mach-generic -I$(TOPDIR)/include/asm/mach-mips  \
++		-DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \
++		-DAVAIL_RAM_START=$(AVAIL_RAM_START) \
++		-DAVAIL_RAM_END=$(AVAIL_RAM_END) \
++		-DLOADADDR=$(LOADADDR) \
++		-DZIMAGE_SIZE=0 -c -o $@ $<
++ifeq (1,0)
++$(obj)/../common/misc-simple.o: $(obj)/../common/misc-simple.c
++	$(CC) $(ZBOOT_CFLAGS)  -I$(TOPDIR)/include/asm/mach-generic -I$(TOPDIR)/include/asm/mach-mips  -DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \
++		-DAVAIL_RAM_START=$(AVAIL_RAM_START) \
++		-DAVAIL_RAM_END=$(AVAIL_RAM_END) \
++		-DLOADADDR=$(LOADADDR) \
++		-DZIMAGE_SIZE=0 -c -o $@ $<
++endif
++$(obj)/ns16550.o: $(obj)/ns16550.c
++	$(Q)$(CC) $(ZBOOT_CFLAGS) -I$(TOPDIR)/include -c -o $@ $<
++
++$(obj)/../lib/lib.a:
++	$(MAKE) $(build)=$(dir $@) 
++
++$(obj)/../images/vmlinux.gz: $(TOPDIR)/vmlinux
++	$(Q)$(MAKE) $(build)=$(dir $@) vmlinux.gz
++zvmlinux: $(OBJECTS) $(LIBS) $(obj)/../ld.script $(obj)/../images/vmlinux.gz $(obj)/../common/dummy.o
++	$(Q)$(OBJCOPY) \
++		--add-section=.image=$(obj)/../images/vmlinux.gz \
++		--set-section-flags=.image=contents,alloc,load,readonly,data \
++		$(obj)/../common/dummy.o image.o
++	$(Q)$(LD) $(LD_ARGS) -o $@ $(OBJECTS) image.o  
++	$(Q)$(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab -R .stabstr \
++		-R .initrd -R .sysmap
++
++# Here we manipulate the image in order to get it the necessary
++# srecord file we need.
++$(obj)/bzImage: zvmlinux
++	$(Q)mv zvmlinux $(obj)/../images/bzImage.$(BNAME)
++	$(Q)echo "  GEN    " bzImage.$(BNAME)
++	$(Q)$(OBJCOPY) -O srec $(obj)/../images/bzImage.$(BNAME) $(obj)/../images/$(BNAME).srec
++
++zImage.flash: zImage
++	$(OBJCOPY) -O srec --adjust-vma 0x3ed00000 \
++		../images/zImage.$(BNAME) ../images/$(BNAME).flash.srec
+diff --git a/arch/mips/zboot/lm2f/cache.c b/arch/mips/zboot/lm2f/cache.c
+new file mode 100644
+index 0000000..96d833f
+--- /dev/null
++++ b/arch/mips/zboot/lm2f/cache.c
+@@ -0,0 +1,41 @@
++#define cache32_unroll32(base,op)					\
++	__asm__ __volatile__(						\
++	"	.set push					\n"	\
++	"	.set noreorder					\n"	\
++	"	.set mips3					\n"	\
++	"	cache %1, 0x000(%0); cache %1, 0x020(%0)	\n"	\
++	"	cache %1, 0x040(%0); cache %1, 0x060(%0)	\n"	\
++	"	cache %1, 0x080(%0); cache %1, 0x0a0(%0)	\n"	\
++	"	cache %1, 0x0c0(%0); cache %1, 0x0e0(%0)	\n"	\
++	"	cache %1, 0x100(%0); cache %1, 0x120(%0)	\n"	\
++	"	cache %1, 0x140(%0); cache %1, 0x160(%0)	\n"	\
++	"	cache %1, 0x180(%0); cache %1, 0x1a0(%0)	\n"	\
++	"	cache %1, 0x1c0(%0); cache %1, 0x1e0(%0)	\n"	\
++	"	cache %1, 0x200(%0); cache %1, 0x220(%0)	\n"	\
++	"	cache %1, 0x240(%0); cache %1, 0x260(%0)	\n"	\
++	"	cache %1, 0x280(%0); cache %1, 0x2a0(%0)	\n"	\
++	"	cache %1, 0x2c0(%0); cache %1, 0x2e0(%0)	\n"	\
++	"	cache %1, 0x300(%0); cache %1, 0x320(%0)	\n"	\
++	"	cache %1, 0x340(%0); cache %1, 0x360(%0)	\n"	\
++	"	cache %1, 0x380(%0); cache %1, 0x3a0(%0)	\n"	\
++	"	cache %1, 0x3c0(%0); cache %1, 0x3e0(%0)	\n"	\
++	"	.set pop					\n"	\
++		:							\
++		: "r" (base),						\
++		  "i" (op));
++
++void flush_cache_all(void) 
++{
++	unsigned long start = 0x80000000;
++	unsigned long end = start + 512*1024/4;
++	unsigned long lsize = 32;
++	unsigned long addr;
++
++	int i;
++
++	for (i=0; i<4; i++) {
++		for (addr=start; addr < end; addr+= lsize*32) {
++			cache32_unroll32(addr|i, 0x03); /* Index Writeback scache */	
++		}
++	}
++}
+diff --git a/arch/mips/zboot/lm2f/head.S b/arch/mips/zboot/lm2f/head.S
+new file mode 100644
+index 0000000..592f4be
+--- /dev/null
++++ b/arch/mips/zboot/lm2f/head.S
+@@ -0,0 +1,130 @@
++/*
++ * arch/mips/kernel/head.S
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 1994, 1995 Waldorf Electronics
++ * Written by Ralf Baechle and Andreas Busse
++ * Copyright (C) 1995 - 1999 Ralf Baechle
++ * Copyright (C) 1996 Paul M. Antoine
++ * Modified for DECStation and hence R3000 support by Paul M. Antoine
++ * Further modifications by David S. Miller and Harald Koerfgen
++ * Copyright (C) 1999 Silicon Graphics, Inc.
++ *
++ * Head.S contains the MIPS exception handler and startup code.
++ *
++ **************************************************************************
++ *  9 Nov, 2000.
++ *  Added Cache Error exception handler and SBDDP EJTAG debug exception.
++ *
++ *  Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
++ *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
++ **************************************************************************
++ */
++#include <linux/autoconf.h>
++#include <linux/threads.h>
++
++#include <asm/asm.h>
++#include <asm/cacheops.h>
++#include <asm/mipsregs.h>
++#include <asm/asm-offsets.h>
++#include <asm/cachectl.h>
++#include <asm/regdef.h>
++
++#define IndexInvalidate_I       0x00
++#define IndexWriteBack_D        0x01
++
++	.set noreorder
++	.cprestore
++	LEAF(start)
++start:
++	bal	locate
++	nop
++locate:
++	subu	s8, ra, 8	/* Where we were loaded */
++	la	sp, (.stack + 8192)
++
++	move	s0, a0		/* Save boot rom start args */
++	move	s1, a1
++	move	s2, a2
++	move	s3, a3
++
++	la	a0, start	/* Where we were linked to run */
++
++	move	a1, s8
++	la	a2, _edata
++	subu	t1, a2, a0
++	srl	t1, t1, 2
++
++	/* copy text section */
++	li	t0, 0
++1:	lw	v0, 0(a1)
++	nop
++	sw	v0, 0(a0)
++	xor	t0, t0, v0
++	addu	a0, 4
++	bne	a2, a0, 1b
++	addu	a1, 4
++
++	/* Clear BSS */
++	la	a0, _edata
++	la	a2, _end
++2:	sw	zero, 0(a0)
++	bne	a2, a0, 2b
++	addu	a0, 4
++
++	move	a0, s8		     /* load address */
++	move	a1, t1               /* length in words */
++	move	a2, t0               /* checksum */
++	move	a3, sp
++
++	la	ra, 1f
++	la	k0, decompress_kernel
++	jr	k0
++	nop
++1:
++
++	move	a0, s0
++	move	a1, s1
++	move	a2, s2
++	move	a3, s3
++	li	k0, KERNEL_ENTRY
++	jr	k0
++	nop
++3:
++	b 3b
++	END(start)
++
++	LEAF(udelay)
++udelay:
++	END(udelay)
++
++#if 0
++
++	LEAF(FlushCache)
++	li	k0, 0x80000000  # start address
++	li	k1, 0x80004000  # end address (16KB I-Cache)
++	subu	k1, 128
++
++1:
++	.set mips3
++	cache	IndexWriteBack_D, 0(k0)
++	cache	IndexWriteBack_D, 32(k0)
++	cache	IndexWriteBack_D, 64(k0)
++	cache	IndexWriteBack_D, 96(k0)
++	cache	IndexInvalidate_I, 0(k0)
++	cache	IndexInvalidate_I, 32(k0)
++	cache	IndexInvalidate_I, 64(k0)
++	cache	IndexInvalidate_I, 96(k0)
++	.set mips0
++
++	bne	k0, k1, 1b
++	addu	k0, k0, 128
++	jr	ra
++	nop
++	END(FlushCache)
++#endif
++
++	.comm .stack,4096*2,4
+diff --git a/arch/mips/zboot/lm2f/ns16550.c b/arch/mips/zboot/lm2f/ns16550.c
+new file mode 100644
+index 0000000..2a6c877
+--- /dev/null
++++ b/arch/mips/zboot/lm2f/ns16550.c
+@@ -0,0 +1,73 @@
++/*
++ * NS16550 support
++ */
++
++#include <linux/autoconf.h>
++#include <asm/serial.h>
++#include "ns16550.h"
++
++typedef struct NS16550 *NS16550_t;
++
++#ifdef CONFIG_LEMOTE_FULONG2F
++#ifdef CONFIG_LEMOTE_NAS
++#define COM1 0xbff003f8
++#else 
++#define COM1 0xbfd002f8
++#endif
++#endif
++
++#ifdef CONFIG_LEMOTE_2FNOTEBOOK 
++#define COM1 0xbff003f8
++#undef BASE_BAUD
++#define BASE_BAUD  (3686400 / 16)
++#endif
++
++const NS16550_t COM_PORTS[] = { 
++	(NS16550_t) COM1
++};
++
++volatile struct NS16550 *
++serial_init(int chan)
++{
++	volatile struct NS16550 *com_port;
++	com_port = (struct NS16550 *) COM_PORTS[chan];
++	/* See if port is present */
++	com_port->lcr = 0x00;
++	com_port->ier = 0xFF;
++#if 0
++	if (com_port->ier != 0x0F) return ((struct NS16550 *)0);
++#endif
++	com_port->ier = 0x00;
++	com_port->lcr = 0x80;  /* Access baud rate */
++
++#undef  SERIAL_CONSOLE_BAUD
++#define SERIAL_CONSOLE_BAUD 115200
++
++	com_port->dll = (BASE_BAUD / SERIAL_CONSOLE_BAUD) & 0xff;
++	com_port->dlm = ((BASE_BAUD / SERIAL_CONSOLE_BAUD) >> 8 ) & 0xff;
++
++	com_port->lcr = 0x03;  /* 8 data, 1 stop, no parity */
++	com_port->mcr = 0x03;  /* RTS/DTR */
++	com_port->fcr = 0x07;  /* Clear & enable FIFOs */
++	return (com_port);
++}
++
++void
++serial_putc(volatile struct NS16550 *com_port, unsigned char c)
++{
++	while ((com_port->lsr & LSR_THRE) == 0) ;
++	com_port->thr = c;
++}
++
++unsigned char
++serial_getc(volatile struct NS16550 *com_port)
++{
++	while ((com_port->lsr & LSR_DR) == 0) ;
++	return (com_port->rbr);
++}
++
++int
++serial_tstc(volatile struct NS16550 *com_port)
++{
++	return ((com_port->lsr & LSR_DR) != 0);
++}
+diff --git a/arch/mips/zboot/utils/entry b/arch/mips/zboot/utils/entry
+new file mode 100644
+index 0000000..376e822
+--- /dev/null
++++ b/arch/mips/zboot/utils/entry
+@@ -0,0 +1,12 @@
++#!/bin/sh
++
++# grab the kernel_entry address from the vmlinux elf image
++entry=`$1 $2  | grep kernel_entry`
++
++fs=`echo $entry | grep ffffffff`  # check toolchain output
++
++if [ -n "$fs" ]; then
++	echo "0x"`$1 $2  | grep kernel_entry | cut -c9- | awk '{print $1}'`
++else
++	echo "0x"`$1 $2  | grep kernel_entry | cut -c1- | awk '{print $1}'`
++fi
+diff --git a/arch/mips/zboot/utils/offset b/arch/mips/zboot/utils/offset
+new file mode 100644
+index 0000000..25e7505
+--- /dev/null
++++ b/arch/mips/zboot/utils/offset
+@@ -0,0 +1,3 @@
++#!/bin/sh
++
++echo "0x"`$1 -h $2  | grep $3 | grep -v zvmlinux| awk '{print $6}'`
+diff --git a/arch/mips/zboot/utils/size b/arch/mips/zboot/utils/size
+new file mode 100644
+index 0000000..6b13558
+--- /dev/null
++++ b/arch/mips/zboot/utils/size
+@@ -0,0 +1,4 @@
++#!/bin/sh
++
++OFFSET=`$1 -h $2  | grep $3 | grep -v zvmlinux | awk '{print $3}'`
++echo "0x"$OFFSET
+diff --git a/drivers/Makefile b/drivers/Makefile
+index 2735bde..cd93d84 100644
+--- a/drivers/Makefile
++++ b/drivers/Makefile
+@@ -9,6 +9,9 @@ obj-y				+= gpio/
+ obj-$(CONFIG_PCI)		+= pci/
+ obj-$(CONFIG_PARISC)		+= parisc/
+ obj-$(CONFIG_RAPIDIO)		+= rapidio/
++# char/ comes before serial/ etc so that the VT console is the boot-time
++# default.
++obj-y				+= char/
+ obj-y				+= video/
+ obj-$(CONFIG_ACPI)		+= acpi/
+ # PnP must come after ACPI since it will eventually need to check if acpi
+@@ -18,10 +21,6 @@ obj-$(CONFIG_ARM_AMBA)		+= amba/
+ 
+ obj-$(CONFIG_XEN)		+= xen/
+ 
+-# char/ comes before serial/ etc so that the VT console is the boot-time
+-# default.
+-obj-y				+= char/
+-
+ # gpu/ comes after char for AGP vs DRM startup
+ obj-y				+= gpu/
+ 
+diff --git a/drivers/char/mem.c b/drivers/char/mem.c
+index 672b08e..0913295 100644
+--- a/drivers/char/mem.c
++++ b/drivers/char/mem.c
+@@ -35,6 +35,8 @@
+ # include <linux/efi.h>
+ #endif
+ 
++static unsigned int uca = 1;
++static unsigned long fb_start = 0xffffffffUL, fb_end = 0xffffffffUL;
+ /*
+  * Architectures vary in how they handle caching for addresses
+  * outside of main memory.
+@@ -354,6 +356,13 @@ static int mmap_mem(struct file * file, struct vm_area_struct * vma)
+ 						 size,
+ 						 vma->vm_page_prot);
+ 
++	if (uca) {
++		unsigned offset = vma->vm_pgoff << PAGE_SHIFT;
++		if (offset >= fb_start && (offset + size) <= fb_end){
++			vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot)&~_CACHE_MASK)|_CACHE_UNCACHED_ACCELERATED);
++		}
++	}
++
+ 	vma->vm_ops = &mmap_mem_ops;
+ 
+ 	/* Remap-pfn-range will mark the range VM_IO and VM_RESERVED */
+@@ -1000,3 +1009,47 @@ static int __init chr_dev_init(void)
+ }
+ 
+ fs_initcall(chr_dev_init);
++
++/* setup for godson uncache acceleration */
++
++#include <linux/pci.h>
++#ifndef pci_for_each_dev
++#define pci_for_each_dev for_each_pci_dev
++#endif
++
++static int __init find_vga_mem_init(void)
++{
++	struct pci_dev *dev = 0;
++	struct resource *r;
++	int idx;
++	printk("begin to find the vga mem range\n");
++	if(!uca)return 0;
++	pci_for_each_dev(dev) {
++		if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA){
++			for (idx=0; idx < PCI_NUM_RESOURCES; idx++) {
++				r = &dev->resource[idx];
++				if (!r->start && r->end) {
++					continue;
++				}
++				if (r->flags & IORESOURCE_IO)
++					continue;
++				if (r->flags & IORESOURCE_MEM){
++					fb_start = r->start;
++#ifdef CONFIG_LEMOTE_2FNOTEBOOK
++					fb_end  = fb_start + 0x400000; /*sm712 have 4M memory*/
++#else
++					fb_end  = r->end;
++#endif
++					printk("find the frame buffer:start=%lx,end=%lx\n", fb_start, fb_end);
++					return 0;
++				}
++			}
++
++		}
++	}
++	printk("<0>can not find vga device\n");
++	return 0;
++}
++
++late_initcall(find_vga_mem_init);
++
+diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c
+index f53d4d0..b2460df 100644
+--- a/drivers/char/rtc.c
++++ b/drivers/char/rtc.c
+@@ -258,6 +258,9 @@ static irqreturn_t rtc_interrupt(int irq, void *dev_id)
+ 		rtc_irq_data |= (CMOS_READ(RTC_INTR_FLAGS) & 0xF0);
+ 	}
+ 
++#ifdef CONFIG_CS5536_RTC_BUG
++	(void)CMOS_READ(RTC_VALID);
++#endif
+ 	if (rtc_status & RTC_TIMER_ON)
+ 		mod_timer(&rtc_irq_timer, jiffies + HZ/rtc_freq + 2*HZ/100);
+ 
+@@ -1096,7 +1099,7 @@ no_irq:
+ 
+ 	if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
+ 		BCD_TO_BIN(year);       /* This should never happen... */
+-
++#if 0
+ 	if (year < 20) {
+ 		epoch = 2000;
+ 		guess = "SRM (post-2000)";
+@@ -1116,6 +1119,9 @@ no_irq:
+ 		guess = "Standard PC (1900)";
+ #endif
+ 	}
++#endif		
++	epoch = 1900;
++	guess = "Standard PC (1900)";
+ 	if (guess)
+ 		printk(KERN_INFO "rtc: %s epoch (%lu) detected\n",
+ 			guess, epoch);
+@@ -1204,6 +1210,9 @@ static void rtc_dropped_irq(unsigned long data)
+ 
+ 	spin_unlock_irq(&rtc_lock);
+ 
++#ifdef  CONFIG_CS5536_RTC_BUG    
++    (void)CMOS_READ(RTC_CONTROL);
++#endif
+ 	if (printk_ratelimit()) {
+ 		printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n",
+ 			freq);
+diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
+index a896a28..2add633 100644
+--- a/drivers/ide/ide-io.c
++++ b/drivers/ide/ide-io.c
+@@ -345,11 +345,11 @@ void ide_end_drive_cmd (ide_drive_t *drive, u8 stat, u8 err)
+ 		if (pm->pm_step == ide_pm_state_completed)
+ 			ide_complete_pm_request(drive, rq);
+ 		return;
+-	}
++	} else
++		rq->errors = err;
+ 
+ 	spin_lock_irqsave(&ide_lock, flags);
+ 	HWGROUP(drive)->rq = NULL;
+-	rq->errors = err;
+ 	if (unlikely(__blk_end_request(rq, (rq->errors ? -EIO : 0),
+ 				       blk_rq_bytes(rq))))
+ 		BUG();
+diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
+index 1e66a96..0fb7e6e 100644
+--- a/drivers/ide/pci/amd74xx.c
++++ b/drivers/ide/pci/amd74xx.c
+@@ -23,6 +23,13 @@
+ 
+ #define DRV_NAME "amd74xx"
+ 
++const char *amd74xx_quirk_drives[] = {
++	"FUJITSU MHZ2160BH G2",
++	"WDC WD1600BEVT-22ZCT0",
++	"ST9160310AS",
++	NULL
++};
++
+ enum {
+ 	AMD_IDE_CONFIG		= 0x41,
+ 	AMD_CABLE_DETECT	= 0x42,
+@@ -112,6 +119,21 @@ static void amd_set_pio_mode(ide_drive_t *drive, const u8 pio)
+ 	amd_set_drive(drive, XFER_PIO_0 + pio);
+ }
+ 
++static void amd_quirkproc(ide_drive_t *drive)
++{	
++	const char **list, *m = (char *)&drive->id->model;
++#ifdef CONFIG_LEMOTE_2FNOTEBOOK
++/*	for(list = amd74xx_quirk_drives; *list != NULL; list++)
++		if(strstr(m, *list) != NULL){
++*/
++			drive->quirk_list = 2;
++			return;
++/*		}
++*/
++#endif
++	drive->quirk_list = 0;
++}
++
+ static void __devinit amd7409_cable_detect(struct pci_dev *dev)
+ {
+ 	/* no host side cable detection */
+@@ -194,6 +216,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
+ static const struct ide_port_ops amd_port_ops = {
+ 	.set_pio_mode		= amd_set_pio_mode,
+ 	.set_dma_mode		= amd_set_drive,
++	.quirkproc			= amd_quirkproc,
+ 	.cable_detect		= amd_cable_detect,
+ };
+ 
+diff --git a/drivers/input/mouse/Makefile b/drivers/input/mouse/Makefile
+index d4d2025..dd73db8 100644
+--- a/drivers/input/mouse/Makefile
++++ b/drivers/input/mouse/Makefile
+@@ -18,7 +18,7 @@ obj-$(CONFIG_MOUSE_HIL)		+= hil_ptr.o
+ obj-$(CONFIG_MOUSE_VSXXXAA)	+= vsxxxaa.o
+ obj-$(CONFIG_MOUSE_GPIO)	+= gpio_mouse.o
+ 
+-psmouse-objs := psmouse-base.o synaptics.o
++psmouse-objs := psmouse-base.o synaptics.o sentelic.o
+ 
+ psmouse-$(CONFIG_MOUSE_PS2_ALPS)	+= alps.o
+ psmouse-$(CONFIG_MOUSE_PS2_LOGIPS2PP)	+= logips2pp.o
+diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
+index f5a6be1..32b26f8 100644
+--- a/drivers/input/mouse/psmouse-base.c
++++ b/drivers/input/mouse/psmouse-base.c
+@@ -28,6 +28,7 @@
+ #include "lifebook.h"
+ #include "trackpoint.h"
+ #include "touchkit_ps2.h"
++#include "sentelic.h"
+ 
+ #define DRIVER_DESC	"PS/2 mouse driver"
+ 
+@@ -630,6 +631,20 @@ static int psmouse_extensions(struct psmouse *psmouse,
+ 		}
+ 	}
+ 
++/*
++ * Try Finger Sensing Pad
++ */
++	if (max_proto > PSMOUSE_IMEX) {
++		if (fsp_detect(psmouse, set_properties) == 0) {
++			if (!set_properties || fsp_init(psmouse) == 0)
++				return PSMOUSE_FSP;
++/*
++ * Init failed, try basic relative protocols
++ */
++			max_proto = PSMOUSE_IMEX;
++		}
++	}
++
+ 	if (max_proto > PSMOUSE_IMEX) {
+ 
+ 		if (genius_detect(psmouse, set_properties) == 0)
+@@ -713,6 +728,13 @@ static const struct psmouse_protocol psmouse_protocols[] = {
+ 		.maxproto	= 1,
+ 		.detect		= intellimouse_detect,
+ 	},
++ 	{
++		.type		= PSMOUSE_FSP,
++		.name		= "FSPPS/2",
++		.alias		= "fsp",
++		.detect		= fsp_detect,
++		.init		= fsp_init,
++	},
+ 	{
+ 		.type		= PSMOUSE_IMEX,
+ 		.name		= "ImExPS/2",
+diff --git a/drivers/input/mouse/psmouse.h b/drivers/input/mouse/psmouse.h
+index 1317bdd..91ec7a5 100644
+--- a/drivers/input/mouse/psmouse.h
++++ b/drivers/input/mouse/psmouse.h
+@@ -89,6 +89,7 @@ enum psmouse_type {
+ 	PSMOUSE_TRACKPOINT,
+ 	PSMOUSE_TOUCHKIT_PS2,
+ 	PSMOUSE_CORTRON,
++	PSMOUSE_FSP,
+ 	PSMOUSE_AUTO		/* This one should always be last */
+ };
+ 
+diff --git a/drivers/input/mouse/sentelic.c b/drivers/input/mouse/sentelic.c
+new file mode 100644
+index 0000000..4101483
+--- /dev/null
++++ b/drivers/input/mouse/sentelic.c
+@@ -0,0 +1,1453 @@
++/*-
++ * Finger Sensing Pad PS/2 mouse driver.
++ *
++ * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
++ * Copyright (C) 2005-2008 Tai-hwa Liang, Sentelic Corporation.
++ *
++ *   This program is free software; you can redistribute it and/or
++ *   modify it under the terms of the GNU General Public License
++ *   as published by the Free Software Foundation; either version 2
++ *   of the License, or (at your option) any later version.
++ *
++ *   This program is distributed in the hope that it will be useful,
++ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *   GNU General Public License for more details.
++ *
++ *   You should have received a copy of the GNU General Public License
++ *   along with this program; if not, write to the Free Software
++ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ * $Id: sentelic.c 28732 2008-10-17 07:03:29Z avatar $
++ */
++
++#include <linux/module.h>
++#include <linux/version.h>
++#include <linux/input.h>
++#include <linux/ctype.h>
++#include <linux/libps2.h>
++#include <linux/serio.h>
++#include <linux/jiffies.h>
++
++#include "psmouse.h"
++#include "sentelic.h"
++
++/**
++ * The timeout for FSP PS/2 command only(in millisecond).
++ */
++#define	FSP_CMD_TIMEOUT		(30)
++
++/** Driver version. */
++static unsigned int	fsp_drv_ver[] = {1, 0, 0};
++
++#ifdef	FSP_DEBUG
++static unsigned int	ps2_packet_cnt = 0;
++static unsigned int	ps2_last_second = 0;
++#endif
++
++/*
++ * A direct copy of ps2_command(), with reduced timeout value as the hardware
++ * will return non-standard response which results in timeout in almost all
++ * commanding sequences.
++ */
++static int
++fsp_ps2_command(struct psmouse *psmouse, unsigned char *param, int command)
++{
++	struct ps2dev	*ps2dev = &psmouse->ps2dev;
++	int		timeout;
++	int		send = (command >> 12) & 0xf;
++	int		receive = (command >> 8) & 0xf;
++	int		rc = -1;
++	int		i;
++
++	if (receive > sizeof(ps2dev->cmdbuf)) {
++		WARN_ON(1);
++		return (-1);
++	}
++
++	if (send && !param) {
++		WARN_ON(1);
++		return (-1);
++	}
++
++	mutex_lock(&ps2dev->cmd_mutex);
++
++	serio_pause_rx(ps2dev->serio);
++	ps2dev->flags = command == PS2_CMD_GETID ? PS2_FLAG_WAITID : 0;
++	ps2dev->cmdcnt = receive;
++	if (receive && param)
++		for (i = 0; i < receive; i++)
++			ps2dev->cmdbuf[(receive - 1) - i] = param[i];
++	serio_continue_rx(ps2dev->serio);
++
++	if (ps2_sendbyte(ps2dev, command & 0xff,
++	    command == PS2_CMD_RESET_BAT ? 1000 : FSP_CMD_TIMEOUT))
++		goto out;
++
++	for (i = 0; i < send; i++) {
++		if (ps2_sendbyte(ps2dev, param[i], FSP_CMD_TIMEOUT))
++			goto out;
++	}
++
++	/*
++	 * The reset command takes a long time to execute.
++	 */
++	timeout = msecs_to_jiffies(command == PS2_CMD_RESET_BAT ? 4000 : 500);
++
++	timeout = wait_event_timeout(ps2dev->wait,
++	    !(ps2dev->flags & PS2_FLAG_CMD1), timeout);
++
++	if (ps2dev->cmdcnt && timeout > 0) {
++		wait_event_timeout(ps2dev->wait,
++		    !(ps2dev->flags & PS2_FLAG_CMD), timeout);
++	}
++
++	if (param) {
++		for (i = 0; i < receive; i++)
++			param[i] = ps2dev->cmdbuf[(receive - 1) - i];
++	}
++
++	if (ps2dev->cmdcnt && (command != PS2_CMD_RESET_BAT || ps2dev->cmdcnt != 1))
++		goto out;
++
++	rc = 0;
++out:
++	serio_pause_rx(ps2dev->serio);
++	ps2dev->flags = 0;
++	serio_continue_rx(ps2dev->serio);
++
++	mutex_unlock(&ps2dev->cmd_mutex);
++	return (rc);
++}
++
++/*
++ * Make sure that the value being sent to FSP will not conflict with
++ * possible sample rate values.
++ */
++static unsigned char
++fsp_test_swap_cmd(unsigned char reg_val)
++{
++	switch (reg_val) {
++	case 10: case 20: case 40: case 60: case 80: case 100: case 200:
++		/*
++		 * The requested value being sent to FSP matched to possible
++		 * sample rates, swap the given value such that the hardware
++		 * wouldn't get confused.
++		 */
++		return ((reg_val >> 4) | (reg_val << 4));
++	default:
++		return (reg_val);	/* swap isn't necessary */
++	}
++}
++
++/*
++ * Make sure that the value being sent to FSP will not conflict with certain
++ * commands.
++ */
++static unsigned char
++fsp_test_invert_cmd(unsigned char reg_val)
++{
++	switch (reg_val) {
++	case 0xe9: case 0xee: case 0xf2: case 0xff:
++		/*
++		 * The requested value being sent to FSP matched to certain
++		 * commands, inverse the given value such that the hardware
++		 * wouldn't get confused.
++		 */
++		return ~(reg_val);
++	default:
++		return (reg_val);	/* inversion isn't necessary */
++	}
++}
++
++static int
++fsp_reg_read(struct psmouse *psmouse, int reg_addr, int *reg_val)
++{
++	unsigned char	param[3];
++	unsigned char	addr;
++#ifdef	FSP_DEBUG
++	printk(KERN_INFO "fsp_reg_read: READ REG\n");
++#endif
++	if (fsp_ps2_command(psmouse, NULL, 0x00f3) < 0)
++		return (-1);
++
++	/* should return 0xfe(request for resending) */
++	fsp_ps2_command(psmouse, NULL, 0x0066);
++	/* should return 0xfc(failed) */
++	fsp_ps2_command(psmouse, NULL, 0x0088);
++
++	if (fsp_ps2_command(psmouse, NULL, 0x00f3) < 0)
++		return (-1);
++
++	if ((addr = fsp_test_invert_cmd(reg_addr)) != reg_addr) {
++		fsp_ps2_command(psmouse, NULL, 0x0068);
++	} else {
++		if ((addr = fsp_test_swap_cmd(reg_addr)) != reg_addr) {
++			/* swapping is required */
++			fsp_ps2_command(psmouse, NULL, 0x00cc);
++			/* expect 0xfe */
++		} else {
++			/* swapping isn't necessary */
++			fsp_ps2_command(psmouse, NULL, 0x0066);
++			/* expect 0xfe */
++		}
++	}
++	/* should return 0xfc(failed) */
++	fsp_ps2_command(psmouse, NULL, addr);
++
++	if (fsp_ps2_command(psmouse, param, PSMOUSE_CMD_GETINFO) < 0)
++		return (-1);
++
++	*reg_val = param[2];
++
++	return (0);
++}
++
++static int
++fsp_reg_write(struct psmouse *psmouse, int reg_addr, int reg_val)
++{
++	unsigned char	v;
++#ifdef	FSP_DEBUG
++	printk(KERN_INFO "fsp_reg_write: WRITE REG\n");
++#endif
++	if (fsp_ps2_command(psmouse, NULL, 0x00f3) < 0)
++		return (-1);
++
++	if ((v = fsp_test_invert_cmd(reg_addr)) != reg_addr) {
++		/* inversion is required */
++		fsp_ps2_command(psmouse, NULL, 0x0074);
++	} else {
++		if ((v = fsp_test_swap_cmd(reg_addr)) != reg_addr) {
++			/* swapping is required */
++			fsp_ps2_command(psmouse, NULL, 0x0077);
++		} else {
++			/* swapping isn't necessary */
++			fsp_ps2_command(psmouse, NULL, 0x0055);
++		}
++	}
++	/* write the register address in correct order */
++	fsp_ps2_command(psmouse, NULL, v);
++
++	if (fsp_ps2_command(psmouse, NULL, 0x00f3) < 0)
++		return (-1);
++
++	if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) {
++		/* inversion is required */
++		fsp_ps2_command(psmouse, NULL, 0x0047);
++	} else {
++		if ((v = fsp_test_swap_cmd(reg_val)) != reg_val) {
++			/* swapping is required */
++			fsp_ps2_command(psmouse, NULL, 0x0044);
++		} else {
++			/* swapping isn't necessary */
++			fsp_ps2_command(psmouse, NULL, 0x0033);
++		}
++	}
++	/* write the register value in correct order */
++	fsp_ps2_command(psmouse, NULL, v);
++
++	return (0);
++}
++
++/* enable register clock gating for writing certain registers */
++static int
++fsp_reg_write_enable(struct psmouse *psmouse, int en)
++{
++	int	v, nv;
++
++	if (fsp_reg_read(psmouse, FSP_REG_SYSCTL1, &v) == -1)
++		return (-1);
++
++	if (en) {
++		nv = v | FSP_BIT_EN_REG_CLK;
++	} else {
++		nv = v & ~(FSP_BIT_EN_REG_CLK);
++	}
++	/* only write if necessary */
++	if (nv != v) {
++		if (fsp_reg_write(psmouse, FSP_REG_SYSCTL1, nv) == -1)
++			return (-1);
++	}
++	return (0);
++}
++
++static int
++fsp_page_reg_read(struct psmouse *psmouse, int *reg_val)
++{
++	unsigned char	param[3];
++#ifdef	FSP_DEBUG
++	printk(KERN_INFO "fsp_page_reg_read: READ PAGE REG\n");
++#endif
++	if (fsp_ps2_command(psmouse, NULL, 0x00f3) < 0)
++		return (-1);
++
++	fsp_ps2_command(psmouse, NULL, 0x0066);
++	fsp_ps2_command(psmouse, NULL, 0x0088);
++
++	if (fsp_ps2_command(psmouse, NULL, 0x00f3) < 0)
++		return (-1);
++
++	fsp_ps2_command(psmouse, NULL, 0x0083);
++	fsp_ps2_command(psmouse, NULL, 0x0088);
++
++	/* get the returned result */
++	if (fsp_ps2_command(psmouse, param, PSMOUSE_CMD_GETINFO))
++		return (-1);
++
++	*reg_val = param[2];
++
++	return (0);
++}
++
++static int
++fsp_page_reg_write(struct psmouse *psmouse, int reg_val)
++{
++	unsigned char	v;
++#ifdef	FSP_DEBUG
++	printk(KERN_INFO "fsp_page_reg_write: WRITE PAGE REG\n");
++#endif
++	if (fsp_ps2_command(psmouse, NULL, 0x00f3) < 0)
++		return (-1);
++
++	fsp_ps2_command(psmouse, NULL, 0x0038);
++	fsp_ps2_command(psmouse, NULL, 0x0088);
++
++	if (fsp_ps2_command(psmouse, NULL, 0x00f3) < 0)
++		return (-1);
++
++	if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) {
++		fsp_ps2_command(psmouse, NULL, 0x0047);
++	} else {
++		if ((v = fsp_test_swap_cmd(reg_val)) != reg_val) {
++			/* swapping is required */
++			fsp_ps2_command(psmouse, NULL, 0x0044);
++		} else {
++			/* swapping isn't necessary */
++			fsp_ps2_command(psmouse, NULL, 0x0033);
++		}
++	}
++	fsp_ps2_command(psmouse, NULL, v);
++
++	return (0);
++}
++
++static int
++fsp_batch_write_reg(struct psmouse *psmouse,
++			const unsigned char *params, size_t size)
++{
++	int	i, v;
++
++	if (size == 0)
++		return (0);
++
++	/* begin writing: enable register clock gating */
++	fsp_reg_write_enable(psmouse, 1);
++
++	for (i = v = 0; i < size; i += 2) {
++		if (fsp_reg_write(psmouse, params[i], params[i + 1]) != 0)
++			v = -1;
++	}
++
++	/* complete writing: disable register clock gating */
++	fsp_reg_write_enable(psmouse, 0);
++
++	return (v);
++}
++
++static int
++fsp_device_id(struct psmouse *psmouse)
++{
++	int	id;
++
++	if (fsp_reg_read(psmouse, FSP_REG_DEVICE_ID, &id))
++		return (-1);
++	else
++		return (id);
++}
++
++static int
++fsp_get_version(struct psmouse *psmouse)
++{
++	int	ver;
++
++	if (fsp_reg_read(psmouse, FSP_REG_VERSION, &ver))
++		return (-1);
++	else
++		return (ver);
++}
++
++static int
++fsp_get_revision(struct psmouse *psmouse)
++{
++	int	rev;
++
++	if (fsp_reg_read(psmouse, FSP_REG_REVISION, &rev))
++		return (-1);
++	else
++		return (rev);
++}
++
++static int
++fsp_get_buttons(struct psmouse *psmouse)
++{
++	int	buttons;
++
++	if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS1, &buttons) == -1)
++		return (-1);
++
++	switch (buttons & 0x30) {
++	case 0x30:
++	default:
++		/* Left/Middle/Right */
++		return (0x02);
++
++	case 0x20:
++		/* Left/Middle/Right & Scroll Up/Down */
++		return (0x04);
++
++	case 0x10:
++		/* Left/Middle/Right & Scroll Up/Down/Right/Left */
++		return (0x06);
++
++	case 0x00:
++		/* Left/Middle/Right/Forward/Backward & Scroll Up/Down */
++		return (0x16);
++	}
++}
++
++/** enable on-pad command tag output */
++static int
++fsp_opc_tag_enable(struct psmouse *psmouse, int en)
++{
++	int	v, nv, res = 0;
++
++	if (fsp_reg_read(psmouse, FSP_REG_OPC_QDOWN, &v) == -1) {
++		printk(KERN_ERR "Unable get OPC state.\n");
++		return (-1);
++	}
++	if (en) {
++		nv = v | FSP_BIT_EN_OPC_TAG;
++	} else {
++		nv = v & ~(FSP_BIT_EN_OPC_TAG);
++	}
++	/* only write if necessary */
++	if (nv != v) {
++		fsp_reg_write_enable(psmouse, 1);
++		res = fsp_reg_write(psmouse, FSP_REG_OPC_QDOWN, nv);
++		fsp_reg_write_enable(psmouse, 0);
++	}
++	if (res != 0) {
++		printk(KERN_ERR "Unable to enable OPC tag.\n");
++	}
++	return (res);
++}
++
++/**
++ * set packet format based on the number of buttons current device has
++ */
++static int
++fsp_set_packet_format(struct psmouse *psmouse)
++{
++	struct fsp_data	*ad = psmouse->private;
++	struct ps2dev	*ps2dev = &psmouse->ps2dev;
++	unsigned char	param[2];
++	int		val;
++
++	switch (ad->buttons) {
++	case 0x02:
++		/* Left/Middle/Right */
++	case 0x04:
++		/* Left/Middle/Right & Scroll Up/Down */
++	case 0x16:
++		/* Left/Middle/Right/Forward/Backward & Scroll Up/Down */
++
++		/*
++		 * standard procedure to enter FSP Intellimouse mode
++		 * (scrolling wheel, 4th and 5th buttons)
++		 */
++		param[0] = 200;
++		ps2_command(ps2dev, param, PSMOUSE_CMD_SETRATE);
++		param[0] = 200;
++		ps2_command(ps2dev, param, PSMOUSE_CMD_SETRATE);
++		param[0] =  80;
++		ps2_command(ps2dev, param, PSMOUSE_CMD_SETRATE);
++		ps2_command(ps2dev, param, PSMOUSE_CMD_GETID);
++		if (param[0] != 0x04) {
++			printk(KERN_ERR "Unable to enable 4 bytes packet.\n");
++			psmouse->pktsize = 3;
++			return (-1);
++		}
++		psmouse->pktsize = 4;
++		break;
++	case 0x06:
++		/* Left/Middle/Right & Scroll Up/Down/Right/Left */
++		fsp_reg_read(psmouse, FSP_REG_SYSCTL5, &val);
++		val &= ~(FSP_BIT_EN_MSID7 | FSP_BIT_EN_MSID8 | FSP_BIT_EN_AUTO_MSID8);
++		val |= FSP_BIT_EN_MSID6;
++		if (fsp_reg_write(psmouse, FSP_REG_SYSCTL5, val)) {
++			printk(KERN_ERR "Unable to enable MSID6 mode.\n");
++			return (-1);
++		}
++		psmouse->pktsize = 4;
++		break;
++	default:
++		printk(KERN_ERR "Unknown number of buttons.\n");
++		break;
++	}
++	/*
++	 * enable OPC tags such that driver can tell the difference between
++	 * on-pad and real button click
++	 */
++	return fsp_opc_tag_enable(psmouse, 1);
++}
++
++/*
++ * return 0 if the pad is placed in 180 degree
++ */
++int
++fsp_get_degree(struct psmouse *psmouse)
++{
++	int	degree;
++
++	if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS1, &degree))
++		return (-1);
++	else
++		return (degree & FSP_BIT_NO_ROTATION) ? 1 : 0;
++}
++
++static int
++fsp_onpad_vscr(struct psmouse *psmouse, int enable)
++{
++	struct fsp_data		*ad = psmouse->private;
++	struct fsp_hw_state	*state = &ad->hw_state;
++	int			val;
++
++	if (fsp_reg_read(psmouse, FSP_REG_ONPAD_CTL, &val))
++		return (-1);
++
++	state->onpad_vscroll = (enable == 0) ? 0 : 1;
++
++	if (enable)
++		val |= (FSP_BIT_FIX_VSCR | FSP_BIT_ONPAD_ENABLE);
++	else
++		val &= (0xff ^ FSP_BIT_FIX_VSCR);
++
++	if (fsp_reg_write(psmouse, FSP_REG_ONPAD_CTL, val))
++		return (-1);
++
++	return (0);
++}
++
++static int
++fsp_onpad_hscr(struct psmouse *psmouse, int enable)
++{
++	struct fsp_data		*ad = psmouse->private;
++	struct fsp_hw_state	*state = &ad->hw_state;
++	int			val, v2;
++
++	if (fsp_reg_read(psmouse, FSP_REG_ONPAD_CTL, &val))
++		return (-1);
++
++	if (fsp_reg_read(psmouse, FSP_REG_SYSCTL5, &v2))
++		return (-1);
++
++	state->onpad_hscroll = (enable == 0) ? 0 : 1;
++
++	if (enable) {
++		val |= (FSP_BIT_FIX_HSCR | FSP_BIT_ONPAD_ENABLE);
++		v2 |= FSP_BIT_EN_MSID6;
++	} else {
++		val &= (0xff ^ FSP_BIT_FIX_HSCR);
++		v2 &= ~(FSP_BIT_EN_MSID6 | FSP_BIT_EN_MSID7 | FSP_BIT_EN_MSID8);
++	}
++
++	if (fsp_reg_write(psmouse, FSP_REG_ONPAD_CTL, val))
++		return (-1);
++
++	/* reconfigure horizontal scrolling packet output */
++	if (fsp_reg_write(psmouse, FSP_REG_SYSCTL5, v2))
++		return (-1);
++
++	return (0);
++}
++
++static int
++fsp_onpad_icon(struct psmouse *psmouse, int enable)
++{
++	struct fsp_data		*ad = psmouse->private;
++	struct fsp_hw_state	*state = &ad->hw_state;
++	int			val;
++
++#ifdef	notyet
++	/* switch to register page 1, where icon switch button registers are */
++	fsp_reg_read(psmouse, FSP_REG_PAGE_CTRL, &val);
++	val |= 0x01;
++	if (fsp_reg_write(psmouse, FSP_REG_PAGE_CTRL, val))
++		return (-1);
++
++	fsp_reg_write_enable(psmouse, 1);
++	/* set position of icon switch button */
++	/*
++	 *   XL		XH
++	 *   YL+--------+
++	 *     | sw_btn |	POSITION UNIT IS IN 0.5 SCANLINE
++	 *   YH+--------+
++	 */
++	if (fsp_reg_write(psmouse, FSP_REG_OPTZ_YHI, 0))
++		val = -1;
++	if (fsp_reg_write(psmouse, FSP_REG_OPTZ_YLO, 6))
++		val = -1;
++	if (fsp_reg_write(psmouse, FSP_REG_OPTZ_XHI, 0))
++		val = -1;
++	if (fsp_reg_write(psmouse, FSP_REG_OPTZ_XLO, 6 | 0x80))
++		val = -1;
++	fsp_reg_write_enable(psmouse, 0);
++	if (val == -1)
++		return (-1);
++
++	/* switch back to register page 0 */
++	fsp_reg_read(psmouse, FSP_REG_PAGE_CTRL, &val);
++	val &= ~0x01;
++	if (fsp_reg_write(psmouse, FSP_REG_PAGE_CTRL, val))
++		return (-1);
++#endif
++	/* enable icon switch button and absolute packet */
++	fsp_reg_read(psmouse, FSP_REG_SYSCTL5, &val);
++	val &= ~(FSP_BIT_EN_MSID7 | FSP_BIT_EN_MSID8 | FSP_BIT_EN_AUTO_MSID8);
++
++	if (enable) {
++		val |= (FSP_BIT_EN_MSID8 | FSP_BIT_EN_PKT_G0);
++		state->onpad_icon = 1;
++		state->abs_pkt = 1;
++	} else {
++		state->onpad_icon = 0;
++		state->abs_pkt = 0;
++	}
++
++	if (fsp_reg_write(psmouse, FSP_REG_SYSCTL5, val))
++		return (-1);
++
++	return (0);
++}
++
++/*
++ * It turns out that kernel provided sscanf() was not able to scan numbers
++ * in specified width; therefore, we ended up with rolling our own version
++ * of HEX string to integer helper.
++ */
++static int
++hexstr2int(const char *str, int width)
++{
++	int	i, val, res = 0;
++
++	if (width > sizeof(int))
++		return (res);
++
++	for (i = 0; i < width; i++) {
++		const char	*ptr = &str[i];
++
++		if (!isxdigit(*ptr))
++			break;
++
++		val = isdigit(*ptr) ? *ptr - '0' : toupper(*ptr)- 'A' + 10;
++		res = res * 16 + val;
++	}
++	return (res);
++}
++
++static ssize_t
++psmouse_attr_show_setreg(struct psmouse *psmouse, void *data, char *buf)
++{
++	/* do nothing */
++	return (0);
++}
++
++/*
++ * Write device specific initial parameters.
++ *
++ * ex: abcdc00d -- write 0xcd to register 0xab and 0x0d to 0xc0
++ */
++static ssize_t
++psmouse_attr_set_setreg(struct psmouse *psmouse, void *data,
++				const char *buf, size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++	int		i, len, val;
++
++	if ((count % 4) != 0)
++		return (-EINVAL);
++
++	if ((len = (count >> 1)) >= sizeof(ad->init_params))
++		return (-ENOMEM);
++
++	for (i = 0; i < len; i += 2) {
++		val = hexstr2int(&buf[i << 1], 4);
++		ad->init_params[i] = (val >> 8) & 0xff;
++		ad->init_params[i + 1] = val & 0xff;
++	}
++	ad->init_params_len = len;
++	fsp_batch_write_reg(psmouse, ad->init_params, len);
++
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(setreg, S_IWUSR | S_IRUGO, NULL,
++	psmouse_attr_show_setreg, psmouse_attr_set_setreg);
++
++static ssize_t
++psmouse_attr_show_getreg(struct psmouse *psmouse, void *data, char *buf)
++{
++	struct fsp_data	*ad = psmouse->private;
++
++	buf[0] = 0;
++	return sprintf(buf, "%04x\n", ad->last_reg_val);
++}
++
++/*
++ * Read a register from device.
++ *
++ * ex: ab -- read content from register 0xab
++ */
++static ssize_t
++psmouse_attr_set_getreg(struct psmouse *psmouse, void *data, const char *buf,
++				size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++	int		reg, val;
++
++	if (count != 2)
++		return (-EINVAL);
++
++	reg = hexstr2int(buf, 2);
++
++	if (fsp_reg_read(psmouse, reg, &val))
++		return (-ENODEV);
++
++	ad->last_reg_val = (reg << 8) | val;
++
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(getreg, S_IWUSR | S_IRUGO, NULL,
++	psmouse_attr_show_getreg, psmouse_attr_set_getreg);
++
++static ssize_t
++psmouse_attr_show_pagereg(struct psmouse *psmouse, void *data, char *buf)
++{
++	int	val;
++
++	buf[0] = 0;
++
++	if (fsp_page_reg_read(psmouse, &val))
++		return (-ENODEV);
++
++	return sprintf(buf, "%02x\n", val);
++}
++
++static ssize_t
++psmouse_attr_set_pagereg(struct psmouse *psmouse, void *data, const char *buf,
++				size_t count)
++{
++	int	val;
++
++	if (count != 2)
++		return (-EINVAL);
++
++	val = hexstr2int(buf, 2);
++
++	if (fsp_page_reg_write(psmouse, val))
++		return (-ENODEV);
++
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(page, S_IWUSR | S_IRUGO, NULL,
++	psmouse_attr_show_pagereg, psmouse_attr_set_pagereg);
++
++static ssize_t
++psmouse_attr_show_ps2(struct psmouse *psmouse, void *data, char *buf)
++{
++	struct fsp_data	*ad = psmouse->private;
++	char		tmp[2];
++	int		i, len;
++
++	for (i = len = 0; i < ad->resp_cnt; i++) {
++		len += sprintf(tmp, "%02x", ad->resp[i]);
++		strcat(buf, tmp);
++	}
++	strcat(buf, "\n");
++	return (len + 1);
++}
++
++static ssize_t
++psmouse_attr_set_ps2(struct psmouse *psmouse, void *data, const char *buf,
++			size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++	struct ps2dev	*ps2dev = &psmouse->ps2dev;
++	int		v;
++
++	if (count != 4)
++		return (-EINVAL);
++
++	v = hexstr2int(buf, 4);
++
++	if (ps2_command(ps2dev, ad->resp, v) != -1) {
++		ad->resp_cnt = (v >> 8) & (FSP_RESP_PKT_MAXLEN - 1);
++	} else {
++		ad->resp_cnt = 0;
++	}
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(ps2, S_IWUSR | S_IRUGO, NULL,
++	psmouse_attr_show_ps2, psmouse_attr_set_ps2);
++
++static ssize_t
++psmouse_attr_show_vscroll(struct psmouse *psmouse, void *data, char *buf)
++{
++	struct fsp_data	*ad = psmouse->private;
++
++	return sprintf(buf, "%d\n", ad->hw_state.onpad_vscroll ? 1 : 0);
++}
++
++static ssize_t
++psmouse_attr_set_vscroll(struct psmouse *psmouse, void *data, const char *buf,
++				size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++	unsigned long	val;
++	char		*rest;
++
++	val = simple_strtoul(buf, &rest, 10);
++
++	if (*rest || (val > 1))
++		return (-EINVAL);
++
++	ad->hw_state.onpad_vscroll = val;
++	fsp_onpad_vscr(psmouse, val);
++
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(vscroll, S_IWUSR | S_IRUGO | S_IWUGO, NULL,
++	psmouse_attr_show_vscroll, psmouse_attr_set_vscroll);
++
++static ssize_t
++psmouse_attr_show_hscroll(struct psmouse *psmouse, void *data, char *buf)
++{
++	struct fsp_data	*ad = psmouse->private;
++
++	return sprintf(buf, "%d\n", ad->hw_state.onpad_hscroll ? 1 : 0);
++}
++
++static ssize_t
++psmouse_attr_set_hscroll(struct psmouse *psmouse, void *data, const char *buf,
++				size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++	unsigned long	val;
++	char		*rest;
++
++	val = simple_strtoul(buf, &rest, 10);
++
++	if (*rest || (val > 1))
++		return (-EINVAL);
++
++	ad->hw_state.onpad_hscroll = val;
++	fsp_onpad_hscr(psmouse, val);
++
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(hscroll, S_IWUSR | S_IRUGO | S_IWUGO, NULL,
++	psmouse_attr_show_hscroll, psmouse_attr_set_hscroll);
++
++static ssize_t
++psmouse_attr_show_onpadicon(struct psmouse *psmouse, void *data, char *buf)
++{
++	struct fsp_data	*ad = psmouse->private;
++
++	return sprintf(buf, "%d\n", ad->hw_state.onpad_icon ? 1 : 0);
++}
++
++static ssize_t
++psmouse_attr_set_onpadicon(struct psmouse *psmouse, void *data,
++				const char *buf, size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++	unsigned long	val;
++	char		*rest;
++
++	val = simple_strtoul(buf, &rest, 10);
++
++	if (*rest || (val > 1))
++		return (-EINVAL);
++
++	ad->hw_state.onpad_icon = val;
++	fsp_onpad_icon(psmouse, val);
++
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(onpadicon, S_IWUSR | S_IRUGO | S_IWUGO, NULL,
++	psmouse_attr_show_onpadicon, psmouse_attr_set_onpadicon);
++
++static ssize_t
++psmouse_attr_show_pktfmt(struct psmouse *psmouse, void *data, char *buf)
++{
++	struct fsp_data	*ad = psmouse->private;
++
++	return sprintf(buf, "%d\n", ad->hw_state.pkt_fmt);
++}
++
++static ssize_t
++psmouse_attr_set_pktfmt(struct psmouse *psmouse, void *data,
++				const char *buf, size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++	unsigned long	val;
++	char		*rest;
++
++	val = simple_strtoul(buf, &rest, 10);
++
++	if (*rest || (val > 2))
++		return (-EINVAL);
++
++	ad->hw_state.pkt_fmt = val;
++	/* TODO need full G0/A0 abs. packet setup */
++
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(pktfmt, S_IWUSR | S_IRUGO | S_IWUGO, NULL,
++	psmouse_attr_show_pktfmt, psmouse_attr_set_pktfmt);
++
++static ssize_t
++psmouse_attr_show_flags(struct psmouse *psmouse, void *data, char *buf)
++{
++	struct fsp_data	*ad = psmouse->private;
++
++	return sprintf(buf, "%c%c%c%c%c%c\n",
++		ad->flags & FSPDRV_FLAG_OPICON_KEY ? 'K' : 'k',
++		ad->flags & FSPDRV_FLAG_OPICON_BTN ? 'B' : 'b',
++		ad->flags & FSPDRV_FLAG_REVERSE_X ? 'X' : 'x',
++		ad->flags & FSPDRV_FLAG_REVERSE_Y ? 'Y' : 'y',
++		ad->flags & FSPDRV_FLAG_AUTO_SWITCH ? 'A' : 'a',
++		ad->flags & FSPDRV_FLAG_EN_OPC ? 'C' : 'c');
++}
++
++static ssize_t
++psmouse_attr_set_flags(struct psmouse *psmouse, void *data,
++				const char *buf, size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++	size_t		i;
++
++	for (i = 0; i < count; i++) {
++		switch (buf[i]) {
++		case 'B':
++			ad->flags |= FSPDRV_FLAG_OPICON_BTN;
++			break;
++		case 'b':
++			ad->flags &= ~FSPDRV_FLAG_OPICON_BTN;
++			break;
++		case 'K':
++			ad->flags |= FSPDRV_FLAG_OPICON_KEY;
++			break;
++		case 'k':
++			ad->flags &= ~FSPDRV_FLAG_OPICON_KEY;
++			break;
++		case 'X':
++			ad->flags |= FSPDRV_FLAG_REVERSE_X;
++			break;
++		case 'x':
++			ad->flags &= ~FSPDRV_FLAG_REVERSE_X;
++			break;
++		case 'Y':
++			ad->flags |= FSPDRV_FLAG_REVERSE_Y;
++			break;
++		case 'y':
++			ad->flags &= ~FSPDRV_FLAG_REVERSE_Y;
++			break;
++		case 'A':
++			ad->flags |= FSPDRV_FLAG_AUTO_SWITCH;
++			break;
++		case 'a':
++			ad->flags &= ~FSPDRV_FLAG_AUTO_SWITCH;
++			break;
++		case 'C':
++			ad->flags |= FSPDRV_FLAG_EN_OPC;
++			break;
++		case 'c':
++			ad->flags &= ~FSPDRV_FLAG_EN_OPC;
++			break;
++		case 'R':
++		case 'r':
++			/* hack: reset pad */
++#ifdef	FSP_DEBUG
++			printk(KERN_INFO "Resetting FSP...\n");
++#endif
++			/* disable on-pad vertical scrolling */
++			fsp_onpad_vscr(psmouse, 0);
++			/* disable on-pad horizontal scrolling */
++			fsp_onpad_hscr(psmouse, 0);
++
++			/*
++			 * disable on-pad switching icon and absolute packet
++			 * mode
++			 */
++			fsp_onpad_icon(psmouse, 0);
++			/* reload custom initial parameters */
++			fsp_reset(psmouse);
++			/* re-initialise output packet format */
++			fsp_set_packet_format(psmouse);
++			break;
++		default:
++			return (-EINVAL);
++		}
++	}
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(flags, S_IWUSR | S_IRUGO | S_IWUGO, NULL,
++	psmouse_attr_show_flags, psmouse_attr_set_flags);
++
++static ssize_t
++psmouse_attr_show_ver(struct psmouse *psmouse, void *data, char *buf)
++{
++	return sprintf(buf, "Sentelic FSP kernel module %d.%d.%d\n",
++		fsp_drv_ver[0], fsp_drv_ver[1], fsp_drv_ver[2]);
++}
++
++static ssize_t
++psmouse_attr_set_ver(struct psmouse *psmouse, void *data,
++				const char *buf, size_t count)
++{
++	/* do nothing */
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(ver, S_IRUSR | S_IRUGO, NULL,
++	psmouse_attr_show_ver, psmouse_attr_set_ver);
++
++static ssize_t
++psmouse_attr_show_accel(struct psmouse *psmouse, void *data, char *buf)
++{
++	struct fsp_data	*ad = psmouse->private;
++
++	return sprintf(buf, "%d %d %d\n",
++		ad->accel_num, ad->accel_denom, ad->accel_threshold);
++}
++
++static ssize_t
++psmouse_attr_set_accel(struct psmouse *psmouse, void *data,
++				const char *buf, size_t count)
++{
++	struct fsp_data	*ad = psmouse->private;
++
++	sscanf(buf, "%d %d %d",
++		&ad->accel_num, &ad->accel_denom, &ad->accel_threshold);
++
++	/* sanity check */
++	if (ad->accel_num <= 0)
++		ad->accel_num = DEFAULT_ACCEL_NUM;
++
++	/* prevent dividing by zero */
++	if (ad->accel_denom <= 0)
++		ad->accel_denom = DEFAULT_ACCEL_DENOM;
++
++	if (ad->accel_threshold <= 0)
++		ad->accel_threshold = DEFAULT_ACCEL_THRESHOLD;
++
++	return (count);
++}
++
++PSMOUSE_DEFINE_ATTR(accel, S_IWUSR | S_IRUGO | S_IWUGO, NULL,
++	psmouse_attr_show_accel, psmouse_attr_set_accel);
++
++int
++fsp_reset(struct psmouse *psmouse)
++{
++	/* TODO: reset initial parameters */
++	return (0);
++}
++
++static int
++fsp_reconnect(struct psmouse *psmouse)
++{
++	int		version;
++
++	if (fsp_detect(psmouse, 0) < 0)
++		return (-1);
++
++	if ((version = fsp_get_version(psmouse)) < 0)
++		return (-1);
++
++	fsp_reset(psmouse);
++
++	return (0);
++}
++
++static void
++fsp_remove_sysfs(struct psmouse *psmouse)
++{
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_setreg.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_getreg.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_page.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_ps2.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_vscroll.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_hscroll.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_onpadicon.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_pktfmt.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_flags.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_ver.dattr);
++	device_remove_file(&psmouse->ps2dev.serio->dev,
++				&psmouse_attr_accel.dattr);
++}
++
++static void
++fsp_disconnect(struct psmouse *psmouse)
++{
++	fsp_remove_sysfs(psmouse);
++	fsp_opc_tag_enable(psmouse, 0);
++	fsp_reset(psmouse);
++	kfree(psmouse->private);
++}
++
++int
++fsp_detect(struct psmouse *psmouse, int set_properties)
++{
++	int	rc;
++
++	if (fsp_device_id(psmouse) != 0x01)
++		return (-1);
++
++	if (set_properties) {
++		psmouse->vendor = "Sentelic";
++		psmouse->name = "FingerSensingPad";
++
++		/*
++		 * register sysfs callbacks for userland program to set
++		 * initial parameters
++		 */
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_setreg.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_getreg.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_page.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_ps2.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_vscroll.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_hscroll.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_onpadicon.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_pktfmt.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_flags.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_ver.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++
++		rc = device_create_file(&psmouse->ps2dev.serio->dev,
++					&psmouse_attr_accel.dattr);
++		if (rc)
++			goto sysfs_creation_failed;
++	}
++	return (0);
++sysfs_creation_failed:
++	fsp_remove_sysfs(psmouse);
++	printk(KERN_ERR "failed to create sysfs node(%d)", rc);
++	return (-1);
++}
++
++static void
++fsp_set_input_params(struct psmouse *psmouse)
++{
++	struct fsp_data		*ad = psmouse->private;
++	struct fsp_hw_state	*state = &ad->hw_state;
++
++	if (state->abs_pkt == 0) {
++		set_bit(BTN_MIDDLE, psmouse->dev->keybit);
++		set_bit(REL_WHEEL, psmouse->dev->relbit);
++		set_bit(REL_HWHEEL, psmouse->dev->relbit);
++
++		set_bit(EV_REL, psmouse->dev->evbit);
++		set_bit(REL_X, psmouse->dev->relbit);
++		set_bit(REL_Y, psmouse->dev->relbit);
++
++		set_bit(BTN_BACK, psmouse->dev->keybit);
++		set_bit(BTN_FORWARD, psmouse->dev->keybit);
++
++		clear_bit(EV_ABS, psmouse->dev->evbit);
++		clear_bit(BTN_SIDE, psmouse->dev->keybit);
++		clear_bit(BTN_EXTRA, psmouse->dev->keybit);
++	} else {
++		/* enable absolute packet mode */
++		set_bit(EV_ABS, psmouse->dev->evbit);
++
++		input_set_abs_params(psmouse->dev, ABS_X,
++			0, 1023, 0, 0);
++		input_set_abs_params(psmouse->dev, ABS_Y,
++			0, 767, 0, 0);
++
++		/* no more relative coordinates */
++		clear_bit(EV_REL, psmouse->dev->evbit);
++		clear_bit(REL_X, psmouse->dev->relbit);
++		clear_bit(REL_Y, psmouse->dev->relbit);
++	}
++}
++
++static psmouse_ret_t
++fsp_process_byte(struct psmouse *psmouse
++#if	LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
++, struct pt_regs *regs
++#endif
++)
++{
++	struct input_dev	*dev = psmouse->dev;
++	struct fsp_data		*ad = psmouse->private;
++	unsigned char		*packet = psmouse->packet;
++	unsigned char		button_status = 0, lscroll, rscroll;
++#ifdef	FSP_DEBUG
++	unsigned int		jiffies_msec;
++#endif
++	static unsigned short	prev_abs_x, prev_abs_y;
++	unsigned short		abs_x, abs_y;
++	int			rel_x, rel_y;
++
++	if (psmouse->pktcnt < 4)
++		return (PSMOUSE_GOOD_DATA);
++
++	if (psmouse->ps2dev.flags != 0) {
++		/*
++		 * XXX need to find the root cause that makes commanding
++		 * packet leaking to this function.
++		 *
++		 * Perhaps our own version of ps2_command() is out of date?
++		 */
++		return (PSMOUSE_GOOD_DATA);
++	}
++
++	/*
++	 * Full packet accumulated, process it
++	 */
++	lscroll = rscroll = 0;
++
++	switch (psmouse->packet[0] >> FSP_PKT_TYPE_SHIFT) {
++	case FSP_PKT_TYPE_ABS:
++		abs_x = (packet[1] << 2) | ((packet[3] >> 2) & 0x03);
++		abs_y = (packet[2] << 2) | (packet[3] & 0x03);
++
++		if (abs_x && abs_y) {
++			/* no X/Y directional reversal when finger is up */
++			if (ad->flags & FSPDRV_FLAG_REVERSE_X)
++				abs_x = 1023 - abs_x;
++			if (ad->flags & FSPDRV_FLAG_REVERSE_Y)
++				abs_y = 767 - abs_y;
++			prev_abs_x = abs_x;
++			prev_abs_y = abs_y;
++		}
++		if (ad->flags & (FSPDRV_FLAG_OPICON_BTN | FSPDRV_FLAG_OPICON_KEY)) {
++			/* do nothing */
++		} else {
++			input_report_key(dev, BTN_LEFT, packet[0] & 1);
++			input_report_key(dev, BTN_MIDDLE, (packet[0] >> 2) & 1);
++			input_report_key(dev, BTN_RIGHT, (packet[0] >> 1) & 1);
++#if	0
++			/* vscroll down */
++			input_report_key(dev, BTN_BACK, (packet[3] >> 5) & 1);
++			/* vscroll up */
++			input_report_key(dev, BTN_FORWARD, (packet[3] >> 4) & 1);
++			/* rscroll */
++			input_report_key(dev, BTN_RIGHT, (packet[3] >> 7) & 1);
++			/* lscroll */
++			input_report_key(dev, BTN_LEFT, (packet[3] >> 6) & 1);
++#endif
++		}
++		input_report_abs(dev, ABS_X, prev_abs_x);
++		input_report_abs(dev, ABS_Y, prev_abs_y);
++		break;
++	case FSP_PKT_TYPE_NORMAL_OPC:
++		/* on-pad click, filter it if necessary */
++		if ((ad->flags & FSPDRV_FLAG_EN_OPC) != FSPDRV_FLAG_EN_OPC) {
++			packet[0] &= ~BIT(0);
++		}
++		/* fall through */
++	case FSP_PKT_TYPE_NORMAL:
++		/* normal packet */
++		/* special packet data translation from on-pad packets */
++		if (packet[3] != 0) {
++			if (packet[3] & BIT(0)) {
++				button_status |= 0x01;	/* wheel down */
++			}
++			if (packet[3] & BIT(1)) {
++				button_status |= 0x0f;	/* wheel up */
++			}
++			if (packet[3] & BIT(2)) {
++				button_status |= BIT(5);/* horizontal left */
++			}
++			if (packet[3] & BIT(3)) {
++				button_status |= BIT(4);/* horizontal right */
++			}
++			/* push back to packet queue */
++			if (button_status != 0)
++				packet[3] = button_status;
++			rscroll = (packet[3] >> 4) & 1;
++			lscroll = (packet[3] >> 5) & 1;
++		}
++		/*
++		 * Processing wheel up/down and extra button events
++		 */
++		input_report_rel(dev, REL_WHEEL, (int)(packet[3] & 8) - (int)(packet[3] & 7));
++		input_report_rel(dev, REL_HWHEEL, lscroll - rscroll);
++		input_report_key(dev, BTN_BACK, lscroll);
++		input_report_key(dev, BTN_FORWARD, rscroll);
++
++		/*
++		 * Generic PS/2 Mouse
++		 */
++		input_report_key(dev, BTN_LEFT, packet[0] & 1);
++		input_report_key(dev, BTN_MIDDLE, (packet[0] >> 2) & 1);
++		input_report_key(dev, BTN_RIGHT, (packet[0] >> 1) & 1);
++
++		/* perform acceleration */
++		rel_x = packet[1] ? (int)packet[1] - (int)((packet[0] << 4) & 0x100) : 0;
++		rel_y = packet[2] ? (int)((packet[0] << 3) & 0x100) - (int)packet[2] : 0;
++
++		if (abs(rel_x) > ad->accel_threshold) {
++			rel_x = rel_x * ad->accel_num / ad->accel_denom;
++		}
++		if (abs(rel_y) > ad->accel_threshold) {
++			rel_y = rel_y * ad->accel_num / ad->accel_denom;
++		}
++		input_report_rel(dev, REL_X, rel_x);
++		input_report_rel(dev, REL_Y, rel_y);
++		break;
++	}
++
++	input_sync(dev);
++
++#ifdef	FSP_DEBUG
++	ps2_packet_cnt++;
++	jiffies_msec = jiffies_to_msecs(jiffies);
++	printk(KERN_INFO "%08dms PS/2 packets: %02x, %02x, %02x, %02x\n", jiffies_msec, packet[0], packet[1], packet[2], packet[3]);
++
++	if (jiffies_msec - ps2_last_second > 1000) {
++		printk(KERN_INFO "PS/2 packets/sec = %d\n", ps2_packet_cnt);
++		ps2_packet_cnt = 0;
++		ps2_last_second = jiffies_msec;
++	}
++#endif
++	return (PSMOUSE_FULL_PACKET);
++}
++
++int
++fsp_init(struct psmouse *psmouse)
++{
++	struct fsp_data	*priv;
++	int		ver;
++
++	if ((ver = fsp_get_version(psmouse)) < 0)
++		return (-1);
++
++	if (!(priv = kzalloc(sizeof(struct fsp_data), GFP_KERNEL)))
++		return (-ENOMEM);
++
++	psmouse->private = priv;
++
++	priv->ver = ver;
++	priv->rev = fsp_get_revision(psmouse);
++	priv->buttons = fsp_get_buttons(psmouse);
++
++	/* enable on-pad click by default */
++	priv->flags |= FSPDRV_FLAG_EN_OPC;
++
++	switch (priv->buttons) {
++	case 0x06:
++		priv->hw_state.btn_fbbb = 0;
++		priv->hw_state.btn_slsr = 1;
++		break;
++	case 0x16:
++		priv->hw_state.btn_fbbb = 1;
++		priv->hw_state.btn_slsr = 0;
++		break;
++	default:
++		priv->hw_state.btn_fbbb = 0;
++		priv->hw_state.btn_slsr = 0;
++		break;
++	}
++	psmouse->protocol_handler = fsp_process_byte;
++	psmouse->disconnect = fsp_disconnect;
++	psmouse->reconnect = fsp_reconnect;
++
++	/* report hardware information */
++	printk(KERN_INFO "Finger Sensing Pad, hw: %d.%d.%d, sw: %d.%d.%d, buttons: %d\n",
++		(priv->ver >> 4), (priv->ver & 0x0F), priv->rev,
++		fsp_drv_ver[0], fsp_drv_ver[1], fsp_drv_ver[2],
++		priv->buttons & 7);
++
++	/* set default acceleration parameters */
++	priv->accel_num = DEFAULT_ACCEL_NUM;
++	priv->accel_denom = DEFAULT_ACCEL_DENOM;
++	priv->accel_threshold = DEFAULT_ACCEL_THRESHOLD;
++
++	/* set default packet output based on number of buttons we found */
++	fsp_set_packet_format(psmouse);
++
++	/* disable on-pad vertical scrolling */
++	//fsp_onpad_vscr(psmouse, 0);
++
++	/* disable on-pad horizontal scrolling */
++	fsp_onpad_hscr(psmouse, 0);
++
++	/* disable on-pad switching icon and absolute packet mode */
++	fsp_onpad_icon(psmouse, 0);
++
++	/* set various supported input event bits */
++	fsp_set_input_params(psmouse);
++
++	return (0);
++}
+diff --git a/drivers/input/mouse/sentelic.h b/drivers/input/mouse/sentelic.h
+new file mode 100644
+index 0000000..8fcaa40
+--- /dev/null
++++ b/drivers/input/mouse/sentelic.h
+@@ -0,0 +1,136 @@
++/*-
++ * Finger Sensing Pad PS/2 mouse driver.
++ *
++ * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
++ * Copyright (C) 2005-2008 Tai-hwa Liang, Sentelic Corporation.
++ *
++ *   This program is free software; you can redistribute it and/or
++ *   modify it under the terms of the GNU General Public License
++ *   as published by the Free Software Foundation; either version 2
++ *   of the License, or (at your option) any later version.
++ *
++ *   This program is distributed in the hope that it will be useful,
++ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *   GNU General Public License for more details.
++ *
++ *   You should have received a copy of the GNU General Public License
++ *   along with this program; if not, write to the Free Software
++ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ * $Id: sentelic.h 28700 2008-10-16 07:23:43Z avatar $
++ */
++
++#ifndef	__SENTELIC_H__
++#define	__SENTELIC_H__
++
++#if	defined(__KERNEL__)
++extern int fsp_detect(struct psmouse *psmouse, int set_properties);
++extern int fsp_init(struct psmouse *psmouse);
++extern int fsp_reset(struct psmouse *psmouse);
++#endif
++
++/* Finger-sensing Pad information registers */
++#define	FSP_REG_DEVICE_ID	0x00
++#define	FSP_REG_VERSION		0x01
++#define	FSP_REG_REVISION	0x04
++#define	FSP_REG_TMOD_STATUS1	0x0B
++#define	FSP_BIT_NO_ROTATION	BIT(3)
++#define	FSP_REG_PAGE_CTRL	0x0F
++
++/* Finger-sensing Pad control registers */
++#define	FSP_REG_SYSCTL1		0x10
++#define	FSP_BIT_EN_REG_CLK	BIT(5)
++#define	FSP_REG_OPC_QDOWN	0x31
++#define	FSP_BIT_EN_OPC_TAG	BIT(7)
++#define	FSP_REG_OPTZ_XLO	0x34
++#define	FSP_REG_OPTZ_XHI	0x35
++#define	FSP_REG_OPTZ_YLO	0x36
++#define	FSP_REG_OPTZ_YHI	0x37
++#define	FSP_REG_SYSCTL5		0x40
++#define	FSP_BIT_90_DEGREE	BIT(0)
++#define	FSP_BIT_EN_MSID6	BIT(1)
++#define	FSP_BIT_EN_MSID7	BIT(2)
++#define	FSP_BIT_EN_MSID8	BIT(3)
++#define	FSP_BIT_EN_AUTO_MSID8	BIT(5)
++#define	FSP_BIT_EN_PKT_G0	BIT(6)
++
++#define	FSP_REG_ONPAD_CTL	0x43
++#define	FSP_BIT_ONPAD_ENABLE	BIT(0)
++#define	FSP_BIT_ONPAD_FBBB	BIT(1)
++#define	FSP_BIT_FIX_VSCR	BIT(3)
++#define	FSP_BIT_FIX_HSCR	BIT(5)
++#define	FSP_BIT_DRAG_LOCK	BIT(6)
++
++/* Finger-sensing Pad packet formating related definitions */
++
++/* absolute packet type */
++#define	FSP_PKT_TYPE_NORMAL	(0x00)
++#define	FSP_PKT_TYPE_ABS	(0x01)
++#define	FSP_PKT_TYPE_NOTIFY	(0x02)
++#define	FSP_PKT_TYPE_NORMAL_OPC	(0x03)
++#define	FSP_PKT_TYPE_SHIFT	(6)
++
++struct fsp_hw_state
++{
++	unsigned char	onpad_vscroll:1,/* On-pad vertical scroll zone */
++			onpad_hscroll:1,/* On-pad horizontal scroll zone */
++			onpad_icon:1,	/* On-pad icons */
++			btn_fbbb:1,	/* Forward/backward button */
++			btn_slsr:1,	/* Scroll left/right button */
++			abs_pkt:1,	/* absolute packet mode */
++			pkt_fmt:2;	/* packet format */
++	unsigned int	reg_val;	/* used by reg_write sysctl */
++};
++
++struct fsp_data
++{
++	unsigned int		flags;
++#define FSPDRV_FLAG_CMD		(0x010)	/* The command bit of flags indicates the special FSP PS/2 command is sent. */
++#define FSPDRV_FLAG_RESP	(0x020)	/* The response bit of flags indicates the special FSP PS/2 comamnd is sent and response is received. */
++#define FSPDRV_FLAG_OPICON_BTN	(0x040)	/* Output on-pad icons as BTN events */
++#define FSPDRV_FLAG_OPICON_KEY	(0x080)	/* Output on-pad icons as KEY events */
++#define	FSPDRV_FLAG_REVERSE_X	(0x100)	/* reverse X direction */
++#define	FSPDRV_FLAG_REVERSE_Y	(0x200)	/* reverse Y direction */
++#define	FSPDRV_FLAG_AUTO_SWITCH	(0x400)	/* software on-pad icon auto switch */
++#define	FSPDRV_FLAG_EN_OPC	(0x800)	/* enable on-pad clicking */
++#define FSP_RESP_PKT_MAXLEN	(8)	/* The max response packet size. */
++	unsigned char 		cmd;	/* The buffer used to store the sending PS/2 command */
++	unsigned char 		resp[FSP_RESP_PKT_MAXLEN]; /* The buffer used to store the response of PS/2 command */
++	int			resp_cnt;	/* The command count in resp buffer */
++	unsigned char		buttons;	/* Number of buttons */
++	unsigned char		ver;		/* hardware version */
++	unsigned char		rev;		/* hardware revison */
++	unsigned int		mode;		/* device mode */
++#define	FSPDRV_MODE_BTN_RIGHT	BIT(0)
++#define	FSPDRV_MODE_BTN_MIDDLE	BIT(1)
++#define	FSPDRV_MODE_BTN_LEFT	BIT(2)
++#define	FSPDRV_MODE_BTN_SCRD	BIT(3)
++#define	FSPDRV_MODE_BTN_SCRU	BIT(4)
++#define	FSPDRV_MODE_BTN_SCRL	BIT(5)
++#define	FSPDRV_MODE_BTN_SCRR	BIT(6)
++#define	FSPDRV_MODE_BTN_FB	BIT(7)
++#define	FSPDRV_MODE_BTN_BB	BIT(8)
++	unsigned char		button_status;
++	unsigned int		last_reg_val;
++
++/** default acceleration numerator */
++#define	DEFAULT_ACCEL_NUM	(2)
++	/** numerator for the acceleration multiplier */
++	int			accel_num;
++/** default acceleration denominator */
++#define	DEFAULT_ACCEL_DENOM	(1)
++	/** denominator for the acceleration multiplier */
++	int			accel_denom;
++/** default acceleration threshold */
++#define	DEFAULT_ACCEL_THRESHOLD	(4)
++
++	/** acceleration threshold */
++	int			accel_threshold;
++#define	FSPDRV_SET_REG_BUF_LEN	(256)
++	unsigned char		init_params[FSPDRV_SET_REG_BUF_LEN];
++	size_t			init_params_len;
++	struct fsp_hw_state	hw_state;
++};
++
++#endif	/* !__SENTELIC_H__ */
+diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
+index 170f71e..505c0a8 100644
+--- a/drivers/input/serio/i8042.c
++++ b/drivers/input/serio/i8042.c
+@@ -143,7 +143,7 @@ static int i8042_wait_write(void)
+  * of the i8042 down the toilet.
+  */
+ 
+-static int i8042_flush(void)
++int i8042_flush(void)
+ {
+ 	unsigned long flags;
+ 	unsigned char data, str;
+@@ -716,15 +716,27 @@ static int i8042_controller_selftest(void)
+ 	if (!i8042_reset)
+ 		return 0;
+ 
++	if (1) {
++		unsigned char ctr;
++		ctr |= I8042_CTR_KBDDIS;
++		ctr &= ~I8042_CTR_KBDINT;
++
++		printk("Disable kbd before selftest\n");
++		if (i8042_command(&ctr, I8042_CMD_CTL_WCTR)) {
++			printk(KERN_ERR "i8042.c: Failed to disable KBD port.\n");
++			return -EIO;
++		}
++	}
++
+ 	if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
+ 		printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
+-		return -ENODEV;
++		//return -ENODEV;
+ 	}
+ 
+ 	if (param != I8042_RET_CTL_TEST) {
+ 		printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
+ 			 param, I8042_RET_CTL_TEST);
+-		return -EIO;
++		//return -EIO;
+ 	}
+ 
+ 	return 0;
+@@ -746,7 +758,7 @@ static int i8042_controller_init(void)
+ 
+ 	if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
+ 		printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
+-		return -EIO;
++		//return -EIO;
+ 	}
+ 
+ 	i8042_initial_ctr = i8042_ctr;
+@@ -795,7 +807,7 @@ static int i8042_controller_init(void)
+ 
+ 	if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
+ 		printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
+-		return -EIO;
++		//return -EIO;
+ 	}
+ 
+ 	return 0;
+@@ -956,7 +968,7 @@ static int i8042_resume(struct platform_device *dev)
+ 		msleep(50);
+ 		if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
+ 			printk(KERN_ERR "i8042: CTR write retry failed\n");
+-			return -EIO;
++			//return -EIO;
+ 		}
+ 	}
+ 
+@@ -1181,6 +1193,7 @@ static int __devinit i8042_probe(struct platform_device *dev)
+ 		return error;
+ 
+ 	error = i8042_controller_init();
++	error = 0; //FIXME
+ 	if (error)
+ 		return error;
+ 
+@@ -1192,13 +1205,13 @@ static int __devinit i8042_probe(struct platform_device *dev)
+ 	if (!i8042_noaux) {
+ 		error = i8042_setup_aux();
+ 		if (error && error != -ENODEV && error != -EBUSY)
+-			goto out_fail;
++			;//goto out_fail; //FIXME
+ 	}
+ 
+ 	if (!i8042_nokbd) {
+ 		error = i8042_setup_kbd();
+ 		if (error)
+-			goto out_fail;
++			;//goto out_fail; //FIXME
+ 	}
+ /*
+  * Ok, everything is ready, let's register all serio ports
+diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h
+index bafe340..0b9dd1a 100644
+--- a/drivers/media/video/uvc/uvcvideo.h
++++ b/drivers/media/video/uvc/uvcvideo.h
+@@ -634,6 +634,7 @@ struct uvc_device {
+ 	/* Status Interrupt Endpoint */
+ 	struct usb_host_endpoint *int_ep;
+ 	struct urb *int_urb;
++	__u32  padding[7];
+ 	__u8 status[16];
+ 	struct input_dev *input;
+ 
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index a726f3b..bbc459a 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -475,4 +475,6 @@ config SGI_GRU_DEBUG
+ 	This option enables addition debugging code for the SGI GRU driver. If
+ 	you are unsure, say N.
+ 
++source drivers/misc/loongson/Kconfig
++
+ endif # MISC_DEVICES
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index c6c13f6..e5e29db 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -30,3 +30,4 @@ obj-$(CONFIG_KGDB_TESTS)	+= kgdbts.o
+ obj-$(CONFIG_SGI_XP)		+= sgi-xp/
+ obj-$(CONFIG_SGI_GRU)		+= sgi-gru/
+ obj-$(CONFIG_HP_ILO)		+= hpilo.o
++obj-$(CONFIG_CPU_LOONGSON2) 	+= loongson/
+diff --git a/drivers/misc/loongson/Kconfig b/drivers/misc/loongson/Kconfig
+new file mode 100644
+index 0000000..14be4a7
+--- /dev/null
++++ b/drivers/misc/loongson/Kconfig
+@@ -0,0 +1,60 @@
++#
++# Yeeloong various drivers
++#
++menuconfig LOONGSON2_PLATFROM_SUPPORT
++	bool "Loongson Platfrom Drivers Support"
++	depends on CPU_LOONGSON2
++	default y
++	help
++	 Say Y here to enable support various drivers on the loongson2 platfrom	
++
++if LOONGSON2_PLATFROM_SUPPORT
++
++config EC_COMMON_OPERATION
++	bool "Yeeloong laptop EC common operation support"
++	depends on LEMOTE_2FNOTEBOOK
++	default y
++	help
++	 Suspend code needs these operations, so buildin the kernel. 
++	 Say Y here to enable it
++
++
++config EC_ROM_UPDATE_DRIVER
++	tristate "EC update driver"
++	depends on EC_COMMON_OPERATION
++	default m
++	help 
++	 Say Y here to enable support ec rom update driver
++
++config EC_SCI_DRIVER
++	tristate "EC SCI driver"
++	depends on EC_COMMON_OPERATION
++	default m
++	help
++	 Say Y here to support ec sci event driver 
++
++config LAPTOP_YEELOONG
++	tristate "Yeeloong laptop drivers"
++	depends on EC_COMMON_OPERATION
++	select BACKLIGHT_CLASS_DEVICE
++	select HWMON
++	select POWER_SUPPLY
++	select THERMAL
++	select VIDEO_OUTPUT_CONTROL
++	default m
++	help
++	 Include backlight control,fan speed set,hardmare monitor, input event,
++	 battery status and so on. Say Y or M here to enable it	
++
++config BIOS_DRIVER
++	tristate "BIOS update driver"
++	select MTD
++	default m
++	help
++	 Update yeeloong laptop BIOS driver, enable it to say M or Y  
++config IO_MSR_DEBUG_DRIVER
++	tristate "IO_MSR_DEBUG_DRIVER"
++	default n
++	help
++	 Debug system to use wrsmr and rdmsr which used to access the CS5536.
++endif  #LOONGSON2_PLATFROM_SUPPORT
+diff --git a/drivers/misc/loongson/Makefile b/drivers/misc/loongson/Makefile
+new file mode 100644
+index 0000000..4f01888
+--- /dev/null
++++ b/drivers/misc/loongson/Makefile
+@@ -0,0 +1,11 @@
++
++# Makefile for yeeloong laptop
++obj- = yeeloong.o  #built-in.o
++
++obj-$(CONFIG_EC_SCI_DRIVER) += ec_scid.o
++ec_scid-objs := ec_sci.o
++obj-$(CONFIG_EC_COMMON_OPERATION) += ec_core.o
++obj-$(CONFIG_EC_ROM_UPDATE_DRIVER) += ec_rom.o
++obj-$(CONFIG_LAPTOP_YEELOONG)	+= yeeloong_laptop.o
++obj-$(CONFIG_BIOS_DRIVER)  += pmon_flash.o
++obj-$(CONFIG_IO_MSR_DEBUG_DRIVER) += io_msr_debug.o
+diff --git a/drivers/misc/loongson/ec.h b/drivers/misc/loongson/ec.h
+new file mode 100644
+index 0000000..8a17635
+--- /dev/null
++++ b/drivers/misc/loongson/ec.h
+@@ -0,0 +1,246 @@
++/*
++ *	EC(Embedded Controller) KB3310B misc device driver header for Linux
++ *	Author	:	liujl <liujl@lemote.com>
++ *	Date	:	2008-03-14
++ *	
++ *	EC relative header file. All the EC registers should be defined here.
++ */
++
++/*****************************************************************/
++
++#include	<asm/uaccess.h>
++#include	<asm/io.h>
++#include	<asm/system.h>
++#include 	<linux/version.h>
++#include 	<linux/module.h>
++
++#define VERSION		"1.38t4_brightness"
++
++/* 
++ * The following registers are determined by the EC index configuration.
++ * 1, fill the PORT_HIGH as EC register high part.
++ * 2, fill the PORT_LOW as EC register low part.
++ * 3, fill the PORT_DATA as EC register write data or get the data from it.
++ */
++#define	EC_IO_PORT_HIGH	0x0381
++#define	EC_IO_PORT_LOW	0x0382
++#define	EC_IO_PORT_DATA	0x0383
++
++/* ec registers range */
++#define	EC_MAX_REGADDR	0xFFFF
++#define	EC_MIN_REGADDR	0xF000
++//#define	EC_RAM_ADDR	0xF400
++#define	EC_RAM_ADDR		0xF800
++
++/**********************************************************************/
++
++/* temperature & fan registers */
++#define	REG_TEMPERATURE_VALUE		0xF458	// current temperature value
++#define	REG_FAN_CONTROL				0xF4D2	// fan control
++#define	BIT_FAN_CONTROL_ON				(1 << 0)
++#define	BIT_FAN_CONTROL_OFF				(0 << 0)
++#define	REG_FAN_STATUS				0xF4DA	// fan status 
++#define	BIT_FAN_STATUS_ON				(1 << 0)
++#define	BIT_FAN_STATUS_OFF				(0 << 0)
++#define	REG_FAN_SPEED_HIGH			0xFE22	// fan speed high byte
++#define	REG_FAN_SPEED_LOW			0xFE23	// fan speed low byte
++#define	REG_FAN_SPEED_LEVEL			0xF4E4	// fan speed level, from 1 to 5
++
++/* battery registers */
++#define	REG_BAT_DESIGN_CAP_HIGH		0xF77D	// design capacity high byte
++#define	REG_BAT_DESIGN_CAP_LOW		0xF77E	// design capacity low byte
++#define	REG_BAT_FULLCHG_CAP_HIGH	0xF780	// full charged capacity high byte
++#define	REG_BAT_FULLCHG_CAP_LOW		0xF781	// full charged capacity low byte
++#define	REG_BAT_DESIGN_VOL_HIGH		0xF782	// design voltage high byte
++#define	REG_BAT_DESIGN_VOL_LOW		0xF783	// design voltage low byte
++#define	REG_BAT_CURRENT_HIGH		0xF784	// battery in/out current high byte
++#define	REG_BAT_CURRENT_LOW			0xF785	// battery in/out current low byte
++#define	REG_BAT_VOLTAGE_HIGH		0xF786	// battery current voltage high byte
++#define	REG_BAT_VOLTAGE_LOW			0xF787	// battery current voltage low byte
++#define	REG_BAT_TEMPERATURE_HIGH	0xF788	// battery current temperature high byte
++#define	REG_BAT_TEMPERATURE_LOW		0xF789	// battery current temperature low byte
++#define	REG_BAT_RELATIVE_CAP_HIGH	0xF492	// relative capacity high byte
++#define	REG_BAT_RELATIVE_CAP_LOW	0xF493	// relative capacity low byte
++#define	REG_BAT_VENDOR				0xF4C4	// battery vendor number
++#define FLAG_BAT_VENDOR_SANYO			0x01
++#define FLAG_BAT_VENDOR_SIMPLO			0x02
++#define	REG_BAT_CELL_COUNT			0xF4C6	// how many cells in one battery
++#define FLAG_BAT_CELL_3S1P				0x03
++#define FLAG_BAT_CELL_3S2P				0x06
++#define	REG_BAT_CHARGE				0xF4A2	// macroscope battery charging 
++#define FLAG_BAT_CHARGE_DISCHARGE		0x01
++#define FLAG_BAT_CHARGE_CHARGE			0x02
++#define FLAG_BAT_CHARGE_ACPOWER			0x00
++#define	REG_BAT_STATUS				0xF4B0
++#define	BIT_BAT_STATUS_LOW				(1 << 5)
++#define BIT_BAT_STATUS_DESTROY			(1 << 2)
++#define BIT_BAT_STATUS_FULL				(1 << 1)
++#define BIT_BAT_STATUS_IN				(1 << 0)
++#define	REG_BAT_CHARGE_STATUS		0xF4B1
++#define	BIT_BAT_CHARGE_STATUS_OVERTEMP	(1 << 2)	// over temperature
++#define BIT_BAT_CHARGE_STATUS_PRECHG	(1 << 1)	// pre-charge the battery
++#define	REG_BAT_STATE				0xF482
++#define	BIT_BAT_STATE_CHARGING			(1 << 1)
++#define	BIT_BAT_STATE_DISCHARGING		(1 << 0)
++#define	REG_BAT_POWER				0xF440	
++#define BIT_BAT_POWER_S3				(1 << 2)	// enter s3 standby mode
++#define BIT_BAT_POWER_ON				(1 << 1)	// system is on
++#define BIT_BAT_POWER_ACIN				(1 << 0)	// adapter is inserted
++
++/* other registers */
++#define	REG_AUDIO_MUTE				0xF4E7	// audio mute : rd/wr
++#define	BIT_AUDIO_MUTE_ON				(1 << 0)
++#define	BIT_AUDIO_MUTE_OFF				(0 << 0)
++#define	REG_AUDIO_BEEP				0xF4D0	// audio beep and reset : rd/wr
++#define	BIT_AUDIO_BEEP_ON				(1 << 0)
++#define	BIT_AUDIO_BEEP_OFF				(0 << 0)
++#define	REG_USB0_FLAG				0xF461	// usb0 port power or not : rd/wr
++#define	BIT_USB0_FLAG_ON				(1 << 0)
++#define	BIT_USB0_FLAG_OFF				(0 << 0)
++#define	REG_USB1_FLAG				0xF462	// usb1 port power or not : rd/wr
++#define	BIT_USB1_FLAG_ON				(1 << 0)
++#define	BIT_USB1_FLAG_OFF				(0 << 0)
++#define	REG_USB2_FLAG				0xF463	// usb2 port power or not : rd/wr
++#define	BIT_USB2_FLAG_ON				(1 << 0)
++#define	BIT_USB2_FLAG_OFF				(0 << 0)
++#define	REG_CRT_DETECT				0xF4AD	// detected CRT exist or not
++#define	BIT_CRT_DETECT_PLUG				(1 << 0)
++#define	BIT_CRT_DETECT_UNPLUG			(0 << 0)
++#define	REG_LID_DETECT				0xF4BD	// detected LID is on or not
++#define	BIT_LID_DETECT_ON				(1 << 0)	// 1:LID open (availability)
++#define	BIT_LID_DETECT_OFF				(0 << 0)	// 0:LID close(invalidation)
++#define	REG_RESET					0xF4EC	// reset the machine auto-clear : rd/wr
++#define	BIT_RESET_ON					(1 << 0)
++#define	BIT_RESET_OFF					(0 << 0)
++#define	REG_LED						0xF4C8	// light the led : rd/wr
++#define	BIT_LED_RED_POWER				(1 << 0)
++#define	BIT_LED_ORANGE_POWER			(1 << 1)
++#define	BIT_LED_GREEN_CHARGE			(1 << 2)
++#define	BIT_LED_RED_CHARGE				(1 << 3)
++#define	BIT_LED_NUMLOCK					(1 << 4)
++#define	REG_LED_TEST				0xF4C2	// test led mode, all led on or off
++#define	BIT_LED_TEST_IN					(1 << 0)
++#define	BIT_LED_TEST_OUT				(0 << 0)
++#define	REG_DISPLAY_BRIGHTNESS		0xF4F5	//9 stages LCD backlight brightness adjust
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_0		0
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_1		1
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_2		2
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_3		3
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_4		4
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_5		5
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_6		6
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_7		7
++#define	FLAG_DISPLAY_BRIGHTNESS_LEVEL_8		8
++#define	REG_CAMERA_STATUS			0xF46A	//camera is in ON/OFF status.
++#define	BIT_CAMERA_STATUS_ON			(1 << 0)
++#define	BIT_CAMERA_STATUS_OFF			(0 << 0)
++#define	REG_CAMERA_CONTROL			0xF7B7	//control camera to ON/OFF.
++#define	BIT_CAMERA_CONTROL_OFF			(1 << 1)
++#define	BIT_CAMERA_CONTROL_ON			(1 << 1)
++#define	REG_AUDIO_VOLUME			0xF46C	//The register to show volume level
++#define	FLAG_AUDIO_VOLUME_LEVEL_0		0
++#define	FLAG_AUDIO_VOLUME_LEVEL_1		1
++#define	FLAG_AUDIO_VOLUME_LEVEL_2		2
++#define	FLAG_AUDIO_VOLUME_LEVEL_3		3
++#define	FLAG_AUDIO_VOLUME_LEVEL_4		4
++#define	FLAG_AUDIO_VOLUME_LEVEL_5		5
++#define	FLAG_AUDIO_VOLUME_LEVEL_6		6
++#define	FLAG_AUDIO_VOLUME_LEVEL_7		7
++#define	FLAG_AUDIO_VOLUME_LEVEL_8		8
++#define	FLAG_AUDIO_VOLUME_LEVEL_9		9
++#define	FLAG_AUDIO_VOLUME_LEVEL_10		0x0A
++#define	REG_WLAN_STATUS				0xF4FA	//Wlan Status
++#define	BIT_WLAN_STATUS_ON				(1 << 0)
++#define	BIT_WLAN_STATUS_OFF				(0 << 0)
++#define	REG_DISPLAY_LCD				0xF79F	//Black screen Status
++#define	BIT_DISPLAY_LCD_ON				(1 << 0)
++#define	BIT_DISPLAY_LCD_OFF				(0 << 0)
++#define	REG_BACKLIGHT_CTRL			0xF7BD	//LCD backlight control: off/restore
++#define	BIT_BACKLIGHT_ON				(1 << 0)
++#define	BIT_BACKLIGHT_OFF				(0 << 0)
++
++/***********************************************************/
++
++/* SCI Event Number from EC */
++#define	SCI_EVENT_NUM_LID				0x23	// press the lid or not
++#define	SCI_EVENT_NUM_DISPLAY_TOGGLE	0x24	// Fn+F3 for display switch
++#define	SCI_EVENT_NUM_SLEEP				0x25	// Fn+F1 for entering sleep mode
++#define	SCI_EVENT_NUM_OVERTEMP			0x26	// Over-temperature happened
++#define	SCI_EVENT_NUM_CRT_DETECT		0x27	// CRT is connected
++#define	SCI_EVENT_NUM_CAMERA			0x28	// Camera is on or off
++#define	SCI_EVENT_NUM_USB_OC2			0x29	// USB2 Over Current occurred
++#define	SCI_EVENT_NUM_USB_OC0			0x2A	// USB0 Over Current occurred
++#define	SCI_EVENT_NUM_AC_BAT			0x2E	// ac & battery relative issue
++#define BIT_AC_BAT_BAT_IN			0
++#define	BIT_AC_BAT_AC_IN			1
++#define	BIT_AC_BAT_INIT_CAP			2
++#define	BIT_AC_BAT_CHARGE_MODE		3
++#define	BIT_AC_BAT_STOP_CHARGE		4
++#define	BIT_AC_BAT_BAT_LOW			5
++#define	BIT_AC_BAT_BAT_FULL			6
++#define	SCI_EVENT_NUM_DISPLAY_BRIGHTNESS	0x2D	// LCD backlight brightness adjust
++#define	SCI_EVENT_NUM_AUDIO_VOLUME		0x2F	// Volume adjust
++#define	SCI_EVENT_NUM_WLAN				0x30	// Wlan is on or off
++#define	SCI_EVENT_NUM_AUDIO_MUTE		0x2C	// Mute is on or off
++#define	SCI_EVENT_NUM_BLACK_SCREEN		0x2B	// Black screen is on or off
++
++#define	SCI_INDEX_LID					0x00
++#define	SCI_INDEX_DISPLAY_TOGGLE		0x01
++#define	SCI_INDEX_SLEEP					0x02
++#define	SCI_INDEX_OVERTEMP				0x03
++#define	SCI_INDEX_CRT_DETECT			0x04
++#define	SCI_INDEX_CAMERA				0x05
++#define	SCI_INDEX_USB_OC2				0x06
++#define	SCI_INDEX_USB_OC0				0x07
++#define	SCI_INDEX_AC_BAT				0x08
++#define	SCI_INDEX_DISPLAY_BRIGHTNESS_INC	0x09
++#define	SCI_INDEX_DISPLAY_BRIGHTNESS_DEC	0x0A
++#define	SCI_INDEX_AUDIO_VOLUME_INC			0x0B
++#define	SCI_INDEX_AUDIO_VOLUME_DEC			0x0C
++#define	SCI_INDEX_WLAN					0x0D
++#define	SCI_INDEX_AUDIO_MUTE			0x0E
++#define	SCI_INDEX_BLACK_SCREEN			0x0F
++
++#define	SCI_MAX_EVENT_COUNT			0x10
++
++/* EC access port for sci communication */
++#define	EC_CMD_PORT		0x66
++#define	EC_STS_PORT		0x66
++#define	EC_DAT_PORT		0x62
++#define	CMD_INIT_IDLE_MODE	0xdd
++#define	CMD_EXIT_IDLE_MODE	0xdf
++#define	CMD_INIT_RESET_MODE	0xd8
++#define	CMD_REBOOT_SYSTEM	0x8c
++#define	CMD_GET_EVENT_NUM	0x84
++#define	CMD_PROGRAM_PIECE	0xda
++
++
++/**********************************************************************/
++//#define	DEBUG_PRINTK
++
++#ifdef DEBUG_PRINTK
++#define PRINTK_DBG(args...)	printk(args)
++#else
++#define PRINTK_DBG(args...)
++#endif
++
++extern void _rdmsr(u32 addr, u32 *hi, u32 *lo);
++extern void _wrmsr(u32 addr, u32 hi, u32 lo);
++typedef int (*ec_handler)(void);
++/****************************************************************/
++#if CONFIG_EC_COMMON_OPERATION
++/* the general ec index-io port read action */
++extern unsigned char ec_read(unsigned short addr);
++/* the general ec index-io port write action */
++extern void ec_write(unsigned short addr, unsigned char val);
++/* query sequence of 62/66 port access routine */
++extern int ec_query_seq(unsigned char cmd);
++extern int sci_get_event_num(void);
++extern void ec_handler_install(int event_nu, ec_handler irq_handler);
++extern void ec_handler_uninstall(int event_nu);
++#else
++static inline unsigned char ec_read(unsigned short addr){}
++static inline void ec_write(unsigned short addr, unsigned char varl){}
++//static inline int ec_query_seq(unsigned char cmd){}
++//static inline int sci_get_event_num(void){}
++#endif
+diff --git a/drivers/misc/loongson/ec_core.c b/drivers/misc/loongson/ec_core.c
+new file mode 100644
+index 0000000..702617e
+--- /dev/null
++++ b/drivers/misc/loongson/ec_core.c
+@@ -0,0 +1,131 @@
++/******************************************************************
++ * 	EC chip common operations:  
++ *	ec_read(), ec_write(), ec_query_seq(), sci_get_event_num()	
++ *	Copy from the ec_misc.c and ec_sci.c
++ ******************************************************************/
++
++#include <linux/module.h>
++#include <linux/delay.h>
++
++#include "ec.h"
++#include "ec_rom.h"
++/*******************************************************************/
++
++/* this spinlock is dedicated for ec_read & ec_write function */
++DEFINE_SPINLOCK(index_access_lock);
++/* this spinlock is dedicated for 62&66 ports access */
++DEFINE_SPINLOCK(port_access_lock);
++
++/*******************************************************************/
++
++/* read a byte from EC registers throught index-io */
++unsigned char ec_read(unsigned short addr)
++{
++	unsigned char value;
++	unsigned long flags;
++
++	spin_lock_irqsave(&index_access_lock, flags);
++	outb((addr & 0xff00) >> 8, EC_IO_PORT_HIGH);
++	outb((addr & 0x00ff), EC_IO_PORT_LOW);
++	value = inb(EC_IO_PORT_DATA);
++	spin_unlock_irqrestore(&index_access_lock, flags);
++
++	return value;
++}
++EXPORT_SYMBOL_GPL(ec_read);
++
++/* write a byte to EC registers throught index-io */
++void ec_write(unsigned short addr, unsigned char val)
++{
++	unsigned long flags;
++
++	spin_lock_irqsave(&index_access_lock, flags);
++	outb( (addr & 0xff00) >> 8, EC_IO_PORT_HIGH );
++	outb( (addr & 0x00ff), EC_IO_PORT_LOW );
++	outb( val, EC_IO_PORT_DATA );
++	inb( EC_IO_PORT_DATA );	// flush the write action
++	spin_unlock_irqrestore(&index_access_lock, flags);
++
++	return;
++}
++EXPORT_SYMBOL_GPL(ec_write);
++
++/*
++ * ec_query_seq
++ * this function is used for ec command writing and the corresponding status query 
++ */
++int ec_query_seq(unsigned char cmd)
++{
++	int timeout;
++	unsigned char status;
++	unsigned long flags;
++	int ret = 0;
++
++	spin_lock_irqsave(&port_access_lock, flags);
++
++	/* make chip goto reset mode */
++	udelay(EC_REG_DELAY);
++	outb(cmd, EC_CMD_PORT);
++	udelay(EC_REG_DELAY);
++
++	/* check if the command is received by ec */
++	timeout = EC_CMD_TIMEOUT;
++	status = inb(EC_STS_PORT);
++	while(timeout--){
++		if(status & (1 << 1)){
++			status = inb(EC_STS_PORT);
++			udelay(EC_REG_DELAY);
++			continue;
++		}
++		break;
++	}
++	
++	if(timeout <= 0){
++		printk(KERN_ERR "EC QUERY SEQ : deadable error : timeout...\n");
++		ret = -EINVAL;
++	}else{
++		PRINTK_DBG(KERN_INFO "(%x/%d)ec issued command %x status : 0x%x\n", timeout, EC_CMD_TIMEOUT - timeout, cmd, status);
++	}
++
++	spin_unlock_irqrestore(&port_access_lock, flags);
++
++	return ret;
++}
++
++EXPORT_SYMBOL_GPL(ec_query_seq);
++
++
++/*
++ * sci_get_event_num :
++ *	get sci event number from ec
++ *	NOTE : this routine must follow the sci_query_event_num 
++ *	function in the interrupt
++ */
++int sci_get_event_num(void)
++{
++	int timeout = 100;
++	unsigned char value;
++	unsigned char status;
++	
++	udelay(EC_REG_DELAY);
++	status = inb(EC_STS_PORT);
++	udelay(EC_REG_DELAY);
++	while(timeout--){
++		if(!(status & (1 << 0))){
++			status = inb(EC_STS_PORT);
++			udelay(EC_REG_DELAY);
++			continue;
++		}
++		break;
++	}
++	if(timeout <= 0){
++		PRINTK_DBG("fixup sci : get event number timeout.\n");
++		return -EINVAL;
++	}
++	value = inb(EC_DAT_PORT);
++	udelay(EC_REG_DELAY);
++
++	return value;
++}
++
++EXPORT_SYMBOL(sci_get_event_num);
+diff --git a/drivers/misc/loongson/ec_rom.c b/drivers/misc/loongson/ec_rom.c
+new file mode 100644
+index 0000000..213a312
+--- /dev/null
++++ b/drivers/misc/loongson/ec_rom.c
+@@ -0,0 +1,837 @@
++/*
++ * EC(Embedded Controller) KB3310B misc device driver on Linux
++ * Author	: liujl <liujl@lemote.com>
++ * Date		: 2008-04-20
++ * 
++ * NOTE :
++ * 		1, The EC resources accessing and programming are supported.
++ */ 
++
++/*******************************************************************/
++
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/slab.h>
++#include <linux/proc_fs.h>
++#include <linux/miscdevice.h>
++#include <linux/apm_bios.h>
++#include <linux/capability.h>
++#include <linux/sched.h>
++#include <linux/pm.h>
++#include <linux/apm-emulation.h>
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/list.h>
++#include <linux/init.h>
++#include <linux/completion.h>
++#include <linux/kthread.h>
++#include <linux/delay.h>
++#include <linux/timer.h>
++
++#include <asm/delay.h>
++
++#include "ec.h"
++#include "ec_rom.h"
++
++/*******************************************************************/
++/* open for using rom protection action */
++#define	EC_ROM_PROTECTION
++
++/* information used for programming */
++struct ec_info	ecinfo;
++/************************************************************************/
++
++/* enable the chip reset mode */
++static int ec_init_reset_mode(void)
++{
++	int timeout;
++	unsigned char status = 0;
++	int ret = 0;
++	
++	/* make chip goto reset mode */
++	ret = ec_query_seq(CMD_INIT_RESET_MODE);
++	if(ret < 0){
++		printk(KERN_ERR "ec init reset mode failed.\n");
++		goto out;
++	}
++
++	/* make the action take active */
++	timeout = EC_CMD_TIMEOUT;
++	status = ec_read(REG_POWER_MODE) & FLAG_RESET_MODE;
++	while(timeout--){
++		if(status){
++			udelay(EC_REG_DELAY);
++			break;
++		}
++		status = ec_read(REG_POWER_MODE) & FLAG_RESET_MODE;
++		udelay(EC_REG_DELAY);
++	}
++	if(timeout <= 0){
++		printk(KERN_ERR "ec rom fixup : can't check reset status.\n");
++		ret = -EINVAL;
++	}else{
++		PRINTK_DBG(KERN_INFO "(%d/%d)reset 0xf710 :  0x%x\n", timeout, EC_CMD_TIMEOUT - timeout, status);		
++	}
++
++	/* set MCU to reset mode */
++	udelay(EC_REG_DELAY);
++	status = ec_read(REG_PXCFG);
++	status |= (1 << 0);
++	ec_write(REG_PXCFG, status);
++	udelay(EC_REG_DELAY);
++
++	/* disable FWH/LPC */
++	udelay(EC_REG_DELAY);
++	status = ec_read(REG_LPCCFG);
++	status &= ~(1 << 7);
++	ec_write(REG_LPCCFG, status);
++	udelay(EC_REG_DELAY);
++
++	PRINTK_DBG(KERN_INFO "entering reset mode ok..............\n");
++
++out :
++	return ret;
++}
++
++/* make ec exit from reset mode */
++static void ec_exit_reset_mode(void)
++{
++	unsigned char regval;
++
++	udelay(EC_REG_DELAY);
++	regval = ec_read(REG_LPCCFG);
++	regval |= (1 << 7);
++	ec_write(REG_LPCCFG, regval);
++	regval = ec_read(REG_PXCFG);
++	regval &= ~(1 << 0);
++	ec_write(REG_PXCFG, regval);
++	PRINTK_DBG(KERN_INFO "exit reset mode ok..................\n");
++
++	return;
++}
++/* make ec disable WDD */
++static void ec_disable_WDD(void)
++{
++	unsigned char status;
++
++	udelay(EC_REG_DELAY);
++	status = ec_read(REG_WDTCFG);
++	ec_write(REG_WDTPF, 0x03);
++	ec_write(REG_WDTCFG, (status&0x80)|0x48);
++	PRINTK_DBG(KERN_INFO "Disable WDD ok..................\n");
++
++	return;
++}
++
++/* make ec enable WDD */
++static void ec_enable_WDD(void)
++{
++	unsigned char status;
++
++	udelay(EC_REG_DELAY);
++	status = ec_read(REG_WDTCFG);
++	ec_write(REG_WDT, 0x28);		//set WDT 5sec(0x28)
++	ec_write(REG_WDTCFG, (status&0x80)|0x03);
++	PRINTK_DBG(KERN_INFO "Enable WDD ok..................\n");
++
++	return;
++}
++
++#if 0
++/* re-power the whole system for new ec firmware working correctly. */
++static void ec_reboot_system(void)
++{
++	ec_query_seq(CMD_REBOOT_SYSTEM);
++	printk(KERN_INFO "reboot system...................\n");
++}
++#endif
++
++/* make ec goto idle mode */
++static int ec_init_idle_mode(void)
++{
++	int timeout;
++	unsigned char status = 0;
++	int ret = 0;
++
++	ec_query_seq(CMD_INIT_IDLE_MODE);
++
++	/* make the action take active */
++	timeout = EC_CMD_TIMEOUT;
++	status = ec_read(REG_POWER_MODE) & FLAG_IDLE_MODE;
++	while(timeout--){
++		if(status){
++			udelay(EC_REG_DELAY);
++			break;
++		}
++		status = ec_read(REG_POWER_MODE) & FLAG_IDLE_MODE;
++		udelay(EC_REG_DELAY);
++	}
++	if(timeout <= 0){
++		printk(KERN_ERR "ec rom fixup : can't check out the status.\n");
++		ret = -EINVAL;
++	}else{
++		PRINTK_DBG(KERN_INFO "(%d/%d)0xf710 :  0x%x\n", timeout, EC_CMD_TIMEOUT - timeout, ec_read(REG_POWER_MODE));
++	}
++
++	PRINTK_DBG(KERN_INFO "entering idle mode ok...................\n");
++
++	return ret;
++}
++
++/* make ec exit from idle mode */
++static int ec_exit_idle_mode(void)
++{
++
++	ec_query_seq(CMD_EXIT_IDLE_MODE);
++
++	PRINTK_DBG(KERN_INFO "exit idle mode ok...................\n");
++	
++	return 0;
++}
++
++/**********************************************************************/
++
++static int ec_instruction_cycle(void)
++{
++	unsigned long timeout;
++	int ret = 0;
++
++	timeout = EC_FLASH_TIMEOUT;
++	while(timeout-- >= 0){
++		if( !(ec_read(REG_XBISPICFG) & SPICFG_SPI_BUSY) )
++				break;
++	}
++	if(timeout <= 0){
++		printk(KERN_ERR "EC_INSTRUCTION_CYCLE : timeout for check flag.\n");
++		ret = -EINVAL;
++		goto out;
++	}
++
++out :
++	return ret;
++}
++
++/* To see if the ec is in busy state or not. */
++static inline int ec_flash_busy(unsigned long timeout)
++{
++	/* assurance the first command be going to rom */
++	if( ec_instruction_cycle() < 0 ){
++		return EC_STATE_BUSY;
++	}
++
++#if	1
++	timeout = timeout / EC_MAX_DELAY_UNIT;
++	while(timeout-- > 0){
++		/* check the rom's status of busy flag */
++		ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
++		if( ec_instruction_cycle() < 0 ){
++			return EC_STATE_BUSY;
++		}	
++		if((ec_read(REG_XBISPIDAT) & 0x01) == 0x00){
++			return EC_STATE_IDLE;
++		}
++		udelay(EC_MAX_DELAY_UNIT);
++	}
++	if( timeout <= 0 ){
++		printk(KERN_ERR "EC_FLASH_BUSY : timeout for check rom flag.\n");
++		return EC_STATE_BUSY;
++	}
++#else
++	/* check the rom's status of busy flag */
++	ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
++	if( ec_instruction_cycle() < 0 ){
++		return EC_STATE_BUSY;
++	}	
++
++	timeout = timeout / EC_MAX_DELAY_UNIT;
++	while(timeout-- > 0){
++		if((ec_read(REG_XBISPIDAT) & 0x01) == 0x00){
++			return EC_STATE_IDLE;
++		}
++		udelay(EC_MAX_DELAY_UNIT);
++	}
++	if( timeout <= 0 ){
++		printk(KERN_ERR "EC_FLASH_BUSY : timeout for check rom flag.\n");
++		return EC_STATE_BUSY;
++	}
++#endif
++
++	return EC_STATE_IDLE;
++}
++
++static int rom_instruction_cycle(unsigned char cmd)
++{
++	unsigned long timeout = 0;
++
++	switch(cmd){
++		case	SPICMD_READ_STATUS :
++		case	SPICMD_WRITE_ENABLE :
++		case	SPICMD_WRITE_DISABLE :
++		case	SPICMD_READ_BYTE :
++		case	SPICMD_HIGH_SPEED_READ :
++				timeout = 0;
++				break;
++		case	SPICMD_WRITE_STATUS :
++				timeout = 300 * 1000;
++				break;
++		case	SPICMD_BYTE_PROGRAM :
++				timeout = 5 * 1000;
++				break;
++		case	SPICMD_SST_SEC_ERASE :
++		case	SPICMD_SEC_ERASE :
++				timeout = 1000 * 1000;
++				break;
++		case	SPICMD_SST_BLK_ERASE :
++		case	SPICMD_BLK_ERASE :
++				timeout = 3 * 1000 * 1000;
++				break;
++		case	SPICMD_SST_CHIP_ERASE :
++		case	SPICMD_CHIP_ERASE :
++				timeout = 20 * 1000 * 1000;
++				break;
++		default :
++				timeout = EC_SPICMD_STANDARD_TIMEOUT;
++	}
++	if(timeout == 0){
++		return ec_instruction_cycle();
++	}
++	if(timeout < EC_SPICMD_STANDARD_TIMEOUT)
++			timeout = EC_SPICMD_STANDARD_TIMEOUT;
++
++	return ec_flash_busy(timeout);
++}
++
++/* delay for start/stop action */
++static void delay_spi(int n)
++{
++	while(n--)
++		inb(EC_IO_PORT_HIGH);
++}
++
++/* start the action to spi rom function */
++static void ec_start_spi(void)
++{
++	unsigned char val;
++
++	delay_spi(SPI_FINISH_WAIT_TIME);
++	val = ec_read(REG_XBISPICFG) | SPICFG_EN_SPICMD | SPICFG_AUTO_CHECK;
++	ec_write(REG_XBISPICFG, val);
++	delay_spi(SPI_FINISH_WAIT_TIME);
++}
++
++/* stop the action to spi rom function */
++static void ec_stop_spi(void)
++{
++	unsigned char val;
++
++	delay_spi(SPI_FINISH_WAIT_TIME);
++	val = ec_read(REG_XBISPICFG) & (~(SPICFG_EN_SPICMD | SPICFG_AUTO_CHECK));
++	ec_write(REG_XBISPICFG, val);
++	delay_spi(SPI_FINISH_WAIT_TIME);
++}
++
++/* read one byte from xbi interface */
++static int ec_read_byte(unsigned int addr, unsigned char *byte)
++{
++	int ret = 0;
++
++	/* enable spicmd writing. */
++	ec_start_spi();
++
++	/* enable write spi flash */
++	ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
++	if(rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_READ_BYTE : SPICMD_WRITE_ENABLE failed.\n");
++			ret = -EINVAL;
++			goto out;
++	}
++	
++	/* write the address */
++	ec_write(REG_XBISPIA2, (addr & 0xff0000) >> 16);
++	ec_write(REG_XBISPIA1, (addr & 0x00ff00) >> 8);
++	ec_write(REG_XBISPIA0, (addr & 0x0000ff) >> 0);
++	/* start action */
++	ec_write(REG_XBISPICMD, SPICMD_HIGH_SPEED_READ);
++	if(rom_instruction_cycle(SPICMD_HIGH_SPEED_READ) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_READ_BYTE : SPICMD_HIGH_SPEED_READ failed.\n");
++			ret = -EINVAL;
++			goto out;
++	}
++	
++	*byte = ec_read(REG_XBISPIDAT);
++
++out :
++	/* disable spicmd writing. */
++	ec_stop_spi();
++
++	return ret;
++}
++
++/* write one byte to ec rom */
++static int ec_write_byte(unsigned int addr, unsigned char byte)
++{
++	int ret = 0;
++
++	/* enable spicmd writing. */
++	ec_start_spi();
++
++	/* enable write spi flash */
++	ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
++	if(rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_WRITE_BYTE : SPICMD_WRITE_ENABLE failed.\n");
++			ret = -EINVAL;
++			goto out;
++	}
++
++	/* write the address */
++	ec_write(REG_XBISPIA2, (addr & 0xff0000) >> 16);
++	ec_write(REG_XBISPIA1, (addr & 0x00ff00) >> 8);
++	ec_write(REG_XBISPIA0, (addr & 0x0000ff) >> 0);
++	ec_write(REG_XBISPIDAT, byte);
++	/* start action */
++	ec_write(REG_XBISPICMD, SPICMD_BYTE_PROGRAM);
++	if(rom_instruction_cycle(SPICMD_BYTE_PROGRAM) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_WRITE_BYTE : SPICMD_BYTE_PROGRAM failed.\n");
++			ret = -EINVAL;
++			goto out;
++	}
++	
++out :
++	/* disable spicmd writing. */
++	ec_stop_spi();
++
++	return ret;
++}
++
++/* unprotect SPI ROM */
++/* EC_ROM_unprotect function code */
++static int EC_ROM_unprotect(void)
++{
++	unsigned char status;
++
++	/* enable write spi flash */
++	ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
++	if(rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY){
++		printk(KERN_ERR "EC_UNIT_ERASE : SPICMD_WRITE_ENABLE failed.\n");
++		return 1;
++	}
++
++	/* unprotect the status register of rom */
++	ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
++	if(rom_instruction_cycle(SPICMD_READ_STATUS) == EC_STATE_BUSY){
++		printk(KERN_ERR "EC_UNIT_ERASE : SPICMD_READ_STATUS failed.\n");
++		return 1;
++	}
++	status = ec_read(REG_XBISPIDAT);
++	ec_write(REG_XBISPIDAT, status & 0x02);
++	if(ec_instruction_cycle() < 0){
++		printk(KERN_ERR "EC_UNIT_ERASE : write status value failed.\n");
++		return 1;
++	}
++
++	ec_write(REG_XBISPICMD, SPICMD_WRITE_STATUS);
++	if(rom_instruction_cycle(SPICMD_WRITE_STATUS) == EC_STATE_BUSY){
++		printk(KERN_ERR "EC_UNIT_ERASE : SPICMD_WRITE_STATUS failed.\n");
++		return 1;
++	}
++
++	/* enable write spi flash */
++	ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
++	if(rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY){
++		printk(KERN_ERR "EC_UNIT_ERASE : SPICMD_WRITE_ENABLE failed.\n");
++		return 1;
++	}
++
++	return 0;
++}
++
++/* erase one block or chip or sector as needed */
++static int ec_unit_erase(unsigned char erase_cmd, unsigned int addr)
++{
++	unsigned char status;
++	int ret = 0, i = 0;
++	int unprotect_count = 3;
++	int check_flag =0;
++
++	/* enable spicmd writing. */
++	ec_start_spi();
++
++#ifdef EC_ROM_PROTECTION
++	/* added for re-check SPICMD_READ_STATUS */
++	while(unprotect_count-- > 0){
++		if(EC_ROM_unprotect()){
++			ret = -EINVAL;
++			goto out;
++		}
++		
++		for(i = 0; i < ((2 - unprotect_count) * 100 + 10); i++)	//first time:500ms --> 5.5sec -->10.5sec
++			udelay(50000);
++		ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
++		if(rom_instruction_cycle(SPICMD_READ_STATUS) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_PROGRAM_ROM : SPICMD_READ_STATUS failed.\n");
++		} else {
++			status = ec_read(REG_XBISPIDAT);
++			PRINTK_DBG(KERN_INFO "Read unprotect status : 0x%x\n", status);
++			if((status & 0x1C) == 0x00){
++				PRINTK_DBG(KERN_INFO "Read unprotect status OK1 : 0x%x\n", status & 0x1C);
++				check_flag = 1;
++				break;
++			}
++		}	
++	}
++
++	if(!check_flag){
++		printk(KERN_INFO "SPI ROM unprotect fail.\n");
++		return 1;
++	}
++#endif
++
++	/* block address fill */
++	if(erase_cmd == SPICMD_BLK_ERASE){
++		ec_write(REG_XBISPIA2, (addr & 0x00ff0000) >> 16);
++		ec_write(REG_XBISPIA1, (addr & 0x0000ff00) >> 8);
++		ec_write(REG_XBISPIA0, (addr & 0x000000ff) >> 0);
++	}
++
++	/* erase the whole chip first */
++	ec_write(REG_XBISPICMD, erase_cmd);
++	if(rom_instruction_cycle(erase_cmd) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_UNIT_ERASE : erase failed.\n");
++			ret = -EINVAL;
++			goto out;
++	}
++
++out :
++	/* disable spicmd writing. */
++	ec_stop_spi();
++
++	return ret;
++}
++
++/* update the whole rom content with H/W mode
++ * PLEASE USING ec_unit_erase() FIRSTLY
++ */
++static int ec_program_rom(struct ec_info *info, int flag)
++{
++	unsigned int addr = 0;
++	unsigned long size = 0;
++	unsigned char *ptr = NULL;
++	unsigned char data;
++	unsigned char val = 0;
++	int ret = 0;
++	int i, j;
++	unsigned char status;
++
++	/* modify for program serial No, set IE_START_ADDR and use idle mode, disable WDD */
++	if (flag == PROGRAM_FLAG_ROM) {
++		ret = ec_init_reset_mode();
++		addr = info->start_addr + EC_START_ADDR;
++		PRINTK_DBG(KERN_INFO "PROGRAM_FLAG_ROM..............\n");
++	} else if (flag == PROGRAM_FLAG_IE) {
++		ret = ec_init_idle_mode();
++		ec_disable_WDD();
++		//addr = info->start_addr + IE_START_ADDR;	//huangw 09-09-11
++		addr = info->start_addr;
++		PRINTK_DBG(KERN_INFO "PROGRAM_FLAG_IE..............\n");
++	} else {
++		return 0;
++	}
++
++	if(ret < 0){
++		if (flag == PROGRAM_FLAG_IE)
++			ec_enable_WDD();
++		return ret;
++	}
++
++	size = info->size;
++	ptr  = info->buf;
++    PRINTK_DBG(KERN_INFO "starting update ec ROM..............\n");
++
++	ret = ec_unit_erase(SPICMD_BLK_ERASE, addr);
++	if(ret){
++		printk(KERN_ERR "program ec : erase block failed.\n");
++		goto out;
++	}
++	PRINTK_DBG(KERN_ERR "program ec : erase block OK.\n");
++
++	i = 0;
++	while(i < size){
++		data = *(ptr + i);
++		ec_write_byte(addr, data);
++		ec_read_byte(addr, &val);
++		if(val != data){
++			ec_write_byte(addr, data);
++			ec_read_byte(addr, &val);
++			if(val != data){
++				printk("EC : Second flash program failed at:\t");
++				printk("addr : 0x%x, source : 0x%x, dest: 0x%x\n", addr, data, val);
++				printk("This should not happened... STOP\n");
++				break;				
++			}
++		}
++		i++;
++		addr++;
++	}
++
++#ifdef	EC_ROM_PROTECTION
++	/* we should start spi access firstly */
++	ec_start_spi();
++
++	/* enable write spi flash */
++	ec_write(REG_XBISPICMD, SPICMD_WRITE_ENABLE);
++	if(rom_instruction_cycle(SPICMD_WRITE_ENABLE) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_PROGRAM_ROM : SPICMD_WRITE_ENABLE failed.\n");
++			goto out1;
++	}
++	
++	/* protect the status register of rom */
++	ec_write(REG_XBISPICMD, SPICMD_READ_STATUS);
++	if(rom_instruction_cycle(SPICMD_READ_STATUS) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_PROGRAM_ROM : SPICMD_READ_STATUS failed.\n");
++			goto out1;
++	}
++	status = ec_read(REG_XBISPIDAT);
++
++	ec_write(REG_XBISPIDAT, status | 0x1C);
++	if(ec_instruction_cycle() < 0){
++			printk(KERN_ERR "EC_PROGRAM_ROM : write status value failed.\n");
++			goto out1;
++	}
++
++	ec_write(REG_XBISPICMD, SPICMD_WRITE_STATUS);
++	if(rom_instruction_cycle(SPICMD_WRITE_STATUS) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_PROGRAM_ROM : SPICMD_WRITE_STATUS failed.\n");
++			goto out1;
++	}
++#endif
++
++	/* disable the write action to spi rom */
++	ec_write(REG_XBISPICMD, SPICMD_WRITE_DISABLE);
++	if(rom_instruction_cycle(SPICMD_WRITE_DISABLE) == EC_STATE_BUSY){
++			printk(KERN_ERR "EC_PROGRAM_ROM : SPICMD_WRITE_DISABLE failed.\n");
++			goto out1;
++	}
++	
++out1:
++	/* we should stop spi access firstly */
++	ec_stop_spi();
++out:
++	/* for security */
++	for(j = 0; j < 2000; j++)
++		udelay(1000);
++
++	/* modify for program serial No, after program No exit idle mode and enable WDD */
++	if (flag == PROGRAM_FLAG_ROM) {
++		/* exit from the reset mode */
++		ec_exit_reset_mode();
++	} else {
++		/* ec exit from idle mode */
++		ret = ec_exit_idle_mode();
++		ec_enable_WDD();
++		if(ret < 0){
++			return ret;
++		}
++	}
++
++	return 0;
++}
++
++/******************************************************************************/
++
++/* ioctl  */
++static int misc_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
++{
++	void __user *ptr = (void __user *)arg;
++	struct ec_reg *ecreg = (struct ec_reg *)(filp->private_data);
++	int ret = 0;
++
++	switch (cmd) {
++		case IOCTL_RDREG :
++			ret = copy_from_user(ecreg, ptr, sizeof(struct ec_reg));
++			if(ret){
++				printk(KERN_ERR "reg read : copy from user error.\n");
++				return -EFAULT;
++			}
++			if( (ecreg->addr > EC_MAX_REGADDR) || (ecreg->addr < EC_MIN_REGADDR) ){
++				printk(KERN_ERR "reg read : out of register address range.\n");
++				return -EINVAL;
++			}
++			ecreg->val = ec_read(ecreg->addr);
++			ret = copy_to_user(ptr, ecreg, sizeof(struct ec_reg));
++			if(ret){
++				printk(KERN_ERR "reg read : copy to user error.\n");
++				return -EFAULT;
++			}
++			break;
++		case IOCTL_WRREG :
++			ret = copy_from_user(ecreg, ptr, sizeof(struct ec_reg));
++			if(ret){
++				printk(KERN_ERR "reg write : copy from user error.\n");
++				return -EFAULT;
++			}
++			if( (ecreg->addr > EC_MAX_REGADDR) || (ecreg->addr < EC_MIN_REGADDR) ){
++				printk(KERN_ERR "reg write : out of register address range.\n");
++				return -EINVAL;
++			}
++			ec_write(ecreg->addr, ecreg->val);
++			break;
++		case IOCTL_READ_EC :
++			ret = copy_from_user(ecreg, ptr, sizeof(struct ec_reg));
++			if(ret){
++				printk(KERN_ERR "spi read : copy from user error.\n");
++				return -EFAULT;
++			}
++			if( (ecreg->addr > EC_RAM_ADDR) && (ecreg->addr < EC_MAX_REGADDR) ){
++				printk(KERN_ERR "spi read : out of register address range.\n");
++				return -EINVAL;
++			}
++			ec_read_byte(ecreg->addr, &(ecreg->val));
++			ret = copy_to_user(ptr, ecreg, sizeof(struct ec_reg));
++			if(ret){
++				printk(KERN_ERR "spi read : copy to user error.\n");
++				return -EFAULT;
++			}
++			break;
++		case IOCTL_PROGRAM_IE :	
++			if( get_user((ecinfo.start_addr), (u32 *)ptr) ){
++				printk(KERN_ERR "program ie : get user start_addr error.\n");
++				return -EFAULT;
++			}
++			ecinfo.size = EC_CONTENT_MAX_SIZE;
++
++			ecinfo.buf = (u8 *)kmalloc(ecinfo.size, GFP_KERNEL);
++			if(ecinfo.buf == NULL){
++				printk(KERN_ERR "program ie : kmalloc failed.\n");
++				return -ENOMEM;
++			}
++
++			ret = copy_from_user(ecinfo.buf, (u8 *)ptr + 4, ecinfo.size);
++			if(ret){
++				printk(KERN_ERR "program ie : copy from user error.\n");
++				kfree(ecinfo.buf);
++				ecinfo.buf = NULL;
++				return -EFAULT;
++			}
++
++			if(ecinfo.start_addr == RESVEC_START_ADDR){
++				printk("start address : 0x%x\n", ecinfo.start_addr);
++				printk("sum size      : 0x%x\n", ecinfo.size);
++				printk("backup ec ver : %c%c%c%c%c%c\n", ecinfo.buf[0xFFFA], ecinfo.buf[0xFFFB], ecinfo.buf[0xFFFC],
++						                                 ecinfo.buf[0xFFFD], ecinfo.buf[0xFFFE], ecinfo.buf[0xFFFF]);
++				printk("backup ec size: 0x%x%x%x%x\n", ecinfo.buf[0xFFF9], ecinfo.buf[0xFFF8],
++						                               ecinfo.buf[0xFFF7], ecinfo.buf[0xFFF6]);
++			}
++
++			/* use ec_program_rom to write serial No */
++			ec_program_rom(&ecinfo, PROGRAM_FLAG_IE);
++			
++			kfree(ecinfo.buf);
++			ecinfo.buf = NULL;
++			break;
++		case IOCTL_PROGRAM_EC :
++			ecinfo.start_addr = EC_START_ADDR;
++			if(get_user( (ecinfo.size), (u32 *)ptr) ){
++				printk(KERN_ERR "program ec : get user error.\n");
++				return -EFAULT;
++			}
++			if( (ecinfo.size) > EC_CONTENT_MAX_SIZE ){
++				printk(KERN_ERR "program ec : size out of limited.\n");
++				return -EINVAL;
++			}
++			ecinfo.buf = (u8 *)kmalloc(ecinfo.size, GFP_KERNEL);
++			if(ecinfo.buf == NULL){
++				printk(KERN_ERR "program ec : kmalloc failed.\n");
++				return -ENOMEM;
++			}
++			ret = copy_from_user(ecinfo.buf, ((u8 *)ptr + 4), ecinfo.size);
++			if(ret){
++				printk(KERN_ERR "program ec : copy from user error.\n");
++				kfree(ecinfo.buf);
++				ecinfo.buf = NULL;
++				return -EFAULT;
++			}
++	
++			ec_program_rom(&ecinfo, PROGRAM_FLAG_ROM);
++
++			kfree(ecinfo.buf);
++			ecinfo.buf = NULL;
++			break;
++
++		default :
++			break;
++	}
++
++	return 0;
++}
++
++static long misc_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
++{
++	return misc_ioctl(file->f_dentry->d_inode, file, cmd, arg);
++}
++
++static int misc_open(struct inode * inode, struct file * filp)
++{
++	struct ec_reg *ecreg = NULL;
++	ecreg = kmalloc(sizeof(struct ec_reg), GFP_KERNEL);
++	if (ecreg) {
++		filp->private_data = ecreg;
++	}
++
++	return ecreg ? 0 : -ENOMEM;
++}
++
++static int misc_release(struct inode * inode, struct file * filp)
++{
++	struct ec_reg *ecreg = (struct ec_reg *)(filp->private_data);
++
++	filp->private_data = NULL;
++	kfree(ecreg);
++
++	return 0;
++}
++
++static struct file_operations ecmisc_fops = {
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
++	.owner		= THIS_MODULE,
++#endif
++	.open		= misc_open,
++	.release	= misc_release,
++	.read		= NULL,
++	.write		= NULL,
++#ifdef	CONFIG_64BIT
++	.compat_ioctl = misc_compat_ioctl,
++#else
++	.ioctl		= misc_ioctl,
++#endif
++};
++
++/*********************************************************/
++
++static struct miscdevice ecmisc_device = {
++	.minor		= ECMISC_MINOR_DEV,
++	.name		= EC_MISC_DEV,
++	.fops		= &ecmisc_fops
++};
++
++static int __init ecmisc_init(void)
++{
++	int ret;
++
++	printk(KERN_INFO "EC misc device init.\n");
++	ret = misc_register(&ecmisc_device);
++
++	return ret;
++}
++
++static void __exit ecmisc_exit(void)
++{
++	printk(KERN_INFO "EC misc device exit.\n");
++	misc_deregister(&ecmisc_device);
++}
++
++module_init(ecmisc_init);
++module_exit(ecmisc_exit);
++
++MODULE_AUTHOR("liujl <liujl@lemote.com>");
++MODULE_DESCRIPTION("KB3310 resources misc Management");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/misc/loongson/ec_rom.h b/drivers/misc/loongson/ec_rom.h
+new file mode 100644
+index 0000000..51c404f
+--- /dev/null
++++ b/drivers/misc/loongson/ec_rom.h
+@@ -0,0 +1,190 @@
++/*
++ * EC(Embedded Controller) KB3310B Misc device driver header file in linux
++ * Author	: liujl <liujl@lemote.com>
++ * Date		: 2008-04-20
++ *
++ * NOTE :
++ * 		1, The application layer for reading, writing ec registers and code 
++ * 		program are supported.
++ */
++
++/***********************************************************/
++/* ec delay time 500us for register and status access */
++#define	EC_REG_DELAY	500	//unit : us
++
++/* version burned address */
++#define	VER_ADDR	0xf7a1
++#define	VER_MAX_SIZE	7
++#define	EC_ROM_MAX_SIZE	0x10000
++
++/* ec internal register */
++#define	REG_POWER_MODE		0xF710
++#define	FLAG_NORMAL_MODE	0x00
++#define	FLAG_IDLE_MODE		0x01
++#define	FLAG_RESET_MODE		0x02
++
++/* ec update program flag */
++#define	PROGRAM_FLAG_NONE	0x00
++#define	PROGRAM_FLAG_IE		0x01
++#define	PROGRAM_FLAG_ROM	0x02
++
++/* XBI relative registers */
++#define REG_XBISEG0     0xFEA0
++#define REG_XBISEG1     0xFEA1
++#define REG_XBIRSV2     0xFEA2
++#define REG_XBIRSV3     0xFEA3
++#define REG_XBIRSV4     0xFEA4
++#define REG_XBICFG      0xFEA5
++#define REG_XBICS       0xFEA6
++#define REG_XBIWE       0xFEA7
++#define REG_XBISPIA0    0xFEA8
++#define REG_XBISPIA1    0xFEA9
++#define REG_XBISPIA2    0xFEAA
++#define REG_XBISPIDAT   0xFEAB
++#define REG_XBISPICMD   0xFEAC
++#define REG_XBISPICFG   0xFEAD
++#define REG_XBISPIDATR  0xFEAE
++#define REG_XBISPICFG2  0xFEAF
++
++/* commands definition for REG_XBISPICMD */
++#define	SPICMD_WRITE_STATUS		0x01
++#define	SPICMD_BYTE_PROGRAM		0x02
++#define	SPICMD_READ_BYTE		0x03
++#define	SPICMD_WRITE_DISABLE	0x04
++#define	SPICMD_READ_STATUS		0x05
++#define	SPICMD_WRITE_ENABLE		0x06
++#define	SPICMD_HIGH_SPEED_READ	0x0B
++#define	SPICMD_POWER_DOWN		0xB9
++#define	SPICMD_SST_EWSR			0x50
++#define	SPICMD_SST_SEC_ERASE	0x20
++#define	SPICMD_SST_BLK_ERASE	0x52
++#define	SPICMD_SST_CHIP_ERASE	0x60
++#define	SPICMD_FRDO				0x3B
++#define	SPICMD_SEC_ERASE		0xD7
++#define	SPICMD_BLK_ERASE		0xD8
++#define SPICMD_CHIP_ERASE		0xC7
++
++/* bits definition for REG_XBISPICFG */
++#define	SPICFG_AUTO_CHECK		0x01
++#define	SPICFG_SPI_BUSY			0x02
++#define	SPICFG_DUMMY_READ		0x04
++#define	SPICFG_EN_SPICMD		0x08
++#define	SPICFG_LOW_SPICS		0x10
++#define	SPICFG_EN_SHORT_READ	0x20
++#define	SPICFG_EN_OFFSET_READ	0x40
++#define	SPICFG_EN_FAST_READ		0x80
++
++/* SMBUS relative register block according to the EC datasheet. */
++#define	REG_SMBTCRC				0xff92
++#define	REG_SMBPIN				0xff93
++#define	REG_SMBCFG				0xff94
++#define	REG_SMBEN				0xff95
++#define	REG_SMBPF				0xff96
++#define	REG_SMBRCRC				0xff97
++#define	REG_SMBPRTCL			0xff98
++#define	REG_SMBSTS				0xff99
++#define	REG_SMBADR				0xff9a
++#define	REG_SMBCMD				0xff9b
++#define	REG_SMBDAT_START		0xff9c
++#define	REG_SMBDAT_END			0xffa3
++#define	SMBDAT_SIZE				8
++#define	REG_SMBRSA				0xffa4
++#define	REG_SMBCNT				0xffbc
++#define	REG_SMBAADR				0xffbd
++#define	REG_SMBADAT0			0xffbe
++#define	REG_SMBADAT1			0xffbf
++
++/* watchdog timer registers */
++#define	REG_WDTCFG				0xfe80
++#define	REG_WDTPF				0xfe81
++#define REG_WDT					0xfe82
++
++/* lpc configure register */
++#define	REG_LPCCFG				0xfe95
++
++/* 8051 reg */
++#define	REG_PXCFG				0xff14
++
++/* Fan register in KB3310 */
++#define	REG_ECFAN_SPEED_LEVEL	0xf4e4
++#define	REG_ECFAN_SWITCH		0xf4d2
++
++/*************************************************************/
++/* the ec flash rom id number */
++#define	EC_ROM_PRODUCT_ID_SPANSION	0x01
++#define	EC_ROM_PRODUCT_ID_MXIC		0xC2
++#define	EC_ROM_PRODUCT_ID_AMIC		0x37
++#define	EC_ROM_PRODUCT_ID_EONIC		0x1C
++
++/**************************************************************/
++
++/* Ec misc device name */
++#define	EC_MISC_DEV		"ec_misc"
++
++/* Ec misc device minor number */
++#define	ECMISC_MINOR_DEV	MISC_DYNAMIC_MINOR	
++
++#define	EC_IOC_MAGIC		'E'
++/* misc ioctl operations */
++#define	IOCTL_RDREG		_IOR(EC_IOC_MAGIC, 1, int)
++#define	IOCTL_WRREG		_IOW(EC_IOC_MAGIC, 2, int)
++#define	IOCTL_READ_EC		_IOR(EC_IOC_MAGIC, 3, int)
++#define	IOCTL_PROGRAM_IE	_IOW(EC_IOC_MAGIC, 4, int)
++#define	IOCTL_PROGRAM_EC	_IOW(EC_IOC_MAGIC, 5, int)
++
++/* start address for programming of EC content or IE */
++#define	EC_START_ADDR	0x00000000	// ec running code start address
++#define	IE_START_ADDR	0x00020000	// ec information element storing address
++#define RESVEC_START_ADDR       0x00010000      // ec reserve firmware code storing address
++
++/* EC state */
++#define	EC_STATE_IDLE	0x00	// ec in idle state
++#define	EC_STATE_BUSY	0x01	// ec in busy state
++
++/* timeout value for programming */
++#define	EC_FLASH_TIMEOUT	0x1000	// ec program timeout
++#define	EC_CMD_TIMEOUT		0x1000	// command checkout timeout including cmd to port or state flag check
++#define	EC_SPICMD_STANDARD_TIMEOUT	(4 * 1000)	// unit : us
++#define	EC_MAX_DELAY_UNIT	(10)			// every time for polling
++#define	SPI_FINISH_WAIT_TIME	10
++/* EC content max size */
++#define	EC_CONTENT_MAX_SIZE	(64 * 1024)
++#define	IE_CONTENT_MAX_SIZE	(0x100000 - IE_START_ADDR)
++
++/*
++ * piece structure :
++ *	------------------------------
++ *	| 1byte | 3 bytes | 28 bytes |
++ *	| flag  | addr	  | data	 |
++ *	------------------------------
++ *	flag : 
++ *		bit0 : '1' for first piece, '0' for other
++ *	addr :
++ *		address for EC to burn the data to(rom address)
++ *	data :
++ *		data which we should burn to the ec rom
++ *
++ * NOTE : so far max size should be 256bytes, or we should change the address-1 value.
++ * 		piece is used for IE program
++ */
++#define	PIECE_SIZE		(32 - 1 - 3)
++#define	FIRST_PIECE_YES	1
++#define	FIRST_PIECE_NO	0
++#define	PIECE_STATUS_REG	0xF77C			// piece program status reg from ec firmware
++#define	PIECE_STATUS_PROGRAM_DONE	0x80	// piece program status reg done flag
++#define	PIECE_STATUS_PROGRAM_ERROR	0x40	// piece program status reg error flag
++#define	PIECE_START_ADDR	0xF800			// 32bytes should be stored here
++
++/* the register operation access struct */
++struct ec_reg {
++	u32 addr;	/* the address of kb3310 registers */
++	u8	val;	/* the register value */
++};
++
++struct ec_info {
++	u32 start_addr;
++	u32 size;
++	u8	*buf;
++};
++
++
+diff --git a/drivers/misc/loongson/ec_sci.c b/drivers/misc/loongson/ec_sci.c
+new file mode 100644
+index 0000000..13917fc
+--- /dev/null
++++ b/drivers/misc/loongson/ec_sci.c
+@@ -0,0 +1,1131 @@
++/*
++ * EC(Embedded Controller) KB3310B SCI EVENT management driver on Linux
++ * Author	: liujl <liujl@lemote.com>
++ * Date		: 2008-10-22
++ *
++ * NOTE : Until now, I have no idea for setting the interrupt to edge sensitive
++ *	mode, amd's help should be needed for handling this problem
++ *	So, I assume that the interrupt width is 120us
++ */
++
++/***********************************************************************/
++
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/proc_fs.h>
++#include <linux/miscdevice.h>
++#include <linux/capability.h>
++#include <linux/sched.h>
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/list.h>
++#include <linux/init.h>
++#include <linux/completion.h>
++#include <linux/kthread.h>
++#include <linux/delay.h>
++#include <linux/timer.h>
++#include <linux/errno.h>
++#include <linux/pci.h>
++#include <linux/ioport.h>
++#include <linux/poll.h>
++#include <linux/mutex.h>
++#include <linux/wait.h>
++#include <linux/spinlock.h>
++#include <asm/delay.h>
++#include "ec.h"
++/***********************************************************************/
++
++/* inode information */
++#define	EC_SCI_MINOR_DEV	MISC_DYNAMIC_MINOR
++#define	EC_SCI_DEV			"sci"
++#define	SCI_IRQ_NUM			0x0A
++#define	CS5536_GPIO_SIZE	256
++
++/* ec delay time 500us for register and status access */
++/* unit : us */
++#define	EC_REG_DELAY		300
++
++/***********************************************************************/
++struct ec_sci_reg{
++	u32 addr;
++	u8  val;
++};
++struct ec_sci_reg ecreg;
++
++struct sci_device {
++	/* the sci number get from ec */
++	unsigned char sci_number;
++
++	/* sci count */
++	unsigned char sci_parameter;
++
++	/* irq relative */
++	unsigned char irq;
++	unsigned char irq_data;
++
++	/* device name */
++	unsigned char name[10];
++
++	/* gpio base registers and length */
++	unsigned long gpio_base;
++	unsigned long gpio_size;
++
++	/* lock & wait_queue */
++	wait_queue_head_t wq;
++	spinlock_t lock;
++	
++	/* storage initial value of sci status register 
++	 * sci_init_value[0] as brightness
++	 * sci_init_value[1] as volume 
++	 * sci_init_value[2] as ac
++	 * sci_init_value[3] as display state
++	 * sci_init_value[4] as vga state
++	 */
++	unsigned char sci_init_value[4];
++};
++struct sci_device *sci_device;
++
++#ifdef	CONFIG_PROC_FS
++static ssize_t sci_proc_read(struct file *file, char *buf, size_t len, loff_t *ppos);
++static ssize_t sci_proc_write(struct file *file, const char *buf, size_t len, loff_t *ppos);
++static unsigned int sci_poll(struct file *fp, poll_table *wait);
++static struct proc_dir_entry *sci_proc_entry;
++static struct file_operations sci_proc_fops = {
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
++	owner :	THIS_MODULE,
++#endif
++	read  : sci_proc_read,
++	poll  : sci_poll,
++	write : sci_proc_write,
++};
++
++#define	SCI_ACTION_COUNT	21
++#define	SCI_ACTION_WIDTH	20
++char sci_action[SCI_ACTION_COUNT][SCI_ACTION_WIDTH] = {
++	"DISPLAY : LCD",
++	"DISPLAY : CRT",
++	"DISPLAY : ALL",
++	"DISPLAY : CHG",
++	"AUDIO : CHG",
++	"MACHINE : OFF",
++	"MACHINE : RES",
++	"CAMERA : ON",
++	"CAMERA : OFF",
++	//"LCDLED : ON",
++	//"LCDLED : OFF",
++	"LCD : ON",
++	"LCD : OFF",
++	"LED : ON",
++	"LED : OFF",
++	"VGA : ON",
++	"VGA : OFF",
++	"BKLIGHT : UP",
++	"BKLIGHT : DOWN",
++	"AC : IN",
++	"AC : OUT",
++	"NONE",
++	"NONE"
++};
++
++static enum {
++	CMD_DISPLAY_LCD = 0, 
++	CMD_DISPLAY_CRT,
++	CMD_DISPLAY_ALL,
++	CMD_DISPLAY_CHANGE_BRIGHTNESS,
++	CMD_AUDIO_CHANGE_VOLUME,
++	CMD_MACHINE_OFF,
++	CMD_MACHINE_RESET,
++	CMD_CAMERA_ON,
++	CMD_CAMERA_OFF,
++	CMD_LCD_PWRON,
++	CMD_LCD_PWROFF,
++	CMD_LED_PWRON,
++	CMD_LED_PWROFF,
++	CMD_VGA_PWRON,
++	CMD_VGA_PWROFF,
++	CMD_BKLIGHT_UP,
++	CMD_BKLIGHT_DOWN,
++	CMD_AC_IN,
++	CMD_AC_OUT,
++	//CMD_LCDLED_PWRON,
++	//CMD_LCDLED_PWROFF,
++	CMD_NONE
++}sci_cmd;
++
++#endif
++
++/*******************************************************************/
++
++static void sci_display_lcd(void)
++{
++	unsigned char value;
++
++	outb(0x21, 0x3c4);
++	value = inb(0x3c5);
++	value |= (1 << 7);
++	outb(0x21, 0x3c4);
++	outb(value, 0x3c5);
++
++	outb(0x31, 0x3c4);
++	value = inb(0x3c5);
++	value = (value & 0xf8) | 0x01;
++	outb(0x31, 0x3c4);
++	outb(value, 0x3c5);
++
++	return;
++}
++
++static void sci_display_crt(void)
++{
++	unsigned char value;
++	
++	outb(0x21, 0x3c4);
++	value = inb(0x3c5);
++	value &= ~(1 << 7);
++	outb(0x21, 0x3c4);
++	outb(value, 0x3c5);
++
++	outb(0x31, 0x3c4);
++	value = inb(0x3c5);
++	value = (value & 0xf8) | 0x02;
++	outb(0x31, 0x3c4);
++	outb(value, 0x3c5);
++
++	return;
++}
++
++static void sci_display_all(void)
++{
++	unsigned char value;
++	
++	outb(0x21, 0x3c4);
++	value = inb(0x3c5);
++	value &= ~(1 << 7);
++	outb(0x21, 0x3c4);
++	outb(value, 0x3c5);
++
++	outb(0x31, 0x3c4);
++	value = inb(0x3c5);
++	value = (value & 0xf8) | 0x03;
++	outb(0x31, 0x3c4);
++	outb(value, 0x3c5);
++
++	return;
++}
++
++#if 0
++static void sci_lcdled_power(unsigned char flag)
++{
++	unsigned char value;
++	
++	/* default display crt */
++	outb(0x21, 0x3c4);
++	value = inb(0x3c5);
++	value &= ~(1 << 7);
++	outb(0x21, 0x3c4);
++	outb(value, 0x3c5);
++
++	if(flag == CMD_LCDLED_PWRON){
++		/* open lcd output */
++		outb(0x31, 0x3c4);
++		value = inb(0x3c5);
++		value = (value & 0xf8) | 0x03;
++		outb(0x31, 0x3c4);
++		outb(value, 0x3c5);
++
++		/* LCD backlight on */
++		ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_ON);
++	}
++	else if(flag == CMD_LCDLED_PWROFF){
++		/* close lcd output */
++		outb(0x31, 0x3c4);
++		value = inb(0x3c5);
++		value = (value & 0xf8) | 0x02;
++		outb(0x31, 0x3c4);
++		outb(value, 0x3c5);
++	
++		/* LCD backlight off */
++		ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_OFF);
++	}
++
++	return;
++}
++#endif
++
++static void sci_led_power(unsigned char flag)
++{
++
++	if(flag == CMD_LED_PWRON){
++		/* LCD backlight on */
++		ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_ON);
++	}
++	else if(flag == CMD_LED_PWROFF){
++		/* LCD backlight off */
++		ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_OFF);
++	}
++}
++
++static void sci_vga_power(unsigned char flag)
++{
++	unsigned char value;
++	
++	if(flag == CMD_VGA_PWRON){
++		/* display crt */
++		outb(0x21, 0x3c4);
++		value = inb(0x3c5);
++		value &= ~(1 << 7);
++		outb(0x21, 0x3c4);
++		outb(value, 0x3c5);
++	}
++	else if(flag == CMD_VGA_PWROFF){
++		/* close crt */
++		outb(0x21, 0x3c4);
++		value = inb(0x3c5);
++		value |= (1 << 7);
++		outb(0x21, 0x3c4);
++		outb(value, 0x3c5);
++	}
++
++	return;
++}
++
++static void sci_lcd_power(unsigned char flag)
++{
++	unsigned char value;
++
++	if(flag == CMD_LCD_PWRON){
++		/* open lcd output */
++		outb(0x31, 0x3c4);
++		value = inb(0x3c5);
++		value = (value & 0xf8) | 0x03;
++		outb(0x31, 0x3c4);
++		outb(value, 0x3c5);
++	}
++	else if(flag == CMD_LCD_PWROFF){
++		/* close lcd output */
++		outb(0x31, 0x3c4);
++		value = inb(0x3c5);
++		value = (value & 0xf8) | 0x02;
++		outb(0x31, 0x3c4);
++		outb(value, 0x3c5);
++	}
++
++	return;
++}
++
++static void sci_brightness_write(unsigned char flag)
++{
++	unsigned char level;
++	unsigned char level_max;
++	unsigned char level_min;
++
++	level = ec_read(REG_DISPLAY_BRIGHTNESS);
++
++	if(ec_read(REG_BAT_POWER) & BIT_BAT_POWER_ACIN){
++		PRINTK_DBG("AC exist...\n");
++		if(level == FLAG_DISPLAY_BRIGHTNESS_LEVEL_0)
++			level = FLAG_DISPLAY_BRIGHTNESS_LEVEL_1;
++		level_max = FLAG_DISPLAY_BRIGHTNESS_LEVEL_8;
++		level_min = FLAG_DISPLAY_BRIGHTNESS_LEVEL_1;
++	}
++	else{
++		PRINTK_DBG("AC no exist...\n");
++		if(level == FLAG_DISPLAY_BRIGHTNESS_LEVEL_8)
++			level = FLAG_DISPLAY_BRIGHTNESS_LEVEL_7;
++		level_max = FLAG_DISPLAY_BRIGHTNESS_LEVEL_7;
++		level_min = FLAG_DISPLAY_BRIGHTNESS_LEVEL_0;
++	}
++	if(flag == CMD_BKLIGHT_UP){
++		if(level < level_max && level >= level_min)
++			ec_write(REG_DISPLAY_BRIGHTNESS, ++level);
++		PRINTK_DBG("Brightness status(UP): 0x%x\n", ec_read(REG_DISPLAY_BRIGHTNESS));
++	}
++	else if(flag == CMD_BKLIGHT_DOWN){
++		if(level <= level_max && level > level_min)
++			ec_write(REG_DISPLAY_BRIGHTNESS, --level);
++		PRINTK_DBG("Brightness status(DOWN): 0x%x\n", ec_read(REG_DISPLAY_BRIGHTNESS));
++	}
++
++	return;
++}
++
++static void sci_ac_in_out(unsigned char flag)
++{
++	if(flag == CMD_AC_IN){
++		if(ec_read(REG_DISPLAY_BRIGHTNESS) < FLAG_DISPLAY_BRIGHTNESS_LEVEL_8){
++			PRINTK_DBG("ACIN...\n");
++			ec_write(REG_DISPLAY_BRIGHTNESS, ec_read(REG_DISPLAY_BRIGHTNESS) + 1);
++		}
++	}
++	else if(flag == CMD_AC_OUT){
++		if(ec_read(REG_DISPLAY_BRIGHTNESS) > FLAG_DISPLAY_BRIGHTNESS_LEVEL_0){
++			PRINTK_DBG("ACOUT...\n");
++			ec_write(REG_DISPLAY_BRIGHTNESS, ec_read(REG_DISPLAY_BRIGHTNESS) - 1);
++		}
++	}
++
++	return;
++}
++
++static void sci_display_change_brightness(void)
++{
++	ec_write(REG_DISPLAY_BRIGHTNESS, FLAG_DISPLAY_BRIGHTNESS_LEVEL_4);
++	return;
++}
++
++static void sci_audio_change_volume(void)
++{
++	ec_write(REG_AUDIO_VOLUME, FLAG_AUDIO_VOLUME_LEVEL_5);
++	return;
++}
++
++static void sci_camera_on_off(void)
++{
++	unsigned char val;
++	val = ec_read(REG_CAMERA_CONTROL);
++	ec_write(REG_CAMERA_CONTROL, val | (1 << 1));
++	return;
++}
++
++static void sci_machine_off(void)
++{
++#ifdef  CONFIG_64BIT
++	/* cpu-gpio0 output low */
++        *((volatile unsigned int *)(0xffffffffbfe0011c)) &= ~0x00000001;
++	/* cpu-gpio0 as output */
++	*((volatile unsigned int *)(0xffffffffbfe00120)) &= ~0x00000001;
++#else
++	/* cpu-gpio0 output low */
++	*((volatile unsigned int *)(0xbfe0011c)) &= ~0x00000001;
++	/* cpu-gpio0 as output */
++	*((volatile unsigned int *)(0xbfe00120)) &= ~0x00000001;
++#endif  //end ifdef CONFIG_64BIT 
++	return;
++}
++
++static void sci_machine_reset(void)
++{
++	ec_write(REG_RESET, BIT_RESET_ON);	
++	return;
++}
++
++/*******************************************************************/
++//static const char driver_version[] = "1.0";
++static const char driver_version[] = VERSION;
++
++#ifdef CONFIG_PROC_FS
++#define	PROC_BUF_SIZE	128
++unsigned char proc_buf[PROC_BUF_SIZE];
++
++/*
++ * sci_proc_read :
++ *	read information from sci device and suppied to upper layer
++ *	The format is as following :
++ *	driver_version		1.0
++ *	DISPLAY BRIGHTNESS INCREASE
++ *	DISPLAY BRIGHTNESS DECREASE
++ *	AUDIO VOLUME INCREASE
++ *	AUDIO VOLUME DECREASE
++ *	MUTE		0x00 close, 0x01 open
++ *	WLAN		0x00 close, 0x01 open
++ *	LID			0x00 close, 0x01 open
++ *	DISPLAY TOGGLE
++ *	BLACK SCREEN
++ *	SLEEP
++ *	OVER TEMPERATURE
++ *	CRT DETECT
++ *	CAMERA		0x00 close, 0x01 open
++ *	USB OC2
++ *	USB OC0
++ *	BAT IN
++ *	AC IN
++ *	INIT CAP
++ *	CHARGE MODE
++ *	STOP CHARGE
++ *	BAT LOW
++ *	BAT FULL
++ */
++static ssize_t sci_proc_read(struct file *file, char *buf, size_t len, loff_t *ppos)
++{
++	unsigned char event[SCI_MAX_EVENT_COUNT];
++	int ret = 0;
++	int i;
++	int count = 0;
++	DECLARE_WAITQUEUE(wait, current);
++	
++	PRINTK_DBG("0 irq_data %d\n", sci_device->irq_data);
++
++	if (sci_device->irq_data == 0) {
++		add_wait_queue(&(sci_device->wq), &wait);
++
++		while (!sci_device->irq_data) {
++			set_current_state(TASK_INTERRUPTIBLE);
++			schedule();
++		}
++		remove_wait_queue(&(sci_device->wq), &wait);
++	}
++
++
++	PRINTK_DBG("1 irq_data %d\n", sci_device->irq_data);
++	__set_current_state(TASK_RUNNING);
++
++
++	ret = sprintf(proc_buf, "0x%x\t%d\n", sci_device->sci_number, sci_device->sci_parameter);
++
++	count = strlen(proc_buf);
++	sci_device->irq_data = 0;
++
++	if(len < count)	
++		return -ENOMEM;
++	if(PROC_BUF_SIZE < count)
++		return -ENOMEM;
++
++	if(copy_to_user(buf, proc_buf, count))
++		return -EFAULT;
++	
++	return count;
++}
++
++/*
++ * sci_proc_write :
++ *	get the upper layer's action and take action.
++ */
++static ssize_t sci_proc_write(struct file *file, const char *buf, size_t len, loff_t *ppos)
++{
++	int i;
++	
++	if(len > PROC_BUF_SIZE)
++		return -ENOMEM;
++	if(copy_from_user(proc_buf, buf, len))
++		return -EFAULT;
++	proc_buf[len] = '\0';
++
++	PRINTK_DBG("proc_buf : %s\n", proc_buf);
++	for(i = 0; i < SCI_ACTION_COUNT; i++){
++		if(strncmp(proc_buf, sci_action[i], strlen(sci_action[i])) == 0){
++			sci_cmd = i;
++			break;
++		}
++	}
++	if(i == SCI_ACTION_COUNT)
++		sci_cmd = CMD_NONE;
++	PRINTK_DBG("sci_cmd: %d\n", sci_cmd);
++	switch(sci_cmd){
++		case	CMD_DISPLAY_LCD :
++			sci_display_lcd();
++			PRINTK_DBG(KERN_DEBUG "CMD_DISPLAY_LCD");
++			break;
++		case	CMD_DISPLAY_CRT :
++			sci_display_crt();
++			PRINTK_DBG(KERN_DEBUG "CMD_DISPLAY_CRT");
++			break;
++		case	CMD_DISPLAY_ALL :
++			sci_display_all();
++			PRINTK_DBG(KERN_DEBUG "CMD_DISPLAY_ALL");
++			break;
++		case	CMD_DISPLAY_CHANGE_BRIGHTNESS :
++			sci_display_change_brightness();
++			PRINTK_DBG(KERN_DEBUG "CMD_DISPLAY_CHANGE_BRIGHTNESS");
++			break;
++		case	CMD_AUDIO_CHANGE_VOLUME :
++			sci_audio_change_volume();
++			PRINTK_DBG(KERN_DEBUG "CMD_AUDIO_CHANGE_VOLUME");
++			break;
++		case	CMD_MACHINE_OFF :
++			sci_machine_off();
++			PRINTK_DBG(KERN_DEBUG "CMD_MACHINE_OFF");
++			break;
++		case	CMD_MACHINE_RESET :
++			sci_machine_reset();
++			PRINTK_DBG(KERN_DEBUG "CMD_MACHINE_RESET");
++			break;
++		case	CMD_CAMERA_ON :
++			sci_camera_on_off();
++			PRINTK_DBG(KERN_DEBUG "CMD_CAMERA_ON");
++			break;
++		case	CMD_CAMERA_OFF :
++			sci_camera_on_off();
++			PRINTK_DBG(KERN_DEBUG "CMD_CAMERA_OFF");
++			break;
++	/*	case	CMD_LCDLED_PWRON :
++			sci_lcdled_power(CMD_LCDLED_PWRON);
++			PRINTK_DBG(KERN_DEBUG "CMD_LCDLED_PWRON");
++			break;
++		case	CMD_LCDLED_PWROFF :
++			sci_lcdled_power(CMD_LCDLED_PWROFF);
++			PRINTK_DBG(KERN_DEBUG "CMD_LCDLED_PWROFF");
++			break;
++	*/	case	CMD_LCD_PWRON :
++			sci_lcd_power(CMD_LCD_PWRON);
++			PRINTK_DBG(KERN_DEBUG "CMD_LCD_PWRON\n");
++			break;
++		case	CMD_LCD_PWROFF :
++			sci_lcd_power(CMD_LCD_PWROFF);
++			PRINTK_DBG(KERN_DEBUG "CMD_LCD_PWROFF\n");
++			break;
++		case	CMD_LED_PWRON :
++			sci_led_power(CMD_LED_PWRON);
++			PRINTK_DBG(KERN_DEBUG "CMD_LED_PWRON\n");
++			break;
++		case	CMD_LED_PWROFF :
++			sci_led_power(CMD_LED_PWROFF);
++			PRINTK_DBG(KERN_DEBUG "CMD_LED_PWROFF\n");
++			break;
++		case	CMD_VGA_PWRON :
++			sci_vga_power(CMD_VGA_PWRON);
++			PRINTK_DBG(KERN_DEBUG "CMD_VGA_PWRON\n");
++			break;
++		case	CMD_VGA_PWROFF :
++			sci_vga_power(CMD_VGA_PWROFF);
++			PRINTK_DBG(KERN_DEBUG "CMD_VGA_PWROFF\n");
++			break;
++		case	CMD_BKLIGHT_UP :
++			sci_brightness_write(CMD_BKLIGHT_UP);
++			PRINTK_DBG(KERN_DEBUG "CMD_BKLIGHT_UP\n");
++			break;
++		case	CMD_BKLIGHT_DOWN :
++			PRINTK_DBG(KERN_DEBUG "CMD_BKLIGHT_DOWN: %d\n", CMD_BKLIGHT_DOWN);
++			sci_brightness_write(CMD_BKLIGHT_DOWN);
++			PRINTK_DBG(KERN_DEBUG "CMD_BKLIGHT_DOWN\n");
++			break;
++		case	CMD_AC_IN :
++			sci_ac_in_out(CMD_AC_IN);
++			PRINTK_DBG(KERN_DEBUG "CMD_AC_IN\n");
++			break;
++		case	CMD_AC_OUT :
++			sci_ac_in_out(CMD_AC_OUT);
++			PRINTK_DBG(KERN_DEBUG "CMD_AC_OUT\n");
++			break;
++
++		default :
++			printk(KERN_ERR "EC SCI : Not supported cmd.\n");
++			return -EINVAL;
++	}
++	
++	return len;
++}
++#endif
++
++/*******************************************************************************/
++
++/*
++ * sci_query_event_num :
++ *	using query command to ec to get the proper event number
++ */
++static int sci_query_event_num(void)
++{
++	int ret = 0;
++
++	ret = ec_query_seq(CMD_GET_EVENT_NUM);
++	return ret;
++}
++
++/*
++ * sci_parse_num :
++ *	parse the event number routine, and store all the information
++ *	to the sci_num_array[] for upper layer using
++ */
++static int sci_parse_num(struct sci_device *sci_device)
++{
++	unsigned char val;
++
++	switch(sci_device->sci_number){
++		case	SCI_EVENT_NUM_LID :
++			sci_device->sci_parameter = ec_read(REG_LID_DETECT);
++			break;
++		case	SCI_EVENT_NUM_DISPLAY_TOGGLE :
++			if (ec_read(REG_CRT_DETECT) == 1) 
++					sci_device->sci_init_value[3] = (sci_device->sci_init_value[3] + 1) % 3;
++			sci_device->sci_parameter = sci_device->sci_init_value[3];
++			break;
++		case	SCI_EVENT_NUM_SLEEP :
++			sci_device->sci_parameter = 0x01;
++			break;
++		case	SCI_EVENT_NUM_OVERTEMP : /* fix me, state not clear */
++			sci_device->sci_parameter = (ec_read(REG_BAT_CHARGE_STATUS) & BIT_BAT_CHARGE_STATUS_OVERTEMP) >> 2;
++			break;
++		case	SCI_EVENT_NUM_CRT_DETECT :
++			sci_device->sci_parameter = ec_read(REG_CRT_DETECT);
++			if (sci_device->sci_parameter == 0) sci_device->sci_init_value[3] = 0;
++			break;
++		case	SCI_EVENT_NUM_CAMERA :
++			sci_device->sci_parameter = ec_read(REG_CAMERA_STATUS);
++			break;
++		case	SCI_EVENT_NUM_USB_OC2 :
++			sci_device->sci_parameter = ec_read(REG_USB2_FLAG);
++			break;
++		case	SCI_EVENT_NUM_USB_OC0 :
++			sci_device->sci_parameter = ec_read(REG_USB0_FLAG);
++			break;
++		case	SCI_EVENT_NUM_AC_BAT :
++			val = ec_read(REG_BAT_POWER) & BIT_BAT_POWER_ACIN;
++			sci_device->sci_parameter= 3;
++			if (sci_device->sci_init_value[2] == 0 && val == 1)
++					sci_device->sci_parameter = 1;
++			if (sci_device->sci_init_value[2] == 1 && val == 0)
++					sci_device->sci_parameter = 0;
++			sci_device->sci_init_value[2] = val;
++			break;
++		case	SCI_EVENT_NUM_DISPLAY_BRIGHTNESS :
++				sci_device->sci_parameter = ec_read(REG_DISPLAY_BRIGHTNESS);
++			break;
++		case	SCI_EVENT_NUM_AUDIO_VOLUME :
++			val = ec_read(REG_AUDIO_VOLUME);
++			sci_device->sci_parameter = val;
++#if 0
++				if (val == 8 || val > sci_device->sci_init_value[1])
++						sci_device->sci_parameter = 1;
++				if (val == 0 || val < sci_device->sci_init_value[1])
++						sci_device->sci_parameter = 0;
++				sci_device->sci_init_value[1] = val;
++#endif
++			break;
++		case	SCI_EVENT_NUM_WLAN :
++			sci_device->sci_parameter = ec_read(REG_WLAN_STATUS);
++			break;
++		case	SCI_EVENT_NUM_AUDIO_MUTE :
++			sci_device->sci_parameter = ec_read(REG_AUDIO_MUTE);
++			break;
++		case	SCI_EVENT_NUM_BLACK_SCREEN :
++			sci_device->sci_parameter = ec_read(REG_DISPLAY_LCD);
++			break;
++			
++		default :
++			PRINTK_DBG(KERN_ERR "EC SCI : not supported SCI NUMBER.\n");
++			return -EINVAL;
++			break;		
++	}
++	
++	return 0;
++}
++
++/***************************************************************/
++#define EC_SCI_EVENT_BASE 0x21
++ec_handler ec_irq_handler[SCI_MAX_EVENT_COUNT];
++
++void ec_handler_install(int event_nu, ec_handler irq_handler)
++{
++    ec_irq_handler[event_nu - EC_SCI_EVENT_BASE] = irq_handler;
++}
++
++EXPORT_SYMBOL(ec_handler_install);
++
++void ec_handler_uninstall(int event_nu)
++{
++    ec_irq_handler[event_nu - EC_SCI_EVENT_BASE] = NULL;
++}
++
++EXPORT_SYMBOL(ec_handler_uninstall);
++
++
++/*
++ * sci_int_routine : sci main interrupt routine
++ * we will do the query and get event number together
++ * so the interrupt routine should be longer than 120us
++ * now at least 3ms elpase for it.
++ */
++static irqreturn_t sci_int_routine(int irq, void *dev_id)
++{
++	int ret;
++	
++	if(sci_device->irq != irq){
++		PRINTK_DBG(KERN_ERR "EC SCI :spurious irq.\n");
++		return IRQ_NONE;
++	}
++
++	/* query the event number */
++	ret = sci_query_event_num();
++	if(ret < 0){
++		PRINTK_DBG("ret 1: %d\n", ret);
++		return IRQ_NONE;
++	}
++
++	ret = sci_get_event_num();
++	if(ret < 0){
++		PRINTK_DBG("ret 2: %d\n", ret);
++		return IRQ_NONE;
++	}
++	sci_device->sci_number = ret;
++	
++	PRINTK_DBG(KERN_INFO "sci_number :0x%x\n", sci_device->sci_number);
++
++	/* report the AC/BAT change */
++	if((sci_device->sci_number == SCI_EVENT_NUM_AC_BAT) ||(sci_device->sci_number == 0x31)){
++		ec_handler handler;
++		handler = ec_irq_handler[SCI_EVENT_NUM_AC_BAT - EC_SCI_EVENT_BASE];
++		if(handler)
++			handler();
++	}
++
++	/* parse the event number and wake the queue */
++	if( (sci_device->sci_number != 0x00) 
++		&& (sci_device->sci_number != 0xff) ){
++		ret = sci_parse_num(sci_device);
++		PRINTK_DBG("ret 3: %d\n", ret);
++		if(!ret)
++			sci_device->irq_data = 1;
++		else
++			sci_device->irq_data = 0;			
++
++		wake_up_interruptible(&(sci_device->wq));
++		PRINTK_DBG("interrupitble\n");
++	}
++
++	return IRQ_HANDLED;
++}
++
++/************************************************************/
++
++static int sci_open(struct inode * inode, struct file * filp)
++{
++	PRINTK_DBG(KERN_INFO "SCI : open ok.\n");
++	return 0;
++}
++
++static int sci_release(struct inode * inode, struct file * filp)
++{
++	PRINTK_DBG(KERN_INFO "SCI : close ok.\n");
++	return 0;
++}
++
++/*
++ * sci_poll : poll routine for upper layer using
++ */
++static unsigned int sci_poll(struct file *fp, poll_table *wait)
++{
++	int mask = 0;
++
++	//printk("current task %p\n", current);
++	poll_wait(fp, &(sci_device->wq), wait);
++	if(sci_device->irq_data){
++		//printk("current task 1 %p\n", current);
++		mask = POLLIN | POLLRDNORM;
++	}
++
++	return mask;
++}
++
++static int sci_ioctl(struct inode *inode, struct file *filp, unsigned long cmd, unsigned long arg)
++{
++	void __user *ptr = (void __user *)arg;
++	int ret = 0;
++
++	switch(cmd){
++//		case	IOCTL_GET_INIT_STATE :
++		case	1 :
++			ret = copy_from_user(&ecreg, ptr, sizeof(struct ec_sci_reg));
++			if(ret){
++				printk(KERN_ERR "read from user error.\n");
++				return -EFAULT;
++			}
++			if(ecreg.addr < 0xf400 || ecreg.addr > 0xffff){
++				return -EINVAL;
++			}
++			ecreg.val = ec_read(ecreg.addr);
++			ret = copy_to_user(ptr, &ecreg, sizeof(struct ec_sci_reg));
++			if(ret){
++				printk(KERN_ERR "reg read : copy to user error.\n");
++				return -EFAULT;
++			}
++			break;
++		default :
++			break;
++	}
++	
++	return 0;
++}
++
++static long sci_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
++{
++	return sci_ioctl(file->f_dentry->d_inode, file, cmd, arg);
++}
++
++static const struct file_operations sci_fops = {
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
++	.owner		= THIS_MODULE,
++#endif
++#ifdef	CONFIG_64BIT
++	.compat_ioctl	= sci_compat_ioctl,
++#else
++	.ioclt		= sci_ioctl,
++#endif
++	.open		= sci_open,
++	.poll		= sci_poll,
++	.release	= sci_release,
++};
++
++static struct miscdevice sci_dev = {
++	.minor		= EC_SCI_MINOR_DEV,
++	.name		= EC_SCI_DEV,
++	.fops		= &sci_fops
++};
++
++/********************************************************/
++
++static struct pci_device_id sci_pci_tbl[] = {
++	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
++	{ }
++};
++MODULE_DEVICE_TABLE(pci, sci_pci_tbl);
++
++/*
++ * sci_low_level_init :
++ *	config and init some msr and gpio register properly.
++ */
++static int sci_low_level_init(struct sci_device *scidev)
++{
++	u32 hi, lo;
++	u32 gpio_base = scidev->gpio_base;
++	int ret = 0;
++	unsigned long flags;
++
++	/* filter the former kb3310 interrupt for security */
++	ret = sci_query_event_num();
++	if(ret){
++		PRINTK_DBG(KERN_ERR "sci low level init query event num failed.\n");
++		return ret;
++	}
++
++	/* for filtering next number interrupt */
++	udelay(10000);
++
++	/* set gpio native registers and msrs for GPIO27 SCI EVENT PIN 
++	 * gpio :
++	 *	input, pull-up, no-invert, event-count and value 0, 
++	 *	no-filter, no edge mode
++	 *	gpio27 map to Virtual gpio0
++	 * msr :
++	 *	no primary and lpc
++	 *	Unrestricted Z input to IG10 from Virtual gpio 0.
++	 */
++	local_irq_save(flags);
++	_rdmsr(0x80000024, &hi, &lo);
++	lo &= ~(1 << 10);
++	_wrmsr(0x80000024, hi, lo);
++	_rdmsr(0x80000025, &hi, &lo);
++	lo &= ~(1 << 10);
++	_wrmsr(0x80000025, hi, lo);
++	_rdmsr(0x80000023, &hi, &lo);
++	lo |= (0x0a << 0);
++	_wrmsr(0x80000023, hi, lo);
++	local_irq_restore(flags);
++	
++	/* set gpio27 as sci interrupt : 
++	 * input, pull-up, no-fliter, no-negedge, invert
++	 * the sci event is just about 120us
++	 */
++	asm(".set noreorder\n");
++	// input enable
++	outl( 0x00000800, (gpio_base | 0xA0) );
++	// revert the input
++	outl( 0x00000800, (gpio_base | 0xA4) );
++	// event-int enable
++	outl( 0x00000800, (gpio_base | 0xB8) );
++	asm(".set reorder\n");
++
++	return 0;
++}
++
++/*
++ * sci_pci_init :
++ *	pci init routine
++ */
++static int __devinit sci_pci_init(struct pci_dev *pdev, const struct pci_device_id *ent)
++{
++	u32 gpio_base;
++	int ret = -EIO;
++	//int i;
++
++	/* init the sci device */
++	sci_device = kmalloc(sizeof(struct sci_device), GFP_KERNEL);
++	if(sci_device == NULL){
++		PRINTK_DBG(KERN_ERR "EC SCI : get memory for sci_device failed.\n");
++		return -ENOMEM;
++	}
++	init_waitqueue_head(&(sci_device->wq));
++	spin_lock_init(&sci_device->lock);
++	sci_device->irq	= SCI_IRQ_NUM;
++	sci_device->irq_data = 0x00;
++	sci_device->sci_number = 0x00;
++	strcpy(sci_device->name, EC_SCI_DEV);
++
++	sci_device->sci_init_value[0] = ec_read(REG_DISPLAY_BRIGHTNESS);
++	sci_device->sci_init_value[1] = ec_read(REG_AUDIO_VOLUME);
++	sci_device->sci_init_value[2] = ec_read(REG_BAT_POWER) & BIT_BAT_POWER_ACIN;
++	sci_device->sci_init_value[3] = 0;
++
++		sci_device->sci_parameter = 0x00;
++
++	/* enable pci device and get the GPIO resources */
++	ret = pci_enable_device(pdev);
++	if(ret){
++		PRINTK_DBG(KERN_ERR "EC SCI : enable pci device failed.\n");
++		ret = -ENODEV;
++		goto out_pdev;
++	}
++	
++	gpio_base = 0x0000;
++	gpio_base = pci_resource_start(pdev, 1);
++	gpio_base &= ~0x0003;
++	if(gpio_base == 0x0000){
++		PRINTK_DBG(KERN_ERR "EC SCI : get resource failed.\n");
++		ret = -ENODEV;
++		goto out_resource;
++	}
++	if(request_region(gpio_base, CS5536_GPIO_SIZE, EC_SCI_DEV) == NULL){
++		PRINTK_DBG(KERN_ERR "EC SCI : base 0x%x, length 0x%x already in use.\n", gpio_base, CS5536_GPIO_SIZE);
++		goto out_resource;
++	}
++	sci_device->gpio_base = gpio_base;
++	sci_device->gpio_size = CS5536_GPIO_SIZE;
++
++	/* init the relative gpio and msrs */
++	ret = sci_low_level_init(sci_device);
++	if(ret < 0){
++		printk(KERN_ERR "EC SCI : low level init failed.\n");
++		goto out_irq;
++	}
++	
++	/* alloc the interrupt for sci not pci */
++	ret = request_irq(sci_device->irq, sci_int_routine, IRQF_SHARED, sci_device->name, sci_device);
++	if(ret){
++		printk(KERN_ERR "EC SCI : request irq %d failed.\n", sci_device->irq);
++		ret = -EFAULT;
++		goto out_irq;
++	}
++
++	/* register the misc device */
++	ret = misc_register(&sci_dev);
++	if (ret != 0) {
++		printk(KERN_ERR "EC SCI : misc register failed.\n");
++		ret = -EFAULT;
++		goto out_misc;
++	}
++	
++	ret = 0;
++	PRINTK_DBG(KERN_INFO "sci probe ok...\n");
++	goto out;
++	
++out_misc :
++	free_irq(sci_device->irq, sci_device);
++out_irq :
++	release_region(sci_device->gpio_base, sci_device->gpio_size);
++out_resource :
++	pci_disable_device(pdev);
++out_pdev :
++	kfree(sci_device);
++out :
++	return ret;
++}
++
++static int sci_pci_resume(struct pci_dev *pdev, pm_message_t msg)
++{
++       int ret = -EIO;
++
++       /* enable device */
++     //ret = pci_restore_state(pdev);
++       if(pci_enable_device(pdev)){
++               printk(KERN_ERR "EC SCI : enable pci device failed.\n");
++               return -1;
++       }
++       /* reinit the relative gpio and msrs */
++       ret = sci_low_level_init(sci_device);
++       if(ret < 0){
++               printk(KERN_ERR "EC SCI : low level init failed.\n");
++       }
++       pdev->dev.power.power_state = msg;
++
++       return ret;
++}
++
++static int sci_pci_suspend (struct pci_dev *pdev, pm_message_t msg)
++{
++       int ret;
++
++       /* do suspend */
++       if (msg.event == PM_EVENT_SUSPEND) {
++               ret = pci_save_state(pdev);
++               pci_disable_device(pdev);
++       }
++
++       pdev->dev.power.power_state = msg;
++
++       return 0;
++}
++
++static void __devexit sci_pci_remove(struct pci_dev *pdev)
++{
++	misc_deregister(&sci_dev);
++	free_irq(sci_device->irq, sci_device);
++	release_region(sci_device->gpio_base, sci_device->gpio_size);
++	pci_disable_device(pdev);
++	kfree(sci_device);
++	
++	return;
++}
++
++static struct pci_driver sci_driver = {
++	.name		= EC_SCI_DEV,
++	.id_table	= sci_pci_tbl,
++	.probe		= sci_pci_init,
++	.remove		= __devexit_p(sci_pci_remove),
++#ifdef CONFIG_PM
++	.suspend	= sci_pci_suspend,
++	.resume     = sci_pci_resume,
++#endif	
++};
++
++
++/**************************************************************************/
++
++static int __init sci_init(void)
++{
++	int ret = 0;
++
++#ifdef CONFIG_PROC_FS
++	sci_proc_entry = NULL;
++	sci_proc_entry = create_proc_entry(EC_SCI_DEV, S_IWUSR | S_IRUGO, NULL);
++	if(sci_proc_entry == NULL){
++		printk(KERN_ERR "EC SCI : register /proc/sci failed.\n");
++		return -EINVAL;
++	}
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
++	sci_proc_entry->owner = THIS_MODULE;
++#endif
++	sci_proc_entry->proc_fops = &sci_proc_fops;
++#endif
++
++	ret = pci_register_driver(&sci_driver);
++	if(ret){
++		printk(KERN_ERR "EC SCI : registrer pci driver error.\n");
++#ifdef	CONFIG_PROC_FS
++		remove_proc_entry(EC_SCI_DEV, NULL);
++#endif
++		return ret;
++	}
++	
++	printk(KERN_INFO "SCI event handler on KB3310B Embedded Controller init.\n");
++
++	return ret;
++}
++
++static void __exit sci_exit(void)
++{
++#ifdef	CONFIG_PROC_FS
++	remove_proc_entry(EC_SCI_DEV, NULL);
++#endif
++	pci_unregister_driver(&sci_driver);
++	printk(KERN_INFO "SCI event handler on KB3310B Embedded Controller exit.\n");
++	
++	return;
++}
++
++module_init(sci_init);
++module_exit(sci_exit);
++
++MODULE_AUTHOR("liujl <liujl@lemote.com>");
++MODULE_DESCRIPTION("SCI Event Management for KB3310");
++MODULE_LICENSE("GPL");
++
++
+diff --git a/drivers/misc/loongson/io_msr_debug.c b/drivers/misc/loongson/io_msr_debug.c
+new file mode 100644
+index 0000000..f54be1b
+--- /dev/null
++++ b/drivers/misc/loongson/io_msr_debug.c
+@@ -0,0 +1,203 @@
++/*
++ * Debug IO and MSR resources driver on Linux
++ * Author	: liujl <liujl@lemote.com>
++ * 			  huangw <huangw@lemote.com>
++ * Date		: 2009-03-03
++ *
++ * NOTE :
++ * 		1, The IO and the MSR resources accessing read/write are supported.
++ */
++
++/*******************************************************************/
++
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/slab.h>
++#include <linux/proc_fs.h>
++#include <linux/miscdevice.h>
++#include <linux/apm_bios.h>
++#include <linux/capability.h>
++#include <linux/sched.h>
++#include <linux/pm.h>
++#include <linux/apm-emulation.h>
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/list.h>
++#include <linux/init.h>
++#include <linux/completion.h>
++#include <linux/kthread.h>
++#include <linux/delay.h>
++#include <linux/timer.h>
++#include <linux/version.h>
++
++#include <asm/delay.h>
++
++struct io_msr_reg {
++	u32 addr;	/* the address of IO and MSR registers */
++	u8  val;	/* the register value for IO */
++	u32 hi;		/* the register value for MSR's high part */
++	u32 lo;		/* the register value for MSR's low part */
++};
++
++#define	IOCTL_RDMSR	_IOR('F', 5, int)
++#define	IOCTL_WRMSR	_IOR('F', 6, int)
++#define	IOCTL_RDIO	_IOR('F', 7, int)
++#define	IOCTL_WRIO	_IOR('F', 8, int)
++
++/* ec io space range */
++#define IO_MAX_ADDR	0xBFD0FFFF
++#define IO_MIN_ADDR	0xBFD00000
++
++/* define kernel version number for support new kernel version */
++//#define KERNEL_VERSION	2.6.30
++
++extern void _rdmsr(u32 msr, u32 *hi, u32 *lo);
++extern void _wrmsr(u32 msr, u32 hi, u32 lo);
++/*******************************************************************/
++
++static int io_msr_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
++{
++	void __user *ptr = (void __user *)arg;
++	struct io_msr_reg *iomsrreg = (struct io_msr_reg *)(filp->private_data);
++	int ret = 0;
++
++	switch (cmd) {
++		case IOCTL_RDIO :
++			ret = copy_from_user(iomsrreg, ptr, sizeof(struct io_msr_reg));
++			if(ret){
++				printk(KERN_ERR "IO read : copy from user error.\n");
++				return -EFAULT;
++			}
++
++			if(iomsrreg->addr > IO_MAX_ADDR || iomsrreg->addr < IO_MIN_ADDR){
++				printk(KERN_ERR "IO read : out of IO address range.\n");
++				return -EINVAL;
++			}
++#ifdef	CONFIG_64BIT
++			iomsrreg->val = *((volatile unsigned char *)(iomsrreg->addr | 0xffffffff00000000));
++#else
++			iomsrreg->val = *((volatile unsigned char *)(iomsrreg->addr));
++#endif
++			ret = copy_to_user(ptr, iomsrreg, sizeof(struct io_msr_reg));
++			if(ret){
++				printk(KERN_ERR "IO read : copy to user error.\n");
++				return -EFAULT;
++			}
++			break;
++	case IOCTL_WRIO :
++			ret = copy_from_user(iomsrreg, ptr, sizeof(struct io_msr_reg));
++			if(ret){
++				printk(KERN_ERR "IO write : copy from user error.\n");
++				return -EFAULT;
++			}
++
++			if(iomsrreg->addr > IO_MAX_ADDR || iomsrreg->addr < IO_MIN_ADDR){
++				printk(KERN_ERR "IO write : out of IO address range.\n");
++				return -EINVAL;
++			}
++#ifdef	CONFIG_64BIT
++			*((volatile unsigned char *)(iomsrreg->addr | 0xffffffff00000000)) = iomsrreg->val;
++#else
++			*((volatile unsigned char *)(iomsrreg->addr)) = iomsrreg->val;
++#endif
++			break;
++		case IOCTL_RDMSR :
++			ret = copy_from_user( iomsrreg, ptr, sizeof(struct io_msr_reg) );
++			if(ret){
++				printk(KERN_ERR "MSR read : copy from user error.\n");
++				return -EFAULT;
++			}
++			_rdmsr( iomsrreg->addr, &(iomsrreg->hi), &(iomsrreg->lo) );
++			ret = copy_to_user( ptr, iomsrreg, sizeof(struct io_msr_reg) );
++			if(ret){
++				printk(KERN_ERR "MSR read : copy to user error.\n");
++				return -EFAULT;
++			}
++			break;
++		case IOCTL_WRMSR :
++			ret = copy_from_user(iomsrreg, ptr, sizeof(struct io_msr_reg));
++			if(ret){
++				printk(KERN_ERR "MSR write : copy from user error.\n");
++				return -EFAULT;
++			}
++			_wrmsr(iomsrreg->addr, iomsrreg->hi, iomsrreg->lo);
++			break;
++
++		default :
++			break;
++	}
++
++	return 0;
++}
++
++static long io_msr_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
++{
++	return io_msr_ioctl(file->f_dentry->d_inode, file, cmd, arg);
++}
++
++static int io_msr_open(struct inode * inode, struct file * filp)
++{
++	struct io_msr_reg *iomsrreg = NULL;
++	iomsrreg = kmalloc(sizeof(struct io_msr_reg), GFP_KERNEL);
++	if (iomsrreg) {
++		filp->private_data = iomsrreg;
++	}
++
++	return iomsrreg ? 0 : -ENOMEM;
++}
++
++static int io_msr_release(struct inode * inode, struct file * filp)
++{
++	struct io_msr_reg *iomsrreg = (struct io_msr_reg *)(filp->private_data);
++
++	filp->private_data = NULL;
++	kfree(iomsrreg);
++
++	return 0;
++}
++
++static struct file_operations io_msr_fops = {
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
++	.owner		= THIS_MODULE,
++#endif
++	.open		= io_msr_open,
++	.release	= io_msr_release,
++	.read		= NULL,
++	.write		= NULL,
++#ifdef	CONFIG_64BIT
++	.compat_ioctl = io_msr_compat_ioctl,
++#else
++	.ioctl		= io_msr_ioctl,
++#endif
++};
++
++/*********************************************************/
++
++static struct miscdevice io_msr_device = {
++	.minor		= MISC_DYNAMIC_MINOR,
++	.name		= "io_msr_dev",
++	.fops		= &io_msr_fops
++};
++
++static int __init io_msr_init(void)
++{
++	int ret;
++
++	printk(KERN_INFO "IO and MSR read/write device init.\n");
++	ret = misc_register(&io_msr_device);
++
++	return ret;
++}
++
++static void __exit io_msr_exit(void)
++{
++	printk(KERN_INFO "IO and MSR read/write device exit.\n");
++	misc_deregister(&io_msr_device);
++}
++
++module_init(io_msr_init);
++module_exit(io_msr_exit);
++
++MODULE_AUTHOR("liujl <liujl@lemote.com>");
++MODULE_DESCRIPTION("IO and MSR resources debug");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/misc/loongson/pmon_flash.c b/drivers/misc/loongson/pmon_flash.c
+new file mode 100644
+index 0000000..d6e879a
+--- /dev/null
++++ b/drivers/misc/loongson/pmon_flash.c
+@@ -0,0 +1,107 @@
++/*
++ *  Copyright www.lemote.com
++ *
++ *  This program is free software; you can redistribute  it and/or modify it
++ *  under  the terms of  the GNU General  Public License as published by the
++ *  Free Software Foundation;  either version 2 of the  License, or (at your
++ *  option) any later version.
++ *
++ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
++ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
++ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
++ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
++ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
++ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
++ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
++ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
++ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
++ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/types.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <asm/io.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/map.h>
++#include <linux/mtd/partitions.h>
++#include <linux/version.h>
++
++#define FLASH_PHYS_ADDR 0x1fc00000
++#define FLASH_SIZE 0x080000
++
++#define FLASH_PARTITION0_ADDR 0x00000000
++#define FLASH_PARTITION0_SIZE 0x00080000
++
++/* define kernel version number for support new kernel version */
++//#define KERNEL_VERSION	2.6.30
++
++struct map_info flash_map = {
++		.name =		"flash device",
++		.size =		FLASH_SIZE,
++		.bankwidth =	1,
++};
++
++struct mtd_partition flash_parts[] = {
++	{
++		.name =		"Bootloader",
++		.offset	=	FLASH_PARTITION0_ADDR,
++		.size =		FLASH_PARTITION0_SIZE
++	},
++};
++
++#define PARTITION_COUNT ARRAY_SIZE(flash_parts)
++
++static struct mtd_info *mymtd;
++
++int __init init_flash(void)
++{
++	printk(KERN_NOTICE "Flash flash device: %x at %x\n",
++			FLASH_SIZE, FLASH_PHYS_ADDR);
++
++	flash_map.phys = FLASH_PHYS_ADDR;
++	flash_map.virt = ioremap(FLASH_PHYS_ADDR,
++					FLASH_SIZE);
++
++	if (!flash_map.virt) {
++		printk("Failed to ioremap\n");
++		return -EIO;
++	}
++
++	simple_map_init(&flash_map);
++
++	mymtd = do_map_probe("cfi_probe", &flash_map);
++	if (mymtd) {
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
++		mymtd->owner = THIS_MODULE;
++#endif
++		add_mtd_partitions(mymtd, flash_parts, PARTITION_COUNT);
++		printk(KERN_NOTICE "pmon flash device initialized\n");
++		return 0;
++	}
++
++	iounmap((void *)flash_map.virt);
++	return -ENXIO;
++}
++
++static void __exit cleanup_flash(void)
++{
++	if (mymtd) {
++		del_mtd_partitions(mymtd);
++		map_destroy(mymtd);
++	}
++	if (flash_map.virt) {
++		iounmap((void *)flash_map.virt);
++		flash_map.virt = 0;
++	}
++}
++
++module_init(init_flash);
++module_exit(cleanup_flash);
++
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Yanhua");
++MODULE_DESCRIPTION("MTD map driver for pmon programming module");
+diff --git a/drivers/misc/loongson/yeeloong_laptop.c b/drivers/misc/loongson/yeeloong_laptop.c
+new file mode 100644
+index 0000000..38631b6
+--- /dev/null
++++ b/drivers/misc/loongson/yeeloong_laptop.c
+@@ -0,0 +1,652 @@
++/*
++ *  Driver for YeeLoong laptop extras
++ *
++ *  Copyright (C) 2009 Lemote Inc.
++ *  Author: Wu Zhangjin <wuzj@lemote.com>
++ *   
++ *  Hongbing Hu <huhb@lemote.com>  Add the battery driver
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation.
++ */
++
++#include <linux/module.h>
++#include <linux/backlight.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/interrupt.h>
++#include <linux/jiffies.h>
++#include <linux/hwmon.h>
++#include <linux/hwmon-sysfs.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++#include <linux/pm.h>
++#include <linux/platform_device.h>
++#include <linux/power_supply.h>
++#include <linux/thermal.h>
++#include <linux/workqueue.h>
++#include <linux/video_output.h>
++
++#include "ec.h"
++
++/*
++ * Battery driver
++ */
++ 
++#define BIT_BAT_POWER_ACIN       (1 << 0)        // adapter is inserted
++
++#define APM_AC_OFFLINE          0
++#define APM_AC_ONLINE           1
++#define APM_AC_BACKUP           2
++#define APM_AC_UNKNOWN          0xff
++
++#define APM_BATTERY_STATUS_HIGH     0
++#define APM_BATTERY_STATUS_LOW      1
++#define APM_BATTERY_STATUS_CRITICAL 2
++#define APM_BATTERY_STATUS_CHARGING 3
++#define APM_BATTERY_STATUS_NOT_PRESENT  4
++#define APM_BATTERY_STATUS_UNKNOWN  0xff
++
++struct yeeloong_power_info {
++	unsigned int ac_in;	/* AC insert or no */
++	unsigned int bat_in;	/* Battery insert or no */
++
++	/* we use capacity for caculating the life and time */
++	unsigned int curr_cap;
++
++	/* battery designed capacity */
++	unsigned int design_cap;
++	/* battery designed voltage */
++	unsigned int design_vol;
++	/* battery capacity after full charged */
++	unsigned int full_charged_cap;
++	/* battery vendor number */
++	unsigned char vendor;
++	/* battery cell count */
++	unsigned char cell_count;
++
++	/* battery dynamic charge/discharge voltage */
++	unsigned int voltage_now;
++	/* battery dynamic charge/discharge  current */
++	int current_now;
++	/* battery current temperature */
++	unsigned int temperature;
++	unsigned int remain_time;
++	unsigned int health;
++	unsigned int charge_status;
++};
++
++struct yeeloong_power_info *power_info;
++
++static struct power_supply  yeeloong_ac, yeeloong_bat;
++
++/**********************************************************
++ *		Get power supply status 		  *	
++ **********************************************************/
++static void  yeeloong_read_bat_status(void)
++{
++    	unsigned int  charge, status, health, state;
++
++	/* fixed value */
++	power_info->design_cap =  (ec_read(REG_BAT_DESIGN_CAP_HIGH) << 8)
++                | ec_read(REG_BAT_DESIGN_CAP_LOW);
++	power_info->design_vol = (ec_read(REG_BAT_DESIGN_VOL_HIGH) << 8)
++                | ec_read(REG_BAT_DESIGN_VOL_LOW); 
++	power_info->full_charged_cap = (ec_read(REG_BAT_FULLCHG_CAP_HIGH) << 8)
++                | ec_read(REG_BAT_FULLCHG_CAP_LOW);
++        
++	/* dynamic value */
++	power_info->voltage_now = (ec_read(REG_BAT_VOLTAGE_HIGH) << 8) 
++		| (ec_read(REG_BAT_VOLTAGE_LOW));
++    	power_info->current_now = (ec_read(REG_BAT_CURRENT_HIGH) << 8) 
++		| (ec_read(REG_BAT_CURRENT_LOW));
++	if(power_info->current_now & 0x8000)
++	    power_info->current_now = 0xffff - power_info->current_now;
++    power_info->temperature = (ec_read(REG_BAT_TEMPERATURE_HIGH) << 8) 
++		| (ec_read(REG_BAT_TEMPERATURE_LOW));
++ 	power_info->curr_cap = (ec_read(REG_BAT_RELATIVE_CAP_HIGH) << 8)
++		| (ec_read(REG_BAT_RELATIVE_CAP_LOW));
++    	power_info->ac_in = ((ec_read(REG_BAT_POWER)) & BIT_BAT_POWER_ACIN) 
++		? APM_AC_ONLINE : APM_AC_OFFLINE;
++
++	status = ec_read(REG_BAT_STATUS);
++	charge = ec_read(REG_BAT_CHARGE);
++	health = ec_read(REG_BAT_CHARGE_STATUS);
++	state  = ec_read(REG_BAT_STATE); /* This register is no need ? */
++
++	power_info->bat_in = status & BIT_BAT_STATUS_IN;
++	if(power_info->bat_in) /* we assume that the health is good */
++		power_info->health = POWER_SUPPLY_HEALTH_GOOD;
++	else{	/* no battery present */
++		power_info->health = POWER_SUPPLY_HEALTH_UNKNOWN;
++		power_info->charge_status = POWER_SUPPLY_STATUS_UNKNOWN;
++	}
++
++	if(status & (BIT_BAT_STATUS_DESTROY | BIT_BAT_STATUS_LOW))
++		power_info->health = POWER_SUPPLY_HEALTH_DEAD;
++	if(status & BIT_BAT_STATUS_FULL ){
++		power_info->charge_status = POWER_SUPPLY_STATUS_FULL;
++		power_info->curr_cap = 100;
++	}
++	
++	if(health & BIT_BAT_CHARGE_STATUS_OVERTEMP)
++		power_info->health = POWER_SUPPLY_HEALTH_OVERHEAT;
++	
++	if(charge & FLAG_BAT_CHARGE_DISCHARGE)
++		power_info->charge_status = POWER_SUPPLY_STATUS_DISCHARGING;
++	else if (charge & FLAG_BAT_CHARGE_CHARGE)
++		power_info->charge_status = POWER_SUPPLY_STATUS_CHARGING;
++}
++
++/*********************************************************************
++ *		Power properties
++ *********************************************************************/
++
++static int yeeloong_get_ac_prop(struct power_supply *psy,
++			   enum power_supply_property psp,
++			   union power_supply_propval *val)
++{
++	switch (psp) {
++	case POWER_SUPPLY_PROP_ONLINE:
++		val->intval = power_info->ac_in;
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static enum power_supply_property yeeloong_ac_props[] = {
++	POWER_SUPPLY_PROP_ONLINE,
++};
++
++static struct power_supply yeeloong_ac = {
++	.name = "yeeloong-ac",
++	.type = POWER_SUPPLY_TYPE_MAINS,
++	.properties = yeeloong_ac_props,
++	.num_properties = ARRAY_SIZE(yeeloong_ac_props),
++	.get_property = yeeloong_get_ac_prop,
++};
++
++/*********************************************************************
++ *		Battery properties
++ *********************************************************************/
++
++static int yeeloong_bat_get_property(struct power_supply *psy,
++				enum power_supply_property psp,
++				union power_supply_propval *val)
++{
++	
++	unsigned int ac_in, bat_in;
++
++	ac_in = power_info->ac_in;
++	bat_in = power_info->bat_in;
++	yeeloong_read_bat_status();
++	if(ac_in != power_info->ac_in)
++		power_supply_changed(&yeeloong_ac);
++	if(bat_in != power_info->bat_in)
++		power_supply_changed(&yeeloong_bat);
++	
++	switch (psp) {
++	case POWER_SUPPLY_PROP_STATUS:
++		val->intval = power_info->charge_status;
++		break;
++	case POWER_SUPPLY_PROP_PRESENT:
++		val->intval = power_info->bat_in; 
++		break;
++	case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
++		val->intval = power_info->design_vol * 1000; /* mV -> µV */
++		break;
++	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
++		val->intval = power_info->design_cap * 1000; /* mA -> µA */
++		break;
++	case POWER_SUPPLY_PROP_CHARGE_FULL:
++		val->intval = power_info->full_charged_cap * 1000;/* µA */
++		break;
++	case POWER_SUPPLY_PROP_HEALTH:
++		val->intval = power_info->health;
++		break;
++	case POWER_SUPPLY_PROP_CURRENT_NOW:
++		val->intval = power_info->current_now * 1000; /* mA -> µA */
++		break;
++	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
++		val->intval =  power_info->voltage_now * 1000; /* mV -> µV */
++		break;
++	case POWER_SUPPLY_PROP_CAPACITY:
++		val->intval = power_info->curr_cap;	/* percentage */
++		break;	
++	case POWER_SUPPLY_PROP_TEMP:
++		val->intval = power_info->temperature;	 /* Celcius */
++		break;
++	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW: 
++	/* calculate the remain time, maybe it is wrong */
++    		if(power_info->bat_in != APM_BATTERY_STATUS_NOT_PRESENT)
++               		power_info->remain_time = ((power_info->curr_cap - 3) * 54 + 142) / 60;
++        	else
++                	power_info->remain_time = 0x00;
++		val->intval = power_info->remain_time * 60;  /* units sec */
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static enum power_supply_property yeeloong_bat_props[] = {
++	POWER_SUPPLY_PROP_STATUS,
++	POWER_SUPPLY_PROP_PRESENT,
++	POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
++	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
++	POWER_SUPPLY_PROP_CURRENT_NOW,
++	POWER_SUPPLY_PROP_VOLTAGE_NOW,
++	POWER_SUPPLY_PROP_HEALTH,
++	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
++	POWER_SUPPLY_PROP_CAPACITY,
++	POWER_SUPPLY_PROP_TEMP,
++};
++
++static struct power_supply  yeeloong_bat = {	
++	.name = "yeeloong-bat",
++	.type = POWER_SUPPLY_TYPE_BATTERY,
++	.properties = yeeloong_bat_props,
++	.num_properties = ARRAY_SIZE(yeeloong_bat_props),
++	.get_property = yeeloong_bat_get_property,
++};
++
++/*
++ * End battery driver
++ */
++
++#define MAX_BRIGHTNESS 8
++#define DEFAULT_BRIGHTNESS (MAX_BRIGHTNESS - 1)
++
++static int yeeloong_set_brightness(struct backlight_device *bd)
++{
++	unsigned int level, current_level;
++	static unsigned int old_level;
++
++	level = (bd->props.fb_blank == FB_BLANK_UNBLANK &&
++		 bd->props.power == FB_BLANK_UNBLANK) ?
++				bd->props.brightness : 0;
++
++	if (level > MAX_BRIGHTNESS)
++		level = MAX_BRIGHTNESS;
++	else if (level < 0)
++		level = 0;
++
++	/* avoid tune the brightness when the EC is tuning it */
++	current_level = ec_read(REG_DISPLAY_BRIGHTNESS);
++//	if ((old_level == current_level) && (old_level != level))
++	if (old_level != level)
++		ec_write(REG_DISPLAY_BRIGHTNESS, level);
++	old_level = level;
++
++	return 0;
++}
++
++static int yeeloong_get_brightness(struct backlight_device *bd)
++{
++	return (int)ec_read(REG_DISPLAY_BRIGHTNESS);
++}
++
++static struct backlight_ops yeeloong_ops = {
++	.get_brightness = yeeloong_get_brightness,
++	.update_status  = yeeloong_set_brightness,
++};
++
++static struct backlight_device *yeeloong_backlight_device;
++
++
++/*
++ * Hwmon
++ */
++
++/* fan speed divider */
++#define	FAN_SPEED_DIVIDER		480000	/* (60*1000*1000/62.5/2)*/
++
++/* pwm(auto/manual) enable or not */
++static int yeeloong_get_fan_pwm_enable(void)
++{
++	int value = 0;
++
++	/* This get the fan control method: auto or manual */
++	value = ec_read(0xf459);
++
++	return value;
++}
++
++static void yeeloong_set_fan_pwm_enable(int manual)
++{
++	if (manual)
++		ec_write(0xf459, 1);
++	else
++		ec_write(0xf459, 0);
++}
++
++static int yeeloong_get_fan_pwm(void)
++{
++	/* fan speed level */
++	return ec_read(0xf4cc);
++}
++
++static void yeeloong_set_fan_pwm(int value)
++{
++	int status;
++
++	/* need to ensure the level?? */
++	printk(KERN_INFO "fan pwm, value = %d\n", value);
++
++	value = SENSORS_LIMIT(value, 0, 3);
++
++	/* if value is not ZERO, we should ensure it is on */
++	if (value != 0) {
++		status = ec_read(0xf4da);
++		if (status == 0)
++			ec_write(0xf4d2, 1);
++	}
++	/* 0xf4cc is for writing */
++	ec_write(0xf4cc, value);
++}
++
++static int yeeloong_get_fan_rpm(void)
++{
++	int value = 0;
++
++	value = FAN_SPEED_DIVIDER /
++		    (((ec_read(REG_FAN_SPEED_HIGH) & 0x0f) << 8) |
++		     ec_read(REG_FAN_SPEED_LOW));
++
++	return value;
++}
++
++/* Thermal subdriver
++ */
++
++static int yeeloong_get_cpu_temp(void)
++{
++	int value;
++
++	value = ec_read(REG_TEMPERATURE_VALUE);
++
++	if (value & (1 << 7))
++		value = (value & 0x7f) - 128;
++	else
++		value = value & 0xff;
++
++	return value * 1000;
++}
++
++static int parse_arg(const char *buf, unsigned long count, int *val)
++{
++	if (!count)
++		return 0;
++	if (sscanf(buf, "%i", val) != 1)
++		return -EINVAL;
++	return count;
++}
++
++static ssize_t store_sys_hwmon(void (*set)(int), const char *buf, size_t count)
++{
++	int rv, value;
++
++	rv = parse_arg(buf, count, &value);
++	if (rv > 0)
++		set(value);
++	return rv;
++}
++
++static ssize_t show_sys_hwmon(int (*get)(void), char *buf)
++{
++	return sprintf(buf, "%d\n", get());
++}
++
++
++#define CREATE_SENSOR_ATTR(_name, _mode, _set, _get)		\
++	static ssize_t show_##_name(struct device *dev,			\
++				    struct device_attribute *attr,	\
++				    char *buf)				\
++	{								\
++		return show_sys_hwmon(_set, buf);			\
++	}								\
++	static ssize_t store_##_name(struct device *dev,		\
++				     struct device_attribute *attr,	\
++				     const char *buf, size_t count)	\
++	{								\
++		return store_sys_hwmon(_get, buf, count);		\
++	}								\
++	static SENSOR_DEVICE_ATTR(_name, _mode, show_##_name, store_##_name, 0);
++
++CREATE_SENSOR_ATTR(fan1_input, S_IRUGO, yeeloong_get_fan_rpm, NULL);
++CREATE_SENSOR_ATTR(pwm1, S_IRUGO | S_IWUSR,
++			 yeeloong_get_fan_pwm, yeeloong_set_fan_pwm);
++CREATE_SENSOR_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
++			 yeeloong_get_fan_pwm_enable, yeeloong_set_fan_pwm_enable);
++CREATE_SENSOR_ATTR(temp1_input, S_IRUGO,
++			 yeeloong_get_cpu_temp, NULL);
++
++static ssize_t
++show_name(struct device *dev, struct device_attribute *attr, char *buf)
++{
++	return sprintf(buf, "yeeloong\n");
++}
++static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, 0);
++
++static struct attribute *hwmon_attributes[] = {
++	&sensor_dev_attr_pwm1.dev_attr.attr,
++	&sensor_dev_attr_fan1_input.dev_attr.attr,
++	&sensor_dev_attr_pwm1_enable.dev_attr.attr,
++	&sensor_dev_attr_temp1_input.dev_attr.attr,
++	&sensor_dev_attr_name.dev_attr.attr,
++	NULL
++};
++
++static struct attribute_group hwmon_attribute_group = {
++	.attrs = hwmon_attributes
++};
++
++struct device *yeeloong_sensors_device;
++
++#ifdef CONFIG_SUSPEND
++static int yeeloong_suspend(struct platform_device *pdev, pm_message_t state)
++{
++	printk(KERN_INFO "yeeloong specific suspend\n");
++
++	/* minimize the speed of FAN */
++	yeeloong_set_fan_pwm_enable(1);
++	yeeloong_set_fan_pwm(1);
++
++	return 0;
++}
++
++static int yeeloong_resume(struct platform_device *pdev)
++{
++	printk(KERN_INFO "yeeloong specific resume\n");
++
++	/* resume fan to auto mode */
++	yeeloong_set_fan_pwm_enable(0);
++
++	return 0;
++}
++#else
++static int yeeloong_suspend(struct platform_device *pdev, pm_message_t state)
++{
++	return 0;
++}
++static int yeeloong_resume(struct platform_device *pdev)
++{
++	return 0;	
++}
++#endif
++
++static struct platform_driver platform_driver = {
++	.driver = {
++		.name = "yeeloong-laptop",
++		.owner = THIS_MODULE,
++	},
++#ifdef CONFIG_PM
++	.suspend = yeeloong_suspend,
++	.resume = yeeloong_resume,
++#endif
++};
++
++static struct platform_device *yeeloong_pdev;
++
++static ssize_t yeeloong_pdev_name_show(struct device *dev,
++			   struct device_attribute *attr,
++			   char *buf)
++{
++	return sprintf(buf, "yeeloong laptop\n");
++}
++
++static struct device_attribute dev_attr_yeeloong_pdev_name =
++	__ATTR(name, S_IRUGO, yeeloong_pdev_name_show, NULL);
++
++/* report power state changes */
++void yeeloong_power_change_trigger_event(void)
++{
++	unsigned int ac_in, bat_in;
++	
++	ac_in = power_info->ac_in;
++	bat_in = power_info->bat_in;
++
++	yeeloong_read_bat_status();
++
++	if(ac_in != power_info->ac_in)
++		power_supply_changed(&yeeloong_ac);
++	if(bat_in != power_info->bat_in)
++		power_supply_changed(&yeeloong_bat);
++}
++
++static int __init yeeloong_init(void)
++{
++	int ret;
++
++	/* Register platform stuff */
++	ret = platform_driver_register(&platform_driver);
++	if (ret)
++		return ret;
++	yeeloong_pdev = platform_device_alloc("yeeloong-laptop", -1);
++	if (!yeeloong_pdev) {
++		ret = -ENOMEM;
++		platform_driver_unregister(&platform_driver);
++		return ret;
++	}
++	ret = platform_device_add(yeeloong_pdev);
++	if (ret) {
++		platform_device_put(yeeloong_pdev);
++		return ret;
++	}
++
++	if (IS_ERR(yeeloong_pdev)) {
++		ret = PTR_ERR(yeeloong_pdev);
++		yeeloong_pdev = NULL;
++		printk(KERN_INFO "unable to register hwmon platform device\n");
++		return ret;
++	}
++	ret = device_create_file(&yeeloong_pdev->dev,
++				 &dev_attr_yeeloong_pdev_name);
++	if (ret) {
++		printk(KERN_INFO "unable to create sysfs hwmon device attributes\n");
++		return ret;
++	}
++
++	/* backlight */
++	yeeloong_backlight_device = backlight_device_register(
++		"backlight0",
++		&yeeloong_pdev->dev, NULL,
++		&yeeloong_ops);
++
++	if (IS_ERR(yeeloong_backlight_device)) {
++		ret = PTR_ERR(yeeloong_backlight_device);
++		yeeloong_backlight_device = NULL;
++		return ret;
++	}
++
++	yeeloong_backlight_device->props.max_brightness = MAX_BRIGHTNESS;
++	yeeloong_backlight_device->props.brightness = DEFAULT_BRIGHTNESS;
++	backlight_update_status(yeeloong_backlight_device);
++
++	/* sensors */
++	yeeloong_sensors_device = hwmon_device_register(&yeeloong_pdev->dev);
++	if (IS_ERR(yeeloong_sensors_device)) {
++		printk(KERN_INFO "Could not register yeeloong hwmon device\n");
++		return PTR_ERR(yeeloong_sensors_device);
++	}
++	ret = sysfs_create_group(&yeeloong_sensors_device->kobj,
++				    &hwmon_attribute_group);
++	if (ret) {
++		sysfs_remove_group(&yeeloong_sensors_device->kobj,
++			   &hwmon_attribute_group);
++		hwmon_device_unregister(yeeloong_sensors_device);
++		yeeloong_sensors_device = NULL;
++	}
++	/* ensure fan is set to auto mode */
++	yeeloong_set_fan_pwm_enable(0);
++
++ 	/* Register battery driver */
++ 	power_info = kzalloc(sizeof(struct yeeloong_power_info),GFP_KERNEL);
++ 	if(!power_info) {
++ 	   printk(KERN_ERR "Get memory failed.\n");
++ 	   return -ENOMEM;
++ 	}
++ 
++ 	/* Battery vendor and cell */
++ 	power_info->vendor = ec_read(REG_BAT_VENDOR);
++ 	power_info->cell_count = ec_read(REG_BAT_CELL_COUNT);
++ 	printk(KERN_INFO "Battery vendor: %s  cell: %d\n",
++ 	   (power_info->vendor == FLAG_BAT_VENDOR_SANYO)?"SANYO":"SIMPLO", power_info->cell_count);
++	
++ 	ret = power_supply_register(&yeeloong_pdev->dev, &yeeloong_ac);
++ 	if (ret)
++ 		goto ac_register_failed;
++ 	ret = power_supply_register(&yeeloong_pdev->dev, &yeeloong_bat);
++ 	if (ret)
++ 		goto battery_register_failed;
++
++	ec_handler_install(SCI_EVENT_NUM_AC_BAT, yeeloong_power_change_trigger_event);
++ 
++ 	goto success;
++ 
++battery_register_failed:
++ 	power_supply_unregister(&yeeloong_bat);
++ac_register_failed:
++ 	power_supply_unregister(&yeeloong_ac);
++ 	kfree(power_info);
++success:
++ 	return ret;
++}
++
++static void __exit yeeloong_exit(void)
++{
++ 	/* Unregister battery driver */
++ 	ec_handler_uninstall(SCI_EVENT_NUM_AC_BAT);
++	power_supply_unregister(&yeeloong_bat);
++ 	power_supply_unregister(&yeeloong_ac);
++ 	kfree(power_info);
++
++	if (yeeloong_backlight_device) {
++		backlight_device_unregister(yeeloong_backlight_device);
++		yeeloong_backlight_device = NULL;
++	}
++
++	if (yeeloong_sensors_device) {
++		sysfs_remove_group(&yeeloong_sensors_device->kobj,
++				&hwmon_attribute_group);
++		hwmon_device_unregister(yeeloong_sensors_device);
++	}
++
++	if (yeeloong_pdev) {
++		platform_device_unregister(yeeloong_pdev);
++	}
++	platform_driver_unregister(&platform_driver);
++}
++
++module_init(yeeloong_init);
++module_exit(yeeloong_exit);
++
++MODULE_AUTHOR("Wu Zhangjin <wuzj@lemote.com>");
++MODULE_DESCRIPTION("YeeLoong laptop driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
+index 60a0453..20fada7 100644
+--- a/drivers/net/Kconfig
++++ b/drivers/net/Kconfig
+@@ -2272,6 +2272,13 @@ config MV643XX_ETH
+ 	  Some boards that use the Discovery chipset are the Momenco
+ 	  Ocelot C and Jaguar ATX and Pegasos II.
+ 
++config TITAN_GE
++	bool "PMC-Sierra TITAN Gigabit Ethernet Support"
++	depends on PMC_YOSEMITE
++	help
++	  This enables support for the the integrated ethernet of
++	  PMC-Sierra's Titan SoC.
++
+ config QLA3XXX
+ 	tristate "QLogic QLA3XXX Network Driver Support"
+ 	depends on PCI
+diff --git a/drivers/net/Makefile b/drivers/net/Makefile
+index 7629c90..284ed83 100644
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -129,6 +129,8 @@ obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o
+ obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
+ obj-$(CONFIG_QLA3XXX) += qla3xxx.o
+ 
++obj-$(CONFIG_TITAN_GE) += titan_mdio.o titan_ge.o
++
+ obj-$(CONFIG_PPP) += ppp_generic.o
+ obj-$(CONFIG_PPP_ASYNC) += ppp_async.o
+ obj-$(CONFIG_PPP_SYNC_TTY) += ppp_synctty.o
+diff --git a/drivers/net/titan_ge.c b/drivers/net/titan_ge.c
+new file mode 100644
+index 0000000..dc137bf
+--- /dev/null
++++ b/drivers/net/titan_ge.c
+@@ -0,0 +1,2069 @@
++/*
++ * drivers/net/titan_ge.c - Driver for Titan ethernet ports
++ *
++ * Copyright (C) 2003 PMC-Sierra Inc.
++ * Author : Manish Lachwani (lachwani@pmc-sierra.com)
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
++ */
++
++/*
++ * The MAC unit of the Titan consists of the following:
++ *
++ * -> XDMA Engine to move data to from the memory to the MAC packet FIFO
++ * -> FIFO is where the incoming and outgoing data is placed
++ * -> TRTG is the unit that pulls the data from the FIFO for Tx and pushes
++ *    the data into the FIFO for Rx
++ * -> TMAC is the outgoing MAC interface and RMAC is the incoming.
++ * -> AFX is the address filtering block
++ * -> GMII block to communicate with the PHY
++ *
++ * Rx will look like the following:
++ * GMII --> RMAC --> AFX --> TRTG --> Rx FIFO --> XDMA --> CPU memory
++ *
++ * Tx will look like the following:
++ * CPU memory --> XDMA --> Tx FIFO --> TRTG --> TMAC --> GMII
++ *
++ * The Titan driver has support for the following performance features:
++ * -> Rx side checksumming
++ * -> Jumbo Frames
++ * -> Interrupt Coalscing
++ * -> Rx NAPI
++ * -> SKB Recycling
++ * -> Transmit/Receive descriptors in SRAM
++ * -> Fast routing for IP forwarding
++ */
++
++#include <linux/dma-mapping.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/sched.h>
++#include <linux/ioport.h>
++#include <linux/interrupt.h>
++#include <linux/slab.h>
++#include <linux/string.h>
++#include <linux/errno.h>
++#include <linux/ip.h>
++#include <linux/init.h>
++#include <linux/in.h>
++#include <linux/platform_device.h>
++#include <linux/netdevice.h>
++#include <linux/etherdevice.h>
++#include <linux/skbuff.h>
++#include <linux/mii.h>
++#include <linux/delay.h>
++#include <linux/skbuff.h>
++#include <linux/prefetch.h>
++
++/* For MII specifc registers, titan_mdio.h should be included */
++#include <net/ip.h>
++
++#include <asm/bitops.h>
++#include <asm/io.h>
++#include <asm/types.h>
++#include <asm/pgtable.h>
++#include <asm/system.h>
++#include <asm/titan_dep.h>
++
++#include "titan_ge.h"
++#include "titan_mdio.h"
++
++/* Static Function Declarations	 */
++static int titan_ge_eth_open(struct net_device *);
++static void titan_ge_eth_stop(struct net_device *);
++static struct net_device_stats *titan_ge_get_stats(struct net_device *);
++static int titan_ge_init_rx_desc_ring(titan_ge_port_info *, int, int,
++				      unsigned long, unsigned long,
++				      unsigned long);
++static int titan_ge_init_tx_desc_ring(titan_ge_port_info *, int,
++				      unsigned long, unsigned long);
++
++static int titan_ge_open(struct net_device *);
++static int titan_ge_start_xmit(struct sk_buff *, struct net_device *);
++static int titan_ge_stop(struct net_device *);
++
++static unsigned long titan_ge_tx_coal(unsigned long, int);
++
++static void titan_ge_port_reset(unsigned int);
++static int titan_ge_free_tx_queue(titan_ge_port_info *);
++static int titan_ge_rx_task(struct net_device *, titan_ge_port_info *);
++static int titan_ge_port_start(struct net_device *, titan_ge_port_info *);
++
++static int titan_ge_return_tx_desc(titan_ge_port_info *, int);
++
++/*
++ * Some configuration for the FIFO and the XDMA channel needs
++ * to be done only once for all the ports. This flag controls
++ * that
++ */
++static unsigned long config_done;
++
++/*
++ * One time out of memory flag
++ */
++static unsigned int oom_flag;
++
++static int titan_ge_poll(struct net_device *netdev, int *budget);
++
++static int titan_ge_receive_queue(struct net_device *, unsigned int);
++
++static struct platform_device *titan_ge_device[3];
++
++/* MAC Address */
++extern unsigned char titan_ge_mac_addr_base[6];
++
++unsigned long titan_ge_base;
++static unsigned long titan_ge_sram;
++
++static char titan_string[] = "titan";
++
++/*
++ * The Titan GE has two alignment requirements:
++ * -> skb->data to be cacheline aligned (32 byte)
++ * -> IP header alignment to 16 bytes
++ *
++ * The latter is not implemented. So, that results in an extra copy on
++ * the Rx. This is a big performance hog. For the former case, the
++ * dev_alloc_skb() has been replaced with titan_ge_alloc_skb(). The size
++ * requested is calculated:
++ *
++ * Ethernet Frame Size : 1518
++ * Ethernet Header     : 14
++ * Future Titan change for IP header alignment : 2
++ *
++ * Hence, we allocate (1518 + 14 + 2+ 64) = 1580 bytes.  For IP header
++ * alignment, we use skb_reserve().
++ */
++
++#define ALIGNED_RX_SKB_ADDR(addr) \
++	((((unsigned long)(addr) + (64UL - 1UL)) \
++	& ~(64UL - 1UL)) - (unsigned long)(addr))
++
++#define titan_ge_alloc_skb(__length, __gfp_flags) \
++({      struct sk_buff *__skb; \
++	__skb = alloc_skb((__length) + 64, (__gfp_flags)); \
++	if(__skb) { \
++		int __offset = (int) ALIGNED_RX_SKB_ADDR(__skb->data); \
++		if(__offset) \
++			skb_reserve(__skb, __offset); \
++	} \
++	__skb; \
++})
++
++/*
++ * Configure the GMII block of the Titan based on what the PHY tells us
++ */
++static void titan_ge_gmii_config(int port_num)
++{
++	unsigned int reg_data = 0, phy_reg;
++	int err;
++
++	err = titan_ge_mdio_read(port_num, TITAN_GE_MDIO_PHY_STATUS, &phy_reg);
++
++	if (err == TITAN_GE_MDIO_ERROR) {
++		printk(KERN_ERR
++		       "Could not read PHY control register 0x11 \n");
++		printk(KERN_ERR
++			"Setting speed to 1000 Mbps and Duplex to Full \n");
++
++		return;
++	}
++
++	err = titan_ge_mdio_write(port_num, TITAN_GE_MDIO_PHY_IE, 0);
++
++	if (phy_reg & 0x8000) {
++		if (phy_reg & 0x2000) {
++			/* Full Duplex and 1000 Mbps */
++			TITAN_GE_WRITE((TITAN_GE_GMII_CONFIG_MODE +
++					(port_num << 12)), 0x201);
++		}  else {
++			/* Half Duplex and 1000 Mbps */
++			TITAN_GE_WRITE((TITAN_GE_GMII_CONFIG_MODE +
++					(port_num << 12)), 0x2201);
++			}
++	}
++	if (phy_reg & 0x4000) {
++		if (phy_reg & 0x2000) {
++			/* Full Duplex and 100 Mbps */
++			TITAN_GE_WRITE((TITAN_GE_GMII_CONFIG_MODE +
++					(port_num << 12)), 0x100);
++		} else {
++			/* Half Duplex and 100 Mbps */
++			TITAN_GE_WRITE((TITAN_GE_GMII_CONFIG_MODE +
++					(port_num << 12)), 0x2100);
++		}
++	}
++	reg_data = TITAN_GE_READ(TITAN_GE_GMII_CONFIG_GENERAL +
++				(port_num << 12));
++	reg_data |= 0x3;
++	TITAN_GE_WRITE((TITAN_GE_GMII_CONFIG_GENERAL +
++			(port_num << 12)), reg_data);
++}
++
++/*
++ * Enable the TMAC if it is not
++ */
++static void titan_ge_enable_tx(unsigned int port_num)
++{
++	unsigned long reg_data;
++
++	reg_data = TITAN_GE_READ(TITAN_GE_TMAC_CONFIG_1 + (port_num << 12));
++	if (!(reg_data & 0x8000)) {
++		printk("TMAC disabled for port %d!! \n", port_num);
++
++		reg_data |= 0x0001;	/* Enable TMAC */
++		reg_data |= 0x4000;	/* CRC Check Enable */
++		reg_data |= 0x2000;	/* Padding enable */
++		reg_data |= 0x0800;	/* CRC Add enable */
++		reg_data |= 0x0080;	/* PAUSE frame */
++
++		TITAN_GE_WRITE((TITAN_GE_TMAC_CONFIG_1 +
++				(port_num << 12)), reg_data);
++	}
++}
++
++/*
++ * Tx Timeout function
++ */
++static void titan_ge_tx_timeout(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++
++	printk(KERN_INFO "%s: TX timeout  ", netdev->name);
++	printk(KERN_INFO "Resetting card \n");
++
++	/* Do the reset outside of interrupt context */
++	schedule_work(&titan_ge_eth->tx_timeout_task);
++}
++
++/*
++ * Update the AFX tables for UC and MC for slice 0 only
++ */
++static void titan_ge_update_afx(titan_ge_port_info * titan_ge_eth)
++{
++	int port = titan_ge_eth->port_num;
++	unsigned int i;
++	volatile unsigned long reg_data = 0;
++	u8 p_addr[6];
++
++	memcpy(p_addr, titan_ge_eth->port_mac_addr, 6);
++
++	/* Set the MAC address here for TMAC and RMAC */
++	TITAN_GE_WRITE((TITAN_GE_TMAC_STATION_HI + (port << 12)),
++		       ((p_addr[5] << 8) | p_addr[4]));
++	TITAN_GE_WRITE((TITAN_GE_TMAC_STATION_MID + (port << 12)),
++		       ((p_addr[3] << 8) | p_addr[2]));
++	TITAN_GE_WRITE((TITAN_GE_TMAC_STATION_LOW + (port << 12)),
++		       ((p_addr[1] << 8) | p_addr[0]));
++
++	TITAN_GE_WRITE((TITAN_GE_RMAC_STATION_HI + (port << 12)),
++		       ((p_addr[5] << 8) | p_addr[4]));
++	TITAN_GE_WRITE((TITAN_GE_RMAC_STATION_MID + (port << 12)),
++		       ((p_addr[3] << 8) | p_addr[2]));
++	TITAN_GE_WRITE((TITAN_GE_RMAC_STATION_LOW + (port << 12)),
++		       ((p_addr[1] << 8) | p_addr[0]));
++
++	TITAN_GE_WRITE((0x112c | (port << 12)), 0x1);
++	/* Configure the eight address filters */
++	for (i = 0; i < 8; i++) {
++		/* Select each of the eight filters */
++		TITAN_GE_WRITE((TITAN_GE_AFX_ADDRS_FILTER_CTRL_2 +
++				(port << 12)), i);
++
++		/* Configure the match */
++		reg_data = 0x9;	/* Forward Enable Bit */
++		TITAN_GE_WRITE((TITAN_GE_AFX_ADDRS_FILTER_CTRL_0 +
++				(port << 12)), reg_data);
++
++		/* Finally, AFX Exact Match Address Registers */
++		TITAN_GE_WRITE((TITAN_GE_AFX_EXACT_MATCH_LOW + (port << 12)),
++			       ((p_addr[1] << 8) | p_addr[0]));
++		TITAN_GE_WRITE((TITAN_GE_AFX_EXACT_MATCH_MID + (port << 12)),
++			       ((p_addr[3] << 8) | p_addr[2]));
++		TITAN_GE_WRITE((TITAN_GE_AFX_EXACT_MATCH_HIGH + (port << 12)),
++			       ((p_addr[5] << 8) | p_addr[4]));
++
++		/* VLAN id set to 0 */
++		TITAN_GE_WRITE((TITAN_GE_AFX_EXACT_MATCH_VID +
++				(port << 12)), 0);
++	}
++}
++
++/*
++ * Actual Routine to reset the adapter when the timeout occurred
++ */
++static void titan_ge_tx_timeout_task(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	int port = titan_ge_eth->port_num;
++
++	printk("Titan GE: Transmit timed out. Resetting ... \n");
++
++	/* Dump debug info */
++	printk(KERN_ERR "TRTG cause : %x \n",
++			TITAN_GE_READ(0x100c + (port << 12)));
++
++	/* Fix this for the other ports */
++	printk(KERN_ERR "FIFO cause : %x \n", TITAN_GE_READ(0x482c));
++	printk(KERN_ERR "IE cause : %x \n", TITAN_GE_READ(0x0040));
++	printk(KERN_ERR "XDMA GDI ERROR : %x \n",
++			TITAN_GE_READ(0x5008 + (port << 8)));
++	printk(KERN_ERR "CHANNEL ERROR: %x \n",
++			TITAN_GE_READ(TITAN_GE_CHANNEL0_INTERRUPT
++						+ (port << 8)));
++
++	netif_device_detach(netdev);
++	titan_ge_port_reset(titan_ge_eth->port_num);
++	titan_ge_port_start(netdev, titan_ge_eth);
++	netif_device_attach(netdev);
++}
++
++/*
++ * Change the MTU of the Ethernet Device
++ */
++static int titan_ge_change_mtu(struct net_device *netdev, int new_mtu)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned long flags;
++
++	if ((new_mtu > 9500) || (new_mtu < 64))
++		return -EINVAL;
++
++	spin_lock_irqsave(&titan_ge_eth->lock, flags);
++
++	netdev->mtu = new_mtu;
++
++	/* Now we have to reopen the interface so that SKBs with the new
++	 * size will be allocated */
++
++	if (netif_running(netdev)) {
++		titan_ge_eth_stop(netdev);
++
++		if (titan_ge_eth_open(netdev) != TITAN_OK) {
++			printk(KERN_ERR
++			       "%s: Fatal error on opening device\n",
++			       netdev->name);
++			spin_unlock_irqrestore(&titan_ge_eth->lock, flags);
++			return -1;
++		}
++	}
++
++	spin_unlock_irqrestore(&titan_ge_eth->lock, flags);
++	return 0;
++}
++
++/*
++ * Titan Gbe Interrupt Handler. All the three ports send interrupt to one line
++ * only. Once an interrupt is triggered, figure out the port and then check
++ * the channel.
++ */
++static irqreturn_t titan_ge_int_handler(int irq, void *dev_id)
++{
++	struct net_device *netdev = (struct net_device *) dev_id;
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned int port_num = titan_ge_eth->port_num;
++	unsigned int reg_data;
++	unsigned int eth_int_cause_error = 0, is;
++	unsigned long eth_int_cause1;
++	int err = 0;
++#ifdef CONFIG_SMP
++	unsigned long eth_int_cause2;
++#endif
++
++	/* Ack the CPU interrupt */
++	switch (port_num) {
++	case 0:
++		is = OCD_READ(RM9000x2_OCD_INTP0STATUS1);
++		OCD_WRITE(RM9000x2_OCD_INTP0CLEAR1, is);
++
++#ifdef CONFIG_SMP
++		is = OCD_READ(RM9000x2_OCD_INTP1STATUS1);
++		OCD_WRITE(RM9000x2_OCD_INTP1CLEAR1, is);
++#endif
++		break;
++
++	case 1:
++		is = OCD_READ(RM9000x2_OCD_INTP0STATUS0);
++		OCD_WRITE(RM9000x2_OCD_INTP0CLEAR0, is);
++
++#ifdef CONFIG_SMP
++		is = OCD_READ(RM9000x2_OCD_INTP1STATUS0);
++		OCD_WRITE(RM9000x2_OCD_INTP1CLEAR0, is);
++#endif
++		break;
++
++	case 2:
++		is = OCD_READ(RM9000x2_OCD_INTP0STATUS4);
++		OCD_WRITE(RM9000x2_OCD_INTP0CLEAR4, is);
++
++#ifdef CONFIG_SMP
++		is = OCD_READ(RM9000x2_OCD_INTP1STATUS4);
++		OCD_WRITE(RM9000x2_OCD_INTP1CLEAR4, is);
++#endif
++	}
++
++	eth_int_cause1 = TITAN_GE_READ(TITAN_GE_INTR_XDMA_CORE_A);
++#ifdef CONFIG_SMP
++	eth_int_cause2 = TITAN_GE_READ(TITAN_GE_INTR_XDMA_CORE_B);
++#endif
++
++	/* Spurious interrupt */
++#ifdef CONFIG_SMP
++	if ( (eth_int_cause1 == 0) && (eth_int_cause2 == 0)) {
++#else
++	if (eth_int_cause1 == 0) {
++#endif
++		eth_int_cause_error = TITAN_GE_READ(TITAN_GE_CHANNEL0_INTERRUPT +
++					(port_num << 8));
++
++		if (eth_int_cause_error == 0)
++			return IRQ_NONE;
++	}
++
++	/* Handle Tx first. No need to ack interrupts */
++#ifdef CONFIG_SMP
++	if ( (eth_int_cause1 & 0x20202) ||
++		(eth_int_cause2 & 0x20202) )
++#else
++	if (eth_int_cause1 & 0x20202)
++#endif
++		titan_ge_free_tx_queue(titan_ge_eth);
++
++	/* Handle the Rx next */
++#ifdef CONFIG_SMP
++	if ( (eth_int_cause1 & 0x10101) ||
++		(eth_int_cause2 & 0x10101)) {
++#else
++	if (eth_int_cause1 & 0x10101) {
++#endif
++		if (netif_rx_schedule_prep(netdev)) {
++			unsigned int ack;
++
++			ack = TITAN_GE_READ(TITAN_GE_INTR_XDMA_IE);
++			/* Disable Tx and Rx both */
++			if (port_num == 0)
++				ack &= ~(0x3);
++			if (port_num == 1)
++				ack &= ~(0x300);
++
++			if (port_num == 2)
++				ack &= ~(0x30000);
++
++			/* Interrupts have been disabled */
++			TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_IE, ack);
++
++			__netif_rx_schedule(netdev);
++		}
++	}
++
++	/* Handle error interrupts */
++	if (eth_int_cause_error && (eth_int_cause_error != 0x2)) {
++		printk(KERN_ERR
++			"XDMA Channel Error : %x  on port %d\n",
++			eth_int_cause_error, port_num);
++
++		printk(KERN_ERR
++			"XDMA GDI Hardware error : %x  on port %d\n",
++			TITAN_GE_READ(0x5008 + (port_num << 8)), port_num);
++
++		printk(KERN_ERR
++			"XDMA currently has %d Rx descriptors \n",
++			TITAN_GE_READ(0x5048 + (port_num << 8)));
++
++		printk(KERN_ERR
++			"XDMA currently has prefetcted %d Rx descriptors \n",
++			TITAN_GE_READ(0x505c + (port_num << 8)));
++
++		TITAN_GE_WRITE((TITAN_GE_CHANNEL0_INTERRUPT +
++			       (port_num << 8)), eth_int_cause_error);
++	}
++
++	/*
++	 * PHY interrupt to inform abt the changes. Reading the
++	 * PHY Status register will clear the interrupt
++	 */
++	if ((!(eth_int_cause1 & 0x30303)) &&
++		(eth_int_cause_error == 0)) {
++		err =
++		    titan_ge_mdio_read(port_num,
++			       TITAN_GE_MDIO_PHY_IS, &reg_data);
++
++		if (reg_data & 0x0400) {
++			/* Link status change */
++			titan_ge_mdio_read(port_num,
++				   TITAN_GE_MDIO_PHY_STATUS, &reg_data);
++			if (!(reg_data & 0x0400)) {
++				/* Link is down */
++				netif_carrier_off(netdev);
++				netif_stop_queue(netdev);
++			} else {
++				/* Link is up */
++				netif_carrier_on(netdev);
++				netif_wake_queue(netdev);
++
++				/* Enable the queue */
++				titan_ge_enable_tx(port_num);
++			}
++		}
++	}
++
++	return IRQ_HANDLED;
++}
++
++/*
++ * Multicast and Promiscuous mode set. The
++ * set_multi entry point is called whenever the
++ * multicast address list or the network interface
++ * flags are updated.
++ */
++static void titan_ge_set_multi(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned int port_num = titan_ge_eth->port_num;
++	unsigned long reg_data;
++
++	reg_data = TITAN_GE_READ(TITAN_GE_AFX_ADDRS_FILTER_CTRL_1 +
++				(port_num << 12));
++
++	if (netdev->flags & IFF_PROMISC) {
++		reg_data |= 0x2;
++	}
++	else if (netdev->flags & IFF_ALLMULTI) {
++		reg_data |= 0x01;
++		reg_data |= 0x400; /* Use the 64-bit Multicast Hash bin */
++	}
++	else {
++		reg_data = 0x2;
++	}
++
++	TITAN_GE_WRITE((TITAN_GE_AFX_ADDRS_FILTER_CTRL_1 +
++			(port_num << 12)), reg_data);
++	if (reg_data & 0x01) {
++		TITAN_GE_WRITE((TITAN_GE_AFX_MULTICAST_HASH_LOW +
++				(port_num << 12)), 0xffff);
++		TITAN_GE_WRITE((TITAN_GE_AFX_MULTICAST_HASH_MIDLOW +
++				(port_num << 12)), 0xffff);
++		TITAN_GE_WRITE((TITAN_GE_AFX_MULTICAST_HASH_MIDHI +
++				(port_num << 12)), 0xffff);
++		TITAN_GE_WRITE((TITAN_GE_AFX_MULTICAST_HASH_HI +
++				(port_num << 12)), 0xffff);
++	}
++}
++
++/*
++ * Open the network device
++ */
++static int titan_ge_open(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned int port_num = titan_ge_eth->port_num;
++	unsigned int irq = TITAN_ETH_PORT_IRQ - port_num;
++	int retval;
++
++	retval = request_irq(irq, titan_ge_int_handler,
++		     SA_INTERRUPT | SA_SAMPLE_RANDOM , netdev->name, netdev);
++
++	if (retval != 0) {
++		printk(KERN_ERR "Cannot assign IRQ number to TITAN GE \n");
++		return -1;
++	}
++
++	netdev->irq = irq;
++	printk(KERN_INFO "Assigned IRQ %d to port %d\n", irq, port_num);
++
++	spin_lock_irq(&(titan_ge_eth->lock));
++
++	if (titan_ge_eth_open(netdev) != TITAN_OK) {
++		spin_unlock_irq(&(titan_ge_eth->lock));
++		printk("%s: Error opening interface \n", netdev->name);
++		free_irq(netdev->irq, netdev);
++		return -EBUSY;
++	}
++
++	spin_unlock_irq(&(titan_ge_eth->lock));
++
++	return 0;
++}
++
++/*
++ * Allocate the SKBs for the Rx ring. Also used
++ * for refilling the queue
++ */
++static int titan_ge_rx_task(struct net_device *netdev,
++				titan_ge_port_info *titan_ge_port)
++{
++	struct device *device = &titan_ge_device[titan_ge_port->port_num]->dev;
++	volatile titan_ge_rx_desc *rx_desc;
++	struct sk_buff *skb;
++	int rx_used_desc;
++	int count = 0;
++
++	while (titan_ge_port->rx_ring_skbs < titan_ge_port->rx_ring_size) {
++
++	/* First try to get the skb from the recycler */
++#ifdef TITAN_GE_JUMBO_FRAMES
++		skb = titan_ge_alloc_skb(TITAN_GE_JUMBO_BUFSIZE, GFP_ATOMIC);
++#else
++		skb = titan_ge_alloc_skb(TITAN_GE_STD_BUFSIZE, GFP_ATOMIC);
++#endif
++		if (unlikely(!skb)) {
++			/* OOM, set the flag */
++			printk("OOM \n");
++			oom_flag = 1;
++			break;
++		}
++		count++;
++		skb->dev = netdev;
++
++		titan_ge_port->rx_ring_skbs++;
++
++		rx_used_desc = titan_ge_port->rx_used_desc_q;
++		rx_desc = &(titan_ge_port->rx_desc_area[rx_used_desc]);
++
++#ifdef TITAN_GE_JUMBO_FRAMES
++		rx_desc->buffer_addr = dma_map_single(device, skb->data,
++				TITAN_GE_JUMBO_BUFSIZE - 2, DMA_FROM_DEVICE);
++#else
++		rx_desc->buffer_addr = dma_map_single(device, skb->data,
++				TITAN_GE_STD_BUFSIZE - 2, DMA_FROM_DEVICE);
++#endif
++
++		titan_ge_port->rx_skb[rx_used_desc] = skb;
++		rx_desc->cmd_sts = TITAN_GE_RX_BUFFER_OWNED;
++
++		titan_ge_port->rx_used_desc_q =
++			(rx_used_desc + 1) % TITAN_GE_RX_QUEUE;
++	}
++
++	return count;
++}
++
++/*
++ * Actual init of the Tital GE port. There is one register for
++ * the channel configuration
++ */
++static void titan_port_init(struct net_device *netdev,
++			    titan_ge_port_info * titan_ge_eth)
++{
++	unsigned long reg_data;
++
++	titan_ge_port_reset(titan_ge_eth->port_num);
++
++	/* First reset the TMAC */
++	reg_data = TITAN_GE_READ(TITAN_GE_CHANNEL0_CONFIG);
++	reg_data |= 0x80000000;
++	TITAN_GE_WRITE(TITAN_GE_CHANNEL0_CONFIG, reg_data);
++
++	udelay(30);
++
++	reg_data = TITAN_GE_READ(TITAN_GE_CHANNEL0_CONFIG);
++	reg_data &= ~(0xc0000000);
++	TITAN_GE_WRITE(TITAN_GE_CHANNEL0_CONFIG, reg_data);
++
++	/* Now reset the RMAC */
++	reg_data = TITAN_GE_READ(TITAN_GE_CHANNEL0_CONFIG);
++	reg_data |= 0x00080000;
++	TITAN_GE_WRITE(TITAN_GE_CHANNEL0_CONFIG, reg_data);
++
++	udelay(30);
++
++	reg_data = TITAN_GE_READ(TITAN_GE_CHANNEL0_CONFIG);
++	reg_data &= ~(0x000c0000);
++	TITAN_GE_WRITE(TITAN_GE_CHANNEL0_CONFIG, reg_data);
++}
++
++/*
++ * Start the port. All the hardware specific configuration
++ * for the XDMA, Tx FIFO, Rx FIFO, TMAC, RMAC, TRTG and AFX
++ * go here
++ */
++static int titan_ge_port_start(struct net_device *netdev,
++				titan_ge_port_info * titan_port)
++{
++	volatile unsigned long reg_data, reg_data1;
++	int port_num = titan_port->port_num;
++	int count = 0;
++	unsigned long reg_data_1;
++
++	if (config_done == 0) {
++		reg_data = TITAN_GE_READ(0x0004);
++		reg_data |= 0x100;
++		TITAN_GE_WRITE(0x0004, reg_data);
++
++		reg_data &= ~(0x100);
++		TITAN_GE_WRITE(0x0004, reg_data);
++
++		/* Turn on GMII/MII mode and turn off TBI mode */
++		reg_data = TITAN_GE_READ(TITAN_GE_TSB_CTRL_1);
++		reg_data |= 0x00000700;
++		reg_data &= ~(0x00800000); /* Fencing */
++
++		TITAN_GE_WRITE(0x000c, 0x00001100);
++
++		TITAN_GE_WRITE(TITAN_GE_TSB_CTRL_1, reg_data);
++
++		/* Set the CPU Resource Limit register */
++		TITAN_GE_WRITE(0x00f8, 0x8);
++
++		/* Be conservative when using the BIU buffers */
++		TITAN_GE_WRITE(0x0068, 0x4);
++	}
++
++	titan_port->tx_threshold = 0;
++	titan_port->rx_threshold = 0;
++
++	/* We need to write the descriptors for Tx and Rx */
++	TITAN_GE_WRITE((TITAN_GE_CHANNEL0_TX_DESC + (port_num << 8)),
++		       (unsigned long) titan_port->tx_dma);
++	TITAN_GE_WRITE((TITAN_GE_CHANNEL0_RX_DESC + (port_num << 8)),
++		       (unsigned long) titan_port->rx_dma);
++
++	if (config_done == 0) {
++		/* Step 1:  XDMA config	*/
++		reg_data = TITAN_GE_READ(TITAN_GE_XDMA_CONFIG);
++		reg_data &= ~(0x80000000);      /* clear reset */
++		reg_data |= 0x1 << 29;	/* sparse tx descriptor spacing */
++		reg_data |= 0x1 << 28;	/* sparse rx descriptor spacing */
++		reg_data |= (0x1 << 23) | (0x1 << 24);  /* Descriptor Coherency */
++		reg_data |= (0x1 << 21) | (0x1 << 22);  /* Data Coherency */
++		TITAN_GE_WRITE(TITAN_GE_XDMA_CONFIG, reg_data);
++	}
++
++	/* IR register for the XDMA */
++	reg_data = TITAN_GE_READ(TITAN_GE_GDI_INTERRUPT_ENABLE + (port_num << 8));
++	reg_data |= 0x80068000; /* No Rx_OOD */
++	TITAN_GE_WRITE((TITAN_GE_GDI_INTERRUPT_ENABLE + (port_num << 8)), reg_data);
++
++	/* Start the Tx and Rx XDMA controller */
++	reg_data = TITAN_GE_READ(TITAN_GE_CHANNEL0_CONFIG + (port_num << 8));
++	reg_data &= 0x4fffffff;     /* Clear tx reset */
++	reg_data &= 0xfff4ffff;     /* Clear rx reset */
++
++#ifdef TITAN_GE_JUMBO_FRAMES
++	reg_data |= 0xa0 | 0x30030000;
++#else
++	reg_data |= 0x40 | 0x20030000;
++#endif
++
++#ifndef CONFIG_SMP
++	reg_data &= ~(0x10);
++	reg_data |= 0x0f; /* All of the packet */
++#endif
++
++	TITAN_GE_WRITE((TITAN_GE_CHANNEL0_CONFIG + (port_num << 8)), reg_data);
++
++	/* Rx desc count */
++	count = titan_ge_rx_task(netdev, titan_port);
++	TITAN_GE_WRITE((0x5048 + (port_num << 8)), count);
++	count = TITAN_GE_READ(0x5048 + (port_num << 8));
++
++	udelay(30);
++
++	/*
++	 * Step 2:  Configure the SDQPF, i.e. FIFO
++	 */
++	if (config_done == 0) {
++		reg_data = TITAN_GE_READ(TITAN_GE_SDQPF_RXFIFO_CTL);
++		reg_data = 0x1;
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_RXFIFO_CTL, reg_data);
++		reg_data &= ~(0x1);
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_RXFIFO_CTL, reg_data);
++		reg_data = TITAN_GE_READ(TITAN_GE_SDQPF_RXFIFO_CTL);
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_RXFIFO_CTL, reg_data);
++
++		reg_data = TITAN_GE_READ(TITAN_GE_SDQPF_TXFIFO_CTL);
++		reg_data = 0x1;
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_TXFIFO_CTL, reg_data);
++		reg_data &= ~(0x1);
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_TXFIFO_CTL, reg_data);
++		reg_data = TITAN_GE_READ(TITAN_GE_SDQPF_TXFIFO_CTL);
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_TXFIFO_CTL, reg_data);
++	}
++	/*
++	 * Enable RX FIFO 0, 4 and 8
++	 */
++	if (port_num == 0) {
++		reg_data = TITAN_GE_READ(TITAN_GE_SDQPF_RXFIFO_0);
++
++		reg_data |= 0x100000;
++		reg_data |= (0xff << 10);
++
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_RXFIFO_0, reg_data);
++		/*
++		 * BAV2,BAV and DAV settings for the Rx FIFO
++		 */
++		reg_data1 = TITAN_GE_READ(0x4844);
++		reg_data1 |= ( (0x10 << 20) | (0x10 << 10) | 0x1);
++		TITAN_GE_WRITE(0x4844, reg_data1);
++
++		reg_data &= ~(0x00100000);
++		reg_data |= 0x200000;
++
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_RXFIFO_0, reg_data);
++
++		reg_data = TITAN_GE_READ(TITAN_GE_SDQPF_TXFIFO_0);
++		reg_data |= 0x100000;
++
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_TXFIFO_0, reg_data);
++
++		reg_data |= (0xff << 10);
++
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_TXFIFO_0, reg_data);
++
++		/*
++		 * BAV2, BAV and DAV settings for the Tx FIFO
++		 */
++		reg_data1 = TITAN_GE_READ(0x4944);
++		reg_data1 = ( (0x1 << 20) | (0x1 << 10) | 0x10);
++
++		TITAN_GE_WRITE(0x4944, reg_data1);
++
++		reg_data &= ~(0x00100000);
++		reg_data |= 0x200000;
++
++		TITAN_GE_WRITE(TITAN_GE_SDQPF_TXFIFO_0, reg_data);
++
++	}
++
++	if (port_num == 1) {
++		reg_data = TITAN_GE_READ(0x4870);
++
++		reg_data |= 0x100000;
++		reg_data |= (0xff << 10) | (0xff + 1);
++
++		TITAN_GE_WRITE(0x4870, reg_data);
++		/*
++		 * BAV2,BAV and DAV settings for the Rx FIFO
++		 */
++		reg_data1 = TITAN_GE_READ(0x4874);
++		reg_data1 |= ( (0x10 << 20) | (0x10 << 10) | 0x1);
++		TITAN_GE_WRITE(0x4874, reg_data1);
++
++		reg_data &= ~(0x00100000);
++		reg_data |= 0x200000;
++
++		TITAN_GE_WRITE(0x4870, reg_data);
++
++		reg_data = TITAN_GE_READ(0x494c);
++		reg_data |= 0x100000;
++
++		TITAN_GE_WRITE(0x494c, reg_data);
++		reg_data |= (0xff << 10) | (0xff + 1);
++		TITAN_GE_WRITE(0x494c, reg_data);
++
++		/*
++		 * BAV2, BAV and DAV settings for the Tx FIFO
++		 */
++		reg_data1 = TITAN_GE_READ(0x4950);
++		reg_data1 = ( (0x1 << 20) | (0x1 << 10) | 0x10);
++
++		TITAN_GE_WRITE(0x4950, reg_data1);
++
++		reg_data &= ~(0x00100000);
++		reg_data |= 0x200000;
++
++		TITAN_GE_WRITE(0x494c, reg_data);
++	}
++
++	/*
++	 * Titan 1.2 revision does support port #2
++	 */
++	if (port_num == 2) {
++		/*
++		 * Put the descriptors in the SRAM
++		 */
++		reg_data = TITAN_GE_READ(0x48a0);
++
++		reg_data |= 0x100000;
++		reg_data |= (0xff << 10) | (2*(0xff + 1));
++
++		TITAN_GE_WRITE(0x48a0, reg_data);
++		/*
++		 * BAV2,BAV and DAV settings for the Rx FIFO
++		 */
++		reg_data1 = TITAN_GE_READ(0x48a4);
++		reg_data1 |= ( (0x10 << 20) | (0x10 << 10) | 0x1);
++		TITAN_GE_WRITE(0x48a4, reg_data1);
++
++		reg_data &= ~(0x00100000);
++		reg_data |= 0x200000;
++
++		TITAN_GE_WRITE(0x48a0, reg_data);
++
++		reg_data = TITAN_GE_READ(0x4958);
++		reg_data |= 0x100000;
++
++		TITAN_GE_WRITE(0x4958, reg_data);
++		reg_data |= (0xff << 10) | (2*(0xff + 1));
++		TITAN_GE_WRITE(0x4958, reg_data);
++
++		/*
++		 * BAV2, BAV and DAV settings for the Tx FIFO
++		 */
++		reg_data1 = TITAN_GE_READ(0x495c);
++		reg_data1 = ( (0x1 << 20) | (0x1 << 10) | 0x10);
++
++		TITAN_GE_WRITE(0x495c, reg_data1);
++
++		reg_data &= ~(0x00100000);
++		reg_data |= 0x200000;
++
++		TITAN_GE_WRITE(0x4958, reg_data);
++	}
++
++	if (port_num == 2) {
++		reg_data = TITAN_GE_READ(0x48a0);
++
++		reg_data |= 0x100000;
++		reg_data |= (0xff << 10) | (2*(0xff + 1));
++
++		TITAN_GE_WRITE(0x48a0, reg_data);
++		/*
++		 * BAV2,BAV and DAV settings for the Rx FIFO
++		 */
++		reg_data1 = TITAN_GE_READ(0x48a4);
++		reg_data1 |= ( (0x10 << 20) | (0x10 << 10) | 0x1);
++		TITAN_GE_WRITE(0x48a4, reg_data1);
++
++		reg_data &= ~(0x00100000);
++		reg_data |= 0x200000;
++
++		TITAN_GE_WRITE(0x48a0, reg_data);
++
++		reg_data = TITAN_GE_READ(0x4958);
++		reg_data |= 0x100000;
++
++		TITAN_GE_WRITE(0x4958, reg_data);
++		reg_data |= (0xff << 10) | (2*(0xff + 1));
++		TITAN_GE_WRITE(0x4958, reg_data);
++
++		/*
++		 * BAV2, BAV and DAV settings for the Tx FIFO
++		 */
++		reg_data1 = TITAN_GE_READ(0x495c);
++		reg_data1 = ( (0x1 << 20) | (0x1 << 10) | 0x10);
++
++		TITAN_GE_WRITE(0x495c, reg_data1);
++
++		reg_data &= ~(0x00100000);
++		reg_data |= 0x200000;
++
++		TITAN_GE_WRITE(0x4958, reg_data);
++	}
++
++	/*
++	 * Step 3:  TRTG block enable
++	 */
++	reg_data = TITAN_GE_READ(TITAN_GE_TRTG_CONFIG + (port_num << 12));
++
++	/*
++	 * This is the 1.2 revision of the chip. It has fix for the
++	 * IP header alignment. Now, the IP header begins at an
++	 * aligned address and this wont need an extra copy in the
++	 * driver. This performance drawback existed in the previous
++	 * versions of the silicon
++	 */
++	reg_data_1 = TITAN_GE_READ(0x103c + (port_num << 12));
++	reg_data_1 |= 0x40000000;
++	TITAN_GE_WRITE((0x103c + (port_num << 12)), reg_data_1);
++
++	reg_data_1 |= 0x04000000;
++	TITAN_GE_WRITE((0x103c + (port_num << 12)), reg_data_1);
++
++	mdelay(5);
++
++	reg_data_1 &= ~(0x04000000);
++	TITAN_GE_WRITE((0x103c + (port_num << 12)), reg_data_1);
++
++	mdelay(5);
++
++	reg_data |= 0x0001;
++	TITAN_GE_WRITE((TITAN_GE_TRTG_CONFIG + (port_num << 12)), reg_data);
++
++	/*
++	 * Step 4:  Start the Tx activity
++	 */
++	TITAN_GE_WRITE((TITAN_GE_TMAC_CONFIG_2 + (port_num << 12)), 0xe197);
++#ifdef TITAN_GE_JUMBO_FRAMES
++	TITAN_GE_WRITE((0x1258 + (port_num << 12)), 0x4000);
++#endif
++	reg_data = TITAN_GE_READ(TITAN_GE_TMAC_CONFIG_1 + (port_num << 12));
++	reg_data |= 0x0001;	/* Enable TMAC */
++	reg_data |= 0x6c70;	/* PAUSE also set */
++
++	TITAN_GE_WRITE((TITAN_GE_TMAC_CONFIG_1 + (port_num << 12)), reg_data);
++
++	udelay(30);
++
++	/* Destination Address drop bit */
++	reg_data = TITAN_GE_READ(TITAN_GE_RMAC_CONFIG_2 + (port_num << 12));
++	reg_data |= 0x218;        /* DA_DROP bit and pause */
++	TITAN_GE_WRITE((TITAN_GE_RMAC_CONFIG_2 + (port_num << 12)), reg_data);
++
++	TITAN_GE_WRITE((0x1218 + (port_num << 12)), 0x3);
++
++#ifdef TITAN_GE_JUMBO_FRAMES
++	TITAN_GE_WRITE((0x1208 + (port_num << 12)), 0x4000);
++#endif
++	/* Start the Rx activity */
++	reg_data = TITAN_GE_READ(TITAN_GE_RMAC_CONFIG_1 + (port_num << 12));
++	reg_data |= 0x0001;	/* RMAC Enable */
++	reg_data |= 0x0010;	/* CRC Check enable */
++	reg_data |= 0x0040;	/* Min Frame check enable */
++	reg_data |= 0x4400;	/* Max Frame check enable */
++
++	TITAN_GE_WRITE((TITAN_GE_RMAC_CONFIG_1 + (port_num << 12)), reg_data);
++
++	udelay(30);
++
++	/*
++	 * Enable the Interrupts for Tx and Rx
++	 */
++	reg_data1 = TITAN_GE_READ(TITAN_GE_INTR_XDMA_IE);
++
++	if (port_num == 0) {
++		reg_data1 |= 0x3;
++#ifdef CONFIG_SMP
++		TITAN_GE_WRITE(0x0038, 0x003);
++#else
++		TITAN_GE_WRITE(0x0038, 0x303);
++#endif
++	}
++
++	if (port_num == 1) {
++		reg_data1 |= 0x300;
++	}
++
++	if (port_num == 2)
++		reg_data1 |= 0x30000;
++
++	TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_IE, reg_data1);
++	TITAN_GE_WRITE(0x003c, 0x300);
++
++	if (config_done == 0) {
++		TITAN_GE_WRITE(0x0024, 0x04000024);	/* IRQ vector */
++		TITAN_GE_WRITE(0x0020, 0x000fb000);	/* INTMSG base */
++	}
++
++	/* Priority */
++	reg_data = TITAN_GE_READ(0x1038 + (port_num << 12));
++	reg_data &= ~(0x00f00000);
++	TITAN_GE_WRITE((0x1038 + (port_num << 12)), reg_data);
++
++	/* Step 5:  GMII config */
++	titan_ge_gmii_config(port_num);
++
++	if (config_done == 0) {
++		TITAN_GE_WRITE(0x1a80, 0);
++		config_done = 1;
++	}
++
++	return TITAN_OK;
++}
++
++/*
++ * Function to queue the packet for the Ethernet device
++ */
++static void titan_ge_tx_queue(titan_ge_port_info * titan_ge_eth,
++				struct sk_buff * skb)
++{
++	struct device *device = &titan_ge_device[titan_ge_eth->port_num]->dev;
++	unsigned int curr_desc = titan_ge_eth->tx_curr_desc_q;
++	volatile titan_ge_tx_desc *tx_curr;
++	int port_num = titan_ge_eth->port_num;
++
++	tx_curr = &(titan_ge_eth->tx_desc_area[curr_desc]);
++	tx_curr->buffer_addr =
++		dma_map_single(device, skb->data, skb_headlen(skb),
++			       DMA_TO_DEVICE);
++
++	titan_ge_eth->tx_skb[curr_desc] = (struct sk_buff *) skb;
++	tx_curr->buffer_len = skb_headlen(skb);
++
++	/* Last descriptor enables interrupt and changes ownership */
++	tx_curr->cmd_sts = 0x1 | (1 << 15) | (1 << 5);
++
++	/* Kick the XDMA to start the transfer from memory to the FIFO */
++	TITAN_GE_WRITE((0x5044 + (port_num << 8)), 0x1);
++
++	/* Current descriptor updated */
++	titan_ge_eth->tx_curr_desc_q = (curr_desc + 1) % TITAN_GE_TX_QUEUE;
++
++	/* Prefetch the next descriptor */
++	prefetch((const void *)
++		 &titan_ge_eth->tx_desc_area[titan_ge_eth->tx_curr_desc_q]);
++}
++
++/*
++ * Actually does the open of the Ethernet device
++ */
++static int titan_ge_eth_open(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned int port_num = titan_ge_eth->port_num;
++	struct device *device = &titan_ge_device[port_num]->dev;
++	unsigned long reg_data;
++	unsigned int phy_reg;
++	int err = 0;
++
++	/* Stop the Rx activity */
++	reg_data = TITAN_GE_READ(TITAN_GE_RMAC_CONFIG_1 + (port_num << 12));
++	reg_data &= ~(0x00000001);
++	TITAN_GE_WRITE((TITAN_GE_RMAC_CONFIG_1 + (port_num << 12)), reg_data);
++
++	/* Clear the port interrupts */
++	TITAN_GE_WRITE((TITAN_GE_CHANNEL0_INTERRUPT + (port_num << 8)), 0x0);
++
++	if (config_done == 0) {
++		TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_CORE_A, 0);
++		TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_CORE_B, 0);
++	}
++
++	/* Set the MAC Address */
++	memcpy(titan_ge_eth->port_mac_addr, netdev->dev_addr, 6);
++
++	if (config_done == 0)
++		titan_port_init(netdev, titan_ge_eth);
++
++	titan_ge_update_afx(titan_ge_eth);
++
++	/* Allocate the Tx ring now */
++	titan_ge_eth->tx_ring_skbs = 0;
++	titan_ge_eth->tx_ring_size = TITAN_GE_TX_QUEUE;
++
++	/* Allocate space in the SRAM for the descriptors */
++	titan_ge_eth->tx_desc_area = (titan_ge_tx_desc *)
++		(titan_ge_sram + TITAN_TX_RING_BYTES * port_num);
++	titan_ge_eth->tx_dma = TITAN_SRAM_BASE + TITAN_TX_RING_BYTES * port_num;
++
++	if (!titan_ge_eth->tx_desc_area) {
++		printk(KERN_ERR
++		       "%s: Cannot allocate Tx Ring (size %d bytes) for port %d\n",
++		       netdev->name, TITAN_TX_RING_BYTES, port_num);
++		return -ENOMEM;
++	}
++
++	memset(titan_ge_eth->tx_desc_area, 0, titan_ge_eth->tx_desc_area_size);
++
++	/* Now initialize the Tx descriptor ring */
++	titan_ge_init_tx_desc_ring(titan_ge_eth,
++				   titan_ge_eth->tx_ring_size,
++				   (unsigned long) titan_ge_eth->tx_desc_area,
++				   (unsigned long) titan_ge_eth->tx_dma);
++
++	/* Allocate the Rx ring now */
++	titan_ge_eth->rx_ring_size = TITAN_GE_RX_QUEUE;
++	titan_ge_eth->rx_ring_skbs = 0;
++
++	titan_ge_eth->rx_desc_area =
++		(titan_ge_rx_desc *)(titan_ge_sram + 0x1000 + TITAN_RX_RING_BYTES * port_num);
++
++	titan_ge_eth->rx_dma = TITAN_SRAM_BASE + 0x1000 + TITAN_RX_RING_BYTES * port_num;
++
++	if (!titan_ge_eth->rx_desc_area) {
++		printk(KERN_ERR "%s: Cannot allocate Rx Ring (size %d bytes)\n",
++		       netdev->name, TITAN_RX_RING_BYTES);
++
++		printk(KERN_ERR "%s: Freeing previously allocated TX queues...",
++		       netdev->name);
++
++		dma_free_coherent(device, titan_ge_eth->tx_desc_area_size,
++				    (void *) titan_ge_eth->tx_desc_area,
++				    titan_ge_eth->tx_dma);
++
++		return -ENOMEM;
++	}
++
++	memset(titan_ge_eth->rx_desc_area, 0, titan_ge_eth->rx_desc_area_size);
++
++	/* Now initialize the Rx ring */
++#ifdef TITAN_GE_JUMBO_FRAMES
++	if ((titan_ge_init_rx_desc_ring
++	    (titan_ge_eth, titan_ge_eth->rx_ring_size, TITAN_GE_JUMBO_BUFSIZE,
++	     (unsigned long) titan_ge_eth->rx_desc_area, 0,
++	      (unsigned long) titan_ge_eth->rx_dma)) == 0)
++#else
++	if ((titan_ge_init_rx_desc_ring
++	     (titan_ge_eth, titan_ge_eth->rx_ring_size, TITAN_GE_STD_BUFSIZE,
++	      (unsigned long) titan_ge_eth->rx_desc_area, 0,
++	      (unsigned long) titan_ge_eth->rx_dma)) == 0)
++#endif
++		panic("%s: Error initializing RX Ring\n", netdev->name);
++
++	/* Fill the Rx ring with the SKBs */
++	titan_ge_port_start(netdev, titan_ge_eth);
++
++	/*
++	 * Check if Interrupt Coalscing needs to be turned on. The
++	 * values specified in the register is multiplied by
++	 * (8 x 64 nanoseconds) to determine when an interrupt should
++	 * be sent to the CPU.
++	 */
++
++	if (TITAN_GE_TX_COAL) {
++		titan_ge_eth->tx_int_coal =
++		    titan_ge_tx_coal(TITAN_GE_TX_COAL, port_num);
++	}
++
++	err = titan_ge_mdio_read(port_num, TITAN_GE_MDIO_PHY_STATUS, &phy_reg);
++	if (err == TITAN_GE_MDIO_ERROR) {
++		printk(KERN_ERR
++		       "Could not read PHY control register 0x11 \n");
++		return TITAN_ERROR;
++	}
++	if (!(phy_reg & 0x0400)) {
++		netif_carrier_off(netdev);
++		netif_stop_queue(netdev);
++		return TITAN_ERROR;
++	} else {
++		netif_carrier_on(netdev);
++		netif_start_queue(netdev);
++	}
++
++	return TITAN_OK;
++}
++
++/*
++ * Queue the packet for Tx. Currently no support for zero copy,
++ * checksum offload and Scatter Gather. The chip does support
++ * Scatter Gather only. But, that wont help here since zero copy
++ * requires support for Tx checksumming also.
++ */
++int titan_ge_start_xmit(struct sk_buff *skb, struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned long flags;
++	struct net_device_stats *stats;
++//printk("titan_ge_start_xmit\n");
++
++	stats = &titan_ge_eth->stats;
++	spin_lock_irqsave(&titan_ge_eth->lock, flags);
++
++	if ((TITAN_GE_TX_QUEUE - titan_ge_eth->tx_ring_skbs) <=
++	    (skb_shinfo(skb)->nr_frags + 1)) {
++		netif_stop_queue(netdev);
++		spin_unlock_irqrestore(&titan_ge_eth->lock, flags);
++		printk(KERN_ERR "Tx OOD \n");
++		return 1;
++	}
++
++	titan_ge_tx_queue(titan_ge_eth, skb);
++	titan_ge_eth->tx_ring_skbs++;
++
++	if (TITAN_GE_TX_QUEUE <= (titan_ge_eth->tx_ring_skbs + 4)) {
++		spin_unlock_irqrestore(&titan_ge_eth->lock, flags);
++		titan_ge_free_tx_queue(titan_ge_eth);
++		spin_lock_irqsave(&titan_ge_eth->lock, flags);
++	}
++
++	stats->tx_bytes += skb->len;
++	stats->tx_packets++;
++
++	spin_unlock_irqrestore(&titan_ge_eth->lock, flags);
++
++	netdev->trans_start = jiffies;
++
++	return 0;
++}
++
++/*
++ * Actually does the Rx. Rx side checksumming supported.
++ */
++static int titan_ge_rx(struct net_device *netdev, int port_num,
++			titan_ge_port_info * titan_ge_port,
++		       titan_ge_packet * packet)
++{
++	int rx_curr_desc, rx_used_desc;
++	volatile titan_ge_rx_desc *rx_desc;
++
++	rx_curr_desc = titan_ge_port->rx_curr_desc_q;
++	rx_used_desc = titan_ge_port->rx_used_desc_q;
++
++	if (((rx_curr_desc + 1) % TITAN_GE_RX_QUEUE) == rx_used_desc)
++		return TITAN_ERROR;
++
++	rx_desc = &(titan_ge_port->rx_desc_area[rx_curr_desc]);
++
++	if (rx_desc->cmd_sts & TITAN_GE_RX_BUFFER_OWNED)
++		return TITAN_ERROR;
++
++	packet->skb = titan_ge_port->rx_skb[rx_curr_desc];
++	packet->len = (rx_desc->cmd_sts & 0x7fff);
++
++	/*
++	 * At this point, we dont know if the checksumming
++	 * actually helps relieve CPU. So, keep it for
++	 * port 0 only
++	 */
++	packet->checksum = ntohs((rx_desc->buffer & 0xffff0000) >> 16);
++	packet->cmd_sts = rx_desc->cmd_sts;
++
++	titan_ge_port->rx_curr_desc_q = (rx_curr_desc + 1) % TITAN_GE_RX_QUEUE;
++
++	/* Prefetch the next descriptor */
++	prefetch((const void *)
++	       &titan_ge_port->rx_desc_area[titan_ge_port->rx_curr_desc_q + 1]);
++
++	return TITAN_OK;
++}
++
++/*
++ * Free the Tx queue of the used SKBs
++ */
++static int titan_ge_free_tx_queue(titan_ge_port_info *titan_ge_eth)
++{
++	unsigned long flags;
++
++	/* Take the lock */
++	spin_lock_irqsave(&(titan_ge_eth->lock), flags);
++
++	while (titan_ge_return_tx_desc(titan_ge_eth, titan_ge_eth->port_num) == 0)
++		if (titan_ge_eth->tx_ring_skbs != 1)
++			titan_ge_eth->tx_ring_skbs--;
++
++	spin_unlock_irqrestore(&titan_ge_eth->lock, flags);
++
++	return TITAN_OK;
++}
++
++/*
++ * Threshold beyond which we do the cleaning of
++ * Tx queue and new allocation for the Rx
++ * queue
++ */
++#define	TX_THRESHOLD	4
++#define	RX_THRESHOLD	10
++
++/*
++ * Receive the packets and send it to the kernel.
++ */
++static int titan_ge_receive_queue(struct net_device *netdev, unsigned int max)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned int port_num = titan_ge_eth->port_num;
++	titan_ge_packet packet;
++	struct net_device_stats *stats;
++	struct sk_buff *skb;
++	unsigned long received_packets = 0;
++	unsigned int ack;
++
++	stats = &titan_ge_eth->stats;
++
++	while ((--max)
++	       && (titan_ge_rx(netdev, port_num, titan_ge_eth, &packet) == TITAN_OK)) {
++		skb = (struct sk_buff *) packet.skb;
++
++		titan_ge_eth->rx_ring_skbs--;
++
++		if (--titan_ge_eth->rx_work_limit < 0)
++			break;
++		received_packets++;
++
++		stats->rx_packets++;
++		stats->rx_bytes += packet.len;
++
++		if ((packet.cmd_sts & TITAN_GE_RX_PERR) ||
++			(packet.cmd_sts & TITAN_GE_RX_OVERFLOW_ERROR) ||
++			(packet.cmd_sts & TITAN_GE_RX_TRUNC) ||
++			(packet.cmd_sts & TITAN_GE_RX_CRC_ERROR)) {
++				stats->rx_dropped++;
++				dev_kfree_skb_any(skb);
++
++				continue;
++		}
++		/*
++		 * Either support fast path or slow path. Decision
++		 * making can really slow down the performance. The
++		 * idea is to cut down the number of checks and improve
++		 * the fastpath.
++		 */
++
++		skb_put(skb, packet.len - 2);
++
++		/*
++		 * Increment data pointer by two since thats where
++		 * the MAC starts
++		 */
++		skb_reserve(skb, 2);
++		skb->protocol = eth_type_trans(skb, netdev);
++		netif_receive_skb(skb);
++
++		if (titan_ge_eth->rx_threshold > RX_THRESHOLD) {
++			ack = titan_ge_rx_task(netdev, titan_ge_eth);
++			TITAN_GE_WRITE((0x5048 + (port_num << 8)), ack);
++			titan_ge_eth->rx_threshold = 0;
++		} else
++			titan_ge_eth->rx_threshold++;
++
++		if (titan_ge_eth->tx_threshold > TX_THRESHOLD) {
++			titan_ge_eth->tx_threshold = 0;
++			titan_ge_free_tx_queue(titan_ge_eth);
++		}
++		else
++			titan_ge_eth->tx_threshold++;
++
++	}
++	return received_packets;
++}
++
++
++/*
++ * Enable the Rx side interrupts
++ */
++static void titan_ge_enable_int(unsigned int port_num,
++			titan_ge_port_info *titan_ge_eth,
++			struct net_device *netdev)
++{
++	unsigned long reg_data = TITAN_GE_READ(TITAN_GE_INTR_XDMA_IE);
++
++	if (port_num == 0)
++		reg_data |= 0x3;
++	if (port_num == 1)
++		reg_data |= 0x300;
++	if (port_num == 2)
++		reg_data |= 0x30000;
++
++	/* Re-enable interrupts */
++	TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_IE, reg_data);
++}
++
++/*
++ * Main function to handle the polling for Rx side NAPI.
++ * Receive interrupts have been disabled at this point.
++ * The poll schedules the transmit followed by receive.
++ */
++static int titan_ge_poll(struct net_device *netdev, int *budget)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	int port_num = titan_ge_eth->port_num;
++	int work_done = 0;
++	unsigned long flags, status;
++
++	titan_ge_eth->rx_work_limit = *budget;
++	if (titan_ge_eth->rx_work_limit > netdev->quota)
++		titan_ge_eth->rx_work_limit = netdev->quota;
++
++	do {
++		/* Do the transmit cleaning work here */
++		titan_ge_free_tx_queue(titan_ge_eth);
++
++		/* Ack the Rx interrupts */
++		if (port_num == 0)
++			TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_CORE_A, 0x3);
++		if (port_num == 1)
++			TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_CORE_A, 0x300);
++		if (port_num == 2)
++			TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_CORE_A, 0x30000);
++
++		work_done += titan_ge_receive_queue(netdev, 0);
++
++		/* Out of quota and there is work to be done */
++		if (titan_ge_eth->rx_work_limit < 0)
++			goto not_done;
++
++		/* Receive alloc_skb could lead to OOM */
++		if (oom_flag == 1) {
++			oom_flag = 0;
++			goto oom;
++		}
++
++		status = TITAN_GE_READ(TITAN_GE_INTR_XDMA_CORE_A);
++	} while (status & 0x30300);
++
++	/* If we are here, then no more interrupts to process */
++	goto done;
++
++not_done:
++	*budget -= work_done;
++	netdev->quota -= work_done;
++	return 1;
++
++oom:
++	printk(KERN_ERR "OOM \n");
++	netif_rx_complete(netdev);
++	return 0;
++
++done:
++	/*
++	 * No more packets on the poll list. Turn the interrupts
++	 * back on and we should be able to catch the new
++	 * packets in the interrupt handler
++	 */
++	if (!work_done)
++		work_done = 1;
++
++	*budget -= work_done;
++	netdev->quota -= work_done;
++
++	spin_lock_irqsave(&titan_ge_eth->lock, flags);
++
++	/* Remove us from the poll list */
++	netif_rx_complete(netdev);
++
++	/* Re-enable interrupts */
++	titan_ge_enable_int(port_num, titan_ge_eth, netdev);
++
++	spin_unlock_irqrestore(&titan_ge_eth->lock, flags);
++
++	return 0;
++}
++
++/*
++ * Close the network device
++ */
++int titan_ge_stop(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++
++	spin_lock_irq(&(titan_ge_eth->lock));
++	titan_ge_eth_stop(netdev);
++	free_irq(netdev->irq, netdev);
++	spin_unlock_irq(&titan_ge_eth->lock);
++
++	return TITAN_OK;
++}
++
++/*
++ * Free the Tx ring
++ */
++static void titan_ge_free_tx_rings(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned int port_num = titan_ge_eth->port_num;
++	unsigned int curr;
++	unsigned long reg_data;
++
++	/* Stop the Tx DMA */
++	reg_data = TITAN_GE_READ(TITAN_GE_CHANNEL0_CONFIG +
++				(port_num << 8));
++	reg_data |= 0xc0000000;
++	TITAN_GE_WRITE((TITAN_GE_CHANNEL0_CONFIG +
++			(port_num << 8)), reg_data);
++
++	/* Disable the TMAC */
++	reg_data = TITAN_GE_READ(TITAN_GE_TMAC_CONFIG_1 +
++				(port_num << 12));
++	reg_data &= ~(0x00000001);
++	TITAN_GE_WRITE((TITAN_GE_TMAC_CONFIG_1 +
++			(port_num << 12)), reg_data);
++
++	for (curr = 0;
++	     (titan_ge_eth->tx_ring_skbs) && (curr < TITAN_GE_TX_QUEUE);
++	     curr++) {
++		if (titan_ge_eth->tx_skb[curr]) {
++			dev_kfree_skb(titan_ge_eth->tx_skb[curr]);
++			titan_ge_eth->tx_ring_skbs--;
++		}
++	}
++
++	if (titan_ge_eth->tx_ring_skbs != 0)
++		printk
++		    ("%s: Error on Tx descriptor free - could not free %d"
++		     " descriptors\n", netdev->name,
++		     titan_ge_eth->tx_ring_skbs);
++
++#ifndef TITAN_RX_RING_IN_SRAM
++	dma_free_coherent(&titan_ge_device[port_num]->dev,
++			  titan_ge_eth->tx_desc_area_size,
++			  (void *) titan_ge_eth->tx_desc_area,
++			  titan_ge_eth->tx_dma);
++#endif
++}
++
++/*
++ * Free the Rx ring
++ */
++static void titan_ge_free_rx_rings(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned int port_num = titan_ge_eth->port_num;
++	unsigned int curr;
++	unsigned long reg_data;
++
++	/* Stop the Rx DMA */
++	reg_data = TITAN_GE_READ(TITAN_GE_CHANNEL0_CONFIG +
++				(port_num << 8));
++	reg_data |= 0x000c0000;
++	TITAN_GE_WRITE((TITAN_GE_CHANNEL0_CONFIG +
++			(port_num << 8)), reg_data);
++
++	/* Disable the RMAC */
++	reg_data = TITAN_GE_READ(TITAN_GE_RMAC_CONFIG_1 +
++				(port_num << 12));
++	reg_data &= ~(0x00000001);
++	TITAN_GE_WRITE((TITAN_GE_RMAC_CONFIG_1 +
++			(port_num << 12)), reg_data);
++
++	for (curr = 0;
++	     titan_ge_eth->rx_ring_skbs && (curr < TITAN_GE_RX_QUEUE);
++	     curr++) {
++		if (titan_ge_eth->rx_skb[curr]) {
++			dev_kfree_skb(titan_ge_eth->rx_skb[curr]);
++			titan_ge_eth->rx_ring_skbs--;
++		}
++	}
++
++	if (titan_ge_eth->rx_ring_skbs != 0)
++		printk(KERN_ERR
++		       "%s: Error in freeing Rx Ring. %d skb's still"
++		       " stuck in RX Ring - ignoring them\n", netdev->name,
++		       titan_ge_eth->rx_ring_skbs);
++
++#ifndef TITAN_RX_RING_IN_SRAM
++	dma_free_coherent(&titan_ge_device[port_num]->dev,
++			  titan_ge_eth->rx_desc_area_size,
++			  (void *) titan_ge_eth->rx_desc_area,
++			  titan_ge_eth->rx_dma);
++#endif
++}
++
++/*
++ * Actually does the stop of the Ethernet device
++ */
++static void titan_ge_eth_stop(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++
++	netif_stop_queue(netdev);
++
++	titan_ge_port_reset(titan_ge_eth->port_num);
++
++	titan_ge_free_tx_rings(netdev);
++	titan_ge_free_rx_rings(netdev);
++
++	/* Disable the Tx and Rx Interrupts for all channels */
++	TITAN_GE_WRITE(TITAN_GE_INTR_XDMA_IE, 0x0);
++}
++
++/*
++ * Update the MAC address. Note that we have to write the
++ * address in three station registers, 16 bits each. And this
++ * has to be done for TMAC and RMAC
++ */
++static void titan_ge_update_mac_address(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++	unsigned int port_num = titan_ge_eth->port_num;
++	u8 p_addr[6];
++
++	memcpy(titan_ge_eth->port_mac_addr, netdev->dev_addr, 6);
++	memcpy(p_addr, netdev->dev_addr, 6);
++
++	/* Update the Address Filtering Match tables */
++	titan_ge_update_afx(titan_ge_eth);
++
++	printk("Station MAC : %d %d %d %d %d %d  \n",
++		p_addr[5], p_addr[4], p_addr[3],
++		p_addr[2], p_addr[1], p_addr[0]);
++
++	/* Set the MAC address here for TMAC and RMAC */
++	TITAN_GE_WRITE((TITAN_GE_TMAC_STATION_HI + (port_num << 12)),
++		       ((p_addr[5] << 8) | p_addr[4]));
++	TITAN_GE_WRITE((TITAN_GE_TMAC_STATION_MID + (port_num << 12)),
++		       ((p_addr[3] << 8) | p_addr[2]));
++	TITAN_GE_WRITE((TITAN_GE_TMAC_STATION_LOW + (port_num << 12)),
++		       ((p_addr[1] << 8) | p_addr[0]));
++
++	TITAN_GE_WRITE((TITAN_GE_RMAC_STATION_HI + (port_num << 12)),
++		       ((p_addr[5] << 8) | p_addr[4]));
++	TITAN_GE_WRITE((TITAN_GE_RMAC_STATION_MID + (port_num << 12)),
++		       ((p_addr[3] << 8) | p_addr[2]));
++	TITAN_GE_WRITE((TITAN_GE_RMAC_STATION_LOW + (port_num << 12)),
++		       ((p_addr[1] << 8) | p_addr[0]));
++}
++
++/*
++ * Set the MAC address of the Ethernet device
++ */
++static int titan_ge_set_mac_address(struct net_device *dev, void *addr)
++{
++	titan_ge_port_info *tp = netdev_priv(dev);
++	struct sockaddr *sa = addr;
++
++	memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
++
++	spin_lock_irq(&tp->lock);
++	titan_ge_update_mac_address(dev);
++	spin_unlock_irq(&tp->lock);
++
++	return 0;
++}
++
++/*
++ * Get the Ethernet device stats
++ */
++static struct net_device_stats *titan_ge_get_stats(struct net_device *netdev)
++{
++	titan_ge_port_info *titan_ge_eth = netdev_priv(netdev);
++
++	return &titan_ge_eth->stats;
++}
++
++/*
++ * Initialize the Rx descriptor ring for the Titan Ge
++ */
++static int titan_ge_init_rx_desc_ring(titan_ge_port_info * titan_eth_port,
++				      int rx_desc_num,
++				      int rx_buff_size,
++				      unsigned long rx_desc_base_addr,
++				      unsigned long rx_buff_base_addr,
++				      unsigned long rx_dma)
++{
++	volatile titan_ge_rx_desc *rx_desc;
++	unsigned long buffer_addr;
++	int index;
++	unsigned long titan_ge_rx_desc_bus = rx_dma;
++
++	buffer_addr = rx_buff_base_addr;
++	rx_desc = (titan_ge_rx_desc *) rx_desc_base_addr;
++
++	/* Check alignment */
++	if (rx_buff_base_addr & 0xF)
++		return 0;
++
++	/* Check Rx buffer size */
++	if ((rx_buff_size < 8) || (rx_buff_size > TITAN_GE_MAX_RX_BUFFER))
++		return 0;
++
++	/* 64-bit alignment
++	if ((rx_buff_base_addr + rx_buff_size) & 0x7)
++		return 0; */
++
++	/* Initialize the Rx desc ring */
++	for (index = 0; index < rx_desc_num; index++) {
++		titan_ge_rx_desc_bus += sizeof(titan_ge_rx_desc);
++		rx_desc[index].cmd_sts = 0;
++		rx_desc[index].buffer_addr = buffer_addr;
++		titan_eth_port->rx_skb[index] = NULL;
++		buffer_addr += rx_buff_size;
++	}
++
++	titan_eth_port->rx_curr_desc_q = 0;
++	titan_eth_port->rx_used_desc_q = 0;
++
++	titan_eth_port->rx_desc_area = (titan_ge_rx_desc *) rx_desc_base_addr;
++	titan_eth_port->rx_desc_area_size =
++	    rx_desc_num * sizeof(titan_ge_rx_desc);
++
++	titan_eth_port->rx_dma = rx_dma;
++
++	return TITAN_OK;
++}
++
++/*
++ * Initialize the Tx descriptor ring. Descriptors in the SRAM
++ */
++static int titan_ge_init_tx_desc_ring(titan_ge_port_info * titan_ge_port,
++				      int tx_desc_num,
++				      unsigned long tx_desc_base_addr,
++				      unsigned long tx_dma)
++{
++	titan_ge_tx_desc *tx_desc;
++	int index;
++	unsigned long titan_ge_tx_desc_bus = tx_dma;
++
++	if (tx_desc_base_addr & 0xF)
++		return 0;
++
++	tx_desc = (titan_ge_tx_desc *) tx_desc_base_addr;
++
++	for (index = 0; index < tx_desc_num; index++) {
++		titan_ge_port->tx_dma_array[index] =
++		    (dma_addr_t) titan_ge_tx_desc_bus;
++		titan_ge_tx_desc_bus += sizeof(titan_ge_tx_desc);
++		tx_desc[index].cmd_sts = 0x0000;
++		tx_desc[index].buffer_len = 0;
++		tx_desc[index].buffer_addr = 0x00000000;
++		titan_ge_port->tx_skb[index] = NULL;
++	}
++
++	titan_ge_port->tx_curr_desc_q = 0;
++	titan_ge_port->tx_used_desc_q = 0;
++
++	titan_ge_port->tx_desc_area = (titan_ge_tx_desc *) tx_desc_base_addr;
++	titan_ge_port->tx_desc_area_size =
++	    tx_desc_num * sizeof(titan_ge_tx_desc);
++
++	titan_ge_port->tx_dma = tx_dma;
++	return TITAN_OK;
++}
++
++/*
++ * Initialize the device as an Ethernet device
++ */
++static int __init titan_ge_probe(struct device *device)
++{
++	titan_ge_port_info *titan_ge_eth;
++	struct net_device *netdev;
++	int port = to_platform_device(device)->id;
++	int err;
++
++	netdev = alloc_etherdev(sizeof(titan_ge_port_info));
++	if (!netdev) {
++		err = -ENODEV;
++		goto out;
++	}
++
++	netdev->open = titan_ge_open;
++	netdev->stop = titan_ge_stop;
++	netdev->hard_start_xmit = titan_ge_start_xmit;
++	netdev->get_stats = titan_ge_get_stats;
++	netdev->set_multicast_list = titan_ge_set_multi;
++	netdev->set_mac_address = titan_ge_set_mac_address;
++
++	/* Tx timeout */
++	netdev->tx_timeout = titan_ge_tx_timeout;
++	netdev->watchdog_timeo = 2 * HZ;
++
++	/* Set these to very high values */
++	netdev->poll = titan_ge_poll;
++	netdev->weight = 64;
++
++	netdev->tx_queue_len = TITAN_GE_TX_QUEUE;
++	netif_carrier_off(netdev);
++	netdev->base_addr = 0;
++
++	netdev->change_mtu = titan_ge_change_mtu;
++
++	titan_ge_eth = netdev_priv(netdev);
++	/* Allocation of memory for the driver structures */
++
++	titan_ge_eth->port_num = port;
++
++	/* Configure the Tx timeout handler */
++	INIT_WORK(&titan_ge_eth->tx_timeout_task,
++		  (void (*)(void *)) titan_ge_tx_timeout_task, netdev);
++
++	spin_lock_init(&titan_ge_eth->lock);
++
++	/* set MAC addresses */
++	memcpy(netdev->dev_addr, titan_ge_mac_addr_base, 6);
++	netdev->dev_addr[5] += port;
++
++	err = register_netdev(netdev);
++
++	if (err)
++		goto out_free_netdev;
++
++	printk(KERN_NOTICE
++	       "%s: port %d with MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
++	       netdev->name, port, netdev->dev_addr[0],
++	       netdev->dev_addr[1], netdev->dev_addr[2],
++	       netdev->dev_addr[3], netdev->dev_addr[4],
++	       netdev->dev_addr[5]);
++
++	printk(KERN_NOTICE "Rx NAPI supported, Tx Coalescing ON \n");
++
++	return 0;
++
++out_free_netdev:
++	kfree(netdev);
++
++out:
++	return err;
++}
++
++static void __devexit titan_device_remove(struct device *device)
++{
++}
++
++/*
++ * Reset the Ethernet port
++ */
++static void titan_ge_port_reset(unsigned int port_num)
++{
++	unsigned int reg_data;
++
++	/* Stop the Tx port activity */
++	reg_data = TITAN_GE_READ(TITAN_GE_TMAC_CONFIG_1 +
++				(port_num << 12));
++	reg_data &= ~(0x0001);
++	TITAN_GE_WRITE((TITAN_GE_TMAC_CONFIG_1 +
++			(port_num << 12)), reg_data);
++
++	/* Stop the Rx port activity */
++	reg_data = TITAN_GE_READ(TITAN_GE_RMAC_CONFIG_1 +
++				(port_num << 12));
++	reg_data &= ~(0x0001);
++	TITAN_GE_WRITE((TITAN_GE_RMAC_CONFIG_1 +
++			(port_num << 12)), reg_data);
++
++	return;
++}
++
++/*
++ * Return the Tx desc after use by the XDMA
++ */
++static int titan_ge_return_tx_desc(titan_ge_port_info * titan_ge_eth, int port)
++{
++	int tx_desc_used;
++	struct sk_buff *skb;
++
++	tx_desc_used = titan_ge_eth->tx_used_desc_q;
++
++	/* return right away */
++	if (tx_desc_used == titan_ge_eth->tx_curr_desc_q)
++		return TITAN_ERROR;
++
++	/* Now the critical stuff */
++	skb = titan_ge_eth->tx_skb[tx_desc_used];
++
++	dev_kfree_skb_any(skb);
++
++	titan_ge_eth->tx_skb[tx_desc_used] = NULL;
++	titan_ge_eth->tx_used_desc_q =
++	    (tx_desc_used + 1) % TITAN_GE_TX_QUEUE;
++
++	return 0;
++}
++
++/*
++ * Coalescing for the Tx path
++ */
++static unsigned long titan_ge_tx_coal(unsigned long delay, int port)
++{
++	unsigned long rx_delay;
++
++	rx_delay = TITAN_GE_READ(TITAN_GE_INT_COALESCING);
++	delay = (delay << 16) | rx_delay;
++
++	TITAN_GE_WRITE(TITAN_GE_INT_COALESCING, delay);
++	TITAN_GE_WRITE(0x5038, delay);
++
++	return delay;
++}
++
++static struct device_driver titan_soc_driver = {
++	.name   = titan_string,
++	.bus    = &platform_bus_type,
++	.probe  = titan_ge_probe,
++	.remove = __devexit_p(titan_device_remove),
++};
++
++static void titan_platform_release (struct device *device)
++{
++	struct platform_device *pldev;
++
++	/* free device */
++	pldev = to_platform_device (device);
++	kfree (pldev);
++}
++
++/*
++ * Register the Titan GE with the kernel
++ */
++static int __init titan_ge_init_module(void)
++{
++	struct platform_device *pldev;
++	unsigned int version, device;
++	int i;
++
++	printk(KERN_NOTICE
++	       "PMC-Sierra TITAN 10/100/1000 Ethernet Driver \n");
++
++	titan_ge_base = (unsigned long) ioremap(TITAN_GE_BASE, TITAN_GE_SIZE);
++	if (!titan_ge_base) {
++		printk("Mapping Titan GE failed\n");
++		goto out;
++	}
++
++	device = TITAN_GE_READ(TITAN_GE_DEVICE_ID);
++	version = (device & 0x000f0000) >> 16;
++	device &= 0x0000ffff;
++
++	printk(KERN_NOTICE "Device Id : %x,  Version : %x \n", device, version);
++
++#ifdef TITAN_RX_RING_IN_SRAM
++	titan_ge_sram = (unsigned long) ioremap(TITAN_SRAM_BASE,
++						TITAN_SRAM_SIZE);
++	if (!titan_ge_sram) {
++		printk("Mapping Titan SRAM failed\n");
++		goto out_unmap_ge;
++	}
++#endif
++
++	if (driver_register(&titan_soc_driver)) {
++		printk(KERN_ERR "Driver registration failed\n");
++		goto out_unmap_sram;
++	}
++
++	for (i = 0; i < 3; i++) {
++		titan_ge_device[i] = NULL;
++
++		if (!(pldev = kmalloc (sizeof (*pldev), GFP_KERNEL)))
++			continue;
++
++		memset (pldev, 0, sizeof (*pldev));
++		pldev->name		= titan_string;
++		pldev->id		= i;
++		pldev->dev.release	= titan_platform_release;
++		titan_ge_device[i]	= pldev;
++
++		if (platform_device_register (pldev)) {
++			kfree (pldev);
++			titan_ge_device[i] = NULL;
++			continue;
++		}
++
++		if (!pldev->dev.driver) {
++			/*
++			 * The driver was not bound to this device, there was
++			 * no hardware at this address. Unregister it, as the
++			 * release fuction will take care of freeing the
++			 * allocated structure
++			 */
++			titan_ge_device[i] = NULL;
++			platform_device_unregister (pldev);
++		}
++	}
++
++	return 0;
++
++out_unmap_sram:
++	iounmap((void *)titan_ge_sram);
++
++out_unmap_ge:
++	iounmap((void *)titan_ge_base);
++
++out:
++	return -ENOMEM;
++}
++
++/*
++ * Unregister the Titan GE from the kernel
++ */
++static void __exit titan_ge_cleanup_module(void)
++{
++	int i;
++
++	driver_unregister(&titan_soc_driver);
++
++	for (i = 0; i < 3; i++) {
++		if (titan_ge_device[i]) {
++			platform_device_unregister (titan_ge_device[i]);
++			titan_ge_device[i] = NULL;
++		}
++	}
++
++	iounmap((void *)titan_ge_sram);
++	iounmap((void *)titan_ge_base);
++}
++
++MODULE_AUTHOR("Manish Lachwani <lachwani@pmc-sierra.com>");
++MODULE_DESCRIPTION("Titan GE Ethernet driver");
++MODULE_LICENSE("GPL");
++
++module_init(titan_ge_init_module);
++module_exit(titan_ge_cleanup_module);
+diff --git a/drivers/net/titan_ge.h b/drivers/net/titan_ge.h
+new file mode 100644
+index 0000000..3719f78
+--- /dev/null
++++ b/drivers/net/titan_ge.h
+@@ -0,0 +1,415 @@
++#ifndef _TITAN_GE_H_
++#define _TITAN_GE_H_
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <asm/byteorder.h>
++
++/*
++ * These functions should be later moved to a more generic location since there
++ * will be others accessing it also
++ */
++
++/*
++ * This is the way it works: LKB5 Base is at 0x0128. TITAN_BASE is defined in
++ * include/asm/titan_dep.h. TITAN_GE_BASE is the value in the TITAN_GE_LKB5
++ * register.
++ */
++
++#define	TITAN_GE_BASE	0xfe000000UL
++#define	TITAN_GE_SIZE	0x10000UL
++
++extern unsigned long titan_ge_base;
++
++#define	TITAN_GE_WRITE(offset, data) \
++		*(volatile u32 *)(titan_ge_base + (offset)) = (data)
++
++#define TITAN_GE_READ(offset) *(volatile u32 *)(titan_ge_base + (offset))
++
++#ifndef msec_delay
++#define msec_delay(x)   do { if(in_interrupt()) { \
++				/* Don't mdelay in interrupt context! */ \
++				BUG(); \
++			} else { \
++				set_current_state(TASK_UNINTERRUPTIBLE); \
++				schedule_timeout((x * HZ)/1000); \
++			} } while(0)
++#endif
++
++#define TITAN_GE_PORT_0
++
++#define	TITAN_SRAM_BASE		((OCD_READ(RM9000x2_OCD_LKB13) & ~1) << 4)
++#define	TITAN_SRAM_SIZE		0x2000UL
++
++/*
++ * We may need these constants
++ */
++#define TITAN_BIT0    0x00000001
++#define TITAN_BIT1    0x00000002
++#define TITAN_BIT2    0x00000004
++#define TITAN_BIT3    0x00000008
++#define TITAN_BIT4    0x00000010
++#define TITAN_BIT5    0x00000020
++#define TITAN_BIT6    0x00000040
++#define TITAN_BIT7    0x00000080
++#define TITAN_BIT8    0x00000100
++#define TITAN_BIT9    0x00000200
++#define TITAN_BIT10   0x00000400
++#define TITAN_BIT11   0x00000800
++#define TITAN_BIT12   0x00001000
++#define TITAN_BIT13   0x00002000
++#define TITAN_BIT14   0x00004000
++#define TITAN_BIT15   0x00008000
++#define TITAN_BIT16   0x00010000
++#define TITAN_BIT17   0x00020000
++#define TITAN_BIT18   0x00040000
++#define TITAN_BIT19   0x00080000
++#define TITAN_BIT20   0x00100000
++#define TITAN_BIT21   0x00200000
++#define TITAN_BIT22   0x00400000
++#define TITAN_BIT23   0x00800000
++#define TITAN_BIT24   0x01000000
++#define TITAN_BIT25   0x02000000
++#define TITAN_BIT26   0x04000000
++#define TITAN_BIT27   0x08000000
++#define TITAN_BIT28   0x10000000
++#define TITAN_BIT29   0x20000000
++#define TITAN_BIT30   0x40000000
++#define TITAN_BIT31   0x80000000
++
++/* Flow Control */
++#define	TITAN_GE_FC_NONE	0x0
++#define	TITAN_GE_FC_FULL	0x1
++#define	TITAN_GE_FC_TX_PAUSE	0x2
++#define	TITAN_GE_FC_RX_PAUSE	0x3
++
++/* Duplex Settings */
++#define	TITAN_GE_FULL_DUPLEX	0x1
++#define	TITAN_GE_HALF_DUPLEX	0x2
++
++/* Speed settings */
++#define	TITAN_GE_SPEED_1000	0x1
++#define	TITAN_GE_SPEED_100	0x2
++#define	TITAN_GE_SPEED_10	0x3
++
++/* Debugging info only */
++#undef TITAN_DEBUG
++
++/* Keep the rings in the Titan's SSRAM */
++#define TITAN_RX_RING_IN_SRAM
++
++#ifdef CONFIG_64BIT
++#define	TITAN_GE_IE_MASK	0xfffffffffb001b64
++#define	TITAN_GE_IE_STATUS	0xfffffffffb001b60
++#else
++#define	TITAN_GE_IE_MASK	0xfb001b64
++#define	TITAN_GE_IE_STATUS	0xfb001b60
++#endif
++
++/* Support for Jumbo Frames */
++#undef TITAN_GE_JUMBO_FRAMES
++
++/* Rx buffer size */
++#ifdef TITAN_GE_JUMBO_FRAMES
++#define	TITAN_GE_JUMBO_BUFSIZE	9080
++#else
++#define	TITAN_GE_STD_BUFSIZE	1580
++#endif
++
++/*
++ * Tx and Rx Interrupt Coalescing parameter. These values are
++ * for 1 Ghz processor. Rx coalescing can be taken care of
++ * by NAPI. NAPI is adaptive and hence useful. Tx coalescing
++ * is not adaptive. Hence, these values need to be adjusted
++ * based on load, CPU speed etc.
++ */
++#define	TITAN_GE_RX_COAL	150
++#define	TITAN_GE_TX_COAL	300
++
++#if defined(__BIG_ENDIAN)
++
++/* Define the Rx descriptor */
++typedef struct eth_rx_desc {
++	u32     reserved;	/* Unused 		*/
++	u32     buffer_addr;	/* CPU buffer address 	*/
++	u32	cmd_sts;	/* Command and Status	*/
++	u32	buffer;		/* XDMA buffer address	*/
++} titan_ge_rx_desc;
++
++/* Define the Tx descriptor */
++typedef struct eth_tx_desc {
++	u16     cmd_sts;	/* Command, Status and Buffer count */
++	u16	buffer_len;	/* Length of the buffer	*/
++	u32     buffer_addr;	/* Physical address of the buffer */
++} titan_ge_tx_desc;
++
++#elif defined(__LITTLE_ENDIAN)
++
++/* Define the Rx descriptor */
++typedef struct eth_rx_desc {
++	u32	buffer_addr;	/* CPU buffer address   */
++	u32	reserved;	/* Unused               */
++	u32	buffer;		/* XDMA buffer address  */
++	u32	cmd_sts;	/* Command and Status   */
++} titan_ge_rx_desc;
++
++/* Define the Tx descriptor */
++typedef struct eth_tx_desc {
++	u32     buffer_addr;	/* Physical address of the buffer */
++	u16     buffer_len;     /* Length of the buffer */
++	u16     cmd_sts;        /* Command, Status and Buffer count */
++} titan_ge_tx_desc;
++#endif
++
++/* Default Tx Queue Size */
++#define	TITAN_GE_TX_QUEUE	128
++#define TITAN_TX_RING_BYTES	(TITAN_GE_TX_QUEUE * sizeof(struct eth_tx_desc))
++
++/* Default Rx Queue Size */
++#define	TITAN_GE_RX_QUEUE	64
++#define TITAN_RX_RING_BYTES	(TITAN_GE_RX_QUEUE * sizeof(struct eth_rx_desc))
++
++/* Packet Structure */
++typedef struct _pkt_info {
++	unsigned int           len;
++	unsigned int            cmd_sts;
++	unsigned int            buffer;
++	struct sk_buff          *skb;
++	unsigned int		checksum;
++} titan_ge_packet;
++
++
++#define	PHYS_CNT	3
++
++/* Titan Port specific data structure */
++typedef struct _eth_port_ctrl {
++	unsigned int		port_num;
++	u8			port_mac_addr[6];
++
++	/* Rx descriptor pointers */
++	int 			rx_curr_desc_q, rx_used_desc_q;
++
++	/* Tx descriptor pointers */
++	int 			tx_curr_desc_q, tx_used_desc_q;
++
++	/* Rx descriptor area */
++	volatile titan_ge_rx_desc	*rx_desc_area;
++	unsigned int			rx_desc_area_size;
++	struct sk_buff*			rx_skb[TITAN_GE_RX_QUEUE];
++
++	/* Tx Descriptor area */
++	volatile titan_ge_tx_desc	*tx_desc_area;
++	unsigned int                    tx_desc_area_size;
++	struct sk_buff*                 tx_skb[TITAN_GE_TX_QUEUE];
++
++	/* Timeout task */
++	struct work_struct		tx_timeout_task;
++
++	/* DMA structures and handles */
++	dma_addr_t			tx_dma;
++	dma_addr_t			rx_dma;
++	dma_addr_t			tx_dma_array[TITAN_GE_TX_QUEUE];
++
++	/* Device lock */
++	spinlock_t			lock;
++
++	unsigned int			tx_ring_skbs;
++	unsigned int			rx_ring_size;
++	unsigned int			tx_ring_size;
++	unsigned int			rx_ring_skbs;
++
++	struct net_device_stats		stats;
++
++	/* Tx and Rx coalescing */
++	unsigned long			rx_int_coal;
++	unsigned long			tx_int_coal;
++
++	/* Threshold for replenishing the Rx and Tx rings */
++	unsigned int			tx_threshold;
++	unsigned int			rx_threshold;
++
++	/* NAPI work limit */
++	unsigned int			rx_work_limit;
++} titan_ge_port_info;
++
++/* Titan specific constants */
++#define	TITAN_ETH_PORT_IRQ		3
++
++/* Max Rx buffer */
++#define	TITAN_GE_MAX_RX_BUFFER		65536
++
++/* Tx and Rx Error */
++#define	TITAN_GE_ERROR
++
++/* Rx Descriptor Command and Status */
++
++#define	TITAN_GE_RX_CRC_ERROR		TITAN_BIT27	/* crc error */
++#define	TITAN_GE_RX_OVERFLOW_ERROR	TITAN_BIT15	/* overflow */
++#define TITAN_GE_RX_BUFFER_OWNED	TITAN_BIT21	/* buffer ownership */
++#define	TITAN_GE_RX_STP			TITAN_BIT31	/* start of packet */
++#define	TITAN_GE_RX_BAM			TITAN_BIT30	/* broadcast address match */
++#define TITAN_GE_RX_PAM			TITAN_BIT28	/* physical address match */
++#define TITAN_GE_RX_LAFM		TITAN_BIT29	/* logical address filter match */
++#define TITAN_GE_RX_VLAN		TITAN_BIT26	/* virtual lans */
++#define TITAN_GE_RX_PERR		TITAN_BIT19	/* packet error */
++#define TITAN_GE_RX_TRUNC		TITAN_BIT20	/* packet size greater than 32 buffers */
++
++/* Tx Descriptor Command */
++#define	TITAN_GE_TX_BUFFER_OWNED	TITAN_BIT5	/* buffer ownership */
++#define	TITAN_GE_TX_ENABLE_INTERRUPT	TITAN_BIT15	/* Interrupt Enable */
++
++/* Return Status */
++#define	TITAN_OK	0x1	/* Good Status */
++#define	TITAN_ERROR	0x2	/* Error Status */
++
++/* MIB specific register offset */
++#define TITAN_GE_MSTATX_STATS_BASE_LOW       0x0800  /* MSTATX COUNTL[15:0] */
++#define TITAN_GE_MSTATX_STATS_BASE_MID       0x0804  /* MSTATX COUNTM[15:0] */
++#define TITAN_GE_MSTATX_STATS_BASE_HI        0x0808  /* MSTATX COUNTH[7:0] */
++#define TITAN_GE_MSTATX_CONTROL              0x0828  /* MSTATX Control */
++#define TITAN_GE_MSTATX_VARIABLE_SELECT      0x082C  /* MSTATX Variable Select */
++
++/* MIB counter offsets, add to the TITAN_GE_MSTATX_STATS_BASE_XXX */
++#define TITAN_GE_MSTATX_RXFRAMESOK                   0x0040
++#define TITAN_GE_MSTATX_RXOCTETSOK                   0x0050
++#define TITAN_GE_MSTATX_RXFRAMES                     0x0060
++#define TITAN_GE_MSTATX_RXOCTETS                     0x0070
++#define TITAN_GE_MSTATX_RXUNICASTFRAMESOK            0x0080
++#define TITAN_GE_MSTATX_RXBROADCASTFRAMESOK          0x0090
++#define TITAN_GE_MSTATX_RXMULTICASTFRAMESOK          0x00A0
++#define TITAN_GE_MSTATX_RXTAGGEDFRAMESOK             0x00B0
++#define TITAN_GE_MSTATX_RXMACPAUSECONTROLFRAMESOK    0x00C0
++#define TITAN_GE_MSTATX_RXMACCONTROLFRAMESOK         0x00D0
++#define TITAN_GE_MSTATX_RXFCSERROR                   0x00E0
++#define TITAN_GE_MSTATX_RXALIGNMENTERROR             0x00F0
++#define TITAN_GE_MSTATX_RXSYMBOLERROR                0x0100
++#define TITAN_GE_MSTATX_RXLAYER1ERROR                0x0110
++#define TITAN_GE_MSTATX_RXINRANGELENGTHERROR         0x0120
++#define TITAN_GE_MSTATX_RXLONGLENGTHERROR            0x0130
++#define TITAN_GE_MSTATX_RXLONGLENGTHCRCERROR         0x0140
++#define TITAN_GE_MSTATX_RXSHORTLENGTHERROR           0x0150
++#define TITAN_GE_MSTATX_RXSHORTLLENGTHCRCERROR       0x0160
++#define TITAN_GE_MSTATX_RXFRAMES64OCTETS             0x0170
++#define TITAN_GE_MSTATX_RXFRAMES65TO127OCTETS        0x0180
++#define TITAN_GE_MSTATX_RXFRAMES128TO255OCTETS       0x0190
++#define TITAN_GE_MSTATX_RXFRAMES256TO511OCTETS       0x01A0
++#define TITAN_GE_MSTATX_RXFRAMES512TO1023OCTETS      0x01B0
++#define TITAN_GE_MSTATX_RXFRAMES1024TO1518OCTETS     0x01C0
++#define TITAN_GE_MSTATX_RXFRAMES1519TOMAXSIZE        0x01D0
++#define TITAN_GE_MSTATX_RXSTATIONADDRESSFILTERED     0x01E0
++#define TITAN_GE_MSTATX_RXVARIABLE                   0x01F0
++#define TITAN_GE_MSTATX_GENERICADDRESSFILTERED       0x0200
++#define TITAN_GE_MSTATX_UNICASTFILTERED              0x0210
++#define TITAN_GE_MSTATX_MULTICASTFILTERED            0x0220
++#define TITAN_GE_MSTATX_BROADCASTFILTERED            0x0230
++#define TITAN_GE_MSTATX_HASHFILTERED                 0x0240
++#define TITAN_GE_MSTATX_TXFRAMESOK                   0x0250
++#define TITAN_GE_MSTATX_TXOCTETSOK                   0x0260
++#define TITAN_GE_MSTATX_TXOCTETS                     0x0270
++#define TITAN_GE_MSTATX_TXTAGGEDFRAMESOK             0x0280
++#define TITAN_GE_MSTATX_TXMACPAUSECONTROLFRAMESOK    0x0290
++#define TITAN_GE_MSTATX_TXFCSERROR                   0x02A0
++#define TITAN_GE_MSTATX_TXSHORTLENGTHERROR           0x02B0
++#define TITAN_GE_MSTATX_TXLONGLENGTHERROR            0x02C0
++#define TITAN_GE_MSTATX_TXSYSTEMERROR                0x02D0
++#define TITAN_GE_MSTATX_TXMACERROR                   0x02E0
++#define TITAN_GE_MSTATX_TXCARRIERSENSEERROR          0x02F0
++#define TITAN_GE_MSTATX_TXSQETESTERROR               0x0300
++#define TITAN_GE_MSTATX_TXUNICASTFRAMESOK            0x0310
++#define TITAN_GE_MSTATX_TXBROADCASTFRAMESOK          0x0320
++#define TITAN_GE_MSTATX_TXMULTICASTFRAMESOK          0x0330
++#define TITAN_GE_MSTATX_TXUNICASTFRAMESATTEMPTED     0x0340
++#define TITAN_GE_MSTATX_TXBROADCASTFRAMESATTEMPTED   0x0350
++#define TITAN_GE_MSTATX_TXMULTICASTFRAMESATTEMPTED   0x0360
++#define TITAN_GE_MSTATX_TXFRAMES64OCTETS             0x0370
++#define TITAN_GE_MSTATX_TXFRAMES65TO127OCTETS        0x0380
++#define TITAN_GE_MSTATX_TXFRAMES128TO255OCTETS       0x0390
++#define TITAN_GE_MSTATX_TXFRAMES256TO511OCTETS       0x03A0
++#define TITAN_GE_MSTATX_TXFRAMES512TO1023OCTETS      0x03B0
++#define TITAN_GE_MSTATX_TXFRAMES1024TO1518OCTETS     0x03C0
++#define TITAN_GE_MSTATX_TXFRAMES1519TOMAXSIZE        0x03D0
++#define TITAN_GE_MSTATX_TXVARIABLE                   0x03E0
++#define TITAN_GE_MSTATX_RXSYSTEMERROR                0x03F0
++#define TITAN_GE_MSTATX_SINGLECOLLISION              0x0400
++#define TITAN_GE_MSTATX_MULTIPLECOLLISION            0x0410
++#define TITAN_GE_MSTATX_DEFERREDXMISSIONS            0x0420
++#define TITAN_GE_MSTATX_LATECOLLISIONS               0x0430
++#define TITAN_GE_MSTATX_ABORTEDDUETOXSCOLLS          0x0440
++
++/* Interrupt specific defines */
++#define TITAN_GE_DEVICE_ID         0x0000  /* Device ID */
++#define TITAN_GE_RESET             0x0004  /* Reset reg */
++#define TITAN_GE_TSB_CTRL_0        0x000C  /* TSB Control reg 0 */
++#define TITAN_GE_TSB_CTRL_1        0x0010  /* TSB Control reg 1 */
++#define TITAN_GE_INTR_GRP0_STATUS  0x0040  /* General Interrupt Group 0 Status */
++#define TITAN_GE_INTR_XDMA_CORE_A  0x0048  /* XDMA Channel Interrupt Status, Core A*/
++#define TITAN_GE_INTR_XDMA_CORE_B  0x004C  /* XDMA Channel Interrupt Status, Core B*/
++#define	TITAN_GE_INTR_XDMA_IE	   0x0058  /* XDMA Channel Interrupt Enable */
++#define TITAN_GE_SDQPF_ECC_INTR    0x480C  /* SDQPF ECC Interrupt Status */
++#define TITAN_GE_SDQPF_RXFIFO_CTL  0x4828  /* SDQPF RxFifo Control and Interrupt Enb*/
++#define TITAN_GE_SDQPF_RXFIFO_INTR 0x482C  /* SDQPF RxFifo Interrupt Status */
++#define TITAN_GE_SDQPF_TXFIFO_CTL  0x4928  /* SDQPF TxFifo Control and Interrupt Enb*/
++#define TITAN_GE_SDQPF_TXFIFO_INTR 0x492C  /* SDQPF TxFifo Interrupt Status */
++#define	TITAN_GE_SDQPF_RXFIFO_0	   0x4840  /* SDQPF RxFIFO Enable */
++#define	TITAN_GE_SDQPF_TXFIFO_0	   0x4940  /* SDQPF TxFIFO Enable */
++#define TITAN_GE_XDMA_CONFIG       0x5000  /* XDMA Global Configuration */
++#define TITAN_GE_XDMA_INTR_SUMMARY 0x5010  /* XDMA Interrupt Summary */
++#define TITAN_GE_XDMA_BUFADDRPRE   0x5018  /* XDMA Buffer Address Prefix */
++#define TITAN_GE_XDMA_DESCADDRPRE  0x501C  /* XDMA Descriptor Address Prefix */
++#define TITAN_GE_XDMA_PORTWEIGHT   0x502C  /* XDMA Port Weight Configuration */
++
++/* Rx MAC defines */
++#define TITAN_GE_RMAC_CONFIG_1               0x1200  /* RMAC Configuration 1 */
++#define TITAN_GE_RMAC_CONFIG_2               0x1204  /* RMAC Configuration 2 */
++#define TITAN_GE_RMAC_MAX_FRAME_LEN          0x1208  /* RMAC Max Frame Length */
++#define TITAN_GE_RMAC_STATION_HI             0x120C  /* Rx Station Address High */
++#define TITAN_GE_RMAC_STATION_MID            0x1210  /* Rx Station Address Middle */
++#define TITAN_GE_RMAC_STATION_LOW            0x1214  /* Rx Station Address Low */
++#define TITAN_GE_RMAC_LINK_CONFIG            0x1218  /* RMAC Link Configuration */
++
++/* Tx MAC defines */
++#define TITAN_GE_TMAC_CONFIG_1               0x1240  /* TMAC Configuration 1 */
++#define TITAN_GE_TMAC_CONFIG_2               0x1244  /* TMAC Configuration 2 */
++#define TITAN_GE_TMAC_IPG                    0x1248  /* TMAC Inter-Packet Gap */
++#define TITAN_GE_TMAC_STATION_HI             0x124C  /* Tx Station Address High */
++#define TITAN_GE_TMAC_STATION_MID            0x1250  /* Tx Station Address Middle */
++#define TITAN_GE_TMAC_STATION_LOW            0x1254  /* Tx Station Address Low */
++#define TITAN_GE_TMAC_MAX_FRAME_LEN          0x1258  /* TMAC Max Frame Length */
++#define TITAN_GE_TMAC_MIN_FRAME_LEN          0x125C  /* TMAC Min Frame Length */
++#define TITAN_GE_TMAC_PAUSE_FRAME_TIME       0x1260  /* TMAC Pause Frame Time */
++#define TITAN_GE_TMAC_PAUSE_FRAME_INTERVAL   0x1264  /* TMAC Pause Frame Interval */
++
++/* GMII register */
++#define TITAN_GE_GMII_INTERRUPT_STATUS       0x1348  /* GMII Interrupt Status */
++#define TITAN_GE_GMII_CONFIG_GENERAL         0x134C  /* GMII Configuration General */
++#define TITAN_GE_GMII_CONFIG_MODE            0x1350  /* GMII Configuration Mode */
++
++/* Tx and Rx XDMA defines */
++#define	TITAN_GE_INT_COALESCING		     0x5030 /* Interrupt Coalescing */
++#define	TITAN_GE_CHANNEL0_CONFIG	     0x5040 /* Channel 0 XDMA config */
++#define	TITAN_GE_CHANNEL0_INTERRUPT	     0x504c /* Channel 0 Interrupt Status */
++#define	TITAN_GE_GDI_INTERRUPT_ENABLE        0x5050 /* IE for the GDI Errors */
++#define	TITAN_GE_CHANNEL0_PACKET	     0x5060 /* Channel 0 Packet count */
++#define	TITAN_GE_CHANNEL0_BYTE		     0x5064 /* Channel 0 Byte count */
++#define	TITAN_GE_CHANNEL0_TX_DESC	     0x5054 /* Channel 0 Tx first desc */
++#define	TITAN_GE_CHANNEL0_RX_DESC	     0x5058 /* Channel 0 Rx first desc */
++
++/* AFX (Address Filter Exact) register offsets for Slice 0 */
++#define TITAN_GE_AFX_EXACT_MATCH_LOW         0x1100  /* AFX Exact Match Address Low*/
++#define TITAN_GE_AFX_EXACT_MATCH_MID         0x1104  /* AFX Exact Match Address Mid*/
++#define TITAN_GE_AFX_EXACT_MATCH_HIGH        0x1108  /* AFX Exact Match Address Hi */
++#define TITAN_GE_AFX_EXACT_MATCH_VID         0x110C  /* AFX Exact Match VID */
++#define TITAN_GE_AFX_MULTICAST_HASH_LOW      0x1110  /* AFX Multicast HASH Low */
++#define TITAN_GE_AFX_MULTICAST_HASH_MIDLOW   0x1114  /* AFX Multicast HASH MidLow */
++#define TITAN_GE_AFX_MULTICAST_HASH_MIDHI    0x1118  /* AFX Multicast HASH MidHi */
++#define TITAN_GE_AFX_MULTICAST_HASH_HI       0x111C  /* AFX Multicast HASH Hi */
++#define TITAN_GE_AFX_ADDRS_FILTER_CTRL_0     0x1120  /* AFX Address Filter Ctrl 0 */
++#define TITAN_GE_AFX_ADDRS_FILTER_CTRL_1     0x1124  /* AFX Address Filter Ctrl 1 */
++#define TITAN_GE_AFX_ADDRS_FILTER_CTRL_2     0x1128  /* AFX Address Filter Ctrl 2 */
++
++/* Traffic Groomer block */
++#define        TITAN_GE_TRTG_CONFIG	     0x1000  /* TRTG Config */
++
++#endif 				/* _TITAN_GE_H_ */
++
+diff --git a/drivers/net/titan_mdio.c b/drivers/net/titan_mdio.c
+new file mode 100644
+index 0000000..8a8785b
+--- /dev/null
++++ b/drivers/net/titan_mdio.c
+@@ -0,0 +1,217 @@
++/*
++ * drivers/net/titan_mdio.c - Driver for Titan ethernet ports
++ *
++ * Copyright (C) 2003 PMC-Sierra Inc.
++ * Author : Manish Lachwani (lachwani@pmc-sierra.com)
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
++ *
++ * Management Data IO (MDIO) driver for the Titan GMII. Interacts with the Marvel PHY
++ * on the Titan. No support for the TBI as yet.
++ *
++ */
++
++#include	"titan_mdio.h"
++
++#define MDIO_DEBUG
++
++/*
++ * Local constants
++ */
++#define MAX_CLKA            1023
++#define MAX_PHY_DEV         31
++#define MAX_PHY_REG         31
++#define WRITEADDRS_OPCODE   0x0
++#define	READ_OPCODE	    0x2
++#define WRITE_OPCODE        0x1
++#define MAX_MDIO_POLL       100
++
++/*
++ * Titan MDIO and SCMB registers
++ */
++#define TITAN_GE_SCMB_CONTROL                0x01c0  /* SCMB Control */
++#define TITAN_GE_SCMB_CLKA	             0x01c4  /* SCMB Clock A */
++#define TITAN_GE_MDIO_COMMAND                0x01d0  /* MDIO Command */
++#define TITAN_GE_MDIO_DEVICE_PORT_ADDRESS    0x01d4  /* MDIO Device and Port addrs */
++#define TITAN_GE_MDIO_DATA                   0x01d8  /* MDIO Data */
++#define TITAN_GE_MDIO_INTERRUPTS             0x01dC  /* MDIO Interrupts */
++
++/*
++ * Function to poll the MDIO
++ */
++static int titan_ge_mdio_poll(void)
++{
++	int	i, val;
++
++	for (i = 0; i < MAX_MDIO_POLL; i++) {
++		val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_COMMAND);
++
++		if (!(val & 0x8000))
++			return TITAN_GE_MDIO_GOOD;
++	}
++
++	return TITAN_GE_MDIO_ERROR;
++}
++
++
++/*
++ * Initialize and configure the MDIO
++ */
++int titan_ge_mdio_setup(titan_ge_mdio_config *titan_mdio)
++{
++	unsigned long	val;
++
++	/* Reset the SCMB and program into MDIO mode*/
++	TITAN_GE_MDIO_WRITE(TITAN_GE_SCMB_CONTROL, 0x9000);
++	TITAN_GE_MDIO_WRITE(TITAN_GE_SCMB_CONTROL, 0x1000);
++
++	/* CLK A */
++	val = TITAN_GE_MDIO_READ(TITAN_GE_SCMB_CLKA);
++	val = ( (val & ~(0x03ff)) | (titan_mdio->clka & 0x03ff));
++	TITAN_GE_MDIO_WRITE(TITAN_GE_SCMB_CLKA, val);
++
++	/* Preamble Suppresion */
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_COMMAND);
++	val = ( (val & ~(0x0001)) | (titan_mdio->mdio_spre & 0x0001));
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_COMMAND, val);
++
++	/* MDIO mode */
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_DEVICE_PORT_ADDRESS);
++	val = ( (val & ~(0x4000)) | (titan_mdio->mdio_mode & 0x4000));
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_DEVICE_PORT_ADDRESS, val);
++
++	return TITAN_GE_MDIO_GOOD;
++}
++
++/*
++ * Set the PHY address in indirect mode
++ */
++int titan_ge_mdio_inaddrs(int dev_addr, int reg_addr)
++{
++	volatile unsigned long	val;
++
++	/* Setup the PHY device */
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_DEVICE_PORT_ADDRESS);
++	val = ( (val & ~(0x1f00)) | ( (dev_addr << 8) & 0x1f00));
++	val = ( (val & ~(0x001f)) | ( reg_addr & 0x001f));
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_DEVICE_PORT_ADDRESS, val);
++
++	/* Write the new address */
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_COMMAND);
++	val = ( (val & ~(0x0300)) | ( (WRITEADDRS_OPCODE << 8) & 0x0300));
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_COMMAND, val);
++
++	return TITAN_GE_MDIO_GOOD;
++}
++
++/*
++ * Read the MDIO register. This is what the individual parametes mean:
++ *
++ * dev_addr : PHY ID
++ * reg_addr : register offset
++ *
++ * See the spec for the Titan MAC. We operate in the Direct Mode.
++ */
++
++#define MAX_RETRIES	2
++
++int titan_ge_mdio_read(int dev_addr, int reg_addr, unsigned int *pdata)
++{
++	volatile unsigned long	val;
++	int retries = 0;
++
++	/* Setup the PHY device */
++
++again:
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_DEVICE_PORT_ADDRESS);
++	val = ( (val & ~(0x1f00)) | ( (dev_addr << 8) & 0x1f00));
++	val = ( (val & ~(0x001f)) | ( reg_addr & 0x001f));
++	val |= 0x4000;
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_DEVICE_PORT_ADDRESS, val);
++
++	udelay(30);
++
++	/* Issue the read command */
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_COMMAND);
++	val = ( (val & ~(0x0300)) | ( (READ_OPCODE << 8) & 0x0300));
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_COMMAND, val);
++
++	udelay(30);
++
++	if (titan_ge_mdio_poll() != TITAN_GE_MDIO_GOOD)
++		return TITAN_GE_MDIO_ERROR;
++
++	*pdata = (unsigned int)TITAN_GE_MDIO_READ(TITAN_GE_MDIO_DATA);
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_INTERRUPTS);
++
++	udelay(30);
++
++	if (val & 0x2) {
++		if (retries == MAX_RETRIES)
++			return TITAN_GE_MDIO_ERROR;
++		else {
++			retries++;
++			goto again;
++		}
++	}
++
++	return TITAN_GE_MDIO_GOOD;
++}
++
++/*
++ * Write to the MDIO register
++ *
++ * dev_addr : PHY ID
++ * reg_addr : register that needs to be written to
++ *
++ */
++int titan_ge_mdio_write(int dev_addr, int reg_addr, unsigned int data)
++{
++	volatile unsigned long	val;
++
++	if (titan_ge_mdio_poll() != TITAN_GE_MDIO_GOOD)
++		return TITAN_GE_MDIO_ERROR;
++
++	/* Setup the PHY device */
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_DEVICE_PORT_ADDRESS);
++	val = ( (val & ~(0x1f00)) | ( (dev_addr << 8) & 0x1f00));
++	val = ( (val & ~(0x001f)) | ( reg_addr & 0x001f));
++	val |= 0x4000;
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_DEVICE_PORT_ADDRESS, val);
++
++	udelay(30);
++
++	/* Setup the data to write */
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_DATA, data);
++
++	udelay(30);
++
++	/* Issue the write command */
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_COMMAND);
++	val = ( (val & ~(0x0300)) | ( (WRITE_OPCODE << 8) & 0x0300));
++	TITAN_GE_MDIO_WRITE(TITAN_GE_MDIO_COMMAND, val);
++
++	udelay(30);
++
++	if (titan_ge_mdio_poll() != TITAN_GE_MDIO_GOOD)
++		return TITAN_GE_MDIO_ERROR;
++
++	val = TITAN_GE_MDIO_READ(TITAN_GE_MDIO_INTERRUPTS);
++	if (val & 0x2)
++		return TITAN_GE_MDIO_ERROR;
++
++	return TITAN_GE_MDIO_GOOD;
++}
++
+diff --git a/drivers/net/titan_mdio.h b/drivers/net/titan_mdio.h
+new file mode 100644
+index 0000000..5d23344
+--- /dev/null
++++ b/drivers/net/titan_mdio.h
+@@ -0,0 +1,56 @@
++/*
++ * MDIO used to interact with the PHY when using GMII/MII
++ */
++#ifndef _TITAN_MDIO_H
++#define _TITAN_MDIO_H
++
++#include <linux/netdevice.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++#include "titan_ge.h"
++
++
++#define	TITAN_GE_MDIO_ERROR	(-9000)
++#define	TITAN_GE_MDIO_GOOD	0
++
++#define	TITAN_GE_MDIO_BASE		titan_ge_base
++
++#define	TITAN_GE_MDIO_READ(offset)	\
++	*(volatile u32 *)(titan_ge_base + (offset))
++
++#define	TITAN_GE_MDIO_WRITE(offset, data)	\
++	*(volatile u32 *)(titan_ge_base + (offset)) = (data)
++
++
++/* GMII specific registers */
++#define	TITAN_GE_MARVEL_PHY_ID		0x00
++#define	TITAN_PHY_AUTONEG_ADV		0x04
++#define	TITAN_PHY_LP_ABILITY		0x05
++#define	TITAN_GE_MDIO_MII_CTRL		0x09
++#define	TITAN_GE_MDIO_MII_EXTENDED	0x0f
++#define	TITAN_GE_MDIO_PHY_CTRL		0x10
++#define	TITAN_GE_MDIO_PHY_STATUS	0x11
++#define	TITAN_GE_MDIO_PHY_IE		0x12
++#define	TITAN_GE_MDIO_PHY_IS		0x13
++#define	TITAN_GE_MDIO_PHY_LED		0x18
++#define	TITAN_GE_MDIO_PHY_LED_OVER	0x19
++#define	PHY_ANEG_TIME_WAIT		45	/* 45 seconds wait time */
++
++/*
++ * MDIO Config Structure
++ */
++typedef struct {
++	unsigned int		clka;
++	int			mdio_spre;
++	int			mdio_mode;
++} titan_ge_mdio_config;
++
++/*
++ * Function Prototypes
++ */
++int titan_ge_mdio_setup(titan_ge_mdio_config *);
++int titan_ge_mdio_inaddrs(int, int);
++int titan_ge_mdio_read(int, int, unsigned int *);
++int titan_ge_mdio_write(int, int, unsigned int);
++
++#endif /* _TITAN_MDIO_H */
+diff --git a/drivers/net/wireless/rtl8187.h b/drivers/net/wireless/rtl8187.h
+index 5a9515c..22614bc 100644
+--- a/drivers/net/wireless/rtl8187.h
++++ b/drivers/net/wireless/rtl8187.h
+@@ -91,6 +91,8 @@ enum {
+ struct rtl8187_priv {
+ 	/* common between rtl818x drivers */
+ 	struct rtl818x_csr *map;
++#define REG_BUF_SIZE 64
++	void *reg_buf;
+ 	const struct rtl818x_rf_ops *rf;
+ 	struct ieee80211_vif *vif;
+ 	int mode;
+@@ -129,9 +131,10 @@ static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
+ 
+ 	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
+ 			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
+-			(unsigned long)addr, idx & 0x03, &val,
++			(__u16)addr, idx & 0x03, priv->reg_buf,
+ 			sizeof(val), HZ / 2);
+ 
++	val = *(u8*)priv->reg_buf;
+ 	return val;
+ }
+ 
+@@ -147,9 +150,10 @@ static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
+ 
+ 	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
+ 			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
+-			(unsigned long)addr, idx & 0x03, &val,
++			(unsigned long)addr, idx & 0x03, priv->reg_buf,
+ 			sizeof(val), HZ / 2);
+ 
++	val = *(u16*)priv->reg_buf;
+ 	return le16_to_cpu(val);
+ }
+ 
+@@ -165,9 +169,10 @@ static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
+ 
+ 	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
+ 			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
+-			(unsigned long)addr, idx & 0x03, &val,
++			(unsigned long)addr, idx & 0x03, priv->reg_buf,
+ 			sizeof(val), HZ / 2);
+ 
++	val = *(u32*)priv->reg_buf;
+ 	return le32_to_cpu(val);
+ }
+ 
+@@ -179,9 +184,10 @@ static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
+ static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
+ 					u8 *addr, u8 val, u8 idx)
+ {
++	*(u8*)priv->reg_buf = val;
+ 	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
+ 			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
+-			(unsigned long)addr, idx & 0x03, &val,
++			(unsigned long)addr, idx & 0x03, priv->reg_buf,
+ 			sizeof(val), HZ / 2);
+ }
+ 
+@@ -193,11 +199,11 @@ static inline void rtl818x_iowrite8(struct rtl8187_priv *priv, u8 *addr, u8 val)
+ static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
+ 					 __le16 *addr, u16 val, u8 idx)
+ {
+-	__le16 buf = cpu_to_le16(val);
++	*(__le16 *)priv->reg_buf = cpu_to_le16(val);
+ 
+ 	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
+ 			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
+-			(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
++			(unsigned long)addr, idx & 0x03, priv->reg_buf, sizeof(u16),
+ 			HZ / 2);
+ }
+ 
+@@ -210,11 +216,11 @@ static inline void rtl818x_iowrite16(struct rtl8187_priv *priv, __le16 *addr,
+ static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
+ 					 __le32 *addr, u32 val, u8 idx)
+ {
+-	__le32 buf = cpu_to_le32(val);
++	*(__le32 *)priv->reg_buf = cpu_to_le32(val);
+ 
+ 	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
+ 			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
+-			(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
++			(unsigned long)addr, idx & 0x03, priv->reg_buf, sizeof(u32),
+ 			HZ / 2);
+ }
+ 
+diff --git a/drivers/net/wireless/rtl8187_dev.c b/drivers/net/wireless/rtl8187_dev.c
+index 0cebbc4..58b5447 100644
+--- a/drivers/net/wireless/rtl8187_dev.c
++++ b/drivers/net/wireless/rtl8187_dev.c
+@@ -1037,6 +1037,8 @@ static int __devinit rtl8187_probe(struct usb_interface *intf,
+ 	priv = dev->priv;
+ 	priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
+ 
++	priv->reg_buf = kmalloc(REG_BUF_SIZE, GFP_KERNEL);
++
+ 	SET_IEEE80211_DEV(dev, &intf->dev);
+ 	usb_set_intfdata(intf, dev);
+ 	priv->udev = udev;
+@@ -1231,6 +1233,10 @@ static void __devexit rtl8187_disconnect(struct usb_interface *intf)
+ 	ieee80211_unregister_hw(dev);
+ 
+ 	priv = dev->priv;
++	if(priv->reg_buf) {
++		kfree(priv->reg_buf);
++		priv->reg_buf = NULL;
++	}
+ 	usb_put_dev(interface_to_usbdev(intf));
+ 	ieee80211_free_hw(dev);
+ }
+diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c
+index 9f42cb8..15d6c60 100644
+--- a/drivers/usb/core/driver.c
++++ b/drivers/usb/core/driver.c
+@@ -279,7 +279,12 @@ static int usb_unbind_interface(struct device *dev)
+ 	 * altsetting means creating new endpoint device entries).
+ 	 * When either of these happens, defer the Set-Interface.
+ 	 */
+-	if (!error && intf->dev.power.status == DPM_ON)
++	if (intf->cur_altsetting->desc.bAlternateSetting == 0) {
++		/* Already in altsetting 0 so skip Set-Interface.
++		 * Just re-enable it without affecting the endpoint toggles.
++		 */
++		usb_enable_interface(udev, intf, false);
++	} else if (!error && intf->dev.power.status == DPM_ON)
+ 		usb_set_interface(udev, intf->altsetting[0].
+ 				desc.bInterfaceNumber, 0);
+ 	else
+diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
+index 769f80f..eb6200b 100644
+--- a/drivers/usb/core/hub.c
++++ b/drivers/usb/core/hub.c
+@@ -2302,7 +2302,7 @@ void usb_ep0_reinit(struct usb_device *udev)
+ {
+ 	usb_disable_endpoint(udev, 0 + USB_DIR_IN);
+ 	usb_disable_endpoint(udev, 0 + USB_DIR_OUT);
+-	usb_enable_endpoint(udev, &udev->ep0);
++	usb_enable_endpoint(udev, &udev->ep0, true);
+ }
+ EXPORT_SYMBOL_GPL(usb_ep0_reinit);
+ 
+diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c
+index 9cfa366..b7c5b0c 100644
+--- a/drivers/usb/core/message.c
++++ b/drivers/usb/core/message.c
+@@ -1117,18 +1117,21 @@ void usb_disable_device(struct usb_device *dev, int skip_ep0)
+  * Resets the endpoint toggle, and sets dev->ep_{in,out} pointers.
+  * For control endpoints, both the input and output sides are handled.
+  */
+-void usb_enable_endpoint(struct usb_device *dev, struct usb_host_endpoint *ep)
++void usb_enable_endpoint(struct usb_device *dev, struct usb_host_endpoint *ep,
++				bool reset_toggle)
+ {
+ 	int epnum = usb_endpoint_num(&ep->desc);
+ 	int is_out = usb_endpoint_dir_out(&ep->desc);
+ 	int is_control = usb_endpoint_xfer_control(&ep->desc);
+ 
+ 	if (is_out || is_control) {
+-		usb_settoggle(dev, epnum, 1, 0);
++		if (reset_toggle)
++			usb_settoggle(dev, epnum, 1, 0);
+ 		dev->ep_out[epnum] = ep;
+ 	}
+ 	if (!is_out || is_control) {
+-		usb_settoggle(dev, epnum, 0, 0);
++		if (reset_toggle)
++			usb_settoggle(dev, epnum, 0, 0);
+ 		dev->ep_in[epnum] = ep;
+ 	}
+ 	ep->enabled = 1;
+@@ -1141,14 +1144,14 @@ void usb_enable_endpoint(struct usb_device *dev, struct usb_host_endpoint *ep)
+  *
+  * Enables all the endpoints for the interface's current altsetting.
+  */
+-static void usb_enable_interface(struct usb_device *dev,
+-				 struct usb_interface *intf)
++void usb_enable_interface(struct usb_device *dev,
++				 struct usb_interface *intf, bool reset_toggles)
+ {
+ 	struct usb_host_interface *alt = intf->cur_altsetting;
+ 	int i;
+ 
+ 	for (i = 0; i < alt->desc.bNumEndpoints; ++i)
+-		usb_enable_endpoint(dev, &alt->endpoint[i]);
++		usb_enable_endpoint(dev, &alt->endpoint[i], reset_toggles);
+ }
+ 
+ /**
+@@ -1270,7 +1273,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate)
+ 	 * during the SETUP stage - hence EP0 toggles are "don't care" here.
+ 	 * (Likewise, EP0 never "halts" on well designed devices.)
+ 	 */
+-	usb_enable_interface(dev, iface);
++	usb_enable_interface(dev, iface, true);
+ 	if (device_is_registered(&iface->dev))
+ 		usb_create_sysfs_intf_files(iface);
+ 
+@@ -1345,7 +1348,7 @@ int usb_reset_configuration(struct usb_device *dev)
+ 			alt = &intf->altsetting[0];
+ 
+ 		intf->cur_altsetting = alt;
+-		usb_enable_interface(dev, intf);
++		usb_enable_interface(dev, intf, true);
+ 		if (device_is_registered(&intf->dev))
+ 			usb_create_sysfs_intf_files(intf);
+ 	}
+@@ -1603,7 +1606,7 @@ free_interfaces:
+ 			alt = &intf->altsetting[0];
+ 
+ 		intf->cur_altsetting = alt;
+-		usb_enable_interface(dev, intf);
++		usb_enable_interface(dev, intf, true);
+ 		intf->dev.parent = &dev->dev;
+ 		intf->dev.driver = NULL;
+ 		intf->dev.bus = &usb_bus_type;
+diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
+index be1fa07..956bf1e 100644
+--- a/drivers/usb/core/usb.c
++++ b/drivers/usb/core/usb.c
+@@ -362,7 +362,7 @@ struct usb_device *usb_alloc_dev(struct usb_device *parent,
+ 	dev->ep0.desc.bLength = USB_DT_ENDPOINT_SIZE;
+ 	dev->ep0.desc.bDescriptorType = USB_DT_ENDPOINT;
+ 	/* ep0 maxpacket comes later, from device descriptor */
+-	usb_enable_endpoint(dev, &dev->ep0);
++	usb_enable_endpoint(dev, &dev->ep0, true);
+ 	dev->can_submit = 1;
+ 
+ 	/* Save readable and stable topology id, distinguishing devices
+diff --git a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h
+index 9a1a45a..1d450e9 100644
+--- a/drivers/usb/core/usb.h
++++ b/drivers/usb/core/usb.h
+@@ -10,7 +10,9 @@ extern int usb_create_ep_files(struct device *parent,
+ extern void usb_remove_ep_files(struct usb_host_endpoint *endpoint);
+ 
+ extern void usb_enable_endpoint(struct usb_device *dev,
+-		struct usb_host_endpoint *ep);
++		struct usb_host_endpoint *ep, bool reset_toggle);
++extern void usb_enable_interface(struct usb_device *dev,
++		struct usb_interface *intf, bool reset_toggles);
+ extern void usb_disable_endpoint(struct usb_device *dev, unsigned int epaddr);
+ extern void usb_disable_interface(struct usb_device *dev,
+ 		struct usb_interface *intf);
+diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
+index dc21ade..5abf603 100644
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -15,7 +15,6 @@
+  * along with this program; if not, write to the Free Software Foundation,
+  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+  */
+-
+ #include <linux/module.h>
+ #include <linux/pci.h>
+ #include <linux/dmapool.h>
+diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
+index 740835b..97c4fbf 100644
+--- a/drivers/usb/host/ehci-hub.c
++++ b/drivers/usb/host/ehci-hub.c
+@@ -194,7 +194,22 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
+ 	u32			temp;
+ 	u32			power_okay;
+ 	int			i;
+-
++#ifdef CONFIG_MACH_LM2F
++	struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
++
++	if (pdev->vendor == PCI_VENDOR_ID_AMD && 
++		 pdev->device == PCI_DEVICE_ID_AMD_CS5536_EHC) {
++		u32 tmp;
++		tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
++		ehci_writel(ehci, tmp | 0x1000, &ehci->regs->port_status[0]);
++		tmp = ehci_readl(ehci, &ehci->regs->port_status[1]);
++		ehci_writel(ehci, tmp | 0x1000, &ehci->regs->port_status[1]);
++		tmp = ehci_readl(ehci, &ehci->regs->port_status[2]);
++		ehci_writel(ehci, tmp | 0x1000, &ehci->regs->port_status[2]);
++		tmp = ehci_readl(ehci, &ehci->regs->port_status[3]);
++		ehci_writel(ehci, tmp | 0x1000, &ehci->regs->port_status[3]);
++	}
++#endif
+ 	if (time_before (jiffies, ehci->next_statechange))
+ 		msleep(5);
+ 	spin_lock_irq (&ehci->lock);
+@@ -419,6 +434,20 @@ static int check_reset_complete (
+ 		ehci_dbg (ehci, "port %d full speed --> companion\n",
+ 			index + 1);
+ 
++#if 1
++		{
++			struct pci_dev *pdev;
++
++			pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 
++			if (pdev->vendor == PCI_VENDOR_ID_AMD &&
++				pdev->device == PCI_DEVICE_ID_AMD_CS5536_EHC) {
++					if (index == 3) {
++						printk("8187 speed changed \n");
++						return port_status;
++					}
++			}
++		}
++#endif
+ 		// what happens if HCS_N_CC(params) == 0 ?
+ 		port_status |= PORT_OWNER;
+ 		port_status &= ~PORT_RWC_BITS;
+@@ -507,6 +536,7 @@ ehci_hub_descriptor (
+ ) {
+ 	int		ports = HCS_N_PORTS (ehci->hcs_params);
+ 	u16		temp;
++	struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
+ 
+ 	desc->bDescriptorType = 0x29;
+ 	desc->bPwrOn2PwrGood = 10;	/* ehci 1.0, 2.3.9 says 20ms max */
+@@ -516,6 +546,17 @@ ehci_hub_descriptor (
+ 	temp = 1 + (ports / 8);
+ 	desc->bDescLength = 7 + 2 * temp;
+ 
++#if 1
++	pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 
++	if (pdev->vendor == PCI_VENDOR_ID_AMD &&
++		pdev->device == PCI_DEVICE_ID_AMD_CS5536_EHC) {
++		//set_bit(3, &ehci->companion_ports);
++		//set_bit(0, &ehci->companion_ports); //sd
++		//Not use built in 8187b
++		desc->bNbrPorts = 3;
++	}
++#endif
++
+ 	/* two bitmaps:  ports removable, and usb 1.0 legacy PortPwrCtrlMask */
+ 	memset (&desc->bitmap [0], 0, temp);
+ 	memset (&desc->bitmap [temp], 0xff, temp);
+@@ -551,6 +592,7 @@ static int ehci_hub_control (
+ 	unsigned long	flags;
+ 	int		retval = 0;
+ 	unsigned	selector;
++	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
+ 
+ 	/*
+ 	 * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
+diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c
+index 32bbce9..2ae5684 100644
+--- a/drivers/usb/host/ohci-hub.c
++++ b/drivers/usb/host/ohci-hub.c
+@@ -42,6 +42,10 @@
+ static void dl_done_list (struct ohci_hcd *);
+ static void finish_unlinks (struct ohci_hcd *, u16);
+ 
++#ifdef CONFIG_LEMOTE_2FNOTEBOOK
++//#define __try_to_fix_cs5536_usb__ 
++#endif
++
+ #ifdef	CONFIG_PM
+ static int ohci_rh_suspend (struct ohci_hcd *ohci, int autostop)
+ __releases(ohci->lock)
+@@ -749,6 +753,18 @@ static int ohci_hub_control (
+ 		default:
+ 			goto error;
+ 		}
++#ifdef __try_to_fix_cs5536_usb__
++		{
++			struct pci_dev *pdev =  to_pci_dev(hcd->self.controller);
++
++			if (pdev->vendor == PCI_VENDOR_ID_AMD && 
++				pdev->device == PCI_DEVICE_ID_AMD_CS5536_OHC) {
++					if(wIndex == 0 || wIndex == 3) {
++						break;
++					}
++			}
++		}
++#endif
+ 		ohci_writel (ohci, temp,
+ 				&ohci->regs->roothub.portstatus [wIndex]);
+ 		// ohci_readl (ohci, &ohci->regs->roothub.portstatus [wIndex]);
+@@ -765,6 +781,19 @@ static int ohci_hub_control (
+ 			goto error;
+ 		wIndex--;
+ 		temp = roothub_portstatus (ohci, wIndex);
++#ifdef __try_to_fix_cs5536_usb__
++		{
++			struct pci_dev *pdev =  to_pci_dev(hcd->self.controller);
++
++			if (pdev->vendor == PCI_VENDOR_ID_AMD && 
++				pdev->device == PCI_DEVICE_ID_AMD_CS5536_OHC) {
++					if(wIndex == 0 || wIndex == 3) {
++						temp = 0;
++					}
++			}
++		}
++#endif
++
+ 		put_unaligned_le32(temp, buf);
+ 
+ #ifndef	OHCI_VERBOSE_DEBUG
+@@ -786,6 +815,19 @@ static int ohci_hub_control (
+ 		if (!wIndex || wIndex > ports)
+ 			goto error;
+ 		wIndex--;
++#ifdef __try_to_fix_cs5536_usb__ 
++		{
++			struct pci_dev *pdev =  to_pci_dev(hcd->self.controller);
++
++			if (pdev->vendor == PCI_VENDOR_ID_AMD && 
++				pdev->device == PCI_DEVICE_ID_AMD_CS5536_OHC) {
++					if(wIndex == 0 || wIndex == 3) {
++						break;
++					}
++			}
++		}
++#endif
++
+ 		switch (wValue) {
+ 		case USB_PORT_FEAT_SUSPEND:
+ #ifdef	CONFIG_USB_OTG
+diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
+index a9c2ae3..b691e26 100644
+--- a/drivers/usb/host/ohci-pci.c
++++ b/drivers/usb/host/ohci-pci.c
+@@ -362,6 +362,15 @@ static int __devinit ohci_pci_start (struct usb_hcd *hcd)
+ 	}
+ #endif /* CONFIG_PM */
+ 
++//#ifdef __try_to_fix_cs5536_usb__
++	if (1){
++		struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
++
++		if (pdev->vendor == PCI_VENDOR_ID_AMD && 
++			pdev->device == PCI_DEVICE_ID_AMD_CS5536_OHC)
++				ohci->num_ports = 3;
++	}	
++//#endif
+ 	ret = ohci_run (ohci);
+ 	if (ret < 0) {
+ 		ohci_err (ohci, "can't start\n");
+diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
+index 70d135e..8d23162 100644
+--- a/drivers/video/Kconfig
++++ b/drivers/video/Kconfig
+@@ -1899,6 +1899,38 @@ config FB_S3C2410_DEBUG
+ 	  Turn on debugging messages. Note that you can set/unset at run time
+ 	  through sysfs
+ 
++config FB_SILICONMOTION
++	bool "Silicon Motion Display Support"
++	depends on FB
++	select FB_CFB_COPYAREA
++	select FB_CFB_FILLRECT
++	select FB_CFB_IMAGEBLIT
++	---help---
++	  Frame Buffer driver for the Silicon Motion serial graphic card.
++
++config FB_SM7XX
++	bool "Silicon Motion SM7XX Frame Buffer Support"
++	depends on FB_SILICONMOTION
++	depends on FB
++ 	select FB_CFB_FILLRECT
++ 	select FB_CFB_COPYAREA
++ 	select FB_CFB_IMAGEBLIT
++	---help---
++	  Frame Buffer driver for the Silicon Motion SM7XX serial graphic card.
++
++config FB_SM7XX_ACCEL
++	bool "Siliconmotion Acceleration functions (EXPERIMENTAL)"
++	depends on FB_SM7XX && EXPERIMENTAL
++	---help---
++	This will compile the Trident frame buffer device with
++	acceleration functions.
++
++config FB_SM7XX_DUALHEAD
++	bool "SM7XX dualhead display support"
++	depends on FB_SM7XX
++	---help---
++	  Say Y here if you want to use a secondary head display.
++
+ config FB_SM501
+ 	tristate "Silicon Motion SM501 framebuffer support"
+ 	depends on FB && MFD_SM501
+@@ -2054,4 +2086,15 @@ if FB || SGI_NEWPORT_CONSOLE
+ 	source "drivers/video/logo/Kconfig"
+ endif
+ 
++config FB_SPLASH
++	bool "Support for the framebuffer splash"
++	depends on FRAMEBUFFER_CONSOLE=y && !FB_TILEBLITTING
++	default n
++	---help---
++	  This option enables support for the Linux boot-up splash screen and
++	  graphical backgrounds on consoles. Note that you will need userspace
++	  splash utilities in order to take advantage of these features. Refer 
++	  to Documentation/fb/splash.txt for more information.
++
++	  If unsure, say N.
+ endmenu
+diff --git a/drivers/video/Makefile b/drivers/video/Makefile
+index a6b5529..8ef2d31 100644
+--- a/drivers/video/Makefile
++++ b/drivers/video/Makefile
+@@ -14,6 +14,7 @@ fb-objs                           := $(fb-y)
+ obj-$(CONFIG_VT)		  += console/
+ obj-$(CONFIG_LOGO)		  += logo/
+ obj-y				  += backlight/ display/
++obj-$(CONFIG_FB_SPLASH) 	   += fbsplash.o cfbsplash.o
+ 
+ obj-$(CONFIG_FB_CFB_FILLRECT)  += cfbfillrect.o
+ obj-$(CONFIG_FB_CFB_COPYAREA)  += cfbcopyarea.o
+@@ -71,6 +72,7 @@ obj-$(CONFIG_FB_P9100)            += p9100.o sbuslib.o
+ obj-$(CONFIG_FB_TCX)              += tcx.o sbuslib.o
+ obj-$(CONFIG_FB_LEO)              += leo.o sbuslib.o
+ obj-$(CONFIG_FB_SGIVW)            += sgivwfb.o
++obj-$(CONFIG_FB_SILICONMOTION)	  += smi/
+ obj-$(CONFIG_FB_ACORN)            += acornfb.o
+ obj-$(CONFIG_FB_ATARI)            += atafb.o c2p.o atafb_mfb.o \
+                                      atafb_iplan2p2.o atafb_iplan2p4.o atafb_iplan2p8.o
+diff --git a/drivers/video/cfbsplash.c b/drivers/video/cfbsplash.c
+new file mode 100644
+index 0000000..a0b4d0d
+--- /dev/null
++++ b/drivers/video/cfbsplash.c
+@@ -0,0 +1,471 @@
++/*
++ *  linux/drivers/video/cfbsplash.c -- Framebuffer splash render functions
++ *  
++ *  Copyright (C) 2004 Michal Januszewski <spock@gentoo.org>
++ *
++ *  Code based upon "Bootsplash" (C) 2001-2003 
++ *       Volker Poplawski <volker@poplawski.de>,
++ *       Stefan Reinauer <stepan@suse.de>,
++ *       Steffen Winterfeldt <snwint@suse.de>,
++ *       Michael Schroeder <mls@suse.de>,
++ *       Ken Wimer <wimer@suse.de>.
++ *
++ *  This file is subject to the terms and conditions of the GNU General Public
++ *  License.  See the file COPYING in the main directory of this archive for
++ *  more details.
++ */ 
++#include <linux/module.h>
++#include <linux/types.h>
++#include <linux/fb.h>
++#include <linux/selection.h>
++#include <linux/vt_kern.h>
++#include <asm/irq.h>
++#include <asm/system.h>
++
++#include "console/fbcon.h"
++#include "fbsplash.h"
++
++#define parse_pixel(shift,bpp,type)						\
++	do {									\
++		if (d & (0x80 >> (shift)))					\
++			dd2[(shift)] = fgx;					\
++		else								\
++			dd2[(shift)] = transparent ? *(type *)splash_src : bgx;	\
++		splash_src += (bpp);						\
++	} while (0)								\
++
++extern int get_color(struct vc_data *vc, struct fb_info *info,
++		     u16 c, int is_fg);
++
++void fbsplash_fix_pseudo_pal(struct fb_info *info, struct vc_data *vc)
++{
++	int i, j, k;
++	int minlen = min(min(info->var.red.length, info->var.green.length), 
++			     info->var.blue.length);
++	u32 col;
++	
++	for (j = i = 0; i < 16; i++) {
++		k = color_table[i];
++                      
++		col = ((vc->vc_palette[j++]  >> (8-minlen)) 
++			<< info->var.red.offset);
++		col |= ((vc->vc_palette[j++] >> (8-minlen)) 
++			<< info->var.green.offset);
++		col |= ((vc->vc_palette[j++] >> (8-minlen)) 
++			<< info->var.blue.offset);
++			((u32 *)info->pseudo_palette)[k] = col;
++	}
++}
++				
++void fbsplash_renderc(struct fb_info *info, int ypos, int xpos, int height, 
++		      int width, u8* src, u32 fgx, u32 bgx, u8 transparent)
++{	
++	unsigned int x, y;
++	u32 dd;
++	int bytespp = ((info->var.bits_per_pixel + 7) >> 3);
++	unsigned int d = ypos * info->fix.line_length + xpos * bytespp;
++	unsigned int ds = (ypos * info->var.xres + xpos) * bytespp;
++	u16 dd2[4];
++
++	u8* splash_src = (u8 *)(info->splash.data + ds);
++	u8* dst = (u8 *)(info->screen_base + d);
++
++	if ((ypos + height) > info->var.yres || (xpos + width) > info->var.xres)
++		return;
++	
++	for (y = 0; y < height; y++) {
++		switch (info->var.bits_per_pixel) {
++	
++		case 32:
++			for (x = 0; x < width; x++) {
++
++				if ((x & 7) == 0)
++					d = *src++;
++				if (d & 0x80)
++					dd = fgx;
++				else
++					dd = transparent ? 
++					     *(u32 *)splash_src : bgx;
++				
++				d <<= 1;
++				splash_src += 4;
++				fb_writel(dd, dst);
++				dst += 4;
++			}
++			break;
++		case 24:
++			for (x = 0; x < width; x++) {
++
++				if ((x & 7) == 0)
++					d = *src++;
++				if (d & 0x80)
++					dd = fgx;
++				else
++					dd = transparent ? 
++					     (*(u32 *)splash_src & 0xffffff) : bgx;
++				
++				d <<= 1;
++				splash_src += 3;
++#ifdef __LITTLE_ENDIAN
++				fb_writew(dd & 0xffff, dst);
++				dst += 2;
++				fb_writeb((dd >> 16), dst);
++#else
++				fb_writew(dd >> 8, dst);
++				dst += 2;
++				fb_writeb(dd & 0xff, dst);
++#endif
++				dst++;
++			}
++			break;
++		case 16:
++			for (x = 0; x < width; x += 2) {
++		    		if ((x & 7) == 0)
++					d = *src++;
++
++				parse_pixel(0, 2, u16);
++				parse_pixel(1, 2, u16);
++#ifdef __LITTLE_ENDIAN
++				dd = dd2[0] | (dd2[1] << 16);
++#else
++				dd = dd2[1] | (dd2[0] << 16);
++#endif
++				d <<= 2;
++				fb_writel(dd, dst);
++				dst += 4;
++			}
++			break;
++
++		case 8:
++			for (x = 0; x < width; x += 4) {
++				if ((x & 7) == 0)
++					d = *src++;
++	
++				parse_pixel(0, 1, u8);
++				parse_pixel(1, 1, u8);
++				parse_pixel(2, 1, u8);
++				parse_pixel(3, 1, u8);
++		
++#ifdef __LITTLE_ENDIAN
++				dd = dd2[0] | (dd2[1] << 8) | (dd2[2] << 16) | (dd2[3] << 24);
++#else
++				dd = dd2[3] | (dd2[2] << 8) | (dd2[1] << 16) | (dd2[0] << 24);
++#endif
++				d <<= 4;
++				fb_writel(dd, dst);
++				dst += 4;
++			}		
++		}
++
++		dst += info->fix.line_length - width * bytespp;
++		splash_src += (info->var.xres - width) * bytespp;
++    	}
++}
++
++#define cc2cx(a) 						\
++	((info->fix.visual == FB_VISUAL_TRUECOLOR || 		\
++	  info->fix.visual == FB_VISUAL_DIRECTCOLOR) ? 		\
++	 ((u32*)info->pseudo_palette)[a] : a)
++
++void fbsplash_putcs(struct vc_data *vc, struct fb_info *info,
++		   const unsigned short *s, int count, int yy, int xx)
++{
++	unsigned short charmask = vc->vc_hi_font_mask ? 0x1ff : 0xff;
++	struct fbcon_ops *ops = info->fbcon_par;
++	int fg_color, bg_color, transparent;
++	u8 *src;
++	u32 bgx, fgx;
++	u16 c = scr_readw(s);
++
++	fg_color = get_color(vc, info, c, 1);
++        bg_color = get_color(vc, info, c, 0);
++	
++	/* Don't paint the background image if console is blanked */
++	transparent = ops->blank_state ? 0 : 
++		(vc->vc_splash.bg_color == bg_color);
++
++	xx = xx * vc->vc_font.width + vc->vc_splash.tx;
++	yy = yy * vc->vc_font.height + vc->vc_splash.ty;
++
++	fgx = cc2cx(fg_color);
++	bgx = cc2cx(bg_color);
++
++	while (count--) {
++		c = scr_readw(s++);
++		src = vc->vc_font.data + (c & charmask) * vc->vc_font.height *
++		      ((vc->vc_font.width + 7) >> 3);
++
++		fbsplash_renderc(info, yy, xx, vc->vc_font.height, 
++			       vc->vc_font.width, src, fgx, bgx, transparent);
++		xx += vc->vc_font.width;
++	}
++}
++
++void fbsplash_cursor(struct fb_info *info, struct fb_cursor *cursor)
++{
++	int i;
++	unsigned int dsize, s_pitch;
++	struct fbcon_ops *ops = info->fbcon_par;
++	struct vc_data* vc;	
++	u8 *src;
++
++	/* we really don't need any cursors while the console is blanked */
++	if (info->state != FBINFO_STATE_RUNNING || ops->blank_state)
++		return;
++
++	vc = vc_cons[ops->currcon].d;
++
++	src = kmalloc(64 + sizeof(struct fb_image), GFP_ATOMIC);
++	if (!src)
++		return;
++
++	s_pitch = (cursor->image.width + 7) >> 3;
++	dsize = s_pitch * cursor->image.height;
++	if (cursor->enable) {	
++		switch (cursor->rop) {
++		case ROP_XOR:
++			for (i = 0; i < dsize; i++)
++				src[i] = cursor->image.data[i] ^ cursor->mask[i];
++                        break;
++		case ROP_COPY:
++		default:
++			for (i = 0; i < dsize; i++)
++				src[i] = cursor->image.data[i] & cursor->mask[i];
++			break;
++		}
++	} else
++		memcpy(src, cursor->image.data, dsize);
++
++	fbsplash_renderc(info,
++			cursor->image.dy + vc->vc_splash.ty,
++			cursor->image.dx + vc->vc_splash.tx,
++			cursor->image.height,
++			cursor->image.width,
++			(u8*)src,
++			cc2cx(cursor->image.fg_color),
++			cc2cx(cursor->image.bg_color),
++			cursor->image.bg_color == vc->vc_splash.bg_color);
++
++	kfree(src);
++}
++
++static void splashset(u8 *dst, int height, int width, int dstbytes, 
++		        u32 bgx, int bpp)
++{
++	int i;
++	
++	if (bpp == 8)
++		bgx |= bgx << 8;
++	if (bpp == 16 || bpp == 8)
++		bgx |= bgx << 16;
++	
++	while (height-- > 0) {
++		u8 *p = dst;
++		
++		switch (bpp) {
++		
++		case 32:
++			for (i=0; i < width; i++) {
++				fb_writel(bgx, p); p += 4;
++			}
++			break;
++		case 24:	
++			for (i=0; i < width; i++) {
++#ifdef __LITTLE_ENDIAN
++				fb_writew((bgx & 0xffff),(u16*)p); p += 2;
++				fb_writeb((bgx >> 16),p++);
++#else
++				fb_writew((bgx >> 8),(u16*)p); p += 2;
++				fb_writeb((bgx & 0xff),p++);
++#endif
++			}
++		case 16:
++			for (i=0; i < width/4; i++) {
++				fb_writel(bgx,p); p += 4;
++				fb_writel(bgx,p); p += 4;
++			}
++			if (width & 2) {
++				fb_writel(bgx,p); p += 4;
++			}
++			if (width & 1)
++				fb_writew(bgx,(u16*)p);
++			break;
++		case 8:
++			for (i=0; i < width/4; i++) {
++				fb_writel(bgx,p); p += 4;
++			}
++			
++			if (width & 2) {
++				fb_writew(bgx,p); p += 2;
++			}
++			if (width & 1)
++				fb_writeb(bgx,(u8*)p);
++			break;
++
++		}		
++		dst += dstbytes;
++	}
++}
++
++void fbsplash_copy(u8 *dst, u8 *src, int height, int width, int linebytes, 
++		   int srclinebytes, int bpp)
++{
++	int i;
++
++	while (height-- > 0) {
++		u32 *p = (u32 *)dst;
++		u32 *q = (u32 *)src;
++
++		switch (bpp) {
++	
++		case 32:
++			for (i=0; i < width; i++)
++				fb_writel(*q++, p++);
++			break;	
++		case 24:	
++			for (i=0; i < (width*3/4); i++)
++				fb_writel(*q++, p++);
++			if ((width*3) % 4) {
++				if (width & 2) {
++					fb_writeb(*(u8*)q, (u8*)p);
++				} else if (width & 1) {
++					fb_writew(*(u16*)q, (u16*)p);
++					fb_writeb(*(u8*)((u16*)q+1),(u8*)((u16*)p+2));
++				}
++			}
++			break;
++		case 16:
++			for (i=0; i < width/4; i++) {
++				fb_writel(*q++, p++);
++				fb_writel(*q++, p++);
++			}
++			if (width & 2)
++				fb_writel(*q++, p++);
++			if (width & 1)
++				fb_writew(*(u16*)q, (u16*)p);
++			break;
++		case 8:
++			for (i=0; i < width/4; i++) 
++				fb_writel(*q++, p++);
++				
++			if (width & 2) {
++				fb_writew(*(u16*)q, (u16*)p); 
++				q = (u32*) ((u16*)q + 1);
++				p = (u32*) ((u16*)p + 1);
++			}
++			if (width & 1)
++				fb_writeb(*(u8*)q, (u8*)p);
++			break;
++		}
++
++		dst += linebytes;
++		src += srclinebytes;
++	}
++}
++
++static void splashfill(struct fb_info *info, int sy, int sx, int height, 
++		       int width) 
++{
++	int bytespp = ((info->var.bits_per_pixel + 7) >> 3);
++	int d  = sy * info->fix.line_length + sx * bytespp;
++	int ds = (sy * info->var.xres + sx) * bytespp;
++
++	fbsplash_copy((u8 *)(info->screen_base + d), (u8 *)(info->splash.data + ds),
++		    height, width, info->fix.line_length, info->var.xres * bytespp,
++		    info->var.bits_per_pixel);
++}
++
++void fbsplash_clear(struct vc_data *vc, struct fb_info *info, int sy, int sx, 
++		    int height, int width)
++{
++	int bgshift = (vc->vc_hi_font_mask) ? 13 : 12;
++	int bg_color = attr_bgcol_ec(bgshift, vc, info);
++	int transparent = vc->vc_splash.bg_color == bg_color;
++	struct fbcon_ops *ops = info->fbcon_par;
++	u8 *dst;
++
++	sy = sy * vc->vc_font.height + vc->vc_splash.ty;
++	sx = sx * vc->vc_font.width + vc->vc_splash.tx;
++	height *= vc->vc_font.height;
++	width *= vc->vc_font.width;
++
++	/* Don't paint the background image if console is blanked */
++	if (transparent && !ops->blank_state) {
++		splashfill(info, sy, sx, height, width);
++	} else {
++		dst = (u8 *)(info->screen_base + sy * info->fix.line_length + 
++			     sx * ((info->var.bits_per_pixel + 7) >> 3));
++		splashset(dst, height, width, info->fix.line_length, cc2cx(bg_color), 
++			  info->var.bits_per_pixel);
++	}
++}
++
++void fbsplash_clear_margins(struct vc_data *vc, struct fb_info *info, 
++			    int bottom_only)
++{
++	unsigned int tw = vc->vc_cols*vc->vc_font.width;
++	unsigned int th = vc->vc_rows*vc->vc_font.height;
++
++	if (!bottom_only) {
++		/* top margin */
++		splashfill(info, 0, 0, vc->vc_splash.ty, info->var.xres);
++		/* left margin */
++		splashfill(info, vc->vc_splash.ty, 0, th, vc->vc_splash.tx);
++		/* right margin */
++		splashfill(info, vc->vc_splash.ty, vc->vc_splash.tx + tw, th, 
++			   info->var.xres - vc->vc_splash.tx - tw);
++	}
++	splashfill(info, vc->vc_splash.ty + th, 0, 
++		   info->var.yres - vc->vc_splash.ty - th, info->var.xres);
++}
++
++void fbsplash_bmove_redraw(struct vc_data *vc, struct fb_info *info, int y, 
++			   int sx, int dx, int width)
++{
++	u16 *d = (u16 *) (vc->vc_origin + vc->vc_size_row * y + dx * 2);
++	u16 *s = d + (dx - sx);
++	u16 *start = d;
++	u16 *ls = d;
++	u16 *le = d + width;
++	u16 c;
++	int x = dx;
++	u16 attr = 1;
++
++	do {
++		c = scr_readw(d);
++		if (attr != (c & 0xff00)) {
++			attr = c & 0xff00;
++			if (d > start) {
++				fbsplash_putcs(vc, info, start, d - start, y, x);
++				x += d - start;
++				start = d;
++			}
++		}
++		if (s >= ls && s < le && c == scr_readw(s)) {
++			if (d > start) {
++				fbsplash_putcs(vc, info, start, d - start, y, x);
++				x += d - start + 1;
++				start = d + 1;
++			} else {
++				x++;
++				start++;
++			}
++		}
++		s++;
++		d++;
++	} while (d < le);
++	if (d > start)
++		fbsplash_putcs(vc, info, start, d - start, y, x);
++}
++
++void fbsplash_blank(struct vc_data *vc, struct fb_info *info, int blank)
++{
++	if (blank) {
++		splashset((u8 *)info->screen_base, info->var.yres, info->var.xres,
++			  info->fix.line_length, 0, info->var.bits_per_pixel);
++	} else {
++		update_screen(vc);
++		fbsplash_clear_margins(vc, info, 0);
++	}
++}
++
+diff --git a/drivers/video/console/bitblit.c b/drivers/video/console/bitblit.c
+index 69864b1..5aadd01 100644
+--- a/drivers/video/console/bitblit.c
++++ b/drivers/video/console/bitblit.c
+@@ -17,6 +17,7 @@
+ #include <linux/console.h>
+ #include <asm/types.h>
+ #include "fbcon.h"
++#include "../fbsplash.h"
+ 
+ /*
+  * Accelerated handlers.
+@@ -54,6 +55,13 @@ static void bit_bmove(struct vc_data *vc, struct fb_info *info, int sy,
+ 	area.height = height * vc->vc_font.height;
+ 	area.width = width * vc->vc_font.width;
+ 
++	if (fbsplash_active(info, vc)) {
++ 		area.sx += vc->vc_splash.tx;
++ 		area.sy += vc->vc_splash.ty;
++ 		area.dx += vc->vc_splash.tx;
++ 		area.dy += vc->vc_splash.ty;
++ 	}
++
+ 	info->fbops->fb_copyarea(info, &area);
+ }
+ 
+@@ -379,11 +387,15 @@ static void bit_cursor(struct vc_data *vc, struct fb_info *info, int mode,
+ 	cursor.image.depth = 1;
+ 	cursor.rop = ROP_XOR;
+ 
+-	if (info->fbops->fb_cursor)
+-		err = info->fbops->fb_cursor(info, &cursor);
++	if (fbsplash_active(info, vc)) {
++		fbsplash_cursor(info, &cursor);
++	} else {
++		if (info->fbops->fb_cursor)
++			err = info->fbops->fb_cursor(info, &cursor);
+ 
+-	if (err)
+-		soft_cursor(info, &cursor);
++		if (err)
++			soft_cursor(info, &cursor);
++	}
+ 
+ 	ops->cursor_reset = 0;
+ }
+diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
+index 038ea62..45a0669 100644
+--- a/drivers/video/console/fbcon.c
++++ b/drivers/video/console/fbcon.c
+@@ -90,6 +90,7 @@
+ #endif
+ 
+ #include "fbcon.h"
++#include "../fbsplash.h"
+ 
+ #ifdef FBCONDEBUG
+ #  define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
+@@ -105,7 +106,7 @@ enum {
+ 
+ static struct display fb_display[MAX_NR_CONSOLES];
+ 
+-static signed char con2fb_map[MAX_NR_CONSOLES];
++signed char con2fb_map[MAX_NR_CONSOLES];
+ static signed char con2fb_map_boot[MAX_NR_CONSOLES];
+ 
+ static int logo_lines;
+@@ -313,7 +314,7 @@ static inline int fbcon_is_inactive(struct vc_data *vc, struct fb_info *info)
+ 		vc->vc_mode != KD_TEXT || ops->graphics);
+ }
+ 
+-static inline int get_color(struct vc_data *vc, struct fb_info *info,
++inline int get_color(struct vc_data *vc, struct fb_info *info,
+ 	      u16 c, int is_fg)
+ {
+ 	int depth = fb_get_color_depth(&info->var, &info->fix);
+@@ -418,6 +419,7 @@ static void fb_flashcursor(struct work_struct *work)
+ 		CM_ERASE : CM_DRAW;
+ 	ops->cursor(vc, info, mode, softback_lines, get_color(vc, info, c, 1),
+ 		    get_color(vc, info, c, 0));
++	
+ 	release_console_sem();
+ }
+ 
+@@ -588,6 +590,8 @@ static int fbcon_takeover(int show_logo)
+ 		info_idx = -1;
+ 	}
+ 
++	fbsplash_init();
++
+ 	return err;
+ }
+ 
+@@ -1029,6 +1033,12 @@ static const char *fbcon_startup(void)
+ 	rows = FBCON_SWAP(ops->rotate, info->var.yres, info->var.xres);
+ 	cols /= vc->vc_font.width;
+ 	rows /= vc->vc_font.height;
++
++	if (fbsplash_active(info, vc)) {
++		cols = vc->vc_splash.twidth / vc->vc_font.width;
++		rows = vc->vc_splash.theight / vc->vc_font.height;
++	}
++
+ 	vc_resize(vc, cols, rows);
+ 
+ 	DPRINTK("mode:   %s\n", info->fix.id);
+@@ -1112,7 +1122,7 @@ static void fbcon_init(struct vc_data *vc, int init)
+ 	cap = info->flags;
+ 
+ 	if (vc != svc || logo_shown == FBCON_LOGO_DONTSHOW ||
+-	    (info->fix.type == FB_TYPE_TEXT))
++	    (info->fix.type == FB_TYPE_TEXT) || fbsplash_active(info, vc))
+ 		logo = 0;
+ 
+ 	if (var_to_display(p, &info->var, info))
+@@ -1314,6 +1324,11 @@ static void fbcon_clear(struct vc_data *vc, int sy, int sx, int height,
+ 	if (sy < vc->vc_top && vc->vc_top == logo_lines)
+ 		vc->vc_top = 0;
+ 
++ 	if (fbsplash_active(info, vc)) {
++ 		fbsplash_clear(vc, info, sy, sx, height, width);
++ 		return;
++ 	}
++ 	
+ 	/* Split blits that cross physical y_wrap boundary */
+ 
+ 	y_break = p->vrows - p->yscroll;
+@@ -1333,10 +1348,15 @@ static void fbcon_putcs(struct vc_data *vc, const unsigned short *s,
+ 	struct display *p = &fb_display[vc->vc_num];
+ 	struct fbcon_ops *ops = info->fbcon_par;
+ 
+-	if (!fbcon_is_inactive(vc, info))
+-		ops->putcs(vc, info, s, count, real_y(p, ypos), xpos,
+-			   get_color(vc, info, scr_readw(s), 1),
+-			   get_color(vc, info, scr_readw(s), 0));
++	if (!fbcon_is_inactive(vc, info)) {
++		
++		if (fbsplash_active(info, vc))
++			fbsplash_putcs(vc, info, s, count, ypos, xpos);
++		else
++			ops->putcs(vc, info, s, count, real_y(p, ypos), xpos,
++				   get_color(vc, info, scr_readw(s), 1),
++				   get_color(vc, info, scr_readw(s), 0));
++	}
+ }
+ 
+ static void fbcon_putc(struct vc_data *vc, int c, int ypos, int xpos)
+@@ -1352,8 +1372,13 @@ static void fbcon_clear_margins(struct vc_data *vc, int bottom_only)
+ 	struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]];
+ 	struct fbcon_ops *ops = info->fbcon_par;
+ 
+-	if (!fbcon_is_inactive(vc, info))
+-		ops->clear_margins(vc, info, bottom_only);
++	if (!fbcon_is_inactive(vc, info)) {
++	 	if (fbsplash_active(info, vc)) {
++	 		fbsplash_clear_margins(vc, info, bottom_only);
++ 		} else {
++			ops->clear_margins(vc, info, bottom_only);
++		}
++	}
+ }
+ 
+ static void fbcon_cursor(struct vc_data *vc, int mode)
+@@ -1880,7 +1905,7 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir,
+ 			count = vc->vc_rows;
+ 		if (softback_top)
+ 			fbcon_softback_note(vc, t, count);
+-		if (logo_shown >= 0)
++		if (logo_shown >= 0 || fbsplash_active(info, vc))
+ 			goto redraw_up;
+ 		switch (p->scrollmode) {
+ 		case SCROLL_MOVE:
+@@ -1974,6 +1999,8 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir,
+ 			count = vc->vc_rows;
+ 		if (logo_shown >= 0)
+ 			goto redraw_down;
++		if (fbsplash_active(info, vc))
++			goto redraw_down;
+ 		switch (p->scrollmode) {
+ 		case SCROLL_MOVE:
+ 			fbcon_redraw_blit(vc, info, p, b - 1, b - t - count,
+@@ -2125,6 +2152,13 @@ static void fbcon_bmove_rec(struct vc_data *vc, struct display *p, int sy, int s
+ 		}
+ 		return;
+ 	}
++
++	if (fbsplash_active(info, vc) && sy == dy && height == 1) {
++ 		/* must use slower redraw bmove to keep background pic intact */
++ 		fbsplash_bmove_redraw(vc, info, sy, sx, dx, width);
++ 		return;
++ 	}
++	
+ 	ops->bmove(vc, info, real_y(p, sy), sx, real_y(p, dy), dx,
+ 		   height, width);
+ }
+@@ -2195,8 +2229,9 @@ static int fbcon_resize(struct vc_data *vc, unsigned int width,
+ 	var.yres = virt_h * virt_fh;
+ 	x_diff = info->var.xres - var.xres;
+ 	y_diff = info->var.yres - var.yres;
+-	if (x_diff < 0 || x_diff > virt_fw ||
+-	    y_diff < 0 || y_diff > virt_fh) {
++ 
++ 	if ((x_diff < 0 || x_diff > virt_fw ||
++ 	    y_diff < 0 || y_diff > virt_fh) && !vc->vc_splash.state) {
+ 		const struct fb_videomode *mode;
+ 
+ 		DPRINTK("attempting resize %ix%i\n", var.xres, var.yres);
+@@ -2232,6 +2267,25 @@ static int fbcon_switch(struct vc_data *vc)
+ 
+ 	info = registered_fb[con2fb_map[vc->vc_num]];
+ 	ops = info->fbcon_par;
++	prev_console = ops->currcon;
++	if (prev_console != -1)
++		old_info = registered_fb[con2fb_map[prev_console]];
++
++	if (fbsplash_active_vc(vc)) {
++		struct vc_data *vc_curr = vc_cons[prev_console].d;
++		if (!vc_curr->vc_splash.theme || strcmp(vc->vc_splash.theme, vc_curr->vc_splash.theme)) {
++			if (fbsplash_call_helper("getpic", vc->vc_num))
++				fbsplash_disable(vc, 0);
++		}
++	} else if (info->fix.visual == FB_VISUAL_DIRECTCOLOR) { 
++		struct vc_data *vc_curr = vc_cons[prev_console].d;
++		if (vc_curr && fbsplash_active_vc(vc_curr)) {
++			/* Clear the screen to avoid displaying funky colors during
++			 * palette updates. */ 
++			memset((u8*)info->screen_base + info->fix.line_length * info->var.yoffset,
++			       0, info->var.yres * info->fix.line_length);
++		}
++	}
+ 
+ 	if (softback_top) {
+ 		if (softback_lines)
+@@ -2250,9 +2304,6 @@ static int fbcon_switch(struct vc_data *vc)
+ 		logo_shown = FBCON_LOGO_CANSHOW;
+ 	}
+ 
+-	prev_console = ops->currcon;
+-	if (prev_console != -1)
+-		old_info = registered_fb[con2fb_map[prev_console]];
+ 	/*
+ 	 * FIXME: If we have multiple fbdev's loaded, we need to
+ 	 * update all info->currcon.  Perhaps, we can place this
+@@ -2289,6 +2340,11 @@ static int fbcon_switch(struct vc_data *vc)
+ 		if (old_info != info)
+ 			fbcon_del_cursor_timer(old_info);
+ 	}
++	
++	if (fbsplash_active_nores(info, vc) && !fbsplash_active(info, vc)) {
++		if (fbsplash_call_helper("modechange", vc->vc_num))
++			fbsplash_disable(vc, 0);
++	}
+ 
+ 	if (fbcon_is_inactive(vc, info) ||
+ 	    ops->blank_state != FB_BLANK_UNBLANK)
+@@ -2409,7 +2465,12 @@ static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch)
+ 			if (info->fbops->fb_blank)
+ 				ret = info->fbops->fb_blank(blank, info);
+ 			if (ret)
+-				fbcon_generic_blank(vc, info, blank);
++			{
++ 				if (fbsplash_active(info, vc))
++ 					fbsplash_blank(vc, info, blank);
++ 				else 
++ 					fbcon_generic_blank(vc, info, blank);
++			}
+ 		}
+ 
+ 		if (!blank)
+@@ -2568,13 +2629,22 @@ static int fbcon_do_set_font(struct vc_data *vc, int w, int h,
+ 	}
+ 
+ 	if (resize) {
++		/* reset wrap/pan */
+ 		int cols, rows;
+ 
+ 		cols = FBCON_SWAP(ops->rotate, info->var.xres, info->var.yres);
+ 		rows = FBCON_SWAP(ops->rotate, info->var.yres, info->var.xres);
++
++ 		info->var.xoffset = info->var.yoffset = p->yscroll = 0;
++		if (fbsplash_active(info, vc)) {
++			cols = vc->vc_splash.twidth;
++			rows = vc->vc_splash.theight;
++		}
+ 		cols /= w;
+ 		rows /= h;
++
+ 		vc_resize(vc, cols, rows);
++
+ 		if (CON_IS_VISIBLE(vc) && softback_buf)
+ 			fbcon_update_softback(vc);
+ 	} else if (CON_IS_VISIBLE(vc)
+@@ -2703,7 +2773,7 @@ static int fbcon_set_palette(struct vc_data *vc, unsigned char *table)
+ 	int i, j, k, depth;
+ 	u8 val;
+ 
+-	if (fbcon_is_inactive(vc, info))
++	if (fbcon_is_inactive(vc, info) || vc->vc_num != fg_console)
+ 		return -EINVAL;
+ 
+ 	if (!CON_IS_VISIBLE(vc))
+@@ -2729,7 +2799,49 @@ static int fbcon_set_palette(struct vc_data *vc, unsigned char *table)
+ 	} else
+ 		fb_copy_cmap(fb_default_cmap(1 << depth), &palette_cmap);
+ 
+-	return fb_set_cmap(&palette_cmap, info);
++	if (fbsplash_active(info, vc_cons[fg_console].d) &&
++	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
++
++		u16 *red, *green, *blue;
++		int minlen = min(min(info->var.red.length, info->var.green.length), 
++				     info->var.blue.length);
++		int h;
++
++		struct fb_cmap cmap = {
++			.start = 0,
++			.len = (1 << minlen),
++			.red = NULL,
++			.green = NULL,
++			.blue = NULL,
++			.transp = NULL
++		};
++
++		red = kmalloc(256 * sizeof(u16) * 3, GFP_KERNEL);
++	
++		if (!red)
++			goto out;		
++	
++		green = red + 256;
++		blue = green + 256;
++		cmap.red = red;
++		cmap.green = green;
++		cmap.blue = blue;
++		
++		for (i = 0; i < cmap.len; i++) {
++			red[i] = green[i] = blue[i] = (0xffff * i)/(cmap.len-1);
++		}
++
++		h = fb_set_cmap(&cmap, info);
++		fbsplash_fix_pseudo_pal(info, vc_cons[fg_console].d);
++		kfree(red);
++		
++		return h;
++		
++	} else if (fbsplash_active(info, vc_cons[fg_console].d) && 
++		   info->var.bits_per_pixel == 8 && info->splash.cmap.red != NULL) 
++		fb_set_cmap(&info->splash.cmap, info);
++		
++out:	return fb_set_cmap(&palette_cmap, info);
+ }
+ 
+ static u16 *fbcon_screen_pos(struct vc_data *vc, int offset)
+@@ -2955,7 +3067,14 @@ static void fbcon_modechanged(struct fb_info *info)
+ 		rows = FBCON_SWAP(ops->rotate, info->var.yres, info->var.xres);
+ 		cols /= vc->vc_font.width;
+ 		rows /= vc->vc_font.height;
+-		vc_resize(vc, cols, rows);
++				
++		if (!fbsplash_active_nores(info, vc)) {
++			vc_resize(vc, cols, rows);
++		} else {
++			if (fbsplash_call_helper("modechange", vc->vc_num))
++				fbsplash_disable(vc, 0);
++		}
++
+ 		updatescrollmode(p, info, vc);
+ 		scrollback_max = 0;
+ 		scrollback_current = 0;
+@@ -3583,6 +3702,7 @@ static void fbcon_exit(void)
+ 		}
+ 	}
+ 
++	fbsplash_exit();
+ 	fbcon_has_exited = 1;
+ }
+ 
+diff --git a/drivers/video/fbcmap.c b/drivers/video/fbcmap.c
+index 91b78e6..0a37cda 100644
+--- a/drivers/video/fbcmap.c
++++ b/drivers/video/fbcmap.c
+@@ -16,6 +16,7 @@
+ #include <linux/fb.h>
+ #include <linux/slab.h>
+ #include <linux/uaccess.h>
++#include "fbsplash.h"
+ 
+ static u16 red2[] __read_mostly = {
+     0x0000, 0xaaaa
+@@ -234,14 +235,17 @@ int fb_set_cmap(struct fb_cmap *cmap, struct fb_info *info)
+ 			if (transp)
+ 				htransp = *transp++;
+ 			if (info->fbops->fb_setcolreg(start++,
+-						      hred, hgreen, hblue,
++						      hred, hgreen, hblue, 
+ 						      htransp, info))
+ 				break;
+ 		}
+ 	}
+-	if (rc == 0)
++	if (rc == 0) {
+ 		fb_copy_cmap(cmap, &info->cmap);
+-
++		if (fbsplash_active(info, vc_cons[fg_console].d) &&
++		    info->fix.visual == FB_VISUAL_DIRECTCOLOR)
++			fbsplash_fix_pseudo_pal(info, vc_cons[fg_console].d);
++	}
+ 	return rc;
+ }
+ 
+@@ -249,7 +253,7 @@ int fb_set_user_cmap(struct fb_cmap_user *cmap, struct fb_info *info)
+ {
+ 	int rc, size = cmap->len * sizeof(u16);
+ 	struct fb_cmap umap;
+-
++	
+ 	if (cmap->start < 0 || (!info->fbops->fb_setcolreg &&
+ 			        !info->fbops->fb_setcmap))
+ 		return -EINVAL;
+diff --git a/drivers/video/fbsplash.c b/drivers/video/fbsplash.c
+new file mode 100644
+index 0000000..75d8db8
+--- /dev/null
++++ b/drivers/video/fbsplash.c
+@@ -0,0 +1,424 @@
++/* 
++ *  linux/drivers/video/fbsplash.c -- Framebuffer splash routines
++ *
++ *  Copyright (C) 2004 Michal Januszewski <spock@gentoo.org>
++ *
++ *  Code based upon "Bootsplash" (C) 2001-2003 
++ *       Volker Poplawski <volker@poplawski.de>,
++ *       Stefan Reinauer <stepan@suse.de>,
++ *       Steffen Winterfeldt <snwint@suse.de>,
++ *       Michael Schroeder <mls@suse.de>,
++ *       Ken Wimer <wimer@suse.de>.
++ *
++ *  Splash render routines are located in /linux/drivers/video/cfbsplash.c
++ * 
++ *  This file is subject to the terms and conditions of the GNU General Public
++ *  License.  See the file COPYING in the main directory of this archive for
++ *  more details.
++ * 
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/types.h>
++#include <linux/fb.h>
++#include <linux/vt_kern.h>
++#include <linux/vmalloc.h>
++#include <linux/unistd.h>
++#include <linux/syscalls.h>
++#include <linux/init.h>
++#include <linux/proc_fs.h>
++#include <linux/workqueue.h>
++#include <linux/kmod.h>
++#include <linux/miscdevice.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++
++#include <asm/uaccess.h>
++#include <asm/irq.h>
++#include <asm/system.h>
++
++#include "console/fbcon.h"
++#include "fbsplash.h"
++
++#define SPLASH_VERSION 		"0.9.2"
++
++extern signed char con2fb_map[];
++static int fbsplash_enable(struct vc_data *vc);
++char fbsplash_path[KMOD_PATH_LEN] = "/sbin/splash_helper";
++static int initialized = 0;
++
++int fbsplash_call_helper(char* cmd, unsigned short vc)
++{
++	char *envp[] = {
++		"HOME=/",
++		"PATH=/sbin:/bin",
++		NULL
++	};
++
++	char tfb[5];
++	char tcons[5];
++	unsigned char fb = (int) con2fb_map[vc];
++
++	char *argv[] = {
++		fbsplash_path,
++		"2",
++		cmd,
++		tcons,
++		tfb,
++		vc_cons[vc].d->vc_splash.theme,
++		NULL
++	};
++
++	snprintf(tfb,5,"%d",fb);
++	snprintf(tcons,5,"%d",vc);
++
++	return call_usermodehelper(fbsplash_path, argv, envp, 1);
++}
++
++/* Disables fbsplash on a virtual console; called with console sem held. */
++int fbsplash_disable(struct vc_data *vc, unsigned char redraw)
++{
++	struct fb_info* info;
++
++	if (!vc->vc_splash.state)
++		return -EINVAL;
++
++	info = registered_fb[(int) con2fb_map[vc->vc_num]];
++
++	if (info == NULL)
++		return -EINVAL;
++
++	vc->vc_splash.state = 0; 
++	vc_resize(vc, info->var.xres / vc->vc_font.width, 
++		  info->var.yres / vc->vc_font.height);
++
++	if (fg_console == vc->vc_num && redraw) {
++		redraw_screen(vc, 0);
++		update_region(vc, vc->vc_origin + 
++			      vc->vc_size_row * vc->vc_top, 
++			      vc->vc_size_row * (vc->vc_bottom - vc->vc_top) / 2);
++	}
++
++	printk(KERN_INFO "fbsplash: switched splash state to 'off' on console %d\n", 
++			 vc->vc_num);
++
++	return 0;
++}
++
++/* Enables fbsplash on a virtual console; called with console sem held. */
++static int fbsplash_enable(struct vc_data *vc)
++{
++	struct fb_info* info;
++
++	info = registered_fb[(int) con2fb_map[vc->vc_num]];
++		
++	if (vc->vc_splash.twidth == 0 || vc->vc_splash.theight == 0 || 
++	    info == NULL || vc->vc_splash.state || (!info->splash.data &&
++	    vc->vc_num == fg_console))
++		return -EINVAL;
++	
++	vc->vc_splash.state = 1;
++	vc_resize(vc, vc->vc_splash.twidth / vc->vc_font.width, 
++		  vc->vc_splash.theight / vc->vc_font.height);
++
++	if (fg_console == vc->vc_num) {
++		redraw_screen(vc, 0);
++		update_region(vc, vc->vc_origin + 
++			      vc->vc_size_row * vc->vc_top, 
++			      vc->vc_size_row * (vc->vc_bottom - vc->vc_top) / 2);
++		fbsplash_clear_margins(vc, info, 0);
++	}
++
++	printk(KERN_INFO "fbsplash: switched splash state to 'on' on console %d\n", 
++			 vc->vc_num);
++
++	return 0;
++}
++
++static inline int fbsplash_ioctl_dosetstate(struct vc_data *vc, unsigned int __user* state, unsigned char origin)
++{
++	int tmp, ret;
++
++	if (get_user(tmp, state))
++		return -EFAULT;
++
++	if (origin == FB_SPLASH_IO_ORIG_USER)
++		acquire_console_sem();
++	if (!tmp)
++		ret = fbsplash_disable(vc, 1);
++	else
++		ret = fbsplash_enable(vc);
++	if (origin == FB_SPLASH_IO_ORIG_USER)
++		release_console_sem();
++
++	return ret;
++}
++
++static inline int fbsplash_ioctl_dogetstate(struct vc_data *vc, unsigned int __user *state)
++{
++	return put_user(vc->vc_splash.state, (unsigned int __user*) state);
++}
++
++static int fbsplash_ioctl_dosetcfg(struct vc_data *vc, struct vc_splash __user *arg, unsigned char origin)
++{
++	struct vc_splash cfg;
++	struct fb_info *info;
++	int len;
++	char *tmp;
++	
++	info = registered_fb[(int) con2fb_map[vc->vc_num]];
++
++	if (copy_from_user(&cfg, arg, sizeof(struct vc_splash)))
++		return -EFAULT;
++	if (info == NULL || !cfg.twidth || !cfg.theight || 
++	    cfg.tx + cfg.twidth  > info->var.xres ||
++	    cfg.ty + cfg.theight > info->var.yres)
++		return -EINVAL;
++
++	len = strlen_user(cfg.theme);
++	if (!len || len > FB_SPLASH_THEME_LEN)
++		return -EINVAL;
++	tmp = kmalloc(len, GFP_KERNEL);
++	if (!tmp)
++		return -ENOMEM;
++	if (copy_from_user(tmp, (void __user *)cfg.theme, len))
++		return -EFAULT;
++	cfg.theme = tmp;
++	cfg.state = 0;
++
++	/* If this ioctl is a response to a request from kernel, the console sem
++	 * is already held; we also don't need to disable splash because either the
++	 * new config and background picture will be successfully loaded, and the 
++	 * splash will stay on, or in case of a failure it'll be turned off in fbcon. */
++	if (origin == FB_SPLASH_IO_ORIG_USER) {
++		acquire_console_sem();
++		if (vc->vc_splash.state)
++			fbsplash_disable(vc, 1);
++	}
++
++	if (vc->vc_splash.theme)
++		kfree(vc->vc_splash.theme);
++
++	vc->vc_splash = cfg;
++
++	if (origin == FB_SPLASH_IO_ORIG_USER)
++		release_console_sem();
++
++	printk(KERN_INFO "fbsplash: console %d using theme '%s'\n", 
++			 vc->vc_num, vc->vc_splash.theme);
++	return 0;	
++}
++
++static int fbsplash_ioctl_dogetcfg(struct vc_data *vc, struct vc_splash __user *arg)
++{
++	struct vc_splash splash;
++	char __user *tmp;
++
++	if (get_user(tmp, &arg->theme))
++		return -EFAULT;
++	
++	splash = vc->vc_splash;
++	splash.theme = tmp;
++
++	if (vc->vc_splash.theme) {
++		if (copy_to_user(tmp, vc->vc_splash.theme, strlen(vc->vc_splash.theme) + 1))
++			return -EFAULT;
++	} else
++		if (put_user(0, tmp))
++			return -EFAULT;
++
++	if (copy_to_user(arg, &splash, sizeof(struct vc_splash)))
++		return -EFAULT;
++
++	return 0;
++}
++
++static int fbsplash_ioctl_dosetpic(struct vc_data *vc, struct fb_image __user *arg, unsigned char origin)
++{
++	struct fb_image img;
++	struct fb_info *info;
++	int len;
++	u8 *tmp;
++	
++	if (vc->vc_num != fg_console) 
++		return -EINVAL;
++
++	info = registered_fb[(int) con2fb_map[vc->vc_num]];
++	
++	if (info == NULL)
++		return -EINVAL;
++	
++	if (copy_from_user(&img, arg, sizeof(struct fb_image)))
++		return -EFAULT;
++	
++	if (img.width != info->var.xres || img.height != info->var.yres) {
++		printk(KERN_ERR "fbsplash: picture dimensions mismatch\n");
++		return -EINVAL;
++	}
++
++	if (img.depth != info->var.bits_per_pixel) {
++		printk(KERN_ERR "fbsplash: picture depth mismatch\n");
++		return -EINVAL;
++	}
++		
++	if (img.depth == 8) {
++		if (!img.cmap.len || !img.cmap.red || !img.cmap.green || 
++		    !img.cmap.blue)
++			return -EINVAL;
++		
++		tmp = vmalloc(img.cmap.len * 3 * 2);
++		if (!tmp)
++			return -ENOMEM;
++
++		if (copy_from_user(tmp, (void __user*)img.cmap.red, img.cmap.len * 2) ||
++		    copy_from_user(tmp + (img.cmap.len << 1),
++			    	   (void __user*)img.cmap.green, (img.cmap.len << 1)) ||
++		    copy_from_user(tmp + (img.cmap.len << 2),
++			    	   (void __user*)img.cmap.blue, (img.cmap.len << 1))) {
++			vfree(tmp);
++			return -EFAULT;
++		}
++			
++		img.cmap.transp = NULL;
++		img.cmap.red = (u16*)tmp;
++		img.cmap.green = img.cmap.red + img.cmap.len;
++		img.cmap.blue = img.cmap.green + img.cmap.len;
++	} else {
++		img.cmap.red = NULL;
++	}
++		
++	len = ((img.depth + 7) >> 3) * img.width * img.height;
++	tmp = vmalloc(len);
++
++	if (!tmp)
++		goto out;
++
++	if (copy_from_user(tmp, (void __user*)img.data, len))
++		goto out;
++		
++	img.data = tmp;
++
++	/* If this ioctl is a response to a request from kernel, the console sem
++	 * is already held. */
++	if (origin == FB_SPLASH_IO_ORIG_USER)
++		acquire_console_sem();
++	
++	if (info->splash.data)
++		vfree((u8*)info->splash.data);
++	if (info->splash.cmap.red)
++		vfree(info->splash.cmap.red);
++	
++	info->splash = img;
++
++	if (origin == FB_SPLASH_IO_ORIG_USER)
++		release_console_sem();
++
++	return 0;
++
++out:	if (img.cmap.red)
++		vfree(img.cmap.red);
++	if (tmp)
++		vfree(tmp);
++	return -ENOMEM;
++}
++
++static int splash_ioctl(struct inode * inode, struct file *filp, u_int cmd, 
++			u_long arg)
++{
++	struct fb_splash_iowrapper __user *wrapper = (void __user*) arg;
++	struct vc_data *vc = NULL;
++	unsigned short vc_num = 0;
++	unsigned char origin = 0;
++	void __user *data = NULL;
++	
++	if (!access_ok(VERIFY_READ, wrapper, 
++			sizeof(struct fb_splash_iowrapper)))
++		return -EFAULT;
++	
++	__get_user(vc_num, &wrapper->vc);
++	__get_user(origin, &wrapper->origin);
++	__get_user(data, &wrapper->data);
++		
++	if (!vc_cons_allocated(vc_num))
++		return -EINVAL;
++
++	vc = vc_cons[vc_num].d;
++	
++	switch (cmd) {
++	case FBIOSPLASH_SETPIC:
++		return fbsplash_ioctl_dosetpic(vc, (struct fb_image __user*)data, origin);
++	case FBIOSPLASH_SETCFG:
++		return fbsplash_ioctl_dosetcfg(vc, (struct vc_splash*)data, origin);
++	case FBIOSPLASH_GETCFG:
++		return fbsplash_ioctl_dogetcfg(vc, (struct vc_splash*)data);
++	case FBIOSPLASH_SETSTATE:
++		return fbsplash_ioctl_dosetstate(vc, (unsigned int *)data, origin);
++	case FBIOSPLASH_GETSTATE:
++		return fbsplash_ioctl_dogetstate(vc, (unsigned int *)data);
++	default:
++		return -ENOIOCTLCMD;
++	}	
++}
++
++static struct file_operations splash_ops = {
++	.owner = THIS_MODULE,
++	.ioctl = splash_ioctl
++};
++
++static struct miscdevice splash_dev = {
++	.minor = MISC_DYNAMIC_MINOR,
++	.name = "fbsplash",
++	.fops = &splash_ops
++};
++
++void fbsplash_reset(void)
++{
++	struct fb_info *info;
++	struct vc_data *vc;
++	int i;
++
++	vc = vc_cons[0].d;
++	info = registered_fb[0];
++
++	for (i = 0; i < num_registered_fb; i++) {
++		registered_fb[i]->splash.data = NULL;
++		registered_fb[i]->splash.cmap.red = NULL;
++	}
++
++	for (i = 0; i < MAX_NR_CONSOLES && vc_cons[i].d; i++) {
++		vc_cons[i].d->vc_splash.state = vc_cons[i].d->vc_splash.twidth = 
++						vc_cons[i].d->vc_splash.theight = 0;
++		vc_cons[i].d->vc_splash.theme = NULL;
++	}
++
++	return;
++}
++
++int fbsplash_init(void)
++{
++	int i;
++
++	fbsplash_reset();
++
++	if (initialized)
++		return 0;
++
++	i = misc_register(&splash_dev);
++	if (i) {
++		printk(KERN_ERR "fbsplash: failed to register device\n");
++		return i;
++	}
++
++	fbsplash_call_helper("init", 0);
++	initialized = 1;
++	return 0;
++}
++
++int fbsplash_exit(void)
++{
++	fbsplash_reset();
++	return 0;
++}
++
++EXPORT_SYMBOL(fbsplash_path);
+diff --git a/drivers/video/fbsplash.h b/drivers/video/fbsplash.h
+new file mode 100644
+index 0000000..cb9398f
+--- /dev/null
++++ b/drivers/video/fbsplash.h
+@@ -0,0 +1,78 @@
++/* 
++ *  linux/drivers/video/fbsplash.h -- Framebuffer splash headers
++ *
++ *  Copyright (C) 2004 Michal Januszewski <spock@gentoo.org>
++ *
++ */
++
++#ifndef __FB_SPLASH_H
++#define __FB_SPLASH_H
++
++#ifndef _LINUX_FB_H
++#include <linux/fb.h>
++#endif
++
++/* This is needed for vc_cons in fbcmap.c */
++#include <linux/vt_kern.h>
++
++struct fb_cursor;
++struct fb_info;
++struct vc_data;
++
++#ifdef CONFIG_FB_SPLASH
++/* fbsplash.c */
++int fbsplash_init(void);
++int fbsplash_exit(void);
++int fbsplash_call_helper(char* cmd, unsigned short cons);
++int fbsplash_disable(struct vc_data *vc, unsigned char redraw);
++
++/* cfbsplash.c */
++void fbsplash_putcs(struct vc_data *vc, struct fb_info *info, const unsigned short *s, int count, int yy, int xx);
++void fbsplash_cursor(struct fb_info *info, struct fb_cursor *cursor);
++void fbsplash_clear(struct vc_data *vc, struct fb_info *info, int sy, int sx, int height, int width);
++void fbsplash_clear_margins(struct vc_data *vc, struct fb_info *info, int bottom_only);
++void fbsplash_blank(struct vc_data *vc, struct fb_info *info, int blank);
++void fbsplash_bmove_redraw(struct vc_data *vc, struct fb_info *info, int y, int sx, int dx, int width);
++void fbsplash_copy(u8 *dst, u8 *src, int height, int width, int linebytes, int srclinesbytes, int bpp);
++void fbsplash_fix_pseudo_pal(struct fb_info *info, struct vc_data *vc);
++
++/* vt.c */
++void acquire_console_sem(void);
++void release_console_sem(void);
++void do_unblank_screen(int entering_gfx);
++
++/* struct vc_data *y */
++#define fbsplash_active_vc(y) (y->vc_splash.state && y->vc_splash.theme) 
++
++/* struct fb_info *x, struct vc_data *y */
++#define fbsplash_active_nores(x,y) (x->splash.data && fbsplash_active_vc(y))
++
++/* struct fb_info *x, struct vc_data *y */
++#define fbsplash_active(x,y) (fbsplash_active_nores(x,y) &&		\
++			      x->splash.width == x->var.xres && 	\
++			      x->splash.height == x->var.yres &&	\
++			      x->splash.depth == x->var.bits_per_pixel)
++
++
++#else /* CONFIG_FB_SPLASH */
++
++static inline void fbsplash_putcs(struct vc_data *vc, struct fb_info *info, const unsigned short *s, int count, int yy, int xx) {}
++static inline void fbsplash_putc(struct vc_data *vc, struct fb_info *info, int c, int ypos, int xpos) {}
++static inline void fbsplash_cursor(struct fb_info *info, struct fb_cursor *cursor) {}
++static inline void fbsplash_clear(struct vc_data *vc, struct fb_info *info, int sy, int sx, int height, int width) {}
++static inline void fbsplash_clear_margins(struct vc_data *vc, struct fb_info *info, int bottom_only) {}
++static inline void fbsplash_blank(struct vc_data *vc, struct fb_info *info, int blank) {}
++static inline void fbsplash_bmove_redraw(struct vc_data *vc, struct fb_info *info, int y, int sx, int dx, int width) {}
++static inline void fbsplash_fix_pseudo_pal(struct fb_info *info, struct vc_data *vc) {}
++static inline int fbsplash_call_helper(char* cmd, unsigned short cons) { return 0; }
++static inline int fbsplash_init(void) { return 0; }
++static inline int fbsplash_exit(void) { return 0; }
++static inline int fbsplash_disable(struct vc_data *vc, unsigned char redraw) { return 0; }
++
++#define fbsplash_active_vc(y) (0)
++#define fbsplash_active_nores(x,y) (0)
++#define fbsplash_active(x,y) (0)
++
++#endif /* CONFIG_FB_SPLASH */
++
++#endif /* __FB_SPLASH_H */
+diff --git a/drivers/video/sis/init301.c b/drivers/video/sis/init301.c
+index da33d80..387d92f 100644
+--- a/drivers/video/sis/init301.c
++++ b/drivers/video/sis/init301.c
+@@ -4887,6 +4887,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr)
+ 
+   }  /* LVDS */
+ 
++  SiS_SetReg(SiS_Pr->SiS_Part1Port, 0x2d, 0x11);	
+ }
+ 
+ /*********************************************/
+diff --git a/drivers/video/smi/Makefile b/drivers/video/smi/Makefile
+new file mode 100755
+index 0000000..3d879cf
+--- /dev/null
++++ b/drivers/video/smi/Makefile
+@@ -0,0 +1,8 @@
++obj-y +=  smi.o
++
++#DRIVER_OBJS = $(addprefix ../, cfbfillrect.o cfbcopyarea.o cfbimgblt.o)
++
++smi-y := $(DRIVER_OBJS)
++
++smi-y +=smtcfb.o
++
+diff --git a/drivers/video/smi/sm501hw.h b/drivers/video/smi/sm501hw.h
+new file mode 100755
+index 0000000..81fc52e
+--- /dev/null
++++ b/drivers/video/smi/sm501hw.h
+@@ -0,0 +1,2160 @@
++/*
++ *  linux/drivers/video/sm501hw.h -- Silicon Motion SM501 frame buffer device
++ *
++ *      Copyright (C) 2006 Silicon Motion, Inc.
++ *      Ge Wang, gewang@siliconmotion.com
++ *
++ *  This file is subject to the terms and conditions of the GNU General Public
++ *  License version 2 or later. See the file COPYING in the main directory of 
++ *  this archive for more details.
++ */
++
++
++#define SM501_VIDEOMEMORYSIZE    0x00800000  /*Assume SMTC graphics chip has 8MB VRAM */
++#define SM502_REV_ID             0xC0
++
++/*
++ *
++ * Definitions for the System Configuration registers.
++ *
++ */
++
++#define SYSTEM_CTRL                                     0x000000
++#define SYSTEM_CTRL_DPMS                                31:30
++#define SYSTEM_CTRL_DPMS_VPHP                           0
++#define SYSTEM_CTRL_DPMS_VPHN                           1
++#define SYSTEM_CTRL_DPMS_VNHP                           2
++#define SYSTEM_CTRL_DPMS_VNHN                           3
++#define SYSTEM_CTRL_PCI_BURST                           29:29
++#define SYSTEM_CTRL_PCI_BURST_DISABLE                   0
++#define SYSTEM_CTRL_PCI_BURST_ENABLE                    1
++#define SYSTEM_CTRL_CSC_STATUS                          28:28
++#define SYSTEM_CTRL_CSC_STATUS_IDLE                     0
++#define SYSTEM_CTRL_CSC_STATUS_BUSY                     1
++#define SYSTEM_CTRL_PCI_MASTER                          25:25
++#define SYSTEM_CTRL_PCI_MASTER_STOP                     0
++#define SYSTEM_CTRL_PCI_MASTER_START                    1
++#define SYSTEM_CTRL_LATENCY_TIMER                       24:24
++#define SYSTEM_CTRL_LATENCY_TIMER_ENABLE                0
++#define SYSTEM_CTRL_LATENCY_TIMER_DISABLE               1
++#define SYSTEM_CTRL_PANEL_STATUS                        23:23
++#define SYSTEM_CTRL_PANEL_STATUS_CURRENT                0
++#define SYSTEM_CTRL_PANEL_STATUS_PENDING                1
++#define SYSTEM_CTRL_VIDEO_STATUS                        22:22
++#define SYSTEM_CTRL_VIDEO_STATUS_CURRENT                0
++#define SYSTEM_CTRL_VIDEO_STATUS_PENDING                1
++#define SYSTEM_CTRL_DE_FIFO                             20:20
++#define SYSTEM_CTRL_DE_FIFO_NOT_EMPTY                   0
++#define SYSTEM_CTRL_DE_FIFO_EMPTY                       1
++#define SYSTEM_CTRL_DE_STATUS                           19:19
++#define SYSTEM_CTRL_DE_STATUS_IDLE                      0
++#define SYSTEM_CTRL_DE_STATUS_BUSY                      1
++#define SYSTEM_CTRL_CRT_STATUS                          17:17
++#define SYSTEM_CTRL_CRT_STATUS_CURRENT                  0
++#define SYSTEM_CTRL_CRT_STATUS_PENDING                  1
++#define SYSTEM_CTRL_ZVPORT                              16:16
++#define SYSTEM_CTRL_ZVPORT_0                            0
++#define SYSTEM_CTRL_ZVPORT_1                            1
++#define SYSTEM_CTRL_PCI_BURST_READ                      15:15
++#define SYSTEM_CTRL_PCI_BURST_READ_DISABLE              0
++#define SYSTEM_CTRL_PCI_BURST_READ_ENABLE               1
++#define SYSTEM_CTRL_DE_ABORT                            13:12
++#define SYSTEM_CTRL_DE_ABORT_NORMAL                     0
++#define SYSTEM_CTRL_DE_ABORT_2D_ABORT                   3
++#define SYSTEM_CTRL_PCI_SUBSYS_LOCK                     11:11
++#define SYSTEM_CTRL_PCI_SUBSYS_LOCK_DISABLE             0
++#define SYSTEM_CTRL_PCI_SUBSYS_LOCK_ENABLE              1
++#define SYSTEM_CTRL_PCI_RETRY                           7:7
++#define SYSTEM_CTRL_PCI_RETRY_ENABLE                    0
++#define SYSTEM_CTRL_PCI_RETRY_DISABLE                   1
++#define SYSTEM_CTRL_PCI_CLOCK_RUN                       6:6
++#define SYSTEM_CTRL_PCI_CLOCK_RUN_DISABLE               0
++#define SYSTEM_CTRL_PCI_CLOCK_RUN_ENABLE                1
++#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE           5:4
++#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_1         0
++#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_2         1
++#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_4         2
++#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8         3
++#define SYSTEM_CTRL_CRT_TRISTATE                        2:2
++#define SYSTEM_CTRL_CRT_TRISTATE_DISABLE                0
++#define SYSTEM_CTRL_CRT_TRISTATE_ENABLE                 1
++#define SYSTEM_CTRL_INTMEM_TRISTATE                     1:1
++#define SYSTEM_CTRL_INTMEM_TRISTATE_DISABLE             0
++#define SYSTEM_CTRL_INTMEM_TRISTATE_ENABLE              1
++#define SYSTEM_CTRL_PANEL_TRISTATE                      0:0
++#define SYSTEM_CTRL_PANEL_TRISTATE_DISABLE              0
++#define SYSTEM_CTRL_PANEL_TRISTATE_ENABLE               1
++
++#define MISC_CTRL                                       0x000004
++#define MISC_CTRL_PCI_PAD                               31:30
++#define MISC_CTRL_PCI_PAD_24MA                          0
++#define MISC_CTRL_PCI_PAD_12MA                          1
++#define MISC_CTRL_PCI_PAD_8MA                           2
++#define MISC_CTRL_48_SELECT                             29:28
++#define MISC_CTRL_48_SELECT_CRYSTAL                     0
++#define MISC_CTRL_48_SELECT_CPU_96                      2
++#define MISC_CTRL_48_SELECT_CPU_48                      3
++#define MISC_CTRL_UART1_SELECT                          27:27
++#define MISC_CTRL_UART1_SELECT_UART                     0
++#define MISC_CTRL_UART1_SELECT_SSP                      1
++#define MISC_CTRL_8051_LATCH                            26:26
++#define MISC_CTRL_8051_LATCH_DISABLE                    0
++#define MISC_CTRL_8051_LATCH_ENABLE                     1
++#define MISC_CTRL_FPDATA                                25:25
++#define MISC_CTRL_FPDATA_18                             0
++#define MISC_CTRL_FPDATA_24                             1
++#define MISC_CTRL_CRYSTAL                               24:24
++#define MISC_CTRL_CRYSTAL_24                            0
++#define MISC_CTRL_CRYSTAL_12                            1
++#define MISC_CTRL_DRAM_REFRESH                          22:21
++#define MISC_CTRL_DRAM_REFRESH_8                        0
++#define MISC_CTRL_DRAM_REFRESH_16                       1
++#define MISC_CTRL_DRAM_REFRESH_32                       2
++#define MISC_CTRL_DRAM_REFRESH_64                       3
++#define MISC_CTRL_BUS_HOLD                              20:18
++#define MISC_CTRL_BUS_HOLD_FIFO_EMPTY                   0
++#define MISC_CTRL_BUS_HOLD_8                            1
++#define MISC_CTRL_BUS_HOLD_16                           2
++#define MISC_CTRL_BUS_HOLD_24                           3
++#define MISC_CTRL_BUS_HOLD_32                           4
++#define MISC_CTRL_HITACHI_READY                         17:17
++#define MISC_CTRL_HITACHI_READY_NEGATIVE                0
++#define MISC_CTRL_HITACHI_READY_POSITIVE                1
++#define MISC_CTRL_INTERRUPT                             16:16
++#define MISC_CTRL_INTERRUPT_NORMAL                      0
++#define MISC_CTRL_INTERRUPT_INVERT                      1
++#define MISC_CTRL_PLL_CLOCK_COUNT                       15:15
++#define MISC_CTRL_PLL_CLOCK_COUNT_DISABLE               0
++#define MISC_CTRL_PLL_CLOCK_COUNT_ENABLE                1
++#define MISC_CTRL_DAC_BAND_GAP                          14:13
++#define MISC_CTRL_DAC_POWER                             12:12
++#define MISC_CTRL_DAC_POWER_ENABLE                      0
++#define MISC_CTRL_DAC_POWER_DISABLE                     1
++#define MISC_CTRL_USB_SLAVE_CONTROLLER                  11:11
++#define MISC_CTRL_USB_SLAVE_CONTROLLER_CPU              0
++#define MISC_CTRL_USB_SLAVE_CONTROLLER_8051             1
++#define MISC_CTRL_BURST_LENGTH                          10:10
++#define MISC_CTRL_BURST_LENGTH_8                        0
++#define MISC_CTRL_BURST_LENGTH_1                        1
++#define MISC_CTRL_USB_SELECT                            9:9
++#define MISC_CTRL_USB_SELECT_MASTER                     0
++#define MISC_CTRL_USB_SELECT_SLAVE                      1
++#define MISC_CTRL_LOOPBACK                              8:8
++#define MISC_CTRL_LOOPBACK_NORMAL                       0
++#define MISC_CTRL_LOOPBACK_USB_HOST                     1
++#define MISC_CTRL_CLOCK_DIVIDER_RESET                   7:7
++#define MISC_CTRL_CLOCK_DIVIDER_RESET_ENABLE            0
++#define MISC_CTRL_CLOCK_DIVIDER_RESET_DISABLE           1
++#define MISC_CTRL_TEST_MODE                             6:5
++#define MISC_CTRL_TEST_MODE_NORMAL                      0
++#define MISC_CTRL_TEST_MODE_DEBUGGING                   1
++#define MISC_CTRL_TEST_MODE_NAND                        2
++#define MISC_CTRL_TEST_MODE_MEMORY                      3
++#define MISC_CTRL_NEC_MMIO                              4:4
++#define MISC_CTRL_NEC_MMIO_30                           0
++#define MISC_CTRL_NEC_MMIO_62                           1
++#define MISC_CTRL_CLOCK                                 3:3
++#define MISC_CTRL_CLOCK_PLL                             0
++#define MISC_CTRL_CLOCK_TEST                            1
++#define MISC_CTRL_HOST_BUS                              2:0
++#define MISC_CTRL_HOST_BUS_HITACHI                      0
++#define MISC_CTRL_HOST_BUS_PCI                          1
++#define MISC_CTRL_HOST_BUS_XSCALE                       2
++#define MISC_CTRL_HOST_BUS_STRONGARM                    4
++#define MISC_CTRL_HOST_BUS_NEC                          6
++
++#define GPIO_MUX_LOW                                    0x000008
++#define GPIO_MUX_LOW_31                                 31:31
++#define GPIO_MUX_LOW_31_GPIO                            0
++#define GPIO_MUX_LOW_31_PWM                             1
++#define GPIO_MUX_LOW_30                                 30:30
++#define GPIO_MUX_LOW_30_GPIO                            0
++#define GPIO_MUX_LOW_30_PWM                             1
++#define GPIO_MUX_LOW_29                                 29:29
++#define GPIO_MUX_LOW_29_GPIO                            0
++#define GPIO_MUX_LOW_29_PWM                             1
++#define GPIO_MUX_LOW_28                                 28:28
++#define GPIO_MUX_LOW_28_GPIO                            0
++#define GPIO_MUX_LOW_28_AC97_I2S                        1
++#define GPIO_MUX_LOW_27                                 27:27
++#define GPIO_MUX_LOW_27_GPIO                            0
++#define GPIO_MUX_LOW_27_AC97_I2S                        1
++#define GPIO_MUX_LOW_26                                 26:26
++#define GPIO_MUX_LOW_26_GPIO                            0
++#define GPIO_MUX_LOW_26_AC97_I2S                        1
++#define GPIO_MUX_LOW_25                                 25:25
++#define GPIO_MUX_LOW_25_GPIO                            0
++#define GPIO_MUX_LOW_25_AC97_I2S                        1
++#define GPIO_MUX_LOW_24                                 24:24
++#define GPIO_MUX_LOW_24_GPIO                            0
++#define GPIO_MUX_LOW_24_AC97                            1
++#define GPIO_MUX_LOW_23                                 23:23
++#define GPIO_MUX_LOW_23_GPIO                            0
++#define GPIO_MUX_LOW_23_ZVPORT                          1
++#define GPIO_MUX_LOW_22                                 22:22
++#define GPIO_MUX_LOW_22_GPIO                            0
++#define GPIO_MUX_LOW_22_ZVPORT                          1
++#define GPIO_MUX_LOW_21                                 21:21
++#define GPIO_MUX_LOW_21_GPIO                            0
++#define GPIO_MUX_LOW_21_ZVPORT                          1
++#define GPIO_MUX_LOW_20                                 20:20
++#define GPIO_MUX_LOW_20_GPIO                            0
++#define GPIO_MUX_LOW_20_ZVPORT                          1
++#define GPIO_MUX_LOW_19                                 19:19
++#define GPIO_MUX_LOW_19_GPIO                            0
++#define GPIO_MUX_LOW_19_ZVPORT                          1
++#define GPIO_MUX_LOW_18                                 18:18
++#define GPIO_MUX_LOW_18_GPIO                            0
++#define GPIO_MUX_LOW_18_ZVPORT                          1
++#define GPIO_MUX_LOW_17                                 17:17
++#define GPIO_MUX_LOW_17_GPIO                            0
++#define GPIO_MUX_LOW_17_ZVPORT                          1
++#define GPIO_MUX_LOW_16                                 16:16
++#define GPIO_MUX_LOW_16_GPIO                            0
++#define GPIO_MUX_LOW_16_ZVPORT                          1
++#define GPIO_MUX_LOW_15                                 15:15
++#define GPIO_MUX_LOW_15_GPIO                            0
++#define GPIO_MUX_LOW_15_8051                            1
++#define GPIO_MUX_LOW_14                                 14:14
++#define GPIO_MUX_LOW_14_GPIO                            0
++#define GPIO_MUX_LOW_14_8051                            1
++#define GPIO_MUX_LOW_13                                 13:13
++#define GPIO_MUX_LOW_13_GPIO                            0
++#define GPIO_MUX_LOW_13_8051                            1
++#define GPIO_MUX_LOW_12                                 12:12
++#define GPIO_MUX_LOW_12_GPIO                            0
++#define GPIO_MUX_LOW_12_8051                            1
++#define GPIO_MUX_LOW_11                                 11:11
++#define GPIO_MUX_LOW_11_GPIO                            0
++#define GPIO_MUX_LOW_11_8051                            1
++#define GPIO_MUX_LOW_10                                 10:10
++#define GPIO_MUX_LOW_10_GPIO                            0
++#define GPIO_MUX_LOW_10_8051                            1
++#define GPIO_MUX_LOW_9                                  9:9
++#define GPIO_MUX_LOW_9_GPIO                             0
++#define GPIO_MUX_LOW_9_8051                             1
++#define GPIO_MUX_LOW_8                                  8:8
++#define GPIO_MUX_LOW_8_GPIO                             0
++#define GPIO_MUX_LOW_8_8051                             1
++#define GPIO_MUX_LOW_7                                  7:7
++#define GPIO_MUX_LOW_7_GPIO                             0
++#define GPIO_MUX_LOW_7_8051                             1
++#define GPIO_MUX_LOW_6                                  6:6
++#define GPIO_MUX_LOW_6_GPIO                             0
++#define GPIO_MUX_LOW_6_8051                             1
++#define GPIO_MUX_LOW_5                                  5:5
++#define GPIO_MUX_LOW_5_GPIO                             0
++#define GPIO_MUX_LOW_5_8051                             1
++#define GPIO_MUX_LOW_4                                  4:4
++#define GPIO_MUX_LOW_4_GPIO                             0
++#define GPIO_MUX_LOW_4_8051                             1
++#define GPIO_MUX_LOW_3                                  3:3
++#define GPIO_MUX_LOW_3_GPIO                             0
++#define GPIO_MUX_LOW_3_8051                             1
++#define GPIO_MUX_LOW_2                                  2:2
++#define GPIO_MUX_LOW_2_GPIO                             0
++#define GPIO_MUX_LOW_2_8051                             1
++#define GPIO_MUX_LOW_1                                  1:1
++#define GPIO_MUX_LOW_1_GPIO                             0
++#define GPIO_MUX_LOW_1_8051                             1
++#define GPIO_MUX_LOW_0                                  0:0
++#define GPIO_MUX_LOW_0_GPIO                             0
++#define GPIO_MUX_LOW_0_8051                             1
++
++#define GPIO_MUX_HIGH                                   0x00000C
++#define GPIO_MUX_HIGH_63                                31:31
++#define GPIO_MUX_HIGH_63_GPIO                           0
++#define GPIO_MUX_HIGH_63_CRT_ZVPORT_FPDATA              1
++#define GPIO_MUX_HIGH_62                                30:30
++#define GPIO_MUX_HIGH_62_GPIO                           0
++#define GPIO_MUX_HIGH_62_CRT_ZVPORT_FPDATA              1
++#define GPIO_MUX_HIGH_61                                29:29
++#define GPIO_MUX_HIGH_61_GPIO                           0
++#define GPIO_MUX_HIGH_61_CRT_ZVPORT_FPDATA              1
++#define GPIO_MUX_HIGH_60                                28:28
++#define GPIO_MUX_HIGH_60_GPIO                           0
++#define GPIO_MUX_HIGH_60_CRT_ZVPORT_FPDATA              1
++#define GPIO_MUX_HIGH_59                                27:27
++#define GPIO_MUX_HIGH_59_GPIO                           0
++#define GPIO_MUX_HIGH_59_CRT_ZVPORT_FPDATA              1
++#define GPIO_MUX_HIGH_58                                26:26
++#define GPIO_MUX_HIGH_58_GPIO                           0
++#define GPIO_MUX_HIGH_58_CRT_ZVPORT_FPDATA              1
++#define GPIO_MUX_HIGH_57                                25:25
++#define GPIO_MUX_HIGH_57_GPIO                           0
++#define GPIO_MUX_HIGH_57_CRT_ZVPORT                     1
++#define GPIO_MUX_HIGH_56                                24:24
++#define GPIO_MUX_HIGH_56_GPIO                           0
++#define GPIO_MUX_HIGH_56_CRT_ZVPORT                     1
++#define GPIO_MUX_HIGH_55                                23:23
++#define GPIO_MUX_HIGH_55_GPIO                           0
++#define GPIO_MUX_HIGH_55_CRT                            1
++#define GPIO_MUX_HIGH_47                                15:15
++#define GPIO_MUX_HIGH_47_GPIO                           0
++#define GPIO_MUX_HIGH_47_I2C                            1
++#define GPIO_MUX_HIGH_46                                14:14
++#define GPIO_MUX_HIGH_46_GPIO                           0
++#define GPIO_MUX_HIGH_46_I2C                            1
++#define GPIO_MUX_HIGH_45                                13:13
++#define GPIO_MUX_HIGH_45_GPIO                           0
++#define GPIO_MUX_HIGH_45_SSP1                           1
++#define GPIO_MUX_HIGH_44                                12:12
++#define GPIO_MUX_HIGH_44_GPIO                           0
++#define GPIO_MUX_HIGH_44_UART1_SSP1                     1
++#define GPIO_MUX_HIGH_43                                11:11
++#define GPIO_MUX_HIGH_43_GPIO                           0
++#define GPIO_MUX_HIGH_43_UART1_SSP1                     1
++#define GPIO_MUX_HIGH_42                                10:10
++#define GPIO_MUX_HIGH_42_GPIO                           0
++#define GPIO_MUX_HIGH_42_UART1_SSP1                     1
++#define GPIO_MUX_HIGH_41                                9:9
++#define GPIO_MUX_HIGH_41_GPIO                           0
++#define GPIO_MUX_HIGH_41_UART1_SSP1                     1
++#define GPIO_MUX_HIGH_40                                8:8
++#define GPIO_MUX_HIGH_40_GPIO                           0
++#define GPIO_MUX_HIGH_40_UART0                          1
++#define GPIO_MUX_HIGH_39                                7:7
++#define GPIO_MUX_HIGH_39_GPIO                           0
++#define GPIO_MUX_HIGH_39_UART0                          1
++#define GPIO_MUX_HIGH_38                                6:6
++#define GPIO_MUX_HIGH_38_GPIO                           0
++#define GPIO_MUX_HIGH_38_UART0                          1
++#define GPIO_MUX_HIGH_37                                5:5
++#define GPIO_MUX_HIGH_37_GPIO                           0
++#define GPIO_MUX_HIGH_37_UART0                          1
++#define GPIO_MUX_HIGH_36                                4:4
++#define GPIO_MUX_HIGH_36_GPIO                           0
++#define GPIO_MUX_HIGH_36_SSP0                           1
++#define GPIO_MUX_HIGH_35                                3:3
++#define GPIO_MUX_HIGH_35_GPIO                           0
++#define GPIO_MUX_HIGH_35_SSP0                           1
++#define GPIO_MUX_HIGH_34                                2:2
++#define GPIO_MUX_HIGH_34_GPIO                           0
++#define GPIO_MUX_HIGH_34_SSP0                           1
++#define GPIO_MUX_HIGH_33                                1:1
++#define GPIO_MUX_HIGH_33_GPIO                           0
++#define GPIO_MUX_HIGH_33_SSP0                           1
++#define GPIO_MUX_HIGH_32                                0:0
++#define GPIO_MUX_HIGH_32_GPIO                           0
++#define GPIO_MUX_HIGH_32_SSP0                           1
++
++#define DRAM_CTRL                                       0x000010
++#define DRAM_CTRL_EMBEDDED                              31:31
++#define DRAM_CTRL_EMBEDDED_ENABLE                       0
++#define DRAM_CTRL_EMBEDDED_DISABLE                      1
++#define DRAM_CTRL_CPU_BURST                             30:28
++#define DRAM_CTRL_CPU_BURST_1                           0
++#define DRAM_CTRL_CPU_BURST_2                           1
++#define DRAM_CTRL_CPU_BURST_4                           2
++#define DRAM_CTRL_CPU_BURST_8                           3
++#define DRAM_CTRL_CPU_CAS_LATENCY                       27:27
++#define DRAM_CTRL_CPU_CAS_LATENCY_2                     0
++#define DRAM_CTRL_CPU_CAS_LATENCY_3                     1
++#define DRAM_CTRL_CPU_SIZE                              26:24
++#define DRAM_CTRL_CPU_SIZE_2                            0
++#define DRAM_CTRL_CPU_SIZE_4                            1
++#define DRAM_CTRL_CPU_SIZE_64                           4
++#define DRAM_CTRL_CPU_SIZE_32                           5
++#define DRAM_CTRL_CPU_SIZE_16                           6
++#define DRAM_CTRL_CPU_SIZE_8                            7
++#define DRAM_CTRL_CPU_COLUMN_SIZE                       23:22
++#define DRAM_CTRL_CPU_COLUMN_SIZE_1024                  0
++#define DRAM_CTRL_CPU_COLUMN_SIZE_512                   2
++#define DRAM_CTRL_CPU_COLUMN_SIZE_256                   3
++#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE                  21:21
++#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE_6                0
++#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE_7                1
++#define DRAM_CTRL_CPU_RESET                             20:20
++#define DRAM_CTRL_CPU_RESET_ENABLE                      0
++#define DRAM_CTRL_CPU_RESET_DISABLE                     1
++#define DRAM_CTRL_CPU_BANKS                             19:19
++#define DRAM_CTRL_CPU_BANKS_2                           0
++#define DRAM_CTRL_CPU_BANKS_4                           1
++#define DRAM_CTRL_CPU_WRITE_PRECHARGE                   18:18
++#define DRAM_CTRL_CPU_WRITE_PRECHARGE_2                 0
++#define DRAM_CTRL_CPU_WRITE_PRECHARGE_1                 1
++#define DRAM_CTRL_BLOCK_WRITE                           17:17
++#define DRAM_CTRL_BLOCK_WRITE_DISABLE                   0
++#define DRAM_CTRL_BLOCK_WRITE_ENABLE                    1
++#define DRAM_CTRL_REFRESH_COMMAND                       16:16
++#define DRAM_CTRL_REFRESH_COMMAND_10                    0
++#define DRAM_CTRL_REFRESH_COMMAND_12                    1
++#define DRAM_CTRL_SIZE                                  15:13
++#define DRAM_CTRL_SIZE_4                                0
++#define DRAM_CTRL_SIZE_8                                1
++#define DRAM_CTRL_SIZE_16                               2
++#define DRAM_CTRL_SIZE_32                               3
++#define DRAM_CTRL_SIZE_64                               4
++#define DRAM_CTRL_SIZE_2                                5
++#define DRAM_CTRL_COLUMN_SIZE                           12:11
++#define DRAM_CTRL_COLUMN_SIZE_256                       0
++#define DRAM_CTRL_COLUMN_SIZE_512                       2
++#define DRAM_CTRL_COLUMN_SIZE_1024                      3
++#define DRAM_CTRL_BLOCK_WRITE_TIME                      10:10
++#define DRAM_CTRL_BLOCK_WRITE_TIME_1                    0
++#define DRAM_CTRL_BLOCK_WRITE_TIME_2                    1
++#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE                 9:9
++#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE_4               0
++#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE_1               1
++#define DRAM_CTRL_ACTIVE_PRECHARGE                      8:8
++#define DRAM_CTRL_ACTIVE_PRECHARGE_6                    0
++#define DRAM_CTRL_ACTIVE_PRECHARGE_7                    1
++#define DRAM_CTRL_RESET                                 7:7
++#define DRAM_CTRL_RESET_ENABLE                          0
++#define DRAM_CTRL_RESET_DISABLE                         1
++#define DRAM_CTRL_REMAIN_ACTIVE                         6:6
++#define DRAM_CTRL_REMAIN_ACTIVE_ENABLE                  0
++#define DRAM_CTRL_REMAIN_ACTIVE_DISABLE                 1
++#define DRAM_CTRL_BANKS                                 1:1
++#define DRAM_CTRL_BANKS_2                               0
++#define DRAM_CTRL_BANKS_4                               1
++#define DRAM_CTRL_WRITE_PRECHARGE                       0:0
++#define DRAM_CTRL_WRITE_PRECHARGE_2                     0
++#define DRAM_CTRL_WRITE_PRECHARGE_1                     1
++
++#define ARBITRATION_CTRL                                0x000014
++#define ARBITRATION_CTRL_CPUMEM                         29:29
++#define ARBITRATION_CTRL_CPUMEM_FIXED                   0
++#define ARBITRATION_CTRL_CPUMEM_ROTATE                  1
++#define ARBITRATION_CTRL_INTMEM                         28:28
++#define ARBITRATION_CTRL_INTMEM_FIXED                   0
++#define ARBITRATION_CTRL_INTMEM_ROTATE                  1
++#define ARBITRATION_CTRL_USB                            27:24
++#define ARBITRATION_CTRL_USB_OFF                        0
++#define ARBITRATION_CTRL_USB_PRIORITY_1                 1
++#define ARBITRATION_CTRL_USB_PRIORITY_2                 2
++#define ARBITRATION_CTRL_USB_PRIORITY_3                 3
++#define ARBITRATION_CTRL_USB_PRIORITY_4                 4
++#define ARBITRATION_CTRL_USB_PRIORITY_5                 5
++#define ARBITRATION_CTRL_USB_PRIORITY_6                 6
++#define ARBITRATION_CTRL_USB_PRIORITY_7                 7
++#define ARBITRATION_CTRL_PANEL                          23:20
++#define ARBITRATION_CTRL_PANEL_OFF                      0
++#define ARBITRATION_CTRL_PANEL_PRIORITY_1               1
++#define ARBITRATION_CTRL_PANEL_PRIORITY_2               2
++#define ARBITRATION_CTRL_PANEL_PRIORITY_3               3
++#define ARBITRATION_CTRL_PANEL_PRIORITY_4               4
++#define ARBITRATION_CTRL_PANEL_PRIORITY_5               5
++#define ARBITRATION_CTRL_PANEL_PRIORITY_6               6
++#define ARBITRATION_CTRL_PANEL_PRIORITY_7               7
++#define ARBITRATION_CTRL_ZVPORT                         19:16
++#define ARBITRATION_CTRL_ZVPORT_OFF                     0
++#define ARBITRATION_CTRL_ZVPORT_PRIORITY_1              1
++#define ARBITRATION_CTRL_ZVPORT_PRIORITY_2              2
++#define ARBITRATION_CTRL_ZVPORT_PRIORITY_3              3
++#define ARBITRATION_CTRL_ZVPORT_PRIORITY_4              4
++#define ARBITRATION_CTRL_ZVPORT_PRIORITY_5              5
++#define ARBITRATION_CTRL_ZVPORT_PRIORITY_6              6
++#define ARBITRATION_CTRL_ZVPORT_PRIORITY_7              7
++#define ARBITRATION_CTRL_CMD_INTPR                      15:12
++#define ARBITRATION_CTRL_CMD_INTPR_OFF                  0
++#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_1           1
++#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_2           2
++#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_3           3
++#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_4           4
++#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_5           5
++#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_6           6
++#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_7           7
++#define ARBITRATION_CTRL_DMA                            11:8
++#define ARBITRATION_CTRL_DMA_OFF                        0
++#define ARBITRATION_CTRL_DMA_PRIORITY_1                 1
++#define ARBITRATION_CTRL_DMA_PRIORITY_2                 2
++#define ARBITRATION_CTRL_DMA_PRIORITY_3                 3
++#define ARBITRATION_CTRL_DMA_PRIORITY_4                 4
++#define ARBITRATION_CTRL_DMA_PRIORITY_5                 5
++#define ARBITRATION_CTRL_DMA_PRIORITY_6                 6
++#define ARBITRATION_CTRL_DMA_PRIORITY_7                 7
++#define ARBITRATION_CTRL_VIDEO                          7:4
++#define ARBITRATION_CTRL_VIDEO_OFF                      0
++#define ARBITRATION_CTRL_VIDEO_PRIORITY_1               1
++#define ARBITRATION_CTRL_VIDEO_PRIORITY_2               2
++#define ARBITRATION_CTRL_VIDEO_PRIORITY_3               3
++#define ARBITRATION_CTRL_VIDEO_PRIORITY_4               4
++#define ARBITRATION_CTRL_VIDEO_PRIORITY_5               5
++#define ARBITRATION_CTRL_VIDEO_PRIORITY_6               6
++#define ARBITRATION_CTRL_VIDEO_PRIORITY_7               7
++#define ARBITRATION_CTRL_CRT                            3:0
++#define ARBITRATION_CTRL_CRT_OFF                        0
++#define ARBITRATION_CTRL_CRT_PRIORITY_1                 1
++#define ARBITRATION_CTRL_CRT_PRIORITY_2                 2
++#define ARBITRATION_CTRL_CRT_PRIORITY_3                 3
++#define ARBITRATION_CTRL_CRT_PRIORITY_4                 4
++#define ARBITRATION_CTRL_CRT_PRIORITY_5                 5
++#define ARBITRATION_CTRL_CRT_PRIORITY_6                 6
++#define ARBITRATION_CTRL_CRT_PRIORITY_7                 7
++
++#define CMD_INTPR_CTRL                                  0x000018
++#define CMD_INTPR_CTRL_STATUS                           31:31
++#define CMD_INTPR_CTRL_STATUS_STOPPED                   0
++#define CMD_INTPR_CTRL_STATUS_RUNNING                   1
++#define CMD_INTPR_CTRL_EXT                              27:27
++#define CMD_INTPR_CTRL_EXT_LOCAL                        0
++#define CMD_INTPR_CTRL_EXT_EXTERNAL                     1
++#define CMD_INTPR_CTRL_CS                               26:26
++#define CMD_INTPR_CTRL_CS_0                             0
++#define CMD_INTPR_CTRL_CS_1                             1
++#define CMD_INTPR_CTRL_ADDRESS                          25:0
++
++#define CMD_INTPR_CONDITIONS                            0x00001C
++
++#define CMD_INTPR_RETURN                                0x000020
++#define CMD_INTPR_RETURN_EXT                            27:27
++#define CMD_INTPR_RETURN_EXT_LOCAL                      0
++#define CMD_INTPR_RETURN_EXT_EXTERNAL                   1
++#define CMD_INTPR_RETURN_CS                             26:26
++#define CMD_INTPR_RETURN_CS_0                           0
++#define CMD_INTPR_RETURN_CS_1                           1
++#define CMD_INTPR_RETURN_ADDRESS                        25:0
++
++#define CMD_INTPR_STATUS                                0x000024
++#define CMD_INTPR_STATUS_2D_MEMORY_FIFO                 20:20
++#define CMD_INTPR_STATUS_2D_MEMORY_FIFO_NOT_EMPTY       0
++#define CMD_INTPR_STATUS_2D_MEMORY_FIFO_EMPTY           1
++#define CMD_INTPR_STATUS_COMMAND_FIFO                   19:19
++#define CMD_INTPR_STATUS_COMMAND_FIFO_NOT_EMPTY         0
++#define CMD_INTPR_STATUS_COMMAND_FIFO_EMPTY             1
++#define CMD_INTPR_STATUS_CSC_STATUS                     18:18
++#define CMD_INTPR_STATUS_CSC_STATUS_IDLE                0
++#define CMD_INTPR_STATUS_CSC_STATUS_BUSY                1
++#define CMD_INTPR_STATUS_MEMORY_DMA                     17:17
++#define CMD_INTPR_STATUS_MEMORY_DMA_IDLE                0
++#define CMD_INTPR_STATUS_MEMORY_DMA_BUSY                1
++#define CMD_INTPR_STATUS_CRT_STATUS                     16:16
++#define CMD_INTPR_STATUS_CRT_STATUS_CURRENT             0
++#define CMD_INTPR_STATUS_CRT_STATUS_PENDING             1
++#define CMD_INTPR_STATUS_CURRENT_FIELD                  15:15
++#define CMD_INTPR_STATUS_CURRENT_FIELD_ODD              0
++#define CMD_INTPR_STATUS_CURRENT_FIELD_EVEN             1
++#define CMD_INTPR_STATUS_VIDEO_STATUS                   14:14
++#define CMD_INTPR_STATUS_VIDEO_STATUS_CURRENT           0
++#define CMD_INTPR_STATUS_VIDEO_STATUS_PENDING           1
++#define CMD_INTPR_STATUS_PANEL_STATUS                   13:13
++#define CMD_INTPR_STATUS_PANEL_STATUS_CURRENT           0
++#define CMD_INTPR_STATUS_PANEL_STATUS_PENDING           1
++#define CMD_INTPR_STATUS_CRT_SYNC                       12:12
++#define CMD_INTPR_STATUS_CRT_SYNC_INACTIVE              0
++#define CMD_INTPR_STATUS_CRT_SYNC_ACTIVE                1
++#define CMD_INTPR_STATUS_PANEL_SYNC                     11:11
++#define CMD_INTPR_STATUS_PANEL_SYNC_INACTIVE            0
++#define CMD_INTPR_STATUS_PANEL_SYNC_ACTIVE              1
++#define CMD_INTPR_STATUS_2D_SETUP                       2:2
++#define CMD_INTPR_STATUS_2D_SETUP_IDLE                  0
++#define CMD_INTPR_STATUS_2D_SETUP_BUSY                  1
++#define CMD_INTPR_STATUS_2D_FIFO                        1:1
++#define CMD_INTPR_STATUS_2D_FIFO_NOT_EMPTY              0
++#define CMD_INTPR_STATUS_2D_FIFO_EMPTY                  1
++#define CMD_INTPR_STATUS_2D_ENGINE                      0:0
++#define CMD_INTPR_STATUS_2D_ENGINE_IDLE                 0
++#define CMD_INTPR_STATUS_2D_ENGINE_BUSY                 1
++
++#define RAW_INT_STATUS                                  0x000028
++#define RAW_INT_STATUS_USB_SLAVE_PLUG_IN                5:5
++#define RAW_INT_STATUS_USB_SLAVE_PLUG_IN_INACTIVE       0
++#define RAW_INT_STATUS_USB_SLAVE_PLUG_IN_ACTIVE         1
++#define RAW_INT_STATUS_USB_SLAVE_PLUG_IN_CLEAR          1
++#define RAW_INT_STATUS_ZVPORT                           4:4
++#define RAW_INT_STATUS_ZVPORT_INACTIVE                  0
++#define RAW_INT_STATUS_ZVPORT_ACTIVE                    1
++#define RAW_INT_STATUS_ZVPORT_CLEAR                     1
++#define RAW_INT_STATUS_CRT_VSYNC                        3:3
++#define RAW_INT_STATUS_CRT_VSYNC_INACTIVE               0
++#define RAW_INT_STATUS_CRT_VSYNC_ACTIVE                 1
++#define RAW_INT_STATUS_CRT_VSYNC_CLEAR                  1
++#define RAW_INT_STATUS_USB_SLAVE                        2:2
++#define RAW_INT_STATUS_USB_SLAVE_INACTIVE               0
++#define RAW_INT_STATUS_USB_SLAVE_ACTIVE                 1
++#define RAW_INT_STATUS_USB_SLAVE_CLEAR                  1
++#define RAW_INT_STATUS_PANEL_VSYNC                      1:1
++#define RAW_INT_STATUS_PANEL_VSYNC_INACTIVE             0
++#define RAW_INT_STATUS_PANEL_VSYNC_ACTIVE               1
++#define RAW_INT_STATUS_PANEL_VSYNC_CLEAR                1
++#define RAW_INT_STATUS_CMD_INTPR                        0:0
++#define RAW_INT_STATUS_CMD_INTPR_INACTIVE               0
++#define RAW_INT_STATUS_CMD_INTPR_ACTIVE                 1
++#define RAW_INT_STATUS_CMD_INTPR_CLEAR                  1
++
++#define INT_STATUS                                      0x00002C
++#define INT_STATUS_USB_SLAVE_PLUG_IN                    31:31
++#define INT_STATUS_USB_SLAVE_PLUG_IN_INACTIVE           0
++#define INT_STATUS_USB_SLAVE_PLUG_IN_ACTIVE             1
++#define INT_STATUS_GPIO54                               30:30
++#define INT_STATUS_GPIO54_INACTIVE                      0
++#define INT_STATUS_GPIO54_ACTIVE                        1
++#define INT_STATUS_GPIO53                               29:29
++#define INT_STATUS_GPIO53_INACTIVE                      0
++#define INT_STATUS_GPIO53_ACTIVE                        1
++#define INT_STATUS_GPIO52                               28:28
++#define INT_STATUS_GPIO52_INACTIVE                      0
++#define INT_STATUS_GPIO52_ACTIVE                        1
++#define INT_STATUS_GPIO51                               27:27
++#define INT_STATUS_GPIO51_INACTIVE                      0
++#define INT_STATUS_GPIO51_ACTIVE                        1
++#define INT_STATUS_GPIO50                               26:26
++#define INT_STATUS_GPIO50_INACTIVE                      0
++#define INT_STATUS_GPIO50_ACTIVE                        1
++#define INT_STATUS_GPIO49                               25:25
++#define INT_STATUS_GPIO49_INACTIVE                      0
++#define INT_STATUS_GPIO49_ACTIVE                        1
++#define INT_STATUS_GPIO48                               24:24
++#define INT_STATUS_GPIO48_INACTIVE                      0
++#define INT_STATUS_GPIO48_ACTIVE                        1
++#define INT_STATUS_I2C                                  23:23
++#define INT_STATUS_I2C_INACTIVE                         0
++#define INT_STATUS_I2C_ACTIVE                           1
++#define INT_STATUS_PWM                                  22:22
++#define INT_STATUS_PWM_INACTIVE                         0
++#define INT_STATUS_PWM_ACTIVE                           1
++#define INT_STATUS_DMA                                  20:20
++#define INT_STATUS_DMA_INACTIVE                         0
++#define INT_STATUS_DMA_ACTIVE                           1
++#define INT_STATUS_PCI                                  19:19
++#define INT_STATUS_PCI_INACTIVE                         0
++#define INT_STATUS_PCI_ACTIVE                           1
++#define INT_STATUS_I2S                                  18:18
++#define INT_STATUS_I2S_INACTIVE                         0
++#define INT_STATUS_I2S_ACTIVE                           1
++#define INT_STATUS_AC97                                 17:17
++#define INT_STATUS_AC97_INACTIVE                        0
++#define INT_STATUS_AC97_ACTIVE                          1
++#define INT_STATUS_USB_SLAVE                            16:16
++#define INT_STATUS_USB_SLAVE_INACTIVE                   0
++#define INT_STATUS_USB_SLAVE_ACTIVE                     1
++#define INT_STATUS_UART1                                13:13
++#define INT_STATUS_UART1_INACTIVE                       0
++#define INT_STATUS_UART1_ACTIVE                         1
++#define INT_STATUS_UART0                                12:12
++#define INT_STATUS_UART0_INACTIVE                       0
++#define INT_STATUS_UART0_ACTIVE                         1
++#define INT_STATUS_CRT_VSYNC                            11:11
++#define INT_STATUS_CRT_VSYNC_INACTIVE                   0
++#define INT_STATUS_CRT_VSYNC_ACTIVE                     1
++#define INT_STATUS_8051                                 10:10
++#define INT_STATUS_8051_INACTIVE                        0
++#define INT_STATUS_8051_ACTIVE                          1
++#define INT_STATUS_SSP1                                 9:9
++#define INT_STATUS_SSP1_INACTIVE                        0
++#define INT_STATUS_SSP1_ACTIVE                          1
++#define INT_STATUS_SSP0                                 8:8
++#define INT_STATUS_SSP0_INACTIVE                        0
++#define INT_STATUS_SSP0_ACTIVE                          1
++#define INT_STATUS_USB_HOST                             6:6
++#define INT_STATUS_USB_HOST_INACTIVE                    0
++#define INT_STATUS_USB_HOST_ACTIVE                      1
++#define INT_STATUS_2D                                   3:3
++#define INT_STATUS_2D_INACTIVE                          0
++#define INT_STATUS_2D_ACTIVE                            1
++#define INT_STATUS_ZVPORT                               2:2
++#define INT_STATUS_ZVPORT_INACTIVE                      0
++#define INT_STATUS_ZVPORT_ACTIVE                        1
++#define INT_STATUS_PANEL_VSYNC                          1:1
++#define INT_STATUS_PANEL_VSYNC_INACTIVE                 0
++#define INT_STATUS_PANEL_VSYNC_ACTIVE                   1
++#define INT_STATUS_CMD_INTPR                            0:0
++#define INT_STATUS_CMD_INTPR_INACTIVE                   0
++#define INT_STATUS_CMD_INTPR_ACTIVE                     1
++
++#define INT_MASK                                        0x000030
++#define INT_MASK_USB_SLAVE_PLUG_IN                      31:31
++#define INT_MASK_USB_SLAVE_PLUG_IN_DISABLE              0
++#define INT_MASK_USB_SLAVE_PLUG_IN_ENABLE               1
++#define INT_MASK_GPIO54                                 30:30
++#define INT_MASK_GPIO54_DISABLE                         0
++#define INT_MASK_GPIO54_ENABLE                          1
++#define INT_MASK_GPIO53                                 29:29
++#define INT_MASK_GPIO53_DISABLE                         0
++#define INT_MASK_GPIO53_ENABLE                          1
++#define INT_MASK_GPIO52                                 28:28
++#define INT_MASK_GPIO52_DISABLE                         0
++#define INT_MASK_GPIO52_ENABLE                          1
++#define INT_MASK_GPIO51                                 27:27
++#define INT_MASK_GPIO51_DISABLE                         0
++#define INT_MASK_GPIO51_ENABLE                          1
++#define INT_MASK_GPIO50                                 26:26
++#define INT_MASK_GPIO50_DISABLE                         0
++#define INT_MASK_GPIO50_ENABLE                          1
++#define INT_MASK_GPIO49                                 25:25
++#define INT_MASK_GPIO49_DISABLE                         0
++#define INT_MASK_GPIO49_ENABLE                          1
++#define INT_MASK_GPIO48                                 24:24
++#define INT_MASK_GPIO48_DISABLE                         0
++#define INT_MASK_GPIO48_ENABLE                          1
++#define INT_MASK_I2C                                    23:23
++#define INT_MASK_I2C_DISABLE                            0
++#define INT_MASK_I2C_ENABLE                             1
++#define INT_MASK_PWM                                    22:22
++#define INT_MASK_PWM_DISABLE                            0
++#define INT_MASK_PWM_ENABLE                             1
++#define INT_MASK_DMA                                    20:20
++#define INT_MASK_DMA_DISABLE                            0
++#define INT_MASK_DMA_ENABLE                             1
++#define INT_MASK_PCI                                    19:19
++#define INT_MASK_PCI_DISABLE                            0
++#define INT_MASK_PCI_ENABLE                             1
++#define INT_MASK_I2S                                    18:18
++#define INT_MASK_I2S_DISABLE                            0
++#define INT_MASK_I2S_ENABLE                             1
++#define INT_MASK_AC97                                   17:17
++#define INT_MASK_AC97_DISABLE                           0
++#define INT_MASK_AC97_ENABLE                            1
++#define INT_MASK_USB_SLAVE                              16:16
++#define INT_MASK_USB_SLAVE_DISABLE                      0
++#define INT_MASK_USB_SLAVE_ENABLE                       1
++#define INT_MASK_UART1                                  13:13
++#define INT_MASK_UART1_DISABLE                          0
++#define INT_MASK_UART1_ENABLE                           1
++#define INT_MASK_UART0                                  12:12
++#define INT_MASK_UART0_DISABLE                          0
++#define INT_MASK_UART0_ENABLE                           1
++#define INT_MASK_CRT_VSYNC                              11:11
++#define INT_MASK_CRT_VSYNC_DISABLE                      0
++#define INT_MASK_CRT_VSYNC_ENABLE                       1
++#define INT_MASK_8051                                   10:10
++#define INT_MASK_8051_DISABLE                           0
++#define INT_MASK_8051_ENABLE                            1
++#define INT_MASK_SSP1                                   9:9
++#define INT_MASK_SSP1_DISABLE                           0
++#define INT_MASK_SSP1_ENABLE                            1
++#define INT_MASK_SSP0                                   8:8
++#define INT_MASK_SSP0_DISABLE                           0
++#define INT_MASK_SSP0_ENABLE                            1
++#define INT_MASK_USB_HOST                               6:6
++#define INT_MASK_USB_HOST_DISABLE                       0
++#define INT_MASK_USB_HOST_ENABLE                        1
++#define INT_MASK_2D                                     3:3
++#define INT_MASK_2D_DISABLE                             0
++#define INT_MASK_2D_ENABLE                              1
++#define INT_MASK_ZVPORT                                 2:2
++#define INT_MASK_ZVPORT_DISABLE                         0
++#define INT_MASK_ZVPORT_ENABLE                          1
++#define INT_MASK_PANEL_VSYNC                            1:1
++#define INT_MASK_PANEL_VSYNC_DISABLE                    0
++#define INT_MASK_PANEL_VSYNC_ENABLE                     1
++#define INT_MASK_CMD_INTPR                              0:0
++#define INT_MASK_CMD_INTPR_DISABLE                      0
++#define INT_MASK_CMD_INTPR_ENABLE                       1
++
++#define DEBUG_CTRL                                      0x000034
++#define DEBUG_CTRL_MODULE                               7:5
++#define DEBUG_CTRL_PARTITION                            4:0
++#define DEBUG_CTRL_PARTITION_HIF                        0
++#define DEBUG_CTRL_PARTITION_CPUMEM                     1
++#define DEBUG_CTRL_PARTITION_PCI                        2
++#define DEBUG_CTRL_PARTITION_CMD_INTPR                  3
++#define DEBUG_CTRL_PARTITION_DISPLAY                    4
++#define DEBUG_CTRL_PARTITION_ZVPORT                     5
++#define DEBUG_CTRL_PARTITION_2D                         6
++#define DEBUG_CTRL_PARTITION_MIF                        8
++#define DEBUG_CTRL_PARTITION_USB_HOST                   10
++#define DEBUG_CTRL_PARTITION_SSP0                       12
++#define DEBUG_CTRL_PARTITION_SSP1                       13
++#define DEBUG_CTRL_PARTITION_UART0                      19
++#define DEBUG_CTRL_PARTITION_UART1                      20
++#define DEBUG_CTRL_PARTITION_I2C                        21
++#define DEBUG_CTRL_PARTITION_8051                       23
++#define DEBUG_CTRL_PARTITION_AC97                       24
++#define DEBUG_CTRL_PARTITION_I2S                        25
++#define DEBUG_CTRL_PARTITION_INTMEM                     26
++#define DEBUG_CTRL_PARTITION_DMA                        27
++#define DEBUG_CTRL_PARTITION_SIMULATION                 28
++
++#define CURRENT_POWER_GATE                              0x000038
++#define CURRENT_POWER_GATE_AC97_I2S                     18:18
++#define CURRENT_POWER_GATE_AC97_I2S_DISABLE             0
++#define CURRENT_POWER_GATE_AC97_I2S_ENABLE              1
++#define CURRENT_POWER_GATE_8051                         17:17
++#define CURRENT_POWER_GATE_8051_DISABLE                 0
++#define CURRENT_POWER_GATE_8051_ENABLE                  1
++#define CURRENT_POWER_GATE_PLL                          16:16
++#define CURRENT_POWER_GATE_PLL_DISABLE                  0
++#define CURRENT_POWER_GATE_PLL_ENABLE                   1
++#define CURRENT_POWER_GATE_OSCILLATOR                   15:15
++#define CURRENT_POWER_GATE_OSCILLATOR_DISABLE           0
++#define CURRENT_POWER_GATE_OSCILLATOR_ENABLE            1
++#define CURRENT_POWER_GATE_PLL_RECOVERY                 14:13
++#define CURRENT_POWER_GATE_PLL_RECOVERY_32              0
++#define CURRENT_POWER_GATE_PLL_RECOVERY_64              1
++#define CURRENT_POWER_GATE_PLL_RECOVERY_96              2
++#define CURRENT_POWER_GATE_PLL_RECOVERY_128             3
++#define CURRENT_POWER_GATE_USB_SLAVE                    12:12
++#define CURRENT_POWER_GATE_USB_SLAVE_DISABLE            0
++#define CURRENT_POWER_GATE_USB_SLAVE_ENABLE             1
++#define CURRENT_POWER_GATE_USB_HOST                     11:11
++#define CURRENT_POWER_GATE_USB_HOST_DISABLE             0
++#define CURRENT_POWER_GATE_USB_HOST_ENABLE              1
++#define CURRENT_POWER_GATE_SSP0_SSP1                    10:10
++#define CURRENT_POWER_GATE_SSP0_SSP1_DISABLE            0
++#define CURRENT_POWER_GATE_SSP0_SSP1_ENABLE             1
++#define CURRENT_POWER_GATE_UART1                        8:8
++#define CURRENT_POWER_GATE_UART1_DISABLE                0
++#define CURRENT_POWER_GATE_UART1_ENABLE                 1
++#define CURRENT_POWER_GATE_UART0                        7:7
++#define CURRENT_POWER_GATE_UART0_DISABLE                0
++#define CURRENT_POWER_GATE_UART0_ENABLE                 1
++#define CURRENT_POWER_GATE_GPIO_PWM_I2C                 6:6
++#define CURRENT_POWER_GATE_GPIO_PWM_I2C_DISABLE         0
++#define CURRENT_POWER_GATE_GPIO_PWM_I2C_ENABLE          1
++#define CURRENT_POWER_GATE_ZVPORT                       5:5
++#define CURRENT_POWER_GATE_ZVPORT_DISABLE               0
++#define CURRENT_POWER_GATE_ZVPORT_ENABLE                1
++#define CURRENT_POWER_GATE_CSC                          4:4
++#define CURRENT_POWER_GATE_CSC_DISABLE                  0
++#define CURRENT_POWER_GATE_CSC_ENABLE                   1
++#define CURRENT_POWER_GATE_2D                           3:3
++#define CURRENT_POWER_GATE_2D_DISABLE                   0
++#define CURRENT_POWER_GATE_2D_ENABLE                    1
++#define CURRENT_POWER_GATE_DISPLAY                      2:2
++#define CURRENT_POWER_GATE_DISPLAY_DISABLE              0
++#define CURRENT_POWER_GATE_DISPLAY_ENABLE               1
++#define CURRENT_POWER_GATE_INTMEM                       1:1
++#define CURRENT_POWER_GATE_INTMEM_DISABLE               0
++#define CURRENT_POWER_GATE_INTMEM_ENABLE                1
++#define CURRENT_POWER_GATE_HOST                         0:0
++#define CURRENT_POWER_GATE_HOST_DISABLE                 0
++#define CURRENT_POWER_GATE_HOST_ENABLE                  1
++
++#define CURRENT_POWER_CLOCK                             0x00003C
++#define CURRENT_POWER_CLOCK_P1XCLK               31:31
++#define CURRENT_POWER_CLOCK_P1XCLK_ENABLE               1
++#define CURRENT_POWER_CLOCK_P1XCLK_DISABLE              0
++#define CURRENT_POWER_CLOCK_PLLCLK_SELECT               30:30
++#define CURRENT_POWER_CLOCK_PLLCLK_SELECT_ENABLE               1
++#define CURRENT_POWER_CLOCK_PLLCLK_SELECT_DISABLE              0
++#define CURRENT_POWER_CLOCK_P2XCLK_SELECT               29:29
++#define CURRENT_POWER_CLOCK_P2XCLK_SELECT_288           0
++#define CURRENT_POWER_CLOCK_P2XCLK_SELECT_336           1
++#define CURRENT_POWER_CLOCK_P2XCLK_DIVIDER              28:27
++#define CURRENT_POWER_CLOCK_P2XCLK_DIVIDER_1            0
++#define CURRENT_POWER_CLOCK_P2XCLK_DIVIDER_3            1
++#define CURRENT_POWER_CLOCK_P2XCLK_DIVIDER_5            2
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT                26:24
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT_0              0
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT_1              1
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT_2              2
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT_3              3
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT_4              4
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT_5              5
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT_6              6
++#define CURRENT_POWER_CLOCK_P2XCLK_SHIFT_7              7
++#define CURRENT_POWER_CLOCK_V2XCLK_SELECT               20:20
++#define CURRENT_POWER_CLOCK_V2XCLK_SELECT_288           0
++#define CURRENT_POWER_CLOCK_V2XCLK_SELECT_336           1
++#define CURRENT_POWER_CLOCK_V2XCLK_DIVIDER              19:19
++#define CURRENT_POWER_CLOCK_V2XCLK_DIVIDER_1            0
++#define CURRENT_POWER_CLOCK_V2XCLK_DIVIDER_3            1
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT                18:16
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT_0              0
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT_1              1
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT_2              2
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT_3              3
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT_4              4
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT_5              5
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT_6              6
++#define CURRENT_POWER_CLOCK_V2XCLK_SHIFT_7              7
++#define CURRENT_POWER_CLOCK_MCLK_SELECT                 12:12
++#define CURRENT_POWER_CLOCK_MCLK_SELECT_288             0
++#define CURRENT_POWER_CLOCK_MCLK_SELECT_336             1
++#define CURRENT_POWER_CLOCK_MCLK_DIVIDER                11:11
++#define CURRENT_POWER_CLOCK_MCLK_DIVIDER_1              0
++#define CURRENT_POWER_CLOCK_MCLK_DIVIDER_3              1
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT                  10:8
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT_0                0
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT_1                1
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT_2                2
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT_3                3
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT_4                4
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT_5                5
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT_6                6
++#define CURRENT_POWER_CLOCK_MCLK_SHIFT_7                7
++#define CURRENT_POWER_CLOCK_M2XCLK_SELECT               4:4
++#define CURRENT_POWER_CLOCK_M2XCLK_SELECT_288           0
++#define CURRENT_POWER_CLOCK_M2XCLK_SELECT_336           1
++#define CURRENT_POWER_CLOCK_M2XCLK_DIVIDER              3:3
++#define CURRENT_POWER_CLOCK_M2XCLK_DIVIDER_1            0
++#define CURRENT_POWER_CLOCK_M2XCLK_DIVIDER_3            1
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT                2:0
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT_0              0
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT_1              1
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT_2              2
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT_3              3
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT_4              4
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT_5              5
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT_6              6
++#define CURRENT_POWER_CLOCK_M2XCLK_SHIFT_7              7
++
++#define POWER_MODE0_GATE                                0x000040
++#define POWER_MODE0_GATE_AC97_I2S                       18:18
++#define POWER_MODE0_GATE_AC97_I2S_DISABLE               0
++#define POWER_MODE0_GATE_AC97_I2S_ENABLE                1
++#define POWER_MODE0_GATE_8051                           17:17
++#define POWER_MODE0_GATE_8051_DISABLE                   0
++#define POWER_MODE0_GATE_8051_ENABLE                    1
++#define POWER_MODE0_GATE_USB_SLAVE                      12:12
++#define POWER_MODE0_GATE_USB_SLAVE_DISABLE              0
++#define POWER_MODE0_GATE_USB_SLAVE_ENABLE               1
++#define POWER_MODE0_GATE_USB_HOST                       11:11
++#define POWER_MODE0_GATE_USB_HOST_DISABLE               0
++#define POWER_MODE0_GATE_USB_HOST_ENABLE                1
++#define POWER_MODE0_GATE_SSP0_SSP1                      10:10
++#define POWER_MODE0_GATE_SSP0_SSP1_DISABLE              0
++#define POWER_MODE0_GATE_SSP0_SSP1_ENABLE               1
++#define POWER_MODE0_GATE_UART1                          8:8
++#define POWER_MODE0_GATE_UART1_DISABLE                  0
++#define POWER_MODE0_GATE_UART1_ENABLE                   1
++#define POWER_MODE0_GATE_UART0                          7:7
++#define POWER_MODE0_GATE_UART0_DISABLE                  0
++#define POWER_MODE0_GATE_UART0_ENABLE                   1
++#define POWER_MODE0_GATE_GPIO_PWM_I2C                   6:6
++#define POWER_MODE0_GATE_GPIO_PWM_I2C_DISABLE           0
++#define POWER_MODE0_GATE_GPIO_PWM_I2C_ENABLE            1
++#define POWER_MODE0_GATE_ZVPORT                         5:5
++#define POWER_MODE0_GATE_ZVPORT_DISABLE                 0
++#define POWER_MODE0_GATE_ZVPORT_ENABLE                  1
++#define POWER_MODE0_GATE_CSC                            4:4
++#define POWER_MODE0_GATE_CSC_DISABLE                    0
++#define POWER_MODE0_GATE_CSC_ENABLE                     1
++#define POWER_MODE0_GATE_2D                             3:3
++#define POWER_MODE0_GATE_2D_DISABLE                     0
++#define POWER_MODE0_GATE_2D_ENABLE                      1
++#define POWER_MODE0_GATE_DISPLAY                        2:2
++#define POWER_MODE0_GATE_DISPLAY_DISABLE                0
++#define POWER_MODE0_GATE_DISPLAY_ENABLE                 1
++#define POWER_MODE0_GATE_INTMEM                         1:1
++#define POWER_MODE0_GATE_INTMEM_DISABLE                 0
++#define POWER_MODE0_GATE_INTMEM_ENABLE                  1
++#define POWER_MODE0_GATE_HOST                           0:0
++#define POWER_MODE0_GATE_HOST_DISABLE                   0
++#define POWER_MODE0_GATE_HOST_ENABLE                    1
++
++#define POWER_MODE0_CLOCK                               0x000044
++#define POWER_MODE0_CLOCK_PLL3_P1XCLK					31:31
++#define POWER_MODE0_CLOCK_PLL3_P1XCLK_ENABLE			1
++#define POWER_MODE0_CLOCK_PLL3_P1XCLK_DISABLE			0
++#define POWER_MODE0_CLOCK_PLL3							30:30
++#define POWER_MODE0_CLOCK_PLL3_ENABLE					1
++#define POWER_MODE0_CLOCK_PLL3_DISABLE					0							
++#define POWER_MODE0_CLOCK_P2XCLK_SELECT                 29:29
++#define POWER_MODE0_CLOCK_P2XCLK_SELECT_288             0
++#define POWER_MODE0_CLOCK_P2XCLK_SELECT_336             1
++#define POWER_MODE0_CLOCK_P2XCLK_DIVIDER                28:27
++#define POWER_MODE0_CLOCK_P2XCLK_DIVIDER_1              0
++#define POWER_MODE0_CLOCK_P2XCLK_DIVIDER_3              1
++#define POWER_MODE0_CLOCK_P2XCLK_DIVIDER_5              2
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT                  26:24
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_0                0
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_1                1
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_2                2
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_3                3
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_4                4
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_5                5
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_6                6
++#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_7                7
++#define POWER_MODE0_CLOCK_V2XCLK_SELECT                 20:20
++#define POWER_MODE0_CLOCK_V2XCLK_SELECT_288             0
++#define POWER_MODE0_CLOCK_V2XCLK_SELECT_336             1
++#define POWER_MODE0_CLOCK_V2XCLK_DIVIDER                19:19
++#define POWER_MODE0_CLOCK_V2XCLK_DIVIDER_1              0
++#define POWER_MODE0_CLOCK_V2XCLK_DIVIDER_3              1
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT                  18:16
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_0                0
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_1                1
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_2                2
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_3                3
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_4                4
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_5                5
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_6                6
++#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_7                7
++#define POWER_MODE0_CLOCK_MCLK_SELECT                   12:12
++#define POWER_MODE0_CLOCK_MCLK_SELECT_288               0
++#define POWER_MODE0_CLOCK_MCLK_SELECT_336               1
++#define POWER_MODE0_CLOCK_MCLK_DIVIDER                  11:11
++#define POWER_MODE0_CLOCK_MCLK_DIVIDER_1                0
++#define POWER_MODE0_CLOCK_MCLK_DIVIDER_3                1
++#define POWER_MODE0_CLOCK_MCLK_SHIFT                    10:8
++#define POWER_MODE0_CLOCK_MCLK_SHIFT_0                  0
++#define POWER_MODE0_CLOCK_MCLK_SHIFT_1                  1
++#define POWER_MODE0_CLOCK_MCLK_SHIFT_2                  2
++#define POWER_MODE0_CLOCK_MCLK_SHIFT_3                  3
++#define POWER_MODE0_CLOCK_MCLK_SHIFT_4                  4
++#define POWER_MODE0_CLOCK_MCLK_SHIFT_5                  5
++#define POWER_MODE0_CLOCK_MCLK_SHIFT_6                  6
++#define POWER_MODE0_CLOCK_MCLK_SHIFT_7                  7
++#define POWER_MODE0_CLOCK_M2XCLK_SELECT                 4:4
++#define POWER_MODE0_CLOCK_M2XCLK_SELECT_288             0
++#define POWER_MODE0_CLOCK_M2XCLK_SELECT_336             1
++#define POWER_MODE0_CLOCK_M2XCLK_DIVIDER                3:3
++#define POWER_MODE0_CLOCK_M2XCLK_DIVIDER_1              0
++#define POWER_MODE0_CLOCK_M2XCLK_DIVIDER_3              1
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT                  2:0
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_0                0
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_1                1
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_2                2
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_3                3
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_4                4
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_5                5
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_6                6
++#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_7                7
++
++#define POWER_MODE1_GATE                                0x000048
++#define POWER_MODE1_GATE_AC97_I2S                       18:18
++#define POWER_MODE1_GATE_AC97_I2S_DISABLE               0
++#define POWER_MODE1_GATE_AC97_I2S_ENABLE                1
++#define POWER_MODE1_GATE_8051                           17:17
++#define POWER_MODE1_GATE_8051_DISABLE                   0
++#define POWER_MODE1_GATE_8051_ENABLE                    1
++#define POWER_MODE1_GATE_USB_SLAVE                      12:12
++#define POWER_MODE1_GATE_USB_SLAVE_DISABLE              0
++#define POWER_MODE1_GATE_USB_SLAVE_ENABLE               1
++#define POWER_MODE1_GATE_USB_HOST                       11:11
++#define POWER_MODE1_GATE_USB_HOST_DISABLE               0
++#define POWER_MODE1_GATE_USB_HOST_ENABLE                1
++#define POWER_MODE1_GATE_SSP0_SSP1                      10:10
++#define POWER_MODE1_GATE_SSP0_SSP1_DISABLE              0
++#define POWER_MODE1_GATE_SSP0_SSP1_ENABLE               1
++#define POWER_MODE1_GATE_UART1                          8:8
++#define POWER_MODE1_GATE_UART1_DISABLE                  0
++#define POWER_MODE1_GATE_UART1_ENABLE                   1
++#define POWER_MODE1_GATE_UART0                          7:7
++#define POWER_MODE1_GATE_UART0_DISABLE                  0
++#define POWER_MODE1_GATE_UART0_ENABLE                   1
++#define POWER_MODE1_GATE_GPIO_PWM_I2C                   6:6
++#define POWER_MODE1_GATE_GPIO_PWM_I2C_DISABLE           0
++#define POWER_MODE1_GATE_GPIO_PWM_I2C_ENABLE            1
++#define POWER_MODE1_GATE_ZVPORT                         5:5
++#define POWER_MODE1_GATE_ZVPORT_DISABLE                 0
++#define POWER_MODE1_GATE_ZVPORT_ENABLE                  1
++#define POWER_MODE1_GATE_CSC                            4:4
++#define POWER_MODE1_GATE_CSC_DISABLE                    0
++#define POWER_MODE1_GATE_CSC_ENABLE                     1
++#define POWER_MODE1_GATE_2D                             3:3
++#define POWER_MODE1_GATE_2D_DISABLE                     0
++#define POWER_MODE1_GATE_2D_ENABLE                      1
++#define POWER_MODE1_GATE_DISPLAY                        2:2
++#define POWER_MODE1_GATE_DISPLAY_DISABLE                0
++#define POWER_MODE1_GATE_DISPLAY_ENABLE                 1
++#define POWER_MODE1_GATE_INTMEM                         1:1
++#define POWER_MODE1_GATE_INTMEM_DISABLE                 0
++#define POWER_MODE1_GATE_INTMEM_ENABLE                  1
++#define POWER_MODE1_GATE_HOST                           0:0
++#define POWER_MODE1_GATE_HOST_DISABLE                   0
++#define POWER_MODE1_GATE_HOST_ENABLE                    1
++
++#define POWER_MODE1_CLOCK                               0x00004C
++#define POWER_MODE1_CLOCK_PLL3_P1XCLK					31:31
++#define POWER_MODE1_CLOCK_PLL3_P1XCLK_ENABLE			1
++#define POWER_MODE1_CLOCK_PLL3_P1XCLK_DISABLE			0
++#define POWER_MODE1_CLOCK_PLL3							30:30
++#define POWER_MODE1_CLOCK_PLL3_ENABLE					1
++#define POWER_MODE1_CLOCK_PLL3_DISABLE					0							
++#define POWER_MODE1_CLOCK_P2XCLK_SELECT                 29:29
++#define POWER_MODE1_CLOCK_P2XCLK_SELECT_288             0
++#define POWER_MODE1_CLOCK_P2XCLK_SELECT_336             1
++#define POWER_MODE1_CLOCK_P2XCLK_DIVIDER                28:27
++#define POWER_MODE1_CLOCK_P2XCLK_DIVIDER_1              0
++#define POWER_MODE1_CLOCK_P2XCLK_DIVIDER_3              1
++#define POWER_MODE1_CLOCK_P2XCLK_DIVIDER_5              2
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT                  26:24
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_0                0
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_1                1
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_2                2
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_3                3
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_4                4
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_5                5
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_6                6
++#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_7                7
++#define POWER_MODE1_CLOCK_V2XCLK_SELECT                 20:20
++#define POWER_MODE1_CLOCK_V2XCLK_SELECT_288             0
++#define POWER_MODE1_CLOCK_V2XCLK_SELECT_336             1
++#define POWER_MODE1_CLOCK_V2XCLK_DIVIDER                19:19
++#define POWER_MODE1_CLOCK_V2XCLK_DIVIDER_1              0
++#define POWER_MODE1_CLOCK_V2XCLK_DIVIDER_3              1
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT                  18:16
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_0                0
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_1                1
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_2                2
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_3                3
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_4                4
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_5                5
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_6                6
++#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_7                7
++#define POWER_MODE1_CLOCK_MCLK_SELECT                   12:12
++#define POWER_MODE1_CLOCK_MCLK_SELECT_288               0
++#define POWER_MODE1_CLOCK_MCLK_SELECT_336               1
++#define POWER_MODE1_CLOCK_MCLK_DIVIDER                  11:11
++#define POWER_MODE1_CLOCK_MCLK_DIVIDER_1                0
++#define POWER_MODE1_CLOCK_MCLK_DIVIDER_3                1
++#define POWER_MODE1_CLOCK_MCLK_SHIFT                    10:8
++#define POWER_MODE1_CLOCK_MCLK_SHIFT_0                  0
++#define POWER_MODE1_CLOCK_MCLK_SHIFT_1                  1
++#define POWER_MODE1_CLOCK_MCLK_SHIFT_2                  2
++#define POWER_MODE1_CLOCK_MCLK_SHIFT_3                  3
++#define POWER_MODE1_CLOCK_MCLK_SHIFT_4                  4
++#define POWER_MODE1_CLOCK_MCLK_SHIFT_5                  5
++#define POWER_MODE1_CLOCK_MCLK_SHIFT_6                  6
++#define POWER_MODE1_CLOCK_MCLK_SHIFT_7                  7
++#define POWER_MODE1_CLOCK_M2XCLK_SELECT                 4:4
++#define POWER_MODE1_CLOCK_M2XCLK_SELECT_288             0
++#define POWER_MODE1_CLOCK_M2XCLK_SELECT_336             1
++#define POWER_MODE1_CLOCK_M2XCLK_DIVIDER                3:3
++#define POWER_MODE1_CLOCK_M2XCLK_DIVIDER_1              0
++#define POWER_MODE1_CLOCK_M2XCLK_DIVIDER_3              1
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT                  2:0
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_0                0
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_1                1
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_2                2
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_3                3
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_4                4
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_5                5
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_6                6
++#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_7                7
++
++#define POWER_SLEEP_GATE                                0x000050
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK             22:19
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_4096        0
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_2048        1
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_1024        2
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_512         3
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_256         4
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_128         5
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_64          6
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_32          7
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_16          8
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_8           9
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_4           10
++#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_2           11
++#define POWER_SLEEP_GATE_PLL_RECOVERY                   14:13
++#define POWER_SLEEP_GATE_PLL_RECOVERY_32                0
++#define POWER_SLEEP_GATE_PLL_RECOVERY_64                1
++#define POWER_SLEEP_GATE_PLL_RECOVERY_96                2
++#define POWER_SLEEP_GATE_PLL_RECOVERY_128               3
++
++#define POWER_MODE_CTRL                                 0x000054
++#define POWER_MODE_CTRL_SLEEP_STATUS                    2:2
++#define POWER_MODE_CTRL_SLEEP_STATUS_INACTIVE           0
++#define POWER_MODE_CTRL_SLEEP_STATUS_ACTIVE             1
++#define POWER_MODE_CTRL_MODE                            1:0
++#define POWER_MODE_CTRL_MODE_MODE0                      0
++#define POWER_MODE_CTRL_MODE_MODE1                      1
++#define POWER_MODE_CTRL_MODE_SLEEP                      2
++
++#define PCI_MASTER_BASE                                 0x000058
++#define PCI_MASTER_BASE_ADDRESS                         31:20
++
++#define ENDIAN_CTRL                                     0x00005C
++#define ENDIAN_CTRL_ENDIAN                              0:0
++#define ENDIAN_CTRL_ENDIAN_LITTLE                       0
++#define ENDIAN_CTRL_ENDIAN_BIG                          1
++
++#define DEVICE_ID                                       0x000060
++#define DEVICE_ID_DEVICE_ID                             31:16
++#define DEVICE_ID_REVISION_ID                           7:0
++
++#define PLL_CLOCK_COUNT                                 0x000064
++#define PLL_CLOCK_COUNT_COUNTER                         15:0
++
++#define SYSTEM_DRAM_CTRL                                0x000068
++#define SYSTEM_DRAM_CTRL_READ_DELAY                     2:0
++#define SYSTEM_DRAM_CTRL_READ_DELAY_OFF                 0
++#define SYSTEM_DRAM_CTRL_READ_DELAY_0_5NS               1
++#define SYSTEM_DRAM_CTRL_READ_DELAY_1NS                 2
++#define SYSTEM_DRAM_CTRL_READ_DELAY_1_5NS               3
++#define SYSTEM_DRAM_CTRL_READ_DELAY_2NS                 4
++#define SYSTEM_DRAM_CTRL_READ_DELAY_2_5NS               5
++
++#define SYSTEM_PLL3_CLOCK								0x000074
++#define SYSTEM_PLL3_CLOCK_M								7:0
++#define SYSTEM_PLL3_CLOCK_N								14:8
++#define SYSTEM_PLL3_CLOCK_DIVIDE						15:15
++#define SYSTEM_PLL3_CLOCK_DIVIDE_1						0
++#define SYSTEM_PLL3_CLOCK_DIVIDE_2						1
++#define SYSTEM_PLL3_CLOCK_INPUT							16:16
++#define SYSTEM_PLL3_CLOCK_INPUT_CRYSTAL					0
++#define SYSTEM_PLL3_CLOCK_INPUT_TEST					1
++#define SYSTEM_PLL3_CLOCK_POWER							17:17
++#define SYSTEM_PLL3_CLOCK_POWER_OFF						0
++#define SYSTEM_PLL3_CLOCK_POWER_ON						1						
++
++
++#define CURRENT_POWER_PLLCLOCK                    0x000074
++#define CURRENT_POWER_PLLCLOCK_TEST_OUTPUT            	20:20
++#define CURRENT_POWER_PLLCLOCK_TEST_OUTPUT_ENABLE		1
++#define CURRENT_POWER_PLLCLOCK_TEST_OUTPUT_DISABLE      	0
++#define CURRENT_POWER_PLLCLOCK_TESTMODE              	19:18
++#define CURRENT_POWER_PLLCLOCK_TESTMODE_ENABLE              	1
++#define CURRENT_POWER_PLLCLOCK_TESTMODE_DISABLE            	0
++#define CURRENT_POWER_PLLCLOCK_POWER              	17:17
++#define CURRENT_POWER_PLLCLOCK_POWER_DOWN              	0
++#define CURRENT_POWER_PLLCLOCK_POWER_ON              	1
++#define CURRENT_POWER_PLLCLOCK_INPUT_SELECT              16:16
++#define CURRENT_POWER_PLLCLOCK_INPUT_SELECT_TEST        1
++#define CURRENT_POWER_PLLCLOCK_INPUT_SELECT_CRYSTAL    0
++#define CURRENT_POWER_PLLCLOCK_DIVIDEBY2                    15:15
++#define CURRENT_POWER_PLLCLOCK_DIVIDE_N                     14:8
++#define CURRENT_POWER_PLLCLOCK_MULTIPLE_M                     7:0
++
++// Panel Graphics Control
++
++#define PANEL_DISPLAY_CTRL                              0x080000
++#define PANEL_DISPLAY_CTRL_FPEN                         27:27
++#define PANEL_DISPLAY_CTRL_FPEN_LOW                     0
++#define PANEL_DISPLAY_CTRL_FPEN_HIGH                    1
++#define PANEL_DISPLAY_CTRL_VBIASEN                      26:26
++#define PANEL_DISPLAY_CTRL_VBIASEN_LOW                  0
++#define PANEL_DISPLAY_CTRL_VBIASEN_HIGH                 1
++#define PANEL_DISPLAY_CTRL_DATA                         25:25
++#define PANEL_DISPLAY_CTRL_DATA_DISABLE                 0
++#define PANEL_DISPLAY_CTRL_DATA_ENABLE                  1
++#define PANEL_DISPLAY_CTRL_FPVDDEN                      24:24
++#define PANEL_DISPLAY_CTRL_FPVDDEN_LOW                  0
++#define PANEL_DISPLAY_CTRL_FPVDDEN_HIGH                 1
++#define PANEL_DISPLAY_CTRL_PATTERN                      23:23
++#define PANEL_DISPLAY_CTRL_PATTERN_4                    0
++#define PANEL_DISPLAY_CTRL_PATTERN_8                    1
++#define PANEL_DISPLAY_CTRL_TFT                          22:21
++#define PANEL_DISPLAY_CTRL_TFT_24                       0
++#define PANEL_DISPLAY_CTRL_TFT_9                        1
++#define PANEL_DISPLAY_CTRL_TFT_12                       2
++#define PANEL_DISPLAY_CTRL_DITHER                       20:20
++#define PANEL_DISPLAY_CTRL_DITHER_DISABLE               0
++#define PANEL_DISPLAY_CTRL_DITHER_ENABLE                1
++#define PANEL_DISPLAY_CTRL_LCD                          19:18
++#define PANEL_DISPLAY_CTRL_LCD_TFT                      0
++#define PANEL_DISPLAY_CTRL_LCD_STN_8                    2
++#define PANEL_DISPLAY_CTRL_LCD_STN_12                   3
++#define PANEL_DISPLAY_CTRL_FIFO                         17:16
++#define PANEL_DISPLAY_CTRL_FIFO_1                       0
++#define PANEL_DISPLAY_CTRL_FIFO_3                       1
++#define PANEL_DISPLAY_CTRL_FIFO_7                       2
++#define PANEL_DISPLAY_CTRL_FIFO_11                      3
++#define PANEL_DISPLAY_CTRL_CLOCK_PHASE                  14:14
++#define PANEL_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_HIGH      0
++#define PANEL_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_LOW       1
++#define PANEL_DISPLAY_CTRL_VSYNC_PHASE                  13:13
++#define PANEL_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_HIGH      0
++#define PANEL_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_LOW       1
++#define PANEL_DISPLAY_CTRL_HSYNC_PHASE                  12:12
++#define PANEL_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_HIGH      0
++#define PANEL_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_LOW       1
++#define PANEL_DISPLAY_CTRL_COLOR_KEY                    9:9
++#define PANEL_DISPLAY_CTRL_COLOR_KEY_DISABLE            0
++#define PANEL_DISPLAY_CTRL_COLOR_KEY_ENABLE             1
++#define PANEL_DISPLAY_CTRL_TIMING                       8:8
++#define PANEL_DISPLAY_CTRL_TIMING_DISABLE               0
++#define PANEL_DISPLAY_CTRL_TIMING_ENABLE                1
++#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR             7:7
++#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR_DOWN        0
++#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR_UP          1
++#define PANEL_DISPLAY_CTRL_VERTICAL_PAN                 6:6
++#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DISABLE         0
++#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_ENABLE          1
++#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR           5:5
++#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR_RIGHT     0
++#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR_LEFT      1
++#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN               4:4
++#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DISABLE       0
++#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_ENABLE        1
++#define PANEL_DISPLAY_CTRL_GAMMA                        3:3
++#define PANEL_DISPLAY_CTRL_GAMMA_DISABLE                0
++#define PANEL_DISPLAY_CTRL_GAMMA_ENABLE                 1
++#define PANEL_DISPLAY_CTRL_PLANE                        2:2
++#define PANEL_DISPLAY_CTRL_PLANE_DISABLE                0
++#define PANEL_DISPLAY_CTRL_PLANE_ENABLE                 1
++#define PANEL_DISPLAY_CTRL_FORMAT                       1:0
++#define PANEL_DISPLAY_CTRL_FORMAT_8                     0
++#define PANEL_DISPLAY_CTRL_FORMAT_16                    1
++#define PANEL_DISPLAY_CTRL_FORMAT_32                    2
++
++#define PANEL_PAN_CTRL                                  0x080004
++#define PANEL_PAN_CTRL_VERTICAL_PAN                     31:24
++#define PANEL_PAN_CTRL_VERTICAL_VSYNC                   21:16
++#define PANEL_PAN_CTRL_HORIZONTAL_PAN                   15:8
++#define PANEL_PAN_CTRL_HORIZONTAL_VSYNC                 5:0
++
++#define PANEL_COLOR_KEY                                 0x080008
++#define PANEL_COLOR_KEY_MASK                            31:16
++#define PANEL_COLOR_KEY_VALUE                           15:0
++
++#define PANEL_FB_ADDRESS                                0x08000C
++#define PANEL_FB_ADDRESS_STATUS                         31:31
++#define PANEL_FB_ADDRESS_STATUS_CURRENT                 0
++#define PANEL_FB_ADDRESS_STATUS_PENDING                 1
++#define PANEL_FB_ADDRESS_EXT                            27:27
++#define PANEL_FB_ADDRESS_EXT_LOCAL                      0
++#define PANEL_FB_ADDRESS_EXT_EXTERNAL                   1
++#define PANEL_FB_ADDRESS_CS                             26:26
++#define PANEL_FB_ADDRESS_CS_0                           0
++#define PANEL_FB_ADDRESS_CS_1                           1
++#define PANEL_FB_ADDRESS_ADDRESS                        25:0
++
++#define PANEL_FB_WIDTH                                  0x080010
++#define PANEL_FB_WIDTH_WIDTH                            29:16
++#define PANEL_FB_WIDTH_OFFSET                           13:0
++
++#define PANEL_WINDOW_WIDTH                              0x080014
++#define PANEL_WINDOW_WIDTH_WIDTH                        27:16
++#define PANEL_WINDOW_WIDTH_X                            11:0
++
++#define PANEL_WINDOW_HEIGHT                             0x080018
++#define PANEL_WINDOW_HEIGHT_HEIGHT                      27:16
++#define PANEL_WINDOW_HEIGHT_Y                           11:0
++
++#define PANEL_PLANE_TL                                  0x08001C
++#define PANEL_PLANE_TL_TOP                              26:16
++#define PANEL_PLANE_TL_LEFT                             10:0
++
++#define PANEL_PLANE_BR                                  0x080020
++#define PANEL_PLANE_BR_BOTTOM                           26:16
++#define PANEL_PLANE_BR_RIGHT                            10:0
++
++#define PANEL_HORIZONTAL_TOTAL                          0x080024
++#define PANEL_HORIZONTAL_TOTAL_TOTAL                    27:16
++#define PANEL_HORIZONTAL_TOTAL_DISPLAY_END              11:0
++
++#define PANEL_HORIZONTAL_SYNC                           0x080028
++#define PANEL_HORIZONTAL_SYNC_WIDTH                     23:16
++#define PANEL_HORIZONTAL_SYNC_START                     11:0
++
++#define PANEL_VERTICAL_TOTAL                            0x08002C
++#define PANEL_VERTICAL_TOTAL_TOTAL                      26:16
++#define PANEL_VERTICAL_TOTAL_DISPLAY_END                10:0
++
++#define PANEL_VERTICAL_SYNC                             0x080030
++#define PANEL_VERTICAL_SYNC_HEIGHT                      21:16
++#define PANEL_VERTICAL_SYNC_START                       10:0
++
++#define PANEL_CURRENT_LINE                              0x080034
++#define PANEL_CURRENT_LINE_LINE                         10:0
++
++// Video Control
++
++#define VIDEO_DISPLAY_CTRL                              0x080040
++#define VIDEO_DISPLAY_CTRL_FIFO                         17:16
++#define VIDEO_DISPLAY_CTRL_FIFO_1                       0
++#define VIDEO_DISPLAY_CTRL_FIFO_3                       1
++#define VIDEO_DISPLAY_CTRL_FIFO_7                       2
++#define VIDEO_DISPLAY_CTRL_FIFO_11                      3
++#define VIDEO_DISPLAY_CTRL_BUFFER                       15:15
++#define VIDEO_DISPLAY_CTRL_BUFFER_0                     0
++#define VIDEO_DISPLAY_CTRL_BUFFER_1                     1
++#define VIDEO_DISPLAY_CTRL_CAPTURE                      14:14
++#define VIDEO_DISPLAY_CTRL_CAPTURE_DISABLE              0
++#define VIDEO_DISPLAY_CTRL_CAPTURE_ENABLE               1
++#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER                13:13
++#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER_DISABLE        0
++#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER_ENABLE         1
++#define VIDEO_DISPLAY_CTRL_BYTE_SWAP                    12:12
++#define VIDEO_DISPLAY_CTRL_BYTE_SWAP_DISABLE            0
++#define VIDEO_DISPLAY_CTRL_BYTE_SWAP_ENABLE             1
++#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE               11:11
++#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE_NORMAL        0
++#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE_HALF          1
++#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE             10:10
++#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE_NORMAL      0
++#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE_HALF        1
++#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE                9:9
++#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE_REPLICATE      0
++#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE_INTERPOLATE    1
++#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE              8:8
++#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE_REPLICATE    0
++#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE_INTERPOLATE  1
++#define VIDEO_DISPLAY_CTRL_PIXEL                        7:4
++#define VIDEO_DISPLAY_CTRL_GAMMA                        3:3
++#define VIDEO_DISPLAY_CTRL_GAMMA_DISABLE                0
++#define VIDEO_DISPLAY_CTRL_GAMMA_ENABLE                 1
++#define VIDEO_DISPLAY_CTRL_PLANE                        2:2
++#define VIDEO_DISPLAY_CTRL_PLANE_DISABLE                0
++#define VIDEO_DISPLAY_CTRL_PLANE_ENABLE                 1
++#define VIDEO_DISPLAY_CTRL_FORMAT                       1:0
++#define VIDEO_DISPLAY_CTRL_FORMAT_8                     0
++#define VIDEO_DISPLAY_CTRL_FORMAT_16                    1
++#define VIDEO_DISPLAY_CTRL_FORMAT_32                    2
++#define VIDEO_DISPLAY_CTRL_FORMAT_YUV                   3
++
++#define VIDEO_FB_0_ADDRESS                              0x080044
++#define VIDEO_FB_0_ADDRESS_STATUS                       31:31
++#define VIDEO_FB_0_ADDRESS_STATUS_CURRENT               0
++#define VIDEO_FB_0_ADDRESS_STATUS_PENDING               1
++#define VIDEO_FB_0_ADDRESS_EXT                          27:27
++#define VIDEO_FB_0_ADDRESS_EXT_LOCAL                    0
++#define VIDEO_FB_0_ADDRESS_EXT_EXTERNAL                 1
++#define VIDEO_FB_0_ADDRESS_CS                           26:26
++#define VIDEO_FB_0_ADDRESS_CS_0                         0
++#define VIDEO_FB_0_ADDRESS_CS_1                         1
++#define VIDEO_FB_0_ADDRESS_ADDRESS                      25:0
++
++#define VIDEO_FB_WIDTH                                  0x080048
++#define VIDEO_FB_WIDTH_WIDTH                            29:16
++#define VIDEO_FB_WIDTH_OFFSET                           13:0
++
++#define VIDEO_FB_0_LAST_ADDRESS                         0x08004C
++#define VIDEO_FB_0_LAST_ADDRESS_EXT                     27:27
++#define VIDEO_FB_0_LAST_ADDRESS_EXT_LOCAL               0
++#define VIDEO_FB_0_LAST_ADDRESS_EXT_EXTERNAL            1
++#define VIDEO_FB_0_LAST_ADDRESS_CS                      26:26
++#define VIDEO_FB_0_LAST_ADDRESS_CS_0                    0
++#define VIDEO_FB_0_LAST_ADDRESS_CS_1                    1
++#define VIDEO_FB_0_LAST_ADDRESS_ADDRESS                 25:0
++
++#define VIDEO_PLANE_TL                                  0x080050
++#define VIDEO_PLANE_TL_TOP                              26:16
++#define VIDEO_PLANE_TL_LEFT                             13:0
++
++#define VIDEO_PLANE_BR                                  0x080054
++#define VIDEO_PLANE_BR_BOTTOM                           26:16
++#define VIDEO_PLANE_BR_RIGHT                            13:0
++
++#define VIDEO_SCALE                                     0x080058
++#define VIDEO_SCALE_VERTICAL_MODE                       31:31
++#define VIDEO_SCALE_VERTICAL_MODE_EXPAND                0
++#define VIDEO_SCALE_VERTICAL_MODE_SHRINK                1
++#define VIDEO_SCALE_VERTICAL_SCALE                      27:16
++#define VIDEO_SCALE_HORIZONTAL_MODE                     15:15
++#define VIDEO_SCALE_HORIZONTAL_MODE_EXPAND              0
++#define VIDEO_SCALE_HORIZONTAL_MODE_SHRINK              1
++#define VIDEO_SCALE_HORIZONTAL_SCALE                    11:0
++
++#define VIDEO_INITIAL_SCALE                             0x08005C
++#define VIDEO_INITIAL_SCALE_FB_1                        27:16
++#define VIDEO_INITIAL_SCALE_FB_0                        11:0
++
++#define VIDEO_YUV_CONSTANTS                             0x080060
++#define VIDEO_YUV_CONSTANTS_Y                           31:24
++#define VIDEO_YUV_CONSTANTS_R                           23:16
++#define VIDEO_YUV_CONSTANTS_G                           15:8
++#define VIDEO_YUV_CONSTANTS_B                           7:0
++
++#define VIDEO_FB_1_ADDRESS                              0x080064
++#define VIDEO_FB_1_ADDRESS_STATUS                       31:31
++#define VIDEO_FB_1_ADDRESS_STATUS_CURRENT               0
++#define VIDEO_FB_1_ADDRESS_STATUS_PENDING               1
++#define VIDEO_FB_1_ADDRESS_EXT                          27:27
++#define VIDEO_FB_1_ADDRESS_EXT_LOCAL                    0
++#define VIDEO_FB_1_ADDRESS_EXT_EXTERNAL                 1
++#define VIDEO_FB_1_ADDRESS_CS                           26:26
++#define VIDEO_FB_1_ADDRESS_CS_0                         0
++#define VIDEO_FB_1_ADDRESS_CS_1                         1
++#define VIDEO_FB_1_ADDRESS_ADDRESS                      25:0
++
++#define VIDEO_FB_1_LAST_ADDRESS                         0x080068
++#define VIDEO_FB_1_LAST_ADDRESS_EXT                     27:27
++#define VIDEO_FB_1_LAST_ADDRESS_EXT_LOCAL               0
++#define VIDEO_FB_1_LAST_ADDRESS_EXT_EXTERNAL            1
++#define VIDEO_FB_1_LAST_ADDRESS_CS                      26:26
++#define VIDEO_FB_1_LAST_ADDRESS_CS_0                    0
++#define VIDEO_FB_1_LAST_ADDRESS_CS_1                    1
++#define VIDEO_FB_1_LAST_ADDRESS_ADDRESS                 25:0
++
++// Video Alpha Control
++
++#define VIDEO_ALPHA_DISPLAY_CTRL                        0x080080
++#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT                 28:28
++#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT_PER_PIXEL       0
++#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT_ALPHA           1
++#define VIDEO_ALPHA_DISPLAY_CTRL_ALPHA                  27:24
++#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO                   17:16
++#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_1                 0
++#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_3                 1
++#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_7                 2
++#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_11                3
++#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE             11:11
++#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE_NORMAL      0
++#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE_HALF        1
++#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE             10:10
++#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE_NORMAL      0
++#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE_HALF        1
++#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE              9:9
++#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE_REPLICATE    0
++#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE_INTERPOLATE  1
++#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE              8:8
++#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE_REPLICATE    0
++#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE_INTERPOLATE  1
++#define VIDEO_ALPHA_DISPLAY_CTRL_PIXEL                  7:4
++#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY             3:3
++#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY_DISABLE     0
++#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY_ENABLE      1
++#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE                  2:2
++#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE_DISABLE          0
++#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE_ENABLE           1
++#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT                 1:0
++#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_8               0
++#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_16              1
++#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4       2
++#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4   3
++
++#define VIDEO_ALPHA_FB_ADDRESS                          0x080084
++#define VIDEO_ALPHA_FB_ADDRESS_STATUS                   31:31
++#define VIDEO_ALPHA_FB_ADDRESS_STATUS_CURRENT           0
++#define VIDEO_ALPHA_FB_ADDRESS_STATUS_PENDING           1
++#define VIDEO_ALPHA_FB_ADDRESS_EXT                      27:27
++#define VIDEO_ALPHA_FB_ADDRESS_EXT_LOCAL                0
++#define VIDEO_ALPHA_FB_ADDRESS_EXT_EXTERNAL             1
++#define VIDEO_ALPHA_FB_ADDRESS_CS                       26:26
++#define VIDEO_ALPHA_FB_ADDRESS_CS_0                     0
++#define VIDEO_ALPHA_FB_ADDRESS_CS_1                     1
++#define VIDEO_ALPHA_FB_ADDRESS_ADDRESS                  25:0
++
++#define VIDEO_ALPHA_FB_WIDTH                            0x080088
++#define VIDEO_ALPHA_FB_WIDTH_WIDTH                      29:16
++#define VIDEO_ALPHA_FB_WIDTH_OFFSET                     13:0
++
++#define VIDEO_ALPHA_FB_LAST_ADDRESS                     0x08008C
++#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT                 27:27
++#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT_LOCAL           0
++#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT_EXTERNAL        1
++#define VIDEO_ALPHA_FB_LAST_ADDRESS_CS                  26:26
++#define VIDEO_ALPHA_FB_LAST_ADDRESS_CS_0                0
++#define VIDEO_ALPHA_FB_LAST_ADDRESS_CS_1                1
++#define VIDEO_ALPHA_FB_LAST_ADDRESS_ADDRESS             25:0
++
++#define VIDEO_ALPHA_PLANE_TL                            0x080090
++#define VIDEO_ALPHA_PLANE_TL_TOP                        26:16
++#define VIDEO_ALPHA_PLANE_TL_LEFT                       10:0
++
++#define VIDEO_ALPHA_PLANE_BR                            0x080094
++#define VIDEO_ALPHA_PLANE_BR_BOTTOM                     26:16
++#define VIDEO_ALPHA_PLANE_BR_RIGHT                      10:0
++
++#define VIDEO_ALPHA_SCALE                               0x080098
++#define VIDEO_ALPHA_SCALE_VERTICAL_MODE                 31:31
++#define VIDEO_ALPHA_SCALE_VERTICAL_MODE_EXPAND          0
++#define VIDEO_ALPHA_SCALE_VERTICAL_MODE_SHRINK          1
++#define VIDEO_ALPHA_SCALE_VERTICAL_SCALE                27:16
++#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE               15:15
++#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE_EXPAND        0
++#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE_SHRINK        1
++#define VIDEO_ALPHA_SCALE_HORIZONTAL_SCALE              11:0
++
++#define VIDEO_ALPHA_INITIAL_SCALE                       0x08009C
++#define VIDEO_ALPHA_INITIAL_SCALE_FB                    11:0
++
++#define VIDEO_ALPHA_CHROMA_KEY                          0x0800A0
++#define VIDEO_ALPHA_CHROMA_KEY_MASK                     31:16
++#define VIDEO_ALPHA_CHROMA_KEY_VALUE                    15:0
++
++#define VIDEO_ALPHA_COLOR_LOOKUP_01                     0x0800A4
++#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_RED               31:27
++#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_GREEN             26:21
++#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_BLUE              20:16
++#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_RED               15:11
++#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_GREEN             10:5
++#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_BLUE              4:0
++
++#define VIDEO_ALPHA_COLOR_LOOKUP_23                     0x0800A8
++#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_RED               31:27
++#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_GREEN             26:21
++#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_BLUE              20:16
++#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_RED               15:11
++#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_GREEN             10:5
++#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_BLUE              4:0
++
++#define VIDEO_ALPHA_COLOR_LOOKUP_45                     0x0800AC
++#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_RED               31:27
++#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_GREEN             26:21
++#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_BLUE              20:16
++#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_RED               15:11
++#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_GREEN             10:5
++#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_BLUE              4:0
++
++#define VIDEO_ALPHA_COLOR_LOOKUP_67                     0x0800B0
++#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_RED               31:27
++#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_GREEN             26:21
++#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_BLUE              20:16
++#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_RED               15:11
++#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_GREEN             10:5
++#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_BLUE              4:0
++
++#define VIDEO_ALPHA_COLOR_LOOKUP_89                     0x0800B4
++#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_RED               31:27
++#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_GREEN             26:21
++#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_BLUE              20:16
++#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_RED               15:11
++#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_GREEN             10:5
++#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_BLUE              4:0
++
++#define VIDEO_ALPHA_COLOR_LOOKUP_AB                     0x0800B8
++#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_RED               31:27
++#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_GREEN             26:21
++#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_BLUE              20:16
++#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_RED               15:11
++#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_GREEN             10:5
++#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_BLUE              4:0
++
++#define VIDEO_ALPHA_COLOR_LOOKUP_CD                     0x0800BC
++#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_RED               31:27
++#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_GREEN             26:21
++#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_BLUE              20:16
++#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_RED               15:11
++#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_GREEN             10:5
++#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_BLUE              4:0
++
++#define VIDEO_ALPHA_COLOR_LOOKUP_EF                     0x0800C0
++#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_RED               31:27
++#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_GREEN             26:21
++#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_BLUE              20:16
++#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_RED               15:11
++#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_GREEN             10:5
++#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_BLUE              4:0
++
++// Panel Cursor Control
++
++#define PANEL_HWC_ADDRESS                               0x0800F0
++#define PANEL_HWC_ADDRESS_ENABLE                        31:31
++#define PANEL_HWC_ADDRESS_ENABLE_DISABLE                0
++#define PANEL_HWC_ADDRESS_ENABLE_ENABLE                 1
++#define PANEL_HWC_ADDRESS_EXT                           27:27
++#define PANEL_HWC_ADDRESS_EXT_LOCAL                     0
++#define PANEL_HWC_ADDRESS_EXT_EXTERNAL                  1
++#define PANEL_HWC_ADDRESS_CS                            26:26
++#define PANEL_HWC_ADDRESS_CS_0                          0
++#define PANEL_HWC_ADDRESS_CS_1                          1
++#define PANEL_HWC_ADDRESS_ADDRESS                       25:0
++
++#define PANEL_HWC_LOCATION                              0x0800F4
++#define PANEL_HWC_LOCATION_TOP                          27:27
++#define PANEL_HWC_LOCATION_TOP_INSIDE                   0
++#define PANEL_HWC_LOCATION_TOP_OUTSIDE                  1
++#define PANEL_HWC_LOCATION_Y                            26:16
++#define PANEL_HWC_LOCATION_LEFT                         11:11
++#define PANEL_HWC_LOCATION_LEFT_INSIDE                  0
++#define PANEL_HWC_LOCATION_LEFT_OUTSIDE                 1
++#define PANEL_HWC_LOCATION_X                            10:0
++
++#define PANEL_HWC_COLOR_12                              0x0800F8
++#define PANEL_HWC_COLOR_12_2_RGB565                     31:16
++#define PANEL_HWC_COLOR_12_1_RGB565                     15:0
++
++#define PANEL_HWC_COLOR_3                               0x0800FC
++#define PANEL_HWC_COLOR_3_RGB565                        15:0
++
++// Old Definitions +++
++#define PANEL_HWC_COLOR_01                              0x0800F8
++#define PANEL_HWC_COLOR_01_1_RED                        31:27
++#define PANEL_HWC_COLOR_01_1_GREEN                      26:21
++#define PANEL_HWC_COLOR_01_1_BLUE                       20:16
++#define PANEL_HWC_COLOR_01_0_RED                        15:11
++#define PANEL_HWC_COLOR_01_0_GREEN                      10:5
++#define PANEL_HWC_COLOR_01_0_BLUE                       4:0
++
++#define PANEL_HWC_COLOR_2                               0x0800FC
++#define PANEL_HWC_COLOR_2_RED                           15:11
++#define PANEL_HWC_COLOR_2_GREEN                         10:5
++#define PANEL_HWC_COLOR_2_BLUE                          4:0
++// Old Definitions ---
++
++// Alpha Control
++
++#define ALPHA_DISPLAY_CTRL                              0x080100
++#define ALPHA_DISPLAY_CTRL_SELECT                       28:28
++#define ALPHA_DISPLAY_CTRL_SELECT_PER_PIXEL             0
++#define ALPHA_DISPLAY_CTRL_SELECT_ALPHA                 1
++#define ALPHA_DISPLAY_CTRL_ALPHA                        27:24
++#define ALPHA_DISPLAY_CTRL_FIFO                         17:16
++#define ALPHA_DISPLAY_CTRL_FIFO_1                       0
++#define ALPHA_DISPLAY_CTRL_FIFO_3                       1
++#define ALPHA_DISPLAY_CTRL_FIFO_7                       2
++#define ALPHA_DISPLAY_CTRL_FIFO_11                      3
++#define ALPHA_DISPLAY_CTRL_PIXEL                        7:4
++#define ALPHA_DISPLAY_CTRL_CHROMA_KEY                   3:3
++#define ALPHA_DISPLAY_CTRL_CHROMA_KEY_DISABLE           0
++#define ALPHA_DISPLAY_CTRL_CHROMA_KEY_ENABLE            1
++#define ALPHA_DISPLAY_CTRL_PLANE                        2:2
++#define ALPHA_DISPLAY_CTRL_PLANE_DISABLE                0
++#define ALPHA_DISPLAY_CTRL_PLANE_ENABLE                 1
++#define ALPHA_DISPLAY_CTRL_FORMAT                       1:0
++#define ALPHA_DISPLAY_CTRL_FORMAT_16                    1
++#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4             2
++#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4         3
++
++#define ALPHA_FB_ADDRESS                                0x080104
++#define ALPHA_FB_ADDRESS_STATUS                         31:31
++#define ALPHA_FB_ADDRESS_STATUS_CURRENT                 0
++#define ALPHA_FB_ADDRESS_STATUS_PENDING                 1
++#define ALPHA_FB_ADDRESS_EXT                            27:27
++#define ALPHA_FB_ADDRESS_EXT_LOCAL                      0
++#define ALPHA_FB_ADDRESS_EXT_EXTERNAL                   1
++#define ALPHA_FB_ADDRESS_CS                             26:26
++#define ALPHA_FB_ADDRESS_CS_0                           0
++#define ALPHA_FB_ADDRESS_CS_1                           1
++#define ALPHA_FB_ADDRESS_ADDRESS                        25:0
++
++#define ALPHA_FB_WIDTH                                  0x080108
++#define ALPHA_FB_WIDTH_WIDTH                            29:16
++#define ALPHA_FB_WIDTH_OFFSET                           13:0
++
++#define ALPHA_PLANE_TL                                  0x08010C
++#define ALPHA_PLANE_TL_TOP                              26:16
++#define ALPHA_PLANE_TL_LEFT                             10:0
++
++#define ALPHA_PLANE_BR                                  0x080110
++#define ALPHA_PLANE_BR_BOTTOM                           26:16
++#define ALPHA_PLANE_BR_RIGHT                            10:0
++
++#define ALPHA_CHROMA_KEY                                0x080114
++#define ALPHA_CHROMA_KEY_MASK                           31:16
++#define ALPHA_CHROMA_KEY_VALUE                          15:0
++
++#define ALPHA_COLOR_LOOKUP_01                           0x080118
++#define ALPHA_COLOR_LOOKUP_01_1_RED                     31:27
++#define ALPHA_COLOR_LOOKUP_01_1_GREEN                   26:21
++#define ALPHA_COLOR_LOOKUP_01_1_BLUE                    20:16
++#define ALPHA_COLOR_LOOKUP_01_0_RED                     15:11
++#define ALPHA_COLOR_LOOKUP_01_0_GREEN                   10:5
++#define ALPHA_COLOR_LOOKUP_01_0_BLUE                    4:0
++
++#define ALPHA_COLOR_LOOKUP_23                           0x08011C
++#define ALPHA_COLOR_LOOKUP_23_3_RED                     31:27
++#define ALPHA_COLOR_LOOKUP_23_3_GREEN                   26:21
++#define ALPHA_COLOR_LOOKUP_23_3_BLUE                    20:16
++#define ALPHA_COLOR_LOOKUP_23_2_RED                     15:11
++#define ALPHA_COLOR_LOOKUP_23_2_GREEN                   10:5
++#define ALPHA_COLOR_LOOKUP_23_2_BLUE                    4:0
++
++#define ALPHA_COLOR_LOOKUP_45                           0x080120
++#define ALPHA_COLOR_LOOKUP_45_5_RED                     31:27
++#define ALPHA_COLOR_LOOKUP_45_5_GREEN                   26:21
++#define ALPHA_COLOR_LOOKUP_45_5_BLUE                    20:16
++#define ALPHA_COLOR_LOOKUP_45_4_RED                     15:11
++#define ALPHA_COLOR_LOOKUP_45_4_GREEN                   10:5
++#define ALPHA_COLOR_LOOKUP_45_4_BLUE                    4:0
++
++#define ALPHA_COLOR_LOOKUP_67                           0x080124
++#define ALPHA_COLOR_LOOKUP_67_7_RED                     31:27
++#define ALPHA_COLOR_LOOKUP_67_7_GREEN                   26:21
++#define ALPHA_COLOR_LOOKUP_67_7_BLUE                    20:16
++#define ALPHA_COLOR_LOOKUP_67_6_RED                     15:11
++#define ALPHA_COLOR_LOOKUP_67_6_GREEN                   10:5
++#define ALPHA_COLOR_LOOKUP_67_6_BLUE                    4:0
++
++#define ALPHA_COLOR_LOOKUP_89                           0x080128
++#define ALPHA_COLOR_LOOKUP_89_9_RED                     31:27
++#define ALPHA_COLOR_LOOKUP_89_9_GREEN                   26:21
++#define ALPHA_COLOR_LOOKUP_89_9_BLUE                    20:16
++#define ALPHA_COLOR_LOOKUP_89_8_RED                     15:11
++#define ALPHA_COLOR_LOOKUP_89_8_GREEN                   10:5
++#define ALPHA_COLOR_LOOKUP_89_8_BLUE                    4:0
++
++#define ALPHA_COLOR_LOOKUP_AB                           0x08012C
++#define ALPHA_COLOR_LOOKUP_AB_B_RED                     31:27
++#define ALPHA_COLOR_LOOKUP_AB_B_GREEN                   26:21
++#define ALPHA_COLOR_LOOKUP_AB_B_BLUE                    20:16
++#define ALPHA_COLOR_LOOKUP_AB_A_RED                     15:11
++#define ALPHA_COLOR_LOOKUP_AB_A_GREEN                   10:5
++#define ALPHA_COLOR_LOOKUP_AB_A_BLUE                    4:0
++
++#define ALPHA_COLOR_LOOKUP_CD                           0x080130
++#define ALPHA_COLOR_LOOKUP_CD_D_RED                     31:27
++#define ALPHA_COLOR_LOOKUP_CD_D_GREEN                   26:21
++#define ALPHA_COLOR_LOOKUP_CD_D_BLUE                    20:16
++#define ALPHA_COLOR_LOOKUP_CD_C_RED                     15:11
++#define ALPHA_COLOR_LOOKUP_CD_C_GREEN                   10:5
++#define ALPHA_COLOR_LOOKUP_CD_C_BLUE                    4:0
++
++#define ALPHA_COLOR_LOOKUP_EF                           0x080134
++#define ALPHA_COLOR_LOOKUP_EF_F_RED                     31:27
++#define ALPHA_COLOR_LOOKUP_EF_F_GREEN                   26:21
++#define ALPHA_COLOR_LOOKUP_EF_F_BLUE                    20:16
++#define ALPHA_COLOR_LOOKUP_EF_E_RED                     15:11
++#define ALPHA_COLOR_LOOKUP_EF_E_GREEN                   10:5
++#define ALPHA_COLOR_LOOKUP_EF_E_BLUE                    4:0
++
++// CRT Graphics Control
++
++#define CRT_DISPLAY_CTRL                                0x080200
++#define CRT_DISPLAY_CTRL_FIFO                           17:16
++#define CRT_DISPLAY_CTRL_FIFO_1                         0
++#define CRT_DISPLAY_CTRL_FIFO_3                         1
++#define CRT_DISPLAY_CTRL_FIFO_7                         2
++#define CRT_DISPLAY_CTRL_FIFO_11                        3
++#define CRT_DISPLAY_CTRL_TV_PHASE                       15:15
++#define CRT_DISPLAY_CTRL_TV_PHASE_ACTIVE_HIGH           0
++#define CRT_DISPLAY_CTRL_TV_PHASE_ACTIVE_LOW            1
++#define CRT_DISPLAY_CTRL_CLOCK_PHASE                    14:14
++#define CRT_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_HIGH        0
++#define CRT_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_LOW         1
++#define CRT_DISPLAY_CTRL_VSYNC_PHASE                    13:13
++#define CRT_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_HIGH        0
++#define CRT_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_LOW         1
++#define CRT_DISPLAY_CTRL_HSYNC_PHASE                    12:12
++#define CRT_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_HIGH        0
++#define CRT_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_LOW         1
++#define CRT_DISPLAY_CTRL_BLANK                          10:10
++#define CRT_DISPLAY_CTRL_BLANK_OFF                      0
++#define CRT_DISPLAY_CTRL_BLANK_ON                       1
++#define CRT_DISPLAY_CTRL_SELECT                         9:9
++#define CRT_DISPLAY_CTRL_SELECT_PANEL                   0
++#define CRT_DISPLAY_CTRL_SELECT_CRT                     1
++#define CRT_DISPLAY_CTRL_TIMING                         8:8
++#define CRT_DISPLAY_CTRL_TIMING_DISABLE                 0
++#define CRT_DISPLAY_CTRL_TIMING_ENABLE                  1
++#define CRT_DISPLAY_CTRL_PIXEL                          7:4
++#define CRT_DISPLAY_CTRL_GAMMA                          3:3
++#define CRT_DISPLAY_CTRL_GAMMA_DISABLE                  0
++#define CRT_DISPLAY_CTRL_GAMMA_ENABLE                   1
++#define CRT_DISPLAY_CTRL_PLANE                          2:2
++#define CRT_DISPLAY_CTRL_PLANE_DISABLE                  0
++#define CRT_DISPLAY_CTRL_PLANE_ENABLE                   1
++#define CRT_DISPLAY_CTRL_FORMAT                         1:0
++#define CRT_DISPLAY_CTRL_FORMAT_8                       0
++#define CRT_DISPLAY_CTRL_FORMAT_16                      1
++#define CRT_DISPLAY_CTRL_FORMAT_32                      2
++
++#define CRT_FB_ADDRESS                                  0x080204
++#define CRT_FB_ADDRESS_STATUS                           31:31
++#define CRT_FB_ADDRESS_STATUS_CURRENT                   0
++#define CRT_FB_ADDRESS_STATUS_PENDING                   1
++#define CRT_FB_ADDRESS_EXT                              27:27
++#define CRT_FB_ADDRESS_EXT_LOCAL                        0
++#define CRT_FB_ADDRESS_EXT_EXTERNAL                     1
++#define CRT_FB_ADDRESS_CS                               26:26
++#define CRT_FB_ADDRESS_CS_0                             0
++#define CRT_FB_ADDRESS_CS_1                             1
++#define CRT_FB_ADDRESS_ADDRESS                          25:0
++
++#define CRT_FB_WIDTH                                    0x080208
++#define CRT_FB_WIDTH_WIDTH                              29:16
++#define CRT_FB_WIDTH_OFFSET                             13:0
++
++#define CRT_HORIZONTAL_TOTAL                            0x08020C
++#define CRT_HORIZONTAL_TOTAL_TOTAL                      27:16
++#define CRT_HORIZONTAL_TOTAL_DISPLAY_END                11:0
++
++#define CRT_HORIZONTAL_SYNC                             0x080210
++#define CRT_HORIZONTAL_SYNC_WIDTH                       23:16
++#define CRT_HORIZONTAL_SYNC_START                       11:0
++
++#define CRT_VERTICAL_TOTAL                              0x080214
++#define CRT_VERTICAL_TOTAL_TOTAL                        26:16
++#define CRT_VERTICAL_TOTAL_DISPLAY_END                  10:0
++
++#define CRT_VERTICAL_SYNC                               0x080218
++#define CRT_VERTICAL_SYNC_HEIGHT                        21:16
++#define CRT_VERTICAL_SYNC_START                         10:0
++
++#define CRT_SIGNATURE_ANALYZER                          0x08021C
++#define CRT_SIGNATURE_ANALYZER_STATUS                   31:16
++#define CRT_SIGNATURE_ANALYZER_ENABLE                   3:3
++#define CRT_SIGNATURE_ANALYZER_ENABLE_DISABLE           0
++#define CRT_SIGNATURE_ANALYZER_ENABLE_ENABLE            1
++#define CRT_SIGNATURE_ANALYZER_RESET                    2:2
++#define CRT_SIGNATURE_ANALYZER_RESET_NORMAL             0
++#define CRT_SIGNATURE_ANALYZER_RESET_RESET              1
++#define CRT_SIGNATURE_ANALYZER_SOURCE                   1:0
++#define CRT_SIGNATURE_ANALYZER_SOURCE_RED               0
++#define CRT_SIGNATURE_ANALYZER_SOURCE_GREEN             1
++#define CRT_SIGNATURE_ANALYZER_SOURCE_BLUE              2
++
++#define CRT_CURRENT_LINE                                0x080220
++#define CRT_CURRENT_LINE_LINE                           10:0
++
++#define CRT_MONITOR_DETECT                              0x080224
++#define CRT_MONITOR_DETECT_ENABLE                       24:24
++#define CRT_MONITOR_DETECT_ENABLE_DISABLE               0
++#define CRT_MONITOR_DETECT_ENABLE_ENABLE                1
++#define CRT_MONITOR_DETECT_RED                          23:16
++#define CRT_MONITOR_DETECT_GREEN                        15:8
++#define CRT_MONITOR_DETECT_BLUE                         7:0
++
++// CRT Cursor Control
++
++#define CRT_HWC_ADDRESS                                 0x080230
++#define CRT_HWC_ADDRESS_ENABLE                          31:31
++#define CRT_HWC_ADDRESS_ENABLE_DISABLE                  0
++#define CRT_HWC_ADDRESS_ENABLE_ENABLE                   1
++#define CRT_HWC_ADDRESS_EXT                             27:27
++#define CRT_HWC_ADDRESS_EXT_LOCAL                       0
++#define CRT_HWC_ADDRESS_EXT_EXTERNAL                    1
++#define CRT_HWC_ADDRESS_CS                              26:26
++#define CRT_HWC_ADDRESS_CS_0                            0
++#define CRT_HWC_ADDRESS_CS_1                            1
++#define CRT_HWC_ADDRESS_ADDRESS                         25:0
++
++#define CRT_HWC_LOCATION                                0x080234
++#define CRT_HWC_LOCATION_TOP                            27:27
++#define CRT_HWC_LOCATION_TOP_INSIDE                     0
++#define CRT_HWC_LOCATION_TOP_OUTSIDE                    1
++#define CRT_HWC_LOCATION_Y                              26:16
++#define CRT_HWC_LOCATION_LEFT                           11:11
++#define CRT_HWC_LOCATION_LEFT_INSIDE                    0
++#define CRT_HWC_LOCATION_LEFT_OUTSIDE                   1
++#define CRT_HWC_LOCATION_X                              10:0
++
++#define CRT_HWC_COLOR_12                                0x080238
++#define CRT_HWC_COLOR_12_2_RGB565                       31:16
++#define CRT_HWC_COLOR_12_1_RGB565                       15:0
++
++#define CRT_HWC_COLOR_3                                 0x08023C
++#define CRT_HWC_COLOR_3_RGB565                          15:0
++
++// Old Definitions +++
++#define CRT_HWC_COLOR_01                                0x080238
++#define CRT_HWC_COLOR_01_1_RED                          31:27
++#define CRT_HWC_COLOR_01_1_GREEN                        26:21
++#define CRT_HWC_COLOR_01_1_BLUE                         20:16
++#define CRT_HWC_COLOR_01_0_RED                          15:11
++#define CRT_HWC_COLOR_01_0_GREEN                        10:5
++#define CRT_HWC_COLOR_01_0_BLUE                         4:0
++
++#define CRT_HWC_COLOR_2                                 0x08023C
++#define CRT_HWC_COLOR_2_RED                             15:11
++#define CRT_HWC_COLOR_2_GREEN                           10:5
++#define CRT_HWC_COLOR_2_BLUE                            4:0
++// Old Definitions ---
++
++// Palette RAM
++
++#define PANEL_PALETTE_RAM                               0x080400
++#define VIDEO_PALETTE_RAM                               0x080800
++#define CRT_PALETTE_RAM                                 0x080C00
++
++// Power constants to use with setDPMS function.
++typedef enum _DPMS_t
++{
++	DPMS_ON,
++	DPMS_STANDBY,
++	DPMS_SUSPEND,
++	DPMS_OFF
++}
++DPMS_t;
++
++////////////////////////////////////////////////////////////////////////////////
++//                                                                            //
++// D I S P L A Y   C O N T R O L L E R                                        //
++//                                                                            //
++////////////////////////////////////////////////////////////////////////////////
++
++// Display type constants to use with setMode function and others.
++typedef enum _display_t
++{
++	PANEL = 0,
++	CRT = 1,
++}
++display_t;
++
++// Type of LCD display
++typedef enum _lcd_display_t
++{
++    LCD_TFT = 0,
++    LCD_STN_8 = 2,
++	LCD_STN_12 = 3
++}
++lcd_display_t;
++
++// Polarity constants.
++typedef enum _polarity_t
++{
++	POSITIVE,
++	NEGATIVE,
++}
++polarity_t;
++
++
++// Format of mode table record.
++typedef struct _mode_table_t
++{
++	// Horizontal timing.
++	int horizontal_total;
++	int horizontal_display_end;
++	int horizontal_sync_start;
++	int horizontal_sync_width;
++	polarity_t horizontal_sync_polarity;
++
++	// Vertical timing.
++	int vertical_total;
++	int vertical_display_end;
++	int vertical_sync_start;
++	int vertical_sync_height;
++	polarity_t vertical_sync_polarity;
++
++	// Refresh timing.
++	long pixel_clock;
++	long horizontal_frequency;
++	long vertical_frequency;
++/*
++    //Programe PLL3 
++	int M;
++	int N;
++	int bit15;
++	int bit31;
++*/
++}
++mode_table_t, *pmode_table_t;
++
++// Clock value structure.
++typedef struct clock_select_t
++{
++	long mclk;
++	long test_clock;
++	int divider;
++	int shift;
++
++	long multipleM;
++	int dividerN;
++	short divby2;
++}
++clock_select_t, *pclock_select_t;
++
++// Registers necessary to set mode.
++typedef struct _reg_table_t
++{
++	unsigned long clock;
++	unsigned long control;
++	unsigned long fb_width;
++	unsigned long horizontal_total;
++	unsigned long horizontal_sync;
++	unsigned long vertical_total;
++	unsigned long vertical_sync;
++	unsigned long width;
++	unsigned long height;
++	display_t display;
++}
++reg_table_t, *preg_table_t;
++
++// Panel On/Off constants to use with panelPowerSequence.
++typedef enum _panel_state_t
++{
++	PANEL_OFF,
++	PANEL_ON,
++}
++panel_state_t;
++
++// Structure used to initialize Panel hardware module
++typedef struct
++{
++    unsigned long mask;       // Holds flags indicating which register bitfields to init
++	unsigned long dp;         // TFT dithering pattern
++	unsigned long tft;        // TFT panel interface
++	unsigned long de;         // Enable/disable TFT dithering
++	unsigned long lcd;        // LCD type
++	unsigned long fifo_level; // FIFO request level
++	unsigned long cp;         // Clock phase select
++	unsigned long format;     // Panel graphics plane format
++} init_panel, *pinit_panel;
++
++// Structure used to initialize Panel cursor hardware module
++typedef struct
++{
++    unsigned long mask;       // Holds flags indicating which register bitfields to init
++} init_panel_hwc, *pinit_panel_hwc;
++
++// Structure used to initialize Alpha hardware module
++typedef struct
++{
++    unsigned long mask;       // Holds flags indicating which register bitfields to init
++	unsigned long fifo_level; // FIFO request level
++	unsigned long format;     // Alpha plane format
++} init_alpha, *pinit_alpha;
++
++// Structure used to initialize CRT hardware module
++typedef struct
++{
++    unsigned long mask;       // Holds flags indicating which register bitfields to init
++	unsigned long fifo_level; // FIFO request level
++	unsigned long tvp;        // TV clock phase select
++	unsigned long cp;         // CRT clock phase select
++	unsigned long blank;      // CRT data blanking
++	unsigned long format;     // CRT graphics plane format
++} init_crt, *pinit_crt;
++
++// Structure used to initialize CRT cursor hardware module
++typedef struct
++{
++    unsigned long mask;       // Holds flags indicating which register bitfields to init
++} init_crt_hwc, *pinit_crt_hwc;
++
++// Init flags and values used in init_panel, init_alpha, and init_crt structures
++#define DISP_FIFO_LEVEL                    0x00000001    // FIFO request level
++#define DISP_FIFO_LEVEL_1                  0x00000000
++#define DISP_FIFO_LEVEL_3                  0x00010000
++#define DISP_FIFO_LEVEL_7                  0x00020000
++#define DISP_FIFO_LEVEL_11                 0x00030000
++
++// Init flags and values used in init_panel structure
++#define DISP_PANEL_DP                      0x00000100    // TFT dithering pattern
++#define DISP_PANEL_DP_4GRAY                0x00000000
++#define DISP_PANEL_DP_8GRAY                0x00800000
++
++#define DISP_PANEL_TFT                     0x00000200    // TFT panel interface
++#define DISP_PANEL_TFT_24                  0x00000000
++#define DISP_PANEL_TFT_9                   0x00200000
++#define DISP_PANEL_TFT_12                  0x00400000
++
++#define DISP_PANEL_DE                      0x00000400    // Enable/disable TFT dithering
++#define DISP_PANEL_DE_DISABLE              0x00000000
++#define DISP_PANEL_DE_ENABLE               0x00100000
++
++#define DISP_PANEL_LCD                     0x00000800    // LCD type
++#define DISP_PANEL_LCD_TFT                 0x00000000
++#define DISP_PANEL_LCD_STN8                0x00080000
++#define DISP_PANEL_LCD_STN12               0x000C0000
++
++#define DISP_PANEL_CP                      0x00001000    // Clock phase select
++#define DISP_PANEL_CP_HIGH                 0x00000000
++#define DISP_PANEL_CP_LOW                  0x00004000
++
++#define DISP_PANEL_FORMAT                  0x00002000    // Panel graphics plane format
++#define DISP_PANEL_FORMAT_8                0x00000000
++#define DISP_PANEL_FORMAT_16               0x00000001
++#define DISP_PANEL_FORMAT_32               0x00000002
++
++// Init flags and values used in init_alpha structure
++#define DISP_ALPHA_FORMAT                  0x00000100    // Alpha plane format
++#define DISP_ALPHA_FORMAT_RGB565           0x00000001
++#define DISP_ALPHA_FORMAT_ALPHA44          0x00000002
++#define DISP_ALPHA_FORMAT_ALPHA4444        0x00000003
++
++// Init flags and values used in init_crt structure
++#define DISP_CRT_TVP                       0x00000100    // TV clock phase select
++#define DISP_CRT_TVP_HIGH                  0x00000000
++#define DISP_CRT_TVP_LOW                   0x00008000
++
++#define DISP_CRT_CP                        0x00000200    // CRT clock phase select
++#define DISP_CRT_CP_HIGH                   0x00000000
++#define DISP_CRT_CP_LOW                    0x00004000
++
++#define DISP_CRT_BLANK                     0x00000400    // CRT data blanking
++#define DISP_CRT_BLANK_OFF                 0x00000000
++#define DISP_CRT_BLANK_ON                  0x00000400
++
++#define DISP_CRT_FORMAT                    0x00000800    // CRT graphics plane format
++#define DISP_CRT_FORMAT_8                  0x00000000
++#define DISP_CRT_FORMAT_16                 0x00000001
++#define DISP_CRT_FORMAT_32                 0x00000002
++
++#define DISP_MODE_8_BPP			           0		     // 8 bits per pixel i8RGB
++#define DISP_MODE_16_BPP		           1		     // 16 bits per pixel RGB565
++#define DISP_MODE_32_BPP		           2		     // 32 bits per pixel RGB888
++#define DISP_MODE_YUV			           3		     // 16 bits per pixel YUV422
++#define DISP_MODE_ALPHA_8		           4		     // 8 bits per pixel a4i4RGB
++#define DISP_MODE_ALPHA_16		           5		     // 16 bits per pixel a4RGB444
++
++#define DISP_PAN_LEFT			           0		     // Pan left
++#define DISP_PAN_RIGHT			           1		     // Pan right
++#define DISP_PAN_UP				           2		     // Pan upwards
++#define DISP_PAN_DOWN		               3		     // Pan downwards
++
++#define DISP_DPMS_QUERY			           -1		     // Query DPMS value
++#define DISP_DPMS_ON			           0		     // DPMS on
++#define DISP_DPMS_STANDBY	               1		     // DPMS standby
++#define DISP_DPMS_SUSPEND		           2		     // DPMS suspend
++#define DISP_DPMS_OFF			           3		     // DPMS off
++
++#define DISP_DELAY_DEFAULT		           0		     // Default delay
++
++#define DISP_HVTOTAL_UNKNOWN               -1            // Used in panelSetTiming, crtSetTiming if
++                                                         // nHTotal, nVTotal not specified by user
++#define DISP_HVTOTAL_SCALEFACTOR           1.25          // Used in panelSetTiming, crtSetTiming if
++                                                         // nHTotal, nVTotal not specified by user
++
++#define VGX_SIGNAL_PANEL_VSYNC	           100		     // Panel VSYNC
++#define VGX_SIGNAL_PANEL_PAN               101		     // Panel auto panning complete
++#define VGX_SIGNAL_CRT_VSYNC               102		     // CRT VSYNC
++
++#define VSYNCTIMEOUT                       10000
++
++#define ALPHA_MODE_PER_PIXEL               0             // Use per-pixel alpha values
++#define ALPHA_MODE_ALPHA                   1             // Use alpha value specified in Alpha bitfield
++#define ALPHA_COLOR_LUT_SIZE               16            // Number of colors in alpha/video alpha palette
++
++#define HWC_ON_SCREEN                      0             // Cursor is within screen top/left boundary
++#define HWC_OFF_SCREEN                     1             // Cursor is outside screen top/left boundary
++#define HWC_NUM_COLORS                     3             // Number of cursor colors
++
+diff --git a/drivers/video/smi/sm7xxhw.h b/drivers/video/smi/sm7xxhw.h
+new file mode 100755
+index 0000000..fe70c82
+--- /dev/null
++++ b/drivers/video/smi/sm7xxhw.h
+@@ -0,0 +1,104 @@
++/*
++ *  linux/drivers/video/sm7xxhw.h -- Silicon Motion SM7xx frame buffer device
++ *
++ *      Copyright (C) 2006 Silicon Motion, Inc.
++ *      Ge Wang, gewang@siliconmotion.com
++ *
++ *  This file is subject to the terms and conditions of the GNU General Public
++ *  License version 2 or later. See the file COPYING in the main directory of 
++ *  this archive for more details.
++ */
++
++
++#define SM712_VIDEOMEMORYSIZE    0x00400000  /*Assume SM712 graphics chip has 4MB VRAM */
++#define SM722_VIDEOMEMORYSIZE    0x00800000  /*Assume SM722 graphics chip has 8MB VRAM */
++
++#define dac_reg	(0x3c8)
++#define dac_val	(0x3c9)
++
++#define smtc_mmiowb(dat,reg)	writeb(dat, smtc_RegBaseAddress + reg)
++#define smtc_mmioww(dat,reg)	writew(dat, smtc_RegBaseAddress + reg)
++#define smtc_mmiowl(dat,reg)	writel(dat, smtc_RegBaseAddress + reg)
++
++#define smtc_mmiorb(reg)	        readb(smtc_RegBaseAddress + reg)
++#define smtc_mmiorw(reg)	        readw(smtc_RegBaseAddress + reg)
++#define smtc_mmiorl(reg)	        readl(smtc_RegBaseAddress + reg)
++
++#define SIZE_SR00_SR04      (0x04 - 0x00 + 1)
++#define SIZE_SR10_SR24      (0x24 - 0x10 + 1)
++#define SIZE_SR30_SR75      (0x75 - 0x30 + 1)
++#define SIZE_SR80_SR93      (0x93 - 0x80 + 1)
++#define SIZE_SRA0_SRAF      (0xAF - 0xA0 + 1)
++#define SIZE_GR00_GR08      (0x08 - 0x00 + 1)
++#define SIZE_AR00_AR14      (0x14 - 0x00 + 1)
++#define SIZE_CR00_CR18      (0x18 - 0x00 + 1)
++#define SIZE_CR30_CR4D      (0x4D - 0x30 + 1)
++#define SIZE_CR90_CRA7      (0xA7 - 0x90 + 1)
++#define SIZE_VPR            (0x6C + 1)
++#define SIZE_DPR			(0x44 + 1)
++
++
++static inline void smtc_crtcw(int reg, int val)
++{
++        smtc_mmiowb(reg, 0x3d4);
++        smtc_mmiowb(val, 0x3d5);
++}
++
++static inline unsigned int smtc_crtcr(int reg)
++{
++        smtc_mmiowb(reg, 0x3d4);
++        return smtc_mmiorb(0x3d5);
++}
++
++static inline void smtc_grphw(int reg, int val)
++{
++        smtc_mmiowb(reg, 0x3ce);
++        smtc_mmiowb(val, 0x3cf);
++}
++
++static inline unsigned int smtc_grphr(int reg)
++{
++        smtc_mmiowb(reg, 0x3ce);
++        return smtc_mmiorb(0x3cf);
++}
++
++static inline void smtc_attrw(int reg, int val)
++{
++        smtc_mmiorb(0x3da);
++        smtc_mmiowb(reg, 0x3c0);
++        smtc_mmiorb(0x3c1);
++        smtc_mmiowb(val, 0x3c0);
++}
++
++static inline void smtc_seqw(int reg, int val)
++{
++        smtc_mmiowb(reg, 0x3c4);
++        smtc_mmiowb(val, 0x3c5);
++}
++
++static inline unsigned int smtc_seqr(int reg)
++{
++        smtc_mmiowb(reg, 0x3c4);
++        return smtc_mmiorb(0x3c5);
++}
++
++// The next structure holds all information relevant for a specific video mode.
++struct ModeInit
++{
++	int			  mmSizeX;
++	int			  mmSizeY;
++	int			  bpp;
++	int			  hz;
++	unsigned char Init_MISC;
++	unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
++	unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
++	unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
++	unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
++	unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
++	unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
++	unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
++	unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
++	unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
++	unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
++};
++
+diff --git a/drivers/video/smi/smtc2d.c b/drivers/video/smi/smtc2d.c
+new file mode 100755
+index 0000000..c85ff37
+--- /dev/null
++++ b/drivers/video/smi/smtc2d.c
+@@ -0,0 +1,1372 @@
++/*
++ *  linux/drivers/video/smtc2d.c -- Silicon Motion SM501 and SM7xx 2D drawing engine functions.
++ *
++ *      Copyright (C) 2006 Silicon Motion Technology Corp.
++ *      Boyod boyod.yang@siliconmotion.com.cn
++ *
++ *  This file is subject to the terms and conditions of the GNU General Public
++ *  License version 2 or later. See the file COPYING in the main directory of 
++ *  this archive for more details.
++ *
++ */
++
++/*
++ * Version 0.10.26192.21.01
++ *  - Add PowerPC support
++ *  - Add 2D support for Lynx
++ *  - Verified on 2.6.19.2                          Boyod.yang  <boyod.yang@siliconmotion.com.cn>
++ */
++
++unsigned char smtc_de_busy = 0;
++void SMTC_write2Dreg(unsigned long nOffset, unsigned long nData)
++{
++    writel(nData, smtc_2DBaseAddress+nOffset) ;
++}
++
++unsigned long SMTC_read2Dreg(unsigned long nOffset)
++{
++    readl(smtc_2DBaseAddress+nOffset) ;
++}
++
++
++void SMTC_write2Ddataport(unsigned long nOffset, unsigned long nData)
++{
++    writel(nData, smtc_2Ddataport+nOffset);
++}
++
++/**********************************************************************
++ *
++ * deInit
++ *
++ * Purpose
++ *    Drawing engine initialization.
++ *
++ **********************************************************************/
++void deInit(unsigned int nModeWidth, unsigned int nModeHeight, unsigned int bpp)
++{
++
++	// Get current power configuration.
++	unsigned char gate, clock;
++	clock = smtc_seqr(0x21);
++	// Enable 2D Drawing Engine
++	smtc_seqw(0x21,clock& 0xF8);
++	
++	SMTC_write2Dreg(DE_CLIP_TL,
++		FIELD_VALUE(0, DE_CLIP_TL, TOP,     0)       |
++		FIELD_SET  (0, DE_CLIP_TL, STATUS,  DISABLE) |
++		FIELD_SET  (0, DE_CLIP_TL, INHIBIT, OUTSIDE) |
++		FIELD_VALUE(0, DE_CLIP_TL, LEFT,    0));
++
++	if (bpp>=24){
++	    SMTC_write2Dreg(DE_PITCH,
++			FIELD_VALUE(0, DE_PITCH, DESTINATION, nModeWidth*3) |
++			FIELD_VALUE(0, DE_PITCH, SOURCE,      nModeWidth*3));
++	}else{
++	    SMTC_write2Dreg(DE_PITCH,
++			FIELD_VALUE(0, DE_PITCH, DESTINATION, nModeWidth) |
++			FIELD_VALUE(0, DE_PITCH, SOURCE,      nModeWidth));
++	}
++	
++    SMTC_write2Dreg(DE_WINDOW_WIDTH,
++		FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, nModeWidth) |
++		FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      nModeWidth));
++
++    switch (bpp)
++    {
++    case 8:
++        SMTC_write2Dreg(DE_STRETCH_FORMAT,
++            FIELD_SET  (0, DE_STRETCH_FORMAT, PATTERN_XY,    NORMAL) |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_Y,     0)      |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,     0)      |
++            FIELD_SET  (0, DE_STRETCH_FORMAT, PIXEL_FORMAT,  8)      |
++            FIELD_SET  (0, DE_STRETCH_FORMAT, ADDRESSING,	 XY)     |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, SOURCE_HEIGHT, 3));
++        break;
++    case 24:
++        SMTC_write2Dreg(DE_STRETCH_FORMAT,
++            FIELD_SET  (0, DE_STRETCH_FORMAT, PATTERN_XY,    NORMAL) |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_Y,     0)      |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,     0)      |
++            FIELD_SET  (0, DE_STRETCH_FORMAT, PIXEL_FORMAT,  24)     |
++            FIELD_SET  (0, DE_STRETCH_FORMAT, ADDRESSING,	 XY)     |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, SOURCE_HEIGHT, 3));
++        break;
++    case 16:
++    default:
++        SMTC_write2Dreg(DE_STRETCH_FORMAT,
++            FIELD_SET  (0, DE_STRETCH_FORMAT, PATTERN_XY,    NORMAL) |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_Y,     0)      |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,     0)      |
++            FIELD_SET  (0, DE_STRETCH_FORMAT, PIXEL_FORMAT,  16)     |
++            FIELD_SET  (0, DE_STRETCH_FORMAT, ADDRESSING,	 XY)     |
++            FIELD_VALUE(0, DE_STRETCH_FORMAT, SOURCE_HEIGHT, 3));
++        break;
++    }
++
++	SMTC_write2Dreg(DE_MASKS,
++		FIELD_VALUE(0, DE_MASKS, BYTE_MASK, 0xFFFF) |
++		FIELD_VALUE(0, DE_MASKS, BIT_MASK,  0xFFFF));
++	SMTC_write2Dreg(DE_COLOR_COMPARE_MASK,
++		FIELD_VALUE(0, DE_COLOR_COMPARE_MASK, MASKS, 0xFFFFFF));
++	SMTC_write2Dreg(DE_COLOR_COMPARE,
++		FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, 0xFFFFFF));
++}
++
++
++/**********************************************************************
++ *
++ * deSetClipRectangle
++ *
++ * Purpose
++ *    Set drawing engine clip rectangle.
++ *
++ * Remarks
++ *       Caller need to pass in valid rectangle parameter in device coordinate.
++ **********************************************************************/
++void deSetClipRectangle(int left, int top, int right, int bottom)
++{
++    /* Top left of clipping rectangle cannot be negative */
++    if (top < 0)
++    {
++        top = 0;
++    }
++    
++    if (left < 0)
++    {
++        left = 0;
++    }
++    
++    SMTC_write2Dreg(DE_CLIP_TL,
++        FIELD_VALUE(0, DE_CLIP_TL, TOP,     top) |
++        FIELD_SET  (0, DE_CLIP_TL, STATUS,  ENABLE)         |
++        FIELD_SET  (0, DE_CLIP_TL, INHIBIT, OUTSIDE)        |
++        FIELD_VALUE(0, DE_CLIP_TL, LEFT,    left));
++    SMTC_write2Dreg(DE_CLIP_BR,
++        FIELD_VALUE(0, DE_CLIP_BR, BOTTOM, bottom) |
++        FIELD_VALUE(0, DE_CLIP_BR, RIGHT,  right));
++}
++
++
++void deVerticalLine(unsigned long dst_base,
++                    unsigned long dst_pitch, 
++                    unsigned long nX, 
++                    unsigned long nY, 
++                    unsigned long dst_height, 
++                    unsigned long nColor)
++{
++    deWaitForNotBusy();
++
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++
++	SMTC_write2Dreg(DE_PITCH,
++		FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
++		FIELD_VALUE(0, DE_PITCH, SOURCE,      dst_pitch));
++    
++	SMTC_write2Dreg(DE_WINDOW_WIDTH,
++		FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++		FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_pitch));
++
++    SMTC_write2Dreg(DE_FOREGROUND,
++        FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
++
++    SMTC_write2Dreg(DE_DESTINATION,
++        FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_DESTINATION, X,    nX)      |
++        FIELD_VALUE(0, DE_DESTINATION, Y,    nY));
++
++    SMTC_write2Dreg(DE_DIMENSION,
++        FIELD_VALUE(0, DE_DIMENSION, X,    1) |
++        FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
++
++    SMTC_write2Dreg(DE_CONTROL,
++        FIELD_SET  (0, DE_CONTROL, STATUS,     START)         |
++        FIELD_SET  (0, DE_CONTROL, DIRECTION,  LEFT_TO_RIGHT) |
++        FIELD_SET  (0, DE_CONTROL, MAJOR,      Y)             |
++        FIELD_SET  (0, DE_CONTROL, STEP_X,     NEGATIVE)      |
++        FIELD_SET  (0, DE_CONTROL, STEP_Y,     POSITIVE)      |
++        FIELD_SET  (0, DE_CONTROL, LAST_PIXEL, OFF)           |
++        FIELD_SET  (0, DE_CONTROL, COMMAND,    SHORT_STROKE)  |
++        FIELD_SET  (0, DE_CONTROL, ROP_SELECT, ROP2)          |
++        FIELD_VALUE(0, DE_CONTROL, ROP,        0x0C));
++    
++    smtc_de_busy = 1;
++}
++
++void deHorizontalLine(unsigned long dst_base,
++                      unsigned long dst_pitch, 
++                      unsigned long nX, 
++                      unsigned long nY, 
++                      unsigned long dst_width, 
++                      unsigned long nColor)
++{
++    deWaitForNotBusy();
++    
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++    
++    SMTC_write2Dreg(DE_PITCH,
++        FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
++        FIELD_VALUE(0, DE_PITCH, SOURCE,      dst_pitch));
++    
++    SMTC_write2Dreg(DE_WINDOW_WIDTH,
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_pitch));
++    SMTC_write2Dreg(DE_FOREGROUND,
++        FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
++    SMTC_write2Dreg(DE_DESTINATION,
++        FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_DESTINATION, X,    nX)      |
++        FIELD_VALUE(0, DE_DESTINATION, Y,    nY));
++    SMTC_write2Dreg(DE_DIMENSION,
++        FIELD_VALUE(0, DE_DIMENSION, X,    dst_width) |
++        FIELD_VALUE(0, DE_DIMENSION, Y_ET, 1));
++    SMTC_write2Dreg(DE_CONTROL,
++        FIELD_SET  (0, DE_CONTROL, STATUS,     START)         |
++        FIELD_SET  (0, DE_CONTROL, DIRECTION,  RIGHT_TO_LEFT) |
++        FIELD_SET  (0, DE_CONTROL, MAJOR,      X)             |
++        FIELD_SET  (0, DE_CONTROL, STEP_X,     POSITIVE)      |
++        FIELD_SET  (0, DE_CONTROL, STEP_Y,     NEGATIVE)      |
++        FIELD_SET  (0, DE_CONTROL, LAST_PIXEL, OFF)           |
++        FIELD_SET  (0, DE_CONTROL, COMMAND,    SHORT_STROKE)  |
++        FIELD_SET  (0, DE_CONTROL, ROP_SELECT, ROP2)          |
++        FIELD_VALUE(0, DE_CONTROL, ROP,        0x0C));
++
++    smtc_de_busy = 1;
++}
++
++
++void deLine(unsigned long dst_base,
++            unsigned long dst_pitch,  
++            unsigned long nX1, 
++            unsigned long nY1, 
++            unsigned long nX2, 
++            unsigned long nY2, 
++            unsigned long nColor)
++{
++    unsigned long nCommand =
++        FIELD_SET  (0, DE_CONTROL, STATUS,     START)         |
++        FIELD_SET  (0, DE_CONTROL, DIRECTION,  LEFT_TO_RIGHT) |
++        FIELD_SET  (0, DE_CONTROL, MAJOR,      X)             |
++        FIELD_SET  (0, DE_CONTROL, STEP_X,     POSITIVE)      |
++        FIELD_SET  (0, DE_CONTROL, STEP_Y,     POSITIVE)      |
++        FIELD_SET  (0, DE_CONTROL, LAST_PIXEL, OFF)           |
++        FIELD_SET  (0, DE_CONTROL, ROP_SELECT, ROP2)          |
++        FIELD_VALUE(0, DE_CONTROL, ROP,        0x0C);
++    unsigned long DeltaX;
++    unsigned long DeltaY;
++    
++    /* Calculate delta X */
++    if (nX1 <= nX2)
++    {
++        DeltaX = nX2 - nX1;
++    }
++    else
++    {
++        DeltaX = nX1 - nX2;
++        nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_X, NEGATIVE);
++    }
++    
++    /* Calculate delta Y */
++    if (nY1 <= nY2)
++    {
++        DeltaY = nY2 - nY1;
++    }
++    else
++    {
++        DeltaY = nY1 - nY2;
++        nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_Y, NEGATIVE);
++    }
++    
++    /* Determine the major axis */
++    if (DeltaX < DeltaY)
++    {
++        nCommand = FIELD_SET(nCommand, DE_CONTROL, MAJOR, Y);
++    }
++    
++    /* Vertical line? */
++    if (nX1 == nX2)
++        deVerticalLine(dst_base, dst_pitch, nX1, nY1, DeltaY, nColor);
++    
++    /* Horizontal line? */
++    else if (nY1 == nY2)
++        deHorizontalLine(dst_base, dst_pitch, nX1, nY1, DeltaX, nColor);
++    
++    /* Diagonal line? */
++    else if (DeltaX == DeltaY)
++    {
++        deWaitForNotBusy();
++        
++        SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++        
++        SMTC_write2Dreg(DE_PITCH,
++            FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
++            FIELD_VALUE(0, DE_PITCH, SOURCE,      dst_pitch));
++        
++        SMTC_write2Dreg(DE_WINDOW_WIDTH,
++            FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++            FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_pitch));
++        
++        SMTC_write2Dreg(DE_FOREGROUND,
++            FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
++        
++        SMTC_write2Dreg(DE_DESTINATION,
++            FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++            FIELD_VALUE(0, DE_DESTINATION, X,    1)       |
++            FIELD_VALUE(0, DE_DESTINATION, Y,    nY1));
++        
++        SMTC_write2Dreg(DE_DIMENSION,
++            FIELD_VALUE(0, DE_DIMENSION, X,    1) |
++            FIELD_VALUE(0, DE_DIMENSION, Y_ET, DeltaX));
++        
++        SMTC_write2Dreg(DE_CONTROL,
++            FIELD_SET(nCommand, DE_CONTROL, COMMAND, SHORT_STROKE));
++    }
++    
++    /* Generic line */
++    else
++    {
++        unsigned int k1, k2, et, w;
++        if (DeltaX < DeltaY)
++        {
++            k1 = 2 * DeltaX;
++            et = k1 - DeltaY;
++            k2 = et - DeltaY;
++            w  = DeltaY + 1;
++        } 
++        else 
++        {
++            k1 = 2 * DeltaY;
++            et = k1 - DeltaX;
++            k2 = et - DeltaX;
++            w  = DeltaX + 1;
++        }
++        
++        deWaitForNotBusy();
++        
++        SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++        
++        SMTC_write2Dreg(DE_PITCH,
++            FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
++            FIELD_VALUE(0, DE_PITCH, SOURCE,      dst_pitch));
++        
++        SMTC_write2Dreg(DE_WINDOW_WIDTH,
++            FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++            FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_pitch));
++        
++        SMTC_write2Dreg(DE_FOREGROUND,
++            FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
++        
++        SMTC_write2Dreg(DE_SOURCE,
++            FIELD_SET  (0, DE_SOURCE, WRAP, DISABLE) |
++            FIELD_VALUE(0, DE_SOURCE, X_K1, k1)      |
++            FIELD_VALUE(0, DE_SOURCE, Y_K2, k2));
++        
++        SMTC_write2Dreg(DE_DESTINATION,
++            FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++            FIELD_VALUE(0, DE_DESTINATION, X,    nX1)     |
++            FIELD_VALUE(0, DE_DESTINATION, Y,    nY1));
++        
++        SMTC_write2Dreg(DE_DIMENSION,
++            FIELD_VALUE(0, DE_DIMENSION, X,    w) |
++            FIELD_VALUE(0, DE_DIMENSION, Y_ET, et));
++        
++        SMTC_write2Dreg(DE_CONTROL,
++            FIELD_SET(nCommand, DE_CONTROL, COMMAND, LINE_DRAW));
++    }
++
++    smtc_de_busy = 1;
++}
++
++
++void deFillRect(unsigned long dst_base,
++                unsigned long dst_pitch,  
++                unsigned long dst_X, 
++                unsigned long dst_Y, 
++                unsigned long dst_width, 
++                unsigned long dst_height, 
++                unsigned long nColor)
++{
++    deWaitForNotBusy();
++
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++    
++    if (dst_pitch)
++    {
++        SMTC_write2Dreg(DE_PITCH,
++            FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
++            FIELD_VALUE(0, DE_PITCH, SOURCE,      dst_pitch));
++        
++        SMTC_write2Dreg(DE_WINDOW_WIDTH,
++            FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++            FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_pitch));
++    }
++
++    SMTC_write2Dreg(DE_FOREGROUND,
++        FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
++
++    SMTC_write2Dreg(DE_DESTINATION,
++        FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_DESTINATION, X,    dst_X)     |
++        FIELD_VALUE(0, DE_DESTINATION, Y,    dst_Y));
++
++    SMTC_write2Dreg(DE_DIMENSION,
++        FIELD_VALUE(0, DE_DIMENSION, X,    dst_width) |
++        FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
++
++    SMTC_write2Dreg(DE_CONTROL,
++        FIELD_SET  (0, DE_CONTROL, STATUS,     START)          |
++        FIELD_SET  (0, DE_CONTROL, DIRECTION,  LEFT_TO_RIGHT)  |
++        FIELD_SET  (0, DE_CONTROL, LAST_PIXEL, OFF)            |
++        FIELD_SET  (0, DE_CONTROL, COMMAND,    RECTANGLE_FILL) |
++        FIELD_SET  (0, DE_CONTROL, ROP_SELECT, ROP2)           |
++        FIELD_VALUE(0, DE_CONTROL, ROP,        0x0C));
++
++    smtc_de_busy = 1;
++}
++
++
++/**********************************************************************
++ *
++ * deRotatePattern
++ *
++ * Purpose
++ *    Rotate the given pattern if necessary
++ *
++ * Parameters
++ *    [in]
++ *        pPattern  - Pointer to DE_SURFACE structure containing
++ *                    pattern attributes
++ *        patternX  - X position (0-7) of pattern origin
++ *        patternY  - Y position (0-7) of pattern origin
++ *
++ *    [out]
++ *        pattern_dstaddr - Pointer to pre-allocated buffer containing rotated pattern
++ *
++ *
++ **********************************************************************/
++void deRotatePattern(unsigned char* pattern_dstaddr,
++                     unsigned long pattern_src_addr,
++                     unsigned long pattern_BPP,
++                     unsigned long pattern_stride,
++                     int patternX,
++                     int patternY)
++{
++    unsigned int i;
++    unsigned long pattern_read_addr;
++    unsigned long pattern[PATTERN_WIDTH * PATTERN_HEIGHT];
++    unsigned int x, y;
++	unsigned char* pjPatByte;
++
++    if (pattern_dstaddr != NULL)
++    {
++        deWaitForNotBusy();
++        
++        /* Load pattern from local video memory into pattern array */
++        pattern_read_addr = pattern_src_addr;
++        
++        for (i = 0; i < (pattern_BPP * 2); i++)
++        {
++//            pattern[i] = memRead32(pattern_read_addr);       removed by boyod
++            pattern_read_addr += 4;
++        }
++        
++        if (patternX || patternY)
++        {
++            /* Rotate pattern */
++            pjPatByte = (unsigned char*)pattern;
++            
++            switch (pattern_BPP)
++            {
++            case 8:
++                {
++                    for (y = 0; y < 8; y++)
++                    {
++                        unsigned char* pjBuffer = pattern_dstaddr + ((patternY + y) & 7) * 8;
++                        for (x = 0; x < 8; x++)
++                        {
++                            pjBuffer[(patternX + x) & 7] = pjPatByte[x];
++                        }
++                        pjPatByte += pattern_stride;
++                    }
++                    break;
++                }
++                
++            case 16:
++                {
++                    for (y = 0; y < 8; y++)
++                    {
++                        unsigned short* pjBuffer = (unsigned short*) pattern_dstaddr + ((patternY + y) & 7) * 8;
++                        for (x = 0; x < 8; x++)
++                        {
++                            pjBuffer[(patternX + x) & 7] = ((unsigned short*) pjPatByte)[x];
++                        }
++                        pjPatByte += pattern_stride;
++                    }
++                    break;
++                }
++                
++            case 32:
++                {
++                    for (y = 0; y < 8; y++)
++                    {
++                        unsigned long* pjBuffer = (unsigned long*) pattern_dstaddr + ((patternY + y) & 7) * 8;
++                        for (x = 0; x < 8; x++)
++                        {
++                            pjBuffer[(patternX + x) & 7] = ((unsigned long*) pjPatByte)[x];
++                        }
++                        pjPatByte += pattern_stride;
++                    }
++                    break;
++                }
++            }
++        }
++        else
++        {
++            /* Don't rotate, just copy pattern into pattern_dstaddr */
++            for (i = 0; i < (pattern_BPP * 2); i++)
++            {
++                ((unsigned long *)pattern_dstaddr)[i] = pattern[i];
++            }
++        }
++        
++    }
++}
++
++
++/**********************************************************************
++ *
++ * deMonoPatternFill
++ *
++ * Purpose
++ *    Copy the specified monochrome pattern into the destination surface
++ *
++ * Remarks
++ *       Pattern size must be 8x8 pixel. 
++ *       Pattern color depth must be same as destination bitmap or monochrome.
++**********************************************************************/
++void deMonoPatternFill(unsigned long dst_base,
++                       unsigned long dst_pitch,  
++                       unsigned long dst_BPP,
++                       unsigned long dstX, 
++                       unsigned long dstY,
++                       unsigned long dst_width,
++                       unsigned long dst_height,
++                       unsigned long pattern_FGcolor,
++                       unsigned long pattern_BGcolor,
++                       unsigned long pattern_low, 
++                       unsigned long pattern_high)
++{
++    deWaitForNotBusy();
++    
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++    
++    SMTC_write2Dreg(DE_PITCH, FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |  FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
++    
++    SMTC_write2Dreg(DE_WINDOW_WIDTH,
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_pitch));
++
++    SMTC_write2Dreg(DE_FOREGROUND,
++        FIELD_VALUE(0, DE_FOREGROUND, COLOR, pattern_FGcolor));
++
++    SMTC_write2Dreg(DE_BACKGROUND,
++        FIELD_VALUE(0, DE_BACKGROUND, COLOR, pattern_BGcolor));
++
++    SMTC_write2Dreg(DE_MONO_PATTERN_LOW,
++        FIELD_VALUE(0, DE_MONO_PATTERN_LOW, PATTERN, pattern_low));
++
++    SMTC_write2Dreg(DE_MONO_PATTERN_HIGH,
++        FIELD_VALUE(0, DE_MONO_PATTERN_HIGH, PATTERN, pattern_high));
++    
++    SMTC_write2Dreg(DE_DESTINATION,
++        FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_DESTINATION, X,    dstX)      |
++        FIELD_VALUE(0, DE_DESTINATION, Y,    dstY));
++
++    SMTC_write2Dreg(DE_DIMENSION,
++        FIELD_VALUE(0, DE_DIMENSION, X,    dst_width) |
++        FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
++    
++    SMTC_write2Dreg(DE_CONTROL, 
++        FIELD_VALUE(0, DE_CONTROL, ROP, 0xF0) |
++        FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
++        FIELD_SET(0, DE_CONTROL, PATTERN, MONO)  |
++        FIELD_SET(0, DE_CONTROL, STATUS, START));
++
++    smtc_de_busy = 1;
++} /* deMonoPatternFill() */
++
++
++/**********************************************************************
++ *
++ * deColorPatternFill
++ *
++ * Purpose
++ *    Copy the specified pattern into the destination surface
++ *
++ * Parameters
++ *    [in]
++ *        pDestSurface   - Pointer to DE_SURFACE structure containing
++ *                         destination surface attributes
++ *        nX             - X coordinate of destination surface to be filled
++ *        nY             - Y coordinate of destination surface to be filled
++ *        dst_width         - Width (in pixels) of area to be filled
++ *        dst_height        - Height (in lines) of area to be filled
++ *        pPattern       - Pointer to DE_SURFACE structure containing
++ *                         pattern attributes
++ *        pPatternOrigin - Pointer to Point structure containing pattern origin
++ *        pMonoInfo      - Pointer to mono_pattern_info structure
++ *        pClipRect      - Pointer to Rect structure describing clipping
++ *                         rectangle; NULL if no clipping required
++ *
++ *    [out]
++ *        None
++ *
++ * Remarks
++ *       Pattern size must be 8x8 pixel. 
++ *       Pattern color depth must be same as destination bitmap.
++**********************************************************************/
++void deColorPatternFill(unsigned long dst_base,
++                        unsigned long dst_pitch,  
++                        unsigned long dst_BPP,  
++                        unsigned long dst_X, 
++                        unsigned long dst_Y, 
++                        unsigned long dst_width,
++                        unsigned long dst_height,
++                        unsigned long pattern_src_addr,
++                        unsigned long pattern_stride,
++                        int PatternOriginX,
++                        int PatternOriginY)
++{
++    unsigned int i;
++    unsigned long de_data_port_write_addr;
++    unsigned char ajPattern[PATTERN_WIDTH * PATTERN_HEIGHT * 4];
++    unsigned long de_ctrl = 0;
++    
++    deWaitForNotBusy();
++    
++    de_ctrl = FIELD_SET(0, DE_CONTROL, PATTERN, COLOR);
++    
++    SMTC_write2Dreg(DE_CONTROL, de_ctrl);
++    
++    /* Rotate pattern if necessary */
++    deRotatePattern(ajPattern, pattern_src_addr, dst_BPP, pattern_stride, PatternOriginX, PatternOriginY);
++    
++    /* Load pattern to 2D Engine Data Port */
++    de_data_port_write_addr = 0;
++    
++    for (i = 0; i < (dst_BPP * 2); i++)
++    {
++        SMTC_write2Ddataport(de_data_port_write_addr, ((unsigned long *)ajPattern)[i]);
++        de_data_port_write_addr += 4;
++    }
++    
++    deWaitForNotBusy();
++
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++ 
++    SMTC_write2Dreg(DE_PITCH,
++        FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
++        FIELD_VALUE(0, DE_PITCH, SOURCE,      dst_pitch));
++
++    SMTC_write2Dreg(DE_WINDOW_WIDTH,
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_pitch));
++
++    SMTC_write2Dreg(DE_DESTINATION,
++        FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_DESTINATION, X,    dst_X)      |
++        FIELD_VALUE(0, DE_DESTINATION, Y,    dst_Y));
++
++    SMTC_write2Dreg(DE_DIMENSION,
++        FIELD_VALUE(0, DE_DIMENSION, X,    dst_width) |
++        FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
++    
++    SMTC_write2Dreg(DE_CONTROL, 
++        FIELD_VALUE(0, DE_CONTROL, ROP, 0xF0) |
++        FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
++        FIELD_SET(0, DE_CONTROL, PATTERN, COLOR) |
++        FIELD_SET(0, DE_CONTROL, STATUS, START));
++
++    smtc_de_busy = 1;
++} /* deColorPatternFill() */
++
++
++/**********************************************************************
++ *
++ * deCopy
++ *
++ * Purpose
++ *    Copy a rectangular area of the source surface to a destination surface
++ *
++ * Remarks
++ *       Source bitmap must have the same color depth (BPP) as the destination bitmap.
++ *
++**********************************************************************/
++void deCopy(unsigned long dst_base,
++            unsigned long dst_pitch,  
++            unsigned long dst_BPP,  
++            unsigned long dst_X, 
++            unsigned long dst_Y, 
++            unsigned long dst_width,
++            unsigned long dst_height,
++            unsigned long src_base, 
++            unsigned long src_pitch,  
++            unsigned long src_X, 
++            unsigned long src_Y, 
++            pTransparent pTransp,
++            unsigned char nROP2)
++{
++    unsigned long nDirection = 0;
++    unsigned long nTransparent = 0;
++    unsigned long opSign = 1;    // Direction of ROP2 operation: 1 = Left to Right, (-1) = Right to Left
++    unsigned long xWidth = 192 / (dst_BPP / 8); // xWidth is in pixels
++    unsigned long de_ctrl = 0;
++    
++    deWaitForNotBusy();
++
++
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++
++    SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS, src_base));
++
++    if (dst_pitch && src_pitch)
++    {
++        SMTC_write2Dreg(DE_PITCH,
++            FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
++            FIELD_VALUE(0, DE_PITCH, SOURCE,      src_pitch));
++        
++        SMTC_write2Dreg(DE_WINDOW_WIDTH,
++            FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++            FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      src_pitch));
++    }
++    
++    /* Set transparent bits if necessary */
++    if (pTransp != NULL)
++    {
++        nTransparent = pTransp->match | pTransp->select | pTransp->control;
++        
++        /* Set color compare register */
++        SMTC_write2Dreg(DE_COLOR_COMPARE,
++            FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, pTransp->color));
++    }
++    
++    /* Determine direction of operation */
++    if (src_Y < dst_Y)
++    {
++    /* +----------+
++    |S         |
++    |   +----------+
++    |   |      |   |
++    |   |      |   |
++    +---|------+   |
++    |         D|
++        +----------+ */
++        
++        nDirection = BOTTOM_TO_TOP;
++    }
++    else if (src_Y > dst_Y)
++    {
++    /* +----------+
++    |D         |
++    |   +----------+
++    |   |      |   |
++    |   |      |   |
++    +---|------+   |
++    |         S|
++        +----------+ */
++        
++        nDirection = TOP_TO_BOTTOM;
++    }
++    else
++    {
++        /* src_Y == dst_Y */
++        
++        if (src_X <= dst_X)
++        {
++        /* +------+---+------+
++        |S     |   |     D|
++        |      |   |      |
++        |      |   |      |
++        |      |   |      |
++            +------+---+------+ */
++            
++            nDirection = RIGHT_TO_LEFT;
++        }
++        else
++        {
++            /* src_X > dst_X */
++            
++            /* +------+---+------+
++            |D     |   |     S|
++            |      |   |      |
++            |      |   |      |
++            |      |   |      |
++            +------+---+------+ */
++            
++            nDirection = LEFT_TO_RIGHT;
++        }
++    }
++    
++    if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT))
++    {
++        src_X += dst_width - 1;
++        src_Y += dst_height - 1;
++        dst_X += dst_width - 1;
++        dst_Y += dst_height - 1;
++        opSign = (-1);
++    }
++
++
++    if (dst_BPP>=24){
++            src_X*=3;
++            src_Y*=3;
++            dst_X*=3;
++	     dst_Y*=3;
++            dst_width*=3;
++	    if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT))
++		    {
++		        src_X += 2;
++		        dst_X += 2;
++		    }
++    	}
++		
++    /* Workaround for 192 byte hw bug */
++    if ((nROP2 != 0x0C) && ((dst_width * (dst_BPP / 8)) >= 192))
++    {
++        /* Perform the ROP2 operation in chunks of (xWidth * dst_height) */
++        while (1)
++        {
++            deWaitForNotBusy();
++            SMTC_write2Dreg(DE_SOURCE,
++                FIELD_SET  (0, DE_SOURCE, WRAP, DISABLE) |
++                FIELD_VALUE(0, DE_SOURCE, X_K1, src_X)   |
++                FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
++            SMTC_write2Dreg(DE_DESTINATION,
++                FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++                FIELD_VALUE(0, DE_DESTINATION, X,    dst_X)  |
++                FIELD_VALUE(0, DE_DESTINATION, Y,    dst_Y));
++            SMTC_write2Dreg(DE_DIMENSION,
++                FIELD_VALUE(0, DE_DIMENSION, X,    xWidth) |
++                FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
++            de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) |
++                nTransparent |
++                FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
++                FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
++                ((nDirection == 1) ? FIELD_SET(0, DE_CONTROL, DIRECTION, RIGHT_TO_LEFT)
++                : FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)) |
++                FIELD_SET(0, DE_CONTROL, STATUS, START);
++            SMTC_write2Dreg(DE_CONTROL, de_ctrl);
++            
++            src_X += (opSign * xWidth);
++            dst_X += (opSign * xWidth);
++            dst_width -= xWidth;
++            
++            if (dst_width <= 0)
++            {
++                /* ROP2 operation is complete */
++                break;
++            }
++            
++            if (xWidth > dst_width)
++            {
++                xWidth = dst_width;
++            }
++        }
++    }
++    else
++    {
++        deWaitForNotBusy();
++        SMTC_write2Dreg(DE_SOURCE,
++            FIELD_SET  (0, DE_SOURCE, WRAP, DISABLE) |
++            FIELD_VALUE(0, DE_SOURCE, X_K1, src_X)   |
++            FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
++        SMTC_write2Dreg(DE_DESTINATION,
++            FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++            FIELD_VALUE(0, DE_DESTINATION, X,    dst_X)  |
++            FIELD_VALUE(0, DE_DESTINATION, Y,    dst_Y));
++        SMTC_write2Dreg(DE_DIMENSION,
++            FIELD_VALUE(0, DE_DIMENSION, X,    dst_width) |
++            FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
++        de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) |
++            nTransparent |
++            FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
++            FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
++            ((nDirection == 1) ? FIELD_SET(0, DE_CONTROL, DIRECTION, RIGHT_TO_LEFT)
++            : FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)) |
++            FIELD_SET(0, DE_CONTROL, STATUS, START);
++        SMTC_write2Dreg(DE_CONTROL, de_ctrl);
++    }
++
++    smtc_de_busy = 1;
++}
++
++
++/**********************************************************************
++ *
++ * deSrcCopyHost
++ *
++ * Purpose
++ *    Copy a rectangular area of the source surface in system memory to
++ *    a destination surface in video memory
++ *
++ * Remarks
++ *       Source bitmap must have the same color depth (BPP) as the destination bitmap.
++ *
++**********************************************************************/
++void deSrcCopyHost(unsigned long dst_base, 
++                   unsigned long dst_pitch,  
++                   unsigned long dst_BPP,  
++                   unsigned long dst_X, 
++                   unsigned long dst_Y,
++                   unsigned long dst_width, 
++                   unsigned long dst_height, 
++                   unsigned long src_base, 
++                   unsigned long src_stride,  
++                   unsigned long src_X, 
++                   unsigned long src_Y,
++                   pTransparent pTransp,
++                   unsigned char nROP2)
++{
++    int nBytes_per_scan;
++    int nBytes8_per_scan;
++    int nBytes_remain;
++    int nLong;
++    unsigned long nTransparent = 0;
++    unsigned long de_ctrl = 0;
++    unsigned long i;
++    int j;
++    unsigned long ulSrc;
++    unsigned long de_data_port_write_addr;
++    unsigned char abyRemain[8] = {0, 0, 0, 0, 0, 0, 0, 0};
++    unsigned char *pSrcBuffer;
++    
++    pSrcBuffer = (unsigned char*)(src_base + src_Y * src_stride + src_X * (dst_BPP / 8));
++
++    nBytes_per_scan = dst_width * (dst_BPP / 8);
++    nBytes8_per_scan = (nBytes_per_scan + 7) & ~7;
++    nBytes_remain = nBytes_per_scan & 7;
++    nLong = nBytes_per_scan & ~7;
++    
++    /* Program 2D Drawing Engine */
++    deWaitForNotBusy();
++
++    /* Set transparent bits if necessary */
++    if (pTransp != NULL)
++    {
++        nTransparent = pTransp->match | pTransp->select | pTransp->control;
++        
++        /* Set color compare register */
++        SMTC_write2Dreg(DE_COLOR_COMPARE,
++            FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, pTransp->color));
++    }
++    
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++    
++    SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS, 0));
++    
++    SMTC_write2Dreg(DE_SOURCE,
++        FIELD_SET  (0, DE_SOURCE, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_SOURCE, X_K1, 0)       |
++        FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
++    SMTC_write2Dreg(DE_DESTINATION,
++        FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_DESTINATION, X,    dst_X)  |
++        FIELD_VALUE(0, DE_DESTINATION, Y,    dst_Y));
++    SMTC_write2Dreg(DE_DIMENSION,
++        FIELD_VALUE(0, DE_DIMENSION, X,    dst_width) |
++        FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
++    SMTC_write2Dreg(DE_PITCH,
++        FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_width) |
++        FIELD_VALUE(0, DE_PITCH, SOURCE,      dst_width));
++    SMTC_write2Dreg(DE_WINDOW_WIDTH,
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_width) |
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_width));
++    de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) |
++        nTransparent |
++        FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
++        FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
++        FIELD_SET(0, DE_CONTROL, STATUS, START);
++    SMTC_write2Dreg(DE_CONTROL, de_ctrl);
++    
++    /* Write bitmap/image data (line by line) to 2D Engine data port */
++    de_data_port_write_addr = 0;
++    
++    for (i = 1; i < dst_height; i++)
++    {
++        for (j = 0; j < (nBytes8_per_scan / 4); j++)
++        {
++            memcpy(&ulSrc, (pSrcBuffer + (j * 4)), 4);
++            SMTC_write2Ddataport(de_data_port_write_addr, ulSrc);
++        }
++        
++        pSrcBuffer += src_stride;
++    }
++    
++    /* Special handling for last line of bitmap */
++    if (nLong)
++    {
++        for (j = 0; j < (nLong / 4); j++)
++        {
++            memcpy(&ulSrc, (pSrcBuffer + (j * 4)), 4);
++            SMTC_write2Ddataport(de_data_port_write_addr, ulSrc);
++        }
++    }
++    
++    if (nBytes_remain)
++    {
++        memcpy(abyRemain, (pSrcBuffer + nLong), nBytes_remain);
++        SMTC_write2Ddataport(de_data_port_write_addr, *(unsigned long*)abyRemain);
++        SMTC_write2Ddataport(de_data_port_write_addr, *(unsigned long*)(abyRemain + 4));
++    }
++
++    smtc_de_busy = 1;
++}
++
++
++/**********************************************************************
++ *
++ * deMonoSrcCopyHost
++ *
++ * Purpose
++ *    Copy a rectangular area of the monochrome source surface in 
++ *    system memory to a destination surface in video memory
++ *
++ * Parameters
++ *    [in]
++ *        pSrcSurface  - Pointer to DE_SURFACE structure containing
++ *                       source surface attributes
++ *        pSrcBuffer   - Pointer to source buffer (system memory)
++ *                       containing monochrome image
++ *        src_X        - X coordinate of source surface
++ *        src_Y        - Y coordinate of source surface
++ *        pDestSurface - Pointer to DE_SURFACE structure containing
++ *                       destination surface attributes
++ *        dst_X       - X coordinate of destination surface
++ *        dst_Y       - Y coordinate of destination surface
++ *        dst_width       - Width (in pixels) of the area to be copied
++ *        dst_height      - Height (in lines) of the area to be copied
++ *        nFgColor     - Foreground color
++ *        nBgColor     - Background color
++ *        pClipRect    - Pointer to Rect structure describing clipping
++ *                       rectangle; NULL if no clipping required
++ *        pTransp      - Pointer to Transparent structure containing
++ *                       transparency settings; NULL if no transparency
++ *                       required
++ *
++ *    [out]
++ *        None
++ *
++ * Returns
++ *    DDK_OK                      - function is successful
++ *    DDK_ERROR_NULL_PSRCSURFACE  - pSrcSurface is NULL
++ *    DDK_ERROR_NULL_PDESTSURFACE - pDestSurface is NULL
++ *
++**********************************************************************/
++void deMonoSrcCopyHost(unsigned long dst_base, 
++                      unsigned long dst_pitch,  
++                      unsigned long dst_BPP,  
++                      unsigned long dst_X, 
++                      unsigned long dst_Y,
++                      unsigned long dst_width, 
++                      unsigned long dst_height, 
++                      unsigned long src_base, 
++                      unsigned long src_stride,  
++                      unsigned long src_X, 
++                      unsigned long src_Y,
++                      unsigned long nFgColor, 
++                      unsigned long nBgColor,
++                      pTransparent pTransp)
++{
++    int nLeft_bits_off;
++    int nBytes_per_scan;
++    int nBytes4_per_scan;
++    int nBytes_remain;
++    int nLong;
++    unsigned long nTransparent = 0;
++    unsigned long de_ctrl = 0;
++    unsigned long de_data_port_write_addr;
++    unsigned long i;
++    int j;
++	unsigned long ulSrc;
++    unsigned char * pSrcBuffer;
++
++    pSrcBuffer = (unsigned char *)src_base+(src_Y * src_stride) + (src_X / 8);
++    nLeft_bits_off = (src_X & 0x07);
++    nBytes_per_scan = (dst_width + nLeft_bits_off + 7) / 8;
++    nBytes4_per_scan = (nBytes_per_scan + 3) & ~3;
++    nBytes_remain = nBytes_per_scan & 3;
++    nLong = nBytes_per_scan & ~3;
++
++    deWaitForNotBusy();
++    
++    /* Set transparent bits if necessary */
++    if (pTransp != NULL)
++    {
++        nTransparent = pTransp->match | pTransp->select | pTransp->control;
++        
++        /* Set color compare register */
++        SMTC_write2Dreg(DE_COLOR_COMPARE,
++            FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, pTransp->color));
++    }
++    
++    /* Program 2D Drawing Engine */
++
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS, dst_base));
++
++    SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS, 0));
++
++    SMTC_write2Dreg(DE_PITCH,
++        FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
++        FIELD_VALUE(0, DE_PITCH, SOURCE,      dst_pitch));
++    
++    SMTC_write2Dreg(DE_WINDOW_WIDTH,
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, dst_pitch) |
++        FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      dst_pitch));
++
++    SMTC_write2Dreg(DE_SOURCE,
++        FIELD_SET  (0, DE_SOURCE, WRAP, DISABLE)        |
++        FIELD_VALUE(0, DE_SOURCE, X_K1, nLeft_bits_off) |
++        FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
++
++    SMTC_write2Dreg(DE_DESTINATION,
++        FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_DESTINATION, X,    dst_X)  |
++        FIELD_VALUE(0, DE_DESTINATION, Y,    dst_Y));
++
++    SMTC_write2Dreg(DE_DIMENSION,
++        FIELD_VALUE(0, DE_DIMENSION, X,    dst_width) |
++        FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
++
++    SMTC_write2Dreg(DE_FOREGROUND,
++        FIELD_VALUE(0, DE_FOREGROUND, COLOR, nFgColor));
++
++    SMTC_write2Dreg(DE_BACKGROUND,
++        FIELD_VALUE(0, DE_BACKGROUND, COLOR, nBgColor));
++    
++    de_ctrl = 0x0000000C |
++        FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
++        FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
++        FIELD_SET(0, DE_CONTROL, HOST, MONO) |
++        nTransparent |
++        FIELD_SET(0, DE_CONTROL, STATUS, START);
++    SMTC_write2Dreg(DE_CONTROL, de_ctrl);
++    
++    /* Write bitmap/image data (line by line) to 2D Engine data port */
++    de_data_port_write_addr = 0;
++    
++    for (i = 1; i < dst_height; i++)
++    {
++        for (j = 0; j < (nBytes4_per_scan / 4); j++)
++        {
++            memcpy(&ulSrc, (pSrcBuffer + (j * 4)), 4);
++            SMTC_write2Ddataport(de_data_port_write_addr, ulSrc);
++        }
++        
++        pSrcBuffer += src_stride;
++    }
++    
++    /* Special handling for last line of bitmap */
++    if (nLong)
++    {
++        for (j = 0; j < (nLong / 4); j++)
++        {
++            memcpy(&ulSrc, (pSrcBuffer + (j * 4)), 4);
++            SMTC_write2Ddataport(de_data_port_write_addr, ulSrc);
++        }
++    }
++    
++    if (nBytes_remain)
++    {
++        memcpy(&ulSrc, (pSrcBuffer + nLong), nBytes_remain);
++        SMTC_write2Ddataport(de_data_port_write_addr, ulSrc);
++    }
++
++    smtc_de_busy = 1;
++}
++
++/*
++ * This function sets the pixel format that will apply to the 2D Engine.
++ */
++void deSetPixelFormat(
++    unsigned long bpp
++)
++{
++    unsigned long de_format;
++    
++    de_format = SMTC_read2Dreg(DE_STRETCH_FORMAT);
++    
++    switch (bpp)
++    {
++        case 8:
++            de_format = FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 8);
++            break;
++        default:
++        case 16:
++            de_format = FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 16);
++            break;
++        case 32:
++            de_format = FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 32);
++            break;
++    }
++    
++    SMTC_write2Dreg(DE_STRETCH_FORMAT, de_format);
++}
++
++
++
++/*
++ * System memory to Video memory monochrome expansion.
++ * Source is monochrome image in system memory.
++ * This function expands the monochrome data to color image in video memory.
++ */
++long deSystemMem2VideoMemMonoBlt(
++unsigned char *pSrcbuf, /* pointer to start of source buffer in system memory */
++long srcDelta,          /* Pitch value (in bytes) of the source buffer, +ive means top down and -ive mean button up */
++unsigned long startBit, /* Mono data can start at any bit in a byte, this value should be 0 to 7 */
++unsigned long dBase,    /* Address of destination: offset in frame buffer */
++unsigned long dPitch,   /* Pitch value of destination surface in BYTE */
++unsigned long bpp,      /* Color depth of destination surface */
++unsigned long dx,
++unsigned long dy,       /* Starting coordinate of destination surface */
++unsigned long width, 
++unsigned long height,   /* width and height of rectange in pixel value */
++unsigned long fColor,   /* Foreground color (corresponding to a 1 in the monochrome data */
++unsigned long bColor,   /* Background color (corresponding to a 0 in the monochrome data */
++unsigned long rop2)     /* ROP value */
++{
++    unsigned long bytePerPixel;
++    unsigned long ulBytesPerScan;
++    unsigned long ul4BytesPerScan;
++    unsigned long ulBytesRemain;
++    unsigned long de_ctrl = 0;
++    unsigned char ajRemain[4];
++    long i, j;
++
++    bytePerPixel = bpp/8;
++
++    startBit &= 7; /* Just make sure the start bit is within legal range */
++    ulBytesPerScan = (width + startBit + 7) / 8;
++    ul4BytesPerScan = ulBytesPerScan & ~3;
++    ulBytesRemain = ulBytesPerScan & 3;
++
++ 	if (smtc_de_busy)
++       	deWaitForNotBusy();
++
++    /* 2D Source Base.
++       Use 0 for HOST Blt.
++    */
++    SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, 0);
++
++    /* 2D Destination Base.
++       It is an address offset (128 bit aligned) from the beginning of frame buffer.
++    */
++    SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, dBase);
++
++
++    if (dPitch)
++    	{
++	    /* Program pitch (distance between the 1st points of two adjacent lines).
++	       Note that input pitch is BYTE value, but the 2D Pitch register uses
++	       pixel values. Need Byte to pixel convertion.
++	    */
++	    SMTC_write2Dreg(DE_PITCH,
++	        FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch/bytePerPixel) |
++	        FIELD_VALUE(0, DE_PITCH, SOURCE,      dPitch/bytePerPixel));
++
++	    /* Screen Window width in Pixels.
++	       2D engine uses this value to calculate the linear address in frame buffer for a given point.
++	    */
++	    SMTC_write2Dreg(DE_WINDOW_WIDTH,
++	        FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/bytePerPixel)) |
++	        FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE,      (dPitch/bytePerPixel)));
++    	}
++    /* Note: For 2D Source in Host Write, only X_K1 field is needed, and Y_K2 field is not used.
++             For mono bitmap, use startBit for X_K1. */
++    SMTC_write2Dreg(DE_SOURCE,
++        FIELD_SET  (0, DE_SOURCE, WRAP, DISABLE)  |
++        FIELD_VALUE(0, DE_SOURCE, X_K1, startBit) |
++        FIELD_VALUE(0, DE_SOURCE, Y_K2, 0));
++
++    SMTC_write2Dreg(DE_DESTINATION,
++        FIELD_SET  (0, DE_DESTINATION, WRAP, DISABLE) |
++        FIELD_VALUE(0, DE_DESTINATION, X,    dx)    |
++        FIELD_VALUE(0, DE_DESTINATION, Y,    dy));
++
++    SMTC_write2Dreg(DE_DIMENSION,
++        FIELD_VALUE(0, DE_DIMENSION, X,    width) |
++        FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));
++
++    SMTC_write2Dreg(DE_FOREGROUND, fColor);
++    SMTC_write2Dreg(DE_BACKGROUND, bColor);
++
++    if (bpp)
++	    deSetPixelFormat(bpp);
++    /* Set the pixel format of the destination */
++
++
++    de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2)         |
++              FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2)    |
++              FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
++              FIELD_SET(0, DE_CONTROL, HOST, MONO)          |
++              FIELD_SET(0, DE_CONTROL, STATUS, START);
++
++    SMTC_write2Dreg(DE_CONTROL, de_ctrl | deGetTransparency());
++
++    /* Write MONO data (line by line) to 2D Engine data port */
++    for (i=0; i<height; i++)
++    {
++        /* For each line, send the data in chunks of 4 bytes */
++        for (j=0; j<(ul4BytesPerScan/4); j++)
++        {
++            SMTC_write2Ddataport( 0, *(unsigned long *)(pSrcbuf + (j * 4)));
++        }
++
++        if (ulBytesRemain)
++        {
++            memcpy(ajRemain, pSrcbuf+ul4BytesPerScan, ulBytesRemain);
++            SMTC_write2Ddataport(0,*(unsigned long *)ajRemain);
++        }
++
++        pSrcbuf += srcDelta;
++    }
++    smtc_de_busy = 1;
++	
++    return 0;
++}
++
++
++/*
++ * This function gets the transparency status from DE_CONTROL register.
++ * It returns a double word with the transparent fields properly set,
++ * while other fields are 0.
++ */
++unsigned long deGetTransparency()
++{
++    unsigned long de_ctrl;
++
++    de_ctrl = SMTC_read2Dreg(DE_CONTROL);
++
++    de_ctrl &= 
++        FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) | 
++        FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT)| 
++        FIELD_MASK(DE_CONTROL_TRANSPARENCY);
++
++    return de_ctrl;
++}
++
++
++/**********************************************************************
++*
++ * Misc. functions
++ *
++ **********************************************************************/
++// Load 8x8 pattern into local video memory
++void deLoadPattern(unsigned char* pattern, unsigned long write_addr)
++{
++    int i;
++    for (i = 0; i < (8 * 8 * 2); i += 4)
++    {
++//        memWrite32(write_addr, *(unsigned long*)(&pattern[i]));     removed by boyod
++        write_addr += 4;
++    }
++}
+diff --git a/drivers/video/smi/smtc2d.h b/drivers/video/smi/smtc2d.h
+new file mode 100755
+index 0000000..a3d4104
+--- /dev/null
++++ b/drivers/video/smi/smtc2d.h
+@@ -0,0 +1,580 @@
++/*
++ *  linux/drivers/video/smtc2d.h -- Silicon Motion SM501 and SM7xx 2D drawing engine functions.
++ *
++ *      Copyright (C) 2006 Silicon Motion Technology Corp.
++ *      Ge Wang, gewang@siliconmotion.com
++ *
++ *  This file is subject to the terms and conditions of the GNU General Public
++ *  License version 2 or later. See the file COPYING in the main directory of 
++ *  this archive for more details.
++ */
++
++#ifndef NULL
++#define NULL    0
++#endif
++
++////////////////////////////////////////////////////////////////////////////////
++//                                                                            //
++// Internal macros                                                            //
++//                                                                            //
++////////////////////////////////////////////////////////////////////////////////
++
++#define _F_START(f)             (0 ? f)
++#define _F_END(f)               (1 ? f)
++#define _F_SIZE(f)              (1 + _F_END(f) - _F_START(f))
++#define _F_MASK(f)              (((1ULL << _F_SIZE(f)) - 1) << _F_START(f))
++#define _F_NORMALIZE(v, f)      (((v) & _F_MASK(f)) >> _F_START(f))
++#define _F_DENORMALIZE(v, f)    (((v) << _F_START(f)) & _F_MASK(f))
++
++
++////////////////////////////////////////////////////////////////////////////////
++//                                                                            //
++// Global macros                                                              //
++//                                                                            //
++////////////////////////////////////////////////////////////////////////////////
++
++#define FIELD_GET(x, reg, field) \
++( \
++    _F_NORMALIZE((x), reg ## _ ## field) \
++)
++
++#define FIELD_SET(x, reg, field, value) \
++( \
++    (x & ~_F_MASK(reg ## _ ## field)) \
++    | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \
++)
++
++#define FIELD_VALUE(x, reg, field, value) \
++( \
++    (x & ~_F_MASK(reg ## _ ## field)) \
++    | _F_DENORMALIZE(value, reg ## _ ## field) \
++)
++
++#define FIELD_CLEAR(reg, field) \
++( \
++    ~ _F_MASK(reg ## _ ## field) \
++)
++
++
++////////////////////////////////////////////////////////////////////////////////
++//                                                                            //
++// Field Macros                                                               //
++//                                                                            //
++////////////////////////////////////////////////////////////////////////////////
++
++#define FIELD_START(field)              (0 ? field)
++#define FIELD_END(field)                (1 ? field)
++#define FIELD_SIZE(field)               (1 + FIELD_END(field) - FIELD_START(field))
++#define FIELD_MASK(field)               (((1 << (FIELD_SIZE(field)-1)) | ((1 << (FIELD_SIZE(field)-1)) - 1)) << FIELD_START(field))
++#define FIELD_NORMALIZE(reg, field)     (((reg) & FIELD_MASK(field)) >> FIELD_START(field))
++#define FIELD_DENORMALIZE(field, value) (((value) << FIELD_START(field)) & FIELD_MASK(field))
++
++#define FIELD_INIT(reg, field, value)   FIELD_DENORMALIZE(reg ## _ ## field, \
++                                                          reg ## _ ## field ## _ ## value)
++#define FIELD_INIT_VAL(reg, field, value) \
++                                        (FIELD_DENORMALIZE(reg ## _ ## field, value))
++#define FIELD_VAL_SET(x, r, f, v)       x = x & ~FIELD_MASK(r ## _ ## f) \
++                                              | FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v)
++
++
++
++
++
++#define RGB(r, g, b) ((unsigned long)(((r) << 16) | ((g) << 8) | (b)))
++
++// Transparent info definition
++typedef struct
++{
++    unsigned long match;    // Matching pixel is OPAQUE/TRANSPARENT
++	unsigned long select;   // Transparency controlled by SOURCE/DESTINATION
++	unsigned long control;  // ENABLE/DISABLE transparency
++	unsigned long color;    // Transparent color
++} Transparent, *pTransparent;
++
++#define PIXEL_DEPTH_1_BP		0		// 1 bit per pixel
++#define PIXEL_DEPTH_8_BPP		1		// 8 bits per pixel
++#define PIXEL_DEPTH_16_BPP		2		// 16 bits per pixel
++#define PIXEL_DEPTH_32_BPP		3		// 32 bits per pixel
++#define PIXEL_DEPTH_YUV422		8		// 16 bits per pixel YUV422
++#define PIXEL_DEPTH_YUV420		9		// 16 bits per pixel YUV420
++
++#define PATTERN_WIDTH           8
++#define PATTERN_HEIGHT          8
++
++#define	TOP_TO_BOTTOM			0
++#define	BOTTOM_TO_TOP			1
++#define RIGHT_TO_LEFT			BOTTOM_TO_TOP
++#define LEFT_TO_RIGHT			TOP_TO_BOTTOM
++
++// Constants used in Transparent structure
++#define MATCH_OPAQUE            0x00000000
++#define MATCH_TRANSPARENT       0x00000400
++#define SOURCE                  0x00000000
++#define DESTINATION             0x00000200
++
++// 2D registers.
++
++#define DE_SOURCE                                       0x000000
++#define DE_SOURCE_WRAP                                  31:31
++#define DE_SOURCE_WRAP_DISABLE                          0
++#define DE_SOURCE_WRAP_ENABLE                           1
++#define DE_SOURCE_X_K1                                  29:16
++#define DE_SOURCE_Y_K2                                  15:0
++
++#define DE_DESTINATION                                  0x000004
++#define DE_DESTINATION_WRAP                             31:31
++#define DE_DESTINATION_WRAP_DISABLE                     0
++#define DE_DESTINATION_WRAP_ENABLE                      1
++#define DE_DESTINATION_X                                28:16
++#define DE_DESTINATION_Y                                15:0
++
++#define DE_DIMENSION                                    0x000008
++#define DE_DIMENSION_X                                  28:16
++#define DE_DIMENSION_Y_ET                               15:0
++
++#define DE_CONTROL                                      0x00000C
++#define DE_CONTROL_STATUS                               31:31
++#define DE_CONTROL_STATUS_STOP                          0
++#define DE_CONTROL_STATUS_START                         1
++#define DE_CONTROL_PATTERN                              30:30
++#define DE_CONTROL_PATTERN_MONO                         0
++#define DE_CONTROL_PATTERN_COLOR                        1
++#define DE_CONTROL_UPDATE_DESTINATION_X                 29:29
++#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE         0
++#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE          1
++#define DE_CONTROL_QUICK_START                          28:28
++#define DE_CONTROL_QUICK_START_DISABLE                  0
++#define DE_CONTROL_QUICK_START_ENABLE                   1
++#define DE_CONTROL_DIRECTION                            27:27
++#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT              0
++#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT              1
++#define DE_CONTROL_MAJOR                                26:26
++#define DE_CONTROL_MAJOR_X                              0
++#define DE_CONTROL_MAJOR_Y                              1
++#define DE_CONTROL_STEP_X                               25:25
++#define DE_CONTROL_STEP_X_POSITIVE                      1
++#define DE_CONTROL_STEP_X_NEGATIVE                      0
++#define DE_CONTROL_STEP_Y                               24:24
++#define DE_CONTROL_STEP_Y_POSITIVE                      1
++#define DE_CONTROL_STEP_Y_NEGATIVE                      0
++#define DE_CONTROL_STRETCH                              23:23
++#define DE_CONTROL_STRETCH_DISABLE                      0
++#define DE_CONTROL_STRETCH_ENABLE                       1
++#define DE_CONTROL_HOST                                 22:22
++#define DE_CONTROL_HOST_COLOR                           0
++#define DE_CONTROL_HOST_MONO                            1
++#define DE_CONTROL_LAST_PIXEL                           21:21
++#define DE_CONTROL_LAST_PIXEL_OFF                       0
++#define DE_CONTROL_LAST_PIXEL_ON                        1
++#define DE_CONTROL_COMMAND                              20:16
++#define DE_CONTROL_COMMAND_BITBLT                       0
++#define DE_CONTROL_COMMAND_RECTANGLE_FILL               1
++#define DE_CONTROL_COMMAND_DE_TILE                      2
++#define DE_CONTROL_COMMAND_TRAPEZOID_FILL               3
++#define DE_CONTROL_COMMAND_ALPHA_BLEND                  4
++#define DE_CONTROL_COMMAND_RLE_STRIP                    5
++#define DE_CONTROL_COMMAND_SHORT_STROKE                 6
++#define DE_CONTROL_COMMAND_LINE_DRAW                    7
++#define DE_CONTROL_COMMAND_HOST_WRITE                   8
++#define DE_CONTROL_COMMAND_HOST_READ                    9
++#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP         10
++#define DE_CONTROL_COMMAND_ROTATE                       11
++#define DE_CONTROL_COMMAND_FONT                         12
++#define DE_CONTROL_COMMAND_TEXTURE_LOAD                 15
++#define DE_CONTROL_ROP_SELECT                           15:15
++#define DE_CONTROL_ROP_SELECT_ROP3                      0
++#define DE_CONTROL_ROP_SELECT_ROP2                      1
++#define DE_CONTROL_ROP2_SOURCE                          14:14
++#define DE_CONTROL_ROP2_SOURCE_BITMAP                   0
++#define DE_CONTROL_ROP2_SOURCE_PATTERN                  1
++#define DE_CONTROL_MONO_DATA                            13:12
++#define DE_CONTROL_MONO_DATA_NOT_PACKED                 0
++#define DE_CONTROL_MONO_DATA_8_PACKED                   1
++#define DE_CONTROL_MONO_DATA_16_PACKED                  2
++#define DE_CONTROL_MONO_DATA_32_PACKED                  3
++#define DE_CONTROL_REPEAT_ROTATE                        11:11
++#define DE_CONTROL_REPEAT_ROTATE_DISABLE                0
++#define DE_CONTROL_REPEAT_ROTATE_ENABLE                 1
++#define DE_CONTROL_TRANSPARENCY_MATCH                   10:10
++#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE            0
++#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT       1
++#define DE_CONTROL_TRANSPARENCY_SELECT                  9:9
++#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE           0
++#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION      1
++#define DE_CONTROL_TRANSPARENCY                         8:8
++#define DE_CONTROL_TRANSPARENCY_DISABLE                 0
++#define DE_CONTROL_TRANSPARENCY_ENABLE                  1
++#define DE_CONTROL_ROP                                  7:0
++
++// Pseudo fields.
++
++#define DE_CONTROL_SHORT_STROKE_DIR                     27:24
++#define DE_CONTROL_SHORT_STROKE_DIR_225                 0
++#define DE_CONTROL_SHORT_STROKE_DIR_135                 1
++#define DE_CONTROL_SHORT_STROKE_DIR_315                 2
++#define DE_CONTROL_SHORT_STROKE_DIR_45                  3
++#define DE_CONTROL_SHORT_STROKE_DIR_270                 4
++#define DE_CONTROL_SHORT_STROKE_DIR_90                  5
++#define DE_CONTROL_SHORT_STROKE_DIR_180                 8
++#define DE_CONTROL_SHORT_STROKE_DIR_0                   10
++#define DE_CONTROL_ROTATION                             25:24
++#define DE_CONTROL_ROTATION_0                           0
++#define DE_CONTROL_ROTATION_270                         1
++#define DE_CONTROL_ROTATION_90                          2
++#define DE_CONTROL_ROTATION_180                         3
++
++#define DE_PITCH                                        0x000010
++#define DE_PITCH_DESTINATION                            28:16
++#define DE_PITCH_SOURCE                                 12:0
++
++#define DE_FOREGROUND                                   0x000014
++#define DE_FOREGROUND_COLOR                             31:0
++
++#define DE_BACKGROUND                                   0x000018
++#define DE_BACKGROUND_COLOR                             31:0
++
++#define DE_STRETCH_FORMAT                               0x00001C
++#define DE_STRETCH_FORMAT_PATTERN_XY                    30:30
++#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL             0
++#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE          1
++#define DE_STRETCH_FORMAT_PATTERN_Y                     29:27
++#define DE_STRETCH_FORMAT_PATTERN_X                     25:23
++#define DE_STRETCH_FORMAT_PIXEL_FORMAT                  21:20
++#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8                0
++#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16               1
++#define DE_STRETCH_FORMAT_PIXEL_FORMAT_24               3
++#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32               2
++#define DE_STRETCH_FORMAT_ADDRESSING                    19:16
++#define DE_STRETCH_FORMAT_ADDRESSING_XY                 0
++#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR             15
++#define DE_STRETCH_FORMAT_SOURCE_HEIGHT                 11:0
++
++#define DE_COLOR_COMPARE                                0x000020
++#define DE_COLOR_COMPARE_COLOR                          23:0
++
++#define DE_COLOR_COMPARE_MASK                           0x000024
++#define DE_COLOR_COMPARE_MASK_MASKS                     23:0
++
++#define DE_MASKS                                        0x000028
++#define DE_MASKS_BYTE_MASK                              31:16
++#define DE_MASKS_BIT_MASK                               15:0
++
++#define DE_CLIP_TL                                      0x00002C
++#define DE_CLIP_TL_TOP                                  31:16
++#define DE_CLIP_TL_STATUS                               13:13
++#define DE_CLIP_TL_STATUS_DISABLE                       0
++#define DE_CLIP_TL_STATUS_ENABLE                        1
++#define DE_CLIP_TL_INHIBIT                              12:12
++#define DE_CLIP_TL_INHIBIT_OUTSIDE                      0
++#define DE_CLIP_TL_INHIBIT_INSIDE                       1
++#define DE_CLIP_TL_LEFT                                 11:0
++
++#define DE_CLIP_BR                                      0x000030
++#define DE_CLIP_BR_BOTTOM                               31:16
++#define DE_CLIP_BR_RIGHT                                12:0
++
++#define DE_MONO_PATTERN_LOW                             0x000034
++#define DE_MONO_PATTERN_LOW_PATTERN                     31:0
++
++#define DE_MONO_PATTERN_HIGH                            0x000038
++#define DE_MONO_PATTERN_HIGH_PATTERN                    31:0
++
++#define DE_WINDOW_WIDTH                                 0x00003C
++#define DE_WINDOW_WIDTH_DESTINATION                     28:16
++#define DE_WINDOW_WIDTH_SOURCE                          12:0
++
++#define DE_WINDOW_SOURCE_BASE                           0x000040
++#define DE_WINDOW_SOURCE_BASE_EXT                       27:27
++#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL                 0
++#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL              1
++#define DE_WINDOW_SOURCE_BASE_CS                        26:26
++#define DE_WINDOW_SOURCE_BASE_CS_0                      0
++#define DE_WINDOW_SOURCE_BASE_CS_1                      1
++#define DE_WINDOW_SOURCE_BASE_ADDRESS                   25:0
++
++#define DE_WINDOW_DESTINATION_BASE                      0x000044
++#define DE_WINDOW_DESTINATION_BASE_EXT                  27:27
++#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL            0
++#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL         1
++#define DE_WINDOW_DESTINATION_BASE_CS                   26:26
++#define DE_WINDOW_DESTINATION_BASE_CS_0                 0
++#define DE_WINDOW_DESTINATION_BASE_CS_1                 1
++#define DE_WINDOW_DESTINATION_BASE_ADDRESS              25:0
++
++#define DE_ALPHA                                        0x000048
++#define DE_ALPHA_VALUE                                  7:0
++
++#define DE_WRAP                                         0x00004C
++#define DE_WRAP_X                                       31:16
++#define DE_WRAP_Y                                       15:0
++
++#define DE_STATUS                                       0x000050
++#define DE_STATUS_CSC                                   1:1
++#define DE_STATUS_CSC_CLEAR                             0
++#define DE_STATUS_CSC_NOT_ACTIVE                        0
++#define DE_STATUS_CSC_ACTIVE                            1
++#define DE_STATUS_2D                                    0:0
++#define DE_STATUS_2D_CLEAR                              0
++#define DE_STATUS_2D_NOT_ACTIVE                         0
++#define DE_STATUS_2D_ACTIVE                             1
++
++// Color Space Conversion registers.
++
++#define CSC_Y_SOURCE_BASE                               0x0000C8
++#define CSC_Y_SOURCE_BASE_EXT                           27:27
++#define CSC_Y_SOURCE_BASE_EXT_LOCAL                     0
++#define CSC_Y_SOURCE_BASE_EXT_EXTERNAL                  1
++#define CSC_Y_SOURCE_BASE_CS                            26:26
++#define CSC_Y_SOURCE_BASE_CS_0                          0
++#define CSC_Y_SOURCE_BASE_CS_1                          1
++#define CSC_Y_SOURCE_BASE_ADDRESS                       25:0
++
++#define CSC_CONSTANTS                                   0x0000CC
++#define CSC_CONSTANTS_Y                                 31:24
++#define CSC_CONSTANTS_R                                 23:16
++#define CSC_CONSTANTS_G                                 15:8
++#define CSC_CONSTANTS_B                                 7:0
++
++#define CSC_Y_SOURCE_X                                  0x0000D0
++#define CSC_Y_SOURCE_X_INTEGER                          26:16
++#define CSC_Y_SOURCE_X_FRACTION                         15:3
++
++#define CSC_Y_SOURCE_Y                                  0x0000D4
++#define CSC_Y_SOURCE_Y_INTEGER                          27:16
++#define CSC_Y_SOURCE_Y_FRACTION                         15:3
++
++#define CSC_U_SOURCE_BASE                               0x0000D8
++#define CSC_U_SOURCE_BASE_EXT                           27:27
++#define CSC_U_SOURCE_BASE_EXT_LOCAL                     0
++#define CSC_U_SOURCE_BASE_EXT_EXTERNAL                  1
++#define CSC_U_SOURCE_BASE_CS                            26:26
++#define CSC_U_SOURCE_BASE_CS_0                          0
++#define CSC_U_SOURCE_BASE_CS_1                          1
++#define CSC_U_SOURCE_BASE_ADDRESS                       25:0
++
++#define CSC_V_SOURCE_BASE                               0x0000DC
++#define CSC_V_SOURCE_BASE_EXT                           27:27
++#define CSC_V_SOURCE_BASE_EXT_LOCAL                     0
++#define CSC_V_SOURCE_BASE_EXT_EXTERNAL                  1
++#define CSC_V_SOURCE_BASE_CS                            26:26
++#define CSC_V_SOURCE_BASE_CS_0                          0
++#define CSC_V_SOURCE_BASE_CS_1                          1
++#define CSC_V_SOURCE_BASE_ADDRESS                       25:0
++
++#define CSC_SOURCE_DIMENSION                            0x0000E0
++#define CSC_SOURCE_DIMENSION_X                          31:16
++#define CSC_SOURCE_DIMENSION_Y                          15:0
++
++#define CSC_SOURCE_PITCH                                0x0000E4
++#define CSC_SOURCE_PITCH_Y                              31:16
++#define CSC_SOURCE_PITCH_UV                             15:0
++
++#define CSC_DESTINATION                                 0x0000E8
++#define CSC_DESTINATION_WRAP                            31:31
++#define CSC_DESTINATION_WRAP_DISABLE                    0
++#define CSC_DESTINATION_WRAP_ENABLE                     1
++#define CSC_DESTINATION_X                               27:16
++#define CSC_DESTINATION_Y                               11:0
++
++#define CSC_DESTINATION_DIMENSION                       0x0000EC
++#define CSC_DESTINATION_DIMENSION_X                     31:16
++#define CSC_DESTINATION_DIMENSION_Y                     15:0
++
++#define CSC_DESTINATION_PITCH                           0x0000F0
++#define CSC_DESTINATION_PITCH_X                         31:16
++#define CSC_DESTINATION_PITCH_Y                         15:0
++
++#define CSC_SCALE_FACTOR                                0x0000F4
++#define CSC_SCALE_FACTOR_HORIZONTAL                     31:16
++#define CSC_SCALE_FACTOR_VERTICAL                       15:0
++
++#define CSC_DESTINATION_BASE                            0x0000F8
++#define CSC_DESTINATION_BASE_EXT                        27:27
++#define CSC_DESTINATION_BASE_EXT_LOCAL                  0
++#define CSC_DESTINATION_BASE_EXT_EXTERNAL               1
++#define CSC_DESTINATION_BASE_CS                         26:26
++#define CSC_DESTINATION_BASE_CS_0                       0
++#define CSC_DESTINATION_BASE_CS_1                       1
++#define CSC_DESTINATION_BASE_ADDRESS                    25:0
++
++#define CSC_CONTROL                                     0x0000FC
++#define CSC_CONTROL_STATUS                              31:31
++#define CSC_CONTROL_STATUS_STOP                         0
++#define CSC_CONTROL_STATUS_START                        1
++#define CSC_CONTROL_SOURCE_FORMAT                       30:28
++#define CSC_CONTROL_SOURCE_FORMAT_YUV422                0
++#define CSC_CONTROL_SOURCE_FORMAT_YUV420I               1
++#define CSC_CONTROL_SOURCE_FORMAT_YUV420                2
++#define CSC_CONTROL_SOURCE_FORMAT_YVU9                  3
++#define CSC_CONTROL_SOURCE_FORMAT_IYU1                  4
++#define CSC_CONTROL_SOURCE_FORMAT_IYU2                  5
++#define CSC_CONTROL_SOURCE_FORMAT_RGB565                6
++#define CSC_CONTROL_SOURCE_FORMAT_RGB8888               7
++#define CSC_CONTROL_DESTINATION_FORMAT                  27:26
++#define CSC_CONTROL_DESTINATION_FORMAT_RGB565           0
++#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888          1
++#define CSC_CONTROL_HORIZONTAL_FILTER                   25:25
++#define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE           0
++#define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE            1
++#define CSC_CONTROL_VERTICAL_FILTER                     24:24
++#define CSC_CONTROL_VERTICAL_FILTER_DISABLE             0
++#define CSC_CONTROL_VERTICAL_FILTER_ENABLE              1
++#define CSC_CONTROL_BYTE_ORDER                          23:23
++#define CSC_CONTROL_BYTE_ORDER_YUYV                     0
++#define CSC_CONTROL_BYTE_ORDER_UYVY                     1
++
++#define DE_DATA_PORT_501                                0x110000
++#define DE_DATA_PORT_712                                0x400000
++#define DE_DATA_PORT_722                                0x6000
++
++extern char *smtc_RegBaseAddress;	// point to virtual Memory Map IO starting address
++extern char *smtc_VRAMBaseAddress;		// point to virtual video memory starting address
++extern unsigned char smtc_de_busy;
++
++extern unsigned long memRead32(unsigned long nOffset);
++extern void memWrite32(unsigned long nOffset, unsigned long nData);
++unsigned long SMTC_read2Dreg(unsigned long nOffset);
++
++
++
++/* 2D functions */
++extern void deInit(unsigned int nModeWidth, unsigned int nModeHeight, unsigned int bpp);
++
++extern void deWaitForNotBusy(void);
++
++extern void deSetClipRectangle(int left, int top, int right, int bottom);
++
++extern void deVerticalLine(unsigned long dst_base,
++                    unsigned long dst_pitch, 
++                    unsigned long nX, 
++                    unsigned long nY, 
++                    unsigned long dst_height, 
++                    unsigned long nColor);
++
++extern void deHorizontalLine(unsigned long dst_base,
++                      unsigned long dst_pitch, 
++                      unsigned long nX, 
++                      unsigned long nY, 
++                      unsigned long dst_width, 
++                      unsigned long nColor);
++
++extern void deLine(unsigned long dst_base,
++            unsigned long dst_pitch,  
++            unsigned long nX1, 
++            unsigned long nY1, 
++            unsigned long nX2, 
++            unsigned long nY2, 
++            unsigned long nColor);
++
++extern void deFillRect(unsigned long dst_base,
++                unsigned long dst_pitch,  
++                unsigned long dst_X, 
++                unsigned long dst_Y, 
++                unsigned long dst_width, 
++                unsigned long dst_height, 
++                unsigned long nColor);
++
++extern void deRotatePattern(unsigned char* pattern_dstaddr,
++                     unsigned long pattern_src_addr,
++                     unsigned long pattern_BPP,
++                     unsigned long pattern_stride,
++                     int patternX,
++                     int patternY);
++
++extern void deMonoPatternFill(unsigned long dst_base,
++                       unsigned long dst_pitch,  
++                       unsigned long dst_BPP,
++                       unsigned long dstX, 
++                       unsigned long dstY,
++                       unsigned long dst_width,
++                       unsigned long dst_height,
++                       unsigned long pattern_FGcolor,
++                       unsigned long pattern_BGcolor,
++                       unsigned long pattern_low, 
++                       unsigned long pattern_high);
++
++extern void deColorPatternFill(unsigned long dst_base,
++                        unsigned long dst_pitch,  
++                        unsigned long dst_BPP,  
++                        unsigned long dst_X, 
++                        unsigned long dst_Y, 
++                        unsigned long dst_width,
++                        unsigned long dst_height,
++                        unsigned long pattern_src_addr,
++                        unsigned long pattern_stride,
++                        int PatternOriginX,
++                        int PatternOriginY);
++
++extern void deCopy(unsigned long dst_base,
++            unsigned long dst_pitch,  
++            unsigned long dst_BPP,  
++            unsigned long dst_X, 
++            unsigned long dst_Y, 
++            unsigned long dst_width,
++            unsigned long dst_height,
++            unsigned long src_base, 
++            unsigned long src_pitch,  
++            unsigned long src_X, 
++            unsigned long src_Y, 
++            pTransparent pTransp,
++            unsigned char nROP2);
++
++extern void deSrcCopyHost(unsigned long dst_base, 
++                   unsigned long dst_pitch,  
++                   unsigned long dst_BPP,  
++                   unsigned long dst_X, 
++                   unsigned long dst_Y,
++                   unsigned long dst_width, 
++                   unsigned long dst_height, 
++                   unsigned long src_base, 
++                   unsigned long src_stride,  
++                   unsigned long src_X, 
++                   unsigned long src_Y,
++                   pTransparent pTransp,
++                   unsigned char nROP2);
++
++extern void deMonoSrcCopyHost(unsigned long dst_base, 
++                      unsigned long dst_pitch,  
++                      unsigned long dst_BPP,  
++                      unsigned long dst_X, 
++                      unsigned long dst_Y,
++                      unsigned long dst_width, 
++                      unsigned long dst_height, 
++                      unsigned long src_base, 
++                      unsigned long src_stride,  
++                      unsigned long src_X, 
++                      unsigned long src_Y,
++                      unsigned long nFgColor, 
++                      unsigned long nBgColor,
++                      pTransparent pTransp);
++
++/*
++ * System memory to Video memory monochrome expansion.
++ * Source is monochrome image in system memory.
++ * This function expands the monochrome data to color image in video memory.
++ */
++long deSystemMem2VideoMemMonoBlt(
++unsigned char *pSrcbuf, /* pointer to start of source buffer in system memory */
++long srcDelta,          /* Pitch value (in bytes) of the source buffer, +ive means top down and -ive mean button up */
++unsigned long startBit, /* Mono data can start at any bit in a byte, this value should be 0 to 7 */
++unsigned long dBase,    /* Address of destination: offset in frame buffer */
++unsigned long dPitch,   /* Pitch value of destination surface in BYTE */
++unsigned long bpp,      /* Color depth of destination surface */
++unsigned long dx,
++unsigned long dy,       /* Starting coordinate of destination surface */
++unsigned long width, 
++unsigned long height,   /* width and height of rectange in pixel value */
++unsigned long fColor,   /* Foreground color (corresponding to a 1 in the monochrome data */
++unsigned long bColor,   /* Background color (corresponding to a 0 in the monochrome data */
++unsigned long rop2);    /* ROP value */
++
++unsigned long deGetTransparency();
++void deSetPixelFormat(
++    unsigned long bpp
++);
++
++
++	
++
++extern void deLoadPattern(unsigned char* pattern, unsigned long write_addr);
++
+diff --git a/drivers/video/smi/smtcfb.c b/drivers/video/smi/smtcfb.c
+new file mode 100755
+index 0000000..9cc4d01
+--- /dev/null
++++ b/drivers/video/smi/smtcfb.c
+@@ -0,0 +1,1261 @@
++/*
++ *  linux/drivers/video/smtcfb.c -- Silicon Motion SM501 and SM7xx frame buffer device
++ *
++ *      Copyright (C) 2006 Silicon Motion Technology Corp.
++ *      Ge Wang, gewang@siliconmotion.com
++ *      Boyod boyod.yang@siliconmotion.com.cn
++ *
++ *  This file is subject to the terms and conditions of the GNU General Public
++ *  License version 2 or later. See the file COPYING in the main directory of 
++ *  this archive for more details.
++*
++*
++* Version 0.10.26192.21.01
++    - Add PowerPC/Big endian support
++	- Add 2D support for Lynx
++    - Verified on 2.6.19.2                          Boyod.yang  <boyod.yang@siliconmotion.com.cn>
++
++* Version 0.09.2621.00.01
++    - Only support Linux Kernel's version 2.6.21.	Boyod.yang  <boyod.yang@siliconmotion.com.cn>
++
++* Version 0.09
++    - Only support Linux Kernel's version 2.6.12.	Boyod.yang  <boyod.yang@siliconmotion.com.cn>
++    
++*/
++
++#ifndef __KERNEL__
++#define __KERNEL__
++#endif
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/string.h>
++#include <linux/mm.h>
++#include <linux/tty.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/vmalloc.h>
++#include <linux/dma-mapping.h>
++#include <linux/interrupt.h>
++#include <linux/workqueue.h>
++#include <linux/wait.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <linux/console.h>
++
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <asm/div64.h>
++
++#ifdef CONFIG_PM
++#include <linux/pm.h>
++#endif
++
++#include <linux/screen_info.h>
++#include <linux/pci.h>
++#include <linux/init.h>
++
++#include "smtcfb.h"
++#include "smtc2d.h"
++
++#ifdef DEBUG
++#define smdbg(format, arg...)	printk(KERN_DEBUG format , ## arg)
++#else
++#define smdbg(format, arg...)
++#endif
++
++#define DEFAULT_VIDEO_MODE "800x600-16@60"
++#ifdef __BIG_ENDIAN
++struct screen_info screen_info;
++#endif
++
++
++
++/*
++ * globals
++ */
++ 
++static char *mode_option __devinitdata = DEFAULT_VIDEO_MODE;
++
++/*
++* Private structure
++*/
++struct smtcfb_info {
++        /*
++        * The following is a pointer to be passed into the
++        * functions below.  The modules outside the main
++        * voyager.c driver have no knowledge as to what
++        * is within this structure.
++        */
++        struct fb_info          fb;
++        struct display_switch   *dispsw;
++        struct pci_dev	        *dev;
++        signed int              currcon;
++
++        struct {
++                u8 red, green, blue;
++        } palette[NR_RGB];
++
++        u_int                   palette_size;
++};
++
++struct par_info {
++	/*
++	 * Hardware
++	 */
++	u16	chipID;
++	unsigned char   __iomem *m_pMMIO;
++       char            __iomem *m_pLFB;
++	char	*m_pDPR;
++	char	*m_pVPR;
++	char	*m_pCPR;
++
++	u_int	width;
++	u_int	height;
++	u_int	hz;
++    u_long  BaseAddressInVRAM;
++	u8	chipRevID;
++};
++
++struct vesa_mode_table	{
++	char mode_index[6];
++	u16 lfb_width;	
++	u16 lfb_height;		
++	u16 lfb_depth;	
++};
++
++
++static struct vesa_mode_table vesa_mode[] = 
++{
++	{"0x301", 640,  480,  8},
++	{"0x303", 800,  600,  8},
++	{"0x305", 1024, 768,	8},
++	{"0x307", 1280, 1024, 8},
++	
++	{"0x311", 640,  480,  16},
++	{"0x314", 800,  600,  16},
++	{"0x317", 1024, 768,	16},
++	{"0x31A", 1280, 1024, 16},
++	
++	{"0x312", 640,  480,  24},
++	{"0x315", 800,  600,  24},
++	{"0x318", 1024, 768,	24},
++	{"0x31B", 1280, 1024, 24},	
++	
++};
++
++char __iomem *smtc_RegBaseAddress;	// Memory Map IO starting address
++char __iomem *smtc_VRAMBaseAddress;	// video memory starting address
++
++
++char *smtc_2DBaseAddress;	// 2D engine starting address
++char *smtc_2Ddataport   ;	// 2D data port offset
++short smtc_2Dacceleration = 0;  //default no 2D acceleration
++
++static u32 colreg[17];
++static struct par_info hw;	// hardware information
++
++#if defined(CONFIG_FB_SM7XX_DUALHEAD)
++
++static u32 colreg2[17];
++static struct par_info hw2;	// hardware information for second display (CRT)
++struct smtcfb_info smtcfb_info2; //fb_info for second display (CRT)
++
++#endif //CONFIG_FB_SM501_DUALHEAD
++
++u16 smtc_ChipIDs[] = {
++    0x710,
++    0x712,
++    0x720
++};
++
++int sm712be_flag;
++
++int numSMTCchipIDs = sizeof(smtc_ChipIDs)/sizeof(u16);
++
++void deWaitForNotBusy(void)
++{
++	unsigned long i = 0x1000000;
++	while (i--)
++	{
++        if ((smtc_seqr(0x16) & 0x18) == 0x10)
++            break;
++	}
++    	smtc_de_busy = 0;
++}
++
++
++static void sm712_set_timing(struct smtcfb_info *sfb,struct par_info *ppar_info)
++{
++		int i=0,j=0;
++    u32 m_nScreenStride;
++    
++		smdbg("\nppar_info->width = %d ppar_info->height = %d sfb->fb.var.bits_per_pixel = %d ppar_info->hz = %d\n", 
++		ppar_info->width, ppar_info->height, sfb->fb.var.bits_per_pixel , ppar_info->hz);
++		
++    for (j=0;j < numVGAModes;j++) {
++		if (VGAMode[j].mmSizeX == ppar_info->width &&
++			VGAMode[j].mmSizeY == ppar_info->height &&
++			VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
++			VGAMode[j].hz == ppar_info->hz)
++		{
++			smdbg("\nVGAMode[j].mmSizeX  = %d VGAMode[j].mmSizeY = %d VGAMode[j].bpp = %d VGAMode[j].hz=%d\n", 
++				VGAMode[j].mmSizeX , VGAMode[j].mmSizeY, VGAMode[j].bpp, VGAMode[j].hz);			
++		  smdbg("VGAMode index=%d\n",j);
++			 
++			smtc_mmiowb(0x0,0x3c6);
++
++			smtc_seqw(0,0x1);
++
++			smtc_mmiowb(VGAMode[j].Init_MISC,0x3c2);
++
++			for (i=0;i<SIZE_SR00_SR04;i++)	// init SEQ register SR00 - SR04
++			{
++				smtc_seqw(i,VGAMode[j].Init_SR00_SR04[i]);
++			}
++
++			for (i=0;i<SIZE_SR10_SR24;i++)	// init SEQ register SR10 - SR24
++			{
++				smtc_seqw(i+0x10,VGAMode[j].Init_SR10_SR24[i]);
++			}
++
++			for (i=0;i<SIZE_SR30_SR75;i++)	// init SEQ register SR30 - SR75
++			{
++				if (((i+0x30) != 0x62) && ((i+0x30) != 0x6a) && ((i+0x30) != 0x6b))
++					smtc_seqw(i+0x30,VGAMode[j].Init_SR30_SR75[i]);
++			}
++			for (i=0;i<SIZE_SR80_SR93;i++)	// init SEQ register SR80 - SR93
++			{
++				smtc_seqw(i+0x80,VGAMode[j].Init_SR80_SR93[i]);
++			}
++			for (i=0;i<SIZE_SRA0_SRAF;i++)	// init SEQ register SRA0 - SRAF
++			{
++				smtc_seqw(i+0xa0,VGAMode[j].Init_SRA0_SRAF[i]);
++			}
++
++			for (i=0;i<SIZE_GR00_GR08;i++)	// init Graphic register GR00 - GR08
++			{
++				smtc_grphw(i,VGAMode[j].Init_GR00_GR08[i]);
++			}
++
++			for (i=0;i<SIZE_AR00_AR14;i++)	// init Attribute register AR00 - AR14
++			{
++
++				smtc_attrw(i,VGAMode[j].Init_AR00_AR14[i]);
++			}
++
++			for (i=0;i<SIZE_CR00_CR18;i++)	// init CRTC register CR00 - CR18
++			{
++				smtc_crtcw(i,VGAMode[j].Init_CR00_CR18[i]);
++			}
++
++			for (i=0;i<SIZE_CR30_CR4D;i++)	// init CRTC register CR30 - CR4D
++			{
++				smtc_crtcw(i+0x30,VGAMode[j].Init_CR30_CR4D[i]);
++			}
++
++			for (i=0;i<SIZE_CR90_CRA7;i++)	// init CRTC register CR90 - CRA7
++			{
++				smtc_crtcw(i+0x90,VGAMode[j].Init_CR90_CRA7[i]);
++			}
++			
++		}
++	}
++	smtc_mmiowb(0x67,0x3c2);
++	
++	// set VPR registers
++	writel(0x0,ppar_info->m_pVPR+0x0C);
++	writel(0x0,ppar_info->m_pVPR+0x40);
++	
++	// set data width
++	m_nScreenStride = (ppar_info->width * sfb->fb.var.bits_per_pixel) / 64;
++	switch (sfb->fb.var.bits_per_pixel)
++	{
++		case 8:
++			writel(0x0,ppar_info->m_pVPR+0x0);
++			break;
++		case 16:
++			writel(0x00020000,ppar_info->m_pVPR+0x0);
++			break;
++		case 24:
++			writel(0x00040000,ppar_info->m_pVPR+0x0);
++            break;
++    case 32:
++      writel(0x00030000,ppar_info->m_pVPR+0x0);
++			break;
++	}
++	writel((u32)(((m_nScreenStride + 2) << 16) | m_nScreenStride),ppar_info->m_pVPR+0x10);
++
++}
++
++
++static void sm712_setpalette(int regno, unsigned red, unsigned green, unsigned blue, struct fb_info *info)
++{
++    struct par_info *cur_par = (struct par_info*)info->par;
++    
++    if (cur_par->BaseAddressInVRAM)
++        smtc_seqw(0x66,(smtc_seqr(0x66) & 0xC3) | 0x20);//second display palette for dual head. Enable CRT RAM, 6-bit RAM
++    else
++        smtc_seqw(0x66,(smtc_seqr(0x66) & 0xC3) | 0x10); //primary display palette. Enable LCD RAM only, 6-bit RAM
++    smtc_mmiowb(regno,       dac_reg);
++    smtc_mmiowb(red   >> 10, dac_val);
++    smtc_mmiowb(green >> 10, dac_val);
++    smtc_mmiowb(blue  >> 10, dac_val);
++}
++
++
++static void smtc_set_timing(struct smtcfb_info *sfb,struct par_info *ppar_info)
++{
++    switch (ppar_info->chipID) 
++    {
++     case 0x710:
++    case 0x712:
++    case 0x720:
++        sm712_set_timing(sfb,ppar_info);
++        break;
++    }
++}
++
++static struct fb_var_screeninfo smtcfb_var = {
++	.xres 		= 1024,
++	.yres 		= 600,
++	.xres_virtual 	= 1024,
++	.yres_virtual 	= 600,
++	.bits_per_pixel = 16,
++        .red            = { 16, 8, 0 },
++        .green          = {  8, 8, 0 },
++        .blue           = {  0, 8, 0 },
++	.activate	= FB_ACTIVATE_NOW,
++	.height		= -1,
++	.width		= -1,
++	.vmode		= FB_VMODE_NONINTERLACED,
++};
++
++static struct fb_fix_screeninfo smtcfb_fix = {
++	.id 		= "sm712fb",
++	.type 		= FB_TYPE_PACKED_PIXELS,
++	.visual 	= FB_VISUAL_TRUECOLOR,
++	.line_length 	= 800*3,
++	.accel 		= FB_ACCEL_SMI_LYNX,
++};
++
++/* chan_to_field
++ *
++ * convert a colour value into a field position
++ *
++ * from pxafb.c
++*/
++
++static inline unsigned int chan_to_field(unsigned int chan,
++					 struct fb_bitfield *bf)
++{
++	chan &= 0xffff;
++	chan >>= 16 - bf->length;
++	return chan << bf->offset;
++}
++
++static int smtcfb_blank(int blank_mode, struct fb_info *info)
++{
++	/* clear DPMS setting */
++	switch (blank_mode) {
++    	case FB_BLANK_UNBLANK:
++	/* Screen On: HSync: On, VSync : On */
++		smtc_seqw(0x01,(smtc_seqr(0x01)&(~0x20)));
++		smtc_seqw(0x6a,0x16);
++		smtc_seqw(0x6b,0x02);
++		smtc_seqw(0x21,(smtc_seqr(0x21)&(~0x77)));
++		smtc_seqw(0x22,(smtc_seqr(0x22)&(~0x30)));
++		smtc_seqw(0x23,(smtc_seqr(0x23)&(~0xc0)));
++    		smtc_seqw(0x24,(smtc_seqr(0x24)|0x01));
++		smtc_seqw(0x31,(smtc_seqr(0x31)|0x03));
++       		break;
++    	case FB_BLANK_NORMAL:
++         /* Screen On: HSync: On, VSync : On */
++        	smtc_seqw(0x01,(smtc_seqr(0x01)&(~0x20)));
++        	smtc_seqw(0x6a,0x16);
++        	smtc_seqw(0x6b,0x02);
++        	smtc_seqw(0x22,(smtc_seqr(0x22)&(~0x30)));
++        	smtc_seqw(0x23,(smtc_seqr(0x23)&(~0xc0)));
++        	smtc_seqw(0x24,(smtc_seqr(0x24)|0x01));
++        	smtc_seqw(0x31,(smtc_seqr(0x31)&(~0x07)|0x00));
++	    	break;
++    	case FB_BLANK_VSYNC_SUSPEND:
++	 /* Screen On: HSync: On, VSync : Off */
++	  	smtc_seqw(0x01,(smtc_seqr(0x01)|0x20));
++        	smtc_seqw(0x20,(smtc_seqr(0x20)&(~0xB0)));
++        	smtc_seqw(0x6a,0x0c);
++        	smtc_seqw(0x6b,0x02);
++        	smtc_seqw(0x21,(smtc_seqr(0x21)|0x88));
++        	smtc_seqw(0x22,(smtc_seqr(0x22)&(~0x30)| 0x20));
++        	smtc_seqw(0x23,(smtc_seqr(0x23)&(~0xc0)| 0x20));
++        	smtc_seqw(0x24,(smtc_seqr(0x24)&(~0x01)));
++        	smtc_seqw(0x31,(smtc_seqr(0x31)&(~0x07)|0x00));
++        	smtc_seqw(0x34,(smtc_seqr(0x34)|0x80));
++        	break;
++    	case FB_BLANK_HSYNC_SUSPEND:
++         /* Screen On: HSync: Off, VSync : On */
++        	smtc_seqw(0x01,(smtc_seqr(0x01)|0x20));
++        	smtc_seqw(0x20,(smtc_seqr(0x20)&(~0xB0)));
++	  	smtc_seqw(0x6a,0x0c);
++        	smtc_seqw(0x6b,0x02);
++	  	smtc_seqw(0x21,(smtc_seqr(0x21)|0x88));
++        	smtc_seqw(0x22,(smtc_seqr(0x22)&(~0x30)| 0x10));
++        	smtc_seqw(0x23,(smtc_seqr(0x23)&(~0xc0)| 0xD8));
++        	smtc_seqw(0x24,(smtc_seqr(0x24)&(~0x01)));
++	 	smtc_seqw(0x31,(smtc_seqr(0x31)&(~0x07)|0x00));
++	 	smtc_seqw(0x34,(smtc_seqr(0x34)|0x80));
++		break;
++    	case FB_BLANK_POWERDOWN:
++         /* Screen On: HSync: Off, VSync : Off */
++	  	smtc_seqw(0x01,(smtc_seqr(0x01)|0x20));
++        	smtc_seqw(0x20,(smtc_seqr(0x20)&(~0xB0)));
++        	smtc_seqw(0x6a,0x0c);
++        	smtc_seqw(0x6b,0x02);
++        	smtc_seqw(0x21,(smtc_seqr(0x21)|0x88));
++        	smtc_seqw(0x22,(smtc_seqr(0x22)&(~0x30)| 0x30));
++        	smtc_seqw(0x23,(smtc_seqr(0x23)&(~0xc0)| 0xD8));
++        	smtc_seqw(0x24,(smtc_seqr(0x24)&(~0x01)));
++        	smtc_seqw(0x31,(smtc_seqr(0x31)&(~0x07)|0x00));
++        	smtc_seqw(0x34,(smtc_seqr(0x34)|0x80));
++	    	break;
++    	default:
++        	return -EINVAL;
++    }
++
++	return 0;
++}
++
++static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,  unsigned trans, struct fb_info *info)
++{
++	struct smtcfb_info *sfb = (struct smtcfb_info *)info;
++	u32 *pal,val;
++
++	if (regno > 255)
++		return 1;
++
++	switch (sfb->fb.fix.visual) {
++	case FB_VISUAL_DIRECTCOLOR:
++	case FB_VISUAL_TRUECOLOR:
++		/* 16/32 bit true-colour, use pseuo-palette for 16 base color*/
++		if (regno < 16) {
++			if (sfb->fb.var.bits_per_pixel==16)	{
++				u32 *pal = sfb->fb.pseudo_palette;	
++				val  = chan_to_field(red,   &sfb->fb.var.red);
++				val |= chan_to_field(green, &sfb->fb.var.green);
++				val |= chan_to_field(blue,  &sfb->fb.var.blue);
++#ifdef __BIG_ENDIAN
++				pal[regno] =( (red & 0xf800) >> 8) | ((green & 0xe000) >> 13) |((green & 0x1c00) << 3) | ((blue & 0xf800) >> 3);
++#else
++				pal[regno] = val;
++#endif
++			}
++			else{
++				u32 *pal = sfb->fb.pseudo_palette;	
++				val  = chan_to_field(red,   &sfb->fb.var.red);
++				val |= chan_to_field(green, &sfb->fb.var.green);
++				val |= chan_to_field(blue,  &sfb->fb.var.blue);
++#ifdef __BIG_ENDIAN
++				val = (val& 0xff00ff00>>8)|(val& 0x00ff00ff<<8);
++#endif
++				pal[regno] = val;
++			}
++		}
++		break;
++
++	case FB_VISUAL_PSEUDOCOLOR:
++		/* color depth 8 bit*/
++			sm712_setpalette(regno,red,green,blue, info);
++		break;
++
++	default:
++		return 1;   /* unknown type */
++	}
++
++	return 0;
++
++        
++}
++
++static ssize_t
++smtcfb_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
++{
++	unsigned long p = *ppos;
++
++//	struct inode *inode = file->f_path.dentry->d_inode;
++        struct inode *inode = file->f_dentry->d_inode;
++        int fbidx = iminor(inode);
++        struct fb_info *info = registered_fb[fbidx];
++
++	u32 *buffer, *dst;
++	u32 __iomem *src;
++	int c, i, cnt = 0, err = 0;
++	unsigned long total_size;
++
++	if (!info || ! info->screen_base)
++		return -ENODEV;
++
++	if (info->state != FBINFO_STATE_RUNNING)
++		return -EPERM;
++
++	total_size = info->screen_size;
++
++	if (total_size == 0)
++		total_size = info->fix.smem_len;
++
++	if (p >= total_size)
++		return 0;
++
++	if (count >= total_size)
++		count = total_size;
++
++	if (count + p > total_size)
++		count = total_size - p;
++
++	buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count,
++			 GFP_KERNEL);
++	if (!buffer)
++		return -ENOMEM;
++
++	src = (u32 __iomem *) (info->screen_base + p);
++
++	if (info->fbops->fb_sync)
++		info->fbops->fb_sync(info);
++
++	while (count) {
++		c  = (count > PAGE_SIZE) ? PAGE_SIZE : count;
++		dst = buffer;
++		for (i = c >> 2; i--; ){
++			*dst = fb_readl(src++);
++			*dst  = (*dst & 0xff00ff00>>8)|(*dst & 0x00ff00ff<<8);
++			dst++;
++			}
++		if (c & 3) {
++			u8 *dst8 = (u8 *) dst;
++			u8 __iomem *src8 = (u8 __iomem *) src;
++
++			for (i = c & 3; i--;){
++				if (i&1){
++				*dst8++ = fb_readb(++src8);
++				}
++				else{
++				*dst8++ = fb_readb(--src8);
++				src8 +=2;
++				}
++			}
++			src = (u32 __iomem *) src8;
++		}
++
++		if (copy_to_user(buf, buffer, c)) {
++			err = -EFAULT;
++			break;
++		}
++		*ppos += c;
++		buf += c;
++		cnt += c;
++		count -= c;
++	}
++
++	kfree(buffer);
++
++	return (err) ? err : cnt;
++}
++
++
++
++static ssize_t
++smtcfb_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
++{
++	unsigned long p = *ppos;
++//	struct inode *inode = file->f_path.dentry->d_inode;
++	struct inode *inode = file->f_dentry->d_inode;
++	int fbidx = iminor(inode);
++	struct fb_info *info = registered_fb[fbidx];
++	u32 *buffer, *src;
++	u32 __iomem *dst;
++	int c, i, cnt = 0, err = 0;
++	unsigned long total_size;
++
++	if (!info || !info->screen_base)
++		return -ENODEV;
++
++	if (info->state != FBINFO_STATE_RUNNING)
++		return -EPERM;
++
++	
++	total_size = info->screen_size;
++
++	if (total_size == 0)
++		total_size = info->fix.smem_len;
++
++	if (p > total_size)
++		return -EFBIG;
++
++	if (count > total_size) {
++		err = -EFBIG;
++		count = total_size;
++	}
++
++	if (count + p > total_size) {
++		if (!err)
++			err = -ENOSPC;
++
++		count = total_size - p;
++	}
++
++	buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count,
++			 GFP_KERNEL);
++	if (!buffer)
++		return -ENOMEM;
++
++	dst = (u32 __iomem *) (info->screen_base + p);
++
++	if (info->fbops->fb_sync)
++		info->fbops->fb_sync(info);
++
++	while (count) {
++		c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
++		src = buffer;
++
++		if (copy_from_user(src, buf, c)) {
++			err = -EFAULT;
++			break;
++		}
++
++		for (i = c >> 2; i--; ){
++			fb_writel( (*src& 0xff00ff00>>8)|(*src& 0x00ff00ff<<8), dst++);
++			src++;
++		}
++		if (c & 3) {
++			u8 *src8 = (u8 *) src;
++			u8 __iomem *dst8 = (u8 __iomem *) dst;
++
++			for (i = c & 3; i--; ){
++				if (i&1){
++				fb_writeb(*src8++, ++dst8);
++				}
++				else{
++				fb_writeb(*src8++, --dst8);
++				dst8 +=2;
++				}
++			}
++			dst = (u32 __iomem *) dst8;
++		}
++
++		*ppos += c;
++		buf += c;
++		cnt += c;
++		count -= c;
++	}
++
++	kfree(buffer);
++
++	return (cnt) ? cnt : err;
++}
++
++#include "smtc2d.c"
++
++static void smtcfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
++{
++   struct par_info *p = (struct par_info*)info->par;
++
++    if (smtc_2Dacceleration)
++    {
++        if (!area->width || !area->height)
++            return;
++
++        deCopy(p->BaseAddressInVRAM, 0, info->var.bits_per_pixel,  
++            area->dx, area->dy, area->width, area->height, 
++            p->BaseAddressInVRAM, 0, area->sx, area->sy, 0, 0xC);
++
++    }
++    else
++
++        cfb_copyarea(info, area);
++}
++
++static void smtcfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
++{
++    struct par_info *p = (struct par_info*)info->par;
++    
++    if (smtc_2Dacceleration)
++    {
++        if (!rect->width || !rect->height)
++            return;
++	if (info->var.bits_per_pixel>=24)
++        deFillRect(p->BaseAddressInVRAM, 0, rect->dx*3, rect->dy*3, rect->width*3, rect->height, rect->color);
++	else
++        deFillRect(p->BaseAddressInVRAM, 0, rect->dx, rect->dy, rect->width, rect->height, rect->color);
++    }
++    else
++
++        cfb_fillrect(info, rect);
++}
++
++static void smtcfb_imageblit(struct fb_info *info, const struct fb_image *image)
++{
++	    struct par_info *p = (struct par_info*)info->par;
++		u32 size, bg_col = 0, fg_col = 0;
++    if (smtc_2Dacceleration)
++    {
++        	if (image->depth == 1){
++		        if (smtc_de_busy)
++       		     deWaitForNotBusy();
++
++				switch (info->var.bits_per_pixel) {
++				case 8:
++					bg_col = image->bg_color;
++					fg_col = image->fg_color;
++					break;
++				case 16:
++					bg_col = ((u32 *) (info->pseudo_palette))[image->bg_color];
++					fg_col = ((u32 *) (info->pseudo_palette))[image->fg_color];
++					break;
++				case 32:
++					bg_col = ((u32 *) (info->pseudo_palette))[image->bg_color];
++					fg_col = ((u32 *) (info->pseudo_palette))[image->fg_color];
++					break;
++					}
++			deSystemMem2VideoMemMonoBlt(
++				image->data, /* pointer to start of source buffer in system memory */
++				image->width/8,          /* Pitch value (in bytes) of the source buffer, +ive means top down and -ive mean button up */
++				0, /* Mono data can start at any bit in a byte, this value should be 0 to 7 */
++				p->BaseAddressInVRAM,    /* Address of destination: offset in frame buffer */
++				0,   /* Pitch value of destination surface in BYTE */
++				0,      /* Color depth of destination surface */
++				image->dx,
++				image->dy,       /* Starting coordinate of destination surface */
++				image->width, 
++				image->height,   /* width and height of rectange in pixel value */
++				fg_col,   /* Foreground color (corresponding to a 1 in the monochrome data */
++				bg_col,   /* Background color (corresponding to a 0 in the monochrome data */
++				0x0C)     /* ROP value */;
++        	}
++		else
++       		 cfb_imageblit(info, image);
++    }
++    else
++        cfb_imageblit(info, image);
++}
++
++static struct fb_ops smtcfb_ops = {
++	.owner        =	THIS_MODULE,
++		.fb_setcolreg = smtc_setcolreg,
++		.fb_blank = smtcfb_blank,
++		.fb_fillrect  = smtcfb_fillrect,
++		.fb_imageblit = smtcfb_imageblit,
++		.fb_copyarea  = smtcfb_copyarea,
++#ifdef __BIG_ENDIAN	
++		.fb_read = smtcfb_read,
++		.fb_write = smtcfb_write,
++#endif           
++};
++
++
++void smtcfb_setmode(struct smtcfb_info *sfb)
++{
++	switch (sfb->fb.var.bits_per_pixel) {
++	//kylin
++	case 32:
++		sfb->fb.fix.visual              = FB_VISUAL_TRUECOLOR;
++		sfb->fb.fix.line_length= sfb->fb.var.xres * 4;
++		sfb->fb.var.red.length  = 8;
++		sfb->fb.var.green.length = 8;
++		sfb->fb.var.blue.length = 8;
++		sfb->fb.var.red.offset  = 16;
++                sfb->fb.var.green.offset= 8;
++                sfb->fb.var.blue.offset = 0;
++		
++		break;
++	case 8:
++		sfb->fb.fix.visual		= FB_VISUAL_PSEUDOCOLOR;
++		sfb->fb.fix.line_length= sfb->fb.var.xres ;
++		sfb->fb.var.red.offset	= 5;
++		sfb->fb.var.red.length	= 3;
++		sfb->fb.var.green.offset= 2;
++		sfb->fb.var.green.length= 3;
++		sfb->fb.var.blue.offset	= 0;
++		sfb->fb.var.blue.length	= 2;
++		break;
++	case 24:
++		sfb->fb.fix.visual		= FB_VISUAL_TRUECOLOR;
++		sfb->fb.fix.line_length= sfb->fb.var.xres * 3;
++		sfb->fb.var.red.length	= 8;
++		sfb->fb.var.green.length=8;
++		sfb->fb.var.blue.length	= 8;
++		
++
++		sfb->fb.var.red.offset	= 16;
++		sfb->fb.var.green.offset= 8;
++		sfb->fb.var.blue.offset	= 0;
++
++		break;
++	case 16:
++	default:
++		sfb->fb.fix.visual		= FB_VISUAL_TRUECOLOR;
++		sfb->fb.fix.line_length= sfb->fb.var.xres * 2;
++
++		sfb->fb.var.red.length	= 5;
++		sfb->fb.var.green.length= 6;
++		sfb->fb.var.blue.length	= 5;
++
++		sfb->fb.var.red.offset	= 11;
++		sfb->fb.var.green.offset= 5;
++		sfb->fb.var.blue.offset	= 0;
++
++		break;
++	}
++
++    hw.width = sfb->fb.var.xres;
++    hw.height = sfb->fb.var.yres;
++    hw.hz = 60;
++    smtc_set_timing(sfb, &hw);
++    if (smtc_2Dacceleration)
++    {
++    	printk("2D acceleration enabled!\n");
++       deInit(sfb->fb.var.xres, sfb->fb.var.yres, sfb->fb.var.bits_per_pixel); /* Init smtc drawing engine */
++    }
++}
++
++
++#if defined(CONFIG_FB_SM7XX_DUALHEAD)
++void smtc_head2_init(struct smtcfb_info *sfb)
++{
++    smtcfb_info2 = *sfb;
++    smtcfb_info2.fb.pseudo_palette = &colreg2;
++    smtcfb_info2.fb.par = &hw2;
++    sprintf(smtcfb_info2.fb.fix.id, "sm%Xfb2", hw.chipID);
++    hw2.chipID = hw.chipID;
++    hw2.chipRevID = hw.chipRevID;
++    hw2.width = smtcfb_info2.fb.var.xres;
++    hw2.height = smtcfb_info2.fb.var.yres;
++    hw2.hz = 60;
++    hw2.m_pMMIO = smtc_RegBaseAddress;
++    hw2.BaseAddressInVRAM = smtcfb_info2.fb.fix.smem_len/2; /*hard code 2nd head starting from half VRAM size postion */
++    smtcfb_info2.fb.screen_base = hw2.m_pLFB = smtc_VRAMBaseAddress+hw2.BaseAddressInVRAM;
++
++//    sm712crtSetMode(hw2.width, hw2.height, 0, hw2.hz, smtcfb_info2.fb.var.bits_per_pixel); 
++	writel(hw2.BaseAddressInVRAM >> 3,hw2.m_pVPR+0x10);
++}
++#endif
++
++
++/*
++ * Alloc struct smtcfb_info and assign the default value
++ */
++static struct smtcfb_info * __devinit smtc_alloc_fb_info(struct pci_dev *dev, char *name)
++{
++    struct smtcfb_info *sfb;
++
++    sfb = kmalloc(sizeof(struct smtcfb_info), GFP_KERNEL);
++
++    if (!sfb)
++        return NULL;
++
++    memset(sfb, 0, sizeof(struct smtcfb_info));
++
++    sfb->currcon        = -1;
++    sfb->dev            = dev;
++
++	/*** Init sfb->fb with default value ***/
++	sfb->fb.flags = FBINFO_FLAG_DEFAULT;
++	sfb->fb.fbops = &smtcfb_ops;
++	sfb->fb.var = smtcfb_var;
++	sfb->fb.fix = smtcfb_fix;
++    
++	strcpy(sfb->fb.fix.id, name);
++
++    sfb->fb.fix.type		= FB_TYPE_PACKED_PIXELS;
++    sfb->fb.fix.type_aux	= 0;
++    sfb->fb.fix.xpanstep	= 0;
++    sfb->fb.fix.ypanstep	= 0;
++    sfb->fb.fix.ywrapstep	= 0;
++    sfb->fb.fix.accel		= FB_ACCEL_SMI_LYNX;
++
++    sfb->fb.var.nonstd		= 0;
++    sfb->fb.var.activate	= FB_ACTIVATE_NOW;
++    sfb->fb.var.height		= -1;
++    sfb->fb.var.width		= -1;
++    sfb->fb.var.accel_flags	= FB_ACCELF_TEXT; /* text mode acceleration */
++    sfb->fb.var.vmode		= FB_VMODE_NONINTERLACED;
++    sfb->fb.par		        = &hw;
++    sfb->fb.pseudo_palette = colreg;
++	
++    return sfb;
++}
++
++/*
++ * Unmap in the memory mapped IO registers
++ *
++ */
++
++static void __devinit smtc_unmap_mmio(struct smtcfb_info *sfb)
++{
++    if (sfb && smtc_RegBaseAddress)
++    {
++        smtc_RegBaseAddress = NULL;
++    }
++}
++
++/*
++ * Map in the screen memory
++ *
++ */
++static int __devinit smtc_map_smem(struct smtcfb_info *sfb, struct pci_dev *dev, u_long smem_len)
++{
++	if(sfb->fb.var.bits_per_pixel == 32)
++    {
++        #ifdef __BIG_ENDIAN    
++        sfb->fb.fix.smem_start = pci_resource_start(dev, 0) + 0x800000;
++        #else
++        sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
++        #endif
++    }
++    else
++    {
++        sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
++    }
++
++    sfb->fb.fix.smem_len  = smem_len;
++
++    sfb->fb.screen_base = smtc_VRAMBaseAddress;
++
++    if (!sfb->fb.screen_base)
++    {
++        printk("%s: unable to map screen memory\n",sfb->fb.fix.id);
++        return -ENOMEM;
++    }
++
++    return 0;
++}
++
++
++/*
++ * Unmap in the screen memory
++ *
++ */
++static void __devinit smtc_unmap_smem(struct smtcfb_info *sfb)
++{
++    if (sfb && sfb->fb.screen_base)
++    {
++        iounmap(sfb->fb.screen_base);
++        sfb->fb.screen_base = NULL;
++    }
++}
++
++/*
++ * We need to wake up the LynxEM+, and make sure its in linear memory mode.
++ */
++static inline void __devinit sm7xx_init_hw(void)
++{
++		outb_p(0x18, 0x3c4);
++		outb_p(0x11, 0x3c5);
++}
++
++
++
++
++static void __devinit smtc_free_fb_info(struct smtcfb_info *sfb)
++{
++	if (sfb) {
++		fb_alloc_cmap(&sfb->fb.cmap, 0, 0);
++		kfree(sfb);
++	}
++}
++
++static int __init smtcfb_init(void)
++{
++	struct smtcfb_info *sfb;
++	u_long smem_size= 0x00800000; //default 8MB
++	char name[16];
++	int err;
++	unsigned long pFramebufferPhysical;
++	unsigned long pRegPhysical=0;
++	struct pci_dev *pdev = NULL;
++
++
++
++	printk("Silicon Motion display driver " SMTC_LINUX_FB_VERSION "\n");
++
++	int i = 0;
++    
++	do {
++		pdev = pci_find_device(0x126f,smtc_ChipIDs[i], pdev);
++		if (pdev == NULL)
++		{
++			i++;
++		}
++		else
++		{
++			hw.chipID = smtc_ChipIDs[i];
++			break;
++		}
++	} while (i< numSMTCchipIDs);
++
++	err = pci_enable_device(pdev); // enable SMTC chip
++
++	if (err) 
++	{
++		return err;
++	}
++	err = -ENOMEM;
++
++	sprintf(name, "sm%Xfb", hw.chipID);
++
++	sfb = smtc_alloc_fb_info(pdev, name);
++
++	if (!sfb) 
++	{
++		goto failed;
++	}
++
++	sm7xx_init_hw();
++
++/*get mode parameter from screen_info*/
++	if(screen_info.lfb_width != 0)
++	{
++		sfb->fb.var.xres = screen_info.lfb_width;
++		sfb->fb.var.yres = screen_info.lfb_height;
++		sfb->fb.var.bits_per_pixel = screen_info.lfb_depth;
++	}
++	else
++	{
++		sfb->fb.var.xres = SCREEN_X_RES;	// default resolution 1024x600 16bit mode
++		sfb->fb.var.yres = SCREEN_Y_RES;
++		sfb->fb.var.bits_per_pixel = SCREEN_BPP;
++	}	
++
++	
++	smdbg("\nsfb->fb.var.bits_per_pixel = %d sm712be_flag = %d\n", sfb->fb.var.bits_per_pixel, sm712be_flag);	
++#ifdef __BIG_ENDIAN	
++	if(sm712be_flag == 1 && sfb->fb.var.bits_per_pixel == 24)
++	{
++		sfb->fb.var.bits_per_pixel = screen_info.lfb_depth =32;	
++	}
++#endif
++	// Map address and memory detection
++	pFramebufferPhysical = pci_resource_start(pdev,0);
++	pci_read_config_byte(pdev, PCI_REVISION_ID, &hw.chipRevID);
++   
++    switch (hw.chipID) 
++    {
++
++    case 0x710:
++    case 0x712:
++        sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
++        sfb->fb.fix.mmio_len   = 0x00400000;
++        smem_size = SM712_VIDEOMEMORYSIZE;        
++#ifdef __BIG_ENDIAN
++//        hw.m_pLFB = smtc_VRAMBaseAddress = ioremap(pFramebufferPhysical, 0x00a00000);
++        hw.m_pLFB = smtc_VRAMBaseAddress = ioremap(pFramebufferPhysical, 0x00c00000);       
++#else
++        hw.m_pLFB = smtc_VRAMBaseAddress = ioremap(pFramebufferPhysical, 0x00800000);
++#endif
++        hw.m_pMMIO = smtc_RegBaseAddress = smtc_VRAMBaseAddress + 0x00700000;
++        smtc_2DBaseAddress = hw.m_pDPR = smtc_VRAMBaseAddress + 0x00408000;
++        smtc_2Ddataport = smtc_VRAMBaseAddress + DE_DATA_PORT_712;
++        hw.m_pVPR = hw.m_pLFB + 0x0040c000;
++	if(sfb->fb.var.bits_per_pixel == 32)
++        {
++#ifdef __BIG_ENDIAN
++        smtc_VRAMBaseAddress += 0x800000;
++        hw.m_pLFB += 0x800000;
++				printk("\nsmtc_VRAMBaseAddress=0x%X hw.m_pLFB=0x%X\n", smtc_VRAMBaseAddress, hw.m_pLFB);
++#endif
++        }
++        if (!smtc_RegBaseAddress)
++        {
++            printk("%s: unable to map memory mapped IO\n",sfb->fb.fix.id);
++            return -ENOMEM;
++        }
++	
++/*        
++        smtc_seqw(0x62,0x7A);
++        smtc_seqw(0x6a,0x0c);
++        smtc_seqw(0x6b,0x02);
++ 
++        //LynxEM+ memory detection
++        *(u32 *)(smtc_VRAMBaseAddress + 4) = 0xAA551133;
++        if (*(u32 *)(smtc_VRAMBaseAddress + 4) != 0xAA551133)
++        {
++
++            smem_size = 0x00200000;
++            // Program the MCLK to 130 MHz
++            smtc_seqw(0x6a,0x12);
++            smtc_seqw(0x6b,0x02);
++            smtc_seqw(0x62,0x3e);
++        }
++*/
++	smtc_seqw(0x6a,0x16); //set MCLK = 14.31818 *  (0x16 / 0x2)
++	smtc_seqw(0x6b,0x02);
++	smtc_seqw(0x62,0x3e);
++	smtc_seqw(0x17,0x20); //enable PCI burst
++	//enabel word swap
++	if(sfb->fb.var.bits_per_pixel == 32)
++	{
++#ifdef __BIG_ENDIAN
++		smtc_seqw(0x17,0x30);
++#endif
++	}
++
++#ifdef CONFIG_FB_SM7XX_ACCEL			
++        smtc_2Dacceleration = 1;
++#endif
++
++        break;
++
++    case 0x720:
++        sfb->fb.fix.mmio_start = pFramebufferPhysical;
++        sfb->fb.fix.mmio_len   = 0x00200000;
++        smem_size = SM722_VIDEOMEMORYSIZE;        
++        smtc_2DBaseAddress = hw.m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000);
++        hw.m_pLFB = smtc_VRAMBaseAddress = smtc_2DBaseAddress + 0x00200000;
++        hw.m_pMMIO = smtc_RegBaseAddress = smtc_2DBaseAddress + 0x000c0000;
++        smtc_2Ddataport = smtc_2DBaseAddress + DE_DATA_PORT_722;
++        hw.m_pVPR = smtc_2DBaseAddress + 0x800;
++        
++        smtc_seqw(0x62,0xff);
++        smtc_seqw(0x6a,0x0d);
++        smtc_seqw(0x6b,0x02);
++        smtc_2Dacceleration = 0;
++        break;
++	default:
++		printk("No valid Silicon Motion display chip was detected!\n");
++		smtc_free_fb_info(sfb);
++		return err;
++    }
++
++
++	//can support 32 bpp
++	if (15 == sfb->fb.var.bits_per_pixel)
++		sfb->fb.var.bits_per_pixel = 16;
++	//else if (32==sfb->fb.var.bits_per_pixel)
++	//	sfb->fb.var.bits_per_pixel = 24; 
++
++   	sfb->fb.var.xres_virtual = sfb->fb.var.xres;
++
++	sfb->fb.var.yres_virtual = sfb->fb.var.yres;
++	err = smtc_map_smem(sfb, pdev, smem_size);
++	if (err)
++	{
++		goto failed;
++	}
++
++	smtcfb_setmode(sfb);
++	hw.BaseAddressInVRAM = 0;  //Primary display starting from 0 postion 
++	sfb->fb.par = &hw;
++
++	err = register_framebuffer(&sfb->fb);
++	if (err < 0) 
++	{
++		goto failed;
++	}
++
++	printk("Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.\n",
++		hw.chipID, hw.chipRevID, sfb->fb.var.xres, sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
++
++#if defined(CONFIG_FB_SM7XX_DUALHEAD)
++	smtc_head2_init(sfb);
++	err = register_framebuffer(&smtcfb_info2.fb);
++
++	if (err < 0)
++	{
++		printk("Silicon Motion, Inc.  second head init fail\n");
++		goto failed; //if second head display fails, also fails the primary display
++	}
++
++	printk("Silicon Motion SM%X Rev%X secondary display mode %dx%d-%d Init Complete.\n",
++		hw.chipID, hw.chipRevID, hw2.width, hw2.height, smtcfb_info2.fb.var.bits_per_pixel);
++
++#endif
++
++	return 0;
++
++failed:
++	printk("Silicon Motion, Inc.  primary display init fail\n");
++	smtc_unmap_smem(sfb);
++	smtc_unmap_mmio(sfb);
++	smtc_free_fb_info(sfb);
++
++	return err;
++}
++
++static void __exit smtcfb_exit(void){}
++
++module_init(smtcfb_init);
++module_exit(smtcfb_exit);
++
++
++//#ifndef MODULE
++/**
++	*	sm712be_setup - process command line options 
++	*	@options: string of options 
++	*	Returns zero. 
++	* 
++*/
++static int __init sm712be_setup(char *options)
++{	
++	int retval = 0;	
++	sm712be_flag = 0;	
++	if (!options || !*options) 	
++	{
++		retval = 1;	
++		smdbg("\n No sm712be parameter\n", __LINE__);
++	}
++	if (!retval && strstr(options, "enable")) 	
++	{		
++		sm712be_flag = 1;		 	
++	}	
++	smdbg("\nsm712be_setup = %s sm712be_flag = %d\n", options, sm712be_flag); 	
++	return 1;
++}
++
++__setup("sm712be=", sm712be_setup);
++
++//#endif
++
++#ifdef __BIG_ENDIAN
++/**
++	*	sm712vga_setup - process command line options, get vga parameter 
++	*	@options: string of options 
++	*	Returns zero. 
++	* 
++*/
++static int __init sm712vga_setup(char *options)
++{	
++	int retval = 0;	
++	int index ;
++	sm712be_flag = 0;	
++	
++	if (!options || !*options) 	
++	{
++		retval = 1;	
++		smdbg("\n No vga parameter\n", __LINE__);
++	}
++		
++	screen_info.lfb_width = 0;
++	screen_info.lfb_height = 0;
++	screen_info.lfb_depth = 0;
++	
++	for (index = 0; index < (sizeof(vesa_mode) / sizeof(struct vesa_mode_table)); index++)
++	{
++		if(strstr(options, vesa_mode[index].mode_index))
++		{
++			screen_info.lfb_width = vesa_mode[index].lfb_width;
++			screen_info.lfb_height = vesa_mode[index].lfb_height;
++			screen_info.lfb_depth = vesa_mode[index].lfb_depth;
++		}
++	}
++	smdbg("\nsm712vga_setup = %s\n", options); 
++	return 1;
++}
++
++__setup("vga=", sm712vga_setup);
++#endif
++
++MODULE_AUTHOR("Siliconmotion ");
++MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
++MODULE_LICENSE("GPL");
++
+diff --git a/drivers/video/smi/smtcfb.h b/drivers/video/smi/smtcfb.h
+new file mode 100755
+index 0000000..9933b62
+--- /dev/null
++++ b/drivers/video/smi/smtcfb.h
+@@ -0,0 +1,795 @@
++/*
++ *  linux/drivers/video/smtcfb.h -- Silicon Motion SM501 and SM7xx frame buffer device
++ *
++ *      Copyright (C) 2006 Silicon Motion Technology Corp.
++ *      Ge Wang, gewang@siliconmotion.com
++ *      Boyod boyod.yang@siliconmotion.com.cn
++ *
++ *  This file is subject to the terms and conditions of the GNU General Public
++ *  License version 2 or later. See the file COPYING in the main directory of 
++ *  this archive for more details.
++ */
++
++#define SMTC_LINUX_FB_VERSION	"version 0.11.2619.21.01 July 27, 2008"
++
++#define NR_PALETTE	256
++#define NR_RGB          2
++
++#define FB_ACCEL_SMI_LYNX  88
++
++
++
++#ifdef __BIG_ENDIAN
++#define PC_VGA 0
++#else
++#define PC_VGA 1
++#endif
++
++#define SCREEN_X_RES	1024
++#define SCREEN_Y_RES	600
++#define SCREEN_BPP	16
++
++#ifndef FIELD_OFFSET
++#define FIELD_OFSFET(type, field) 	((unsigned long) (PUCHAR) &(((type *)0)->field))
++#endif
++
++#define SM712_VIDEOMEMORYSIZE    0x00400000  /*Assume SM712 graphics chip has 4MB VRAM */
++#define SM722_VIDEOMEMORYSIZE    0x00800000  /*Assume SM722 graphics chip has 8MB VRAM */
++
++#define dac_reg	(0x3c8)
++#define dac_val	(0x3c9)
++
++extern char *smtc_RegBaseAddress;
++#define smtc_mmiowb(dat,reg)	writeb(dat, smtc_RegBaseAddress + reg)
++#define smtc_mmioww(dat,reg)	writew(dat, smtc_RegBaseAddress + reg)
++#define smtc_mmiowl(dat,reg)	writel(dat, smtc_RegBaseAddress + reg)
++
++#define smtc_mmiorb(reg)	        readb(smtc_RegBaseAddress + reg)
++#define smtc_mmiorw(reg)	        readw(smtc_RegBaseAddress + reg)
++#define smtc_mmiorl(reg)	        readl(smtc_RegBaseAddress + reg)
++
++#define SIZE_SR00_SR04      (0x04 - 0x00 + 1)
++#define SIZE_SR10_SR24      (0x24 - 0x10 + 1)
++#define SIZE_SR30_SR75      (0x75 - 0x30 + 1)
++#define SIZE_SR80_SR93      (0x93 - 0x80 + 1)
++#define SIZE_SRA0_SRAF      (0xAF - 0xA0 + 1)
++#define SIZE_GR00_GR08      (0x08 - 0x00 + 1)
++#define SIZE_AR00_AR14      (0x14 - 0x00 + 1)
++#define SIZE_CR00_CR18      (0x18 - 0x00 + 1)
++#define SIZE_CR30_CR4D      (0x4D - 0x30 + 1)
++#define SIZE_CR90_CRA7      (0xA7 - 0x90 + 1)
++#define SIZE_VPR            (0x6C + 1)
++#define SIZE_DPR			(0x44 + 1)
++
++
++static inline void smtc_crtcw(int reg, int val)
++{
++        smtc_mmiowb(reg, 0x3d4);
++        smtc_mmiowb(val, 0x3d5);
++}
++
++static inline unsigned int smtc_crtcr(int reg)
++{
++        smtc_mmiowb(reg, 0x3d4);
++        return smtc_mmiorb(0x3d5);
++}
++
++static inline void smtc_grphw(int reg, int val)
++{
++        smtc_mmiowb(reg, 0x3ce);
++        smtc_mmiowb(val, 0x3cf);
++}
++
++static inline unsigned int smtc_grphr(int reg)
++{
++        smtc_mmiowb(reg, 0x3ce);
++        return smtc_mmiorb(0x3cf);
++}
++
++static inline void smtc_attrw(int reg, int val)
++{
++        smtc_mmiorb(0x3da);
++        smtc_mmiowb(reg, 0x3c0);
++        smtc_mmiorb(0x3c1);
++        smtc_mmiowb(val, 0x3c0);
++}
++
++static inline void smtc_seqw(int reg, int val)
++{
++        smtc_mmiowb(reg, 0x3c4);
++        smtc_mmiowb(val, 0x3c5);
++}
++
++static inline unsigned int smtc_seqr(int reg)
++{
++        smtc_mmiowb(reg, 0x3c4);
++        return smtc_mmiorb(0x3c5);
++}
++
++// The next structure holds all information relevant for a specific video mode.
++
++
++struct ModeInit
++{
++	int			  mmSizeX;
++	int			  mmSizeY;
++	int			  bpp;
++	int			  hz;
++	unsigned char Init_MISC;
++	unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
++	unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
++	unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
++	unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
++	unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
++	unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
++	unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
++	unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
++	unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
++	unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
++};
++
++
++
++/**********************************************************************
++                        SM712 Mode table.
++ **********************************************************************/
++struct ModeInit VGAMode[] =
++{
++	{
++		/*  mode#0: 640 x 480  16Bpp  60Hz */
++		640, 480, 16, 60,
++		/*  Init_MISC */
++		0xE3,
++		{   /*  Init_SR0_SR4 */
++			0x03, 0x01, 0x0F, 0x00, 0x0E,
++		},
++		{   /*  Init_SR10_SR24 */
++			0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
++			0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0xC4, 0x30, 0x02, 0x01, 0x01,
++		},
++		{   /*  Init_SR30_SR75 */
++			0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
++			0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
++			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
++			0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
++			0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
++			0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
++			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
++			0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
++			0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
++		},
++		{   /*  Init_SR80_SR93 */
++			0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
++			0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
++			0x00, 0x00, 0x00, 0x00,
++		},
++		{   /*  Init_SRA0_SRAF */
++			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
++			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
++		},
++		{   /*  Init_GR00_GR08 */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
++			0xFF,
++		},
++		{   /*  Init_AR00_AR14 */
++			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
++			0x41, 0x00, 0x0F, 0x00, 0x00,
++		},
++		{   /*  Init_CR00_CR18 */
++			0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
++			0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
++			0xFF,
++		},
++		{   /*  Init_CR30_CR4D */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
++			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
++			0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
++			0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
++		},
++		{   /*  Init_CR90_CRA7 */
++			0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
++			0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
++			0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
++		},
++	},
++	{
++		/*  mode#1: 640 x 480  24Bpp  60Hz */
++		640, 480, 24, 60,
++		/*  Init_MISC */
++		0xE3,
++		{   /*  Init_SR0_SR4 */
++			0x03, 0x01, 0x0F, 0x00, 0x0E,
++		},
++		{   /*  Init_SR10_SR24 */
++			0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
++			0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0xC4, 0x30, 0x02, 0x01, 0x01,
++		},
++		{   /*  Init_SR30_SR75 */
++			0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
++			0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
++			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
++			0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
++			0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
++			0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
++			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
++			0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
++			0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
++		},
++		{   /*  Init_SR80_SR93 */
++			0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
++			0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
++			0x00, 0x00, 0x00, 0x00,
++		},
++		{   /*  Init_SRA0_SRAF */
++			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
++			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
++		},
++		{   /*  Init_GR00_GR08 */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
++			0xFF,
++		},
++		{   /*  Init_AR00_AR14 */
++			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
++			0x41, 0x00, 0x0F, 0x00, 0x00,
++		},
++		{   /*  Init_CR00_CR18 */
++			0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
++			0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
++			0xFF,
++		},
++		{   /*  Init_CR30_CR4D */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
++			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
++			0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
++			0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
++		},
++		{   /*  Init_CR90_CRA7 */
++			0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
++			0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
++			0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
++		},
++	},
++	{
++		/*  mode#0: 640 x 480  32Bpp  60Hz */
++		640, 480, 32, 60,
++		/*  Init_MISC */
++		0xE3,
++		{   /*  Init_SR0_SR4 */
++			0x03, 0x01, 0x0F, 0x00, 0x0E,
++		},
++		{   /*  Init_SR10_SR24 */
++			0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
++			0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0xC4, 0x30, 0x02, 0x01, 0x01,
++		},
++		{   /*  Init_SR30_SR75 */
++			0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
++			0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
++			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
++			0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
++			0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
++			0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
++			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
++			0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
++			0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
++		},
++		{   /*  Init_SR80_SR93 */
++			0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
++			0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
++			0x00, 0x00, 0x00, 0x00,
++		},
++		{   /*  Init_SRA0_SRAF */
++			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
++			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
++		},
++		{   /*  Init_GR00_GR08 */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
++			0xFF,
++		},
++		{   /*  Init_AR00_AR14 */
++			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
++			0x41, 0x00, 0x0F, 0x00, 0x00,
++		},
++		{   /*  Init_CR00_CR18 */
++			0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
++			0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
++			0xFF,
++		},
++		{   /*  Init_CR30_CR4D */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
++			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
++			0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
++			0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
++		},
++		{   /*  Init_CR90_CRA7 */
++			0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
++			0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
++			0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
++		},
++	},
++
++	{/*  mode#2: 800 x 600  16Bpp  60Hz */
++		800, 600, 16, 60,
++		/*  Init_MISC */
++		0x2B,
++		{   /*  Init_SR0_SR4 */
++			0x03, 0x01, 0x0F, 0x03, 0x0E,
++		},
++		{   /*  Init_SR10_SR24 */
++			0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
++			0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0xC4, 0x30, 0x02, 0x01, 0x01,
++		},
++		{   /*  Init_SR30_SR75 */
++			0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
++			0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
++			0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
++			0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
++			0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
++			0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
++			0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
++			0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
++			0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
++		},
++		{   /*  Init_SR80_SR93 */
++			0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
++			0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
++			0x00, 0x00, 0x00, 0x00,
++		},
++		{   /*  Init_SRA0_SRAF */
++			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
++			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
++		},
++		{   /*  Init_GR00_GR08 */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
++			0xFF,
++		},
++		{   /*  Init_AR00_AR14 */
++			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
++			0x41, 0x00, 0x0F, 0x00, 0x00,
++		},
++		{   /*  Init_CR00_CR18 */
++			0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
++			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
++			0xFF,
++ 		},
++		{   /*  Init_CR30_CR4D */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
++			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
++			0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
++			0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
++		},
++		{   /*  Init_CR90_CRA7 */
++			0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
++			0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
++			0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
++		},
++	},
++		{/*  mode#3: 800 x 600  24Bpp  60Hz */
++		800,600,24,60,
++		0x2B,
++		{   /*  Init_SR0_SR4 */
++			0x03, 0x01, 0x0F, 0x03, 0x0E,
++		},
++		{   /*  Init_SR10_SR24 */
++			0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
++			0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0xC4, 0x30, 0x02, 0x01, 0x01,
++		},
++		{   /*  Init_SR30_SR75 */
++			0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
++			0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
++			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
++			0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
++			0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
++			0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
++			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
++			0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
++			0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
++		},
++		{   /*  Init_SR80_SR93 */
++			0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
++			0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
++			0x00, 0x00, 0x00, 0x00,
++		},
++		{   /*  Init_SRA0_SRAF */
++			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
++			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
++		},
++		{   /*  Init_GR00_GR08 */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
++			0xFF,
++		},
++		{   /*  Init_AR00_AR14 */
++			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
++			0x41, 0x00, 0x0F, 0x00, 0x00,
++		},
++		{   /*  Init_CR00_CR18 */
++			0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
++			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++			0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
++			0xFF,
++		},
++		{   /*  Init_CR30_CR4D */
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
++			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
++			0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
++			0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
++		},
++		{   /*  Init_CR90_CRA7 */
++			0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
++			0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
++			0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
++		},
++	},
++	{/*  mode#7: 800 x 600  32Bpp  60Hz */
++                800, 600, 32, 60,
++                /*  Init_MISC */
++                0x2B,
++                {   /*  Init_SR0_SR4 */
++                        0x03, 0x01, 0x0F, 0x03, 0x0E,
++                },
++                {   /*  Init_SR10_SR24 */
++                        0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
++                        0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
++                        0xC4, 0x30, 0x02, 0x01, 0x01,
++                },
++                {   /*  Init_SR30_SR75 */
++                        0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
++                        0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
++                        0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
++                        0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
++                        0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
++                        0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
++                        0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
++                        0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
++                        0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
++                },
++                {   /*  Init_SR80_SR93 */
++                        0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
++                        0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
++                        0x00, 0x00, 0x00, 0x00,
++                },
++                {   /*  Init_SRA0_SRAF */
++                        0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
++                        0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
++                },
++                {   /*  Init_GR00_GR08 */
++                        0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
++                        0xFF,
++                },
++                {   /*  Init_AR00_AR14 */
++                        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++                        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
++                        0x41, 0x00, 0x0F, 0x00, 0x00,
++                },
++                {   /*  Init_CR00_CR18 */
++                        0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
++                        0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++                        0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
++                        0xFF,
++                },
++                {   /*  Init_CR30_CR4D */
++                        0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
++                        0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
++                        0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
++                        0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
++                },
++                {   /*  Init_CR90_CRA7 */
++                        0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
++                        0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
++                        0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
++		},
++	},
++
++    { /*  mode#4: 1024 x 600  16Bpp  60Hz  We use 1024x768 table to light 1024x600 panel for lemote*/ 
++        1024,600,16,60,
++	/*  Init_MISC */                                    
++		0xEB,                                               
++		{   /*  Init_SR0_SR4 */                             
++			0x03, 0x01, 0x0F, 0x00, 0x0E,                   
++		},                                                  
++		{   /*  Init_SR10_SR24 */                           
++			0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20, 
++			0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 
++			0xC4, 0x30, 0x02, 0x00, 0x01,                   
++		},                                                  
++		{   /*  Init_SR30_SR75 */                           
++			0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22, 
++			0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF, 
++			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, 
++			0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22, 
++			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, 
++			0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22, 
++			0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00, 
++			0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02, 
++			0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,             
++		},                                                  
++		{   /*  Init_SR80_SR93 */                           
++			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, 
++			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, 
++			0x00, 0x00, 0x00, 0x00,                         
++		},                                                  
++		{   /*  Init_SRA0_SRAF */                           
++			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, 
++			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, 
++		},                                                  
++		{   /*  Init_GR00_GR08 */                           
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 
++			0xFF,                                           
++		},                                                  
++		{   /*  Init_AR00_AR14 */                           
++			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
++			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 
++			0x41, 0x00, 0x0F, 0x00, 0x00,                   
++		},                                                  
++		{   /*  Init_CR00_CR18 */                           
++			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, 
++			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
++			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, 
++			0xFF,                                           
++		},                                                  
++		{   /*  Init_CR30_CR4D */                           
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, 
++			0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF, 
++			0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00, 
++			0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,             
++		},                                                  
++		{   /*  Init_CR90_CRA7 */                           
++			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, 
++			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, 
++			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, 
++		},                                                  
++	},                                                       
++	{  /*  mode#5: 1024 x 768  24Bpp  60Hz */               
++        1024,768,24,60,
++			/*  Init_MISC */                                
++		0xEB,                                               
++		{   /*  Init_SR0_SR4 */                             
++			0x03, 0x01, 0x0F, 0x03, 0x0E,                   
++		},                                                  
++		{   /*  Init_SR10_SR24 */                           
++			0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C, 
++			0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 
++			0xC4, 0x30, 0x02, 0x01, 0x01,                   
++		},                                                  
++		{   /*  Init_SR30_SR75 */                           
++			0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A, 
++			0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF, 
++			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, 
++			0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A, 
++			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, 
++			0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A, 
++			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, 
++			0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02, 
++			0x04, 0x45, 0x30, 0x30, 0x40, 0x20,             
++		},                                                  
++		{   /*  Init_SR80_SR93 */                           
++			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, 
++			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, 
++			0x00, 0x00, 0x00, 0x00,                         
++		},                                                  
++		{   /*  Init_SRA0_SRAF */                           
++			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, 
++			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, 
++		},                                                  
++		{   /*  Init_GR00_GR08 */                           
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 
++			0xFF,                                           
++		},                                                  
++		{   /*  Init_AR00_AR14 */                           
++			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
++			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 
++			0x41, 0x00, 0x0F, 0x00, 0x00,                   
++		},                                                  
++		{   /*  Init_CR00_CR18 */                           
++			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, 
++			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
++			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, 
++			0xFF,                                           
++		},                                                  
++		{   /*  Init_CR30_CR4D */                           
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, 
++			0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF, 
++			0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00, 
++			0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,             
++		},                                                  
++		{   /*  Init_CR90_CRA7 */                           
++			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, 
++			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, 
++			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, 
++		},                                                  
++	},
++	{ /*  mode#4: 1024 x 768  32Bpp  60Hz */ 
++        1024,768,32,60,
++		/*  Init_MISC */                                    
++		0xEB,                                               
++		{   /*  Init_SR0_SR4 */                             
++			0x03, 0x01, 0x0F, 0x03, 0x0E,                   
++		},                                                  
++		{   /*  Init_SR10_SR24 */                           
++			0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C, 
++			0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 
++			0xC4, 0x32, 0x02, 0x01, 0x01,                   
++		},                                                  
++		{   /*  Init_SR30_SR75 */                           
++			0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A, 
++			0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF, 
++			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC, 
++			0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A, 
++			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03, 
++			0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A, 
++			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00, 
++			0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02, 
++			0x04, 0x45, 0x30, 0x30, 0x40, 0x20,             
++		},                                                  
++		{   /*  Init_SR80_SR93 */                           
++			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A, 
++			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A, 
++			0x00, 0x00, 0x00, 0x00,                         
++		},                                                  
++		{   /*  Init_SRA0_SRAF */                           
++			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED, 
++			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF, 
++		},                                                  
++		{   /*  Init_GR00_GR08 */                           
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 
++			0xFF,                                           
++		},                                                  
++		{   /*  Init_AR00_AR14 */                           
++			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
++			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 
++			0x41, 0x00, 0x0F, 0x00, 0x00,                   
++		},                                                  
++		{   /*  Init_CR00_CR18 */                           
++			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5, 
++			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
++			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3, 
++			0xFF,                                           
++		},                                                  
++		{   /*  Init_CR30_CR4D */                           
++			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20, 
++			0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF, 
++			0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00, 
++			0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,             
++		},                                                  
++		{   /*  Init_CR90_CRA7 */                           
++			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26, 
++			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00, 
++			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03, 
++		},                                                  
++	},
++	{ /*  mode#6: 320 x 240  16Bpp  60Hz */
++        320,240,16,60,
++                /*  Init_MISC */
++                0xEB,
++                {   /*  Init_SR0_SR4 */
++                        0x03, 0x01, 0x0F, 0x03, 0x0E,
++                },
++                {   /*  Init_SR10_SR24 */
++                        0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
++                        0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
++                        0xC4, 0x32, 0x02, 0x01, 0x01,
++                },
++                {   /*  Init_SR30_SR75 */
++                        0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
++                        0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
++                        0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
++                        0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
++                        0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
++                        0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
++                        0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
++                        0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
++                        0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
++                },
++                {   /*  Init_SR80_SR93 */
++                        0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
++                        0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
++                        0x00, 0x00, 0x00, 0x00,
++                },
++                {   /*  Init_SRA0_SRAF */
++                        0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
++                        0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
++                },
++                {   /*  Init_GR00_GR08 */
++                        0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
++                        0xFF,
++                },
++                {   /*  Init_AR00_AR14 */
++                        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++                        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
++                        0x41, 0x00, 0x0F, 0x00, 0x00,
++                },
++                {   /*  Init_CR00_CR18 */
++                        0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
++                        0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++                        0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
++                        0xFF,
++                },
++                {   /*  Init_CR30_CR4D */
++                        0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
++                        0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
++                        0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
++                        0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
++                },
++                {   /*  Init_CR90_CRA7 */
++                        0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
++                        0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
++                        0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
++                },
++        },
++	
++	{ /*  mode#8: 320 x 240  32Bpp  60Hz */
++        320,240,32,60,
++                /*  Init_MISC */
++                0xEB,
++                {   /*  Init_SR0_SR4 */
++                        0x03, 0x01, 0x0F, 0x03, 0x0E,
++                },
++                {   /*  Init_SR10_SR24 */
++                        0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
++                        0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
++                        0xC4, 0x32, 0x02, 0x01, 0x01,
++                },
++                {   /*  Init_SR30_SR75 */
++                        0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
++                        0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
++                        0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
++                        0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
++                        0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
++                        0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
++                        0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
++                        0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
++                        0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
++                },
++                {   /*  Init_SR80_SR93 */
++                        0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
++                        0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
++                        0x00, 0x00, 0x00, 0x00,
++                },
++                {   /*  Init_SRA0_SRAF */
++                        0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
++                        0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
++                },
++                {   /*  Init_GR00_GR08 */
++                        0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
++                        0xFF,
++                },
++                {   /*  Init_AR00_AR14 */
++                        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
++                        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
++                        0x41, 0x00, 0x0F, 0x00, 0x00,
++                },
++                {   /*  Init_CR00_CR18 */
++                        0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
++                        0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++                        0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
++                        0xFF,
++                },
++                {   /*  Init_CR30_CR4D */
++                        0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
++                        0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
++                        0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
++                        0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
++                },
++                {   /*  Init_CR90_CRA7 */
++                        0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
++                        0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
++                        0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
++                },
++        },
++};
++
++#define numVGAModes			sizeof(VGAMode)/sizeof(struct ModeInit)
++
+diff --git a/include/asm-mips/clock.h b/include/asm-mips/clock.h
+new file mode 100644
+index 0000000..9442f3b
+--- /dev/null
++++ b/include/asm-mips/clock.h
+@@ -0,0 +1,62 @@
++#ifndef __ASM_MIPS_CLOCK_H
++#define __ASM_MIPS_CLOCK_H
++
++#include <linux/kref.h>
++#include <linux/list.h>
++#include <linux/seq_file.h>
++#include <linux/clk.h>
++
++struct clk;
++
++struct clk_ops {
++	void (*init)(struct clk *clk);
++	void (*enable)(struct clk *clk);
++	void (*disable)(struct clk *clk);
++	void (*recalc)(struct clk *clk);
++	int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
++	long (*round_rate)(struct clk *clk, unsigned long rate);
++};
++
++struct clk {
++	struct list_head	node;
++	const char		*name;
++	int			id;
++	struct module		*owner;
++
++	struct clk		*parent;
++	struct clk_ops		*ops;
++
++	struct kref		kref;
++
++	unsigned long		rate;
++	unsigned long		flags;
++};
++
++#define CLK_ALWAYS_ENABLED	(1 << 0)
++#define CLK_RATE_PROPAGATES	(1 << 1)
++
++/* Should be defined by processor-specific code */
++void arch_init_clk_ops(struct clk_ops **, int type);
++
++int clk_init(void);
++
++int __clk_enable(struct clk *);
++void __clk_disable(struct clk *);
++
++void clk_recalc_rate(struct clk *);
++
++int clk_register(struct clk *);
++void clk_unregister(struct clk *);
++
++/* the exported API, in addition to clk_set_rate */
++/**
++ * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
++ * @clk: clock source
++ * @rate: desired clock rate in Hz
++ * @algo_id: algorithm id to be passed down to ops->set_rate
++ *
++ * Returns success (0) or negative errno.
++ */
++int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
++
++#endif /* __ASM_MIPS_CLOCK_H */
+diff --git a/include/asm-mips/mach-lemote/dma-coherence.h b/include/asm-mips/mach-lemote/dma-coherence.h
+index 7e91477..bf3604a 100644
+--- a/include/asm-mips/mach-lemote/dma-coherence.h
++++ b/include/asm-mips/mach-lemote/dma-coherence.h
+@@ -27,7 +27,18 @@ static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
+ 
+ static inline unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
+ {
++#ifdef CONFIG_64BIT
++#ifdef CONFIG_MACH_LM2F
++	if(dma_addr > 0x8fffffff)
++		return dma_addr;
++	else
++		return dma_addr & 0x0fffffff;
++#else
+ 	return dma_addr & 0x7fffffff;
++#endif
++#else
++	return dma_addr & 0x7fffffff;
++#endif
+ }
+ 
+ static inline void plat_unmap_dma_mem(dma_addr_t dma_addr)
+diff --git a/include/asm-mips/mc146818rtc.h b/include/asm-mips/mc146818rtc.h
+index 68b4da6..137e0f1 100644
+--- a/include/asm-mips/mc146818rtc.h
++++ b/include/asm-mips/mc146818rtc.h
+@@ -13,4 +13,12 @@
+ 
+ #include <mc146818rtc.h>
+ 
++#define lock_cmos_prefix(reg) do {} while (0)
++#define lock_cmos_suffix(reg) do {} while (0)
++#define lock_cmos(reg)
++#define unlock_cmos()
++#define do_i_have_lock_cmos() 0
++#define current_lock_cmos_reg() 0
++
++
+ #endif /* _ASM_MC146818RTC_H */
+diff --git a/include/asm-mips/mips-boards/bonito64.h b/include/asm-mips/mips-boards/bonito64.h
+index a0f04bb..9e70093 100644
+--- a/include/asm-mips/mips-boards/bonito64.h
++++ b/include/asm-mips/mips-boards/bonito64.h
+@@ -26,7 +26,7 @@
+ /* offsets from base register */
+ #define BONITO(x)	(x)
+ 
+-#elif defined(CONFIG_LEMOTE_FULONG)
++#elif defined(CONFIG_LEMOTE_FULONG) ||defined(CONFIG_LEMOTE_FULONG2F) ||defined(CONFIG_LEMOTE_2FNOTEBOOK)
+ 
+ #define BONITO(x) (*(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x)))
+ #define BONITO_IRQ_BASE   32
+diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
+index fe7a88e..4691c02 100644
+--- a/include/asm-mips/page.h
++++ b/include/asm-mips/page.h
+@@ -157,7 +157,17 @@ typedef struct { unsigned long pgprot; } pgprot_t;
+ 
+ #ifdef CONFIG_FLATMEM
+ 
++#ifdef CONFIG_MACH_LM2F
++#define pfn_valid(pfn) 		\
++({								\
++ 	(max_mapnr > (0x10000000 >> PAGE_SHIFT)) ?	\
++		(((pfn) >= ARCH_PFN_OFFSET && (pfn) < (0x10000000 >> PAGE_SHIFT)) ||	\
++		  (((pfn) >=(0x90000000 >> PAGE_SHIFT) && (pfn) < max_mapnr))) :	\
++		((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr);	\
++ })
++#else
+ #define pfn_valid(pfn)		((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
++#endif
+ 
+ #elif defined(CONFIG_SPARSEMEM)
+ 
+diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
+index 4c37c4e..887d44f 100644
+--- a/include/asm-mips/stackframe.h
++++ b/include/asm-mips/stackframe.h
+@@ -117,6 +117,24 @@
+ 		.endm
+ #else
+ 		.macro	get_saved_sp	/* Uniprocessor variation */
++#ifdef CONFIG_CPU_LOONGSON2
++		move k0,ra
++		jal 2008f
++		nop
++		2008:
++		jal 2008f
++		nop
++		2008:
++		jal 2008f
++		nop
++		2008:
++		jal 2008f
++		nop
++		2008:
++		move ra,k0
++		li k0,3
++		mtc0 k0,$22
++#endif
+ #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
+ 		lui	k1, %hi(kernelsp)
+ #else
+diff --git a/include/asm-mips/suspend.h b/include/asm-mips/suspend.h
+index 2562f8f..06763c1 100644
+--- a/include/asm-mips/suspend.h
++++ b/include/asm-mips/suspend.h
+@@ -1,6 +1,11 @@
+ #ifndef __ASM_SUSPEND_H
+ #define __ASM_SUSPEND_H
++#include <linux/types.h>
+ 
+ /* Somewhen...  Maybe :-)  */
+ 
++static inline int arch_prepare_suspend(void)
++{
++	return 0;
++}
+ #endif /* __ASM_SUSPEND_H */
+diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
+index d3bd5c5..40ac337 100644
+--- a/include/asm-mips/time.h
++++ b/include/asm-mips/time.h
+@@ -63,7 +63,7 @@ static inline int mips_clockevent_init(void)
+ /*
+  * Initialize the count register as a clocksource
+  */
+-#ifdef CONFIG_CEVT_R4K
++#ifdef CONFIG_CSRC_R4K
+ extern int init_mips_clocksource(void);
+ #else
+ static inline int init_mips_clocksource(void)
+@@ -76,4 +76,8 @@ extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
+ extern void clockevent_set_clock(struct clock_event_device *cd,
+ 		unsigned int clock);
+ 
++#define get_wallclock() mach_get_cmos_time()
++#define set_wallclock(x) mach_set_rtc_mmss(x)
++
++
+ #endif /* _ASM_TIME_H */
+diff --git a/include/linux/console_splash.h b/include/linux/console_splash.h
+new file mode 100644
+index 0000000..c448dd2
+--- /dev/null
++++ b/include/linux/console_splash.h
+@@ -0,0 +1,13 @@
++#ifndef _LINUX_CONSOLE_SPLASH_H_
++#define _LINUX_CONSOLE_SPLASH_H_ 1
++
++/* A structure used by the framebuffer splash code (drivers/video/fbsplash.c) */
++struct vc_splash {
++	__u8 bg_color;				/* The color that is to be treated as transparent */
++	__u8 state;				/* Current splash state: 0 = off, 1 = on */
++	__u16 tx, ty;				/* Top left corner coordinates of the text field */
++	__u16 twidth, theight;			/* Width and height of the text field */
++	char* theme;
++};
++
++#endif
+diff --git a/include/linux/console_struct.h b/include/linux/console_struct.h
+index b03f80a..2c9e3cf 100644
+--- a/include/linux/console_struct.h
++++ b/include/linux/console_struct.h
+@@ -19,6 +19,7 @@
+ struct vt_struct;
+ 
+ #define NPAR 16
++#include <linux/console_splash.h>
+ 
+ struct vc_data {
+ 	unsigned short	vc_num;			/* Console number */
+@@ -107,6 +108,8 @@ struct vc_data {
+ 	struct vc_data **vc_display_fg;		/* [!] Ptr to var holding fg console for this display */
+ 	unsigned long	vc_uni_pagedir;
+ 	unsigned long	*vc_uni_pagedir_loc;  /* [!] Location of uni_pagedir variable for this console */
++
++	struct vc_splash vc_splash;
+ 	/* additional information is in vt_kern.h */
+ };
+ 
+diff --git a/include/linux/fb.h b/include/linux/fb.h
+index 531ccd5..c8fa7f4 100644
+--- a/include/linux/fb.h
++++ b/include/linux/fb.h
+@@ -10,6 +10,13 @@ struct dentry;
+ 
+ #define FB_MAX			32	/* sufficient for now */
+ 
++struct fb_splash_iowrapper
++{
++	unsigned short vc;		/* Virtual console */
++	unsigned char origin;		/* Point of origin of the request */
++	void *data;
++};
++
+ /* ioctls
+    0x46 is 'F'								*/
+ #define FBIOGET_VSCREENINFO	0x4600
+@@ -37,7 +44,15 @@ struct dentry;
+ #define FBIOGET_HWCINFO         0x4616
+ #define FBIOPUT_MODEINFO        0x4617
+ #define FBIOGET_DISPINFO        0x4618
++#define FBIOSPLASH_SETCFG	_IOWR('F', 0x19, struct fb_splash_iowrapper)
++#define FBIOSPLASH_GETCFG	_IOR('F', 0x1A, struct fb_splash_iowrapper)
++#define FBIOSPLASH_SETSTATE	_IOWR('F', 0x1B, struct fb_splash_iowrapper)
++#define FBIOSPLASH_GETSTATE	_IOR('F', 0x1C, struct fb_splash_iowrapper)
++#define FBIOSPLASH_SETPIC 	_IOWR('F', 0x1D, struct fb_splash_iowrapper)
+ 
++#define FB_SPLASH_THEME_LEN		128	/* Maximum lenght of a theme name */
++#define FB_SPLASH_IO_ORIG_KERNEL	0	/* Kernel ioctl origin */
++#define FB_SPLASH_IO_ORIG_USER		1 	/* User ioctl origin */
+ 
+ #define FB_TYPE_PACKED_PIXELS		0	/* Packed Pixels	*/
+ #define FB_TYPE_PLANES			1	/* Non interleaved planes */
+@@ -847,6 +862,9 @@ struct fb_info {
+ #define FBINFO_STATE_SUSPENDED	1
+ 	u32 state;			/* Hardware state i.e suspend */
+ 	void *fbcon_par;                /* fbcon use-only private area */
++
++	struct fb_image splash;
++
+ 	/* From here on everything is device dependent */
+ 	void *par;	
+ };
+diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
+index f1624b3..e545fb1 100644
+--- a/include/linux/pci_ids.h
++++ b/include/linux/pci_ids.h
+@@ -1632,6 +1632,10 @@
+ #define PCI_VENDOR_ID_SATSAGEM		0x1267
+ #define PCI_DEVICE_ID_SATSAGEM_NICCY	0x1016
+ 
++#define PCI_VENDOR_ID_SILICON_MOTION        0x126f
++#define PCI_DEVICE_ID_SM501_VOYAGER_GX_REV_AA   0x0501
++#define PCI_DEVICE_ID_SM501_VOYAGER_GX_REV_B    0x0510
++
+ #define PCI_VENDOR_ID_ENSONIQ		0x1274
+ #define PCI_DEVICE_ID_ENSONIQ_CT5880	0x5880
+ #define PCI_DEVICE_ID_ENSONIQ_ES1370	0x5000
+diff --git a/include/linux/suspend.h b/include/linux/suspend.h
+index 2ce8207..6971a19 100644
+--- a/include/linux/suspend.h
++++ b/include/linux/suspend.h
+@@ -1,7 +1,7 @@
+ #ifndef _LINUX_SUSPEND_H
+ #define _LINUX_SUSPEND_H
+ 
+-#if defined(CONFIG_X86) || defined(CONFIG_FRV) || defined(CONFIG_PPC32) || defined(CONFIG_PPC64)
++#if defined(CONFIG_X86) || defined(CONFIG_FRV) || defined(CONFIG_PPC32) || defined(CONFIG_PPC64) || defined(CONFIG_MIPS)
+ #include <asm/suspend.h>
+ #endif
+ #include <linux/swap.h>
+diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
+index d0437f3..0e06c9c 100644
+--- a/include/linux/sysctl.h
++++ b/include/linux/sysctl.h
+@@ -163,6 +163,7 @@ enum
+ 	KERN_MAX_LOCK_DEPTH=74,
+ 	KERN_NMI_WATCHDOG=75, /* int: enable/disable nmi watchdog */
+ 	KERN_PANIC_ON_NMI=76, /* int: whether we will panic on an unrecovered */
++	KERN_FBSPLASH=77,	/* string: path to fbsplash helper */
+ };
+ 
+ 
+diff --git a/kernel/sysctl.c b/kernel/sysctl.c
+index 50ec088..53eaeaf 100644
+--- a/kernel/sysctl.c
++++ b/kernel/sysctl.c
+@@ -114,6 +114,9 @@ static int ngroups_max = NGROUPS_MAX;
+ #ifdef CONFIG_MODULES
+ extern char modprobe_path[];
+ #endif
++#ifdef CONFIG_FB_SPLASH
++extern char fbsplash_path[];
++#endif
+ #ifdef CONFIG_CHR_DEV_SG
+ extern int sg_big_buff;
+ #endif
+@@ -500,6 +503,17 @@ static struct ctl_table kern_table[] = {
+ 		.strategy	= &sysctl_string,
+ 	},
+ #endif
++#ifdef CONFIG_FB_SPLASH
++	{
++		.ctl_name	= KERN_FBSPLASH,
++		.procname	= "fbsplash",
++		.data		= &fbsplash_path,
++		.maxlen		= KMOD_PATH_LEN,
++		.mode		= 0644,
++		.proc_handler	= &proc_dostring,
++		.strategy	= &sysctl_string,
++	},
++#endif
+ #ifdef CONFIG_CHR_DEV_SG
+ 	{
+ 		.ctl_name	= KERN_SG_BIG_BUFF,
+diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
+index c487025..b5a35e8 100644
+--- a/sound/core/pcm_native.c
++++ b/sound/core/pcm_native.c
+@@ -3107,7 +3107,11 @@ static int snd_pcm_mmap_data_fault(struct vm_area_struct *area,
+ 			return VM_FAULT_SIGBUS;
+ 	} else {
+ 		vaddr = runtime->dma_area + offset;
++#if defined(__mips__) && defined(CONFIG_DMA_NONCOHERENT)
++		page = virt_to_page(CAC_ADDR(vaddr));
++#else
+ 		page = virt_to_page(vaddr);
++#endif
+ 	}
+ 	get_page(page);
+ 	vmf->page = page;
+@@ -3222,6 +3226,12 @@ static int snd_pcm_mmap(struct file *file, struct vm_area_struct *area)
+ 	substream = pcm_file->substream;
+ 	snd_assert(substream != NULL, return -ENXIO);
+ 
++#if defined(__mips__) && defined(CONFIG_DMA_NONCOHERENT)	
++	/* all mmap using uncached mode */
++	area->vm_page_prot = pgprot_noncached(area->vm_page_prot);
++	area->vm_flags |= ( VM_RESERVED | VM_IO);
++#endif
++
+ 	offset = area->vm_pgoff << PAGE_SHIFT;
+ 	switch (offset) {
+ 	case SNDRV_PCM_MMAP_OFFSET_STATUS:
+diff --git a/sound/core/sgbuf.c b/sound/core/sgbuf.c
+index cefd228..dcefd94 100644
+--- a/sound/core/sgbuf.c
++++ b/sound/core/sgbuf.c
+@@ -91,12 +91,20 @@ void *snd_malloc_sgbuf_pages(struct device *device,
+ 		}
+ 		sgbuf->table[i].buf = tmpb.area;
+ 		sgbuf->table[i].addr = tmpb.addr;
++#if defined(__mips__) && defined(CONFIG_DMA_NONCOHERENT)
++		sgbuf->page_table[i] = virt_to_page(CAC_ADDR(tmpb.area));
++#else
+ 		sgbuf->page_table[i] = virt_to_page(tmpb.area);
++#endif
+ 		sgbuf->pages++;
+ 	}
+ 
+ 	sgbuf->size = size;
++#if defined(__mips__) && defined(CONFIG_DMA_NONCOHERENT)
++	dmab->area = vmap(sgbuf->page_table, sgbuf->pages, VM_MAP | VM_IO, pgprot_noncached(PAGE_KERNEL));
++#else
+ 	dmab->area = vmap(sgbuf->page_table, sgbuf->pages, VM_MAP, PAGE_KERNEL);
++#endif
+ 	if (! dmab->area)
+ 		goto _failed;
+ 	return dmab->area;
+diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig
+index 31f52d3..0b7913c 100644
+--- a/sound/pci/Kconfig
++++ b/sound/pci/Kconfig
+@@ -258,7 +258,7 @@ config SND_CS5530
+ 
+ config SND_CS5535AUDIO
+ 	tristate "CS5535/CS5536 Audio"
+-	depends on X86 && !X86_64
++	depends on SND
+ 	select SND_PCM
+ 	select SND_AC97_CODEC
+ 	help
+diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c
+index 8c49a00..cbbb0b2 100644
+--- a/sound/pci/ac97/ac97_codec.c
++++ b/sound/pci/ac97/ac97_codec.c
+@@ -518,11 +518,24 @@ static int snd_ac97_info_volsw(struct snd_kcontrol *kcontrol,
+ 	int mask = (kcontrol->private_value >> 16) & 0xff;
+ 	int shift = (kcontrol->private_value >> 8) & 0x0f;
+ 	int rshift = (kcontrol->private_value >> 12) & 0x0f;
++#if 1
++	int max = mask;
++#endif
+ 
+ 	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
+ 	uinfo->count = shift == rshift ? 1 : 2;
+ 	uinfo->value.integer.min = 0;
++#if 1	
++	{
++		int reg = kcontrol->private_value & 0xff;
++		if (reg == AC97_MASTER && mask != 1) {
++			max = (mask * 90) /100;	
++		}
++	}
++	uinfo->value.integer.max = max;
++#else
+ 	uinfo->value.integer.max = mask;
++#endif
+ 	return 0;
+ }
+ 
+@@ -606,8 +619,13 @@ AC97_SINGLE("PC Speaker Playback Switch", AC97_PC_BEEP, 15, 1, 1),
+ AC97_SINGLE("PC Speaker Playback Volume", AC97_PC_BEEP, 1, 15, 1)
+ };
+ 
++#ifndef __no_noise_on_play_mic__
++static const struct snd_kcontrol_new snd_ac97_controls_mic_boost =
++	AC97_SINGLE("Mic Boost (+20dB)", AC97_MIC, 5, 1, 0);
++#else
+ static const struct snd_kcontrol_new snd_ac97_controls_mic_boost =
+ 	AC97_SINGLE("Mic Boost (+20dB)", AC97_MIC, 6, 1, 0);
++#endif
+ 
+ 
+ static const char* std_rec_sel[] = {"Mic", "CD", "Video", "Aux", "Line", "Mix", "Mix Mono", "Phone"};
+@@ -1309,6 +1327,9 @@ static int snd_ac97_mixer_build(struct snd_ac97 * ac97)
+ 	unsigned int idx;
+ 	unsigned char max;
+ 
++#ifndef __no_noise_on_play_mic__
++	ac97->flags |= AC97_HAS_NO_PHONE|AC97_HAS_NO_PC_BEEP;
++#endif
+ 	/* build master controls */
+ 	/* AD claims to remove this control from AD1887, although spec v2.2 does not allow this */
+ 	if (snd_ac97_try_volume_mix(ac97, AC97_MASTER)) {
+@@ -1369,12 +1390,14 @@ static int snd_ac97_mixer_build(struct snd_ac97 * ac97)
+ 			return err;
+ 	}
+ 	
++#if 0
+ 	/* build master mono controls */
+ 	if (snd_ac97_try_volume_mix(ac97, AC97_MASTER_MONO)) {
+ 		if ((err = snd_ac97_cmix_new(card, "Master Mono Playback",
+ 					     AC97_MASTER_MONO, 0, ac97)) < 0)
+ 			return err;
+ 	}
++#endif
+ 	
+ 	/* build master tone controls */
+ 	if (!(ac97->flags & AC97_HAS_NO_TONE)) {
diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/gnewsense-binutils-flag.patch b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/gnewsense-binutils-flag.patch
new file mode 100644
index 000000000..71ec2a65c
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/gnewsense-binutils-flag.patch
@@ -0,0 +1,15 @@
+Our binutils somehow ended up with a -mfix-gs2f-kernel, rather than
+-mfix-ls2f-kernel.  Cope with it.
+
+Index: linux-2.6.27.43-libre3-lemote_0lxo/arch/mips/Makefile
+===================================================================
+--- linux-2.6.27.43-libre3-lemote_0lxo.orig/arch/mips/Makefile	2010-01-09 11:18:24.000000000 +0000
++++ linux-2.6.27.43-libre3-lemote_0lxo/arch/mips/Makefile	2010-01-09 11:19:12.000000000 +0000
+@@ -123,6 +123,7 @@
+ cflags-$(CONFIG_MACH_LM2F) += \
+ 	$(call cc-option,-march=loongson2f,-march=r4600) \
+ 	$(call as-option,-Wa$(comma)-mfix-ls2f-kernel,) \
++	$(call as-option,-Wa$(comma)-mfix-gs2f-kernel,) \
+ 	$(call as-option,-Wa$(comma)-mfix-loongson2f-nop,) \
+ 	$(call as-option,-Wa$(comma)-mfix-loongson2f-jump,)
+ cflags-$(CONFIG_CPU_MIPS32_R1)	+= $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/lxo-config.patch b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/lxo-config.patch
new file mode 100644
index 000000000..5b401c1ad
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/lxo-config.patch
@@ -0,0 +1,3486 @@
+Index: Makefile
+===================================================================
+--- Makefile.orig	2012-03-19 05:47:01.000000000 +0000
++++ Makefile	2012-03-19 05:47:05.000000000 +0000
+@@ -1,7 +1,7 @@
+ VERSION = 2
+ PATCHLEVEL = 6
+ SUBLEVEL = 27
+-EXTRAVERSION = .62-libre5
++EXTRAVERSION = .62-libre5-lemote
+ NAME = Trembling Tortoise
+ 
+ # *DOCUMENTATION*
+Index: .config
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ .config	2012-03-19 05:49:14.000000000 +0000
+@@ -0,0 +1,3468 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.27.62-libre5-lemote
++# Mon Mar 19 05:49:14 2012
++#
++CONFIG_MIPS=y
++
++#
++# Machine selection
++#
++# CONFIG_MACH_ALCHEMY is not set
++# CONFIG_BASLER_EXCITE is not set
++# CONFIG_BCM47XX is not set
++# CONFIG_MIPS_COBALT is not set
++# CONFIG_MACH_DECSTATION is not set
++# CONFIG_MACH_JAZZ is not set
++# CONFIG_LASAT is not set
++# CONFIG_LEMOTE_FULONG is not set
++CONFIG_MACH_LM2F=y
++# CONFIG_MIPS_MALTA is not set
++# CONFIG_MIPS_SIM is not set
++# CONFIG_MARKEINS is not set
++# CONFIG_MACH_VR41XX is not set
++# CONFIG_PNX8550_JBS is not set
++# CONFIG_PNX8550_STB810 is not set
++# CONFIG_PMC_MSP is not set
++# CONFIG_PMC_YOSEMITE is not set
++# CONFIG_SGI_IP22 is not set
++# CONFIG_SGI_IP27 is not set
++# CONFIG_SGI_IP28 is not set
++# CONFIG_SGI_IP32 is not set
++# CONFIG_SIBYTE_CRHINE is not set
++# CONFIG_SIBYTE_CARMEL is not set
++# CONFIG_SIBYTE_CRHONE is not set
++# CONFIG_SIBYTE_RHONE is not set
++# CONFIG_SIBYTE_SWARM is not set
++# CONFIG_SIBYTE_LITTLESUR is not set
++# CONFIG_SIBYTE_SENTOSA is not set
++# CONFIG_SIBYTE_BIGSUR is not set
++# CONFIG_SNI_RM is not set
++# CONFIG_MACH_TX39XX is not set
++# CONFIG_MACH_TX49XX is not set
++# CONFIG_MIKROTIK_RB532 is not set
++# CONFIG_WR_PPMC is not set
++# CONFIG_LEMOTE_FULONG2F is not set
++CONFIG_LEMOTE_2FNOTEBOOK=y
++CONFIG_CS5536_RTC_BUG=y
++CONFIG_CS5536=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_FIND_NEXT_BIT=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_GENERIC_TIME=y
++CONFIG_GENERIC_CMOS_UPDATE=y
++CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_CEVT_R4K=y
++CONFIG_CSRC_R4K=y
++CONFIG_DMA_NONCOHERENT=y
++CONFIG_DMA_NEED_PCI_MAP_STATE=y
++CONFIG_EARLY_PRINTK=y
++CONFIG_SYS_HAS_EARLY_PRINTK=y
++# CONFIG_HOTPLUG_CPU is not set
++CONFIG_I8259=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_ISA_DMA=y
++CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y
++# CONFIG_CPU_BIG_ENDIAN is not set
++CONFIG_CPU_LITTLE_ENDIAN=y
++CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
++CONFIG_IRQ_CPU=y
++CONFIG_BOOT_ELF32=y
++CONFIG_MIPS_L1_CACHE_SHIFT=5
++CONFIG_HAVE_STD_PC_SERIAL_PORT=y
++
++#
++# CPU selection
++#
++CONFIG_CPU_LOONGSON2=y
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS32_R2 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
++# CONFIG_CPU_MIPS64_R2 is not set
++# CONFIG_CPU_R3000 is not set
++# CONFIG_CPU_TX39XX is not set
++# CONFIG_CPU_VR41XX is not set
++# CONFIG_CPU_R4300 is not set
++# CONFIG_CPU_R4X00 is not set
++# CONFIG_CPU_TX49XX is not set
++# CONFIG_CPU_R5000 is not set
++# CONFIG_CPU_R5432 is not set
++# CONFIG_CPU_R6000 is not set
++# CONFIG_CPU_NEVADA is not set
++# CONFIG_CPU_R8000 is not set
++# CONFIG_CPU_R10000 is not set
++# CONFIG_CPU_RM7000 is not set
++# CONFIG_CPU_RM9000 is not set
++# CONFIG_CPU_SB1 is not set
++CONFIG_SYS_HAS_CPU_LOONGSON2=y
++CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
++CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
++CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
++CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
++
++#
++# Kernel type
++#
++# CONFIG_32BIT is not set
++CONFIG_64BIT=y
++# CONFIG_PAGE_SIZE_4KB is not set
++# CONFIG_PAGE_SIZE_8KB is not set
++CONFIG_PAGE_SIZE_16KB=y
++# CONFIG_PAGE_SIZE_64KB is not set
++CONFIG_BOARD_SCACHE=y
++CONFIG_MIPS_MT_DISABLED=y
++# CONFIG_MIPS_MT_SMP is not set
++# CONFIG_MIPS_MT_SMTC is not set
++CONFIG_CPU_HAS_WB=y
++CONFIG_CPU_HAS_SYNC=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_CPU_SUPPORTS_HIGHMEM=y
++CONFIG_SYS_SUPPORTS_HIGHMEM=y
++CONFIG_ARCH_FLATMEM_ENABLE=y
++CONFIG_ARCH_POPULATES_NODE_MAP=y
++CONFIG_ARCH_SPARSEMEM_ENABLE=y
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_SPARSEMEM_STATIC=y
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4
++CONFIG_RESOURCES_64BIT=y
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++# CONFIG_HZ_48 is not set
++# CONFIG_HZ_100 is not set
++# CONFIG_HZ_128 is not set
++# CONFIG_HZ_250 is not set
++# CONFIG_HZ_256 is not set
++CONFIG_HZ_1000=y
++# CONFIG_HZ_1024 is not set
++CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
++CONFIG_HZ=1000
++# CONFIG_PREEMPT_NONE is not set
++# CONFIG_PREEMPT_VOLUNTARY is not set
++CONFIG_PREEMPT=y
++# CONFIG_PREEMPT_RCU is not set
++# CONFIG_KEXEC is not set
++CONFIG_SECCOMP=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++CONFIG_TASK_XACCT=y
++CONFIG_TASK_IO_ACCOUNTING=y
++CONFIG_AUDIT=y
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=15
++CONFIG_CGROUPS=y
++# CONFIG_CGROUP_DEBUG is not set
++# CONFIG_CGROUP_NS is not set
++# CONFIG_CGROUP_DEVICE is not set
++# CONFIG_GROUP_SCHED is not set
++# CONFIG_CGROUP_CPUACCT is not set
++# CONFIG_RESOURCE_COUNTERS is not set
++# CONFIG_SYSFS_DEPRECATED_V2 is not set
++CONFIG_RELAY=y
++CONFIG_NAMESPACES=y
++CONFIG_UTS_NS=y
++CONFIG_IPC_NS=y
++CONFIG_USER_NS=y
++CONFIG_PID_NS=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_PCSPKR_PLATFORM=y
++CONFIG_COMPAT_BRK=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLUB_DEBUG=y
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_PROFILING=y
++# CONFIG_MARKERS is not set
++CONFIG_OPROFILE=m
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
++CONFIG_HAVE_SYSCALL_WRAPPERS=y
++# CONFIG_HAVE_IOREMAP_PROT is not set
++# CONFIG_HAVE_KPROBES is not set
++# CONFIG_HAVE_KRETPROBES is not set
++# CONFIG_HAVE_ARCH_TRACEHOOK is not set
++# CONFIG_HAVE_DMA_ATTRS is not set
++# CONFIG_USE_GENERIC_SMP_HELPERS is not set
++# CONFIG_HAVE_CLK is not set
++CONFIG_PROC_PAGE_MONITOR=y
++# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++CONFIG_MODULE_FORCE_LOAD=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++CONFIG_BLOCK=y
++CONFIG_BLK_DEV_IO_TRACE=y
++CONFIG_BLK_DEV_BSG=y
++CONFIG_BLK_DEV_INTEGRITY=y
++CONFIG_BLOCK_COMPAT=y
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=m
++CONFIG_IOSCHED_DEADLINE=m
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++CONFIG_CLASSIC_RCU=y
++# CONFIG_PROBE_INITRD_HEADER is not set
++
++#
++# Bus options (PCI, PCMCIA, EISA, ISA, TC)
++#
++CONFIG_HW_HAS_PCI=y
++CONFIG_PCI=y
++CONFIG_PCI_DOMAINS=y
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCI_LEGACY=y
++# CONFIG_PCI_DEBUG is not set
++CONFIG_ISA=y
++CONFIG_MMU=y
++# CONFIG_PCCARD is not set
++CONFIG_HOTPLUG_PCI=m
++CONFIG_HOTPLUG_PCI_FAKE=m
++CONFIG_HOTPLUG_PCI_CPCI=y
++CONFIG_HOTPLUG_PCI_SHPC=m
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++CONFIG_BINFMT_MISC=m
++CONFIG_MIPS32_COMPAT=y
++CONFIG_COMPAT=y
++CONFIG_SYSVIPC_COMPAT=y
++CONFIG_MIPS32_O32=y
++CONFIG_MIPS32_N32=y
++CONFIG_BINFMT_ELF32=y
++
++#
++# Power management options
++#
++CONFIG_ARCH_HIBERNATION_POSSIBLE=y
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_PM=y
++# CONFIG_PM_DEBUG is not set
++CONFIG_PM_SLEEP=y
++CONFIG_SUSPEND=y
++CONFIG_SUSPEND_FREEZER=y
++CONFIG_HIBERNATION=y
++CONFIG_PM_STD_PARTITION="/dev/hda3"
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++CONFIG_CPU_FREQ_DEBUG=y
++CONFIG_CPU_FREQ_STAT=y
++CONFIG_CPU_FREQ_STAT_DETAILS=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_LS2F_CPU_FREQ=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++CONFIG_XFRM_USER=m
++CONFIG_XFRM_SUB_POLICY=y
++CONFIG_XFRM_MIGRATE=y
++# CONFIG_XFRM_STATISTICS is not set
++CONFIG_XFRM_IPCOMP=m
++CONFIG_NET_KEY=m
++CONFIG_NET_KEY_MIGRATE=y
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_MULTIPATH=y
++CONFIG_IP_ROUTE_VERBOSE=y
++# CONFIG_IP_PNP is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
++CONFIG_NET_IPGRE_BROADCAST=y
++CONFIG_IP_MROUTE=y
++CONFIG_IP_PIMSM_V1=y
++CONFIG_IP_PIMSM_V2=y
++# CONFIG_ARPD is not set
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_TUNNEL=m
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++CONFIG_INET_LRO=m
++CONFIG_INET_DIAG=m
++CONFIG_INET_TCP_DIAG=m
++CONFIG_TCP_CONG_ADVANCED=y
++CONFIG_TCP_CONG_BIC=m
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_TCP_CONG_WESTWOOD=m
++CONFIG_TCP_CONG_HTCP=m
++CONFIG_TCP_CONG_HSTCP=m
++CONFIG_TCP_CONG_HYBLA=m
++CONFIG_TCP_CONG_VEGAS=m
++CONFIG_TCP_CONG_SCALABLE=m
++CONFIG_TCP_CONG_LP=m
++CONFIG_TCP_CONG_VENO=m
++CONFIG_TCP_CONG_YEAH=m
++CONFIG_TCP_CONG_ILLINOIS=m
++# CONFIG_DEFAULT_BIC is not set
++CONFIG_DEFAULT_CUBIC=y
++# CONFIG_DEFAULT_HTCP is not set
++# CONFIG_DEFAULT_VEGAS is not set
++# CONFIG_DEFAULT_WESTWOOD is not set
++# CONFIG_DEFAULT_RENO is not set
++CONFIG_DEFAULT_TCP_CONG="cubic"
++CONFIG_TCP_MD5SIG=y
++CONFIG_IP_VS=m
++# CONFIG_IP_VS_DEBUG is not set
++CONFIG_IP_VS_TAB_BITS=12
++
++#
++# IPVS transport protocol load balancing support
++#
++CONFIG_IP_VS_PROTO_TCP=y
++CONFIG_IP_VS_PROTO_UDP=y
++CONFIG_IP_VS_PROTO_ESP=y
++CONFIG_IP_VS_PROTO_AH=y
++
++#
++# IPVS scheduler
++#
++CONFIG_IP_VS_RR=m
++CONFIG_IP_VS_WRR=m
++CONFIG_IP_VS_LC=m
++CONFIG_IP_VS_WLC=m
++CONFIG_IP_VS_LBLC=m
++CONFIG_IP_VS_LBLCR=m
++CONFIG_IP_VS_DH=m
++CONFIG_IP_VS_SH=m
++CONFIG_IP_VS_SED=m
++CONFIG_IP_VS_NQ=m
++
++#
++# IPVS application helper
++#
++CONFIG_IP_VS_FTP=m
++CONFIG_IPV6=m
++CONFIG_IPV6_PRIVACY=y
++CONFIG_IPV6_ROUTER_PREF=y
++CONFIG_IPV6_ROUTE_INFO=y
++CONFIG_IPV6_OPTIMISTIC_DAD=y
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++CONFIG_IPV6_MIP6=m
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_NDISC_NODETYPE=y
++CONFIG_IPV6_TUNNEL=m
++CONFIG_IPV6_MULTIPLE_TABLES=y
++CONFIG_IPV6_SUBTREES=y
++CONFIG_IPV6_MROUTE=y
++CONFIG_IPV6_PIMSM_V2=y
++CONFIG_NETLABEL=y
++CONFIG_NETWORK_SECMARK=y
++CONFIG_NETFILTER=y
++# CONFIG_NETFILTER_DEBUG is not set
++CONFIG_NETFILTER_ADVANCED=y
++CONFIG_BRIDGE_NETFILTER=y
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CT_ACCT=y
++CONFIG_NF_CONNTRACK_MARK=y
++CONFIG_NF_CONNTRACK_SECMARK=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CT_PROTO_DCCP=m
++CONFIG_NF_CT_PROTO_GRE=m
++CONFIG_NF_CT_PROTO_SCTP=m
++CONFIG_NF_CT_PROTO_UDPLITE=m
++CONFIG_NF_CONNTRACK_AMANDA=m
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
++CONFIG_NETFILTER_XT_TARGET_RATEEST=m
++CONFIG_NETFILTER_XT_TARGET_TRACE=m
++CONFIG_NETFILTER_XT_TARGET_SECMARK=m
++CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_OWNER=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_RATEEST=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++CONFIG_NETFILTER_XT_MATCH_TIME=m
++CONFIG_NETFILTER_XT_MATCH_U32=m
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_NF_CONNTRACK_PROC_COMPAT=y
++CONFIG_IP_NF_QUEUE=m
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_RECENT=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_NF_NAT=m
++CONFIG_NF_NAT_NEEDED=y
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_NF_NAT_SNMP_BASIC=m
++CONFIG_NF_NAT_PROTO_DCCP=m
++CONFIG_NF_NAT_PROTO_GRE=m
++CONFIG_NF_NAT_PROTO_UDPLITE=m
++CONFIG_NF_NAT_PROTO_SCTP=m
++CONFIG_NF_NAT_FTP=m
++CONFIG_NF_NAT_IRC=m
++CONFIG_NF_NAT_TFTP=m
++CONFIG_NF_NAT_AMANDA=m
++CONFIG_NF_NAT_PPTP=m
++CONFIG_NF_NAT_H323=m
++CONFIG_NF_NAT_SIP=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++CONFIG_IP_NF_RAW=m
++CONFIG_IP_NF_SECURITY=m
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++
++#
++# IPv6: Netfilter Configuration
++#
++CONFIG_NF_CONNTRACK_IPV6=m
++CONFIG_IP6_NF_QUEUE=m
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_AH=m
++CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_LOG=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_TARGET_HL=m
++CONFIG_IP6_NF_RAW=m
++CONFIG_IP6_NF_SECURITY=m
++
++#
++# DECnet: Netfilter Configuration
++#
++CONFIG_DECNET_NF_GRABULATOR=m
++
++#
++# Bridge: Netfilter Configuration
++#
++CONFIG_BRIDGE_NF_EBTABLES=m
++CONFIG_BRIDGE_EBT_BROUTE=m
++CONFIG_BRIDGE_EBT_T_FILTER=m
++CONFIG_BRIDGE_EBT_T_NAT=m
++CONFIG_BRIDGE_EBT_802_3=m
++CONFIG_BRIDGE_EBT_AMONG=m
++CONFIG_BRIDGE_EBT_ARP=m
++CONFIG_BRIDGE_EBT_IP=m
++CONFIG_BRIDGE_EBT_IP6=m
++CONFIG_BRIDGE_EBT_LIMIT=m
++CONFIG_BRIDGE_EBT_MARK=m
++CONFIG_BRIDGE_EBT_PKTTYPE=m
++CONFIG_BRIDGE_EBT_STP=m
++CONFIG_BRIDGE_EBT_VLAN=m
++CONFIG_BRIDGE_EBT_ARPREPLY=m
++CONFIG_BRIDGE_EBT_DNAT=m
++CONFIG_BRIDGE_EBT_MARK_T=m
++CONFIG_BRIDGE_EBT_REDIRECT=m
++CONFIG_BRIDGE_EBT_SNAT=m
++CONFIG_BRIDGE_EBT_LOG=m
++CONFIG_BRIDGE_EBT_ULOG=m
++CONFIG_BRIDGE_EBT_NFLOG=m
++CONFIG_IP_DCCP=m
++CONFIG_INET_DCCP_DIAG=m
++CONFIG_IP_DCCP_ACKVEC=y
++
++#
++# DCCP CCIDs Configuration (EXPERIMENTAL)
++#
++CONFIG_IP_DCCP_CCID2=m
++# CONFIG_IP_DCCP_CCID2_DEBUG is not set
++CONFIG_IP_DCCP_CCID3=m
++# CONFIG_IP_DCCP_CCID3_DEBUG is not set
++CONFIG_IP_DCCP_CCID3_RTO=100
++CONFIG_IP_DCCP_TFRC_LIB=m
++
++#
++# DCCP Kernel Hacking
++#
++# CONFIG_IP_DCCP_DEBUG is not set
++CONFIG_IP_SCTP=m
++# CONFIG_SCTP_DBG_MSG is not set
++# CONFIG_SCTP_DBG_OBJCNT is not set
++# CONFIG_SCTP_HMAC_NONE is not set
++# CONFIG_SCTP_HMAC_SHA1 is not set
++CONFIG_SCTP_HMAC_MD5=y
++CONFIG_TIPC=m
++CONFIG_TIPC_ADVANCED=y
++CONFIG_TIPC_ZONES=3
++CONFIG_TIPC_CLUSTERS=1
++CONFIG_TIPC_NODES=255
++CONFIG_TIPC_SLAVE_NODES=0
++CONFIG_TIPC_PORTS=8191
++CONFIG_TIPC_LOG=0
++# CONFIG_TIPC_DEBUG is not set
++CONFIG_ATM=m
++CONFIG_ATM_CLIP=m
++# CONFIG_ATM_CLIP_NO_ICMP is not set
++CONFIG_ATM_LANE=m
++CONFIG_ATM_MPOA=m
++CONFIG_ATM_BR2684=m
++# CONFIG_ATM_BR2684_IPFILTER is not set
++CONFIG_STP=m
++CONFIG_GARP=m
++CONFIG_BRIDGE=m
++CONFIG_VLAN_8021Q=m
++CONFIG_VLAN_8021Q_GVRP=y
++CONFIG_DECNET=m
++# CONFIG_DECNET_ROUTER is not set
++CONFIG_LLC=y
++CONFIG_LLC2=m
++CONFIG_IPX=m
++# CONFIG_IPX_INTERN is not set
++CONFIG_ATALK=m
++CONFIG_DEV_APPLETALK=m
++# CONFIG_COPS is not set
++CONFIG_IPDDP=m
++CONFIG_IPDDP_ENCAP=y
++CONFIG_IPDDP_DECAP=y
++CONFIG_X25=m
++CONFIG_LAPB=m
++# CONFIG_ECONET is not set
++CONFIG_WAN_ROUTER=m
++CONFIG_NET_SCHED=y
++
++#
++# Queueing/Scheduling
++#
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_ATM=m
++CONFIG_NET_SCH_PRIO=m
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_INGRESS=m
++
++#
++# Classification
++#
++CONFIG_NET_CLS=y
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_ROUTE=y
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_PERF=y
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++CONFIG_NET_CLS_FLOW=m
++CONFIG_NET_EMATCH=y
++CONFIG_NET_EMATCH_STACK=32
++CONFIG_NET_EMATCH_CMP=m
++CONFIG_NET_EMATCH_NBYTE=m
++CONFIG_NET_EMATCH_U32=m
++CONFIG_NET_EMATCH_META=m
++CONFIG_NET_EMATCH_TEXT=m
++CONFIG_NET_CLS_ACT=y
++CONFIG_NET_ACT_POLICE=m
++CONFIG_NET_ACT_GACT=m
++CONFIG_GACT_PROB=y
++CONFIG_NET_ACT_MIRRED=m
++CONFIG_NET_ACT_IPT=m
++CONFIG_NET_ACT_NAT=m
++CONFIG_NET_ACT_PEDIT=m
++CONFIG_NET_ACT_SIMP=m
++CONFIG_NET_CLS_IND=y
++CONFIG_NET_SCH_FIFO=y
++
++#
++# Network testing
++#
++CONFIG_NET_PKTGEN=m
++CONFIG_HAMRADIO=y
++
++#
++# Packet Radio protocols
++#
++CONFIG_AX25=m
++# CONFIG_AX25_DAMA_SLAVE is not set
++CONFIG_NETROM=m
++CONFIG_ROSE=m
++
++#
++# AX.25 network device drivers
++#
++CONFIG_MKISS=m
++CONFIG_6PACK=m
++CONFIG_BPQETHER=m
++CONFIG_BAYCOM_SER_FDX=m
++CONFIG_BAYCOM_SER_HDX=m
++CONFIG_BAYCOM_PAR=m
++CONFIG_YAM=m
++CONFIG_CAN=m
++CONFIG_CAN_RAW=m
++CONFIG_CAN_BCM=m
++
++#
++# CAN Device Drivers
++#
++CONFIG_CAN_VCAN=m
++# CONFIG_CAN_DEBUG_DEVICES is not set
++CONFIG_IRDA=m
++
++#
++# IrDA protocols
++#
++CONFIG_IRLAN=m
++CONFIG_IRNET=m
++CONFIG_IRCOMM=m
++# CONFIG_IRDA_ULTRA is not set
++
++#
++# IrDA options
++#
++CONFIG_IRDA_CACHE_LAST_LSAP=y
++CONFIG_IRDA_FAST_RR=y
++# CONFIG_IRDA_DEBUG is not set
++
++#
++# Infrared-port device drivers
++#
++
++#
++# SIR device drivers
++#
++CONFIG_IRTTY_SIR=m
++
++#
++# Dongle support
++#
++CONFIG_DONGLE=y
++CONFIG_ESI_DONGLE=m
++CONFIG_ACTISYS_DONGLE=m
++CONFIG_TEKRAM_DONGLE=m
++CONFIG_TOIM3232_DONGLE=m
++CONFIG_LITELINK_DONGLE=m
++CONFIG_MA600_DONGLE=m
++CONFIG_GIRBIL_DONGLE=m
++CONFIG_MCP2120_DONGLE=m
++CONFIG_OLD_BELKIN_DONGLE=m
++CONFIG_ACT200L_DONGLE=m
++CONFIG_KINGSUN_DONGLE=m
++CONFIG_KSDAZZLE_DONGLE=m
++CONFIG_KS959_DONGLE=m
++
++#
++# FIR device drivers
++#
++CONFIG_USB_IRDA=m
++CONFIG_SIGMATEL_FIR=m
++CONFIG_VLSI_FIR=m
++CONFIG_MCS_FIR=m
++CONFIG_BT=m
++CONFIG_BT_L2CAP=m
++CONFIG_BT_SCO=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_CMTP=m
++CONFIG_BT_HIDP=m
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIBTUSB=m
++CONFIG_BT_HCIBTSDIO=m
++CONFIG_BT_HCIUART=m
++CONFIG_BT_HCIUART_H4=y
++CONFIG_BT_HCIUART_BCSP=y
++CONFIG_BT_HCIUART_LL=y
++CONFIG_BT_HCIBCM203X=m
++CONFIG_BT_HCIBPA10X=m
++CONFIG_BT_HCIBFUSB=m
++CONFIG_BT_HCIVHCI=m
++CONFIG_AF_RXRPC=m
++# CONFIG_AF_RXRPC_DEBUG is not set
++CONFIG_RXKAD=m
++CONFIG_FIB_RULES=y
++
++#
++# Wireless
++#
++CONFIG_CFG80211=m
++CONFIG_NL80211=y
++CONFIG_WIRELESS_EXT=y
++# CONFIG_WIRELESS_EXT_SYSFS is not set
++CONFIG_MAC80211=m
++
++#
++# Rate control algorithm selection
++#
++# CONFIG_MAC80211_RC_PID is not set
++# CONFIG_MAC80211_RC_DEFAULT_PID is not set
++CONFIG_MAC80211_RC_DEFAULT=""
++CONFIG_MAC80211_MESH=y
++CONFIG_MAC80211_LEDS=y
++# CONFIG_MAC80211_DEBUGFS is not set
++# CONFIG_MAC80211_DEBUG_MENU is not set
++CONFIG_IEEE80211=m
++# CONFIG_IEEE80211_DEBUG is not set
++CONFIG_IEEE80211_CRYPT_WEP=m
++CONFIG_IEEE80211_CRYPT_CCMP=m
++CONFIG_IEEE80211_CRYPT_TKIP=m
++CONFIG_RFKILL=m
++CONFIG_RFKILL_INPUT=m
++CONFIG_RFKILL_LEDS=y
++CONFIG_NET_9P=m
++# CONFIG_NET_9P_DEBUG is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++# CONFIG_FIRMWARE_IN_KERNEL is not set
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++CONFIG_MTD=m
++# CONFIG_MTD_DEBUG is not set
++CONFIG_MTD_CONCAT=m
++CONFIG_MTD_PARTITIONS=y
++CONFIG_MTD_REDBOOT_PARTS=m
++CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
++# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
++# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
++CONFIG_MTD_AR7_PARTS=m
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=m
++CONFIG_MTD_BLKDEVS=m
++CONFIG_MTD_BLOCK=m
++CONFIG_MTD_BLOCK_RO=m
++CONFIG_FTL=m
++CONFIG_NFTL=m
++CONFIG_NFTL_RW=y
++CONFIG_INFTL=m
++CONFIG_RFD_FTL=m
++CONFIG_SSFDC=m
++CONFIG_MTD_OOPS=m
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=m
++CONFIG_MTD_JEDECPROBE=m
++CONFIG_MTD_GEN_PROBE=m
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++CONFIG_MTD_CFI_INTELEXT=m
++CONFIG_MTD_CFI_AMDSTD=m
++CONFIG_MTD_CFI_STAA=m
++CONFIG_MTD_CFI_UTIL=m
++CONFIG_MTD_RAM=m
++CONFIG_MTD_ROM=m
++CONFIG_MTD_ABSENT=m
++
++#
++# Mapping drivers for chip access
++#
++CONFIG_MTD_COMPLEX_MAPPINGS=y
++CONFIG_MTD_PHYSMAP=m
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++CONFIG_MTD_PCI=m
++CONFIG_MTD_INTEL_VR_NOR=m
++CONFIG_MTD_PLATRAM=m
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_PMC551=m
++# CONFIG_MTD_PMC551_BUGFIX is not set
++# CONFIG_MTD_PMC551_DEBUG is not set
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
++CONFIG_M25PXX_USE_FAST_READ=y
++CONFIG_MTD_SLRAM=m
++CONFIG_MTD_PHRAM=m
++CONFIG_MTD_MTDRAM=m
++CONFIG_MTDRAM_TOTAL_SIZE=4096
++CONFIG_MTDRAM_ERASE_SIZE=128
++CONFIG_MTD_BLOCK2MTD=m
++
++#
++# Disk-On-Chip Device Drivers
++#
++CONFIG_MTD_DOC2000=m
++CONFIG_MTD_DOC2001=m
++CONFIG_MTD_DOC2001PLUS=m
++CONFIG_MTD_DOCPROBE=m
++CONFIG_MTD_DOCECC=m
++# CONFIG_MTD_DOCPROBE_ADVANCED is not set
++CONFIG_MTD_DOCPROBE_ADDRESS=0
++CONFIG_MTD_NAND=m
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++CONFIG_MTD_NAND_IDS=m
++CONFIG_MTD_NAND_DISKONCHIP=m
++# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
++CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
++# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
++CONFIG_MTD_NAND_CAFE=m
++CONFIG_MTD_NAND_NANDSIM=m
++# CONFIG_MTD_NAND_PLATFORM is not set
++CONFIG_MTD_ALAUDA=m
++CONFIG_MTD_ONENAND=m
++CONFIG_MTD_ONENAND_VERIFY_WRITE=y
++# CONFIG_MTD_ONENAND_OTP is not set
++CONFIG_MTD_ONENAND_2X_PROGRAM=y
++CONFIG_MTD_ONENAND_SIM=m
++
++#
++# UBI - Unsorted block images
++#
++CONFIG_MTD_UBI=m
++CONFIG_MTD_UBI_WL_THRESHOLD=4096
++CONFIG_MTD_UBI_BEB_RESERVE=1
++# CONFIG_MTD_UBI_GLUEBI is not set
++
++#
++# UBI debugging options
++#
++# CONFIG_MTD_UBI_DEBUG is not set
++CONFIG_PARPORT=m
++CONFIG_PARPORT_PC=m
++CONFIG_PARPORT_SERIAL=m
++# CONFIG_PARPORT_PC_FIFO is not set
++# CONFIG_PARPORT_PC_SUPERIO is not set
++# CONFIG_PARPORT_GSC is not set
++# CONFIG_PARPORT_AX88796 is not set
++CONFIG_PARPORT_1284=y
++CONFIG_PARPORT_NOT_PC=y
++# CONFIG_PNP is not set
++CONFIG_BLK_DEV=y
++CONFIG_PARIDE=m
++
++#
++# Parallel IDE high-level drivers
++#
++CONFIG_PARIDE_PD=m
++CONFIG_PARIDE_PCD=m
++CONFIG_PARIDE_PF=m
++CONFIG_PARIDE_PT=m
++CONFIG_PARIDE_PG=m
++
++#
++# Parallel IDE protocol modules
++#
++CONFIG_PARIDE_ATEN=m
++CONFIG_PARIDE_BPCK=m
++CONFIG_PARIDE_COMM=m
++CONFIG_PARIDE_DSTR=m
++CONFIG_PARIDE_FIT2=m
++CONFIG_PARIDE_FIT3=m
++CONFIG_PARIDE_EPAT=m
++# CONFIG_PARIDE_EPATC8 is not set
++CONFIG_PARIDE_EPIA=m
++CONFIG_PARIDE_FRIQ=m
++CONFIG_PARIDE_FRPW=m
++CONFIG_PARIDE_KBIC=m
++CONFIG_PARIDE_KTTI=m
++CONFIG_PARIDE_ON20=m
++CONFIG_PARIDE_ON26=m
++# CONFIG_BLK_CPQ_DA is not set
++CONFIG_BLK_CPQ_CISS_DA=m
++CONFIG_CISS_SCSI_TAPE=y
++CONFIG_BLK_DEV_DAC960=m
++CONFIG_BLK_DEV_UMEM=m
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_SX8=m
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=65536
++# CONFIG_BLK_DEV_XIP is not set
++CONFIG_CDROM_PKTCDVD=m
++CONFIG_CDROM_PKTCDVD_BUFFERS=8
++# CONFIG_CDROM_PKTCDVD_WCACHE is not set
++CONFIG_ATA_OVER_ETH=m
++# CONFIG_BLK_DEV_HD is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_PHANTOM is not set
++CONFIG_EEPROM_93CX6=m
++# CONFIG_SGI_IOC4 is not set
++CONFIG_TIFM_CORE=m
++CONFIG_TIFM_7XX1=m
++CONFIG_ENCLOSURE_SERVICES=m
++# CONFIG_HP_ILO is not set
++CONFIG_LOONGSON2_PLATFROM_SUPPORT=y
++CONFIG_EC_COMMON_OPERATION=y
++CONFIG_EC_ROM_UPDATE_DRIVER=m
++CONFIG_EC_SCI_DRIVER=m
++CONFIG_LAPTOP_YEELOONG=m
++CONFIG_BIOS_DRIVER=m
++# CONFIG_IO_MSR_DEBUG_DRIVER is not set
++CONFIG_HAVE_IDE=y
++CONFIG_IDE=y
++CONFIG_BLK_DEV_IDE=y
++
++#
++# Please see Documentation/ide/ide.txt for help/info on IDE drives
++#
++CONFIG_IDE_TIMINGS=y
++CONFIG_IDE_ATAPI=y
++# CONFIG_BLK_DEV_IDE_SATA is not set
++CONFIG_BLK_DEV_IDEDISK=y
++CONFIG_IDEDISK_MULTI_MODE=y
++# CONFIG_BLK_DEV_IDECD is not set
++# CONFIG_BLK_DEV_IDETAPE is not set
++# CONFIG_BLK_DEV_IDEFLOPPY is not set
++CONFIG_BLK_DEV_IDESCSI=m
++CONFIG_IDE_TASK_IOCTL=y
++CONFIG_IDE_PROC_FS=y
++
++#
++# IDE chipset support/bugfixes
++#
++# CONFIG_IDE_GENERIC is not set
++# CONFIG_BLK_DEV_PLATFORM is not set
++CONFIG_BLK_DEV_IDEDMA_SFF=y
++
++#
++# PCI IDE chipsets support
++#
++CONFIG_BLK_DEV_IDEPCI=y
++# CONFIG_IDEPCI_PCIBUS_ORDER is not set
++# CONFIG_BLK_DEV_GENERIC is not set
++# CONFIG_BLK_DEV_OPTI621 is not set
++CONFIG_BLK_DEV_IDEDMA_PCI=y
++# CONFIG_BLK_DEV_AEC62XX is not set
++# CONFIG_BLK_DEV_ALI15X3 is not set
++CONFIG_BLK_DEV_AMD74XX=y
++# CONFIG_BLK_DEV_CMD64X is not set
++# CONFIG_BLK_DEV_TRIFLEX is not set
++# CONFIG_BLK_DEV_CS5520 is not set
++# CONFIG_BLK_DEV_CS5530 is not set
++# CONFIG_BLK_DEV_HPT366 is not set
++# CONFIG_BLK_DEV_JMICRON is not set
++# CONFIG_BLK_DEV_SC1200 is not set
++# CONFIG_BLK_DEV_PIIX is not set
++# CONFIG_BLK_DEV_IT8213 is not set
++# CONFIG_BLK_DEV_IT821X is not set
++# CONFIG_BLK_DEV_NS87415 is not set
++# CONFIG_BLK_DEV_PDC202XX_OLD is not set
++# CONFIG_BLK_DEV_PDC202XX_NEW is not set
++# CONFIG_BLK_DEV_SVWKS is not set
++# CONFIG_BLK_DEV_SIIMAGE is not set
++# CONFIG_BLK_DEV_SLC90E66 is not set
++# CONFIG_BLK_DEV_TRM290 is not set
++# CONFIG_BLK_DEV_VIA82CXXX is not set
++# CONFIG_BLK_DEV_TC86C001 is not set
++
++#
++# Other IDE chipsets support
++#
++
++#
++# Note: most of these also require special kernel boot parameters
++#
++# CONFIG_BLK_DEV_4DRIVES is not set
++# CONFIG_BLK_DEV_ALI14XX is not set
++# CONFIG_BLK_DEV_DTC2278 is not set
++# CONFIG_BLK_DEV_HT6560B is not set
++# CONFIG_BLK_DEV_QD65XX is not set
++# CONFIG_BLK_DEV_UMC8672 is not set
++CONFIG_BLK_DEV_IDEDMA=y
++
++#
++# SCSI device support
++#
++CONFIG_RAID_ATTRS=m
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++CONFIG_SCSI_TGT=m
++CONFIG_SCSI_NETLINK=y
++# CONFIG_SCSI_PROC_FS is not set
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++CONFIG_CHR_DEV_ST=m
++CONFIG_CHR_DEV_OSST=m
++CONFIG_BLK_DEV_SR=m
++CONFIG_BLK_DEV_SR_VENDOR=y
++CONFIG_CHR_DEV_SG=m
++CONFIG_CHR_DEV_SCH=m
++CONFIG_SCSI_ENCLOSURE=m
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++CONFIG_SCSI_MULTI_LUN=y
++CONFIG_SCSI_CONSTANTS=y
++CONFIG_SCSI_LOGGING=y
++CONFIG_SCSI_SCAN_ASYNC=y
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++CONFIG_SCSI_SPI_ATTRS=m
++CONFIG_SCSI_FC_ATTRS=m
++CONFIG_SCSI_FC_TGT_ATTRS=y
++CONFIG_SCSI_ISCSI_ATTRS=m
++CONFIG_SCSI_SAS_ATTRS=m
++CONFIG_SCSI_SAS_LIBSAS=m
++CONFIG_SCSI_SAS_ATA=y
++CONFIG_SCSI_SAS_HOST_SMP=y
++# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set
++CONFIG_SCSI_SRP_ATTRS=m
++CONFIG_SCSI_SRP_TGT_ATTRS=y
++CONFIG_SCSI_LOWLEVEL=y
++CONFIG_ISCSI_TCP=m
++CONFIG_BLK_DEV_3W_XXXX_RAID=m
++CONFIG_SCSI_3W_9XXX=m
++CONFIG_SCSI_ACARD=m
++CONFIG_SCSI_AACRAID=m
++CONFIG_SCSI_AIC7XXX=m
++CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
++CONFIG_AIC7XXX_RESET_DELAY_MS=15000
++CONFIG_AIC7XXX_DEBUG_ENABLE=y
++CONFIG_AIC7XXX_DEBUG_MASK=0
++CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
++CONFIG_SCSI_AIC7XXX_OLD=m
++CONFIG_SCSI_AIC79XX=m
++CONFIG_AIC79XX_CMDS_PER_DEVICE=32
++CONFIG_AIC79XX_RESET_DELAY_MS=15000
++CONFIG_AIC79XX_DEBUG_ENABLE=y
++CONFIG_AIC79XX_DEBUG_MASK=0
++CONFIG_AIC79XX_REG_PRETTY_PRINT=y
++CONFIG_SCSI_AIC94XX=m
++# CONFIG_AIC94XX_DEBUG is not set
++# CONFIG_SCSI_DPT_I2O is not set
++# CONFIG_SCSI_ADVANSYS is not set
++# CONFIG_SCSI_IN2000 is not set
++CONFIG_SCSI_ARCMSR=m
++CONFIG_MEGARAID_NEWGEN=y
++CONFIG_MEGARAID_MM=m
++CONFIG_MEGARAID_MAILBOX=m
++CONFIG_MEGARAID_LEGACY=m
++CONFIG_MEGARAID_SAS=m
++CONFIG_SCSI_HPTIOP=m
++CONFIG_SCSI_DMX3191D=m
++# CONFIG_SCSI_DTC3280 is not set
++CONFIG_SCSI_FUTURE_DOMAIN=m
++# CONFIG_SCSI_GENERIC_NCR5380 is not set
++# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
++CONFIG_SCSI_IPS=m
++CONFIG_SCSI_INITIO=m
++CONFIG_SCSI_INIA100=m
++CONFIG_SCSI_PPA=m
++CONFIG_SCSI_IMM=m
++# CONFIG_SCSI_IZIP_EPP16 is not set
++# CONFIG_SCSI_IZIP_SLOW_CTR is not set
++CONFIG_SCSI_MVSAS=m
++# CONFIG_SCSI_NCR53C406A is not set
++CONFIG_SCSI_STEX=m
++CONFIG_SCSI_SYM53C8XX_2=m
++CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
++CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
++CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
++CONFIG_SCSI_SYM53C8XX_MMIO=y
++# CONFIG_SCSI_IPR is not set
++# CONFIG_SCSI_PAS16 is not set
++# CONFIG_SCSI_QLOGIC_FAS is not set
++CONFIG_SCSI_QLOGIC_1280=m
++CONFIG_SCSI_QLA_FC=m
++CONFIG_SCSI_QLA_ISCSI=m
++CONFIG_SCSI_LPFC=m
++# CONFIG_SCSI_SYM53C416 is not set
++CONFIG_SCSI_DC395x=m
++CONFIG_SCSI_DC390T=m
++# CONFIG_SCSI_T128 is not set
++CONFIG_SCSI_DEBUG=m
++CONFIG_SCSI_SRP=m
++CONFIG_SCSI_DH=m
++CONFIG_SCSI_DH_RDAC=m
++CONFIG_SCSI_DH_HP_SW=m
++CONFIG_SCSI_DH_EMC=m
++CONFIG_SCSI_DH_ALUA=m
++CONFIG_ATA=y
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_SATA_PMP=y
++CONFIG_SATA_AHCI=m
++CONFIG_SATA_SIL24=m
++CONFIG_ATA_SFF=y
++CONFIG_SATA_SVW=m
++CONFIG_ATA_PIIX=m
++CONFIG_SATA_MV=m
++CONFIG_SATA_NV=m
++CONFIG_PDC_ADMA=m
++CONFIG_SATA_QSTOR=m
++CONFIG_SATA_PROMISE=m
++CONFIG_SATA_SX4=m
++CONFIG_SATA_SIL=m
++CONFIG_SATA_SIS=m
++CONFIG_SATA_ULI=m
++CONFIG_SATA_VIA=m
++CONFIG_SATA_VITESSE=m
++CONFIG_SATA_INIC162X=m
++CONFIG_PATA_ALI=m
++CONFIG_PATA_AMD=m
++CONFIG_PATA_ARTOP=m
++CONFIG_PATA_ATIIXP=m
++CONFIG_PATA_CMD640_PCI=m
++CONFIG_PATA_CMD64X=m
++CONFIG_PATA_CS5520=m
++CONFIG_PATA_CS5530=m
++CONFIG_PATA_CYPRESS=m
++CONFIG_PATA_EFAR=m
++CONFIG_ATA_GENERIC=m
++CONFIG_PATA_HPT366=m
++CONFIG_PATA_HPT37X=m
++CONFIG_PATA_HPT3X2N=m
++CONFIG_PATA_HPT3X3=m
++CONFIG_PATA_HPT3X3_DMA=y
++CONFIG_PATA_IT821X=m
++CONFIG_PATA_IT8213=m
++CONFIG_PATA_JMICRON=m
++CONFIG_PATA_LEGACY=m
++CONFIG_PATA_TRIFLEX=m
++CONFIG_PATA_MARVELL=m
++CONFIG_PATA_MPIIX=m
++CONFIG_PATA_OLDPIIX=m
++CONFIG_PATA_NETCELL=m
++CONFIG_PATA_NINJA32=m
++CONFIG_PATA_NS87410=m
++CONFIG_PATA_NS87415=m
++CONFIG_PATA_OPTI=m
++CONFIG_PATA_OPTIDMA=m
++CONFIG_PATA_PDC_OLD=m
++CONFIG_PATA_QDI=m
++CONFIG_PATA_RADISYS=m
++CONFIG_PATA_RZ1000=m
++CONFIG_PATA_SC1200=m
++CONFIG_PATA_SERVERWORKS=m
++CONFIG_PATA_PDC2027X=m
++CONFIG_PATA_SIL680=m
++CONFIG_PATA_SIS=m
++CONFIG_PATA_VIA=m
++CONFIG_PATA_WINBOND=m
++CONFIG_PATA_WINBOND_VLB=m
++# CONFIG_PATA_PLATFORM is not set
++CONFIG_PATA_SCH=m
++CONFIG_MD=y
++CONFIG_BLK_DEV_MD=m
++CONFIG_MD_LINEAR=m
++CONFIG_MD_RAID0=m
++CONFIG_MD_RAID1=m
++CONFIG_MD_RAID10=m
++CONFIG_MD_RAID456=m
++CONFIG_MD_RAID5_RESHAPE=y
++CONFIG_MD_MULTIPATH=m
++CONFIG_MD_FAULTY=m
++CONFIG_BLK_DEV_DM=m
++# CONFIG_DM_DEBUG is not set
++CONFIG_DM_CRYPT=m
++CONFIG_DM_SNAPSHOT=m
++CONFIG_DM_MIRROR=m
++CONFIG_DM_ZERO=m
++CONFIG_DM_MULTIPATH=m
++CONFIG_DM_DELAY=m
++CONFIG_DM_UEVENT=y
++CONFIG_FUSION=y
++CONFIG_FUSION_SPI=m
++CONFIG_FUSION_FC=m
++CONFIG_FUSION_SAS=m
++CONFIG_FUSION_MAX_SGE=40
++CONFIG_FUSION_CTL=m
++CONFIG_FUSION_LAN=m
++# CONFIG_FUSION_LOGGING is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# Enable only one of the two stacks, unless you know what you are doing
++#
++CONFIG_FIREWIRE=m
++CONFIG_FIREWIRE_OHCI=m
++CONFIG_FIREWIRE_OHCI_DEBUG=y
++CONFIG_FIREWIRE_SBP2=m
++# CONFIG_IEEE1394 is not set
++CONFIG_I2O=m
++CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
++CONFIG_I2O_EXT_ADAPTEC=y
++CONFIG_I2O_EXT_ADAPTEC_DMA64=y
++CONFIG_I2O_CONFIG=m
++CONFIG_I2O_CONFIG_OLD_IOCTL=y
++CONFIG_I2O_BUS=m
++CONFIG_I2O_BLOCK=m
++CONFIG_I2O_SCSI=m
++CONFIG_I2O_PROC=m
++CONFIG_NETDEVICES=y
++CONFIG_IFB=m
++CONFIG_DUMMY=m
++CONFIG_BONDING=m
++CONFIG_MACVLAN=m
++CONFIG_EQUALIZER=m
++CONFIG_TUN=m
++CONFIG_VETH=m
++CONFIG_ARCNET=m
++CONFIG_ARCNET_1201=m
++CONFIG_ARCNET_1051=m
++CONFIG_ARCNET_RAW=m
++CONFIG_ARCNET_CAP=m
++CONFIG_ARCNET_COM90xx=m
++CONFIG_ARCNET_COM90xxIO=m
++CONFIG_ARCNET_RIM_I=m
++CONFIG_ARCNET_COM20020=m
++# CONFIG_ARCNET_COM20020_ISA is not set
++CONFIG_ARCNET_COM20020_PCI=m
++CONFIG_PHYLIB=m
++
++#
++# MII PHY device drivers
++#
++CONFIG_MARVELL_PHY=m
++CONFIG_DAVICOM_PHY=m
++# CONFIG_QSEMI_PHY is not set
++CONFIG_LXT_PHY=m
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++CONFIG_SMSC_PHY=m
++CONFIG_BROADCOM_PHY=m
++CONFIG_ICPLUS_PHY=m
++CONFIG_REALTEK_PHY=m
++CONFIG_MDIO_BITBANG=m
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_HAPPYMEAL is not set
++# CONFIG_SUNGEM is not set
++# CONFIG_CASSINI is not set
++CONFIG_NET_VENDOR_3COM=y
++# CONFIG_EL1 is not set
++# CONFIG_EL2 is not set
++# CONFIG_EL16 is not set
++# CONFIG_EL3 is not set
++CONFIG_VORTEX=m
++CONFIG_TYPHOON=m
++# CONFIG_NET_VENDOR_SMC is not set
++# CONFIG_DM9000 is not set
++CONFIG_ENC28J60=m
++# CONFIG_ENC28J60_WRITEVERIFY is not set
++# CONFIG_NET_VENDOR_RACAL is not set
++CONFIG_NET_TULIP=y
++CONFIG_DE2104X=m
++CONFIG_TULIP=m
++# CONFIG_TULIP_MWI is not set
++# CONFIG_TULIP_MMIO is not set
++# CONFIG_TULIP_NAPI is not set
++CONFIG_DE4X5=m
++# CONFIG_WINBOND_840 is not set
++CONFIG_DM9102=m
++# CONFIG_ULI526X is not set
++# CONFIG_AT1700 is not set
++# CONFIG_DEPCA is not set
++# CONFIG_HP100 is not set
++# CONFIG_NET_ISA is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++CONFIG_NET_PCI=y
++CONFIG_PCNET32=y
++CONFIG_AMD8111_ETH=m
++CONFIG_ADAPTEC_STARFIRE=m
++# CONFIG_AC3200 is not set
++# CONFIG_APRICOT is not set
++CONFIG_B44=m
++CONFIG_B44_PCI_AUTOSELECT=y
++CONFIG_B44_PCICORE_AUTOSELECT=y
++CONFIG_B44_PCI=y
++# CONFIG_FORCEDETH is not set
++# CONFIG_CS89x0 is not set
++# CONFIG_TC35815 is not set
++CONFIG_EEPRO100=m
++CONFIG_E100=m
++CONFIG_FEALNX=m
++CONFIG_NATSEMI=m
++CONFIG_NE2K_PCI=m
++CONFIG_8139CP=m
++CONFIG_8139TOO=m
++# CONFIG_8139TOO_PIO is not set
++CONFIG_8139TOO_TUNE_TWISTER=y
++CONFIG_8139TOO_8129=y
++# CONFIG_8139_OLD_RX_RESET is not set
++CONFIG_R6040=m
++CONFIG_SIS900=m
++CONFIG_EPIC100=m
++CONFIG_SUNDANCE=m
++# CONFIG_SUNDANCE_MMIO is not set
++CONFIG_TLAN=m
++CONFIG_VIA_RHINE=m
++# CONFIG_VIA_RHINE_MMIO is not set
++CONFIG_SC92031=m
++CONFIG_NET_POCKET=y
++CONFIG_DE600=m
++CONFIG_DE620=m
++CONFIG_NETDEV_1000=y
++CONFIG_ACENIC=m
++# CONFIG_ACENIC_OMIT_TIGON_I is not set
++CONFIG_DL2K=m
++CONFIG_E1000=m
++# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
++CONFIG_E1000E=m
++CONFIG_IP1000=m
++CONFIG_IGB=m
++# CONFIG_IGB_LRO is not set
++CONFIG_NS83820=m
++CONFIG_HAMACHI=m
++CONFIG_YELLOWFIN=m
++CONFIG_R8169=m
++CONFIG_R8169_VLAN=y
++CONFIG_SIS190=m
++CONFIG_SKGE=m
++# CONFIG_SKGE_DEBUG is not set
++CONFIG_SKY2=m
++# CONFIG_SKY2_DEBUG is not set
++CONFIG_VIA_VELOCITY=m
++CONFIG_TIGON3=m
++CONFIG_BNX2=m
++CONFIG_QLA3XXX=m
++CONFIG_ATL1=m
++CONFIG_ATL1E=m
++CONFIG_NETDEV_10000=y
++CONFIG_CHELSIO_T1=m
++CONFIG_CHELSIO_T1_1G=y
++CONFIG_CHELSIO_T3=m
++CONFIG_IXGBE=m
++CONFIG_IXGB=m
++CONFIG_S2IO=m
++CONFIG_MYRI10GE=m
++CONFIG_NETXEN_NIC=m
++# CONFIG_NIU is not set
++CONFIG_MLX4_CORE=m
++CONFIG_MLX4_DEBUG=y
++CONFIG_TEHUTI=m
++CONFIG_BNX2X=m
++CONFIG_SFC=m
++CONFIG_TR=y
++# CONFIG_IBMTR is not set
++CONFIG_IBMOL=m
++CONFIG_3C359=m
++CONFIG_TMS380TR=m
++CONFIG_TMSPCI=m
++# CONFIG_SKISA is not set
++# CONFIG_PROTEON is not set
++CONFIG_ABYSS=m
++
++#
++# Wireless LAN
++#
++CONFIG_WLAN_PRE80211=y
++# CONFIG_STRIP is not set
++# CONFIG_WAVELAN is not set
++CONFIG_WLAN_80211=y
++CONFIG_IPW2100=m
++CONFIG_IPW2100_MONITOR=y
++# CONFIG_IPW2100_DEBUG is not set
++CONFIG_IPW2200=m
++# CONFIG_IPW2200_MONITOR is not set
++CONFIG_IPW2200_QOS=y
++# CONFIG_IPW2200_DEBUG is not set
++CONFIG_LIBERTAS=m
++CONFIG_LIBERTAS_USB=m
++CONFIG_LIBERTAS_SDIO=m
++# CONFIG_LIBERTAS_DEBUG is not set
++CONFIG_HERMES=m
++CONFIG_PLX_HERMES=m
++CONFIG_TMD_HERMES=m
++CONFIG_NORTEL_HERMES=m
++# CONFIG_PCI_HERMES is not set
++CONFIG_ATMEL=m
++CONFIG_PCI_ATMEL=m
++# CONFIG_PRISM54 is not set
++CONFIG_USB_ZD1201=m
++CONFIG_USB_NET_RNDIS_WLAN=m
++CONFIG_RTL8180=m
++CONFIG_RTL8187B=m
++# CONFIG_RTL8187 is not set
++CONFIG_ADM8211=m
++CONFIG_MAC80211_HWSIM=m
++CONFIG_P54_COMMON=m
++CONFIG_P54_USB=m
++CONFIG_P54_PCI=m
++CONFIG_ATH5K=m
++# CONFIG_ATH5K_DEBUG is not set
++CONFIG_ATH9K=m
++CONFIG_IWLWIFI=m
++CONFIG_IWLCORE=m
++# CONFIG_IWLWIFI_LEDS is not set
++CONFIG_IWLWIFI_RFKILL=y
++# CONFIG_IWLWIFI_DEBUG is not set
++CONFIG_IWLAGN=m
++# CONFIG_IWLAGN_SPECTRUM_MEASUREMENT is not set
++# CONFIG_IWLAGN_LEDS is not set
++CONFIG_IWL4965=y
++CONFIG_IWL5000=y
++CONFIG_IWL3945=m
++CONFIG_IWL3945_RFKILL=y
++# CONFIG_IWL3945_SPECTRUM_MEASUREMENT is not set
++# CONFIG_IWL3945_LEDS is not set
++# CONFIG_IWL3945_DEBUG is not set
++CONFIG_HOSTAP=m
++CONFIG_HOSTAP_FIRMWARE=y
++# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
++CONFIG_HOSTAP_PLX=m
++CONFIG_HOSTAP_PCI=m
++CONFIG_B43=m
++CONFIG_B43_PCI_AUTOSELECT=y
++CONFIG_B43_PCICORE_AUTOSELECT=y
++CONFIG_B43_LEDS=y
++CONFIG_B43_RFKILL=y
++# CONFIG_B43_DEBUG is not set
++CONFIG_B43LEGACY=m
++CONFIG_B43LEGACY_PCI_AUTOSELECT=y
++CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
++CONFIG_B43LEGACY_LEDS=y
++CONFIG_B43LEGACY_RFKILL=y
++CONFIG_B43LEGACY_DEBUG=y
++CONFIG_B43LEGACY_DMA=y
++CONFIG_B43LEGACY_PIO=y
++CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
++# CONFIG_B43LEGACY_DMA_MODE is not set
++# CONFIG_B43LEGACY_PIO_MODE is not set
++CONFIG_ZD1211RW=m
++# CONFIG_ZD1211RW_DEBUG is not set
++CONFIG_RT2X00=m
++CONFIG_RT2X00_LIB=m
++CONFIG_RT2X00_LIB_PCI=m
++CONFIG_RT2X00_LIB_USB=m
++CONFIG_RT2X00_LIB_FIRMWARE=y
++CONFIG_RT2X00_LIB_RFKILL=y
++CONFIG_RT2400PCI=m
++CONFIG_RT2400PCI_RFKILL=y
++# CONFIG_RT2400PCI_LEDS is not set
++CONFIG_RT2500PCI=m
++CONFIG_RT2500PCI_RFKILL=y
++# CONFIG_RT2500PCI_LEDS is not set
++CONFIG_RT61PCI=m
++CONFIG_RT61PCI_RFKILL=y
++# CONFIG_RT61PCI_LEDS is not set
++CONFIG_RT2500USB=m
++# CONFIG_RT2500USB_LEDS is not set
++CONFIG_RT73USB=m
++# CONFIG_RT73USB_LEDS is not set
++# CONFIG_RT2X00_DEBUG is not set
++
++#
++# USB Network Adapters
++#
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_USBNET=m
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_RNDIS_HOST=m
++CONFIG_USB_NET_CDC_SUBSET=m
++CONFIG_USB_ALI_M5632=y
++CONFIG_USB_AN2720=y
++CONFIG_USB_BELKIN=y
++CONFIG_USB_ARMLINUX=y
++CONFIG_USB_EPSON2888=y
++CONFIG_USB_KC2190=y
++CONFIG_USB_NET_ZAURUS=m
++CONFIG_USB_HSO=m
++CONFIG_WAN=y
++CONFIG_LANMEDIA=m
++CONFIG_HDLC=m
++CONFIG_HDLC_RAW=m
++CONFIG_HDLC_RAW_ETH=m
++CONFIG_HDLC_CISCO=m
++CONFIG_HDLC_FR=m
++CONFIG_HDLC_PPP=m
++# CONFIG_HDLC_X25 is not set
++CONFIG_PCI200SYN=m
++CONFIG_WANXL=m
++CONFIG_PC300=m
++CONFIG_PC300_MLPPP=y
++
++#
++# Cyclades-PC300 MLPPP support is disabled.
++#
++
++#
++# Refer to the file README.mlppp, provided by PC300 package.
++#
++# CONFIG_PC300TOO is not set
++# CONFIG_N2 is not set
++# CONFIG_C101 is not set
++CONFIG_FARSYNC=m
++CONFIG_DSCC4=m
++# CONFIG_DSCC4_PCISYNC is not set
++# CONFIG_DSCC4_PCI_RST is not set
++CONFIG_DLCI=m
++CONFIG_DLCI_MAX=8
++# CONFIG_SDLA is not set
++CONFIG_WAN_ROUTER_DRIVERS=m
++CONFIG_CYCLADES_SYNC=m
++# CONFIG_CYCLOMX_X25 is not set
++# CONFIG_LAPBETHER is not set
++# CONFIG_X25_ASY is not set
++CONFIG_ATM_DRIVERS=y
++CONFIG_ATM_DUMMY=m
++CONFIG_ATM_TCP=m
++CONFIG_ATM_LANAI=m
++CONFIG_ATM_ENI=m
++# CONFIG_ATM_ENI_DEBUG is not set
++# CONFIG_ATM_ENI_TUNE_BURST is not set
++CONFIG_ATM_FIRESTREAM=m
++CONFIG_ATM_ZATM=m
++# CONFIG_ATM_ZATM_DEBUG is not set
++CONFIG_ATM_IDT77252=m
++# CONFIG_ATM_IDT77252_DEBUG is not set
++# CONFIG_ATM_IDT77252_RCV_ALL is not set
++CONFIG_ATM_IDT77252_USE_SUNI=y
++CONFIG_ATM_AMBASSADOR=m
++# CONFIG_ATM_AMBASSADOR_DEBUG is not set
++CONFIG_ATM_HORIZON=m
++# CONFIG_ATM_HORIZON_DEBUG is not set
++CONFIG_ATM_IA=m
++# CONFIG_ATM_IA_DEBUG is not set
++CONFIG_ATM_FORE200E=m
++# CONFIG_ATM_FORE200E_USE_TASKLET is not set
++CONFIG_ATM_FORE200E_TX_RETRY=16
++CONFIG_ATM_FORE200E_DEBUG=0
++CONFIG_ATM_HE=m
++CONFIG_ATM_HE_USE_SUNI=y
++CONFIG_FDDI=y
++CONFIG_DEFXX=m
++# CONFIG_DEFXX_MMIO is not set
++CONFIG_SKFP=m
++CONFIG_HIPPI=y
++CONFIG_ROADRUNNER=m
++# CONFIG_ROADRUNNER_LARGE_RINGS is not set
++CONFIG_PLIP=m
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++CONFIG_PPPOE=m
++CONFIG_PPPOATM=m
++CONFIG_PPPOL2TP=m
++CONFIG_SLIP=m
++CONFIG_SLIP_COMPRESSED=y
++CONFIG_SLHC=m
++CONFIG_SLIP_SMART=y
++CONFIG_SLIP_MODE_SLIP6=y
++CONFIG_NET_FC=y
++CONFIG_NETCONSOLE=m
++CONFIG_NETCONSOLE_DYNAMIC=y
++CONFIG_NETPOLL=y
++# CONFIG_NETPOLL_TRAP is not set
++CONFIG_NET_POLL_CONTROLLER=y
++CONFIG_ISDN=y
++CONFIG_MISDN=m
++CONFIG_MISDN_DSP=m
++CONFIG_MISDN_L1OIP=m
++
++#
++# mISDN hardware drivers
++#
++CONFIG_MISDN_HFCPCI=m
++CONFIG_MISDN_HFCMULTI=m
++# CONFIG_ISDN_I4L is not set
++CONFIG_ISDN_CAPI=m
++CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y
++CONFIG_CAPI_TRACE=y
++CONFIG_ISDN_CAPI_MIDDLEWARE=y
++CONFIG_ISDN_CAPI_CAPI20=m
++CONFIG_ISDN_CAPI_CAPIFS_BOOL=y
++CONFIG_ISDN_CAPI_CAPIFS=m
++
++#
++# CAPI hardware drivers
++#
++CONFIG_CAPI_AVM=y
++# CONFIG_ISDN_DRV_AVMB1_B1ISA is not set
++CONFIG_ISDN_DRV_AVMB1_B1PCI=m
++CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y
++# CONFIG_ISDN_DRV_AVMB1_T1ISA is not set
++# CONFIG_ISDN_DRV_AVMB1_B1PCMCIA is not set
++CONFIG_ISDN_DRV_AVMB1_T1PCI=m
++CONFIG_ISDN_DRV_AVMB1_C4=m
++CONFIG_CAPI_EICON=y
++CONFIG_ISDN_DIVAS=m
++CONFIG_ISDN_DIVAS_BRIPCI=y
++CONFIG_ISDN_DIVAS_PRIPCI=y
++CONFIG_ISDN_DIVAS_DIVACAPI=m
++CONFIG_ISDN_DIVAS_USERIDI=m
++CONFIG_ISDN_DIVAS_MAINT=m
++CONFIG_PHONE=m
++CONFIG_PHONE_IXJ=m
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++CONFIG_INPUT_FF_MEMLESS=m
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++CONFIG_INPUT_JOYDEV=m
++CONFIG_INPUT_EVDEV=m
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++CONFIG_KEYBOARD_ATKBD=y
++CONFIG_KEYBOARD_SUNKBD=m
++CONFIG_KEYBOARD_LKKBD=m
++CONFIG_KEYBOARD_XTKBD=m
++CONFIG_KEYBOARD_NEWTON=m
++CONFIG_KEYBOARD_STOWAWAY=m
++CONFIG_INPUT_MOUSE=y
++CONFIG_MOUSE_PS2=m
++CONFIG_MOUSE_PS2_ALPS=y
++CONFIG_MOUSE_PS2_LOGIPS2PP=y
++CONFIG_MOUSE_PS2_SYNAPTICS=y
++CONFIG_MOUSE_PS2_LIFEBOOK=y
++CONFIG_MOUSE_PS2_TRACKPOINT=y
++# CONFIG_MOUSE_PS2_TOUCHKIT is not set
++CONFIG_MOUSE_SERIAL=m
++CONFIG_MOUSE_APPLETOUCH=m
++# CONFIG_MOUSE_BCM5974 is not set
++# CONFIG_MOUSE_INPORT is not set
++# CONFIG_MOUSE_LOGIBM is not set
++# CONFIG_MOUSE_PC110PAD is not set
++CONFIG_MOUSE_VSXXXAA=m
++CONFIG_INPUT_JOYSTICK=y
++CONFIG_JOYSTICK_ANALOG=m
++CONFIG_JOYSTICK_A3D=m
++CONFIG_JOYSTICK_ADI=m
++CONFIG_JOYSTICK_COBRA=m
++CONFIG_JOYSTICK_GF2K=m
++CONFIG_JOYSTICK_GRIP=m
++CONFIG_JOYSTICK_GRIP_MP=m
++CONFIG_JOYSTICK_GUILLEMOT=m
++CONFIG_JOYSTICK_INTERACT=m
++CONFIG_JOYSTICK_SIDEWINDER=m
++CONFIG_JOYSTICK_TMDC=m
++CONFIG_JOYSTICK_IFORCE=m
++CONFIG_JOYSTICK_IFORCE_USB=y
++CONFIG_JOYSTICK_IFORCE_232=y
++CONFIG_JOYSTICK_WARRIOR=m
++CONFIG_JOYSTICK_MAGELLAN=m
++CONFIG_JOYSTICK_SPACEORB=m
++CONFIG_JOYSTICK_SPACEBALL=m
++CONFIG_JOYSTICK_STINGER=m
++CONFIG_JOYSTICK_TWIDJOY=m
++CONFIG_JOYSTICK_ZHENHUA=m
++CONFIG_JOYSTICK_DB9=m
++CONFIG_JOYSTICK_GAMECON=m
++CONFIG_JOYSTICK_TURBOGRAFX=m
++CONFIG_JOYSTICK_JOYDUMP=m
++CONFIG_JOYSTICK_XPAD=m
++CONFIG_JOYSTICK_XPAD_FF=y
++CONFIG_JOYSTICK_XPAD_LEDS=y
++CONFIG_INPUT_TABLET=y
++CONFIG_TABLET_USB_ACECAD=m
++CONFIG_TABLET_USB_AIPTEK=m
++CONFIG_TABLET_USB_GTCO=m
++CONFIG_TABLET_USB_KBTAB=m
++CONFIG_TABLET_USB_WACOM=m
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_ADS7846=m
++CONFIG_TOUCHSCREEN_FUJITSU=m
++CONFIG_TOUCHSCREEN_GUNZE=m
++CONFIG_TOUCHSCREEN_ELO=m
++CONFIG_TOUCHSCREEN_MTOUCH=m
++CONFIG_TOUCHSCREEN_INEXIO=m
++CONFIG_TOUCHSCREEN_MK712=m
++# CONFIG_TOUCHSCREEN_HTCPEN is not set
++CONFIG_TOUCHSCREEN_PENMOUNT=m
++CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
++CONFIG_TOUCHSCREEN_TOUCHWIN=m
++CONFIG_TOUCHSCREEN_UCB1400=m
++CONFIG_TOUCHSCREEN_WM97XX=m
++CONFIG_TOUCHSCREEN_WM9705=y
++CONFIG_TOUCHSCREEN_WM9712=y
++CONFIG_TOUCHSCREEN_WM9713=y
++CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
++CONFIG_TOUCHSCREEN_USB_EGALAX=y
++CONFIG_TOUCHSCREEN_USB_PANJIT=y
++CONFIG_TOUCHSCREEN_USB_3M=y
++CONFIG_TOUCHSCREEN_USB_ITM=y
++CONFIG_TOUCHSCREEN_USB_ETURBO=y
++CONFIG_TOUCHSCREEN_USB_GUNZE=y
++CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
++CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
++CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
++CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
++CONFIG_TOUCHSCREEN_USB_GOTOP=y
++CONFIG_TOUCHSCREEN_TOUCHIT213=m
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++CONFIG_SERIO_I8042=y
++CONFIG_SERIO_SERPORT=m
++CONFIG_SERIO_PARKBD=m
++CONFIG_SERIO_PCIPS2=y
++CONFIG_SERIO_LIBPS2=y
++CONFIG_SERIO_RAW=m
++CONFIG_GAMEPORT=m
++# CONFIG_GAMEPORT_NS558 is not set
++# CONFIG_GAMEPORT_L4 is not set
++CONFIG_GAMEPORT_EMU10K1=m
++CONFIG_GAMEPORT_FM801=m
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++# CONFIG_DEVKMEM is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++CONFIG_NOZOMI=m
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=m
++CONFIG_SERIAL_8250_PCI=m
++CONFIG_SERIAL_8250_NR_UARTS=16
++CONFIG_SERIAL_8250_RUNTIME_UARTS=4
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_MANY_PORTS=y
++CONFIG_SERIAL_8250_FOURPORT=m
++# CONFIG_SERIAL_8250_ACCENT is not set
++# CONFIG_SERIAL_8250_BOCA is not set
++# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
++# CONFIG_SERIAL_8250_HUB6 is not set
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++# CONFIG_SERIAL_8250_DETECT_IRQ is not set
++CONFIG_SERIAL_8250_RSA=y
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_CORE=m
++CONFIG_SERIAL_JSM=m
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++CONFIG_PRINTER=m
++# CONFIG_LP_CONSOLE is not set
++CONFIG_PPDEV=m
++CONFIG_IPMI_HANDLER=m
++# CONFIG_IPMI_PANIC_EVENT is not set
++# CONFIG_IPMI_DEVICE_INTERFACE is not set
++CONFIG_IPMI_SI=m
++CONFIG_IPMI_WATCHDOG=m
++CONFIG_IPMI_POWEROFF=m
++CONFIG_HW_RANDOM=m
++# CONFIG_DTLK is not set
++CONFIG_R3964=m
++CONFIG_APPLICOM=m
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_DEVPORT=y
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++CONFIG_I2C_HELPER_AUTO=y
++CONFIG_I2C_ALGOBIT=m
++CONFIG_I2C_ALGOPCA=m
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# PC SMBus host controller drivers
++#
++# CONFIG_I2C_ALI1535 is not set
++# CONFIG_I2C_ALI1563 is not set
++# CONFIG_I2C_ALI15X3 is not set
++# CONFIG_I2C_AMD756 is not set
++# CONFIG_I2C_AMD8111 is not set
++# CONFIG_I2C_I801 is not set
++CONFIG_I2C_ISCH=m
++CONFIG_I2C_PIIX4=m
++# CONFIG_I2C_NFORCE2 is not set
++# CONFIG_I2C_SIS5595 is not set
++# CONFIG_I2C_SIS630 is not set
++# CONFIG_I2C_SIS96X is not set
++# CONFIG_I2C_VIA is not set
++# CONFIG_I2C_VIAPRO is not set
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++# CONFIG_I2C_OCORES is not set
++CONFIG_I2C_SIMTEC=m
++
++#
++# External I2C/SMBus adapter drivers
++#
++CONFIG_I2C_PARPORT=m
++CONFIG_I2C_PARPORT_LIGHT=m
++CONFIG_I2C_TAOS_EVM=m
++CONFIG_I2C_TINY_USB=m
++
++#
++# Graphics adapter I2C/DDC channel drivers
++#
++# CONFIG_I2C_VOODOO3 is not set
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_ELEKTOR is not set
++# CONFIG_I2C_PCA_ISA is not set
++CONFIG_I2C_PCA_PLATFORM=m
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++CONFIG_DS1682=m
++CONFIG_AT24=m
++CONFIG_SENSORS_EEPROM=m
++CONFIG_SENSORS_PCF8574=m
++CONFIG_PCF8575=m
++CONFIG_SENSORS_PCA9539=m
++CONFIG_SENSORS_PCF8591=m
++CONFIG_SENSORS_MAX6875=m
++CONFIG_SENSORS_TSL2550=m
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_BITBANG=m
++CONFIG_SPI_BUTTERFLY=m
++CONFIG_SPI_LM70_LLP=m
++
++#
++# SPI Protocol Masters
++#
++CONFIG_SPI_AT25=m
++# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_TLE62X0=m
++CONFIG_W1=m
++CONFIG_W1_CON=y
++
++#
++# 1-wire Bus Masters
++#
++CONFIG_W1_MASTER_MATROX=m
++CONFIG_W1_MASTER_DS2490=m
++CONFIG_W1_MASTER_DS2482=m
++
++#
++# 1-wire Slaves
++#
++CONFIG_W1_SLAVE_THERM=m
++CONFIG_W1_SLAVE_SMEM=m
++CONFIG_W1_SLAVE_DS2433=m
++# CONFIG_W1_SLAVE_DS2433_CRC is not set
++CONFIG_W1_SLAVE_DS2760=m
++CONFIG_POWER_SUPPLY=m
++# CONFIG_POWER_SUPPLY_DEBUG is not set
++# CONFIG_PDA_POWER is not set
++# CONFIG_BATTERY_DS2760 is not set
++CONFIG_HWMON=m
++CONFIG_HWMON_VID=m
++CONFIG_SENSORS_AD7414=m
++CONFIG_SENSORS_AD7418=m
++CONFIG_SENSORS_ADCXX=m
++CONFIG_SENSORS_ADM1021=m
++CONFIG_SENSORS_ADM1025=m
++CONFIG_SENSORS_ADM1026=m
++CONFIG_SENSORS_ADM1029=m
++CONFIG_SENSORS_ADM1031=m
++CONFIG_SENSORS_ADM9240=m
++CONFIG_SENSORS_ADT7470=m
++# CONFIG_SENSORS_ADT7473 is not set
++# CONFIG_SENSORS_ATXP1 is not set
++CONFIG_SENSORS_DS1621=m
++CONFIG_SENSORS_I5K_AMB=m
++# CONFIG_SENSORS_F71805F is not set
++CONFIG_SENSORS_F71882FG=m
++CONFIG_SENSORS_F75375S=m
++# CONFIG_SENSORS_GL518SM is not set
++# CONFIG_SENSORS_GL520SM is not set
++CONFIG_SENSORS_IBMAEM=m
++CONFIG_SENSORS_IBMPEX=m
++# CONFIG_SENSORS_IT87 is not set
++CONFIG_SENSORS_LM63=m
++CONFIG_SENSORS_LM70=m
++CONFIG_SENSORS_LM75=m
++CONFIG_SENSORS_LM77=m
++CONFIG_SENSORS_LM78=m
++CONFIG_SENSORS_LM80=m
++CONFIG_SENSORS_LM83=m
++CONFIG_SENSORS_LM85=m
++CONFIG_SENSORS_LM87=m
++CONFIG_SENSORS_LM90=m
++CONFIG_SENSORS_LM92=m
++CONFIG_SENSORS_LM93=m
++CONFIG_SENSORS_MAX1619=m
++CONFIG_SENSORS_MAX6650=m
++# CONFIG_SENSORS_PC87360 is not set
++# CONFIG_SENSORS_PC87427 is not set
++# CONFIG_SENSORS_SIS5595 is not set
++CONFIG_SENSORS_DME1737=m
++# CONFIG_SENSORS_SMSC47M1 is not set
++# CONFIG_SENSORS_SMSC47M192 is not set
++# CONFIG_SENSORS_SMSC47B397 is not set
++CONFIG_SENSORS_ADS7828=m
++CONFIG_SENSORS_THMC50=m
++# CONFIG_SENSORS_VIA686A is not set
++# CONFIG_SENSORS_VT1211 is not set
++# CONFIG_SENSORS_VT8231 is not set
++# CONFIG_SENSORS_W83781D is not set
++# CONFIG_SENSORS_W83791D is not set
++# CONFIG_SENSORS_W83792D is not set
++# CONFIG_SENSORS_W83793 is not set
++# CONFIG_SENSORS_W83L785TS is not set
++CONFIG_SENSORS_W83L786NG=m
++# CONFIG_SENSORS_W83627HF is not set
++# CONFIG_SENSORS_W83627EHF is not set
++# CONFIG_HWMON_DEBUG_CHIP is not set
++CONFIG_THERMAL=m
++# CONFIG_THERMAL_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++CONFIG_SOFT_WATCHDOG=m
++# CONFIG_ALIM7101_WDT is not set
++
++#
++# ISA-based Watchdog Cards
++#
++# CONFIG_PCWATCHDOG is not set
++# CONFIG_MIXCOMWD is not set
++# CONFIG_WDT is not set
++
++#
++# PCI-based Watchdog Cards
++#
++CONFIG_PCIPCWATCHDOG=m
++CONFIG_WDTPCI=m
++# CONFIG_WDT_501_PCI is not set
++
++#
++# USB-based Watchdog Cards
++#
++CONFIG_USBPCWATCHDOG=m
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++CONFIG_SSB=m
++CONFIG_SSB_SPROM=y
++CONFIG_SSB_PCIHOST_POSSIBLE=y
++CONFIG_SSB_PCIHOST=y
++CONFIG_SSB_B43_PCI_BRIDGE=y
++# CONFIG_SSB_SILENT is not set
++# CONFIG_SSB_DEBUG is not set
++CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
++CONFIG_SSB_DRIVER_PCICORE=y
++# CONFIG_SSB_DRIVER_MIPS is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++CONFIG_HTC_PASIC3=m
++# CONFIG_MFD_TMIO is not set
++
++#
++# Multimedia devices
++#
++
++#
++# Multimedia core support
++#
++CONFIG_VIDEO_DEV=m
++CONFIG_VIDEO_V4L2_COMMON=m
++CONFIG_VIDEO_ALLOW_V4L1=y
++CONFIG_VIDEO_V4L1_COMPAT=y
++CONFIG_DVB_CORE=m
++CONFIG_VIDEO_MEDIA=m
++
++#
++# Multimedia drivers
++#
++CONFIG_VIDEO_SAA7146=m
++CONFIG_VIDEO_SAA7146_VV=m
++CONFIG_MEDIA_ATTACH=y
++CONFIG_MEDIA_TUNER=m
++# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
++CONFIG_MEDIA_TUNER_SIMPLE=m
++CONFIG_MEDIA_TUNER_TDA8290=m
++CONFIG_MEDIA_TUNER_TDA827X=m
++CONFIG_MEDIA_TUNER_TDA18271=m
++CONFIG_MEDIA_TUNER_TDA9887=m
++CONFIG_MEDIA_TUNER_TEA5761=m
++CONFIG_MEDIA_TUNER_TEA5767=m
++CONFIG_MEDIA_TUNER_MT20XX=m
++CONFIG_MEDIA_TUNER_MT2060=m
++CONFIG_MEDIA_TUNER_MT2266=m
++CONFIG_MEDIA_TUNER_QT1010=m
++CONFIG_MEDIA_TUNER_XC2028=m
++CONFIG_MEDIA_TUNER_XC5000=m
++CONFIG_MEDIA_TUNER_MXL5005S=m
++CONFIG_VIDEO_V4L2=m
++CONFIG_VIDEO_V4L1=m
++CONFIG_VIDEOBUF_GEN=m
++CONFIG_VIDEOBUF_DMA_SG=m
++CONFIG_VIDEOBUF_VMALLOC=m
++CONFIG_VIDEOBUF_DMA_CONTIG=m
++CONFIG_VIDEO_BTCX=m
++CONFIG_VIDEO_IR=m
++CONFIG_VIDEO_TVEEPROM=m
++CONFIG_VIDEO_TUNER=m
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
++CONFIG_VIDEO_IR_I2C=m
++CONFIG_VIDEO_TVAUDIO=m
++CONFIG_VIDEO_TDA7432=m
++CONFIG_VIDEO_TDA9840=m
++CONFIG_VIDEO_TDA9875=m
++CONFIG_VIDEO_TEA6415C=m
++CONFIG_VIDEO_TEA6420=m
++CONFIG_VIDEO_MSP3400=m
++CONFIG_VIDEO_CS53L32A=m
++CONFIG_VIDEO_M52790=m
++CONFIG_VIDEO_WM8775=m
++CONFIG_VIDEO_WM8739=m
++CONFIG_VIDEO_VP27SMPX=m
++CONFIG_VIDEO_BT819=m
++CONFIG_VIDEO_BT856=m
++CONFIG_VIDEO_KS0127=m
++CONFIG_VIDEO_OV7670=m
++CONFIG_VIDEO_SAA7110=m
++CONFIG_VIDEO_SAA7111=m
++CONFIG_VIDEO_SAA7114=m
++CONFIG_VIDEO_SAA711X=m
++CONFIG_VIDEO_SAA717X=m
++CONFIG_VIDEO_TVP5150=m
++CONFIG_VIDEO_VPX3220=m
++CONFIG_VIDEO_CX25840=m
++CONFIG_VIDEO_CX2341X=m
++CONFIG_VIDEO_SAA7127=m
++CONFIG_VIDEO_SAA7185=m
++CONFIG_VIDEO_ADV7170=m
++CONFIG_VIDEO_ADV7175=m
++CONFIG_VIDEO_UPD64031A=m
++CONFIG_VIDEO_UPD64083=m
++CONFIG_VIDEO_VIVI=m
++CONFIG_VIDEO_BT848=m
++# CONFIG_VIDEO_BT848_DVB is not set
++CONFIG_VIDEO_SAA6588=m
++# CONFIG_VIDEO_PMS is not set
++CONFIG_VIDEO_BWQCAM=m
++CONFIG_VIDEO_CQCAM=m
++CONFIG_VIDEO_W9966=m
++CONFIG_VIDEO_CPIA=m
++CONFIG_VIDEO_CPIA_PP=m
++CONFIG_VIDEO_CPIA_USB=m
++CONFIG_VIDEO_CPIA2=m
++# CONFIG_VIDEO_SAA5246A is not set
++# CONFIG_VIDEO_SAA5249 is not set
++CONFIG_TUNER_3036=m
++CONFIG_VIDEO_STRADIS=m
++CONFIG_VIDEO_ZORAN=m
++CONFIG_VIDEO_ZORAN_DC30=m
++CONFIG_VIDEO_ZORAN_ZR36060=m
++CONFIG_VIDEO_ZORAN_BUZ=m
++CONFIG_VIDEO_ZORAN_DC10=m
++CONFIG_VIDEO_ZORAN_LML33=m
++CONFIG_VIDEO_ZORAN_LML33R10=m
++CONFIG_VIDEO_ZORAN_AVS6EYES=m
++CONFIG_VIDEO_SAA7134=m
++CONFIG_VIDEO_SAA7134_ALSA=m
++# CONFIG_VIDEO_SAA7134_DVB is not set
++CONFIG_VIDEO_MXB=m
++CONFIG_VIDEO_DPC=m
++CONFIG_VIDEO_HEXIUM_ORION=m
++CONFIG_VIDEO_HEXIUM_GEMINI=m
++CONFIG_VIDEO_CX88=m
++CONFIG_VIDEO_CX88_ALSA=m
++CONFIG_VIDEO_CX88_BLACKBIRD=m
++# CONFIG_VIDEO_CX88_DVB is not set
++# CONFIG_VIDEO_CX23885 is not set
++# CONFIG_VIDEO_AU0828 is not set
++CONFIG_VIDEO_IVTV=m
++CONFIG_VIDEO_FB_IVTV=m
++# CONFIG_VIDEO_CX18 is not set
++CONFIG_VIDEO_CAFE_CCIC=m
++CONFIG_V4L_USB_DRIVERS=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
++CONFIG_USB_GSPCA=m
++CONFIG_VIDEO_PVRUSB2=m
++CONFIG_VIDEO_PVRUSB2_SYSFS=y
++CONFIG_VIDEO_PVRUSB2_DVB=y
++# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
++CONFIG_VIDEO_EM28XX=m
++CONFIG_VIDEO_EM28XX_ALSA=m
++# CONFIG_VIDEO_EM28XX_DVB is not set
++CONFIG_VIDEO_USBVISION=m
++CONFIG_VIDEO_USBVIDEO=m
++CONFIG_USB_VICAM=m
++CONFIG_USB_IBMCAM=m
++CONFIG_USB_KONICAWC=m
++# CONFIG_USB_QUICKCAM_MESSENGER is not set
++CONFIG_USB_ET61X251=m
++CONFIG_VIDEO_OVCAMCHIP=m
++CONFIG_USB_W9968CF=m
++# CONFIG_USB_OV511 is not set
++CONFIG_USB_SE401=m
++CONFIG_USB_SN9C102=m
++# CONFIG_USB_STV680 is not set
++CONFIG_USB_ZC0301=m
++CONFIG_USB_PWC=m
++# CONFIG_USB_PWC_DEBUG is not set
++CONFIG_USB_ZR364XX=m
++CONFIG_USB_STKWEBCAM=m
++CONFIG_USB_S2255=m
++CONFIG_SOC_CAMERA=m
++CONFIG_SOC_CAMERA_MT9M001=m
++CONFIG_SOC_CAMERA_MT9V022=m
++CONFIG_SOC_CAMERA_PLATFORM=m
++CONFIG_VIDEO_SH_MOBILE_CEU=m
++CONFIG_RADIO_ADAPTERS=y
++# CONFIG_RADIO_CADET is not set
++# CONFIG_RADIO_RTRACK is not set
++# CONFIG_RADIO_RTRACK2 is not set
++# CONFIG_RADIO_AZTECH is not set
++# CONFIG_RADIO_GEMTEK is not set
++# CONFIG_RADIO_GEMTEK_PCI is not set
++# CONFIG_RADIO_MAXIRADIO is not set
++# CONFIG_RADIO_MAESTRO is not set
++# CONFIG_RADIO_SF16FMI is not set
++# CONFIG_RADIO_SF16FMR2 is not set
++# CONFIG_RADIO_TERRATEC is not set
++# CONFIG_RADIO_TRUST is not set
++# CONFIG_RADIO_TYPHOON is not set
++# CONFIG_RADIO_ZOLTRIX is not set
++# CONFIG_USB_DSBR is not set
++CONFIG_USB_SI470X=m
++CONFIG_DVB_CAPTURE_DRIVERS=y
++
++#
++# Supported SAA7146 based PCI Adapters
++#
++# CONFIG_TTPCI_EEPROM is not set
++# CONFIG_DVB_AV7110 is not set
++# CONFIG_DVB_BUDGET_CORE is not set
++
++#
++# Supported USB Adapters
++#
++CONFIG_DVB_USB=m
++# CONFIG_DVB_USB_DEBUG is not set
++CONFIG_DVB_USB_A800=m
++CONFIG_DVB_USB_DIBUSB_MB=m
++CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
++CONFIG_DVB_USB_DIBUSB_MC=m
++CONFIG_DVB_USB_DIB0700=m
++CONFIG_DVB_USB_UMT_010=m
++CONFIG_DVB_USB_CXUSB=m
++CONFIG_DVB_USB_M920X=m
++CONFIG_DVB_USB_GL861=m
++CONFIG_DVB_USB_AU6610=m
++CONFIG_DVB_USB_DIGITV=m
++CONFIG_DVB_USB_VP7045=m
++CONFIG_DVB_USB_VP702X=m
++CONFIG_DVB_USB_GP8PSK=m
++CONFIG_DVB_USB_NOVA_T_USB2=m
++CONFIG_DVB_USB_TTUSB2=m
++CONFIG_DVB_USB_DTT200U=m
++CONFIG_DVB_USB_OPERA1=m
++CONFIG_DVB_USB_AF9005=m
++# CONFIG_DVB_USB_AF9005_REMOTE is not set
++CONFIG_DVB_USB_DW2102=m
++CONFIG_DVB_USB_ANYSEE=m
++CONFIG_DVB_TTUSB_BUDGET=m
++CONFIG_DVB_TTUSB_DEC=m
++CONFIG_DVB_CINERGYT2=m
++# CONFIG_DVB_CINERGYT2_TUNING is not set
++CONFIG_DVB_SIANO_SMS1XXX=m
++CONFIG_DVB_SIANO_SMS1XXX_SMS_IDS=y
++
++#
++# Supported FlexCopII (B2C2) Adapters
++#
++# CONFIG_DVB_B2C2_FLEXCOP is not set
++
++#
++# Supported BT878 Adapters
++#
++# CONFIG_DVB_BT8XX is not set
++
++#
++# Supported Pluto2 Adapters
++#
++# CONFIG_DVB_PLUTO2 is not set
++
++#
++# Supported DVB Frontends
++#
++
++#
++# Customise DVB Frontends
++#
++# CONFIG_DVB_FE_CUSTOMISE is not set
++
++#
++# DVB-S (satellite) frontends
++#
++CONFIG_DVB_CX24110=m
++CONFIG_DVB_CX24123=m
++CONFIG_DVB_MT312=m
++CONFIG_DVB_S5H1420=m
++CONFIG_DVB_STV0299=m
++CONFIG_DVB_TDA8083=m
++CONFIG_DVB_TDA10086=m
++CONFIG_DVB_VES1X93=m
++CONFIG_DVB_TUNER_ITD1000=m
++CONFIG_DVB_TDA826X=m
++CONFIG_DVB_TUA6100=m
++
++#
++# DVB-T (terrestrial) frontends
++#
++CONFIG_DVB_SP8870=m
++CONFIG_DVB_SP887X=m
++CONFIG_DVB_CX22700=m
++CONFIG_DVB_CX22702=m
++CONFIG_DVB_DRX397XD=m
++CONFIG_DVB_L64781=m
++CONFIG_DVB_TDA1004X=m
++CONFIG_DVB_NXT6000=m
++CONFIG_DVB_MT352=m
++CONFIG_DVB_ZL10353=m
++CONFIG_DVB_DIB3000MB=m
++CONFIG_DVB_DIB3000MC=m
++CONFIG_DVB_DIB7000M=m
++CONFIG_DVB_DIB7000P=m
++CONFIG_DVB_TDA10048=m
++
++#
++# DVB-C (cable) frontends
++#
++CONFIG_DVB_VES1820=m
++CONFIG_DVB_TDA10021=m
++CONFIG_DVB_TDA10023=m
++CONFIG_DVB_STV0297=m
++
++#
++# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
++#
++CONFIG_DVB_NXT200X=m
++CONFIG_DVB_OR51211=m
++CONFIG_DVB_OR51132=m
++CONFIG_DVB_BCM3510=m
++CONFIG_DVB_LGDT330X=m
++CONFIG_DVB_S5H1409=m
++CONFIG_DVB_AU8522=m
++CONFIG_DVB_S5H1411=m
++
++#
++# Digital terrestrial only tuners/PLL
++#
++CONFIG_DVB_PLL=m
++CONFIG_DVB_TUNER_DIB0070=m
++
++#
++# SEC control devices for DVB-S
++#
++CONFIG_DVB_LNBP21=m
++CONFIG_DVB_ISL6405=m
++CONFIG_DVB_ISL6421=m
++CONFIG_DAB=y
++CONFIG_USB_DABUSB=m
++
++#
++# Graphics support
++#
++# CONFIG_DRM is not set
++# CONFIG_VGASTATE is not set
++CONFIG_VIDEO_OUTPUT_CONTROL=m
++CONFIG_FB=y
++CONFIG_FIRMWARE_EDID=y
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++CONFIG_FB_MODE_HELPERS=y
++CONFIG_FB_TILEBLITTING=y
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_CIRRUS is not set
++# CONFIG_FB_PM2 is not set
++# CONFIG_FB_CYBER2000 is not set
++# CONFIG_FB_ASILIANT is not set
++# CONFIG_FB_IMSTT is not set
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_NVIDIA is not set
++# CONFIG_FB_RIVA is not set
++# CONFIG_FB_MATROX is not set
++# CONFIG_FB_RADEON is not set
++# CONFIG_FB_ATY128 is not set
++# CONFIG_FB_ATY is not set
++# CONFIG_FB_S3 is not set
++# CONFIG_FB_SAVAGE is not set
++CONFIG_FB_SIS=y
++CONFIG_FB_SIS_300=y
++CONFIG_FB_SIS_315=y
++# CONFIG_FB_NEOMAGIC is not set
++# CONFIG_FB_KYRO is not set
++# CONFIG_FB_3DFX is not set
++# CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_VT8623 is not set
++# CONFIG_FB_TRIDENT is not set
++# CONFIG_FB_ARK is not set
++# CONFIG_FB_PM3 is not set
++# CONFIG_FB_CARMINE is not set
++CONFIG_FB_SILICONMOTION=y
++CONFIG_FB_SM7XX=y
++# CONFIG_FB_SM7XX_ACCEL is not set
++# CONFIG_FB_SM7XX_DUALHEAD is not set
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=m
++# CONFIG_LCD_LTV350QV is not set
++# CONFIG_LCD_ILI9320 is not set
++# CONFIG_LCD_VGG2432A4 is not set
++# CONFIG_LCD_PLATFORM is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++CONFIG_BACKLIGHT_CORGI=m
++
++#
++# Display device support
++#
++CONFIG_DISPLAY_SUPPORT=m
++
++#
++# Display hardware drivers
++#
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++# CONFIG_MDA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
++CONFIG_FONTS=y
++CONFIG_FONT_8x8=y
++CONFIG_FONT_8x16=y
++CONFIG_FONT_6x11=y
++CONFIG_FONT_7x14=y
++CONFIG_FONT_PEARL_8x8=y
++CONFIG_FONT_ACORN_8x8=y
++CONFIG_FONT_MINI_4x6=y
++CONFIG_FONT_SUN8x16=y
++CONFIG_FONT_SUN12x22=y
++CONFIG_FONT_10x18=y
++CONFIG_LOGO=y
++# CONFIG_LOGO_LINUX_MONO is not set
++# CONFIG_LOGO_LINUX_VGA16 is not set
++# CONFIG_LOGO_LINUX_CLUT224 is not set
++CONFIG_LOGO_LIBRE_CLUT224=y
++CONFIG_SOUND=m
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++CONFIG_SND_HWDEP=m
++CONFIG_SND_RAWMIDI=m
++CONFIG_SND_SEQUENCER=m
++CONFIG_SND_SEQ_DUMMY=m
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_SEQUENCER_OSS is not set
++CONFIG_SND_DYNAMIC_MINORS=y
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++CONFIG_SND_VMASTER=y
++CONFIG_SND_MPU401_UART=m
++CONFIG_SND_OPL3_LIB=m
++CONFIG_SND_AC97_CODEC=m
++CONFIG_SND_DRIVERS=y
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_VIRMIDI is not set
++# CONFIG_SND_MTPAV is not set
++CONFIG_SND_MTS64=m
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++CONFIG_SND_PORTMAN2X4=m
++CONFIG_SND_AC97_POWER_SAVE=y
++CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0
++CONFIG_SND_PCI=y
++CONFIG_SND_AD1889=m
++CONFIG_SND_ALS300=m
++# CONFIG_SND_ALI5451 is not set
++# CONFIG_SND_ATIIXP is not set
++# CONFIG_SND_ATIIXP_MODEM is not set
++# CONFIG_SND_AU8810 is not set
++# CONFIG_SND_AU8820 is not set
++# CONFIG_SND_AU8830 is not set
++# CONFIG_SND_AW2 is not set
++# CONFIG_SND_AZT3328 is not set
++# CONFIG_SND_BT87X is not set
++# CONFIG_SND_CA0106 is not set
++# CONFIG_SND_CMIPCI is not set
++CONFIG_SND_OXYGEN_LIB=m
++CONFIG_SND_OXYGEN=m
++# CONFIG_SND_CS4281 is not set
++# CONFIG_SND_CS46XX is not set
++CONFIG_SND_CS5535AUDIO=m
++CONFIG_SND_DARLA20=m
++CONFIG_SND_GINA20=m
++CONFIG_SND_LAYLA20=m
++CONFIG_SND_DARLA24=m
++CONFIG_SND_GINA24=m
++CONFIG_SND_LAYLA24=m
++CONFIG_SND_MONA=m
++CONFIG_SND_MIA=m
++CONFIG_SND_ECHO3G=m
++CONFIG_SND_INDIGO=m
++CONFIG_SND_INDIGOIO=m
++CONFIG_SND_INDIGODJ=m
++# CONFIG_SND_EMU10K1 is not set
++# CONFIG_SND_EMU10K1X is not set
++# CONFIG_SND_ENS1370 is not set
++# CONFIG_SND_ENS1371 is not set
++# CONFIG_SND_ES1938 is not set
++# CONFIG_SND_ES1968 is not set
++# CONFIG_SND_FM801 is not set
++# CONFIG_SND_HDA_INTEL is not set
++# CONFIG_SND_HDSP is not set
++CONFIG_SND_HDSPM=m
++CONFIG_SND_HIFIER=m
++# CONFIG_SND_ICE1712 is not set
++# CONFIG_SND_ICE1724 is not set
++# CONFIG_SND_INTEL8X0 is not set
++# CONFIG_SND_INTEL8X0M is not set
++# CONFIG_SND_KORG1212 is not set
++# CONFIG_SND_MAESTRO3 is not set
++# CONFIG_SND_MIXART is not set
++# CONFIG_SND_NM256 is not set
++CONFIG_SND_PCXHR=m
++CONFIG_SND_RIPTIDE=m
++# CONFIG_SND_RME32 is not set
++# CONFIG_SND_RME96 is not set
++# CONFIG_SND_RME9652 is not set
++# CONFIG_SND_SONICVIBES is not set
++# CONFIG_SND_TRIDENT is not set
++# CONFIG_SND_VIA82XX is not set
++# CONFIG_SND_VIA82XX_MODEM is not set
++CONFIG_SND_VIRTUOSO=m
++# CONFIG_SND_VX222 is not set
++# CONFIG_SND_YMFPCI is not set
++CONFIG_SND_SPI=y
++CONFIG_SND_MIPS=y
++CONFIG_SND_USB=y
++CONFIG_SND_USB_AUDIO=m
++CONFIG_SND_USB_CAIAQ=m
++CONFIG_SND_USB_CAIAQ_INPUT=y
++# CONFIG_SND_SOC is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=m
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=m
++# CONFIG_HID_DEBUG is not set
++CONFIG_HIDRAW=y
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=m
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++CONFIG_USB_HIDDEV=y
++
++#
++# USB HID Boot Protocol drivers
++#
++CONFIG_USB_KBD=m
++CONFIG_USB_MOUSE=m
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=m
++# CONFIG_USB_DEBUG is not set
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++# CONFIG_USB_DEVICE_CLASS is not set
++CONFIG_USB_DYNAMIC_MINORS=y
++# CONFIG_USB_SUSPEND is not set
++# CONFIG_USB_OTG is not set
++CONFIG_USB_OTG_WHITELIST=y
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++CONFIG_USB_MON=y
++
++#
++# USB Host Controller Drivers
++#
++CONFIG_USB_C67X00_HCD=m
++CONFIG_USB_EHCI_HCD=m
++CONFIG_USB_EHCI_ROOT_HUB_TT=y
++# CONFIG_USB_EHCI_TT_NEWSCHED is not set
++CONFIG_USB_ISP116X_HCD=m
++# CONFIG_USB_ISP1760_HCD is not set
++CONFIG_USB_OHCI_HCD=m
++# CONFIG_USB_OHCI_HCD_SSB is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++CONFIG_USB_UHCI_HCD=m
++CONFIG_USB_U132_HCD=m
++CONFIG_USB_SL811_HCD=m
++CONFIG_USB_R8A66597_HCD=m
++
++#
++# Enable Host or Gadget support to see Inventra options
++#
++
++#
++# USB Device Class drivers
++#
++CONFIG_USB_ACM=m
++CONFIG_USB_PRINTER=m
++CONFIG_USB_WDM=m
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=m
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++CONFIG_USB_STORAGE_ISD200=y
++CONFIG_USB_STORAGE_DPCM=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++CONFIG_USB_STORAGE_ONETOUCH=y
++CONFIG_USB_STORAGE_KARMA=y
++CONFIG_USB_STORAGE_CYPRESS_ATACB=y
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++CONFIG_USB_MDC800=m
++CONFIG_USB_MICROTEK=m
++
++#
++# USB port drivers
++#
++CONFIG_USB_USS720=m
++CONFIG_USB_SERIAL=m
++CONFIG_USB_EZUSB=y
++CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++CONFIG_USB_SERIAL_CH341=m
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP2101=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_FUNSOFT=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_IUU=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_MOTOROLA=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++CONFIG_USB_SERIAL_OTI6858=m
++CONFIG_USB_SERIAL_SPCP8X5=m
++CONFIG_USB_SERIAL_HP4X=m
++CONFIG_USB_SERIAL_SAFE=m
++# CONFIG_USB_SERIAL_SAFE_PADDED is not set
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++CONFIG_USB_SERIAL_DEBUG=m
++
++#
++# USB Miscellaneous drivers
++#
++CONFIG_USB_EMI62=m
++CONFIG_USB_EMI26=m
++CONFIG_USB_ADUTUX=m
++CONFIG_USB_RIO500=m
++CONFIG_USB_LEGOTOWER=m
++CONFIG_USB_LCD=m
++# CONFIG_USB_BERRY_CHARGE is not set
++CONFIG_USB_LED=m
++CONFIG_USB_CYPRESS_CY7C63=m
++CONFIG_USB_CYTHERM=m
++CONFIG_USB_PHIDGET=m
++CONFIG_USB_PHIDGETKIT=m
++CONFIG_USB_PHIDGETMOTORCONTROL=m
++CONFIG_USB_PHIDGETSERVO=m
++CONFIG_USB_IDMOUSE=m
++CONFIG_USB_FTDI_ELAN=m
++CONFIG_USB_APPLEDISPLAY=m
++CONFIG_USB_SISUSBVGA=m
++CONFIG_USB_SISUSBVGA_CON=y
++CONFIG_USB_LD=m
++CONFIG_USB_TRANCEVIBRATOR=m
++CONFIG_USB_IOWARRIOR=m
++CONFIG_USB_TEST=m
++CONFIG_USB_ISIGHTFW=m
++CONFIG_USB_ATM=m
++CONFIG_USB_SPEEDTOUCH=m
++CONFIG_USB_CXACRU=m
++CONFIG_USB_UEAGLEATM=m
++CONFIG_USB_XUSBATM=m
++# CONFIG_USB_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++CONFIG_SDIO_UART=m
++# CONFIG_MMC_TEST is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SDHCI=m
++CONFIG_MMC_SDHCI_PCI=m
++CONFIG_MMC_RICOH_MMC=m
++CONFIG_MMC_TIFM_SD=m
++CONFIG_MMC_SPI=m
++CONFIG_MEMSTICK=m
++# CONFIG_MEMSTICK_DEBUG is not set
++
++#
++# MemoryStick drivers
++#
++# CONFIG_MEMSTICK_UNSAFE_RESUME is not set
++CONFIG_MSPRO_BLOCK=m
++
++#
++# MemoryStick Host Controller Drivers
++#
++CONFIG_MEMSTICK_TIFM_MS=m
++CONFIG_MEMSTICK_JMICRON_38X=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
++
++#
++# LED drivers
++#
++CONFIG_LEDS_PCA9532=m
++CONFIG_LEDS_PCA955X=m
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
++CONFIG_ACCESSIBILITY=y
++CONFIG_INFINIBAND=m
++CONFIG_INFINIBAND_USER_MAD=m
++CONFIG_INFINIBAND_USER_ACCESS=m
++CONFIG_INFINIBAND_USER_MEM=y
++CONFIG_INFINIBAND_ADDR_TRANS=y
++CONFIG_INFINIBAND_MTHCA=m
++CONFIG_INFINIBAND_MTHCA_DEBUG=y
++# CONFIG_INFINIBAND_IPATH is not set
++CONFIG_INFINIBAND_AMSO1100=m
++# CONFIG_INFINIBAND_AMSO1100_DEBUG is not set
++CONFIG_INFINIBAND_CXGB3=m
++# CONFIG_INFINIBAND_CXGB3_DEBUG is not set
++CONFIG_MLX4_INFINIBAND=m
++CONFIG_INFINIBAND_NES=m
++# CONFIG_INFINIBAND_NES_DEBUG is not set
++CONFIG_INFINIBAND_IPOIB=m
++CONFIG_INFINIBAND_IPOIB_CM=y
++CONFIG_INFINIBAND_IPOIB_DEBUG=y
++# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set
++CONFIG_INFINIBAND_SRP=m
++CONFIG_INFINIBAND_ISER=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++CONFIG_RTC_DRV_DS1307=m
++CONFIG_RTC_DRV_DS1374=m
++CONFIG_RTC_DRV_DS1672=m
++CONFIG_RTC_DRV_MAX6900=m
++CONFIG_RTC_DRV_RS5C372=m
++CONFIG_RTC_DRV_ISL1208=m
++CONFIG_RTC_DRV_X1205=m
++CONFIG_RTC_DRV_PCF8563=m
++CONFIG_RTC_DRV_PCF8583=m
++CONFIG_RTC_DRV_M41T80=m
++# CONFIG_RTC_DRV_M41T80_WDT is not set
++CONFIG_RTC_DRV_S35390A=m
++CONFIG_RTC_DRV_FM3130=m
++
++#
++# SPI RTC drivers
++#
++CONFIG_RTC_DRV_M41T94=m
++CONFIG_RTC_DRV_DS1305=m
++CONFIG_RTC_DRV_MAX6902=m
++CONFIG_RTC_DRV_R9701=m
++CONFIG_RTC_DRV_RS5C348=m
++
++#
++# Platform RTC drivers
++#
++CONFIG_RTC_DRV_CMOS=y
++CONFIG_RTC_DRV_DS1511=m
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++CONFIG_RTC_DRV_STK17TA8=m
++CONFIG_RTC_DRV_M48T86=m
++CONFIG_RTC_DRV_M48T59=m
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++# CONFIG_DMADEVICES is not set
++# CONFIG_AUXDISPLAY is not set
++CONFIG_UIO=m
++CONFIG_UIO_CIF=m
++CONFIG_UIO_PDRV=m
++CONFIG_UIO_PDRV_GENIRQ=m
++# CONFIG_UIO_SMX is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=m
++CONFIG_EXT2_FS_XATTR=y
++CONFIG_EXT2_FS_POSIX_ACL=y
++CONFIG_EXT2_FS_SECURITY=y
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS_XATTR=y
++CONFIG_EXT3_FS_POSIX_ACL=y
++CONFIG_EXT3_FS_SECURITY=y
++CONFIG_EXT4DEV_FS=m
++CONFIG_EXT4DEV_FS_XATTR=y
++CONFIG_EXT4DEV_FS_POSIX_ACL=y
++CONFIG_EXT4DEV_FS_SECURITY=y
++CONFIG_JBD=y
++CONFIG_JBD_DEBUG=y
++CONFIG_JBD2=m
++# CONFIG_JBD2_DEBUG is not set
++CONFIG_FS_MBCACHE=y
++CONFIG_REISERFS_FS=m
++# CONFIG_REISERFS_CHECK is not set
++# CONFIG_REISERFS_PROC_INFO is not set
++CONFIG_REISERFS_FS_XATTR=y
++CONFIG_REISERFS_FS_POSIX_ACL=y
++CONFIG_REISERFS_FS_SECURITY=y
++CONFIG_JFS_FS=m
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++# CONFIG_JFS_DEBUG is not set
++# CONFIG_JFS_STATISTICS is not set
++CONFIG_FS_POSIX_ACL=y
++CONFIG_XFS_FS=m
++CONFIG_XFS_QUOTA=y
++CONFIG_XFS_POSIX_ACL=y
++CONFIG_XFS_RT=y
++# CONFIG_XFS_DEBUG is not set
++CONFIG_GFS2_FS=m
++CONFIG_GFS2_FS_LOCKING_DLM=m
++CONFIG_OCFS2_FS=m
++CONFIG_OCFS2_FS_O2CB=m
++CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m
++CONFIG_OCFS2_FS_STATS=y
++CONFIG_OCFS2_DEBUG_MASKLOG=y
++# CONFIG_OCFS2_DEBUG_FS is not set
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++CONFIG_QUOTA=y
++CONFIG_QUOTA_NETLINK_INTERFACE=y
++CONFIG_PRINT_QUOTA_WARNING=y
++CONFIG_QFMT_V1=m
++CONFIG_QFMT_V2=m
++CONFIG_QUOTACTL=y
++CONFIG_AUTOFS_FS=m
++CONFIG_AUTOFS4_FS=m
++CONFIG_FUSE_FS=m
++CONFIG_GENERIC_ACL=y
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++CONFIG_UDF_FS=m
++CONFIG_UDF_NLS=y
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
++CONFIG_NTFS_FS=m
++# CONFIG_NTFS_DEBUG is not set
++CONFIG_NTFS_RW=y
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++CONFIG_TMPFS_POSIX_ACL=y
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++CONFIG_ADFS_FS=m
++# CONFIG_ADFS_FS_RW is not set
++CONFIG_AFFS_FS=m
++CONFIG_ECRYPT_FS=m
++CONFIG_HFS_FS=m
++CONFIG_HFSPLUS_FS=m
++CONFIG_BEFS_FS=m
++# CONFIG_BEFS_DEBUG is not set
++CONFIG_BFS_FS=m
++CONFIG_EFS_FS=m
++CONFIG_JFFS2_FS=m
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++CONFIG_JFFS2_SUMMARY=y
++CONFIG_JFFS2_FS_XATTR=y
++CONFIG_JFFS2_FS_POSIX_ACL=y
++CONFIG_JFFS2_FS_SECURITY=y
++CONFIG_JFFS2_COMPRESSION_OPTIONS=y
++CONFIG_JFFS2_ZLIB=y
++CONFIG_JFFS2_LZO=y
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_JFFS2_CMODE_NONE is not set
++CONFIG_JFFS2_CMODE_PRIORITY=y
++# CONFIG_JFFS2_CMODE_SIZE is not set
++# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
++CONFIG_UBIFS_FS=m
++CONFIG_UBIFS_FS_XATTR=y
++CONFIG_UBIFS_FS_ADVANCED_COMPR=y
++CONFIG_UBIFS_FS_LZO=y
++CONFIG_UBIFS_FS_ZLIB=y
++# CONFIG_UBIFS_FS_DEBUG is not set
++CONFIG_CRAMFS=y
++CONFIG_VXFS_FS=m
++CONFIG_MINIX_FS=m
++CONFIG_OMFS_FS=m
++CONFIG_HPFS_FS=m
++CONFIG_QNX4FS_FS=m
++CONFIG_ROMFS_FS=m
++CONFIG_SYSV_FS=m
++CONFIG_UFS_FS=m
++# CONFIG_UFS_FS_WRITE is not set
++# CONFIG_UFS_DEBUG is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=m
++CONFIG_NFS_V3=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_NFSD=m
++CONFIG_NFSD_V2_ACL=y
++CONFIG_NFSD_V3=y
++CONFIG_NFSD_V3_ACL=y
++CONFIG_NFSD_V4=y
++CONFIG_LOCKD=m
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_ACL_SUPPORT=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=m
++CONFIG_SUNRPC_GSS=m
++CONFIG_SUNRPC_XPRT_RDMA=m
++CONFIG_RPCSEC_GSS_KRB5=m
++CONFIG_RPCSEC_GSS_SPKM3=m
++# CONFIG_SMB_FS is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++CONFIG_CIFS_WEAK_PW_HASH=y
++CONFIG_CIFS_UPCALL=y
++CONFIG_CIFS_XATTR=y
++CONFIG_CIFS_POSIX=y
++# CONFIG_CIFS_DEBUG2 is not set
++CONFIG_CIFS_EXPERIMENTAL=y
++CONFIG_CIFS_DFS_UPCALL=y
++CONFIG_NCP_FS=m
++CONFIG_NCPFS_PACKET_SIGNING=y
++CONFIG_NCPFS_IOCTL_LOCKING=y
++CONFIG_NCPFS_STRONG=y
++CONFIG_NCPFS_NFS_NS=y
++CONFIG_NCPFS_OS2_NS=y
++# CONFIG_NCPFS_SMALLDOS is not set
++CONFIG_NCPFS_NLS=y
++CONFIG_NCPFS_EXTRAS=y
++CONFIG_CODA_FS=m
++CONFIG_AFS_FS=m
++# CONFIG_AFS_DEBUG is not set
++CONFIG_9P_FS=m
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="utf-8"
++CONFIG_NLS_CODEPAGE_437=m
++CONFIG_NLS_CODEPAGE_737=m
++CONFIG_NLS_CODEPAGE_775=m
++CONFIG_NLS_CODEPAGE_850=m
++CONFIG_NLS_CODEPAGE_852=m
++CONFIG_NLS_CODEPAGE_855=m
++CONFIG_NLS_CODEPAGE_857=m
++CONFIG_NLS_CODEPAGE_860=m
++CONFIG_NLS_CODEPAGE_861=m
++CONFIG_NLS_CODEPAGE_862=m
++CONFIG_NLS_CODEPAGE_863=m
++CONFIG_NLS_CODEPAGE_864=m
++CONFIG_NLS_CODEPAGE_865=m
++CONFIG_NLS_CODEPAGE_866=m
++CONFIG_NLS_CODEPAGE_869=m
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++CONFIG_NLS_CODEPAGE_932=m
++CONFIG_NLS_CODEPAGE_949=m
++CONFIG_NLS_CODEPAGE_874=m
++CONFIG_NLS_ISO8859_8=m
++CONFIG_NLS_CODEPAGE_1250=m
++CONFIG_NLS_CODEPAGE_1251=m
++CONFIG_NLS_ASCII=m
++CONFIG_NLS_ISO8859_1=m
++CONFIG_NLS_ISO8859_2=m
++CONFIG_NLS_ISO8859_3=m
++CONFIG_NLS_ISO8859_4=m
++CONFIG_NLS_ISO8859_5=m
++CONFIG_NLS_ISO8859_6=m
++CONFIG_NLS_ISO8859_7=m
++CONFIG_NLS_ISO8859_9=m
++CONFIG_NLS_ISO8859_13=m
++CONFIG_NLS_ISO8859_14=m
++CONFIG_NLS_ISO8859_15=m
++CONFIG_NLS_KOI8_R=m
++CONFIG_NLS_KOI8_U=m
++CONFIG_NLS_UTF8=m
++CONFIG_DLM=m
++# CONFIG_DLM_DEBUG is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_PRINTK_TIME=y
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=2048
++CONFIG_MAGIC_SYSRQ=y
++CONFIG_UNUSED_SYMBOLS=y
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++CONFIG_TIMER_STATS=y
++# CONFIG_DEBUG_OBJECTS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
++# CONFIG_SLUB_STATS is not set
++CONFIG_DEBUG_PREEMPT=y
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_WRITECOUNT is not set
++CONFIG_DEBUG_MEMORY_INIT=y
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_BACKTRACE_SELF_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++# CONFIG_FIREWIRE_OHCI_REMOTE_DMA is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++# CONFIG_KGDB is not set
++CONFIG_CMDLINE=""
++# CONFIG_DEBUG_STACK_USAGE is not set
++# CONFIG_RUNTIME_DEBUG is not set
++
++#
++# Security options
++#
++CONFIG_KEYS=y
++CONFIG_KEYS_DEBUG_PROC_KEYS=y
++CONFIG_SECURITY=y
++CONFIG_SECURITY_NETWORK=y
++CONFIG_SECURITY_NETWORK_XFRM=y
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_SECURITY_SELINUX=y
++CONFIG_SECURITY_SELINUX_BOOTPARAM=y
++CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
++CONFIG_SECURITY_SELINUX_DISABLE=y
++CONFIG_SECURITY_SELINUX_DEVELOP=y
++CONFIG_SECURITY_SELINUX_AVC_STATS=y
++CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
++CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT=y
++# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
++# CONFIG_SECURITY_SMACK is not set
++CONFIG_XOR_BLOCKS=m
++CONFIG_ASYNC_CORE=m
++CONFIG_ASYNC_MEMCPY=m
++CONFIG_ASYNC_XOR=m
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_AEAD=m
++CONFIG_CRYPTO_BLKCIPHER=m
++CONFIG_CRYPTO_HASH=m
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_GF128MUL=m
++CONFIG_CRYPTO_NULL=m
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_AUTHENC=m
++CONFIG_CRYPTO_TEST=m
++
++#
++# Authenticated Encryption with Associated Data
++#
++CONFIG_CRYPTO_CCM=m
++CONFIG_CRYPTO_GCM=m
++CONFIG_CRYPTO_SEQIV=m
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=m
++CONFIG_CRYPTO_CTR=m
++CONFIG_CRYPTO_CTS=m
++CONFIG_CRYPTO_ECB=m
++CONFIG_CRYPTO_LRW=m
++CONFIG_CRYPTO_PCBC=m
++CONFIG_CRYPTO_XTS=m
++
++#
++# Hash modes
++#
++CONFIG_CRYPTO_HMAC=m
++CONFIG_CRYPTO_XCBC=m
++
++#
++# Digest
++#
++CONFIG_CRYPTO_CRC32C=m
++CONFIG_CRYPTO_MD4=m
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_MICHAEL_MIC=m
++CONFIG_CRYPTO_RMD128=m
++CONFIG_CRYPTO_RMD160=m
++CONFIG_CRYPTO_RMD256=m
++CONFIG_CRYPTO_RMD320=m
++CONFIG_CRYPTO_SHA1=m
++CONFIG_CRYPTO_SHA256=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_WP512=m
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=m
++CONFIG_CRYPTO_ANUBIS=m
++CONFIG_CRYPTO_ARC4=m
++CONFIG_CRYPTO_BLOWFISH=m
++CONFIG_CRYPTO_CAMELLIA=m
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_CAST6=m
++CONFIG_CRYPTO_DES=m
++CONFIG_CRYPTO_FCRYPT=m
++CONFIG_CRYPTO_KHAZAD=m
++CONFIG_CRYPTO_SALSA20=m
++CONFIG_CRYPTO_SEED=m
++CONFIG_CRYPTO_SERPENT=m
++CONFIG_CRYPTO_TEA=m
++CONFIG_CRYPTO_TWOFISH=m
++CONFIG_CRYPTO_TWOFISH_COMMON=m
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=m
++CONFIG_CRYPTO_LZO=m
++CONFIG_CRYPTO_HW=y
++CONFIG_CRYPTO_DEV_HIFN_795X=m
++CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_GENERIC_FIND_FIRST_BIT is not set
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=y
++CONFIG_CRC_T10DIF=y
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++CONFIG_CRC7=m
++CONFIG_LIBCRC32C=m
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=m
++CONFIG_LZO_COMPRESS=m
++CONFIG_LZO_DECOMPRESS=m
++CONFIG_GENERIC_ALLOCATOR=y
++CONFIG_REED_SOLOMON=m
++CONFIG_REED_SOLOMON_DEC16=y
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
++CONFIG_CHECK_SIGNATURE=y
diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/rtl8187B-build-in.patch b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/rtl8187B-build-in.patch
new file mode 100644
index 000000000..302cd2ea5
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/rtl8187B-build-in.patch
@@ -0,0 +1,269 @@
+Index: linux-2.6.27.43/drivers/net/wireless/Kconfig
+===================================================================
+--- linux-2.6.27.43.orig/drivers/net/wireless/Kconfig	2010-01-09 04:37:28.000000000 +0000
++++ linux-2.6.27.43/drivers/net/wireless/Kconfig	2010-01-09 04:42:09.000000000 +0000
+@@ -627,6 +627,13 @@
+ 
+ 	  Thanks to Realtek for their support!
+ 
++config RTL8187B
++	tristate "Realtek 8187B support"
++	depends on USB
++	---help---
++	   This is a driver for RTL8187B cards, like the one
++	   on Lemote Yeeloong 8089 notebooks.
++
+ config RTL8187
+ 	tristate "Realtek 8187 and 8187B USB support"
+ 	depends on MAC80211 && USB && WLAN_80211 && EXPERIMENTAL
+Index: linux-2.6.27.43/drivers/net/wireless/rtl8187B/Makefile
+===================================================================
+--- linux-2.6.27.43.orig/drivers/net/wireless/rtl8187B/Makefile	2010-01-09 04:42:06.000000000 +0000
++++ linux-2.6.27.43/drivers/net/wireless/rtl8187B/Makefile	2010-01-09 04:42:09.000000000 +0000
+@@ -1,30 +1 @@
+-LINUX_KSRC_MODULE = /lib/modules/$(shell uname -r)/kernel/drivers/net/wireless/
+-RTL8187B_DIR = $(shell pwd)
+-KVER  = $(shell uname -r)
+-#KSRC = ~/lemote/linux_loongson
+-KSRC = /lib/modules/$(KVER)/build
+-#KSRC = /home/yh/linux-2.6.27.1-lemote
+-HAL_SUB_DIR = rtl8187
+-
+-#export CROSS_COMPILE=mipsel-linux-
+-all: 
+-ifeq ($(shell uname -r|cut -d. -f1,2), 2.4)
+-	@make -C $(RTL8187B_DIR)/ieee80211
+-	@make -C $(RTL8187B_DIR)/rtl8187 
+-else	
+-	@make -C $(KSRC) SUBDIRS=$(RTL8187B_DIR)/ieee80211 modules 
+-	@cp $(RTL8187B_DIR)/ieee80211/Module.symvers $(RTL8187B_DIR)/rtl8187 
+-	@make -C $(KSRC) SUBDIRS=$(RTL8187B_DIR)/rtl8187 modules 
+-endif
+-install:
+-	@grep rtl8187.ko /lib/modules/$(shell uname -r)/modules.dep && rm -fr $(LINUX_KSRC_MODULE)/rtl8187.ko || echo > /dev/null 
+-	@cp $(RTL8187B_DIR)/RadioPower.sh /etc/acpi/events/
+-	@make -C ieee80211/ install
+-	@make -C rtl8187/ install
+-uninstall:
+-	@make -C ieee80211/ uninstall
+-	@make -C rtl8187/ uninstall
+-clean:
+-	@make -C rtl8187/ clean
+-	@make -C ieee80211/ clean
+-	@rm -rf *~
++obj-$(CONFIG_RTL8187B) += ieee80211/ rtl8187/
+Index: linux-2.6.27.43/drivers/net/wireless/rtl8187B/ieee80211/Makefile
+===================================================================
+--- linux-2.6.27.43.orig/drivers/net/wireless/rtl8187B/ieee80211/Makefile	2010-01-09 04:42:06.000000000 +0000
++++ linux-2.6.27.43/drivers/net/wireless/rtl8187B/ieee80211/Makefile	2010-01-09 08:36:43.000000000 +0000
+@@ -1,14 +1,5 @@
+-NIC_SELECT = RTL8187B
+-
+-#CC = mipsel-linux-gcc
+-#LD = mipsel-linux-ld
+-CC = gcc
+-KVER  := $(shell uname -r)
+-PWD = $(shell pwd)
+-MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/$(NIC_SELECT)
+-
+ EXTRA_CFLAGS += -I$(TOPDIR)/drivers/net/wireless
+-EXTRA_CFLAGS += -O2 
++# EXTRA_CFLAGS += -O2
+ EXTRA_CFLAGS += -DJACKSON_NEW_8187 -DJACKSON_NEW_RX
+ #CFLAGS += -DJOHN_HWSEC -DJOHN_TKIP -DJOHN_CCMP
+ EXTRA_CFLAGS += -DTHOMAS_TURBO
+@@ -19,18 +10,10 @@
+ #CFLAGS += -DJOHN_DUMP
+ #EXTRA_CFLAGS += -DJUST_FOR_87SEMESH -D_RTL8187_EXT_PATCH_
+ #EXTRA_CFLAGS += -D_RTL8187_EXT_PATCH_
+-
+-#FOR QMI 2.6.26.6
+ #EXTRA_CFLAGS += -DQMI_26_6
+-
+-#for IPS
+ EXTRA_CFLAGS += -DCONFIG_IPS
+-
+-#for dot11d
+ EXTRA_CFLAGS += -DENABLE_DOT11D
+ 
+-ifneq ($(shell uname -r|cut -d. -f1,2), 2.4)
+-
+ ieee80211-rtl-objs := ieee80211_softmac.o dot11d.o ieee80211_rx.o ieee80211_tx.o ieee80211_wx.o ieee80211_module.o ieee80211_softmac_wx.o
+ 
+ ieee80211_crypt-rtl-objs := ieee80211_crypt.o
+@@ -38,77 +21,8 @@
+ ieee80211_crypt_ccmp-rtl-objs := ieee80211_crypt_ccmp.o
+ ieee80211_crypt_wep-rtl-objs := ieee80211_crypt_wep.o
+ 
+-obj-m +=ieee80211-rtl.o
+-obj-m +=ieee80211_crypt-rtl.o
+-obj-m +=ieee80211_crypt_wep-rtl.o
+-obj-m +=ieee80211_crypt_tkip-rtl.o
+-obj-m +=ieee80211_crypt_ccmp-rtl.o
+-
+-KVER  := $(shell uname -r)
+-#KSRC := ~/lemote/linux_loongson
+-#KSRC :=  /home/yh/linux-2.6.27.1-lemote
+-KSRC := /lib/modules/$(KVER)/build
+-INSTALL_PREFIX :=
+-
+-all: modules
+-
+-modules:
+-	$(MAKE) -C $(KSRC) M=$(PWD) CC=$(CC) modules
+-
+-
+-install: modules
+-	rm -fr $(MODDESTDIR)
+-	mkdir -p $(MODDESTDIR)
+-	@install -p -m 644 ieee80211_crypt-rtl.ko $(MODDESTDIR)
+-	@install -p -m 644 ieee80211_crypt_wep-rtl.ko $(MODDESTDIR)
+-	@install -p -m 644 ieee80211_crypt_tkip-rtl.ko $(MODDESTDIR)
+-	@install -p -m 644 ieee80211_crypt_ccmp-rtl.ko $(MODDESTDIR)
+-	@install -p -m 644 ieee80211-rtl.ko $(MODDESTDIR)
+-	depmod -a
+-uninstall:
+-	rm -fr $(MODDESTDIR)
+-	depmod -a 
+-
+-else
+-
+-#WARN := -W -Wall -Wstrict-prototypes -Wmissing-prototypes
+-WARN := -W
+-INCLUDE := -isystem /lib/modules/`uname -r`/build/include
+-CFLAGS := -O2 -DMODULE -D__KERNEL__ -DEXPORT_SYMTAB -D__NO_VERSION__ ${WARN} ${INCLUDE}
+-ifdef CONFIG_SMP
+-CFLAGS += -D__SMP__ -DSMP
+-endif
+-
+-OBJS := ${patsubst %.c, %.o, ${wildcard *.c}}
+-
+-all:${OBJS} ieee80211_crypt-rtl.o michael_mic-rtl.o aes-rtl.o ieee80211_crypt_wep-rtl.o ieee80211_crypt_tkip-rtl.o ieee80211_crypt_ccmp-rtl.o crypto-rtl.o ieee80211-rtl.o
+-
+-ieee80211_crypt-rtl.o: ieee80211_crypt.o
+-	mv $^ $@	
+-
+-michael_mic-rtl.o: michael_mic.o
+-	mv $^ $@
+-
+-aes-rtl.o: aes.o
+-	mv $^ $@
+-
+-ieee80211_crypt_wep-rtl.o: ieee80211_crypt_wep.o
+-	mv $^ $@
+-
+-ieee80211_crypt_tkip-rtl.o: ieee80211_crypt_tkip.o
+-	mv $^ $@
+-
+-ieee80211_crypt_ccmp-rtl.o: ieee80211_crypt_ccmp.o
+-	mv $^ $@
+-
+-crypto-rtl.o: arc4.o api.o autoload.o cipher.o compress.o digest.o scatterwalk.o proc.o
+-	$(LD) -r $^ -o $@
+-
+-ieee80211-rtl.o: ieee80211_rx.o ieee80211_tx.o ieee80211_wx.o ieee80211_module.o ieee80211_softmac_wx.o ieee80211_softmac.o
+-	$(LD) -r $^ -o $@
+-endif
+-
+-.PHONY:clean
+-clean:
+-	rm -f *.mod.c *.mod *.o .*.cmd *.ko *~
+-	rm -rf $(PWD)/tmp
++obj-$(CONFIG_RTL8187B) += ieee80211-rtl.o
++obj-$(CONFIG_RTL8187B) += ieee80211_crypt-rtl.o
++obj-$(CONFIG_RTL8187B) += ieee80211_crypt_wep-rtl.o
++obj-$(CONFIG_RTL8187B) += ieee80211_crypt_tkip-rtl.o
++obj-$(CONFIG_RTL8187B) += ieee80211_crypt_ccmp-rtl.o
+Index: linux-2.6.27.43/drivers/net/wireless/rtl8187B/rtl8187/Makefile
+===================================================================
+--- linux-2.6.27.43.orig/drivers/net/wireless/rtl8187B/rtl8187/Makefile	2010-01-09 04:42:07.000000000 +0000
++++ linux-2.6.27.43/drivers/net/wireless/rtl8187B/rtl8187/Makefile	2010-01-09 07:11:18.000000000 +0000
+@@ -1,11 +1,3 @@
+-NIC_SELECT = RTL8187B
+-
+-#CC = mipsel-linux-gcc
+-#LD = mipsel-linux-ld
+-CC = gcc
+-KVER  := $(shell uname -r)
+-MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/$(NIC_SELECT)
+-
+ #EXTRA_CFLAGS += -DCONFIG_IEEE80211_NOWEP=y
+ #EXTRA_CFLAGS += -DCONFIG_RTL8180_IOMAP
+ EXTRA_CFLAGS += -I$(TOPDIR)/drivers/net/wireless
+@@ -22,62 +14,10 @@
+ #EXTRA_CFLAGS += -DSW_ANTE_DIVERSITY
+ EXTRA_CFLAGS += -DCPU_64BIT
+ EXTRA_CFLAGS += -DCONFIG_IPS
+-#CFLAGS += -DJOHN_HWSEC -DJOHN_TKIP
+-#CFLAGS += -DJOHN_DUMP_TX
+ #EXTRA_CFLAGS += -DJOHN_DUMP_TXPKT
+-
+-#Radio On/Off debug
+ EXTRA_CFLAGS += -DCONFIG_RADIO_DEBUG
+-
+-#for dot11d
+ EXTRA_CFLAGS += -DENABLE_DOT11D
+-
+-#for Toshiba
+ #EXTRA_CFLAGS += -DENABLE_TOSHIBA_CONFIG
+ 
+-ifneq ($(shell uname -r|cut -d. -f1,2), 2.4)
+-
+-r8187-objs := r8187_core.o r8180_93cx6.o r8180_wx.o r8180_rtl8225.o r8180_rtl8225z2.o r8180_pm.o r8180_dm.o r8187_led.o
+-
+-obj-m := r8187.o
+-
+-KVER  := $(shell uname -r)
+-#KSRC := ~/lemote/linux_loongson
+-#KSRC := /home/yh/linux-2.6.27.1-lemote
+-KSRC := /lib/modules/$(KVER)/build
+-PWD = $(shell pwd)
+-INSTALL_PREFIX :=
+-
+-all: modules
+-
+-modules:
+-	$(MAKE) -C $(KSRC) M=$(PWD) CC=$(CC) modules
+-
+-install: modules
+-	install -p -m 644 r8187.ko $(MODDESTDIR)
+-	depmod -a
+-
+-uninstall:
+-	$(shell [ -d $(MODDESTDIR) ] && rm -fr $(MODDESTDIR))
+-	depmod -a
+-else
+-
+-WARN := -W
+-INCLUDE := -isystem /lib/modules/`uname -r`/build/include
+-CFLAGS := -O2 -DMODULE -D__KERNEL__ ${WARN} ${INCLUDE}
+-ifdef CONFIG_SMP
+-CFLAGS += -D__SMP__ -DSMP
+-endif
+-OBJS := ${patsubst %.c, %.o, ${wildcard *.c}}
+-                                                                                
+-all:r8187.o
+-                                                                                
+-r8187.o:${OBJS}
+-	$(LD) -r $^ -o $@
+-endif
+-
+-.PHONY:clean
+-clean:
+-	rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~
+-	rm -fr .tmp_versions
+-
++rtl8187b-objs := r8187_core.o r8180_93cx6.o r8180_wx.o r8180_rtl8225.o r8180_rtl8225z2.o r8180_pm.o r8180_dm.o r8187_led.o
++obj-$(CONFIG_RTL8187B) = rtl8187b.o
+Index: linux-2.6.27.43/drivers/net/wireless/Makefile
+===================================================================
+--- linux-2.6.27.43.orig/drivers/net/wireless/Makefile	2010-01-09 06:56:23.000000000 +0000
++++ linux-2.6.27.43/drivers/net/wireless/Makefile	2010-01-09 06:57:07.000000000 +0000
+@@ -53,6 +53,7 @@
+ 
+ obj-$(CONFIG_RTL8180)	+= rtl8180.o
+ obj-$(CONFIG_RTL8187)	+= rtl8187.o
++obj-$(CONFIG_RTL8187B)  += rtl8187B/
+ 
+ obj-$(CONFIG_ADM8211)	+= adm8211.o
+ 
diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/rtl8187B_linux_26.1051.0116.2009_release.patch b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/rtl8187B_linux_26.1051.0116.2009_release.patch
new file mode 100644
index 000000000..64ab3c71b
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/rtl8187B_linux_26.1051.0116.2009_release.patch
@@ -0,0 +1,40216 @@
+Binary files linux-2.6.27.43/drivers/net/wireless/rtl8187B/ChanPlanBin and linux-2.6.27.43/drivers/net/wireless/rtl8187B/ChanPlanBin differ
+Index: drivers/net/wireless/rtl8187B/ieee80211/aes.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/aes.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,469 @@
++/* 
++ * Cryptographic API.
++ *
++ * AES Cipher Algorithm.
++ *
++ * Based on Brian Gladman's code.
++ *
++ * Linux developers:
++ *  Alexander Kjeldaas <astor@fast.no>
++ *  Herbert Valerio Riedel <hvr@hvrlab.org>
++ *  Kyle McMartin <kyle@debian.org>
++ *  Adam J. Richter <adam@yggdrasil.com> (conversion to 2.5 API).
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * ---------------------------------------------------------------------------
++ * Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
++ * All rights reserved.
++ *
++ * LICENSE TERMS
++ *
++ * The free distribution and use of this software in both source and binary
++ * form is allowed (with or without changes) provided that:
++ *
++ *   1. distributions of this source code include the above copyright
++ *      notice, this list of conditions and the following disclaimer;
++ *
++ *   2. distributions in binary form include the above copyright
++ *      notice, this list of conditions and the following disclaimer
++ *      in the documentation and/or other associated materials;
++ *
++ *   3. the copyright holder's name is not used to endorse products
++ *      built using this software without specific written permission.
++ *
++ * ALTERNATIVELY, provided that this notice is retained in full, this product
++ * may be distributed under the terms of the GNU General Public License (GPL),
++ * in which case the provisions of the GPL apply INSTEAD OF those given above.
++ *
++ * DISCLAIMER
++ *
++ * This software is provided 'as is' with no explicit or implied warranties
++ * in respect of its properties, including, but not limited to, correctness
++ * and/or fitness for purpose.
++ * ---------------------------------------------------------------------------
++ */
++
++/* Some changes from the Gladman version:
++    s/RIJNDAEL(e_key)/E_KEY/g
++    s/RIJNDAEL(d_key)/D_KEY/g
++*/
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++#include <asm/byteorder.h>
++
++#define AES_MIN_KEY_SIZE	16
++#define AES_MAX_KEY_SIZE	32
++
++#define AES_BLOCK_SIZE		16
++
++static inline 
++u32 generic_rotr32 (const u32 x, const unsigned bits)
++{
++	const unsigned n = bits % 32;
++	return (x >> n) | (x << (32 - n));
++}
++
++static inline 
++u32 generic_rotl32 (const u32 x, const unsigned bits)
++{
++	const unsigned n = bits % 32;
++	return (x << n) | (x >> (32 - n));
++}
++
++#define rotl generic_rotl32
++#define rotr generic_rotr32
++
++/*
++ * #define byte(x, nr) ((unsigned char)((x) >> (nr*8))) 
++ */
++inline static u8
++byte(const u32 x, const unsigned n)
++{
++	return x >> (n << 3);
++}
++
++#define u32_in(x) le32_to_cpu(*(const u32 *)(x))
++#define u32_out(to, from) (*(u32 *)(to) = cpu_to_le32(from))
++
++struct aes_ctx {
++	int key_length;
++	u32 E[60];
++	u32 D[60];
++};
++
++#define E_KEY ctx->E
++#define D_KEY ctx->D
++
++static u8 pow_tab[256] __initdata;
++static u8 log_tab[256] __initdata;
++static u8 sbx_tab[256] __initdata;
++static u8 isb_tab[256] __initdata;
++static u32 rco_tab[10];
++static u32 ft_tab[4][256];
++static u32 it_tab[4][256];
++
++static u32 fl_tab[4][256];
++static u32 il_tab[4][256];
++
++static inline u8 __init
++f_mult (u8 a, u8 b)
++{
++	u8 aa = log_tab[a], cc = aa + log_tab[b];
++
++	return pow_tab[cc + (cc < aa ? 1 : 0)];
++}
++
++#define ff_mult(a,b)    (a && b ? f_mult(a, b) : 0)
++
++#define f_rn(bo, bi, n, k)					\
++    bo[n] =  ft_tab[0][byte(bi[n],0)] ^				\
++             ft_tab[1][byte(bi[(n + 1) & 3],1)] ^		\
++             ft_tab[2][byte(bi[(n + 2) & 3],2)] ^		\
++             ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
++
++#define i_rn(bo, bi, n, k)					\
++    bo[n] =  it_tab[0][byte(bi[n],0)] ^				\
++             it_tab[1][byte(bi[(n + 3) & 3],1)] ^		\
++             it_tab[2][byte(bi[(n + 2) & 3],2)] ^		\
++             it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
++
++#define ls_box(x)				\
++    ( fl_tab[0][byte(x, 0)] ^			\
++      fl_tab[1][byte(x, 1)] ^			\
++      fl_tab[2][byte(x, 2)] ^			\
++      fl_tab[3][byte(x, 3)] )
++
++#define f_rl(bo, bi, n, k)					\
++    bo[n] =  fl_tab[0][byte(bi[n],0)] ^				\
++             fl_tab[1][byte(bi[(n + 1) & 3],1)] ^		\
++             fl_tab[2][byte(bi[(n + 2) & 3],2)] ^		\
++             fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
++
++#define i_rl(bo, bi, n, k)					\
++    bo[n] =  il_tab[0][byte(bi[n],0)] ^				\
++             il_tab[1][byte(bi[(n + 3) & 3],1)] ^		\
++             il_tab[2][byte(bi[(n + 2) & 3],2)] ^		\
++             il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
++
++static void __init
++gen_tabs (void)
++{
++	u32 i, t;
++	u8 p, q;
++
++	/* log and power tables for GF(2**8) finite field with
++	   0x011b as modular polynomial - the simplest primitive
++	   root is 0x03, used here to generate the tables */
++
++	for (i = 0, p = 1; i < 256; ++i) {
++		pow_tab[i] = (u8) p;
++		log_tab[p] = (u8) i;
++
++		p ^= (p << 1) ^ (p & 0x80 ? 0x01b : 0);
++	}
++
++	log_tab[1] = 0;
++
++	for (i = 0, p = 1; i < 10; ++i) {
++		rco_tab[i] = p;
++
++		p = (p << 1) ^ (p & 0x80 ? 0x01b : 0);
++	}
++
++	for (i = 0; i < 256; ++i) {
++		p = (i ? pow_tab[255 - log_tab[i]] : 0);
++		q = ((p >> 7) | (p << 1)) ^ ((p >> 6) | (p << 2));
++		p ^= 0x63 ^ q ^ ((q >> 6) | (q << 2));
++		sbx_tab[i] = p;
++		isb_tab[p] = (u8) i;
++	}
++
++	for (i = 0; i < 256; ++i) {
++		p = sbx_tab[i];
++
++		t = p;
++		fl_tab[0][i] = t;
++		fl_tab[1][i] = rotl (t, 8);
++		fl_tab[2][i] = rotl (t, 16);
++		fl_tab[3][i] = rotl (t, 24);
++
++		t = ((u32) ff_mult (2, p)) |
++		    ((u32) p << 8) |
++		    ((u32) p << 16) | ((u32) ff_mult (3, p) << 24);
++
++		ft_tab[0][i] = t;
++		ft_tab[1][i] = rotl (t, 8);
++		ft_tab[2][i] = rotl (t, 16);
++		ft_tab[3][i] = rotl (t, 24);
++
++		p = isb_tab[i];
++
++		t = p;
++		il_tab[0][i] = t;
++		il_tab[1][i] = rotl (t, 8);
++		il_tab[2][i] = rotl (t, 16);
++		il_tab[3][i] = rotl (t, 24);
++
++		t = ((u32) ff_mult (14, p)) |
++		    ((u32) ff_mult (9, p) << 8) |
++		    ((u32) ff_mult (13, p) << 16) |
++		    ((u32) ff_mult (11, p) << 24);
++
++		it_tab[0][i] = t;
++		it_tab[1][i] = rotl (t, 8);
++		it_tab[2][i] = rotl (t, 16);
++		it_tab[3][i] = rotl (t, 24);
++	}
++}
++
++#define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
++
++#define imix_col(y,x)       \
++    u   = star_x(x);        \
++    v   = star_x(u);        \
++    w   = star_x(v);        \
++    t   = w ^ (x);          \
++   (y)  = u ^ v ^ w;        \
++   (y) ^= rotr(u ^ t,  8) ^ \
++          rotr(v ^ t, 16) ^ \
++          rotr(t,24)
++
++/* initialise the key schedule from the user supplied key */
++
++#define loop4(i)                                    \
++{   t = rotr(t,  8); t = ls_box(t) ^ rco_tab[i];    \
++    t ^= E_KEY[4 * i];     E_KEY[4 * i + 4] = t;    \
++    t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t;    \
++    t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t;    \
++    t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t;    \
++}
++
++#define loop6(i)                                    \
++{   t = rotr(t,  8); t = ls_box(t) ^ rco_tab[i];    \
++    t ^= E_KEY[6 * i];     E_KEY[6 * i + 6] = t;    \
++    t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t;    \
++    t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t;    \
++    t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t;    \
++    t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t;   \
++    t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t;   \
++}
++
++#define loop8(i)                                    \
++{   t = rotr(t,  8); ; t = ls_box(t) ^ rco_tab[i];  \
++    t ^= E_KEY[8 * i];     E_KEY[8 * i + 8] = t;    \
++    t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t;    \
++    t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t;   \
++    t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t;   \
++    t  = E_KEY[8 * i + 4] ^ ls_box(t);    \
++    E_KEY[8 * i + 12] = t;                \
++    t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t;   \
++    t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t;   \
++    t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t;   \
++}
++
++static int
++aes_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)
++{
++	struct aes_ctx *ctx = ctx_arg;
++	u32 i, t, u, v, w;
++
++	if (key_len != 16 && key_len != 24 && key_len != 32) {
++		*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
++		return -EINVAL;
++	}
++
++	ctx->key_length = key_len;
++
++	E_KEY[0] = u32_in (in_key);
++	E_KEY[1] = u32_in (in_key + 4);
++	E_KEY[2] = u32_in (in_key + 8);
++	E_KEY[3] = u32_in (in_key + 12);
++
++	switch (key_len) {
++	case 16:
++		t = E_KEY[3];
++		for (i = 0; i < 10; ++i)
++			loop4 (i);
++		break;
++
++	case 24:
++		E_KEY[4] = u32_in (in_key + 16);
++		t = E_KEY[5] = u32_in (in_key + 20);
++		for (i = 0; i < 8; ++i)
++			loop6 (i);
++		break;
++
++	case 32:
++		E_KEY[4] = u32_in (in_key + 16);
++		E_KEY[5] = u32_in (in_key + 20);
++		E_KEY[6] = u32_in (in_key + 24);
++		t = E_KEY[7] = u32_in (in_key + 28);
++		for (i = 0; i < 7; ++i)
++			loop8 (i);
++		break;
++	}
++
++	D_KEY[0] = E_KEY[0];
++	D_KEY[1] = E_KEY[1];
++	D_KEY[2] = E_KEY[2];
++	D_KEY[3] = E_KEY[3];
++
++	for (i = 4; i < key_len + 24; ++i) {
++		imix_col (D_KEY[i], E_KEY[i]);
++	}
++
++	return 0;
++}
++
++/* encrypt a block of text */
++
++#define f_nround(bo, bi, k) \
++    f_rn(bo, bi, 0, k);     \
++    f_rn(bo, bi, 1, k);     \
++    f_rn(bo, bi, 2, k);     \
++    f_rn(bo, bi, 3, k);     \
++    k += 4
++
++#define f_lround(bo, bi, k) \
++    f_rl(bo, bi, 0, k);     \
++    f_rl(bo, bi, 1, k);     \
++    f_rl(bo, bi, 2, k);     \
++    f_rl(bo, bi, 3, k)
++
++static void aes_encrypt(void *ctx_arg, u8 *out, const u8 *in)
++{
++	const struct aes_ctx *ctx = ctx_arg;
++	u32 b0[4], b1[4];
++	const u32 *kp = E_KEY + 4;
++
++	b0[0] = u32_in (in) ^ E_KEY[0];
++	b0[1] = u32_in (in + 4) ^ E_KEY[1];
++	b0[2] = u32_in (in + 8) ^ E_KEY[2];
++	b0[3] = u32_in (in + 12) ^ E_KEY[3];
++
++	if (ctx->key_length > 24) {
++		f_nround (b1, b0, kp);
++		f_nround (b0, b1, kp);
++	}
++
++	if (ctx->key_length > 16) {
++		f_nround (b1, b0, kp);
++		f_nround (b0, b1, kp);
++	}
++
++	f_nround (b1, b0, kp);
++	f_nround (b0, b1, kp);
++	f_nround (b1, b0, kp);
++	f_nround (b0, b1, kp);
++	f_nround (b1, b0, kp);
++	f_nround (b0, b1, kp);
++	f_nround (b1, b0, kp);
++	f_nround (b0, b1, kp);
++	f_nround (b1, b0, kp);
++	f_lround (b0, b1, kp);
++
++	u32_out (out, b0[0]);
++	u32_out (out + 4, b0[1]);
++	u32_out (out + 8, b0[2]);
++	u32_out (out + 12, b0[3]);
++}
++
++/* decrypt a block of text */
++
++#define i_nround(bo, bi, k) \
++    i_rn(bo, bi, 0, k);     \
++    i_rn(bo, bi, 1, k);     \
++    i_rn(bo, bi, 2, k);     \
++    i_rn(bo, bi, 3, k);     \
++    k -= 4
++
++#define i_lround(bo, bi, k) \
++    i_rl(bo, bi, 0, k);     \
++    i_rl(bo, bi, 1, k);     \
++    i_rl(bo, bi, 2, k);     \
++    i_rl(bo, bi, 3, k)
++
++static void aes_decrypt(void *ctx_arg, u8 *out, const u8 *in)
++{
++	const struct aes_ctx *ctx = ctx_arg;
++	u32 b0[4], b1[4];
++	const int key_len = ctx->key_length;
++	const u32 *kp = D_KEY + key_len + 20;
++
++	b0[0] = u32_in (in) ^ E_KEY[key_len + 24];
++	b0[1] = u32_in (in + 4) ^ E_KEY[key_len + 25];
++	b0[2] = u32_in (in + 8) ^ E_KEY[key_len + 26];
++	b0[3] = u32_in (in + 12) ^ E_KEY[key_len + 27];
++
++	if (key_len > 24) {
++		i_nround (b1, b0, kp);
++		i_nround (b0, b1, kp);
++	}
++
++	if (key_len > 16) {
++		i_nround (b1, b0, kp);
++		i_nround (b0, b1, kp);
++	}
++
++	i_nround (b1, b0, kp);
++	i_nround (b0, b1, kp);
++	i_nround (b1, b0, kp);
++	i_nround (b0, b1, kp);
++	i_nround (b1, b0, kp);
++	i_nround (b0, b1, kp);
++	i_nround (b1, b0, kp);
++	i_nround (b0, b1, kp);
++	i_nround (b1, b0, kp);
++	i_lround (b0, b1, kp);
++
++	u32_out (out, b0[0]);
++	u32_out (out + 4, b0[1]);
++	u32_out (out + 8, b0[2]);
++	u32_out (out + 12, b0[3]);
++}
++
++
++static struct crypto_alg aes_alg = {
++	.cra_name		=	"aes",
++	.cra_flags		=	CRYPTO_ALG_TYPE_CIPHER,
++	.cra_blocksize		=	AES_BLOCK_SIZE,
++	.cra_ctxsize		=	sizeof(struct aes_ctx),
++	.cra_module		=	THIS_MODULE,
++	.cra_list		=	LIST_HEAD_INIT(aes_alg.cra_list),
++	.cra_u			=	{
++		.cipher = {
++			.cia_min_keysize	=	AES_MIN_KEY_SIZE,
++			.cia_max_keysize	=	AES_MAX_KEY_SIZE,
++			.cia_setkey	   	= 	aes_set_key,
++			.cia_encrypt	 	=	aes_encrypt,
++			.cia_decrypt	  	=	aes_decrypt
++		}
++	}
++};
++
++static int __init aes_init(void)
++{
++	gen_tabs();
++	return crypto_register_alg(&aes_alg);
++}
++
++static void __exit aes_fini(void)
++{
++	crypto_unregister_alg(&aes_alg);
++}
++
++module_init(aes_init);
++module_exit(aes_fini);
++
++MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm");
++MODULE_LICENSE("Dual BSD/GPL");
++
+Index: drivers/net/wireless/rtl8187B/ieee80211/api.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/api.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,246 @@
++/*
++ * Scatterlist Cryptographic API.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ * Copyright (c) 2002 David S. Miller (davem@redhat.com)
++ *
++ * Portions derived from Cryptoapi, by Alexander Kjeldaas <astor@fast.no>
++ * and Nettle, by Niels Mé°ˆler.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option) 
++ * any later version.
++ *
++ */
++#include "kmap_types.h"
++
++#include <linux/init.h>
++#include <linux/module.h>
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++#include <linux/errno.h>
++#include <linux/rwsem.h>
++#include <linux/slab.h>
++#include "internal.h"
++
++LIST_HEAD(crypto_alg_list);
++DECLARE_RWSEM(crypto_alg_sem);
++
++static inline int crypto_alg_get(struct crypto_alg *alg)
++{
++	return try_inc_mod_count(alg->cra_module);
++}
++
++static inline void crypto_alg_put(struct crypto_alg *alg)
++{
++	if (alg->cra_module)
++		__MOD_DEC_USE_COUNT(alg->cra_module);
++}
++
++struct crypto_alg *crypto_alg_lookup(const char *name)
++{
++	struct crypto_alg *q, *alg = NULL;
++
++	if (!name)
++		return NULL;
++	
++	down_read(&crypto_alg_sem);
++	
++	list_for_each_entry(q, &crypto_alg_list, cra_list) {
++		if (!(strcmp(q->cra_name, name))) {
++			if (crypto_alg_get(q))
++				alg = q;
++			break;
++		}
++	}
++	
++	up_read(&crypto_alg_sem);
++	return alg;
++}
++
++static int crypto_init_flags(struct crypto_tfm *tfm, u32 flags)
++{
++	tfm->crt_flags = 0;
++	
++	switch (crypto_tfm_alg_type(tfm)) {
++	case CRYPTO_ALG_TYPE_CIPHER:
++		return crypto_init_cipher_flags(tfm, flags);
++		
++	case CRYPTO_ALG_TYPE_DIGEST:
++		return crypto_init_digest_flags(tfm, flags);
++		
++	case CRYPTO_ALG_TYPE_COMPRESS:
++		return crypto_init_compress_flags(tfm, flags);
++	
++	default:
++		break;
++	}
++	
++	BUG();
++	return -EINVAL;
++}
++
++static int crypto_init_ops(struct crypto_tfm *tfm)
++{
++	switch (crypto_tfm_alg_type(tfm)) {
++	case CRYPTO_ALG_TYPE_CIPHER:
++		return crypto_init_cipher_ops(tfm);
++		
++	case CRYPTO_ALG_TYPE_DIGEST:
++		return crypto_init_digest_ops(tfm);
++		
++	case CRYPTO_ALG_TYPE_COMPRESS:
++		return crypto_init_compress_ops(tfm);
++	
++	default:
++		break;
++	}
++	
++	BUG();
++	return -EINVAL;
++}
++
++static void crypto_exit_ops(struct crypto_tfm *tfm)
++{
++	switch (crypto_tfm_alg_type(tfm)) {
++	case CRYPTO_ALG_TYPE_CIPHER:
++		crypto_exit_cipher_ops(tfm);
++		break;
++		
++	case CRYPTO_ALG_TYPE_DIGEST:
++		crypto_exit_digest_ops(tfm);
++		break;
++		
++	case CRYPTO_ALG_TYPE_COMPRESS:
++		crypto_exit_compress_ops(tfm);
++		break;
++	
++	default:
++		BUG();
++		
++	}
++}
++
++struct crypto_tfm *crypto_alloc_tfm(const char *name, u32 flags)
++{
++	struct crypto_tfm *tfm = NULL;
++	struct crypto_alg *alg;
++
++	alg = crypto_alg_mod_lookup(name);
++	if (alg == NULL)
++		goto out;
++	
++	tfm = kmalloc(sizeof(*tfm) + alg->cra_ctxsize, GFP_KERNEL);
++	if (tfm == NULL)
++		goto out_put;
++
++	memset(tfm, 0, sizeof(*tfm) + alg->cra_ctxsize);
++	
++	tfm->__crt_alg = alg;
++	
++	if (crypto_init_flags(tfm, flags))
++		goto out_free_tfm;
++		
++	if (crypto_init_ops(tfm)) {
++		crypto_exit_ops(tfm);
++		goto out_free_tfm;
++	}
++
++	goto out;
++
++out_free_tfm:
++	kfree(tfm);
++	tfm = NULL;
++out_put:
++	crypto_alg_put(alg);
++out:
++	return tfm;
++}
++
++void crypto_free_tfm(struct crypto_tfm *tfm)
++{
++	struct crypto_alg *alg = tfm->__crt_alg;
++	int size = sizeof(*tfm) + alg->cra_ctxsize;
++
++	crypto_exit_ops(tfm);
++	crypto_alg_put(alg);
++	memset(tfm, 0, size);
++	kfree(tfm);
++}
++
++int crypto_register_alg(struct crypto_alg *alg)
++{
++	int ret = 0;
++	struct crypto_alg *q;
++	
++	down_write(&crypto_alg_sem);
++	
++	list_for_each_entry(q, &crypto_alg_list, cra_list) {
++		if (!(strcmp(q->cra_name, alg->cra_name))) {
++			ret = -EEXIST;
++			goto out;
++		}
++	}
++	
++	list_add_tail(&alg->cra_list, &crypto_alg_list);
++out:	
++	up_write(&crypto_alg_sem);
++	return ret;
++}
++
++int crypto_unregister_alg(struct crypto_alg *alg)
++{
++	int ret = -ENOENT;
++	struct crypto_alg *q;
++	
++	BUG_ON(!alg->cra_module);
++	
++	down_write(&crypto_alg_sem);
++	list_for_each_entry(q, &crypto_alg_list, cra_list) {
++		if (alg == q) {
++			list_del(&alg->cra_list);
++			ret = 0;
++			goto out;
++		}
++	}
++out:	
++	up_write(&crypto_alg_sem);
++	return ret;
++}
++
++int crypto_alg_available(const char *name, u32 flags)
++{
++	int ret = 0;
++	struct crypto_alg *alg = crypto_alg_mod_lookup(name);
++	
++	if (alg) {
++		crypto_alg_put(alg);
++		ret = 1;
++	}
++	
++	return ret;
++}
++
++static int __init init_crypto(void)
++{
++	printk(KERN_INFO "Initializing Cryptographic API\n");
++	crypto_init_proc();
++	return 0;
++}
++
++__initcall(init_crypto);
++
++/*
++EXPORT_SYMBOL_GPL(crypto_register_alg);
++EXPORT_SYMBOL_GPL(crypto_unregister_alg);
++EXPORT_SYMBOL_GPL(crypto_alloc_tfm);
++EXPORT_SYMBOL_GPL(crypto_free_tfm);
++EXPORT_SYMBOL_GPL(crypto_alg_available);
++*/
++
++EXPORT_SYMBOL_NOVERS(crypto_register_alg);
++EXPORT_SYMBOL_NOVERS(crypto_unregister_alg);
++EXPORT_SYMBOL_NOVERS(crypto_alloc_tfm);
++EXPORT_SYMBOL_NOVERS(crypto_free_tfm);
++EXPORT_SYMBOL_NOVERS(crypto_alg_available);
+Index: drivers/net/wireless/rtl8187B/ieee80211/arc4.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/arc4.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,103 @@
++/* 
++ * Cryptographic API
++ *
++ * ARC4 Cipher Algorithm
++ *
++ * Jon Oberheide <jon@oberheide.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++#include <linux/module.h>
++#include <linux/init.h>
++#include "rtl_crypto.h"
++
++#define ARC4_MIN_KEY_SIZE	1
++#define ARC4_MAX_KEY_SIZE	256
++#define ARC4_BLOCK_SIZE		1
++
++struct arc4_ctx {
++	u8 S[256];
++	u8 x, y;
++};
++
++static int arc4_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)
++{
++	struct arc4_ctx *ctx = ctx_arg;
++	int i, j = 0, k = 0;
++
++	ctx->x = 1;
++	ctx->y = 0;
++
++	for(i = 0; i < 256; i++)
++		ctx->S[i] = i;
++
++	for(i = 0; i < 256; i++)
++	{
++		u8 a = ctx->S[i];
++		j = (j + in_key[k] + a) & 0xff;
++		ctx->S[i] = ctx->S[j];
++		ctx->S[j] = a;
++		if(++k >= key_len)
++			k = 0;
++	}
++
++	return 0;
++}
++
++static void arc4_crypt(void *ctx_arg, u8 *out, const u8 *in)
++{
++	struct arc4_ctx *ctx = ctx_arg;
++
++	u8 *const S = ctx->S;
++	u8 x = ctx->x;
++	u8 y = ctx->y;
++	u8 a, b;
++
++	a = S[x];
++	y = (y + a) & 0xff;
++	b = S[y];
++	S[x] = b;
++	S[y] = a;
++	x = (x + 1) & 0xff;
++	*out++ = *in ^ S[(a + b) & 0xff];
++
++	ctx->x = x;
++	ctx->y = y;
++}
++
++static struct crypto_alg arc4_alg = {
++	.cra_name		=	"arc4",
++	.cra_flags		=	CRYPTO_ALG_TYPE_CIPHER,
++	.cra_blocksize		=	ARC4_BLOCK_SIZE,
++	.cra_ctxsize		=	sizeof(struct arc4_ctx),
++	.cra_module		=	THIS_MODULE,
++	.cra_list		=	LIST_HEAD_INIT(arc4_alg.cra_list),
++	.cra_u			=	{ .cipher = {
++	.cia_min_keysize	=	ARC4_MIN_KEY_SIZE,
++	.cia_max_keysize	=	ARC4_MAX_KEY_SIZE,
++	.cia_setkey	   	= 	arc4_set_key,
++	.cia_encrypt	 	=	arc4_crypt,
++	.cia_decrypt	  	=	arc4_crypt } }
++};
++
++static int __init arc4_init(void)
++{
++	return crypto_register_alg(&arc4_alg);
++}
++
++
++static void __exit arc4_exit(void)
++{
++	crypto_unregister_alg(&arc4_alg);
++}
++
++module_init(arc4_init);
++module_exit(arc4_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("ARC4 Cipher Algorithm");
++MODULE_AUTHOR("Jon Oberheide <jon@oberheide.org>");
+Index: drivers/net/wireless/rtl8187B/ieee80211/autoload.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/autoload.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,40 @@
++/*
++ * Cryptographic API.
++ *
++ * Algorithm autoloader.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option) 
++ * any later version.
++ *
++ */
++#include "kmap_types.h"
++
++#include <linux/kernel.h>
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++#include <linux/string.h>
++#include <linux/kmod.h>
++#include "internal.h"
++
++/*
++ * A far more intelligent version of this is planned.  For now, just
++ * try an exact match on the name of the algorithm.
++ */
++void crypto_alg_autoload(const char *name)
++{
++	request_module(name);
++}
++
++struct crypto_alg *crypto_alg_mod_lookup(const char *name)
++{
++	struct crypto_alg *alg = crypto_alg_lookup(name);
++	if (alg == NULL) {
++		crypto_alg_autoload(name);
++		alg = crypto_alg_lookup(name);
++	}
++	return alg;
++}
+Index: drivers/net/wireless/rtl8187B/ieee80211/cipher.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/cipher.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,299 @@
++/*
++ * Cryptographic API.
++ *
++ * Cipher operations.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option) 
++ * any later version.
++ *
++ */
++#include <linux/kernel.h>
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++#include <linux/errno.h>
++#include <linux/mm.h>
++#include <linux/slab.h>
++#include <asm/scatterlist.h>
++#include "internal.h"
++#include "scatterwalk.h"
++
++typedef void (cryptfn_t)(void *, u8 *, const u8 *);
++typedef void (procfn_t)(struct crypto_tfm *, u8 *,
++                        u8*, cryptfn_t, int enc, void *, int);
++
++static inline void xor_64(u8 *a, const u8 *b)
++{
++	((u32 *)a)[0] ^= ((u32 *)b)[0];
++	((u32 *)a)[1] ^= ((u32 *)b)[1];
++}
++
++static inline void xor_128(u8 *a, const u8 *b)
++{
++	((u32 *)a)[0] ^= ((u32 *)b)[0];
++	((u32 *)a)[1] ^= ((u32 *)b)[1];
++	((u32 *)a)[2] ^= ((u32 *)b)[2];
++	((u32 *)a)[3] ^= ((u32 *)b)[3];
++}
++
++
++/* 
++ * Generic encrypt/decrypt wrapper for ciphers, handles operations across
++ * multiple page boundaries by using temporary blocks.  In user context,
++ * the kernel is given a chance to schedule us once per block.
++ */
++static int crypt(struct crypto_tfm *tfm,
++		 struct scatterlist *dst,
++		 struct scatterlist *src,
++                 unsigned int nbytes, cryptfn_t crfn,
++                 procfn_t prfn, int enc, void *info)
++{
++	struct scatter_walk walk_in, walk_out;
++	const unsigned int bsize = crypto_tfm_alg_blocksize(tfm);
++	u8 tmp_src[bsize];
++	u8 tmp_dst[bsize];
++
++	if (!nbytes)
++		return 0;
++
++	if (nbytes % bsize) {
++		tfm->crt_flags |= CRYPTO_TFM_RES_BAD_BLOCK_LEN;
++		return -EINVAL;
++	}
++
++	scatterwalk_start(&walk_in, src);
++	scatterwalk_start(&walk_out, dst);
++
++	for(;;) {
++		u8 *src_p, *dst_p;
++		int in_place;
++
++		scatterwalk_map(&walk_in, 0);
++		scatterwalk_map(&walk_out, 1);
++		src_p = scatterwalk_whichbuf(&walk_in, bsize, tmp_src);
++		dst_p = scatterwalk_whichbuf(&walk_out, bsize, tmp_dst);
++		in_place = scatterwalk_samebuf(&walk_in, &walk_out,
++					       src_p, dst_p);
++
++		nbytes -= bsize;
++
++		scatterwalk_copychunks(src_p, &walk_in, bsize, 0);
++
++		prfn(tfm, dst_p, src_p, crfn, enc, info, in_place);
++
++		scatterwalk_done(&walk_in, 0, nbytes);
++
++		scatterwalk_copychunks(dst_p, &walk_out, bsize, 1);
++		scatterwalk_done(&walk_out, 1, nbytes);
++
++		if (!nbytes)
++			return 0;
++
++		crypto_yield(tfm);
++	}
++}
++
++static void cbc_process(struct crypto_tfm *tfm, u8 *dst, u8 *src,
++			cryptfn_t fn, int enc, void *info, int in_place)
++{
++	u8 *iv = info;
++	
++	/* Null encryption */
++	if (!iv)
++		return;
++		
++	if (enc) {
++		tfm->crt_u.cipher.cit_xor_block(iv, src);
++		fn(crypto_tfm_ctx(tfm), dst, iv);
++		memcpy(iv, dst, crypto_tfm_alg_blocksize(tfm));
++	} else {
++		u8 stack[in_place ? crypto_tfm_alg_blocksize(tfm) : 0];
++		u8 *buf = in_place ? stack : dst;
++
++		fn(crypto_tfm_ctx(tfm), buf, src);
++		tfm->crt_u.cipher.cit_xor_block(buf, iv);
++		memcpy(iv, src, crypto_tfm_alg_blocksize(tfm));
++		if (buf != dst)
++			memcpy(dst, buf, crypto_tfm_alg_blocksize(tfm));
++	}
++}
++
++static void ecb_process(struct crypto_tfm *tfm, u8 *dst, u8 *src,
++			cryptfn_t fn, int enc, void *info, int in_place)
++{
++	fn(crypto_tfm_ctx(tfm), dst, src);
++}
++
++static int setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
++{
++	struct cipher_alg *cia = &tfm->__crt_alg->cra_cipher;
++	
++	if (keylen < cia->cia_min_keysize || keylen > cia->cia_max_keysize) {
++		tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
++		return -EINVAL;
++	} else
++		return cia->cia_setkey(crypto_tfm_ctx(tfm), key, keylen,
++		                       &tfm->crt_flags);
++}
++
++static int ecb_encrypt(struct crypto_tfm *tfm,
++		       struct scatterlist *dst,
++                       struct scatterlist *src, unsigned int nbytes)
++{
++	return crypt(tfm, dst, src, nbytes,
++	             tfm->__crt_alg->cra_cipher.cia_encrypt,
++	             ecb_process, 1, NULL);
++}
++
++static int ecb_decrypt(struct crypto_tfm *tfm,
++                       struct scatterlist *dst,
++                       struct scatterlist *src,
++		       unsigned int nbytes)
++{
++	return crypt(tfm, dst, src, nbytes,
++	             tfm->__crt_alg->cra_cipher.cia_decrypt,
++	             ecb_process, 1, NULL);
++}
++
++static int cbc_encrypt(struct crypto_tfm *tfm,
++                       struct scatterlist *dst,
++                       struct scatterlist *src,
++		       unsigned int nbytes)
++{
++	return crypt(tfm, dst, src, nbytes,
++	             tfm->__crt_alg->cra_cipher.cia_encrypt,
++	             cbc_process, 1, tfm->crt_cipher.cit_iv);
++}
++
++static int cbc_encrypt_iv(struct crypto_tfm *tfm,
++                          struct scatterlist *dst,
++                          struct scatterlist *src,
++                          unsigned int nbytes, u8 *iv)
++{
++	return crypt(tfm, dst, src, nbytes,
++	             tfm->__crt_alg->cra_cipher.cia_encrypt,
++	             cbc_process, 1, iv);
++}
++
++static int cbc_decrypt(struct crypto_tfm *tfm,
++                       struct scatterlist *dst,
++                       struct scatterlist *src,
++		       unsigned int nbytes)
++{
++	return crypt(tfm, dst, src, nbytes,
++	             tfm->__crt_alg->cra_cipher.cia_decrypt,
++	             cbc_process, 0, tfm->crt_cipher.cit_iv);
++}
++
++static int cbc_decrypt_iv(struct crypto_tfm *tfm,
++                          struct scatterlist *dst,
++                          struct scatterlist *src,
++                          unsigned int nbytes, u8 *iv)
++{
++	return crypt(tfm, dst, src, nbytes,
++	             tfm->__crt_alg->cra_cipher.cia_decrypt,
++	             cbc_process, 0, iv);
++}
++
++static int nocrypt(struct crypto_tfm *tfm,
++                   struct scatterlist *dst,
++                   struct scatterlist *src,
++		   unsigned int nbytes)
++{
++	return -ENOSYS;
++}
++
++static int nocrypt_iv(struct crypto_tfm *tfm,
++                      struct scatterlist *dst,
++                      struct scatterlist *src,
++                      unsigned int nbytes, u8 *iv)
++{
++	return -ENOSYS;
++}
++
++int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags)
++{
++	u32 mode = flags & CRYPTO_TFM_MODE_MASK;
++	
++	tfm->crt_cipher.cit_mode = mode ? mode : CRYPTO_TFM_MODE_ECB;
++	if (flags & CRYPTO_TFM_REQ_WEAK_KEY)
++		tfm->crt_flags = CRYPTO_TFM_REQ_WEAK_KEY;
++	
++	return 0;
++}
++
++int crypto_init_cipher_ops(struct crypto_tfm *tfm)
++{
++	int ret = 0;
++	struct cipher_tfm *ops = &tfm->crt_cipher;
++
++	ops->cit_setkey = setkey;
++
++	switch (tfm->crt_cipher.cit_mode) {
++	case CRYPTO_TFM_MODE_ECB:
++		ops->cit_encrypt = ecb_encrypt;
++		ops->cit_decrypt = ecb_decrypt;
++		break;
++		
++	case CRYPTO_TFM_MODE_CBC:
++		ops->cit_encrypt = cbc_encrypt;
++		ops->cit_decrypt = cbc_decrypt;
++		ops->cit_encrypt_iv = cbc_encrypt_iv;
++		ops->cit_decrypt_iv = cbc_decrypt_iv;
++		break;
++		
++	case CRYPTO_TFM_MODE_CFB:
++		ops->cit_encrypt = nocrypt;
++		ops->cit_decrypt = nocrypt;
++		ops->cit_encrypt_iv = nocrypt_iv;
++		ops->cit_decrypt_iv = nocrypt_iv;
++		break;
++	
++	case CRYPTO_TFM_MODE_CTR:
++		ops->cit_encrypt = nocrypt;
++		ops->cit_decrypt = nocrypt;
++		ops->cit_encrypt_iv = nocrypt_iv;
++		ops->cit_decrypt_iv = nocrypt_iv;
++		break;
++
++	default:
++		BUG();
++	}
++	
++	if (ops->cit_mode == CRYPTO_TFM_MODE_CBC) {
++	    	
++	    	switch (crypto_tfm_alg_blocksize(tfm)) {
++	    	case 8:
++	    		ops->cit_xor_block = xor_64;
++	    		break;
++	    		
++	    	case 16:
++	    		ops->cit_xor_block = xor_128;
++	    		break;
++	    		
++	    	default:
++	    		printk(KERN_WARNING "%s: block size %u not supported\n",
++	    		       crypto_tfm_alg_name(tfm),
++	    		       crypto_tfm_alg_blocksize(tfm));
++	    		ret = -EINVAL;
++	    		goto out;
++	    	}
++	    	
++		ops->cit_ivsize = crypto_tfm_alg_blocksize(tfm);
++	    	ops->cit_iv = kmalloc(ops->cit_ivsize, GFP_KERNEL);
++		if (ops->cit_iv == NULL)
++			ret = -ENOMEM;
++	}
++
++out:	
++	return ret;
++}
++
++void crypto_exit_cipher_ops(struct crypto_tfm *tfm)
++{
++	if (tfm->crt_cipher.cit_iv)
++		kfree(tfm->crt_cipher.cit_iv);
++}
+Index: drivers/net/wireless/rtl8187B/ieee80211/compress.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/compress.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,64 @@
++/*
++ * Cryptographic API.
++ *
++ * Compression operations.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option) 
++ * any later version.
++ *
++ */
++#include <linux/types.h>
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++#include <linux/errno.h>
++#include <asm/scatterlist.h>
++#include <linux/string.h>
++#include "internal.h"
++
++static int crypto_compress(struct crypto_tfm *tfm,
++                            const u8 *src, unsigned int slen,
++                            u8 *dst, unsigned int *dlen)
++{
++	return tfm->__crt_alg->cra_compress.coa_compress(crypto_tfm_ctx(tfm),
++	                                                 src, slen, dst,
++	                                                 dlen);
++}
++
++static int crypto_decompress(struct crypto_tfm *tfm,
++                             const u8 *src, unsigned int slen,
++                             u8 *dst, unsigned int *dlen)
++{
++	return tfm->__crt_alg->cra_compress.coa_decompress(crypto_tfm_ctx(tfm),
++	                                                   src, slen, dst,
++	                                                   dlen);
++}
++
++int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags)
++{
++	return flags ? -EINVAL : 0;
++}
++
++int crypto_init_compress_ops(struct crypto_tfm *tfm)
++{
++	int ret = 0;
++	struct compress_tfm *ops = &tfm->crt_compress;
++	
++	ret = tfm->__crt_alg->cra_compress.coa_init(crypto_tfm_ctx(tfm));
++	if (ret)
++		goto out;
++
++	ops->cot_compress = crypto_compress;
++	ops->cot_decompress = crypto_decompress;
++	
++out:
++	return ret;
++}
++
++void crypto_exit_compress_ops(struct crypto_tfm *tfm)
++{
++	tfm->__crt_alg->cra_compress.coa_exit(crypto_tfm_ctx(tfm));
++}
+Index: drivers/net/wireless/rtl8187B/ieee80211/digest.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/digest.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,108 @@
++/*
++ * Cryptographic API.
++ *
++ * Digest operations.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option) 
++ * any later version.
++ *
++ */
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++#include <linux/mm.h>
++#include <linux/errno.h>
++#include <linux/highmem.h>
++#include <asm/scatterlist.h>
++#include "internal.h"
++
++static void init(struct crypto_tfm *tfm)
++{
++	tfm->__crt_alg->cra_digest.dia_init(crypto_tfm_ctx(tfm));
++}
++
++static void update(struct crypto_tfm *tfm,
++                   struct scatterlist *sg, unsigned int nsg)
++{
++	unsigned int i;
++
++	for (i = 0; i < nsg; i++) {
++
++		struct page *pg = sg[i].page;
++		unsigned int offset = sg[i].offset;
++		unsigned int l = sg[i].length;
++
++		do {
++			unsigned int bytes_from_page = min(l, ((unsigned int)
++							   (PAGE_SIZE)) - 
++							   offset);
++			char *p = crypto_kmap(pg, 0) + offset;
++
++			tfm->__crt_alg->cra_digest.dia_update
++					(crypto_tfm_ctx(tfm), p,
++					 bytes_from_page);
++			crypto_kunmap(p, 0);
++			crypto_yield(tfm);
++			offset = 0;
++			pg++;
++			l -= bytes_from_page;
++		} while (l > 0);
++	}
++}
++
++static void final(struct crypto_tfm *tfm, u8 *out)
++{
++	tfm->__crt_alg->cra_digest.dia_final(crypto_tfm_ctx(tfm), out);
++}
++
++static int setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
++{
++	u32 flags;
++	if (tfm->__crt_alg->cra_digest.dia_setkey == NULL)
++		return -ENOSYS;
++	return tfm->__crt_alg->cra_digest.dia_setkey(crypto_tfm_ctx(tfm),
++						     key, keylen, &flags);
++}
++
++static void digest(struct crypto_tfm *tfm,
++                   struct scatterlist *sg, unsigned int nsg, u8 *out)
++{
++	unsigned int i;
++
++	tfm->crt_digest.dit_init(tfm);
++		
++	for (i = 0; i < nsg; i++) {
++		char *p = crypto_kmap(sg[i].page, 0) + sg[i].offset;
++		tfm->__crt_alg->cra_digest.dia_update(crypto_tfm_ctx(tfm),
++		                                      p, sg[i].length);
++		crypto_kunmap(p, 0);
++		crypto_yield(tfm);
++	}
++	crypto_digest_final(tfm, out);
++}
++
++int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags)
++{
++	return flags ? -EINVAL : 0;
++}
++
++int crypto_init_digest_ops(struct crypto_tfm *tfm)
++{
++	struct digest_tfm *ops = &tfm->crt_digest;
++	
++	ops->dit_init	= init;
++	ops->dit_update	= update;
++	ops->dit_final	= final;
++	ops->dit_digest	= digest;
++	ops->dit_setkey	= setkey;
++	
++	return crypto_alloc_hmac_block(tfm);
++}
++
++void crypto_exit_digest_ops(struct crypto_tfm *tfm)
++{
++	crypto_free_hmac_block(tfm);
++}
+Index: drivers/net/wireless/rtl8187B/ieee80211/dot11d.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/dot11d.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,245 @@
++#ifdef ENABLE_DOT11D

++//-----------------------------------------------------------------------------

++//	File:

++//		Dot11d.c

++//

++//	Description:

++//		Implement 802.11d. 

++//

++//-----------------------------------------------------------------------------

++

++#include "dot11d.h"

++

++void

++Dot11d_Init(struct ieee80211_device *ieee)

++{

++	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);

++

++	pDot11dInfo->bEnabled = 0;

++

++	pDot11dInfo->State = DOT11D_STATE_NONE;

++	pDot11dInfo->CountryIeLen = 0;

++	memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);  

++	memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);

++	RESET_CIE_WATCHDOG(ieee);

++

++	//printk("Dot11d_Init()\n");

++}

++

++//

++//	Description:

++//		Reset to the state as we are just entering a regulatory domain.

++//

++void

++Dot11d_Reset(struct ieee80211_device *ieee)

++{

++	u32 i;

++	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);

++

++	// Clear old channel map

++	memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);

++	memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);

++	// Set new channel map

++	for (i=1; i<=11; i++) {

++		(pDot11dInfo->channel_map)[i] = 1;

++	}

++	for (i=12; i<=14; i++) {

++		(pDot11dInfo->channel_map)[i] = 2;

++	}

++

++	pDot11dInfo->State = DOT11D_STATE_NONE;

++	pDot11dInfo->CountryIeLen = 0;

++	RESET_CIE_WATCHDOG(ieee);

++

++	//printk("Dot11d_Reset()\n");

++}

++

++//

++//	Description:

++//		Update country IE from Beacon or Probe Resopnse 

++//		and configure PHY for operation in the regulatory domain.

++//

++//	TODO: 

++//		Configure Tx power.

++//

++//	Assumption:

++//		1. IS_DOT11D_ENABLE() is TRUE.

++//		2. Input IE is an valid one.

++//

++void

++Dot11d_UpdateCountryIe(

++	struct ieee80211_device *dev,

++	u8 *		pTaddr,

++	u16	CoutryIeLen,

++	u8 * pCoutryIe	 

++	)

++{

++	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);

++	u8 i, j, NumTriples, MaxChnlNum;

++	PCHNL_TXPOWER_TRIPLE pTriple;

++

++	if((CoutryIeLen - 3)%3 != 0)

++	{

++		printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");

++		Dot11d_Reset(dev);

++		return;

++	}

++

++	memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);

++	memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);

++	MaxChnlNum = 0;

++	NumTriples = (CoutryIeLen - 3) / 3; // skip 3-byte country string.

++	pTriple = (PCHNL_TXPOWER_TRIPLE)(pCoutryIe + 3);

++	for(i = 0; i < NumTriples; i++)

++	{

++		if(MaxChnlNum >= pTriple->FirstChnl)

++		{ // It is not in a monotonically increasing order, so stop processing.

++			printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");

++			Dot11d_Reset(dev);

++			return; 

++		}

++		if(MAX_CHANNEL_NUMBER < (pTriple->FirstChnl + pTriple->NumChnls))

++		{ // It is not a valid set of channel id, so stop processing.

++			printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");

++			Dot11d_Reset(dev);

++			return; 

++		}

++

++		for(j = 0 ; j < pTriple->NumChnls; j++)

++		{

++			pDot11dInfo->channel_map[pTriple->FirstChnl + j] = 1;

++			pDot11dInfo->MaxTxPwrDbmList[pTriple->FirstChnl + j] = pTriple->MaxTxPowerInDbm;

++			MaxChnlNum = pTriple->FirstChnl + j;

++		}	

++

++		pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3);

++	}

++#if 1

++	//printk("Dot11d_UpdateCountryIe(): Channel List:\n");

++	printk("Channel List:");

++	for(i=1; i<= MAX_CHANNEL_NUMBER; i++)

++		if(pDot11dInfo->channel_map[i] > 0)

++			printk(" %d", i);

++	printk("\n");

++#endif

++

++	UPDATE_CIE_SRC(dev, pTaddr);

++

++	pDot11dInfo->CountryIeLen = CoutryIeLen;

++	memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe,CoutryIeLen);

++	pDot11dInfo->State = DOT11D_STATE_LEARNED;

++}

++

++void dump_chnl_map(u8 * channel_map)

++{

++	int i;

++	printk("Channel List:");

++	for(i=1; i<= MAX_CHANNEL_NUMBER; i++)

++		if(channel_map[i] > 0)

++			printk(" %d(%d)", i, channel_map[i]);

++	printk("\n");

++}

++

++u8

++DOT11D_GetMaxTxPwrInDbm(

++	struct ieee80211_device *dev,

++	u8 Channel

++	)

++{

++	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);

++	u8 MaxTxPwrInDbm = 255;

++

++	if(MAX_CHANNEL_NUMBER < Channel)

++	{ 

++		printk("DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");

++		return MaxTxPwrInDbm; 

++	}

++	if(pDot11dInfo->channel_map[Channel])

++	{

++		MaxTxPwrInDbm = pDot11dInfo->MaxTxPwrDbmList[Channel];	

++	}

++

++	return MaxTxPwrInDbm;

++}

++

++

++void

++DOT11D_ScanComplete(

++	struct ieee80211_device * dev

++	)

++{

++	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);

++

++	switch(pDot11dInfo->State)

++	{

++	case DOT11D_STATE_LEARNED:

++		pDot11dInfo->State = DOT11D_STATE_DONE;

++		break;

++

++	case DOT11D_STATE_DONE:

++		if( GET_CIE_WATCHDOG(dev) == 0 )

++		{ // Reset country IE if previous one is gone. 

++			Dot11d_Reset(dev); 

++		}

++		break;

++	case DOT11D_STATE_NONE:

++		break;

++	}

++}

++

++int IsLegalChannel(

++	struct ieee80211_device * dev,

++	u8 channel

++)

++{

++	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);

++

++	if(MAX_CHANNEL_NUMBER < channel)

++	{ 

++		printk("IsLegalChannel(): Invalid Channel\n");

++		return 0; 

++	}

++	if(pDot11dInfo->channel_map[channel] > 0)

++		return 1;

++	return 0;

++}

++

++int ToLegalChannel(

++	struct ieee80211_device * dev,

++	u8 channel

++)

++{

++	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);

++	u8 default_chn = 0;

++	u32 i = 0;

++

++	for (i=1; i<= MAX_CHANNEL_NUMBER; i++)

++	{

++		if(pDot11dInfo->channel_map[i] > 0)

++		{

++			default_chn = i;

++			break;

++		}

++	}

++

++	if(MAX_CHANNEL_NUMBER < channel)

++	{ 

++		printk("IsLegalChannel(): Invalid Channel\n");

++		return default_chn; 

++	}

++	

++	if(pDot11dInfo->channel_map[channel] > 0)

++		return channel;

++	

++	return default_chn;

++}

++

++EXPORT_SYMBOL(Dot11d_Init);

++EXPORT_SYMBOL(Dot11d_Reset);

++EXPORT_SYMBOL(Dot11d_UpdateCountryIe);

++EXPORT_SYMBOL(DOT11D_GetMaxTxPwrInDbm);

++EXPORT_SYMBOL(DOT11D_ScanComplete);

++EXPORT_SYMBOL(IsLegalChannel);

++EXPORT_SYMBOL(ToLegalChannel);

++#endif

++

+Index: drivers/net/wireless/rtl8187B/ieee80211/dot11d.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/dot11d.h	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,102 @@
++#ifndef __INC_DOT11D_H

++#define __INC_DOT11D_H

++

++#include "ieee80211.h"

++

++//#define ENABLE_DOT11D

++

++//#define DOT11D_MAX_CHNL_NUM 83

++

++typedef struct _CHNL_TXPOWER_TRIPLE {

++	u8 FirstChnl;

++	u8  NumChnls;

++	u8  MaxTxPowerInDbm;

++}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;

++

++typedef enum _DOT11D_STATE {

++	DOT11D_STATE_NONE = 0,

++	DOT11D_STATE_LEARNED,

++	DOT11D_STATE_DONE,

++}DOT11D_STATE;

++

++typedef struct _RT_DOT11D_INFO {

++	//DECLARE_RT_OBJECT(RT_DOT11D_INFO);

++

++	bool bEnabled; // dot11MultiDomainCapabilityEnabled

++

++	u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element.

++	u8  CountryIeBuf[MAX_IE_LEN];

++	u8  CountryIeSrcAddr[6]; // Source AP of the country IE.

++	u8  CountryIeWatchdog; 

++

++	u8  channel_map[MAX_CHANNEL_NUMBER+1];  //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan)

++	//u8  ChnlListLen; // #Bytes valid in ChnlList[].

++	//u8  ChnlList[DOT11D_MAX_CHNL_NUM];

++	u8  MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];

++

++	DOT11D_STATE State;

++}RT_DOT11D_INFO, *PRT_DOT11D_INFO;

++#define eqMacAddr(a,b)		( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )

++#define cpMacAddr(des,src)	      ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])

++#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))

++

++#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled

++#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)

++

++#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) 

++#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)

++

++#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \

++	(((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \

++	FALSE : \

++	(!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))

++

++#define CIE_WATCHDOG_TH 1

++#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog

++#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0 

++#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)

++

++#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)

++

++

++void

++Dot11d_Init(

++	struct ieee80211_device *dev

++	);

++

++void

++Dot11d_Reset(

++	struct ieee80211_device *dev

++	);

++

++void

++Dot11d_UpdateCountryIe(

++	struct ieee80211_device *dev,

++	u8 *		pTaddr,

++	u16	CoutryIeLen,

++	u8 * pCoutryIe	 

++	);

++

++u8

++DOT11D_GetMaxTxPwrInDbm(

++	struct ieee80211_device *dev,

++	u8 Channel

++	);

++

++void

++DOT11D_ScanComplete(

++	struct ieee80211_device * dev

++	);

++

++int IsLegalChannel(

++	struct ieee80211_device * dev,

++	u8 channel

++);

++

++int ToLegalChannel(

++	struct ieee80211_device * dev,

++	u8 channel

++);

++

++void dump_chnl_map(u8 * channel_map);

++#endif // #ifndef __INC_DOT11D_H

+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,273 @@
++/*
++ * Host AP crypto routines
++ *
++ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
++ * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ *
++ */
++
++//#include <linux/config.h>
++#include <linux/version.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <asm/string.h>
++#include <asm/errno.h>
++
++#include "ieee80211.h"
++
++MODULE_AUTHOR("Jouni Malinen");
++MODULE_DESCRIPTION("HostAP crypto");
++MODULE_LICENSE("GPL");
++
++struct ieee80211_crypto_alg {
++	struct list_head list;
++	struct ieee80211_crypto_ops *ops;
++};
++
++
++struct ieee80211_crypto {
++	struct list_head algs;
++	spinlock_t lock;
++};
++
++static struct ieee80211_crypto *hcrypt;
++
++void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
++					   int force)
++{
++	struct list_head *ptr, *n;
++	struct ieee80211_crypt_data *entry;
++
++	for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
++	     ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
++		entry = list_entry(ptr, struct ieee80211_crypt_data, list);
++
++		if (atomic_read(&entry->refcnt) != 0 && !force)
++			continue;
++
++		list_del(ptr);
++
++		if (entry->ops) {
++			entry->ops->deinit(entry->priv);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)		
++			module_put(entry->ops->owner);
++#else
++			__MOD_DEC_USE_COUNT(entry->ops->owner);	
++#endif			
++		}
++		kfree(entry);
++	}
++}
++
++void ieee80211_crypt_deinit_handler(unsigned long data)
++{
++	struct ieee80211_device *ieee = (struct ieee80211_device *)data;
++	unsigned long flags;
++
++	spin_lock_irqsave(&ieee->lock, flags);
++	ieee80211_crypt_deinit_entries(ieee, 0);
++	if (!list_empty(&ieee->crypt_deinit_list)) {
++		printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
++		       "deletion list\n", ieee->dev->name);
++		ieee->crypt_deinit_timer.expires = jiffies + HZ;
++		add_timer(&ieee->crypt_deinit_timer);
++	}
++	spin_unlock_irqrestore(&ieee->lock, flags);
++
++}
++
++void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
++				    struct ieee80211_crypt_data **crypt)
++{
++	struct ieee80211_crypt_data *tmp;
++	unsigned long flags;
++
++	if (*crypt == NULL)
++		return;
++
++	tmp = *crypt;
++	*crypt = NULL;
++
++	/* must not run ops->deinit() while there may be pending encrypt or
++	 * decrypt operations. Use a list of delayed deinits to avoid needing
++	 * locking. */
++
++	spin_lock_irqsave(&ieee->lock, flags);
++	list_add(&tmp->list, &ieee->crypt_deinit_list);
++	if (!timer_pending(&ieee->crypt_deinit_timer)) {
++		ieee->crypt_deinit_timer.expires = jiffies + HZ;
++		add_timer(&ieee->crypt_deinit_timer);
++	}
++	spin_unlock_irqrestore(&ieee->lock, flags);
++}
++
++int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
++{
++	unsigned long flags;
++	struct ieee80211_crypto_alg *alg;
++
++	if (hcrypt == NULL)
++		return -1;
++
++	alg = kmalloc(sizeof(*alg), GFP_KERNEL);
++	if (alg == NULL)
++		return -ENOMEM;
++
++	memset(alg, 0, sizeof(*alg));
++	alg->ops = ops;
++
++	spin_lock_irqsave(&hcrypt->lock, flags);
++	list_add(&alg->list, &hcrypt->algs);
++	spin_unlock_irqrestore(&hcrypt->lock, flags);
++
++	printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n",
++	       ops->name);
++
++	return 0;
++}
++
++int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
++{
++	unsigned long flags;
++	struct list_head *ptr;
++	struct ieee80211_crypto_alg *del_alg = NULL;
++
++	if (hcrypt == NULL)
++		return -1;
++
++	spin_lock_irqsave(&hcrypt->lock, flags);
++	for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
++		struct ieee80211_crypto_alg *alg =
++			(struct ieee80211_crypto_alg *) ptr;
++		if (alg->ops == ops) {
++			list_del(&alg->list);
++			del_alg = alg;
++			break;
++		}
++	}
++	spin_unlock_irqrestore(&hcrypt->lock, flags);
++
++	if (del_alg) {
++		printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
++		       "'%s'\n", ops->name);
++		kfree(del_alg);
++	}
++
++	return del_alg ? 0 : -1;
++}
++
++
++struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name)
++{
++	unsigned long flags;
++	struct list_head *ptr;
++	struct ieee80211_crypto_alg *found_alg = NULL;
++
++	if (hcrypt == NULL)
++		return NULL;
++
++	spin_lock_irqsave(&hcrypt->lock, flags);
++	for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
++		struct ieee80211_crypto_alg *alg =
++			(struct ieee80211_crypto_alg *) ptr;
++		if (strcmp(alg->ops->name, name) == 0) {
++			found_alg = alg;
++			break;
++		}
++	}
++	spin_unlock_irqrestore(&hcrypt->lock, flags);
++
++	if (found_alg)
++		return found_alg->ops;
++	else
++		return NULL;
++}
++
++
++static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }
++static void ieee80211_crypt_null_deinit(void *priv) {}
++
++static struct ieee80211_crypto_ops ieee80211_crypt_null = {
++	.name			= "NULL",
++	.init			= ieee80211_crypt_null_init,
++	.deinit			= ieee80211_crypt_null_deinit,
++	.encrypt_mpdu		= NULL,
++	.decrypt_mpdu		= NULL,
++	.encrypt_msdu		= NULL,
++	.decrypt_msdu		= NULL,
++	.set_key		= NULL,
++	.get_key		= NULL,
++	.extra_prefix_len	= 0,
++	.extra_postfix_len	= 0,
++	.owner			= THIS_MODULE,
++};
++
++
++static int __init ieee80211_crypto_init(void)
++{
++	int ret = -ENOMEM;
++
++	hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL);
++	if (!hcrypt)
++		goto out;
++
++	memset(hcrypt, 0, sizeof(*hcrypt));
++	INIT_LIST_HEAD(&hcrypt->algs);
++	spin_lock_init(&hcrypt->lock);
++
++	ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null);
++	if (ret < 0) {
++		kfree(hcrypt);
++		hcrypt = NULL;
++	}
++out:
++	return ret;
++}
++
++
++static void __exit ieee80211_crypto_deinit(void)
++{
++	struct list_head *ptr, *n;
++
++	if (hcrypt == NULL)
++		return;
++
++	for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs;
++	     ptr = n, n = ptr->next) {
++		struct ieee80211_crypto_alg *alg =
++			(struct ieee80211_crypto_alg *) ptr;
++		list_del(ptr);
++		printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
++		       "'%s' (deinit)\n", alg->ops->name);
++		kfree(alg);
++	}
++
++	kfree(hcrypt);
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(ieee80211_crypt_deinit_entries);
++EXPORT_SYMBOL(ieee80211_crypt_deinit_handler);
++EXPORT_SYMBOL(ieee80211_crypt_delayed_deinit);
++
++EXPORT_SYMBOL(ieee80211_register_crypto_ops);
++EXPORT_SYMBOL(ieee80211_unregister_crypto_ops);
++EXPORT_SYMBOL(ieee80211_get_crypto_ops);
++#else
++EXPORT_SYMBOL_NOVERS(ieee80211_crypt_deinit_entries);
++EXPORT_SYMBOL_NOVERS(ieee80211_crypt_deinit_handler);
++EXPORT_SYMBOL_NOVERS(ieee80211_crypt_delayed_deinit);
++
++EXPORT_SYMBOL_NOVERS(ieee80211_register_crypto_ops);
++EXPORT_SYMBOL_NOVERS(ieee80211_unregister_crypto_ops);
++EXPORT_SYMBOL_NOVERS(ieee80211_get_crypto_ops);
++#endif
++
++module_init(ieee80211_crypto_init);
++module_exit(ieee80211_crypto_deinit);
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt_ccmp.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt_ccmp.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,523 @@
++/*
++ * Host AP crypt: host-based CCMP encryption implementation for Host AP driver
++ *
++ * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ */
++
++//#include <linux/config.h>
++#include <linux/version.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/random.h>
++#include <linux/skbuff.h>
++#include <linux/netdevice.h>
++#include <linux/if_ether.h>
++#include <linux/if_arp.h>
++#include <asm/string.h>
++#include <linux/wireless.h>
++
++#include "ieee80211.h"
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
++#include "rtl_crypto.h"
++#else
++#include <linux/crypto.h>
++#endif
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) 
++    #include <asm/scatterlist.h>
++#else
++    #include <linux/scatterlist.h>
++#endif
++
++//#include <asm/scatterlist.h>
++
++MODULE_AUTHOR("Jouni Malinen");
++MODULE_DESCRIPTION("Host AP crypt: CCMP");
++MODULE_LICENSE("GPL");
++
++#define AES_BLOCK_LEN 16
++#define CCMP_HDR_LEN 8
++#define CCMP_MIC_LEN 8
++#define CCMP_TK_LEN 16
++#define CCMP_PN_LEN 6
++
++struct ieee80211_ccmp_data {
++	u8 key[CCMP_TK_LEN];
++	int key_set;
++
++	u8 tx_pn[CCMP_PN_LEN];
++	u8 rx_pn[CCMP_PN_LEN];
++
++	u32 dot11RSNAStatsCCMPFormatErrors;
++	u32 dot11RSNAStatsCCMPReplays;
++	u32 dot11RSNAStatsCCMPDecryptErrors;
++
++	int key_idx;
++
++	struct crypto_tfm *tfm;
++
++	/* scratch buffers for virt_to_page() (crypto API) */
++	u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
++		tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
++	u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
++};
++
++void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,
++			     const u8 pt[16], u8 ct[16])
++{
++      #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	struct scatterlist src, dst;
++
++	src.page = virt_to_page(pt);
++	src.offset = offset_in_page(pt);
++	src.length = AES_BLOCK_LEN;
++
++	dst.page = virt_to_page(ct);
++	dst.offset = offset_in_page(ct);
++	dst.length = AES_BLOCK_LEN;
++
++	crypto_cipher_encrypt(tfm, &dst, &src, AES_BLOCK_LEN);
++	#else
++	crypto_cipher_encrypt_one((void*)tfm, ct, pt);
++	#endif 
++}
++
++static void * ieee80211_ccmp_init(int key_idx)
++{
++	struct ieee80211_ccmp_data *priv;
++
++	priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
++	if (priv == NULL)
++		goto fail;
++	memset(priv, 0, sizeof(*priv));
++	priv->key_idx = key_idx;
++
++       #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	priv->tfm = crypto_alloc_tfm("aes", 0);
++	if (priv->tfm == NULL) {
++		printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate "
++		       "crypto API aes\n");
++		goto fail;
++	}
++       #else
++       priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
++	if (IS_ERR(priv->tfm)) {
++		printk(KERN_DEBUG "ieee80211_crypt_ccmp: could not allocate "
++		       "crypto API aes\n");
++		priv->tfm = NULL;
++		goto fail;
++	}
++	#endif
++	return priv;
++
++fail:
++	if (priv) {
++		if (priv->tfm)
++			#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++			crypto_free_tfm(priv->tfm);
++                    #else
++			crypto_free_cipher((void*)priv->tfm);
++		      #endif
++		kfree(priv);
++	}
++
++	return NULL;
++}
++
++
++static void ieee80211_ccmp_deinit(void *priv)
++{
++	struct ieee80211_ccmp_data *_priv = priv;
++	if (_priv && _priv->tfm)
++		#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++		crypto_free_tfm(_priv->tfm);
++             #else
++		crypto_free_cipher((void*)_priv->tfm);
++		#endif
++	kfree(priv);
++}
++
++
++static inline void xor_block(u8 *b, u8 *a, size_t len)
++{
++	int i;
++	for (i = 0; i < len; i++)
++		b[i] ^= a[i];
++}
++
++#ifndef JOHN_CCMP
++static void ccmp_init_blocks(struct crypto_tfm *tfm,
++			     struct ieee80211_hdr *hdr,
++			     u8 *pn, size_t dlen, u8 *b0, u8 *auth,
++			     u8 *s0)
++{
++	u8 *pos, qc = 0;
++	size_t aad_len;
++	u16 fc;
++	int a4_included, qc_included;
++	u8 aad[2 * AES_BLOCK_LEN];
++
++	fc = le16_to_cpu(hdr->frame_ctl);
++	a4_included = ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
++		       (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS));
++	/*
++	qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
++		       (WLAN_FC_GET_STYPE(fc) & 0x08));
++        */		       
++	// fixed by David :2006.9.6
++	qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
++		       (WLAN_FC_GET_STYPE(fc) & 0x80));
++	aad_len = 22;
++	if (a4_included)
++		aad_len += 6;
++	if (qc_included) {
++		pos = (u8 *) &hdr->addr4;
++		if (a4_included)
++			pos += 6;
++		qc = *pos & 0x0f;
++		aad_len += 2;
++	}
++	/* CCM Initial Block:
++	 * Flag (Include authentication header, M=3 (8-octet MIC),
++	 *       L=1 (2-octet Dlen))
++	 * Nonce: 0x00 | A2 | PN
++	 * Dlen */
++	b0[0] = 0x59;
++	b0[1] = qc;
++	memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
++	memcpy(b0 + 8, pn, CCMP_PN_LEN);
++	b0[14] = (dlen >> 8) & 0xff;
++	b0[15] = dlen & 0xff;
++
++	/* AAD:
++	 * FC with bits 4..6 and 11..13 masked to zero; 14 is always one
++	 * A1 | A2 | A3
++	 * SC with bits 4..15 (seq#) masked to zero
++	 * A4 (if present)
++	 * QC (if present)
++	 */
++	pos = (u8 *) hdr;
++	aad[0] = 0; /* aad_len >> 8 */
++	aad[1] = aad_len & 0xff;
++	aad[2] = pos[0] & 0x8f;
++	aad[3] = pos[1] & 0xc7;
++	memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
++	pos = (u8 *) &hdr->seq_ctl;
++	aad[22] = pos[0] & 0x0f;
++	aad[23] = 0; /* all bits masked */
++	memset(aad + 24, 0, 8);
++	if (a4_included)
++		memcpy(aad + 24, hdr->addr4, ETH_ALEN);
++	if (qc_included) {
++		aad[a4_included ? 30 : 24] = qc;
++		/* rest of QC masked */
++	}
++
++	/* Start with the first block and AAD */
++	ieee80211_ccmp_aes_encrypt(tfm, b0, auth);
++	xor_block(auth, aad, AES_BLOCK_LEN);
++	ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
++	xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
++	ieee80211_ccmp_aes_encrypt(tfm, auth, auth);
++	b0[0] &= 0x07;
++	b0[14] = b0[15] = 0;
++	ieee80211_ccmp_aes_encrypt(tfm, b0, s0);
++}
++#endif
++
++static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
++{
++	struct ieee80211_ccmp_data *key = priv;
++	int data_len, i;
++	u8 *pos;
++	struct ieee80211_hdr *hdr;
++#ifndef JOHN_CCMP
++	int blocks, last, len;
++	u8 *mic;
++	u8 *b0 = key->tx_b0;
++	u8 *b = key->tx_b;
++	u8 *e = key->tx_e;
++	u8 *s0 = key->tx_s0;
++#endif
++	if (skb_headroom(skb) < CCMP_HDR_LEN ||
++	    skb_tailroom(skb) < CCMP_MIC_LEN ||
++	    skb->len < hdr_len)
++		return -1;
++
++	data_len = skb->len - hdr_len;
++	pos = skb_push(skb, CCMP_HDR_LEN);
++	memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
++	pos += hdr_len;
++//	mic = skb_put(skb, CCMP_MIC_LEN);
++
++	i = CCMP_PN_LEN - 1;
++	while (i >= 0) {
++		key->tx_pn[i]++;
++		if (key->tx_pn[i] != 0)
++			break;
++		i--;
++	}
++
++	*pos++ = key->tx_pn[5];
++	*pos++ = key->tx_pn[4];
++	*pos++ = 0;
++	*pos++ = (key->key_idx << 6) | (1 << 5) /* Ext IV included */;
++	*pos++ = key->tx_pn[3];
++	*pos++ = key->tx_pn[2];
++	*pos++ = key->tx_pn[1];
++	*pos++ = key->tx_pn[0];
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++#ifndef JOHN_CCMP
++	//mic is moved to here by john
++	mic = skb_put(skb, CCMP_MIC_LEN);
++	
++	ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
++
++	blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
++	last = data_len % AES_BLOCK_LEN;
++
++	for (i = 1; i <= blocks; i++) {
++		len = (i == blocks && last) ? last : AES_BLOCK_LEN;
++		/* Authentication */
++		xor_block(b, pos, len);
++		ieee80211_ccmp_aes_encrypt(key->tfm, b, b);
++		/* Encryption, with counter */
++		b0[14] = (i >> 8) & 0xff;
++		b0[15] = i & 0xff;
++		ieee80211_ccmp_aes_encrypt(key->tfm, b0, e);
++		xor_block(pos, e, len);
++		pos += len;
++	}
++
++	for (i = 0; i < CCMP_MIC_LEN; i++)
++		mic[i] = b[i] ^ s0[i];
++#endif
++	return 0;
++}
++
++
++static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
++{
++	struct ieee80211_ccmp_data *key = priv;
++	u8 keyidx, *pos;
++	struct ieee80211_hdr *hdr;
++	u8 pn[6];
++#ifndef JOHN_CCMP
++	size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
++	u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
++	u8 *b0 = key->rx_b0;
++	u8 *b = key->rx_b;
++	u8 *a = key->rx_a;
++	int i, blocks, last, len;
++#endif
++	if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
++		key->dot11RSNAStatsCCMPFormatErrors++;
++		return -1;
++	}
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++	pos = skb->data + hdr_len;
++	keyidx = pos[3];
++	if (!(keyidx & (1 << 5))) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "CCMP: received packet without ExtIV"
++			       " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
++		}
++		key->dot11RSNAStatsCCMPFormatErrors++;
++		return -2;
++	}
++	keyidx >>= 6;
++	if (key->key_idx != keyidx) {
++		printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame "
++		       "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
++		return -6;
++	}
++	if (!key->key_set) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT
++			       " with keyid=%d that does not have a configured"
++			       " key\n", MAC_ARG(hdr->addr2), keyidx);
++		}
++		return -3;
++	}
++
++	pn[0] = pos[7];
++	pn[1] = pos[6];
++	pn[2] = pos[5];
++	pn[3] = pos[4];
++	pn[4] = pos[1];
++	pn[5] = pos[0];
++	pos += 8;
++#if 0
++	if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT
++			       " previous PN %02x%02x%02x%02x%02x%02x "
++			       "received PN %02x%02x%02x%02x%02x%02x\n",
++			       MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn),
++			       MAC_ARG(pn));
++		}
++		key->dot11RSNAStatsCCMPReplays++;
++		return -4;
++	}
++#endif
++#ifndef JOHN_CCMP
++	ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
++	xor_block(mic, b, CCMP_MIC_LEN);
++
++	blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
++	last = data_len % AES_BLOCK_LEN;
++
++	for (i = 1; i <= blocks; i++) {
++		len = (i == blocks && last) ? last : AES_BLOCK_LEN;
++		/* Decrypt, with counter */
++		b0[14] = (i >> 8) & 0xff;
++		b0[15] = i & 0xff;
++		ieee80211_ccmp_aes_encrypt(key->tfm, b0, b);
++		xor_block(pos, b, len);
++		/* Authentication */
++		xor_block(a, pos, len);
++		ieee80211_ccmp_aes_encrypt(key->tfm, a, a);
++		pos += len;
++	}
++
++	if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "CCMP: decrypt failed: STA="
++			       MAC_FMT "\n", MAC_ARG(hdr->addr2));
++		}
++		key->dot11RSNAStatsCCMPDecryptErrors++;
++		return -5;
++	}
++
++	memcpy(key->rx_pn, pn, CCMP_PN_LEN);
++
++#endif
++	/* Remove hdr and MIC */
++	memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
++	skb_pull(skb, CCMP_HDR_LEN);
++	skb_trim(skb, skb->len - CCMP_MIC_LEN);
++
++	return keyidx;
++}
++
++
++static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
++{
++	struct ieee80211_ccmp_data *data = priv;
++	int keyidx;
++	struct crypto_tfm *tfm = data->tfm;
++
++	keyidx = data->key_idx;
++	memset(data, 0, sizeof(*data));
++	data->key_idx = keyidx;
++	data->tfm = tfm;
++	if (len == CCMP_TK_LEN) {
++		memcpy(data->key, key, CCMP_TK_LEN);
++		data->key_set = 1;
++		if (seq) {
++			data->rx_pn[0] = seq[5];
++			data->rx_pn[1] = seq[4];
++			data->rx_pn[2] = seq[3];
++			data->rx_pn[3] = seq[2];
++			data->rx_pn[4] = seq[1];
++			data->rx_pn[5] = seq[0];
++		}
++		crypto_cipher_setkey((void*)data->tfm, data->key, CCMP_TK_LEN);
++	} else if (len == 0)
++		data->key_set = 0;
++	else
++		return -1;
++
++	return 0;
++}
++
++
++static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
++{
++	struct ieee80211_ccmp_data *data = priv;
++
++	if (len < CCMP_TK_LEN)
++		return -1;
++
++	if (!data->key_set)
++		return 0;
++	memcpy(key, data->key, CCMP_TK_LEN);
++
++	if (seq) {
++		seq[0] = data->tx_pn[5];
++		seq[1] = data->tx_pn[4];
++		seq[2] = data->tx_pn[3];
++		seq[3] = data->tx_pn[2];
++		seq[4] = data->tx_pn[1];
++		seq[5] = data->tx_pn[0];
++	}
++
++	return CCMP_TK_LEN;
++}
++
++
++static char * ieee80211_ccmp_print_stats(char *p, void *priv)
++{
++	struct ieee80211_ccmp_data *ccmp = priv;
++	p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
++		     "tx_pn=%02x%02x%02x%02x%02x%02x "
++		     "rx_pn=%02x%02x%02x%02x%02x%02x "
++		     "format_errors=%d replays=%d decrypt_errors=%d\n",
++		     ccmp->key_idx, ccmp->key_set,
++		     MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn),
++		     ccmp->dot11RSNAStatsCCMPFormatErrors,
++		     ccmp->dot11RSNAStatsCCMPReplays,
++		     ccmp->dot11RSNAStatsCCMPDecryptErrors);
++
++	return p;
++}
++
++void ieee80211_ccmp_null(void)
++{
++  //  printk("============>%s()\n", __FUNCTION__);
++	return;
++}
++static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = {
++	.name			= "CCMP",
++	.init			= ieee80211_ccmp_init,
++	.deinit			= ieee80211_ccmp_deinit,
++	.encrypt_mpdu		= ieee80211_ccmp_encrypt,
++	.decrypt_mpdu		= ieee80211_ccmp_decrypt,
++	.encrypt_msdu		= NULL,
++	.decrypt_msdu		= NULL,
++	.set_key		= ieee80211_ccmp_set_key,
++	.get_key		= ieee80211_ccmp_get_key,
++	.print_stats		= ieee80211_ccmp_print_stats,
++	.extra_prefix_len	= CCMP_HDR_LEN,
++	.extra_postfix_len	= CCMP_MIC_LEN,
++	.owner			= THIS_MODULE,
++};
++
++
++static int __init ieee80211_crypto_ccmp_init(void)
++{
++	return ieee80211_register_crypto_ops(&ieee80211_crypt_ccmp);
++}
++
++
++static void __exit ieee80211_crypto_ccmp_exit(void)
++{
++	ieee80211_unregister_crypto_ops(&ieee80211_crypt_ccmp);
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(ieee80211_ccmp_null);
++#else
++EXPORT_SYMBOL_NOVERS(ieee80211_ccmp_null);
++#endif
++
++module_init(ieee80211_crypto_ccmp_init);
++module_exit(ieee80211_crypto_ccmp_exit);
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt.h	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,91 @@
++/*
++ * Original code based on Host AP (software wireless LAN access point) driver
++ * for Intersil Prism2/2.5/3.
++ *
++ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
++ * <jkmaline@cc.hut.fi>
++ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
++ *
++ * Adaption to a generic IEEE 802.11 stack by James Ketrenos
++ * <jketreno@linux.intel.com>
++ *
++ * Copyright (c) 2004, Intel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ */
++
++/*
++ * This file defines the interface to the ieee80211 crypto module.
++ */
++#ifndef IEEE80211_CRYPT_H
++#define IEEE80211_CRYPT_H
++
++#include <linux/skbuff.h>
++
++struct ieee80211_crypto_ops {
++	const char *name;
++
++	/* init new crypto context (e.g., allocate private data space,
++	 * select IV, etc.); returns NULL on failure or pointer to allocated
++	 * private data on success */
++	void * (*init)(int keyidx);
++
++	/* deinitialize crypto context and free allocated private data */
++	void (*deinit)(void *priv);
++
++	/* encrypt/decrypt return < 0 on error or >= 0 on success. The return
++	 * value from decrypt_mpdu is passed as the keyidx value for
++	 * decrypt_msdu. skb must have enough head and tail room for the
++	 * encryption; if not, error will be returned; these functions are
++	 * called for all MPDUs (i.e., fragments).
++	 */
++	int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
++	int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
++
++	/* These functions are called for full MSDUs, i.e. full frames.
++	 * These can be NULL if full MSDU operations are not needed. */
++	int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
++	int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
++			    void *priv);
++
++	int (*set_key)(void *key, int len, u8 *seq, void *priv);
++	int (*get_key)(void *key, int len, u8 *seq, void *priv);
++
++	/* procfs handler for printing out key information and possible
++	 * statistics */
++	char * (*print_stats)(char *p, void *priv);
++
++	/* maximum number of bytes added by encryption; encrypt buf is
++	 * allocated with extra_prefix_len bytes, copy of in_buf, and
++	 * extra_postfix_len; encrypt need not use all this space, but
++	 * the result must start at the beginning of the buffer and correct
++	 * length must be returned */
++	int extra_prefix_len, extra_postfix_len;
++
++	struct module *owner;
++};
++
++struct ieee80211_crypt_data {
++	struct list_head list; /* delayed deletion list */
++	struct ieee80211_crypto_ops *ops;
++	void *priv;
++	atomic_t refcnt;
++};
++
++int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
++int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
++struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name);
++void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
++void ieee80211_crypt_deinit_handler(unsigned long);
++void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
++				    struct ieee80211_crypt_data **crypt);
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
++#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
++#define crypto_alloc_tfm crypto_alloc_tfm_rtl
++#define crypto_free_tfm crypto_free_tfm_rtl
++#endif
++
++#endif
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt_tkip.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt_tkip.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,993 @@
++/*
++ * Host AP crypt: host-based TKIP encryption implementation for Host AP driver
++ *
++ * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ */
++
++//#include <linux/config.h>
++#include <linux/version.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/random.h>
++#include <linux/skbuff.h>
++#include <linux/netdevice.h>
++#include <linux/if_ether.h>
++#include <linux/if_arp.h>
++#include <asm/string.h>
++
++#include "ieee80211.h"
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
++#include "rtl_crypto.h"
++#else
++#include <linux/crypto.h>
++#endif
++//#include <asm/scatterlist.h>
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) 
++    #include <asm/scatterlist.h>
++#else
++    #include <linux/scatterlist.h>
++#endif
++
++#include <linux/crc32.h>
++
++MODULE_AUTHOR("Jouni Malinen");
++MODULE_DESCRIPTION("Host AP crypt: TKIP");
++MODULE_LICENSE("GPL");
++
++struct ieee80211_tkip_data {
++#define TKIP_KEY_LEN 32
++	u8 key[TKIP_KEY_LEN];
++	int key_set;
++
++	u32 tx_iv32;
++	u16 tx_iv16;
++	u16 tx_ttak[5];
++	int tx_phase1_done;
++
++	u32 rx_iv32;
++	u16 rx_iv16;
++	u16 rx_ttak[5];
++	int rx_phase1_done;
++	u32 rx_iv32_new;
++	u16 rx_iv16_new;
++
++	u32 dot11RSNAStatsTKIPReplays;
++	u32 dot11RSNAStatsTKIPICVErrors;
++	u32 dot11RSNAStatsTKIPLocalMICFailures;
++
++	int key_idx;
++
++       #if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
++	   	struct crypto_blkcipher *rx_tfm_arc4;
++	       struct crypto_hash *rx_tfm_michael;
++	       struct crypto_blkcipher *tx_tfm_arc4;
++	       struct crypto_hash *tx_tfm_michael;
++       #endif
++
++	struct crypto_tfm *tfm_arc4;
++	struct crypto_tfm *tfm_michael;
++
++	/* scratch buffers for virt_to_page() (crypto API) */
++	u8 rx_hdr[16], tx_hdr[16];
++};
++
++static void * ieee80211_tkip_init(int key_idx)
++{
++	struct ieee80211_tkip_data *priv;
++
++	priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
++	if (priv == NULL)
++		goto fail;
++	memset(priv, 0, sizeof(*priv));
++	priv->key_idx = key_idx;
++
++      #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	priv->tfm_arc4 = crypto_alloc_tfm("arc4", 0);
++	if (priv->tfm_arc4 == NULL) {
++		printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
++		       "crypto API arc4\n");
++		goto fail;
++	}
++
++	priv->tfm_michael = crypto_alloc_tfm("michael_mic", 0);
++	if (priv->tfm_michael == NULL) {
++		printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
++		       "crypto API michael_mic\n");
++		goto fail;
++	}
++
++	#else
++	priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
++						CRYPTO_ALG_ASYNC);
++	if (IS_ERR(priv->tx_tfm_arc4)) {
++		printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
++		       "crypto API arc4\n");
++		priv->tx_tfm_arc4 = NULL;
++		goto fail;
++	}
++
++	priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
++						 CRYPTO_ALG_ASYNC);
++	if (IS_ERR(priv->tx_tfm_michael)) {
++		printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
++		       "crypto API michael_mic\n");
++		priv->tx_tfm_michael = NULL;
++		goto fail;
++	}
++
++	priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
++						CRYPTO_ALG_ASYNC);
++	if (IS_ERR(priv->rx_tfm_arc4)) {
++		printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
++		       "crypto API arc4\n");
++		priv->rx_tfm_arc4 = NULL;
++		goto fail;
++	}
++
++	priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
++						 CRYPTO_ALG_ASYNC);
++	if (IS_ERR(priv->rx_tfm_michael)) {
++		printk(KERN_DEBUG "ieee80211_crypt_tkip: could not allocate "
++		       "crypto API michael_mic\n");
++		priv->rx_tfm_michael = NULL;
++		goto fail;
++	}
++       #endif
++	return priv;
++
++fail:
++	if (priv) {
++		#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++		if (priv->tfm_michael)
++			crypto_free_tfm(priv->tfm_michael);
++		if (priv->tfm_arc4)
++			crypto_free_tfm(priv->tfm_arc4);
++             #else
++		if (priv->tx_tfm_michael)
++			crypto_free_hash(priv->tx_tfm_michael);
++		if (priv->tx_tfm_arc4)
++			crypto_free_blkcipher(priv->tx_tfm_arc4);
++		if (priv->rx_tfm_michael)
++			crypto_free_hash(priv->rx_tfm_michael);
++		if (priv->rx_tfm_arc4)
++			crypto_free_blkcipher(priv->rx_tfm_arc4);
++		#endif
++		kfree(priv);
++	}
++
++	return NULL;
++}
++
++
++static void ieee80211_tkip_deinit(void *priv)
++{
++	struct ieee80211_tkip_data *_priv = priv;
++	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	if (_priv && _priv->tfm_michael)
++		crypto_free_tfm(_priv->tfm_michael);
++	if (_priv && _priv->tfm_arc4)
++		crypto_free_tfm(_priv->tfm_arc4);
++	#else
++	if (_priv) {
++		if (_priv->tx_tfm_michael)
++			crypto_free_hash(_priv->tx_tfm_michael);
++		if (_priv->tx_tfm_arc4)
++			crypto_free_blkcipher(_priv->tx_tfm_arc4);
++		if (_priv->rx_tfm_michael)
++			crypto_free_hash(_priv->rx_tfm_michael);
++		if (_priv->rx_tfm_arc4)
++			crypto_free_blkcipher(_priv->rx_tfm_arc4);
++	}
++	#endif
++	kfree(priv);
++}
++
++
++static inline u16 RotR1(u16 val)
++{
++	return (val >> 1) | (val << 15);
++}
++
++
++static inline u8 Lo8(u16 val)
++{
++	return val & 0xff;
++}
++
++
++static inline u8 Hi8(u16 val)
++{
++	return val >> 8;
++}
++
++
++static inline u16 Lo16(u32 val)
++{
++	return val & 0xffff;
++}
++
++
++static inline u16 Hi16(u32 val)
++{
++	return val >> 16;
++}
++
++
++static inline u16 Mk16(u8 hi, u8 lo)
++{
++	return lo | (((u16) hi) << 8);
++}
++
++
++static inline u16 Mk16_le(u16 *v)
++{
++	return le16_to_cpu(*v);
++}
++
++
++static const u16 Sbox[256] =
++{
++	0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
++	0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
++	0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
++	0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
++	0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
++	0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
++	0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
++	0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
++	0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
++	0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
++	0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
++	0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
++	0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
++	0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
++	0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
++	0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
++	0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
++	0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
++	0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
++	0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
++	0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
++	0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
++	0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
++	0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
++	0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
++	0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
++	0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
++	0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
++	0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
++	0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
++	0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
++	0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
++};
++
++
++static inline u16 _S_(u16 v)
++{
++	u16 t = Sbox[Hi8(v)];
++	return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8));
++}
++
++#ifndef JOHN_TKIP
++#define PHASE1_LOOP_COUNT 8
++
++static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
++{
++	int i, j;
++
++	/* Initialize the 80-bit TTAK from TSC (IV32) and TA[0..5] */
++	TTAK[0] = Lo16(IV32);
++	TTAK[1] = Hi16(IV32);
++	TTAK[2] = Mk16(TA[1], TA[0]);
++	TTAK[3] = Mk16(TA[3], TA[2]);
++	TTAK[4] = Mk16(TA[5], TA[4]);
++
++	for (i = 0; i < PHASE1_LOOP_COUNT; i++) {
++		j = 2 * (i & 1);
++		TTAK[0] += _S_(TTAK[4] ^ Mk16(TK[1 + j], TK[0 + j]));
++		TTAK[1] += _S_(TTAK[0] ^ Mk16(TK[5 + j], TK[4 + j]));
++		TTAK[2] += _S_(TTAK[1] ^ Mk16(TK[9 + j], TK[8 + j]));
++		TTAK[3] += _S_(TTAK[2] ^ Mk16(TK[13 + j], TK[12 + j]));
++		TTAK[4] += _S_(TTAK[3] ^ Mk16(TK[1 + j], TK[0 + j])) + i;
++	}
++}
++
++
++static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,
++			       u16 IV16)
++{
++	/* Make temporary area overlap WEP seed so that the final copy can be
++	 * avoided on little endian hosts. */
++	u16 *PPK = (u16 *) &WEPSeed[4];
++
++	/* Step 1 - make copy of TTAK and bring in TSC */
++	PPK[0] = TTAK[0];
++	PPK[1] = TTAK[1];
++	PPK[2] = TTAK[2];
++	PPK[3] = TTAK[3];
++	PPK[4] = TTAK[4];
++	PPK[5] = TTAK[4] + IV16;
++
++	/* Step 2 - 96-bit bijective mixing using S-box */
++	PPK[0] += _S_(PPK[5] ^ Mk16_le((u16 *) &TK[0]));
++	PPK[1] += _S_(PPK[0] ^ Mk16_le((u16 *) &TK[2]));
++	PPK[2] += _S_(PPK[1] ^ Mk16_le((u16 *) &TK[4]));
++	PPK[3] += _S_(PPK[2] ^ Mk16_le((u16 *) &TK[6]));
++	PPK[4] += _S_(PPK[3] ^ Mk16_le((u16 *) &TK[8]));
++	PPK[5] += _S_(PPK[4] ^ Mk16_le((u16 *) &TK[10]));
++
++	PPK[0] += RotR1(PPK[5] ^ Mk16_le((u16 *) &TK[12]));
++	PPK[1] += RotR1(PPK[0] ^ Mk16_le((u16 *) &TK[14]));
++	PPK[2] += RotR1(PPK[1]);
++	PPK[3] += RotR1(PPK[2]);
++	PPK[4] += RotR1(PPK[3]);
++	PPK[5] += RotR1(PPK[4]);
++
++	/* Step 3 - bring in last of TK bits, assign 24-bit WEP IV value
++	 * WEPSeed[0..2] is transmitted as WEP IV */
++	WEPSeed[0] = Hi8(IV16);
++	WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
++	WEPSeed[2] = Lo8(IV16);
++	WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((u16 *) &TK[0])) >> 1);
++
++#ifdef __BIG_ENDIAN
++	{
++		int i;
++		for (i = 0; i < 6; i++)
++			PPK[i] = (PPK[i] << 8) | (PPK[i] >> 8);
++	}
++#endif
++}
++#endif
++static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
++{
++        struct ieee80211_tkip_data *tkey = priv;
++        #if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
++        struct blkcipher_desc desc = {.tfm = tkey->tx_tfm_arc4};
++        #endif
++	int len;
++	u8  *pos;
++	struct ieee80211_hdr *hdr;
++#ifndef JOHN_TKIP
++	u8 rc4key[16],*icv;
++	u32 crc;
++	struct scatterlist sg;
++#endif	
++	#if(LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,21))
++	  int ret;
++	#endif
++
++	if (skb_headroom(skb) < 8 || skb_tailroom(skb) < 4 ||
++	    skb->len < hdr_len)
++		return -1;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++#if 0
++printk("@@ tkey\n");
++printk("%x|", ((u32*)tkey->key)[0]);
++printk("%x|", ((u32*)tkey->key)[1]);
++printk("%x|", ((u32*)tkey->key)[2]);
++printk("%x|", ((u32*)tkey->key)[3]);
++printk("%x|", ((u32*)tkey->key)[4]);
++printk("%x|", ((u32*)tkey->key)[5]);
++printk("%x|", ((u32*)tkey->key)[6]);
++printk("%x\n", ((u32*)tkey->key)[7]);
++#endif
++
++#ifndef JOHN_TKIP
++	if (!tkey->tx_phase1_done) {
++		tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
++				   tkey->tx_iv32);
++		tkey->tx_phase1_done = 1;
++	}
++	tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
++
++#else
++	tkey->tx_phase1_done = 1;
++#endif  /*JOHN_TKIP*/
++	
++	len = skb->len - hdr_len;
++	pos = skb_push(skb, 8);
++	memmove(pos, pos + 8, hdr_len);
++	pos += hdr_len;
++
++#ifdef JOHN_TKIP
++	*pos++ = Hi8(tkey->tx_iv16);
++	*pos++ = (Hi8(tkey->tx_iv16) | 0x20) & 0x7F;
++	*pos++ = Lo8(tkey->tx_iv16);
++#else
++	*pos++ = rc4key[0];
++	*pos++ = rc4key[1];
++	*pos++ = rc4key[2];
++#endif
++	*pos++ = (tkey->key_idx << 6) | (1 << 5) /* Ext IV included */;
++	*pos++ = tkey->tx_iv32 & 0xff;
++	*pos++ = (tkey->tx_iv32 >> 8) & 0xff;
++	*pos++ = (tkey->tx_iv32 >> 16) & 0xff;
++	*pos++ = (tkey->tx_iv32 >> 24) & 0xff;
++#ifndef JOHN_TKIP
++	icv = skb_put(skb, 4);
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++	crc = ~crc32_le(~0, pos, len);
++#else
++	crc = ~ether_crc_le(len, pos);
++#endif
++	icv[0] = crc;
++	icv[1] = crc >> 8;
++	icv[2] = crc >> 16;
++	icv[3] = crc >> 24;
++      #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	crypto_cipher_setkey(tkey->tfm_arc4, rc4key, 16);
++	sg.page = virt_to_page(pos);
++	sg.offset = offset_in_page(pos);
++	sg.length = len + 4;
++	crypto_cipher_encrypt(tkey->tfm_arc4, &sg, &sg, len + 4);
++      #else
++	crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
++	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
++	sg.page = virt_to_page(pos);
++	sg.offset = offset_in_page(pos);
++	sg.length = len + 4;
++	#else
++	sg_init_one(&sg, pos, len + 4);
++	#endif	
++	ret= crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
++      #endif
++#endif
++	tkey->tx_iv16++;
++	if (tkey->tx_iv16 == 0) {
++		tkey->tx_phase1_done = 0;
++		tkey->tx_iv32++;
++	}
++#ifndef JOHN_TKIP
++      #if(LINUX_VERSION_CODE <KERNEL_VERSION(2,6,21))
++	   return 0;
++      #else
++	   return ret;
++      #endif
++#else
++	return 0;
++#endif
++}
++
++static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
++{
++        struct ieee80211_tkip_data *tkey = priv;
++        #if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
++        struct blkcipher_desc desc = {.tfm = tkey->rx_tfm_arc4};
++        #endif
++	u8 keyidx, *pos;
++	u32 iv32;
++	u16 iv16;
++	struct ieee80211_hdr *hdr;
++#ifndef JOHN_TKIP
++	u8 icv[4];
++	u32 crc;
++	struct scatterlist sg;
++	u8 rc4key[16];
++	int plen;
++#endif
++	if (skb->len < hdr_len + 8 + 4)
++		return -1;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++	pos = skb->data + hdr_len;
++	keyidx = pos[3];
++	if (!(keyidx & (1 << 5))) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "TKIP: received packet without ExtIV"
++			       " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
++		}
++		return -2;
++	}
++	keyidx >>= 6;
++	if (tkey->key_idx != keyidx) {
++		printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
++		       "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
++		return -6;
++	}
++	if (!tkey->key_set) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT
++			       " with keyid=%d that does not have a configured"
++			       " key\n", MAC_ARG(hdr->addr2), keyidx);
++		}
++		return -3;
++	}
++	iv16 = (pos[0] << 8) | pos[2];
++	iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
++	pos += 8;
++#ifndef JOHN_TKIP
++#if 0
++	if (iv32 < tkey->rx_iv32 ||
++	    (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT
++			       " previous TSC %08x%04x received TSC "
++			       "%08x%04x\n", MAC_ARG(hdr->addr2),
++			       tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
++		}
++		tkey->dot11RSNAStatsTKIPReplays++;
++		return -4;
++	}
++#endif
++	if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
++		tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
++		tkey->rx_phase1_done = 1;
++	}
++	tkip_mixing_phase2(rc4key, tkey->key, tkey->rx_ttak, iv16);
++
++	plen = skb->len - hdr_len - 12;
++       #if(LINUX_VERSION_CODE <KERNEL_VERSION(2,6,21))
++	crypto_cipher_setkey(tkey->tfm_arc4, rc4key, 16);
++	sg.page = virt_to_page(pos);
++	sg.offset = offset_in_page(pos);
++	sg.length = plen + 4;
++	crypto_cipher_decrypt(tkey->tfm_arc4, &sg, &sg, plen + 4);
++	#else
++	crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
++	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24))
++	sg.page = virt_to_page(pos);
++	sg.offset = offset_in_page(pos);
++	sg.length = plen + 4;
++	#else	
++	sg_init_one(&sg, pos, plen + 4);
++	#endif
++	if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG ": TKIP: failed to decrypt "
++			       "received packet from " MAC_FMT "\n",
++			       MAC_ARG(hdr->addr2));
++		}
++		return -7;
++	}
++	#endif
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++	crc = ~crc32_le(~0, pos, plen);
++#else
++	crc = ~ether_crc_le(plen, pos);
++#endif
++	icv[0] = crc;
++	icv[1] = crc >> 8;
++	icv[2] = crc >> 16;
++	icv[3] = crc >> 24;
++	if (memcmp(icv, pos + plen, 4) != 0) {
++		if (iv32 != tkey->rx_iv32) {
++			/* Previously cached Phase1 result was already lost, so
++			 * it needs to be recalculated for the next packet. */
++			tkey->rx_phase1_done = 0;
++		}
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "TKIP: ICV error detected: STA="
++			       MAC_FMT "\n", MAC_ARG(hdr->addr2));
++		}
++		tkey->dot11RSNAStatsTKIPICVErrors++;
++		return -5;
++	}
++
++#endif 	/* JOHN_TKIP */
++
++	/* Update real counters only after Michael MIC verification has
++	 * completed */
++	tkey->rx_iv32_new = iv32;
++	tkey->rx_iv16_new = iv16;
++
++	/* Remove IV and ICV */
++	memmove(skb->data + 8, skb->data, hdr_len);
++	skb_pull(skb, 8);
++	skb_trim(skb, skb->len - 4);
++
++//john's test
++#ifdef JOHN_DUMP 
++if( ((u16*)skb->data)[0] & 0x4000){
++        printk("@@ rx decrypted skb->data");
++        int i;
++        for(i=0;i<skb->len;i++){
++                if( (i%24)==0 ) printk("\n");
++                printk("%2x ", ((u8*)skb->data)[i]);
++        }
++        printk("\n");
++}
++#endif /*JOHN_DUMP*/
++	return keyidx;
++}
++
++#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++static int michael_mic(struct ieee80211_tkip_data *tkey, u8 *key, u8 *hdr,
++		       u8 *data, size_t data_len, u8 *mic)
++{
++	struct scatterlist sg[2];
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++	struct hash_desc desc;
++	int ret=0;
++#endif
++	if (tkey->tfm_michael == NULL) {
++		printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
++		return -1;
++	}
++	sg[0].page = virt_to_page(hdr);
++	sg[0].offset = offset_in_page(hdr);
++	sg[0].length = 16;
++
++	sg[1].page = virt_to_page(data);
++	sg[1].offset = offset_in_page(data);
++	sg[1].length = data_len;
++
++	//crypto_digest_init(tkey->tfm_michael);
++	//crypto_digest_setkey(tkey->tfm_michael, key, 8);
++	//crypto_digest_update(tkey->tfm_michael, sg, 2);
++	//crypto_digest_final(tkey->tfm_michael, mic);
++
++	//return 0;
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++	crypto_digest_init(tkey->tfm_michael);
++	crypto_digest_setkey(tkey->tfm_michael, key, 8);
++	crypto_digest_update(tkey->tfm_michael, sg, 2);
++	crypto_digest_final(tkey->tfm_michael, mic);
++
++	return 0;
++#else
++if (crypto_hash_setkey(tkey->tfm_michael, key, 8))
++		return -1;
++ 
++//	return 0;
++	desc.tfm = tkey->tfm_michael;
++	desc.flags = 0;
++	ret = crypto_hash_digest(&desc, sg, data_len + 16, mic);
++	return ret;
++#endif
++}
++#else
++static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,
++                       u8 * data, size_t data_len, u8 * mic)
++{
++        struct hash_desc desc;
++        struct scatterlist sg[2];
++
++        if (tfm_michael == NULL) {
++                printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
++                return -1;
++        }
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
++        sg[0].page = virt_to_page(hdr);
++        sg[0].offset = offset_in_page(hdr);
++        sg[0].length = 16;
++
++        sg[1].page = virt_to_page(data);
++        sg[1].offset = offset_in_page(data);
++        sg[1].length = data_len;
++#else
++	sg_init_table(sg, 2);
++        sg_set_buf(&sg[0], hdr, 16);
++        sg_set_buf(&sg[1], data, data_len);
++#endif
++        if (crypto_hash_setkey(tfm_michael, key, 8))
++                return -1;
++
++        desc.tfm = tfm_michael;
++        desc.flags = 0;
++        return crypto_hash_digest(&desc, sg, data_len + 16, mic);
++}
++#endif
++
++
++
++static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
++{
++	struct ieee80211_hdr *hdr11;
++
++	hdr11 = (struct ieee80211_hdr *) skb->data;
++	switch (le16_to_cpu(hdr11->frame_ctl) &
++		(IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
++	case IEEE80211_FCTL_TODS:
++		memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
++		memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
++		break;
++	case IEEE80211_FCTL_FROMDS:
++		memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
++		memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
++		break;
++	case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
++		memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
++		memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
++		break;
++	case 0:
++		memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
++		memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
++		break;
++	}
++		
++	hdr[12] = 0; /* priority */
++	
++	hdr[13] = hdr[14] = hdr[15] = 0; /* reserved */
++}
++
++
++static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len, void *priv)
++{
++	struct ieee80211_tkip_data *tkey = priv;
++	u8 *pos;
++	struct ieee80211_hdr *hdr;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++
++	if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
++		printk(KERN_DEBUG "Invalid packet for Michael MIC add "
++		       "(tailroom=%d hdr_len=%d skb->len=%d)\n",
++		       skb_tailroom(skb), hdr_len, skb->len);
++		return -1;
++	}
++
++	michael_mic_hdr(skb, tkey->tx_hdr);
++
++	// { david, 2006.9.1
++	// fix the wpa process with wmm enabled.
++	if(IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
++		tkey->tx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
++	}
++	// }
++	pos = skb_put(skb, 8);
++        #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	if (michael_mic(tkey, &tkey->key[16], tkey->tx_hdr,
++			skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
++        #else
++        if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
++                        skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
++        #endif
++		return -1;
++
++	return 0;
++}
++
++
++#if WIRELESS_EXT >= 18
++static void ieee80211_michael_mic_failure(struct net_device *dev,
++				       struct ieee80211_hdr *hdr,
++				       int keyidx)
++{
++	union iwreq_data wrqu;
++	struct iw_michaelmicfailure ev;
++
++	/* TODO: needed parameters: count, keyid, key type, TSC */
++	memset(&ev, 0, sizeof(ev));
++	ev.flags = keyidx & IW_MICFAILURE_KEY_ID;
++	if (hdr->addr1[0] & 0x01)
++		ev.flags |= IW_MICFAILURE_GROUP;
++	else
++		ev.flags |= IW_MICFAILURE_PAIRWISE;
++	ev.src_addr.sa_family = ARPHRD_ETHER;
++	memcpy(ev.src_addr.sa_data, hdr->addr2, ETH_ALEN);
++	memset(&wrqu, 0, sizeof(wrqu));
++	wrqu.data.length = sizeof(ev);
++	wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev);
++}
++#elif WIRELESS_EXT >= 15
++static void ieee80211_michael_mic_failure(struct net_device *dev,
++				       struct ieee80211_hdr *hdr,
++				       int keyidx)
++{
++	union iwreq_data wrqu;
++	char buf[128];
++
++	/* TODO: needed parameters: count, keyid, key type, TSC */
++	sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr="
++		MAC_FMT ")", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni",
++		MAC_ARG(hdr->addr2));
++	memset(&wrqu, 0, sizeof(wrqu));
++	wrqu.data.length = strlen(buf);
++	wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf);
++}
++#else /* WIRELESS_EXT >= 15 */
++static inline void ieee80211_michael_mic_failure(struct net_device *dev,
++					      struct ieee80211_hdr *hdr,
++					      int keyidx)
++{
++}
++#endif /* WIRELESS_EXT >= 15 */
++
++
++static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
++				     int hdr_len, void *priv)
++{
++	struct ieee80211_tkip_data *tkey = priv;
++	u8 mic[8];
++	struct ieee80211_hdr *hdr;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++
++	if (!tkey->key_set)
++		return -1;
++
++	michael_mic_hdr(skb, tkey->rx_hdr);
++	// { david, 2006.9.1
++	// fix the wpa process with wmm enabled.
++	if(IEEE80211_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
++		tkey->rx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
++	}
++	// }
++        #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))	
++	if (michael_mic(tkey, &tkey->key[24], tkey->rx_hdr,
++			skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
++        #else
++	if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
++                        skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
++        #endif 
++            	return -1;
++	if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
++		struct ieee80211_hdr *hdr;
++		hdr = (struct ieee80211_hdr *) skb->data;
++		printk(KERN_DEBUG "%s: Michael MIC verification failed for "
++		       "MSDU from " MAC_FMT " keyidx=%d\n",
++		       skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2),
++		       keyidx);
++		if (skb->dev)
++			ieee80211_michael_mic_failure(skb->dev, hdr, keyidx);
++		tkey->dot11RSNAStatsTKIPLocalMICFailures++;
++		return -1;
++	}
++
++	/* Update TSC counters for RX now that the packet verification has
++	 * completed. */
++	tkey->rx_iv32 = tkey->rx_iv32_new;
++	tkey->rx_iv16 = tkey->rx_iv16_new;
++
++	skb_trim(skb, skb->len - 8);
++
++	return 0;
++}
++
++
++static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv)
++{
++	struct ieee80211_tkip_data *tkey = priv;
++	int keyidx;
++	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	struct crypto_tfm *tfm = tkey->tfm_michael;
++	struct crypto_tfm *tfm2 = tkey->tfm_arc4;
++	#else
++	struct crypto_hash *tfm = tkey->tx_tfm_michael;
++	struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4;
++	struct crypto_hash *tfm3 = tkey->rx_tfm_michael;
++	struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4;
++	#endif
++
++	keyidx = tkey->key_idx;
++	memset(tkey, 0, sizeof(*tkey));
++	tkey->key_idx = keyidx;
++
++	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	tkey->tfm_michael = tfm;
++	tkey->tfm_arc4 = tfm2;
++       #else
++	tkey->tx_tfm_michael = tfm;
++	tkey->tx_tfm_arc4 = tfm2;
++	tkey->rx_tfm_michael = tfm3;
++	tkey->rx_tfm_arc4 = tfm4;
++	#endif
++
++	if (len == TKIP_KEY_LEN) {
++		memcpy(tkey->key, key, TKIP_KEY_LEN);
++		tkey->key_set = 1;
++		tkey->tx_iv16 = 1; /* TSC is initialized to 1 */
++		if (seq) {
++			tkey->rx_iv32 = (seq[5] << 24) | (seq[4] << 16) |
++				(seq[3] << 8) | seq[2];
++			tkey->rx_iv16 = (seq[1] << 8) | seq[0];
++		}
++	} else if (len == 0)
++		tkey->key_set = 0;
++	else
++		return -1;
++
++	return 0;
++}
++
++
++static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv)
++{
++	struct ieee80211_tkip_data *tkey = priv;
++
++	if (len < TKIP_KEY_LEN)
++		return -1;
++
++	if (!tkey->key_set)
++		return 0;
++	memcpy(key, tkey->key, TKIP_KEY_LEN);
++
++	if (seq) {
++		/* Return the sequence number of the last transmitted frame. */
++		u16 iv16 = tkey->tx_iv16;
++		u32 iv32 = tkey->tx_iv32;
++		if (iv16 == 0)
++			iv32--;
++		iv16--;
++		seq[0] = tkey->tx_iv16;
++		seq[1] = tkey->tx_iv16 >> 8;
++		seq[2] = tkey->tx_iv32;
++		seq[3] = tkey->tx_iv32 >> 8;
++		seq[4] = tkey->tx_iv32 >> 16;
++		seq[5] = tkey->tx_iv32 >> 24;
++	}
++
++	return TKIP_KEY_LEN;
++}
++
++
++static char * ieee80211_tkip_print_stats(char *p, void *priv)
++{
++	struct ieee80211_tkip_data *tkip = priv;
++	p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
++		     "tx_pn=%02x%02x%02x%02x%02x%02x "
++		     "rx_pn=%02x%02x%02x%02x%02x%02x "
++		     "replays=%d icv_errors=%d local_mic_failures=%d\n",
++		     tkip->key_idx, tkip->key_set,
++		     (tkip->tx_iv32 >> 24) & 0xff,
++		     (tkip->tx_iv32 >> 16) & 0xff,
++		     (tkip->tx_iv32 >> 8) & 0xff,
++		     tkip->tx_iv32 & 0xff,
++		     (tkip->tx_iv16 >> 8) & 0xff,
++		     tkip->tx_iv16 & 0xff,
++		     (tkip->rx_iv32 >> 24) & 0xff,
++		     (tkip->rx_iv32 >> 16) & 0xff,
++		     (tkip->rx_iv32 >> 8) & 0xff,
++		     tkip->rx_iv32 & 0xff,
++		     (tkip->rx_iv16 >> 8) & 0xff,
++		     tkip->rx_iv16 & 0xff,
++		     tkip->dot11RSNAStatsTKIPReplays,
++		     tkip->dot11RSNAStatsTKIPICVErrors,
++		     tkip->dot11RSNAStatsTKIPLocalMICFailures);
++	return p;
++}
++
++
++static struct ieee80211_crypto_ops ieee80211_crypt_tkip = {
++	.name			= "TKIP",
++	.init			= ieee80211_tkip_init,
++	.deinit			= ieee80211_tkip_deinit,
++	.encrypt_mpdu		= ieee80211_tkip_encrypt,
++	.decrypt_mpdu		= ieee80211_tkip_decrypt,
++	.encrypt_msdu		= ieee80211_michael_mic_add,
++	.decrypt_msdu		= ieee80211_michael_mic_verify,
++	.set_key		= ieee80211_tkip_set_key,
++	.get_key		= ieee80211_tkip_get_key,
++	.print_stats		= ieee80211_tkip_print_stats,
++	.extra_prefix_len	= 4 + 4, /* IV + ExtIV */
++	.extra_postfix_len	= 8 + 4, /* MIC + ICV */
++	.owner		        = THIS_MODULE,
++};
++
++
++static int __init ieee80211_crypto_tkip_init(void)
++{
++	return ieee80211_register_crypto_ops(&ieee80211_crypt_tkip);
++}
++
++
++static void __exit ieee80211_crypto_tkip_exit(void)
++{
++	ieee80211_unregister_crypto_ops(&ieee80211_crypt_tkip);
++}
++
++
++void ieee80211_tkip_null(void)
++{
++//    printk("============>%s()\n", __FUNCTION__);
++        return;
++}
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(ieee80211_tkip_null);
++#else
++EXPORT_SYMBOL_NOVERS(ieee80211_tkip_null);
++#endif
++
++
++module_init(ieee80211_crypto_tkip_init);
++module_exit(ieee80211_crypto_tkip_exit);
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt_wep.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_crypt_wep.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,381 @@
++/*
++ * Host AP crypt: host-based WEP encryption implementation for Host AP driver
++ *
++ * Copyright (c) 2002-2004, Jouni Malinen <jkmaline@cc.hut.fi>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ */
++
++//#include <linux/config.h>
++#include <linux/version.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/random.h>
++#include <linux/skbuff.h>
++#include <asm/string.h>
++
++#include "ieee80211.h"
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
++#include "rtl_crypto.h"
++#else
++#include <linux/crypto.h>
++#endif
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) 
++    #include <asm/scatterlist.h>
++#else
++    #include <linux/scatterlist.h>
++#endif
++//#include <asm/scatterlist.h>
++#include <linux/crc32.h>
++
++MODULE_AUTHOR("Jouni Malinen");
++MODULE_DESCRIPTION("Host AP crypt: WEP");
++MODULE_LICENSE("GPL");
++
++
++struct prism2_wep_data {
++	u32 iv;
++#define WEP_KEY_LEN 13
++	u8 key[WEP_KEY_LEN + 1];
++	u8 key_len;
++	u8 key_idx;
++	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	struct crypto_tfm *tfm;
++	#else
++	struct crypto_blkcipher *tx_tfm;
++	struct crypto_blkcipher *rx_tfm;
++	#endif
++};
++
++
++static void * prism2_wep_init(int keyidx)
++{
++	struct prism2_wep_data *priv;
++
++	priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
++	if (priv == NULL)
++		goto fail;
++	memset(priv, 0, sizeof(*priv));
++	priv->key_idx = keyidx;
++      #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	priv->tfm = crypto_alloc_tfm("arc4", 0);
++     	if (priv->tfm == NULL) {
++		printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
++		       "crypto API arc4\n");
++		goto fail;
++	}
++	#else
++	priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
++	if (IS_ERR(priv->tx_tfm)) {
++		printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
++		       "crypto API arc4\n");
++		priv->tx_tfm = NULL;
++		goto fail;
++	}
++	priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
++	if (IS_ERR(priv->rx_tfm)) {
++		printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
++		       "crypto API arc4\n");
++		priv->rx_tfm = NULL;
++		goto fail;
++	}
++	#endif
++
++	/* start WEP IV from a random value */
++	get_random_bytes(&priv->iv, 4);
++
++	return priv;
++
++fail:
++	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	if (priv) {
++		if (priv->tfm)
++			crypto_free_tfm(priv->tfm);
++		kfree(priv);
++	}
++       #else
++	if (priv) {
++		if (priv->tx_tfm)
++			crypto_free_blkcipher(priv->tx_tfm);
++		if (priv->rx_tfm)
++			crypto_free_blkcipher(priv->rx_tfm);
++		kfree(priv);
++	}
++	#endif
++	return NULL;
++}
++
++
++static void prism2_wep_deinit(void *priv)
++{
++	struct prism2_wep_data *_priv = priv;
++	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	if (_priv && _priv->tfm)
++		crypto_free_tfm(_priv->tfm);
++	#else
++	if (_priv) {
++		if (_priv->tx_tfm)
++			crypto_free_blkcipher(_priv->tx_tfm);
++		if (_priv->rx_tfm)
++			crypto_free_blkcipher(_priv->rx_tfm);
++	}
++        #endif
++	kfree(priv);
++}
++
++
++/* Perform WEP encryption on given skb that has at least 4 bytes of headroom
++ * for IV and 4 bytes of tailroom for ICV. Both IV and ICV will be transmitted,
++ * so the payload length increases with 8 bytes.
++ *
++ * WEP frame payload: IV + TX key idx, RC4(data), ICV = RC4(CRC32(data))
++ */
++static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
++{
++	struct prism2_wep_data *wep = priv;
++#if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
++        struct blkcipher_desc desc = {.tfm = wep->tx_tfm};
++#endif
++	u32 klen, len;
++	u8 key[WEP_KEY_LEN + 3];
++	u8 *pos;
++#ifndef JOHN_HWSEC
++	u32 crc;
++	u8 *icv;	
++	struct scatterlist sg;
++#endif	
++	if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
++	    skb->len < hdr_len)
++		return -1;
++
++	len = skb->len - hdr_len;
++	pos = skb_push(skb, 4);
++	memmove(pos, pos + 4, hdr_len);
++	pos += hdr_len;
++
++	klen = 3 + wep->key_len;
++
++	wep->iv++;
++
++	/* Fluhrer, Mantin, and Shamir have reported weaknesses in the key
++	 * scheduling algorithm of RC4. At least IVs (KeyByte + 3, 0xff, N)
++	 * can be used to speedup attacks, so avoid using them. */
++	if ((wep->iv & 0xff00) == 0xff00) {
++		u8 B = (wep->iv >> 16) & 0xff;
++		if (B >= 3 && B < klen)
++			wep->iv += 0x0100;
++	}
++
++	/* Prepend 24-bit IV to RC4 key and TX frame */
++	*pos++ = key[0] = (wep->iv >> 16) & 0xff;
++	*pos++ = key[1] = (wep->iv >> 8) & 0xff;
++	*pos++ = key[2] = wep->iv & 0xff;
++	*pos++ = wep->key_idx << 6;
++
++	/* Copy rest of the WEP key (the secret part) */
++	memcpy(key + 3, wep->key, wep->key_len);
++
++#ifndef JOHN_HWSEC
++	/* Append little-endian CRC32 and encrypt it to produce ICV */
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++	crc = ~crc32_le(~0, pos, len);
++#else
++	crc = ~ether_crc_le(len, pos);
++#endif
++	icv = skb_put(skb, 4);
++	icv[0] = crc;
++	icv[1] = crc >> 8;
++	icv[2] = crc >> 16;
++	icv[3] = crc >> 24;
++
++        #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	crypto_cipher_setkey(wep->tfm, key, klen);
++	sg.page = virt_to_page(pos);
++	sg.offset = offset_in_page(pos);
++	sg.length = len + 4;
++	crypto_cipher_encrypt(wep->tfm, &sg, &sg, len + 4);
++
++	return 0;
++	#else
++	crypto_blkcipher_setkey(wep->tx_tfm, key, klen);
++	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24))
++	sg.page = virt_to_page(pos);
++	sg.offset = offset_in_page(pos);
++	sg.length = len + 4;
++	#else
++	sg_init_one(&sg, pos, len + 4);
++	#endif
++	return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
++	#endif
++#endif /* JOHN_HWSEC */
++	return 0;
++}
++
++
++/* Perform WEP decryption on given buffer. Buffer includes whole WEP part of
++ * the frame: IV (4 bytes), encrypted payload (including SNAP header),
++ * ICV (4 bytes). len includes both IV and ICV.
++ *
++ * Returns 0 if frame was decrypted successfully and ICV was correct and -1 on
++ * failure. If frame is OK, IV and ICV will be removed.
++ */
++static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
++{
++	struct prism2_wep_data *wep = priv;
++        #if(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
++        struct blkcipher_desc desc = {.tfm = wep->rx_tfm};
++        #endif
++	u32 klen, plen;
++	u8 key[WEP_KEY_LEN + 3];
++	u8 keyidx, *pos;
++#ifndef JOHN_HWSEC
++	u32 crc;
++	u8 icv[4];	
++	struct scatterlist sg;
++#endif	
++	if (skb->len < hdr_len + 8)
++		return -1;
++
++	pos = skb->data + hdr_len;
++	key[0] = *pos++;
++	key[1] = *pos++;
++	key[2] = *pos++;
++	keyidx = *pos++ >> 6;
++	if (keyidx != wep->key_idx)
++		return -1;
++
++	klen = 3 + wep->key_len;
++
++	/* Copy rest of the WEP key (the secret part) */
++	memcpy(key + 3, wep->key, wep->key_len);
++
++	/* Apply RC4 to data and compute CRC32 over decrypted data */
++	plen = skb->len - hdr_len - 8;
++#ifndef JOHN_HWSEC
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
++	crypto_cipher_setkey(wep->tfm, key, klen);
++	sg.page = virt_to_page(pos);
++	sg.offset = offset_in_page(pos);
++	sg.length = plen + 4;
++	crypto_cipher_decrypt(wep->tfm, &sg, &sg, plen + 4);
++#else
++	crypto_blkcipher_setkey(wep->rx_tfm, key, klen);
++	#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
++	sg.page = virt_to_page(pos);
++	sg.offset = offset_in_page(pos);
++	sg.length = plen + 4;	
++	#else
++	sg_init_one(&sg, pos, plen + 4);
++	#endif	
++	if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4))
++		return -7;
++#endif 
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++	crc = ~crc32_le(~0, pos, plen);
++#else
++	crc = ~ether_crc_le(plen, pos);
++#endif
++	icv[0] = crc;
++	icv[1] = crc >> 8;
++	icv[2] = crc >> 16;
++	icv[3] = crc >> 24;
++
++	if (memcmp(icv, pos + plen, 4) != 0) {
++		/* ICV mismatch - drop frame */
++		return -2;
++	}
++#endif 	/* JOHN_HWSEC */
++
++	/* Remove IV and ICV */
++	memmove(skb->data + 4, skb->data, hdr_len);
++	skb_pull(skb, 4);
++	skb_trim(skb, skb->len - 4);
++        return 0;
++}
++
++
++static int prism2_wep_set_key(void *key, int len, u8 *seq, void *priv)
++{
++	struct prism2_wep_data *wep = priv;
++
++	if (len < 0 || len > WEP_KEY_LEN)
++		return -1;
++
++	memcpy(wep->key, key, len);
++	wep->key_len = len;
++
++	return 0;
++}
++
++
++static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)
++{
++	struct prism2_wep_data *wep = priv;
++
++	if (len < wep->key_len)
++		return -1;
++
++	memcpy(key, wep->key, wep->key_len);
++
++	return wep->key_len;
++}
++
++
++static char * prism2_wep_print_stats(char *p, void *priv)
++{
++	struct prism2_wep_data *wep = priv;
++	p += sprintf(p, "key[%d] alg=WEP len=%d\n",
++		     wep->key_idx, wep->key_len);
++	return p;
++}
++
++
++static struct ieee80211_crypto_ops ieee80211_crypt_wep = {
++	.name			= "WEP",
++	.init			= prism2_wep_init,
++	.deinit			= prism2_wep_deinit,
++	.encrypt_mpdu		= prism2_wep_encrypt,
++	.decrypt_mpdu		= prism2_wep_decrypt,
++	.encrypt_msdu		= NULL,
++	.decrypt_msdu		= NULL,
++	.set_key		= prism2_wep_set_key,
++	.get_key		= prism2_wep_get_key,
++	.print_stats		= prism2_wep_print_stats,
++	.extra_prefix_len	= 4, /* IV */
++	.extra_postfix_len	= 4, /* ICV */
++	.owner			= THIS_MODULE,
++};
++
++
++static int __init ieee80211_crypto_wep_init(void)
++{
++	return ieee80211_register_crypto_ops(&ieee80211_crypt_wep);
++}
++
++
++static void __exit ieee80211_crypto_wep_exit(void)
++{
++	ieee80211_unregister_crypto_ops(&ieee80211_crypt_wep);
++}
++
++
++void ieee80211_wep_null(void)
++{
++//	printk("============>%s()\n", __FUNCTION__);
++        return;
++}
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(ieee80211_wep_null);
++#else
++EXPORT_SYMBOL_NOVERS(ieee80211_wep_null);
++#endif
++
++module_init(ieee80211_crypto_wep_init);
++module_exit(ieee80211_crypto_wep_exit);
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211.h	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,1913 @@
++/*
++ * Merged with mainline ieee80211.h in Aug 2004.  Original ieee802_11
++ * remains copyright by the original authors
++ *
++ * Portions of the merged code are based on Host AP (software wireless
++ * LAN access point) driver for Intersil Prism2/2.5/3.
++ *
++ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
++ * <jkmaline@cc.hut.fi>
++ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
++ *
++ * Adaption to a generic IEEE 802.11 stack by James Ketrenos
++ * <jketreno@linux.intel.com>
++ * Copyright (c) 2004, Intel Corporation
++ *
++ * Modified for Realtek's wi-fi cards by Andrea Merello
++ * <andreamrl@tiscali.it>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ */
++#ifndef IEEE80211_H
++#define IEEE80211_H
++#include <linux/if_ether.h> /* ETH_ALEN */
++#include <linux/kernel.h>   /* ARRAY_SIZE */
++#include <linux/version.h>
++#include <linux/module.h>
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++#include <linux/jiffies.h>
++#else
++#include <linux/jffs.h>
++#include <linux/tqueue.h>
++#endif
++#include <linux/timer.h>
++#include <linux/sched.h>
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,13))
++#include <linux/wireless.h>
++#endif
++/*
++#ifndef bool
++#define bool int
++#endif
++
++#ifndef true
++#define true   1
++#endif
++
++#ifndef false
++#define false  0
++#endif
++*/
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
++#ifndef bool
++typedef enum{false = 0, true} bool;
++#endif
++#endif
++//#ifdef JOHN_HWSEC
++#define KEY_TYPE_NA		0x0
++#define KEY_TYPE_WEP40 		0x1
++#define KEY_TYPE_TKIP		0x2
++#define KEY_TYPE_CCMP		0x4
++#define KEY_TYPE_WEP104		0x5
++//#endif
++
++
++#define aSifsTime					10
++
++#define MGMT_QUEUE_NUM 5
++
++
++#define IEEE_CMD_SET_WPA_PARAM			1
++#define	IEEE_CMD_SET_WPA_IE			2
++#define IEEE_CMD_SET_ENCRYPTION			3
++#define IEEE_CMD_MLME				4
++
++#define IEEE_PARAM_WPA_ENABLED			1
++#define IEEE_PARAM_TKIP_COUNTERMEASURES		2
++#define IEEE_PARAM_DROP_UNENCRYPTED		3
++#define IEEE_PARAM_PRIVACY_INVOKED		4
++#define IEEE_PARAM_AUTH_ALGS			5
++#define IEEE_PARAM_IEEE_802_1X			6
++//It should consistent with the driver_XXX.c
++//   David, 2006.9.26
++#define IEEE_PARAM_WPAX_SELECT			7
++//Added for notify the encryption type selection
++//   David, 2006.9.26
++#define IEEE_PROTO_WPA				1	
++#define IEEE_PROTO_RSN				2
++//Added for notify the encryption type selection
++//   David, 2006.9.26
++#define IEEE_WPAX_USEGROUP			0
++#define IEEE_WPAX_WEP40				1
++#define IEEE_WPAX_TKIP				2
++#define IEEE_WPAX_WRAP   			3
++#define IEEE_WPAX_CCMP				4
++#define IEEE_WPAX_WEP104			5
++
++#define IEEE_KEY_MGMT_IEEE8021X			1
++#define IEEE_KEY_MGMT_PSK			2
++
++
++
++#define IEEE_MLME_STA_DEAUTH			1
++#define IEEE_MLME_STA_DISASSOC			2
++
++
++#define IEEE_CRYPT_ERR_UNKNOWN_ALG		2
++#define IEEE_CRYPT_ERR_UNKNOWN_ADDR		3
++#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED		4
++#define IEEE_CRYPT_ERR_KEY_SET_FAILED		5
++#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED		6
++#define IEEE_CRYPT_ERR_CARD_CONF_FAILED		7
++
++
++#define	IEEE_CRYPT_ALG_NAME_LEN			16
++
++//#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
++#define ieee80211_wx_get_scan ieee80211_wx_get_scan_rtl
++#define ieee80211_wx_set_encode ieee80211_wx_set_encode_rtl
++#define ieee80211_wx_get_encode ieee80211_wx_get_encode_rtl
++////////////////////////////////
++// added for kernel conflict under FC5
++#define ieee80211_wx_get_name   ieee80211_wx_get_name_rtl
++#define free_ieee80211          free_ieee80211_rtl
++#define alloc_ieee80211        alloc_ieee80211_rtl
++///////////////////////////////
++//#endif
++#define ieee80211_rx ieee80211_rx_rtl
++#define ieee80211_wake_queue ieee80211_wake_queue_rtl
++#define ieee80211_stop_queue ieee80211_stop_queue_rtl
++#define ieee80211_wx_set_auth ieee80211_wx_set_auth_rtl
++#define ieee80211_get_crypto_ops ieee80211_get_crypto_ops_rtl
++#define ieee80211_crypt_delayed_deinit ieee80211_crypt_delayed_deinit_rtl
++
++#define ieee80211_start_scan ieee80211_start_scan_rtl
++#define ieee80211_register_crypto_ops ieee80211_register_crypto_ops_rtl
++#define ieee80211_unregister_crypto_ops ieee80211_unregister_crypto_ops_rtl
++#define ieee80211_crypt_deinit_entries ieee80211_crypt_deinit_entries_rtl
++#define ieee80211_crypt_deinit_handler ieee80211_crypt_deinit_handler_rtl
++typedef struct ieee_param {
++	u32 cmd;
++	u8 sta_addr[ETH_ALEN];
++        union {
++		struct {
++			u8 name;
++			u32 value;
++		} wpa_param;
++		struct {
++			u32 len;
++			u8 reserved[32];
++			u8 data[0];
++		} wpa_ie;
++	        struct{
++			int command;
++    			int reason_code;
++		} mlme;
++		struct {
++			u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
++			u8 set_tx;
++			u32 err;
++			u8 idx;
++			u8 seq[8]; /* sequence counter (set: RX, get: TX) */
++			u16 key_len;
++			u8 key[0];
++		} crypt;
++
++	} u;
++}ieee_param;
++
++
++#if WIRELESS_EXT < 17
++#define IW_QUAL_QUAL_INVALID   0x10
++#define IW_QUAL_LEVEL_INVALID  0x20
++#define IW_QUAL_NOISE_INVALID  0x40
++#define IW_QUAL_QUAL_UPDATED   0x1
++#define IW_QUAL_LEVEL_UPDATED  0x2
++#define IW_QUAL_NOISE_UPDATED  0x4
++#endif
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
++static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)
++{
++	task->routine = func;
++	task->data 	= data;
++	//task->next = NULL;
++	INIT_LIST_HEAD(&task->list);
++	task->sync = 0;
++}
++#endif
++
++// linux under 2.6.9 release may not support it, so modify it for common use
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
++//#define MSECS(t)	(1000 * ((t) / HZ) + 1000 * ((t) % HZ) / HZ)
++#define MSECS(t)	(HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
++static inline unsigned long msleep_interruptible_rtl(unsigned int msecs)
++{
++         unsigned long timeout = MSECS(msecs) + 1;
++ 
++         while (timeout) {
++                 set_current_state(TASK_UNINTERRUPTIBLE);
++                 timeout = schedule_timeout(timeout);
++         }
++         return timeout;
++}
++#else
++#define MSECS(t) msecs_to_jiffies(t)
++#define msleep_interruptible_rtl  msleep_interruptible
++#endif
++
++#define IEEE80211_DATA_LEN		2304
++/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
++   6.2.1.1.2.
++
++   The figure in section 7.1.2 suggests a body size of up to 2312
++   bytes is allowed, which is a bit confusing, I suspect this
++   represents the 2304 bytes of real data, plus a possible 8 bytes of
++   WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
++
++
++#define IEEE80211_HLEN			30
++#define IEEE80211_FRAME_LEN		(IEEE80211_DATA_LEN + IEEE80211_HLEN)
++
++/* this is stolen and modified from the madwifi driver*/
++#define IEEE80211_FC0_TYPE_MASK		0x0c
++#define IEEE80211_FC0_TYPE_DATA		0x08
++#define IEEE80211_FC0_SUBTYPE_MASK	0xB0
++#define IEEE80211_FC0_SUBTYPE_QOS	0x80
++
++#define IEEE80211_QOS_HAS_SEQ(fc) \
++	(((fc) & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == \
++	 (IEEE80211_FC0_TYPE_DATA | IEEE80211_FC0_SUBTYPE_QOS))
++	
++/* this is stolen from ipw2200 driver */
++#define IEEE_IBSS_MAC_HASH_SIZE 31
++#define IEEE_MESH_MAC_HASH_SIZE 31
++struct ieee_ibss_seq {
++	u8 mac[ETH_ALEN];
++	u16 seq_num[17];
++	u16 frag_num[17];
++	unsigned long packet_time[17];
++	struct list_head list;
++};
++
++struct ieee_mesh_seq {
++	u8 mac[ETH_ALEN];
++	u16 seq_num;
++	u16 frag_num;
++	unsigned long packet_time;
++	struct list_head list;
++};
++
++struct ieee80211_hdr {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[ETH_ALEN];
++	u8 addr2[ETH_ALEN];
++	u8 addr3[ETH_ALEN];
++	u16 seq_ctl;
++	u8 addr4[ETH_ALEN];
++} __attribute__ ((packed));
++
++struct ieee80211_hdr_QOS {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[ETH_ALEN];
++	u8 addr2[ETH_ALEN];
++	u8 addr3[ETH_ALEN];
++	u16 seq_ctl;
++	u8 addr4[ETH_ALEN];
++	u16 QOS_ctl;
++} __attribute__ ((packed));
++
++struct ieee80211_hdr_3addr {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[ETH_ALEN];
++	u8 addr2[ETH_ALEN];
++	u8 addr3[ETH_ALEN];
++	u16 seq_ctl;
++} __attribute__ ((packed));
++
++struct ieee80211_hdr_3addr_QOS {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[ETH_ALEN];
++	u8 addr2[ETH_ALEN];
++	u8 addr3[ETH_ALEN];
++	u16 seq_ctl;
++	u16 QOS_ctl;
++} __attribute__ ((packed));
++
++enum eap_type {
++	EAP_PACKET = 0,
++	EAPOL_START,
++	EAPOL_LOGOFF,
++	EAPOL_KEY,
++	EAPOL_ENCAP_ASF_ALERT
++};
++
++//by lizhaoming for LED 2008.6.23 from r8187_led.h
++#ifdef LED
++typedef enum _LED_CTL_MODE {
++	LED_CTL_POWER_ON,
++	LED_CTL_POWER_OFF,
++	LED_CTL_LINK,
++	LED_CTL_NO_LINK,
++	LED_CTL_TX,
++	LED_CTL_RX,
++	LED_CTL_SITE_SURVEY,
++} LED_CTL_MODE;
++#endif
++
++static const char *eap_types[] = {
++	[EAP_PACKET]		= "EAP-Packet",
++	[EAPOL_START]		= "EAPOL-Start",
++	[EAPOL_LOGOFF]		= "EAPOL-Logoff",
++	[EAPOL_KEY]		= "EAPOL-Key",
++	[EAPOL_ENCAP_ASF_ALERT]	= "EAPOL-Encap-ASF-Alert"
++};
++
++static inline const char *eap_get_type(int type)
++{
++	return (type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
++}
++
++struct eapol {
++	u8 snap[6];
++	u16 ethertype;
++	u8 version;
++	u8 type;
++	u16 length;
++} __attribute__ ((packed));
++
++#define IEEE80211_3ADDR_LEN 24
++#define IEEE80211_4ADDR_LEN 30
++#define IEEE80211_FCS_LEN    4
++
++#define MIN_FRAG_THRESHOLD     256U
++#define	MAX_FRAG_THRESHOLD     2346U
++
++/* Frame control field constants */
++#define IEEE80211_FCTL_VERS		0x0002
++#define IEEE80211_FCTL_FTYPE		0x000c
++#define IEEE80211_FCTL_STYPE		0x00f0
++#define IEEE80211_FCTL_TODS		0x0100
++#define IEEE80211_FCTL_FROMDS		0x0200
++#define IEEE80211_FCTL_DSTODS		0x0300 //added by david
++#define IEEE80211_FCTL_MOREFRAGS	0x0400
++#define IEEE80211_FCTL_RETRY		0x0800
++#define IEEE80211_FCTL_PM		0x1000
++#define IEEE80211_FCTL_MOREDATA	0x2000
++#define IEEE80211_FCTL_WEP		0x4000
++#define IEEE80211_FCTL_ORDER		0x8000
++
++#define IEEE80211_FTYPE_MGMT		0x0000
++#define IEEE80211_FTYPE_CTL		0x0004
++#define IEEE80211_FTYPE_DATA		0x0008
++
++/* management */
++#define IEEE80211_STYPE_ASSOC_REQ	0x0000
++#define IEEE80211_STYPE_ASSOC_RESP 	0x0010
++#define IEEE80211_STYPE_REASSOC_REQ	0x0020
++#define IEEE80211_STYPE_REASSOC_RESP	0x0030
++#define IEEE80211_STYPE_PROBE_REQ	0x0040
++#define IEEE80211_STYPE_PROBE_RESP	0x0050
++#define IEEE80211_STYPE_BEACON		0x0080
++#define IEEE80211_STYPE_ATIM		0x0090
++#define IEEE80211_STYPE_DISASSOC	0x00A0
++#define IEEE80211_STYPE_AUTH		0x00B0
++#define IEEE80211_STYPE_DEAUTH		0x00C0
++#define IEEE80211_STYPE_MANAGE_ACT	0x00D0
++
++/* control */
++#define IEEE80211_STYPE_PSPOLL		0x00A0
++#define IEEE80211_STYPE_RTS		0x00B0
++#define IEEE80211_STYPE_CTS		0x00C0
++#define IEEE80211_STYPE_ACK		0x00D0
++#define IEEE80211_STYPE_CFEND		0x00E0
++#define IEEE80211_STYPE_CFENDACK	0x00F0
++
++/* data */
++#define IEEE80211_STYPE_DATA		0x0000
++#define IEEE80211_STYPE_DATA_CFACK	0x0010
++#define IEEE80211_STYPE_DATA_CFPOLL	0x0020
++#define IEEE80211_STYPE_DATA_CFACKPOLL	0x0030
++#define IEEE80211_STYPE_NULLFUNC	0x0040
++#define IEEE80211_STYPE_CFACK		0x0050
++#define IEEE80211_STYPE_CFPOLL		0x0060
++#define IEEE80211_STYPE_CFACKPOLL	0x0070
++#define IEEE80211_STYPE_QOS_DATA	0x0080 //added for WMM 2006/8/2
++#define IEEE80211_STYPE_QOS_NULL	0x00C0
++
++
++#define IEEE80211_SCTL_FRAG		0x000F
++#define IEEE80211_SCTL_SEQ		0xFFF0
++
++
++/* debug macros */
++
++#ifdef CONFIG_IEEE80211_DEBUG
++extern u32 ieee80211_debug_level;
++#define IEEE80211_DEBUG(level, fmt, args...) \
++do { if (ieee80211_debug_level & (level)) \
++  printk(KERN_DEBUG "ieee80211: %c %s " fmt, \
++         in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0)
++#else
++#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
++#endif	/* CONFIG_IEEE80211_DEBUG */
++
++/*
++ * To use the debug system;
++ *
++ * If you are defining a new debug classification, simply add it to the #define
++ * list here in the form of:
++ *
++ * #define IEEE80211_DL_xxxx VALUE
++ *
++ * shifting value to the left one bit from the previous entry.  xxxx should be
++ * the name of the classification (for example, WEP)
++ *
++ * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
++ * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
++ * to send output to that classification.
++ *
++ * To add your debug level to the list of levels seen when you perform
++ *
++ * % cat /proc/net/ipw/debug_level
++ *
++ * you simply need to add your entry to the ipw_debug_levels array.
++ *
++ * If you do not see debug_level in /proc/net/ipw then you do not have
++ * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
++ *
++ */
++
++#define IEEE80211_DL_INFO          (1<<0)
++#define IEEE80211_DL_WX            (1<<1)
++#define IEEE80211_DL_SCAN          (1<<2)
++#define IEEE80211_DL_STATE         (1<<3)
++#define IEEE80211_DL_MGMT          (1<<4)
++#define IEEE80211_DL_FRAG          (1<<5)
++#define IEEE80211_DL_EAP           (1<<6)
++#define IEEE80211_DL_DROP          (1<<7)
++
++#define IEEE80211_DL_TX            (1<<8)
++#define IEEE80211_DL_RX            (1<<9)
++
++#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
++#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
++#define IEEE80211_DEBUG_INFO(f, a...)   IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
++
++#define IEEE80211_DEBUG_WX(f, a...)     IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
++#define IEEE80211_DEBUG_SCAN(f, a...)   IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
++#define IEEE80211_DEBUG_STATE(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
++#define IEEE80211_DEBUG_MGMT(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
++#define IEEE80211_DEBUG_FRAG(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
++#define IEEE80211_DEBUG_EAP(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
++#define IEEE80211_DEBUG_DROP(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
++#define IEEE80211_DEBUG_TX(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
++#define IEEE80211_DEBUG_RX(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
++#include <linux/netdevice.h>
++#include <linux/wireless.h>
++#include <linux/if_arp.h> /* ARPHRD_ETHER */
++
++#ifndef WIRELESS_SPY
++#define WIRELESS_SPY		// enable iwspy support
++#endif
++#include <net/iw_handler.h>	// new driver API
++
++#ifndef ETH_P_PAE
++#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
++#endif /* ETH_P_PAE */
++
++#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
++
++#ifndef ETH_P_80211_RAW
++#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
++#endif
++
++/* IEEE 802.11 defines */
++
++#define P80211_OUI_LEN 3
++
++struct ieee80211_snap_hdr {
++
++        u8    dsap;   /* always 0xAA */
++        u8    ssap;   /* always 0xAA */
++        u8    ctrl;   /* always 0x03 */
++        u8    oui[P80211_OUI_LEN];    /* organizational universal id */
++
++} __attribute__ ((packed));
++
++#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
++
++#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
++#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
++
++#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
++#define WLAN_GET_SEQ_SEQ(seq)  ((seq) & IEEE80211_SCTL_SEQ)
++
++/* Authentication algorithms */
++#define WLAN_AUTH_OPEN 0
++#define WLAN_AUTH_SHARED_KEY 1
++
++#define WLAN_AUTH_CHALLENGE_LEN 128
++
++#define WLAN_CAPABILITY_BSS (1<<0)
++#define WLAN_CAPABILITY_IBSS (1<<1)
++#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
++#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
++#define WLAN_CAPABILITY_PRIVACY (1<<4)
++#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
++#define WLAN_CAPABILITY_PBCC (1<<6)
++#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
++#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
++
++/* Status codes */
++#define WLAN_STATUS_SUCCESS 0
++#define WLAN_STATUS_UNSPECIFIED_FAILURE 1
++#define WLAN_STATUS_CAPS_UNSUPPORTED 10
++#define WLAN_STATUS_REASSOC_NO_ASSOC 11
++#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12
++#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13
++#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14
++#define WLAN_STATUS_CHALLENGE_FAIL 15
++#define WLAN_STATUS_AUTH_TIMEOUT 16
++#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17
++#define WLAN_STATUS_ASSOC_DENIED_RATES 18
++/* 802.11b */
++#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19
++#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20
++#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21
++
++/* Reason codes */
++#define WLAN_REASON_UNSPECIFIED 1
++#define WLAN_REASON_PREV_AUTH_NOT_VALID 2
++#define WLAN_REASON_DEAUTH_LEAVING 3
++#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4
++#define WLAN_REASON_DISASSOC_AP_BUSY 5
++#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6
++#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
++#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
++#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
++
++
++/* Information Element IDs */
++#define WLAN_EID_SSID 0
++#define WLAN_EID_SUPP_RATES 1
++#define WLAN_EID_FH_PARAMS 2
++#define WLAN_EID_DS_PARAMS 3
++#define WLAN_EID_CF_PARAMS 4
++#define WLAN_EID_TIM 5
++#define WLAN_EID_IBSS_PARAMS 6
++#define WLAN_EID_CHALLENGE 16
++#define WLAN_EID_RSN 48
++#define WLAN_EID_GENERIC 221
++
++#define IEEE80211_MGMT_HDR_LEN 24
++#define IEEE80211_DATA_HDR3_LEN 24
++#define IEEE80211_DATA_HDR4_LEN 30
++
++
++#define IEEE80211_STATMASK_SIGNAL (1<<0)
++#define IEEE80211_STATMASK_RSSI (1<<1)
++#define IEEE80211_STATMASK_NOISE (1<<2)
++#define IEEE80211_STATMASK_RATE (1<<3)
++#define IEEE80211_STATMASK_WEMASK 0x7
++
++
++#define IEEE80211_CCK_MODULATION    (1<<0)
++#define IEEE80211_OFDM_MODULATION   (1<<1)
++
++#define IEEE80211_24GHZ_BAND     (1<<0)
++#define IEEE80211_52GHZ_BAND     (1<<1)
++
++#define IEEE80211_CCK_RATE_LEN  		4
++#define IEEE80211_CCK_RATE_1MB		        0x02
++#define IEEE80211_CCK_RATE_2MB		        0x04
++#define IEEE80211_CCK_RATE_5MB		        0x0B
++#define IEEE80211_CCK_RATE_11MB		        0x16
++#define IEEE80211_OFDM_RATE_LEN 		8
++#define IEEE80211_OFDM_RATE_6MB		        0x0C
++#define IEEE80211_OFDM_RATE_9MB		        0x12
++#define IEEE80211_OFDM_RATE_12MB		0x18
++#define IEEE80211_OFDM_RATE_18MB		0x24
++#define IEEE80211_OFDM_RATE_24MB		0x30
++#define IEEE80211_OFDM_RATE_36MB		0x48
++#define IEEE80211_OFDM_RATE_48MB		0x60
++#define IEEE80211_OFDM_RATE_54MB		0x6C
++#define IEEE80211_BASIC_RATE_MASK		0x80
++
++#define IEEE80211_CCK_RATE_1MB_MASK		(1<<0)
++#define IEEE80211_CCK_RATE_2MB_MASK		(1<<1)
++#define IEEE80211_CCK_RATE_5MB_MASK		(1<<2)
++#define IEEE80211_CCK_RATE_11MB_MASK		(1<<3)
++#define IEEE80211_OFDM_RATE_6MB_MASK		(1<<4)
++#define IEEE80211_OFDM_RATE_9MB_MASK		(1<<5)
++#define IEEE80211_OFDM_RATE_12MB_MASK		(1<<6)
++#define IEEE80211_OFDM_RATE_18MB_MASK		(1<<7)
++#define IEEE80211_OFDM_RATE_24MB_MASK		(1<<8)
++#define IEEE80211_OFDM_RATE_36MB_MASK		(1<<9)
++#define IEEE80211_OFDM_RATE_48MB_MASK		(1<<10)
++#define IEEE80211_OFDM_RATE_54MB_MASK		(1<<11)
++
++#define IEEE80211_CCK_RATES_MASK	        0x0000000F
++#define IEEE80211_CCK_BASIC_RATES_MASK	(IEEE80211_CCK_RATE_1MB_MASK | \
++	IEEE80211_CCK_RATE_2MB_MASK)
++#define IEEE80211_CCK_DEFAULT_RATES_MASK	(IEEE80211_CCK_BASIC_RATES_MASK | \
++        IEEE80211_CCK_RATE_5MB_MASK | \
++        IEEE80211_CCK_RATE_11MB_MASK)
++
++#define IEEE80211_OFDM_RATES_MASK		0x00000FF0
++#define IEEE80211_OFDM_BASIC_RATES_MASK	(IEEE80211_OFDM_RATE_6MB_MASK | \
++	IEEE80211_OFDM_RATE_12MB_MASK | \
++	IEEE80211_OFDM_RATE_24MB_MASK)
++#define IEEE80211_OFDM_DEFAULT_RATES_MASK	(IEEE80211_OFDM_BASIC_RATES_MASK | \
++	IEEE80211_OFDM_RATE_9MB_MASK  | \
++	IEEE80211_OFDM_RATE_18MB_MASK | \
++	IEEE80211_OFDM_RATE_36MB_MASK | \
++	IEEE80211_OFDM_RATE_48MB_MASK | \
++	IEEE80211_OFDM_RATE_54MB_MASK)
++#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
++                                IEEE80211_CCK_DEFAULT_RATES_MASK)
++
++#define IEEE80211_NUM_OFDM_RATES	    8
++#define IEEE80211_NUM_CCK_RATES	            4
++#define IEEE80211_OFDM_SHIFT_MASK_A         4
++
++
++
++
++/* NOTE: This data is for statistical purposes; not all hardware provides this
++ *       information for frames received.  Not setting these will not cause
++ *       any adverse affects. */
++struct ieee80211_rx_stats {
++	u32 mac_time[2];
++	u8 signalstrength;
++	s8 rssi;
++	u8 signal;
++	u8 noise;
++	u16 rate; /* in 100 kbps */
++	u8 received_channel;
++	u8 control;
++	u8 mask;
++	u8 freq;
++	u16 len;
++	u8 nic_type;
++};
++
++/* IEEE 802.11 requires that STA supports concurrent reception of at least
++ * three fragmented frames. This define can be increased to support more
++ * concurrent frames, but it should be noted that each entry can consume about
++ * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
++#define IEEE80211_FRAG_CACHE_LEN 4
++
++struct ieee80211_frag_entry {
++	unsigned long first_frag_time;
++	unsigned int seq;
++	unsigned int last_frag;
++	struct sk_buff *skb;
++	u8 src_addr[ETH_ALEN];
++	u8 dst_addr[ETH_ALEN];
++};
++
++struct ieee80211_stats {
++	unsigned int tx_unicast_frames;
++	unsigned int tx_multicast_frames;
++	unsigned int tx_fragments;
++	unsigned int tx_unicast_octets;
++	unsigned int tx_multicast_octets;
++	unsigned int tx_deferred_transmissions;
++	unsigned int tx_single_retry_frames;
++	unsigned int tx_multiple_retry_frames;
++	unsigned int tx_retry_limit_exceeded;
++	unsigned int tx_discards;
++	unsigned int rx_unicast_frames;
++	unsigned int rx_multicast_frames;
++	unsigned int rx_fragments;
++	unsigned int rx_unicast_octets;
++	unsigned int rx_multicast_octets;
++	unsigned int rx_fcs_errors;
++	unsigned int rx_discards_no_buffer;
++	unsigned int tx_discards_wrong_sa;
++	unsigned int rx_discards_undecryptable;
++	unsigned int rx_message_in_msg_fragments;
++	unsigned int rx_message_in_bad_msg_fragments;
++};
++
++struct ieee80211_softmac_stats{
++	unsigned int rx_ass_ok;
++	unsigned int rx_ass_err;
++	unsigned int rx_probe_rq;
++	unsigned int tx_probe_rs;
++	unsigned int tx_beacons;
++	unsigned int rx_auth_rq;
++	unsigned int rx_auth_rs_ok;
++	unsigned int rx_auth_rs_err;
++	unsigned int tx_auth_rq;
++	unsigned int no_auth_rs;
++	unsigned int no_ass_rs;
++	unsigned int tx_ass_rq;
++	unsigned int rx_ass_rq;
++	unsigned int tx_probe_rq;
++	unsigned int reassoc;
++	unsigned int swtxstop;
++	unsigned int swtxawake;
++};
++
++struct ieee80211_device;
++
++#include "ieee80211_crypt.h"
++
++#define SEC_KEY_1         (1<<0)
++#define SEC_KEY_2         (1<<1)
++#define SEC_KEY_3         (1<<2)
++#define SEC_KEY_4         (1<<3)
++#define SEC_ACTIVE_KEY    (1<<4)
++#define SEC_AUTH_MODE     (1<<5)
++#define SEC_UNICAST_GROUP (1<<6)
++#define SEC_LEVEL         (1<<7)
++#define SEC_ENABLED       (1<<8)
++
++#define SEC_LEVEL_0      0 /* None */
++#define SEC_LEVEL_1      1 /* WEP 40 and 104 bit */
++#define SEC_LEVEL_2      2 /* Level 1 + TKIP */
++#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
++#define SEC_LEVEL_3      4 /* Level 2 + CCMP */
++
++#define WEP_KEYS 4
++#define WEP_KEY_LEN 13
++#define ALG_KEY_LEN 32
++
++#ifdef _RTL8187_EXT_PATCH_
++#define MAX_MP 16
++#endif
++struct ieee80211_security {
++	u16 active_key:2,
++            enabled:1,
++	    auth_mode:2,
++            auth_algo:4,
++            unicast_uses_group:1;
++	u8 key_sizes[WEP_KEYS];
++	u8 keys[WEP_KEYS][ALG_KEY_LEN];
++	u8 level;
++	u16 flags;
++} __attribute__ ((packed));
++
++
++/*
++
++ 802.11 data frame from AP
++
++      ,-------------------------------------------------------------------.
++Bytes |  2   |  2   |    6    |    6    |    6    |  2   | 0..2312 |   4  |
++      |------|------|---------|---------|---------|------|---------|------|
++Desc. | ctrl | dura |  DA/RA  |   TA    |    SA   | Sequ |  frame  |  fcs |
++      |      | tion | (BSSID) |         |         | ence |  data   |      |
++      `-------------------------------------------------------------------'
++
++Total: 28-2340 bytes
++
++*/
++
++struct ieee80211_header_data {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[6];
++	u8 addr2[6];
++	u8 addr3[6];
++	u16 seq_ctrl;
++};
++
++#define BEACON_PROBE_SSID_ID_POSITION 12
++
++/* Management Frame Information Element Types */
++#define MFIE_TYPE_SSID       0
++#define MFIE_TYPE_RATES      1
++#define MFIE_TYPE_FH_SET     2
++#define MFIE_TYPE_DS_SET     3
++#define MFIE_TYPE_CF_SET     4
++#define MFIE_TYPE_TIM        5
++#define MFIE_TYPE_IBSS_SET   6
++#define MFIE_TYPE_COUNTRY    7
++#define MFIE_TYPE_CHALLENGE  16
++#define MFIE_TYPE_ERP        42
++#define MFIE_TYPE_RSN	     48
++#define MFIE_TYPE_RATES_EX   50
++#define MFIE_TYPE_GENERIC    221
++
++#ifdef ENABLE_DOT11D
++typedef enum 
++{
++	COUNTRY_CODE_FCC = 0,
++	COUNTRY_CODE_IC = 1,
++	COUNTRY_CODE_ETSI = 2,
++	COUNTRY_CODE_SPAIN = 3,
++	COUNTRY_CODE_FRANCE = 4,
++	COUNTRY_CODE_MKK = 5,
++	COUNTRY_CODE_MKK1 = 6,
++	COUNTRY_CODE_ISRAEL = 7,
++	COUNTRY_CODE_TELEC = 8,
++	COUNTRY_CODE_GLOBAL_DOMAIN = 9,
++	COUNTRY_CODE_WORLD_WIDE_13_INDEX = 10
++}country_code_type_t;	
++#endif
++
++
++struct ieee80211_info_element_hdr {
++	u8 id;
++	u8 len;
++} __attribute__ ((packed));
++
++struct ieee80211_info_element {
++	u8 id;
++	u8 len;
++	u8 data[0];
++} __attribute__ ((packed));
++
++/*
++ * These are the data types that can make up management packets
++ *
++	u16 auth_algorithm;
++	u16 auth_sequence;
++	u16 beacon_interval;
++	u16 capability;
++	u8 current_ap[ETH_ALEN];
++	u16 listen_interval;
++	struct {
++		u16 association_id:14, reserved:2;
++	} __attribute__ ((packed));
++	u32 time_stamp[2];
++	u16 reason;
++	u16 status;
++*/
++
++#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
++#define IEEE80211_DEFAULT_BASIC_RATE 10
++#define IEEE80211_DEFAULT_MESHID   "802.11s"
++#define IEEE80211_DEFAULT_MESH_CHAN 1
++
++struct ieee80211_authentication {
++	struct ieee80211_header_data header;
++	u16 algorithm;
++	u16 transaction;
++	u16 status;
++	//struct ieee80211_info_element_hdr info_element;
++} __attribute__ ((packed));
++
++
++struct ieee80211_probe_response {
++	struct ieee80211_header_data header;
++	u32 time_stamp[2];
++	u16 beacon_interval;
++	u16 capability;
++	struct ieee80211_info_element info_element;
++} __attribute__ ((packed));
++
++struct ieee80211_probe_request {
++	struct ieee80211_header_data header;
++	/*struct ieee80211_info_element info_element;*/
++} __attribute__ ((packed));
++
++struct ieee80211_assoc_request_frame {
++	struct ieee80211_hdr_3addr header;
++	u16 capability;
++	u16 listen_interval;
++	//u8 current_ap[ETH_ALEN];
++	struct ieee80211_info_element_hdr info_element;
++} __attribute__ ((packed));
++
++struct ieee80211_assoc_response_frame {
++	struct ieee80211_hdr_3addr header;
++	u16 capability;
++	u16 status;
++	u16 aid;
++	struct ieee80211_info_element info_element; /* supported rates */
++} __attribute__ ((packed));
++
++
++struct ieee80211_txb {
++	u8 nr_frags;
++	u8 encrypted;
++	u16 reserved;
++	u16 frag_size;
++	u16 payload_size;
++	struct sk_buff *fragments[0];
++};
++
++struct ieee80211_wmm_ac_param {
++	u8 ac_aci_acm_aifsn;
++	u8 ac_ecwmin_ecwmax;
++	u16 ac_txop_limit;
++};
++
++struct ieee80211_wmm_ts_info {
++	u8 ac_dir_tid;
++	u8 ac_up_psb;
++	u8 reserved;
++} __attribute__ ((packed));
++
++struct ieee80211_wmm_tspec_elem {
++	struct ieee80211_wmm_ts_info ts_info;
++	u16 norm_msdu_size;
++	u16 max_msdu_size;
++	u32 min_serv_inter;
++	u32 max_serv_inter;
++	u32 inact_inter;
++	u32 suspen_inter;
++	u32 serv_start_time;
++	u32 min_data_rate;
++	u32 mean_data_rate;
++	u32 peak_data_rate;
++	u32 max_burst_size;
++	u32 delay_bound;
++	u32 min_phy_rate;
++	u16 surp_band_allow;
++	u16 medium_time;
++}__attribute__((packed));
++
++enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
++#define MAX_SP_Len  (WMM_all_frame << 4)
++#define IEEE80211_QOS_TID 0x0f
++#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
++
++/* SWEEP TABLE ENTRIES NUMBER*/
++#define MAX_SWEEP_TAB_ENTRIES		  42
++#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET  7
++/* MAX_RATES_LENGTH needs to be 12.  The spec says 8, and many APs
++ * only use 8, and then use extended rates for the remaining supported
++ * rates.  Other APs, however, stick all of their supported rates on the
++ * main rates information element... */
++#define MAX_RATES_LENGTH                  ((u8)12)
++#define MAX_RATES_EX_LENGTH               ((u8)16)
++#define MAX_NETWORK_COUNT                  128
++#ifdef ENABLE_DOT11D
++#define MAX_CHANNEL_NUMBER                 165 //YJ,modified,080625
++#define MAX_IE_LEN					0xFF //+YJ,080625
++#else
++#define MAX_CHANNEL_NUMBER                 161
++#endif
++
++//#define IEEE80211_SOFTMAC_SCAN_TIME	  400
++#define IEEE80211_SOFTMAC_SCAN_TIME	  100//lzm mod 081209
++//(HZ / 2)
++#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
++
++#define CRC_LENGTH                 4U
++
++#define MAX_WPA_IE_LEN 64
++
++#define NETWORK_EMPTY_ESSID (1<<0)
++#define NETWORK_HAS_OFDM    (1<<1)
++#define NETWORK_HAS_CCK     (1<<2)
++
++#define IEEE80211_DTIM_MBCAST 4
++#define IEEE80211_DTIM_UCAST 2
++#define IEEE80211_DTIM_VALID 1
++#define IEEE80211_DTIM_INVALID 0
++
++#define IEEE80211_PS_DISABLED 0
++#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
++#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
++
++//added by David for QoS 2006/6/30
++//#define WMM_Hang_8187
++#ifdef WMM_Hang_8187
++#undef WMM_Hang_8187
++#endif
++
++#define WME_AC_BE   0x00
++#define WME_AC_BK   0x01
++#define WME_AC_VI   0x02
++#define WME_AC_VO   0x03
++#define WME_ACI_MASK 0x03
++#define WME_AIFSN_MASK 0x03
++#define WME_AC_PRAM_LEN 16
++
++//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
++//#define UP2AC(up)	((up<3) ? ((up==0)?1:0) : (up>>1)) 
++#define UP2AC(up) (		   \
++	((up) < 1) ? WME_AC_BE : \
++	((up) < 3) ? WME_AC_BK : \
++	((up) < 4) ? WME_AC_BE : \
++	((up) < 6) ? WME_AC_VI : \
++	WME_AC_VO)	
++//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue
++#define AC2UP(_ac)	(       \
++	((_ac) == WME_AC_VO) ? 6 : \
++	((_ac) == WME_AC_VI) ? 5 : \
++	((_ac) == WME_AC_BK) ? 1 : \
++	0)
++
++#define	ETHER_ADDR_LEN		6	/* length of an Ethernet address */
++struct	ether_header {
++	u8 ether_dhost[ETHER_ADDR_LEN];
++	u8 ether_shost[ETHER_ADDR_LEN];
++	u16 ether_type;
++} __attribute__((packed)); 
++
++#ifndef ETHERTYPE_PAE
++#define	ETHERTYPE_PAE	0x888e		/* EAPOL PAE/802.1x */
++#endif
++#ifndef ETHERTYPE_IP
++#define	ETHERTYPE_IP	0x0800		/* IP protocol */
++#endif
++
++struct ieee80211_network {
++	/* These entries are used to identify a unique network */
++	u8 bssid[ETH_ALEN];
++	u8 channel;
++	/* Ensure null-terminated for any debug msgs */
++	u8 ssid[IW_ESSID_MAX_SIZE + 1];
++	u8 ssid_len;
++
++	/* These are network statistics */
++	struct ieee80211_rx_stats stats;
++	u16 capability;
++	u8 rates[MAX_RATES_LENGTH];
++	u8 rates_len;
++	u8 rates_ex[MAX_RATES_EX_LENGTH];
++	u8 rates_ex_len;
++	unsigned long last_scanned;
++	u8 mode;
++	u8 flags;
++	u32 last_associate;
++	u32 time_stamp[2];
++	u16 beacon_interval;
++	u16 listen_interval;
++	u16 atim_window;
++	u8 wpa_ie[MAX_WPA_IE_LEN];
++	size_t wpa_ie_len;
++	u8 rsn_ie[MAX_WPA_IE_LEN];
++	size_t rsn_ie_len;
++	u8 dtim_period;
++	u8 dtim_data;
++	u32 last_dtim_sta_time[2];
++#ifdef _RTL8187_EXT_PATCH_
++	void *ext_entry;
++#endif
++	struct list_head list;
++	//appeded for QoS
++	u8 wmm_info;
++	struct ieee80211_wmm_ac_param wmm_param[4];
++	u8 QoS_Enable;
++	u8 SignalStrength;
++#ifdef THOMAS_TURBO
++	u8 Turbo_Enable;//enable turbo mode, added by thomas
++#endif
++
++#ifdef ENABLE_DOT11D
++	u16 CountryIeLen;
++	u8 CountryIeBuf[MAX_IE_LEN];
++#endif
++
++};
++
++enum ieee80211_state {
++
++	/* the card is not linked at all */
++	IEEE80211_NOLINK = 0,
++	
++	/* IEEE80211_ASSOCIATING* are for BSS client mode
++	 * the driver shall not perform RX filtering unless
++	 * the state is LINKED.
++	 * The driver shall just check for the state LINKED and
++	 * defaults to NOLINK for ALL the other states (including
++	 * LINKED_SCANNING)
++	 */
++	
++	/* the association procedure will start (wq scheduling)*/
++	IEEE80211_ASSOCIATING,
++	IEEE80211_ASSOCIATING_RETRY,
++	
++	/* the association procedure is sending AUTH request*/
++	IEEE80211_ASSOCIATING_AUTHENTICATING,
++	
++	/* the association procedure has successfully authentcated
++	 * and is sending association request
++	 */
++	IEEE80211_ASSOCIATING_AUTHENTICATED,
++	
++	/* the link is ok. the card associated to a BSS or linked
++	 * to a ibss cell or acting as an AP and creating the bss
++	 */
++	IEEE80211_LINKED,
++	
++	/* same as LINKED, but the driver shall apply RX filter
++	 * rules as we are in NO_LINK mode. As the card is still
++	 * logically linked, but it is doing a syncro site survey
++	 * then it will be back to LINKED state.
++	 */
++	IEEE80211_LINKED_SCANNING,
++//by amy for mesh
++	IEEE80211_MESH_SCANNING,
++	IEEE80211_MESH_LINKED,
++//by amy for mesh
++	
++};
++
++#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
++#define DEFAULT_FTS 2346
++#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
++#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
++
++
++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,11))
++extern inline int is_multicast_ether_addr(const u8 *addr)
++{
++        return ((addr[0] != 0xff) && (0x01 & addr[0]));
++}
++#endif
++
++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13))
++extern inline int is_broadcast_ether_addr(const u8 *addr)
++{
++	return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) &&   \
++		(addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
++}
++#endif
++
++#define CFG_IEEE80211_RESERVE_FCS (1<<0)
++#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
++
++typedef struct tx_pending_t{
++	int frag;
++	struct ieee80211_txb *txb;
++}tx_pending_t;
++
++#ifdef _RTL8187_EXT_PATCH_
++struct ieee80211_crypt_data_list{
++	u8 used;
++	u8 mac_addr[ETH_ALEN];  //record mac_add
++	struct ieee80211_crypt_data *crypt[WEP_KEYS];
++}__attribute__((packed));
++
++#endif
++
++struct ieee80211_device {
++	struct net_device *dev;
++
++	/* Bookkeeping structures */
++	struct net_device_stats stats;
++	struct ieee80211_stats ieee_stats;
++	struct ieee80211_softmac_stats softmac_stats;
++	
++	/* Probe / Beacon management */
++	struct list_head network_free_list;
++	struct list_head network_list;
++	struct ieee80211_network *networks;
++	int scans;
++	int scan_age;
++
++	int iw_mode; /* operating mode (IW_MODE_*) */
++#ifdef _RTL8187_EXT_PATCH_
++	int iw_ext_mode; // if iw_mode == iw_ext_mode, do ext_patch_**();
++#endif
++
++	spinlock_t lock;
++	spinlock_t wpax_suitlist_lock;
++	
++	int tx_headroom; /* Set to size of any additional room needed at front
++			  * of allocated Tx SKBs */
++	u32 config;
++
++	/* WEP and other encryption related settings at the device level */
++	int open_wep; /* Set to 1 to allow unencrypted frames */
++
++	int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
++				 * WEP key changes */
++
++	/* If the host performs {en,de}cryption, then set to 1 */
++	int host_encrypt;
++	int host_decrypt;
++	int ieee802_1x; /* is IEEE 802.1X used */
++
++	/* WPA data */
++	int wpa_enabled;
++	int drop_unencrypted;
++	int tkip_countermeasures;
++	int privacy_invoked;
++	size_t wpa_ie_len;
++	u8 *wpa_ie;
++
++//#ifdef JOHN_TKIP
++	u8 ap_mac_addr[6];
++	u16 pairwise_key_type;
++	u16 broadcast_key_type;
++//#endif
++	struct list_head crypt_deinit_list;
++#ifdef _RTL8187_EXT_PATCH_
++	struct ieee80211_crypt_data_list* cryptlist[MAX_MP];
++#else
++	struct ieee80211_crypt_data *crypt[WEP_KEYS];
++#endif
++	int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
++	struct timer_list crypt_deinit_timer;
++
++	int bcrx_sta_key; /* use individual keys to override default keys even
++			   * with RX of broad/multicast frames */
++
++	/* Fragmentation structures */
++	// each streaming contain a entry
++	struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
++	unsigned int frag_next_idx[17];
++	u16 fts; /* Fragmentation Threshold */
++
++	/* This stores infos for the current network.
++	 * Either the network we are associated in INFRASTRUCTURE
++	 * or the network that we are creating in MASTER mode.
++	 * ad-hoc is a mixture ;-).
++	 * Note that in infrastructure mode, even when not associated,
++	 * fields bssid and essid may be valid (if wpa_set and essid_set
++	 * are true) as thy carry the value set by the user via iwconfig  
++	 */
++	struct ieee80211_network current_network;
++
++	
++	enum ieee80211_state state;
++
++	int short_slot;
++	int mode;       /* A, B, G */
++	int modulation; /* CCK, OFDM */
++	int freq_band;  /* 2.4Ghz, 5.2Ghz, Mixed */
++	int abg_true;   /* ABG flag              */
++	
++	/* used for forcing the ibss workqueue to terminate 
++	 * without wait for the syncro scan to terminate
++	 */
++	short sync_scan_hurryup; 
++
++#ifdef ENABLE_DOT11D
++	void * pDot11dInfo;
++	bool bGlobalDomain;
++	bool bWorldWide13;//lzm add 20081205
++
++	// For Liteon Ch12~13 passive scan
++	u8	MinPassiveChnlNum;
++	u8	IbssStartChnl;
++#else
++	/* map of allowed channels. 0 is dummy */
++	// FIXME: remeber to default to a basic channel plan depending of the PHY type
++	int channel_map[MAX_CHANNEL_NUMBER+1];
++#endif
++
++	int rate;       /* current rate */
++	int basic_rate;
++	//FIXME: pleace callback, see if redundant with softmac_features
++	short active_scan;
++	
++#ifdef _RTL8187_EXT_PATCH_
++//	short ch_lock;
++        short meshScanMode;
++#endif	
++	/* this contains flags for selectively enable softmac support */
++	u16 softmac_features;
++	
++	/* if the sequence control field is not filled by HW */
++	u16 seq_ctrl[5];
++	
++	/* association procedure transaction sequence number */
++	u16 associate_seq;
++	
++	/* AID for RTXed association responses */
++	u16 assoc_id;
++	
++	/* power save mode related*/
++	short ps;
++	short sta_sleep;
++	int ps_timeout;
++	struct tasklet_struct ps_task;
++	u32 ps_th;
++	u32 ps_tl;
++	
++	short raw_tx;
++	/* used if IEEE_SOFTMAC_TX_QUEUE is set */
++	short queue_stop;
++	short scanning;
++	short scan_watchdog;//lzm add 081215 for roaming
++	short proto_started;
++	
++	struct semaphore wx_sem;
++	struct semaphore scan_sem;
++	struct semaphore ips_sem;	
++	spinlock_t mgmt_tx_lock;	
++	spinlock_t beacon_lock;
++        spinlock_t beaconflag_lock;
++	short beacon_txing;
++
++	short wap_set;
++	short ssid_set;
++	
++	u8  wpax_type_set;    //{added by David, 2006.9.28}
++	u32 wpax_type_notify; //{added by David, 2006.9.26}
++
++	/* QoS related flag */
++	char init_wmmparam_flag;
++	
++	/* for discarding duplicated packets in IBSS */
++	struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
++	
++	/* for discarding duplicated packets in Mesh */ //added by david 2008.2.28/
++	struct list_head mesh_mac_hash[IEEE_MESH_MAC_HASH_SIZE];
++	
++	/* for discarding duplicated packets in BSS */
++	u16 last_rxseq_num[17]; /* rx seq previous per-tid */
++	u16 last_rxfrag_num[17];/* tx frag previous per-tid */
++	unsigned long last_packet_time[17];
++	
++	/* for PS mode */
++	unsigned long last_rx_ps_time;
++	
++	/* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
++	struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
++	int mgmt_queue_head;
++	int mgmt_queue_tail;
++//by amy for ps
++	bool bInactivePs;
++	bool actscanning;
++	u16 ListenInterval;
++	u32 NumRxData;
++	unsigned long NumRxDataInPeriod; //YJ,add,080828
++	unsigned long NumRxBcnInPeriod;  //YJ,add,080828
++//by amy for ps
++	short meshid_set;	
++	/* used if IEEE_SOFTMAC_TX_QUEUE is set */
++	struct  tx_pending_t tx_pending;
++	
++	/* used if IEEE_SOFTMAC_ASSOCIATE is set */
++	struct timer_list associate_timer;
++
++	/* used if IEEE_SOFTMAC_BEACONS is set */
++	struct timer_list beacon_timer;
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++	struct work_struct associate_complete_wq;
++//	struct work_struct associate_retry_wq;
++//	struct work_struct start_ibss_wq;
++	struct work_struct associate_procedure_wq;
++	struct work_struct ips_leave_wq;  //YJ,add,081230,for IPS
++	bool bHwRadioOff;//by lizhaoming
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++        struct delayed_work softmac_scan_wq;
++	struct delayed_work start_ibss_wq;
++        struct delayed_work associate_retry_wq;
++//by amy for rate adaptive
++                struct delayed_work rate_adapter_wq;
++//by amy for rate adaptive
++	struct delayed_work watch_dog_wq;
++	struct delayed_work hw_dig_wq;
++	struct delayed_work tx_pw_wq;
++
++//Added for RF power on power off by lizhaoming 080512
++#ifdef POLLING_METHOD_FOR_RADIO
++	struct delayed_work GPIOChangeRFWorkItem;
++#endif
++
++#ifdef SW_ANTE_DIVERSITY
++	struct delayed_work SwAntennaWorkItem;
++#endif
++
++#else
++        struct work_struct softmac_scan_wq;
++	struct work_struct start_ibss_wq;
++        struct work_struct associate_retry_wq;
++//by amy for rate adaptive
++                struct work_struct rate_adapter_wq;
++//by amy for rate adaptive
++	struct work_struct watch_dog_wq;
++	struct work_struct hw_dig_wq;
++	struct work_struct tx_pw_wq;
++
++//Added for RF power on power off by lizhaoming 080512
++#ifdef POLLING_METHOD_FOR_RADIO
++	struct work_struct GPIOChangeRFWorkItem;
++#endif
++
++#ifdef SW_ANTE_DIVERSITY
++	struct work_struct SwAntennaWorkItem;
++#endif
++
++#endif
++	
++//struct work_struct softmac_scan_wq;
++	struct work_struct wx_sync_scan_wq;
++	struct work_struct wmm_param_update_wq;
++#ifdef _RTL8187_EXT_PATCH_
++	struct work_struct ext_stop_scan_wq;
++	struct work_struct ext_send_beacon_wq;
++#endif
++	struct workqueue_struct *wq;
++#else
++	/* used for periodly scan */
++	struct timer_list scan_timer;
++
++	struct tq_struct associate_complete_wq;
++	struct tq_struct associate_retry_wq;
++	struct tq_struct start_ibss_wq;
++	struct tq_struct associate_procedure_wq;
++	struct tq_struct ips_leave_wq;  //YJ,add,081230,for IPS
++	struct tq_struct softmac_scan_wq;
++	struct tq_struct wx_sync_scan_wq;
++	struct tq_struct wmm_param_update_wq;
++#ifdef _RTL8187_EXT_PATCH_
++	struct tq_struct ext_stop_scan_wq;
++	struct tq_struct ext_send_beacon_wq;
++#endif
++#endif
++
++	/* Callback functions */
++	void (*set_security)(struct net_device *dev,
++			     struct ieee80211_security *sec);
++	
++	/* Used to TX data frame by using txb structs.
++	 * this is not used if in the softmac_features
++	 * is set the flag IEEE_SOFTMAC_TX_QUEUE
++	 */
++	int (*hard_start_xmit)(struct ieee80211_txb *txb,
++			       struct net_device *dev);
++	
++	int (*reset_port)(struct net_device *dev);
++
++	/* Softmac-generated frames (mamagement) are TXed via this 
++	 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is 
++	 * not set. As some cards may have different HW queues that 
++	 * one might want to use for data and management frames
++	 * the option to have two callbacks might be useful.
++	 * This fucntion can't sleep.
++	 */
++	int (*softmac_hard_start_xmit)(struct sk_buff *skb,
++			       struct net_device *dev);
++	
++	/* used instead of hard_start_xmit (not softmac_hard_start_xmit)
++	 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
++	 * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
++	 * then also management frames are sent via this callback.
++	 * This function can't sleep.
++	 */    
++	void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
++			       struct net_device *dev,int rate);
++
++	/* stops the HW queue for DATA frames. Useful to avoid
++	 * waste time to TX data frame when we are reassociating
++	 * This function can sleep.
++	 */	 
++	void (*data_hard_stop)(struct net_device *dev);
++	
++	/* OK this is complementar to data_poll_hard_stop */
++	void (*data_hard_resume)(struct net_device *dev);
++	
++	/* ask to the driver to retune the radio .
++	 * This function can sleep. the driver should ensure
++	 * the radio has been swithced before return.
++	 */
++	void (*set_chan)(struct net_device *dev,short ch);
++	
++	/* These are not used if the ieee stack takes care of
++	 * scanning (IEEE_SOFTMAC_SCAN feature set). 
++	 * In this case only the set_chan is used.
++	 *
++	 * The syncro version is similar to the start_scan but
++	 * does not return until all channels has been scanned.
++	 * this is called in user context and should sleep, 
++	 * it is called in a work_queue when swithcing to ad-hoc mode
++	 * or in behalf of iwlist scan when the card is associated 
++	 * and root user ask for a scan. 
++	 * the fucntion stop_scan should stop both the syncro and
++	 * background scanning and can sleep.
++	 * The fucntion start_scan should initiate the background 
++	 * scanning and can't sleep.
++	 */ 
++	void (*scan_syncro)(struct net_device *dev);
++	void (*start_scan)(struct net_device *dev);
++	void (*stop_scan)(struct net_device *dev);
++	
++	/* indicate the driver that the link state is changed
++	 * for example it may indicate the card is associated now.
++	 * Driver might be interested in this to apply RX filter 
++	 * rules or simply light the LINK led 
++	 */
++	void (*link_change)(struct net_device *dev);
++	
++	/* these two function indicates to the HW when to start
++	 * and stop to send beacons. This is used when the 
++	 * IEEE_SOFTMAC_BEACONS is not set. For now the
++	 * stop_send_bacons is NOT guaranteed to be called only
++	 * after start_send_beacons.
++	 */
++	void (*start_send_beacons) (struct net_device *dev);
++	void (*stop_send_beacons) (struct net_device *dev);
++	
++	/* power save mode related */
++	void (*sta_wake_up) (struct net_device *dev);
++	void (*ps_request_tx_ack) (struct net_device *dev);
++	void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
++	short (*ps_is_queue_empty) (struct net_device *dev);
++
++//by lizhaoming for LED 2008.6.23
++#ifdef LED
++	void (*ieee80211_led_contorl) (struct net_device *dev, LED_CTL_MODE LedAction);
++#endif
++#ifdef CONFIG_IPS
++	void (*ieee80211_ips_leave) (struct net_device *dev);
++#endif
++	/* QoS related */
++	//void (*wmm_param_update) (struct net_device *dev, u8 *ac_param);
++	//void (*wmm_param_update) (struct ieee80211_device *ieee);
++	
++	
++#ifdef _RTL8187_EXT_PATCH_
++
++	/// ieee80211_softmac.c
++	int (*ext_patch_ieee80211_start_protocol) (struct ieee80211_device *ieee); // start special mode
++
++	short (*ext_patch_ieee80211_probe_req_1) (struct ieee80211_device *ieee); // return = 0: no more phases,  >0: another phase
++	u8* (*ext_patch_ieee80211_probe_req_2) (struct ieee80211_device *ieee, struct sk_buff *skb, u8 *tag); // return tag
++
++	void (*ext_patch_ieee80211_stop_protocol) (struct ieee80211_device *ieee); // stop timer
++	
++	void (*ext_patch_ieee80211_association_req_1) (struct ieee80211_assoc_request_frame *hdr);
++	u8* (*ext_patch_ieee80211_association_req_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, struct sk_buff *skb);
++	
++	int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_req) (struct ieee80211_device *ieee, struct sk_buff *skb);
++	int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp) (struct ieee80211_device *ieee, struct sk_buff *skb);
++
++	void (*ext_patch_ieee80211_assoc_resp_by_net_1) (struct ieee80211_assoc_response_frame *assoc);
++	u8* (*ext_patch_ieee80211_assoc_resp_by_net_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, int pkt_type, struct sk_buff *skb);
++		
++	int (*ext_patch_ieee80211_ext_stop_scan_wq_set_channel) (struct ieee80211_device *ieee);
++	
++	int (*ext_patch_ieee80211_softmac_xmit_get_rate) (struct ieee80211_device *ieee, struct sk_buff *skb);
++	
++	int (*ext_patch_ieee80211_rx_frame_softmac_on_auth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
++	int (*ext_patch_ieee80211_rx_frame_softmac_on_deauth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
++//by amy for mesh
++	void (*ext_patch_ieee80211_start_mesh)(struct ieee80211_device *ieee);
++//by amy for mesh 	
++	// ieee80211_rx.c
++	// rz
++	void (*ext_patch_ieee80211_rx_mgt_on_probe_req) ( struct ieee80211_device *ieee, struct ieee80211_probe_request *beacon, struct ieee80211_rx_stats *stats);
++	unsigned int(*ext_patch_ieee80211_process_probe_response_1)(struct ieee80211_device *ieee,	struct ieee80211_probe_response *beacon,	struct ieee80211_rx_stats *stats);
++	
++	void (*ext_patch_ieee80211_rx_mgt_update_expire) ( struct ieee80211_device *ieee, struct sk_buff *skb);
++	struct sk_buff* (*ext_patch_get_beacon_get_probersp)(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);
++
++	// success(return 0) is responsible to free skb
++	int (*ext_patch_ieee80211_rx_on_rx) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats, u16 type, u16 stype);
++	
++	int (*ext_patch_ieee80211_rx_frame_get_hdrlen) (struct ieee80211_device *ieee, struct sk_buff *skb);
++	
++	// Check whether or not accept the incoming frame. return 0: not accept, >0: accept
++	int (*ext_patch_ieee80211_rx_is_valid_framectl) (struct ieee80211_device *ieee, u16 fc, u16 type, u16 stype);
++	
++	// return > 0 is success.  0 when failed
++	// success(return >0) is responsible to free skb
++	int (*ext_patch_ieee80211_rx_process_dataframe) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
++	
++	/* added by david for setting acl dynamically */
++	u8 (*ext_patch_ieee80211_acl_query) (struct ieee80211_device *ieee, u8 *sa);
++
++	// int (*ext_patch_is_duplicate_packet) (struct ieee80211_device *ieee, struct ieee80211_hdr *header, u16 type, u16 stype);
++	
++	// ieee80211_tx.c
++	
++	// locked by ieee->lock. Call ieee80211_softmac_xmit afterward
++	struct ieee80211_txb* (*ext_patch_ieee80211_xmit) (struct sk_buff *skb, struct net_device *dev);
++	
++	
++#endif // _RTL8187_EXT_PATCH_
++
++	/* This must be the last item so that it points to the data
++	 * allocated beyond this structure by alloc_ieee80211 */
++	u8 priv[0];
++};
++
++#define IEEE_A            (1<<0)
++#define IEEE_B            (1<<1)
++#define IEEE_G            (1<<2)
++#define IEEE_MODE_MASK    (IEEE_A|IEEE_B|IEEE_G)
++
++/* Generate a 802.11 header */
++
++/* Uses the channel change callback directly
++ * instead of [start/stop] scan callbacks
++ */
++#define IEEE_SOFTMAC_SCAN (1<<2)
++
++/* Perform authentication and association handshake */
++#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
++
++/* Generate probe requests */
++#define IEEE_SOFTMAC_PROBERQ (1<<4)
++
++/* Generate respones to probe requests */
++#define IEEE_SOFTMAC_PROBERS (1<<5)
++
++/* The ieee802.11 stack will manages the netif queue
++ * wake/stop for the driver, taking care of 802.11
++ * fragmentation. See softmac.c for details. */
++#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
++
++/* Uses only the softmac_data_hard_start_xmit
++ * even for TX management frames.
++ */
++#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
++
++/* Generate beacons.  The stack will enqueue beacons
++ * to the card 
++ */ 
++#define IEEE_SOFTMAC_BEACONS (1<<6)
++#ifdef _RTL8187_EXT_PATCH_
++extern inline int ieee80211_find_MP(struct ieee80211_device* ieee, const u8* addr, u8 set)
++{
++	int i=0;
++	for (i=1; i<MAX_MP; i++)
++	{
++		if ((ieee->cryptlist[i]->used == 0)&&set)
++		{//entry is empty
++			memcpy(ieee->cryptlist[i]->mac_addr, addr, ETH_ALEN);
++			ieee->cryptlist[i]->used = 1;
++			return i;
++		}
++		else if (0 == memcmp(ieee->cryptlist[i]->mac_addr, addr, ETH_ALEN)) //find matched entry
++		{
++			return i;
++		}
++	}
++	return -1;
++}
++#endif
++
++
++
++static inline void *ieee80211_priv(struct net_device *dev)
++{
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 
++	return ((struct ieee80211_device *)netdev_priv(dev))->priv;
++#else
++	return ((struct ieee80211_device *)dev->priv)->priv;
++#endif
++}
++
++extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
++{
++	/* Single white space is for Linksys APs */
++	if (essid_len == 1 && essid[0] == ' ')
++		return 1;
++
++	/* Otherwise, if the entire essid is 0, we assume it is hidden */
++	while (essid_len) {
++		essid_len--;
++		if (essid[essid_len] != '\0')
++			return 0;
++	}
++
++	return 1;
++}
++
++extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
++{
++	/*
++	 * It is possible for both access points and our device to support
++	 * combinations of modes, so as long as there is one valid combination
++	 * of ap/device supported modes, then return success
++	 *
++	 */
++	if ((mode & IEEE_A) &&
++	    (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
++	    (ieee->freq_band & IEEE80211_52GHZ_BAND))
++		return 1;
++
++	if ((mode & IEEE_G) &&
++	    (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
++	    (ieee->freq_band & IEEE80211_24GHZ_BAND))
++		return 1;
++
++	if ((mode & IEEE_B) &&
++	    (ieee->modulation & IEEE80211_CCK_MODULATION) &&
++	    (ieee->freq_band & IEEE80211_24GHZ_BAND))
++		return 1;
++
++	return 0;
++}
++
++extern inline int ieee80211_get_hdrlen(u16 fc)
++{
++	int hdrlen = 24;
++
++	switch (WLAN_FC_GET_TYPE(fc)) {
++	case IEEE80211_FTYPE_DATA:
++		if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
++			hdrlen = 30; /* Addr4 */
++		if(IEEE80211_QOS_HAS_SEQ(fc))
++			hdrlen += 2; /* QOS ctrl*/
++		break;
++	case IEEE80211_FTYPE_CTL:
++		switch (WLAN_FC_GET_STYPE(fc)) {
++		case IEEE80211_STYPE_CTS:
++		case IEEE80211_STYPE_ACK:
++			hdrlen = 10;
++			break;
++		default:
++			hdrlen = 16;
++			break;
++		}
++		break;
++	}
++
++	return hdrlen;
++}
++
++
++
++/* ieee80211.c */
++extern void free_ieee80211(struct net_device *dev);
++extern struct net_device *alloc_ieee80211(int sizeof_priv);
++
++extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
++
++/* ieee80211_tx.c */
++
++extern int ieee80211_encrypt_fragment(
++	struct ieee80211_device *ieee,
++	struct sk_buff *frag,
++	int hdr_len);
++	
++extern int ieee80211_xmit(struct sk_buff *skb,
++			  struct net_device *dev);
++extern void ieee80211_txb_free(struct ieee80211_txb *);
++
++
++/* ieee80211_rx.c */
++extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
++			struct ieee80211_rx_stats *rx_stats);
++extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
++			     struct ieee80211_hdr *header,
++			     struct ieee80211_rx_stats *stats);
++
++/* ieee80211_wx.c */
++extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
++				 struct iw_request_info *info,
++				 union iwreq_data *wrqu, char *key);
++extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
++				   struct iw_request_info *info,
++				   union iwreq_data *wrqu, char *key);
++extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
++				   struct iw_request_info *info,
++				   union iwreq_data *wrqu, char *key);
++extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
++                            struct iw_request_info *info,
++                            union iwreq_data* wrqu, char *extra);
++int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
++                               struct iw_request_info *info,
++                               struct iw_param *data, char *extra);
++int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
++                               struct iw_request_info *info,
++                               union iwreq_data *wrqu, char *extra);
++
++int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len);
++/* ieee80211_softmac.c */
++extern short ieee80211_is_54g(struct ieee80211_network net);
++extern short ieee80211_is_shortslot(struct ieee80211_network net);
++extern int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
++			struct ieee80211_rx_stats *rx_stats, u16 type,
++			u16 stype);
++extern void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net);
++
++extern void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee);
++extern void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee);
++extern void ieee80211_start_bss(struct ieee80211_device *ieee);
++extern void ieee80211_start_master_bss(struct ieee80211_device *ieee);
++extern void ieee80211_start_ibss(struct ieee80211_device *ieee);
++extern void ieee80211_softmac_init(struct ieee80211_device *ieee);
++extern void ieee80211_softmac_free(struct ieee80211_device *ieee);
++extern void ieee80211_associate_abort(struct ieee80211_device *ieee);
++extern void ieee80211_disassociate(struct ieee80211_device *ieee);
++extern void ieee80211_stop_scan(struct ieee80211_device *ieee);
++extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee);
++extern void ieee80211_check_all_nets(struct ieee80211_device *ieee);
++extern void ieee80211_start_protocol(struct ieee80211_device *ieee);
++extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
++extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
++extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
++extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
++extern void ieee80211_wake_queue(struct ieee80211_device *ieee);
++extern void ieee80211_stop_queue(struct ieee80211_device *ieee);
++extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
++extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
++extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
++extern int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p);
++extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
++extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
++extern void ieee80211_start_scan(struct ieee80211_device *ieee);
++
++#ifdef _RTL8187_EXT_PATCH_
++extern void ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb);
++extern void ieee80211_ext_issue_assoc_req(struct ieee80211_device *ieee, struct ieee80211_network *pstat);
++extern void ieee80211_associate_step1(struct ieee80211_device *ieee);
++extern void ieee80211_ext_issue_disassoc(struct ieee80211_device *ieee, struct ieee80211_network *pstat, int reason, unsigned char extReason);
++extern void ieee80211_ext_issue_assoc_rsp(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type);
++extern void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee);
++extern struct sk_buff* ieee80211_ext_probe_resp_by_net(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);
++extern int ieee80211_network_init(struct ieee80211_device *ieee, struct ieee80211_probe_response *beacon, struct ieee80211_network *network, struct ieee80211_rx_stats *stats);
++extern struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size, int gfp_mask);
++extern void ieee80211_ext_send_11s_beacon(struct ieee80211_device *ieee);
++extern struct ieee80211_txb *ieee80211_ext_alloc_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt);
++extern struct ieee80211_txb *ieee80211_ext_reuse_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt);
++extern int ieee_ext_skb_p80211_to_ether(struct sk_buff *skb, int hdrlen, u8 *dst, u8 *src);
++#endif
++
++/* ieee80211_crypt_ccmp&tkip&wep.c */
++extern void ieee80211_tkip_null(void);
++extern void ieee80211_wep_null(void);
++extern void ieee80211_ccmp_null(void);
++/* ieee80211_softmac_wx.c */
++
++extern int ieee80211_wx_get_wap(struct ieee80211_device *ieee, 
++			    struct iw_request_info *info, 
++			    union iwreq_data *wrqu, char *ext);
++			    
++extern int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
++			 struct iw_request_info *info,
++			 union iwreq_data *awrq,
++			 char *extra);
++			 
++extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b);
++
++extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info,
++			     union iwreq_data *wrqu, char *extra);
++			     
++extern int ieee80211_wx_get_rate(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra);
++			     
++extern int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++			     
++extern int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++			     
++extern int ieee80211_wx_set_essid(struct ieee80211_device *ieee, 
++			      struct iw_request_info *a,
++			      union iwreq_data *wrqu, char *extra);
++			      
++extern int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++
++extern int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++
++extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++
++//extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++extern void ieee80211_wx_sync_scan_wq(struct work_struct *work);
++#else
++ extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
++#endif
++extern int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra);
++			       
++extern int ieee80211_wx_get_name(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra);
++
++extern int ieee80211_wx_set_power(struct ieee80211_device *ieee,
++				 struct iw_request_info *info,
++				 union iwreq_data *wrqu, char *extra);
++
++extern int ieee80211_wx_get_power(struct ieee80211_device *ieee,
++				 struct iw_request_info *info,
++				 union iwreq_data *wrqu, char *extra);
++				 			     
++extern const long ieee80211_wlan_frequencies[];
++
++extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
++{
++	ieee->scans++;
++}
++
++extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
++{
++	return ieee->scans;
++}
++
++static inline const char *escape_essid(const char *essid, u8 essid_len) {
++	static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
++	const char *s = essid;
++	char *d = escaped;
++
++	if (ieee80211_is_empty_essid(essid, essid_len)) {
++		memcpy(escaped, "<hidden>", sizeof("<hidden>"));
++		return escaped;
++	}
++
++	essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
++	while (essid_len--) {
++		if (*s == '\0') {
++			*d++ = '\\';
++			*d++ = '0';
++			s++;
++		} else {
++			*d++ = *s++;
++		}
++	}
++	*d = '\0';
++	return escaped;
++}
++#endif /* IEEE80211_H */
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_module.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_module.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,386 @@
++/*******************************************************************************
++
++  Copyright(c) 2004 Intel Corporation. All rights reserved.
++
++  Portions of this file are based on the WEP enablement code provided by the
++  Host AP project hostap-drivers v0.1.3
++  Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
++  <jkmaline@cc.hut.fi>
++  Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
++
++  This program is free software; you can redistribute it and/or modify it
++  under the terms of version 2 of the GNU General Public License as
++  published by the Free Software Foundation.
++
++  This program is distributed in the hope that it will be useful, but WITHOUT
++  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
++  more details.
++
++  You should have received a copy of the GNU General Public License along with
++  this program; if not, write to the Free Software Foundation, Inc., 59
++  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
++
++  The full GNU General Public License is included in this distribution in the
++  file called LICENSE.
++
++  Contact Information:
++  James P. Ketrenos <ipw2100-admin@linux.intel.com>
++  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
++
++*******************************************************************************/
++
++#include <linux/compiler.h>
++//#include <linux/config.h>
++#include <linux/errno.h>
++#include <linux/if_arp.h>
++#include <linux/in6.h>
++#include <linux/in.h>
++#include <linux/ip.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/netdevice.h>
++#include <linux/pci.h>
++#include <linux/proc_fs.h>
++#include <linux/skbuff.h>
++#include <linux/slab.h>
++#include <linux/tcp.h>
++#include <linux/types.h>
++#include <linux/version.h>
++#include <linux/wireless.h>
++#include <linux/etherdevice.h>
++#include <asm/uaccess.h>
++#include <net/arp.h>
++
++#include "ieee80211.h"
++
++MODULE_DESCRIPTION("802.11 data/management/control stack");
++MODULE_AUTHOR("Copyright (C) 2004 Intel Corporation <jketreno@linux.intel.com>");
++MODULE_LICENSE("GPL");
++
++#define DRV_NAME "ieee80211"
++
++static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)
++{
++	if (ieee->networks)
++		return 0;
++
++	ieee->networks = kmalloc(
++		MAX_NETWORK_COUNT * sizeof(struct ieee80211_network),
++		GFP_KERNEL);
++	if (!ieee->networks) {
++		printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
++		       ieee->dev->name);
++		return -ENOMEM;
++	}
++
++	memset(ieee->networks, 0,
++	       MAX_NETWORK_COUNT * sizeof(struct ieee80211_network));
++
++	return 0;
++}
++
++static inline void ieee80211_networks_free(struct ieee80211_device *ieee)
++{
++	if (!ieee->networks)
++		return;
++	kfree(ieee->networks);
++	ieee->networks = NULL;
++}
++
++static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee)
++{
++	int i;
++
++	INIT_LIST_HEAD(&ieee->network_free_list);
++	INIT_LIST_HEAD(&ieee->network_list);
++	for (i = 0; i < MAX_NETWORK_COUNT; i++)
++		list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
++}
++
++
++struct net_device *alloc_ieee80211(int sizeof_priv)
++{
++	struct ieee80211_device *ieee;
++	struct net_device *dev;
++	int i,err;
++
++	IEEE80211_DEBUG_INFO("Initializing...\n");
++
++	dev = alloc_etherdev(sizeof(struct ieee80211_device) + sizeof_priv);
++	if (!dev) {
++		IEEE80211_ERROR("Unable to network device.\n");
++		goto failed;
++	}
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
++	ieee = netdev_priv(dev);
++#else
++	ieee = (struct ieee80211_device *)dev->priv;
++#endif
++	dev->hard_start_xmit = ieee80211_xmit;
++
++	ieee->dev = dev;
++
++	err = ieee80211_networks_allocate(ieee);
++	if (err) {
++		IEEE80211_ERROR("Unable to allocate beacon storage: %d\n",
++				err);
++		goto failed;
++	}
++	ieee80211_networks_initialize(ieee);
++
++	/* Default fragmentation threshold is maximum payload size */
++	ieee->fts = DEFAULT_FTS;
++	ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
++	ieee->open_wep = 1;
++
++	/* Default to enabling full open WEP with host based encrypt/decrypt */
++	ieee->host_encrypt = 1;
++	ieee->host_decrypt = 1;
++	ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
++
++	INIT_LIST_HEAD(&ieee->crypt_deinit_list);
++	init_timer(&ieee->crypt_deinit_timer);
++	ieee->crypt_deinit_timer.data = (unsigned long)ieee;
++	ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
++
++	spin_lock_init(&ieee->lock);
++	spin_lock_init(&ieee->wpax_suitlist_lock);
++
++	ieee->wpax_type_set = 0;
++ 	ieee->wpa_enabled = 0;
++ 	ieee->tkip_countermeasures = 0;
++ 	ieee->drop_unencrypted = 0;
++ 	ieee->privacy_invoked = 0;
++ 	ieee->ieee802_1x = 1;
++	ieee->raw_tx = 0;
++#ifdef _RTL8187_EXT_PATCH_
++	for (i=0; i<MAX_MP; i++)
++	{
++		ieee->cryptlist[i] = (struct ieee80211_crypt_data_list*) kmalloc(sizeof(struct ieee80211_crypt_data_list), GFP_KERNEL);
++		if (NULL == ieee->cryptlist[i])
++                {
++			printk("error kmalloc cryptlist\n");
++			goto failed;
++		}
++		memset(ieee->cryptlist[i], 0, sizeof(struct ieee80211_crypt_data_list));
++	
++	}
++#endif	
++	ieee80211_softmac_init(ieee);
++	
++	for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
++		INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
++	
++	for (i = 0; i < IEEE_MESH_MAC_HASH_SIZE; i++)
++		INIT_LIST_HEAD(&ieee->mesh_mac_hash[i]);
++	
++	for (i = 0; i < 17; i++) {
++	  ieee->last_rxseq_num[i] = -1;
++	  ieee->last_rxfrag_num[i] = -1;
++	  ieee->last_packet_time[i] = 0;
++	}
++#if 1 //added these to autoload encryption module. WB
++	ieee80211_tkip_null();
++	ieee80211_wep_null();
++	ieee80211_ccmp_null();
++#endif
++	return dev;
++
++ failed:
++#ifdef _RTL8187_EXT_PATCH_
++	for (i=0; i<MAX_MP; i++)
++	{
++		if (ieee->cryptlist[i]==NULL){
++			continue;
++		}
++		kfree(ieee->cryptlist[i]);
++		ieee->cryptlist[i] = NULL;
++
++	}
++#endif
++	if (dev)
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
++		free_netdev(dev);
++#else
++		kfree(dev);
++#endif
++	return NULL;
++}
++
++
++void free_ieee80211(struct net_device *dev)
++{
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
++	struct ieee80211_device *ieee = netdev_priv(dev);
++#else
++	struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
++#endif
++	int i;//,j;
++	struct list_head *p, *q;
++	
++	
++	ieee80211_softmac_free(ieee);
++	del_timer_sync(&ieee->crypt_deinit_timer);
++	ieee80211_crypt_deinit_entries(ieee, 1);
++#if 1
++	ieee80211_tkip_null();
++	ieee80211_wep_null();
++	ieee80211_ccmp_null();
++#endif
++	for (i = 0; i < WEP_KEYS; i++) {
++#ifdef _RTL8187_EXT_PATCH_
++{
++	//	int j;
++		for (j=0;j<MAX_MP; j++){
++		if (ieee->cryptlist[j] == NULL)
++		 continue;
++		struct ieee80211_crypt_data *crypt = ieee->cryptlist[j]->crypt[i];
++#else		
++		struct ieee80211_crypt_data *crypt = ieee->crypt[i];
++#endif
++		if (crypt) {
++			if (crypt->ops) {
++				crypt->ops->deinit(crypt->priv);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
++				module_put(crypt->ops->owner);
++#else
++				__MOD_DEC_USE_COUNT(crypt->ops->owner);
++#endif				
++			}
++			kfree(crypt);
++#ifdef _RTL8187_EXT_PATCH_
++			ieee->cryptlist[j]->crypt[i] = NULL;
++			//kfree(ieee->cryptlist[j]);
++			//ieee->cryptlist[j] = NULL;
++#else
++			ieee->crypt[i] = NULL;
++#endif
++		}
++#ifdef _RTL8187_EXT_PATCH_
++		}
++	}
++#endif
++}
++#ifdef _RTL8187_EXT_PATCH_
++for(j=0;j<MAX_MP;j++)
++ {
++	if (ieee->cryptlist[j])
++	{
++	kfree(ieee->cryptlist[j]);
++        ieee->cryptlist[j] = NULL;
++	}
++ }
++
++	for (i = 0; i < IEEE_MESH_MAC_HASH_SIZE; i++) {
++		list_for_each_safe(p, q, &ieee->mesh_mac_hash[i]) {
++			kfree(list_entry(p, struct ieee_mesh_seq, list));
++			list_del(p);
++		}
++	}
++#endif
++	ieee80211_networks_free(ieee);
++	
++	for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++) {
++		list_for_each_safe(p, q, &ieee->ibss_mac_hash[i]) {
++			kfree(list_entry(p, struct ieee_ibss_seq, list));
++			list_del(p);
++		}
++	}
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))	
++	free_netdev(dev);
++#else
++	kfree(dev);
++#endif
++}
++
++#ifdef CONFIG_IEEE80211_DEBUG
++
++static int debug = 0;
++u32 ieee80211_debug_level = 0;
++struct proc_dir_entry *ieee80211_proc = NULL;
++
++static int show_debug_level(char *page, char **start, off_t offset,
++			    int count, int *eof, void *data)
++{
++	return snprintf(page, count, "0x%08X\n", ieee80211_debug_level);
++}
++
++static int store_debug_level(struct file *file, const char *buffer,
++			     unsigned long count, void *data)
++{
++	char buf[] = "0x00000000";
++	unsigned long len = min(sizeof(buf) - 1, (u32)count);
++	char *p = (char *)buf;
++	unsigned long val;
++
++	if (copy_from_user(buf, buffer, len))
++		return count;
++	buf[len] = 0;
++	if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
++		p++;
++		if (p[0] == 'x' || p[0] == 'X')
++			p++;
++		val = simple_strtoul(p, &p, 16);
++	} else
++		val = simple_strtoul(p, &p, 10);
++	if (p == buf)
++		printk(KERN_INFO DRV_NAME
++		       ": %s is not in hex or decimal form.\n", buf);
++	else
++		ieee80211_debug_level = val;
++
++	return strnlen(buf, count);
++}
++
++static int __init ieee80211_init(void)
++{
++	struct proc_dir_entry *e;
++
++	ieee80211_debug_level = debug;
++	ieee80211_proc = create_proc_entry(DRV_NAME, S_IFDIR, proc_net);
++	if (ieee80211_proc == NULL) {
++		IEEE80211_ERROR("Unable to create " DRV_NAME
++				" proc directory\n");
++		return -EIO;
++	}
++	e = create_proc_entry("debug_level", S_IFREG | S_IRUGO | S_IWUSR,
++			      ieee80211_proc);
++	if (!e) {
++		remove_proc_entry(DRV_NAME, proc_net);
++		ieee80211_proc = NULL;
++		return -EIO;
++	}
++	e->read_proc = show_debug_level;
++	e->write_proc = store_debug_level;
++	e->data = NULL;
++
++	return 0;
++}
++
++static void __exit ieee80211_exit(void)
++{
++	if (ieee80211_proc) {
++		remove_proc_entry("debug_level", ieee80211_proc);
++		remove_proc_entry(DRV_NAME, proc_net);
++		ieee80211_proc = NULL;
++	}
++}
++
++#include <linux/moduleparam.h>
++module_param(debug, int, 0444);
++MODULE_PARM_DESC(debug, "debug output mask");
++
++
++module_exit(ieee80211_exit);
++module_init(ieee80211_init);
++#endif
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(alloc_ieee80211);
++EXPORT_SYMBOL(free_ieee80211);
++#else
++EXPORT_SYMBOL_NOVERS(alloc_ieee80211);
++EXPORT_SYMBOL_NOVERS(free_ieee80211);
++#endif
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_rx.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_rx.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,2074 @@
++/*
++ * Original code based Host AP (software wireless LAN access point) driver
++ * for Intersil Prism2/2.5/3 - hostap.o module, common routines
++ *
++ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
++ * <jkmaline@cc.hut.fi>
++ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
++ * Copyright (c) 2004, Intel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ ******************************************************************************
++
++  Few modifications for Realtek's Wi-Fi drivers by 
++  Andrea Merello <andreamrl@tiscali.it>
++  
++  A special thanks goes to Realtek for their support ! 
++
++******************************************************************************/
++ 
++
++#include <linux/compiler.h>
++//#include <linux/config.h>
++#include <linux/errno.h>
++#include <linux/if_arp.h>
++#include <linux/in6.h>
++#include <linux/in.h>
++#include <linux/ip.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/netdevice.h>
++#include <linux/pci.h>
++#include <linux/proc_fs.h>
++#include <linux/skbuff.h>
++#include <linux/slab.h>
++#include <linux/tcp.h>
++#include <linux/types.h>
++#include <linux/version.h>
++#include <linux/wireless.h>
++#include <linux/etherdevice.h>
++#include <asm/uaccess.h>
++#include <linux/ctype.h>
++
++#include "ieee80211.h"
++#ifdef ENABLE_DOT11D
++#include "dot11d.h"
++#endif
++
++static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,
++					struct sk_buff *skb,
++					struct ieee80211_rx_stats *rx_stats)
++{
++	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
++	u16 fc = le16_to_cpu(hdr->frame_ctl);
++
++	skb->dev = ieee->dev;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
++        skb_reset_mac_header(skb);
++#else
++        skb->mac.raw = skb->data;
++#endif
++
++	//skb->mac.raw = skb->data;
++	skb_pull(skb, ieee80211_get_hdrlen(fc));
++	skb->pkt_type = PACKET_OTHERHOST;
++	skb->protocol = __constant_htons(ETH_P_80211_RAW);
++	memset(skb->cb, 0, sizeof(skb->cb));
++	netif_rx(skb);
++}
++
++
++/* Called only as a tasklet (software IRQ) */
++static struct ieee80211_frag_entry *
++ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,
++			  unsigned int frag, u8 tid,u8 *src, u8 *dst)
++{
++	struct ieee80211_frag_entry *entry;
++	int i;
++
++	for (i = 0; i < IEEE80211_FRAG_CACHE_LEN; i++) {
++		entry = &ieee->frag_cache[tid][i];
++		if (entry->skb != NULL &&
++		    time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
++			IEEE80211_DEBUG_FRAG(
++				"expiring fragment cache entry "
++				"seq=%u last_frag=%u\n",
++				entry->seq, entry->last_frag);
++			dev_kfree_skb_any(entry->skb);
++			entry->skb = NULL;
++		}
++
++		if (entry->skb != NULL && entry->seq == seq &&
++		    (entry->last_frag + 1 == frag || frag == -1) &&
++		    memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
++		    memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
++			return entry;
++	}
++
++	return NULL;
++}
++
++/* Called only as a tasklet (software IRQ) */
++static struct sk_buff *
++ieee80211_frag_cache_get(struct ieee80211_device *ieee,
++			 struct ieee80211_hdr *hdr)
++{
++	struct sk_buff *skb = NULL;
++	u16 fc = le16_to_cpu(hdr->frame_ctl);
++	u16 sc = le16_to_cpu(hdr->seq_ctl);
++	unsigned int frag = WLAN_GET_SEQ_FRAG(sc);
++	unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
++	struct ieee80211_frag_entry *entry;
++	struct ieee80211_hdr_3addr_QOS *hdr_3addr_QoS;
++	struct ieee80211_hdr_QOS *hdr_4addr_QoS;
++	u8 tid;
++
++#ifdef _RTL8187_EXT_PATCH_
++	if(ieee->iw_mode == ieee->iw_ext_mode)
++	{
++		tid = (hdr->addr2[ETH_ALEN-2] ^ hdr->addr2[ETH_ALEN-1]) & IEEE80211_QOS_TID;
++	} 
++	else
++#endif
++	if (((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
++	  hdr_4addr_QoS = (struct ieee80211_hdr_QOS *)hdr;
++	  tid = le16_to_cpu(hdr_4addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
++	  tid = UP2AC(tid);
++	  tid ++;
++	} else if (IEEE80211_QOS_HAS_SEQ(fc)) {
++	  hdr_3addr_QoS = (struct ieee80211_hdr_3addr_QOS *)hdr;
++	  tid = le16_to_cpu(hdr_3addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
++	  tid = UP2AC(tid);
++	  tid ++;
++	} else {
++	  tid = 0;
++	}
++
++	if (frag == 0) {
++		/* Reserve enough space to fit maximum frame length */
++		skb = dev_alloc_skb(ieee->dev->mtu +
++				    sizeof(struct ieee80211_hdr) +
++				    8 /* LLC */ +
++				    2 /* alignment */ +
++				    8 /* WEP */ + 
++				    ETH_ALEN /* WDS */ +
++				    (IEEE80211_QOS_HAS_SEQ(fc)?2:0) /* QOS Control */);
++		if (skb == NULL)
++			return NULL;
++
++		entry = &ieee->frag_cache[tid][ieee->frag_next_idx[tid]];
++		ieee->frag_next_idx[tid]++;
++		if (ieee->frag_next_idx[tid] >= IEEE80211_FRAG_CACHE_LEN)
++			ieee->frag_next_idx[tid] = 0;
++
++		if (entry->skb != NULL)
++			dev_kfree_skb_any(entry->skb);
++
++		entry->first_frag_time = jiffies;
++		entry->seq = seq;
++		entry->last_frag = frag;
++		entry->skb = skb;
++		memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
++		memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
++	} else {
++		/* received a fragment of a frame for which the head fragment
++		 * should have already been received */
++		entry = ieee80211_frag_cache_find(ieee, seq, frag, tid,hdr->addr2,
++						  hdr->addr1);
++		if (entry != NULL) {
++			entry->last_frag = frag;
++			skb = entry->skb;
++		}
++	}
++
++	return skb;
++}
++
++
++/* Called only as a tasklet (software IRQ) */
++static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
++					   struct ieee80211_hdr *hdr)
++{
++	u16 fc = le16_to_cpu(hdr->frame_ctl);
++	u16 sc = le16_to_cpu(hdr->seq_ctl);
++	unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
++	struct ieee80211_frag_entry *entry;
++	struct ieee80211_hdr_3addr_QOS *hdr_3addr_QoS;
++	struct ieee80211_hdr_QOS *hdr_4addr_QoS;
++	u8 tid;
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if(ieee->iw_mode == ieee->iw_ext_mode)
++	{
++		tid = (hdr->addr2[ETH_ALEN-2] ^ hdr->addr2[ETH_ALEN-1]) & IEEE80211_QOS_TID;
++	} 
++	else
++#endif
++	if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
++	  hdr_4addr_QoS = (struct ieee80211_hdr_QOS *)hdr;
++	  tid = le16_to_cpu(hdr_4addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
++	  tid = UP2AC(tid);
++	  tid ++;
++	} else if (IEEE80211_QOS_HAS_SEQ(fc)) {
++	  hdr_3addr_QoS = (struct ieee80211_hdr_3addr_QOS *)hdr;
++	  tid = le16_to_cpu(hdr_3addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
++	  tid = UP2AC(tid);
++	  tid ++;
++	} else {
++	  tid = 0;
++	}
++
++	entry = ieee80211_frag_cache_find(ieee, seq, -1, tid,hdr->addr2,
++					  hdr->addr1);
++
++	if (entry == NULL) {
++		IEEE80211_DEBUG_FRAG(
++			"could not invalidate fragment cache "
++			"entry (seq=%u)\n", seq);
++		return -1;
++	}
++
++	entry->skb = NULL;
++	return 0;
++}
++
++
++
++/* ieee80211_rx_frame_mgtmt
++ *
++ * Responsible for handling management control frames
++ *
++ * Called by ieee80211_rx */
++static inline int
++ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
++			struct ieee80211_rx_stats *rx_stats, u16 type,
++			u16 stype)
++{
++	/* On the struct stats definition there is written that
++	 * this is not mandatory.... but seems that the probe
++	 * response parser uses it
++	 */
++	struct ieee80211_hdr * hdr = (struct ieee80211_hdr*)skb->data;
++	rx_stats->len = skb->len;
++	ieee80211_rx_mgt(ieee,(struct ieee80211_hdr *)skb->data,rx_stats);	
++	
++	if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN)))
++	{
++		dev_kfree_skb_any(skb);
++		return 0;
++	}	
++
++	ieee80211_rx_frame_softmac(ieee, skb, rx_stats, type, stype);
++
++	dev_kfree_skb_any(skb);
++	
++	return 0;
++	
++	#ifdef NOT_YET
++	if (ieee->iw_mode == IW_MODE_MASTER) {
++		printk(KERN_DEBUG "%s: Master mode not yet suppported.\n",
++		       ieee->dev->name);
++		return 0;
++/*
++  hostap_update_sta_ps(ieee, (struct hostap_ieee80211_hdr *)
++  skb->data);*/
++	}
++
++	if (ieee->hostapd && type == IEEE80211_TYPE_MGMT) {
++		if (stype == WLAN_FC_STYPE_BEACON &&
++		    ieee->iw_mode == IW_MODE_MASTER) {
++			struct sk_buff *skb2;
++			/* Process beacon frames also in kernel driver to
++			 * update STA(AP) table statistics */
++			skb2 = skb_clone(skb, GFP_ATOMIC);
++			if (skb2)
++				hostap_rx(skb2->dev, skb2, rx_stats);
++		}
++
++		/* send management frames to the user space daemon for
++		 * processing */
++		ieee->apdevstats.rx_packets++;
++		ieee->apdevstats.rx_bytes += skb->len;
++		prism2_rx_80211(ieee->apdev, skb, rx_stats, PRISM2_RX_MGMT);
++		return 0;
++	}
++
++	    if (ieee->iw_mode == IW_MODE_MASTER) {
++		if (type != WLAN_FC_TYPE_MGMT && type != WLAN_FC_TYPE_CTRL) {
++			printk(KERN_DEBUG "%s: unknown management frame "
++			       "(type=0x%02x, stype=0x%02x) dropped\n",
++			       skb->dev->name, type, stype);
++			return -1;
++		}
++
++		hostap_rx(skb->dev, skb, rx_stats);
++		return 0;
++	}
++
++	printk(KERN_DEBUG "%s: hostap_rx_frame_mgmt: management frame "
++	       "received in non-Host AP mode\n", skb->dev->name);
++	return -1;
++	#endif
++}
++
++
++
++/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
++/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
++static unsigned char rfc1042_header[] =
++{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
++/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
++static unsigned char bridge_tunnel_header[] =
++{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
++/* No encapsulation header if EtherType < 0x600 (=length) */
++
++/* Called by ieee80211_rx_frame_decrypt */
++static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
++				    struct sk_buff *skb, size_t hdrlen)
++{
++	struct net_device *dev = ieee->dev;
++	u16 fc, ethertype;
++	struct ieee80211_hdr *hdr;
++	u8 *pos;
++
++	if (skb->len < 24)
++		return 0;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++	fc = le16_to_cpu(hdr->frame_ctl);
++
++	/* check that the frame is unicast frame to us */
++	if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
++	    IEEE80211_FCTL_TODS &&
++	    memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
++	    memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
++		/* ToDS frame with own addr BSSID and DA */
++	} else if ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
++		   IEEE80211_FCTL_FROMDS &&
++		   memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
++		/* FromDS frame with own addr as DA */
++	} else
++		return 0;
++
++	if (skb->len < 24 + 8)
++		return 0;
++
++	/* check for port access entity Ethernet type */
++//	pos = skb->data + 24;
++	pos = skb->data + hdrlen;
++	ethertype = (pos[6] << 8) | pos[7];
++	if (ethertype == ETH_P_PAE)
++		return 1;
++
++	return 0;
++}
++
++/* Called only as a tasklet (software IRQ), by ieee80211_rx */
++static inline int
++ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
++			   struct ieee80211_crypt_data *crypt)
++{
++	struct ieee80211_hdr *hdr;
++	int res, hdrlen;
++
++	if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
++		return 0;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_rx_frame_get_hdrlen))
++	{
++		hdrlen = ieee->ext_patch_ieee80211_rx_frame_get_hdrlen(ieee, skb);
++	}
++	else
++#endif
++	hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
++
++#ifdef CONFIG_IEEE80211_CRYPT_TKIP
++	if (ieee->tkip_countermeasures &&
++	    strcmp(crypt->ops->name, "TKIP") == 0) {
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
++			       "received packet from " MAC_FMT "\n",
++			       ieee->dev->name, MAC_ARG(hdr->addr2));
++		}
++		return -1;
++	}
++#endif
++
++	atomic_inc(&crypt->refcnt);
++	res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
++      	atomic_dec(&crypt->refcnt);
++	if (res < 0) {
++		IEEE80211_DEBUG_DROP(
++			"decryption failed (SA=" MAC_FMT
++			") res=%d\n", MAC_ARG(hdr->addr2), res);
++		if (res == -2)
++			IEEE80211_DEBUG_DROP("Decryption failed ICV "
++					     "mismatch (key %d)\n",
++					     skb->data[hdrlen + 3] >> 6);
++		ieee->ieee_stats.rx_discards_undecryptable++;
++		return -1;
++	}
++
++	return res;
++}
++
++
++/* Called only as a tasklet (software IRQ), by ieee80211_rx */
++static inline int
++ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *skb,
++			     int keyidx, struct ieee80211_crypt_data *crypt)
++{
++	struct ieee80211_hdr *hdr;
++	int res, hdrlen;
++
++	if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
++		return 0;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_rx_frame_get_hdrlen))
++	{
++		hdrlen = ieee->ext_patch_ieee80211_rx_frame_get_hdrlen(ieee, skb);
++	}
++	else
++#endif
++	hdrlen = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
++
++	atomic_inc(&crypt->refcnt);
++	res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv);
++	atomic_dec(&crypt->refcnt);
++	if (res < 0) {
++		printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
++		       " (SA=" MAC_FMT " keyidx=%d)\n",
++		       ieee->dev->name, MAC_ARG(hdr->addr2), keyidx);
++		return -1;
++	}
++
++	return 0;
++}
++
++
++/* this function is stolen from ipw2200 driver*/
++#define IEEE_PACKET_RETRY_TIME (5*HZ)
++static int is_duplicate_packet(struct ieee80211_device *ieee,
++				      struct ieee80211_hdr *header)
++{
++	u16 fc = le16_to_cpu(header->frame_ctl);
++	u16 sc = le16_to_cpu(header->seq_ctl);
++	u16 seq = WLAN_GET_SEQ_SEQ(sc);
++	u16 frag = WLAN_GET_SEQ_FRAG(sc);
++	u16 *last_seq, *last_frag;
++	unsigned long *last_time;
++	struct ieee80211_hdr_3addr_QOS *hdr_3addr_QoS;
++	struct ieee80211_hdr_QOS *hdr_4addr_QoS;
++	u8 tid;
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if(ieee->iw_mode == ieee->iw_ext_mode)
++	{
++		tid = (header->addr2[ETH_ALEN-2] ^ header->addr2[ETH_ALEN-1]) & IEEE80211_QOS_TID;
++	} 
++	else
++#endif
++	//TO2DS and QoS
++	if(((fc & IEEE80211_FCTL_DSTODS) == IEEE80211_FCTL_DSTODS)&&IEEE80211_QOS_HAS_SEQ(fc)) {
++	  hdr_4addr_QoS = (struct ieee80211_hdr_QOS *)header;
++	  tid = le16_to_cpu(hdr_4addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
++	  tid = UP2AC(tid);
++	  tid ++;
++	} else if(IEEE80211_QOS_HAS_SEQ(fc)) { //QoS
++	  hdr_3addr_QoS = (struct ieee80211_hdr_3addr_QOS*)header;
++	  tid = le16_to_cpu(hdr_3addr_QoS->QOS_ctl) & IEEE80211_QOS_TID;
++	  tid = UP2AC(tid);
++	  tid ++;
++	} else { // no QoS
++	  tid = 0;
++	}
++
++	switch (ieee->iw_mode) {
++	case IW_MODE_ADHOC:
++	{
++		struct list_head *p;
++		struct ieee_ibss_seq *entry = NULL;
++		u8 *mac = header->addr2;
++		int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
++		//for (pos = (head)->next; pos != (head); pos = pos->next)
++		__list_for_each(p, &ieee->ibss_mac_hash[index]) {
++			entry = list_entry(p, struct ieee_ibss_seq, list);
++			if (!memcmp(entry->mac, mac, ETH_ALEN))
++				break;
++		}
++	//	if (memcmp(entry->mac, mac, ETH_ALEN)){
++		if (p == &ieee->ibss_mac_hash[index]) {
++			entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
++			if (!entry) {
++				printk(KERN_WARNING "Cannot malloc new mac entry\n");
++				return 0;
++			}
++			memcpy(entry->mac, mac, ETH_ALEN);
++			entry->seq_num[tid] = seq;
++			entry->frag_num[tid] = frag;
++			entry->packet_time[tid] = jiffies;
++			list_add(&entry->list, &ieee->ibss_mac_hash[index]);
++			return 0;
++		}
++		last_seq = &entry->seq_num[tid];
++		last_frag = &entry->frag_num[tid];
++		last_time = &entry->packet_time[tid];
++		break;
++	}
++	
++	case IW_MODE_INFRA:
++		last_seq = &ieee->last_rxseq_num[tid];
++		last_frag = &ieee->last_rxfrag_num[tid];
++		last_time = &ieee->last_packet_time[tid];
++		
++		break;
++	default:
++#ifdef _RTL8187_EXT_PATCH_
++		if(ieee->iw_mode == ieee->iw_ext_mode)
++		{
++#if 0			
++			printk("==============> tid = %d\n", tid);
++			last_seq = &ieee->last_rxseq_num[tid];
++			last_frag = &ieee->last_rxfrag_num[tid];
++			last_time = &ieee->last_packet_time[tid];
++#else
++			struct list_head *p;
++			struct ieee_mesh_seq *entry = NULL;
++			u8 *mac = header->addr2;
++			int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
++
++			__list_for_each(p, &ieee->mesh_mac_hash[index]) {
++				entry = list_entry(p, struct ieee_mesh_seq, list);
++				if (!memcmp(entry->mac, mac, ETH_ALEN))
++					break;
++			}
++			if (p == &ieee->mesh_mac_hash[index]) {
++				entry = kmalloc(sizeof(struct ieee_mesh_seq), GFP_ATOMIC);
++				if (!entry) {
++					printk(KERN_WARNING "Cannot malloc new mac entry for mesh\n");
++					return 0;
++				}
++				memcpy(entry->mac, mac, ETH_ALEN);
++				entry->seq_num = seq;
++				entry->frag_num = frag;
++				entry->packet_time = jiffies;
++				list_add(&entry->list, &ieee->mesh_mac_hash[index]);
++				return 0;
++			}
++			last_seq = &entry->seq_num;
++			last_frag = &entry->frag_num;
++			last_time = &entry->packet_time;
++#endif			
++			break;
++		}
++		else
++#endif
++		return 0;
++	}
++
++//	if(tid != 0) {
++//		printk(KERN_WARNING ":)))))))))))%x %x %x, fc(%x)\n", tid, *last_seq, seq, header->frame_ctl);
++//	}
++	if ((*last_seq == seq) &&
++	    time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
++		if (*last_frag == frag){
++			//printk(KERN_WARNING "[1] go drop!\n");
++			goto drop;
++
++		}
++		if (*last_frag + 1 != frag)
++			/* out-of-order fragment */
++			//printk(KERN_WARNING "[2] go drop!\n");
++			goto drop;
++	} else
++		*last_seq = seq;
++
++	*last_frag = frag;
++	*last_time = jiffies;
++	return 0;
++
++drop:
++//	BUG_ON(!(fc & IEEE80211_FCTL_RETRY));
++//	printk("DUP\n");
++	
++	return 1;
++}
++#ifdef JUST_FOR_87SEMESH
++#define ActionHeadLen 30
++#define WIFI_MESH_TYPE IEEE80211_FTYPE_DATA
++#define WIFI_11S_MESH_ACTION 0x00A0
++#endif
++
++/* All received frames are sent to this function. @skb contains the frame in
++ * IEEE 802.11 format, i.e., in the format it was sent over air.
++ * This function is called only as a tasklet (software IRQ). */
++int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
++		 struct ieee80211_rx_stats *rx_stats)
++{
++	struct net_device *dev = ieee->dev;
++	struct ieee80211_hdr *hdr;
++	//struct ieee80211_hdr_3addr_QOS *hdr;
++	
++	size_t hdrlen;
++	u16 fc, type, stype, sc;
++	struct net_device_stats *stats;
++	unsigned int frag;
++	u8 *payload;
++	u16 ethertype;
++#ifdef NOT_YET
++	struct net_device *wds = NULL;
++	struct sk_buff *skb2 = NULL;
++	struct net_device *wds = NULL;
++	int frame_authorized = 0;
++	int from_assoc_ap = 0;
++	void *sta = NULL;
++#endif
++//	u16 QOS_ctl = 0;
++	u8 dst[ETH_ALEN];
++	u8 src[ETH_ALEN];
++	u8 bssid[ETH_ALEN];
++	struct ieee80211_crypt_data *crypt = NULL;
++	int keyidx = 0;
++
++	//Added for mesh by Lawrence.
++	//u8 status;
++	//u32 flags;
++
++	// cheat the the hdr type
++	hdr = (struct ieee80211_hdr *)skb->data;
++	stats = &ieee->stats;
++
++	if (skb->len < 10) {
++		printk(KERN_INFO "%s: SKB length < 10\n",
++		       dev->name);
++		goto rx_dropped;
++	}
++#if 0
++//{added by david for filter the packet listed in the filter table
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_acl_query))
++	{
++		if(!ieee->ext_patch_ieee80211_acl_query(ieee, hdr->addr2))
++			goto rx_dropped;
++	}
++#endif
++//}
++#endif
++	fc = le16_to_cpu(hdr->frame_ctl);
++	type = WLAN_FC_GET_TYPE(fc);
++	stype = WLAN_FC_GET_STYPE(fc);
++
++	//Because 87se's bad feature,do more handle.
++#ifdef JUST_FOR_87SEMESH
++
++u8 tmphead[ActionHeadLen];
++	if(type ==WIFI_MESH_TYPE && stype== WIFI_11S_MESH_ACTION )
++		//head=sizeof(struct ieee80211_hdr)=30
++	{
++		memset(tmphead,0,ActionHeadLen);
++		memcpy(tmphead,skb->data,ActionHeadLen);
++		
++		skb_pull(skb,ActionHeadLen+2);
++		memcpy(skb_push(skb,ActionHeadLen),tmphead,ActionHeadLen);
++		hdr = (struct ieee80211_hdr *)skb->data;
++	}
++		
++#endif
++	sc = le16_to_cpu(hdr->seq_ctl);
++	
++	frag = WLAN_GET_SEQ_FRAG(sc);
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_rx_frame_get_hdrlen))
++	{
++		hdrlen = ieee->ext_patch_ieee80211_rx_frame_get_hdrlen(ieee, skb);
++		if(skb->len < hdrlen)
++			goto rx_dropped;
++	}
++	else
++#endif
++	hdrlen = ieee80211_get_hdrlen(fc);
++
++#ifdef NOT_YET
++#if WIRELESS_EXT > 15
++	/* Put this code here so that we avoid duplicating it in all
++	 * Rx paths. - Jean II */
++#ifdef IW_WIRELESS_SPY		/* defined in iw_handler.h */
++	/* If spy monitoring on */
++	if (iface->spy_data.spy_number > 0) {
++		struct iw_quality wstats;
++		wstats.level = rx_stats->signal;
++		wstats.noise = rx_stats->noise;
++		wstats.updated = 6;	/* No qual value */
++		/* Update spy records */
++		wireless_spy_update(dev, hdr->addr2, &wstats);
++	}
++#endif /* IW_WIRELESS_SPY */
++#endif /* WIRELESS_EXT > 15 */
++	hostap_update_rx_stats(local->ap, hdr, rx_stats);
++#endif
++
++#if WIRELESS_EXT > 15
++	if (ieee->iw_mode == IW_MODE_MONITOR) {
++		ieee80211_monitor_rx(ieee, skb, rx_stats);
++		stats->rx_packets++;
++		stats->rx_bytes += skb->len;
++		return 1;
++	}
++#endif
++	if (ieee->host_decrypt) {
++		int idx = 0;
++		if (skb->len >= hdrlen + 3)
++			idx = skb->data[hdrlen + 3] >> 6;
++#ifdef _RTL8187_EXT_PATCH_
++
++			crypt = ieee->cryptlist[0]->crypt[idx];
++#if 0
++		{
++			int i = ieee80211_find_MP(ieee, ((struct ieee80211_hdr*)skb->data)->addr2);
++			if (i == -1)
++			{
++				printk("error find entry in entry list\n");
++				goto rx_dropped;
++			}
++			//printk("%s():"MAC_FMT", find in index:%d", __FUNCTION__, MAC_ARG(((struct ieee80211_hdr*)skb->data)->addr2), i);
++			crypt = ieee->cryptlist[i]->crypt[idx];
++		}
++#endif
++#else
++		crypt = ieee->crypt[idx];
++#endif
++
++#ifdef NOT_YET
++		sta = NULL;
++
++		/* Use station specific key to override default keys if the
++		 * receiver address is a unicast address ("individual RA"). If
++		 * bcrx_sta_key parameter is set, station specific key is used
++		 * even with broad/multicast targets (this is against IEEE
++		 * 802.11, but makes it easier to use different keys with
++		 * stations that do not support WEP key mapping). */
++
++		if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
++			(void) hostap_handle_sta_crypto(local, hdr, &crypt,
++							&sta);
++#endif
++
++		/* allow NULL decrypt to indicate an station specific override
++		 * for default encryption */
++		if (crypt && (crypt->ops == NULL ||
++			      crypt->ops->decrypt_mpdu == NULL))
++			crypt = NULL;
++
++		if (!crypt && (fc & IEEE80211_FCTL_WEP)) {
++			/* This seems to be triggered by some (multicast?)
++			 * frames from other than current BSS, so just drop the
++			 * frames silently instead of filling system log with
++			 * these reports. */
++			IEEE80211_DEBUG_DROP("Decryption failed (not set)"
++					     " (SA=" MAC_FMT ")\n",
++					     MAC_ARG(hdr->addr2));
++			ieee->ieee_stats.rx_discards_undecryptable++;
++			goto rx_dropped;
++		}
++	}
++
++	if (skb->len < IEEE80211_DATA_HDR3_LEN)
++		goto rx_dropped;
++
++	// if QoS enabled, should check the sequence for each of the AC
++	if (is_duplicate_packet(ieee, hdr))
++		goto rx_dropped;
++
++#ifdef _RTL8187_EXT_PATCH_
++	if( ieee->iw_mode == ieee->iw_ext_mode && ieee->ext_patch_ieee80211_rx_mgt_update_expire )
++		ieee->ext_patch_ieee80211_rx_mgt_update_expire( ieee, skb );
++#endif
++
++	if (type == IEEE80211_FTYPE_MGMT) {
++		
++	#if 0
++		if ( stype == IEEE80211_STYPE_AUTH &&
++		    fc & IEEE80211_FCTL_WEP && ieee->host_decrypt &&
++		    (keyidx = hostap_rx_frame_decrypt(ieee, skb, crypt)) < 0)
++		{
++			printk(KERN_DEBUG "%s: failed to decrypt mgmt::auth "
++			       "from " MAC_FMT "\n", dev->name,
++			       MAC_ARG(hdr->addr2));
++			/* TODO: could inform hostapd about this so that it
++			 * could send auth failure report */
++			goto rx_dropped;
++		}
++	#endif
++		
++	
++		if (ieee80211_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
++			goto rx_dropped;
++		else
++			goto rx_exit;
++	}
++
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_on_rx)
++	{
++		if(ieee->ext_patch_ieee80211_rx_on_rx(ieee, skb, rx_stats, type, stype)==0)
++		{
++			goto rx_exit;
++		}
++	}
++#endif
++
++	/* Data frame - extract src/dst addresses */
++	switch (fc & (IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
++	case IEEE80211_FCTL_FROMDS:
++		memcpy(dst, hdr->addr1, ETH_ALEN);
++		memcpy(src, hdr->addr3, ETH_ALEN);
++		memcpy(bssid, hdr->addr2, ETH_ALEN);
++		break;
++	case IEEE80211_FCTL_TODS:
++		memcpy(dst, hdr->addr3, ETH_ALEN);
++		memcpy(src, hdr->addr2, ETH_ALEN);
++		memcpy(bssid, hdr->addr1, ETH_ALEN);
++		break;
++	case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
++		if (skb->len < IEEE80211_DATA_HDR4_LEN)
++			goto rx_dropped;
++		memcpy(dst, hdr->addr3, ETH_ALEN);
++		memcpy(src, hdr->addr4, ETH_ALEN);
++		memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
++		break;
++	case 0:
++		memcpy(dst, hdr->addr1, ETH_ALEN);
++		memcpy(src, hdr->addr2, ETH_ALEN);
++		memcpy(bssid, hdr->addr3, ETH_ALEN);
++		break;
++	}
++
++#ifdef NOT_YET
++	if (hostap_rx_frame_wds(ieee, hdr, fc, &wds))
++		goto rx_dropped;
++	if (wds) {
++		skb->dev = dev = wds;
++		stats = hostap_get_stats(dev);
++	}
++
++	if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
++	    (fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) == IEEE80211_FCTL_FROMDS &&
++	    ieee->stadev &&
++	    memcmp(hdr->addr2, ieee->assoc_ap_addr, ETH_ALEN) == 0) {
++		/* Frame from BSSID of the AP for which we are a client */
++		skb->dev = dev = ieee->stadev;
++		stats = hostap_get_stats(dev);
++		from_assoc_ap = 1;
++	}
++#endif
++
++	dev->last_rx = jiffies;
++
++#ifdef NOT_YET
++	if ((ieee->iw_mode == IW_MODE_MASTER ||
++	     ieee->iw_mode == IW_MODE_REPEAT) &&
++	    !from_assoc_ap) {
++		switch (hostap_handle_sta_rx(ieee, dev, skb, rx_stats,
++					     wds != NULL)) {
++		case AP_RX_CONTINUE_NOT_AUTHORIZED:
++			frame_authorized = 0;
++			break;
++		case AP_RX_CONTINUE:
++			frame_authorized = 1;
++			break;
++		case AP_RX_DROP:
++			goto rx_dropped;
++		case AP_RX_EXIT:
++			goto rx_exit;
++		}
++	}
++#endif
++
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_is_valid_framectl)
++	{
++		if(ieee->ext_patch_ieee80211_rx_is_valid_framectl(ieee, fc, type, stype)==0)
++			goto rx_dropped;
++	}
++	else
++#endif
++	/* Nullfunc frames may have PS-bit set, so they must be passed to
++	 * hostap_handle_sta_rx() before being dropped here. */
++	if (stype != IEEE80211_STYPE_DATA &&
++	    stype != IEEE80211_STYPE_DATA_CFACK &&
++	    stype != IEEE80211_STYPE_DATA_CFPOLL &&
++	    stype != IEEE80211_STYPE_DATA_CFACKPOLL&&
++	    stype != IEEE80211_STYPE_QOS_DATA//add by David,2006.8.4
++	    ) {
++		if (stype != IEEE80211_STYPE_NULLFUNC)
++			IEEE80211_DEBUG_DROP(
++				"RX: dropped data frame "
++				"with no data (type=0x%02x, "
++				"subtype=0x%02x, len=%d)\n",
++				type, stype, skb->len);
++		goto rx_dropped;
++	}
++
++	if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN))
++		goto rx_dropped;
++
++	/* skb: hdr + (possibly fragmented, possibly encrypted) payload */
++#ifdef _RTL8187_EXT_PATCH_ 
++		if (ieee->host_decrypt && crypt) {
++		int idx = 0;
++		if (skb->len >= hdrlen + 3)
++			idx = skb->data[hdrlen + 3] >> 6;
++			if (ieee->iw_ext_mode == ieee->iw_mode) //if in mesh mode
++			{
++				int i = ieee80211_find_MP(ieee, ((struct ieee80211_hdr*)skb->data)->addr2, 0);
++			if (i == -1)
++			{
++				printk("error find entry in entry list\n");
++				goto rx_dropped;
++			}
++			//	printk("%s():"MAC_FMT", find in index:%d\n", __FUNCTION__, MAC_ARG(((struct ieee80211_hdr*)skb->data)->addr2), i);
++				if (ieee->cryptlist[i]&&ieee->cryptlist[i]->crypt[idx])
++			                crypt = ieee->cryptlist[i]->crypt[idx];
++		
++				else
++					crypt = NULL;
++			}
++			else 
++			crypt = ieee->cryptlist[0]->crypt[idx];
++		}
++#endif
++
++	if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
++	    (keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0)
++		goto rx_dropped;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++
++	/* skb: hdr + (possibly fragmented) plaintext payload */
++	// PR: FIXME: hostap has additional conditions in the "if" below:
++	// ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
++	if ((frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
++		int flen;
++		struct sk_buff *frag_skb = ieee80211_frag_cache_get(ieee, hdr);
++		IEEE80211_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
++
++		if (!frag_skb) {
++			IEEE80211_DEBUG(IEEE80211_DL_RX | IEEE80211_DL_FRAG,
++					"Rx cannot get skb from fragment "
++					"cache (morefrag=%d seq=%u frag=%u)\n",
++					(fc & IEEE80211_FCTL_MOREFRAGS) != 0,
++					WLAN_GET_SEQ_SEQ(sc), frag);
++			goto rx_dropped;
++		}
++		flen = skb->len;
++		if (frag != 0)
++			flen -= hdrlen;
++
++		if (frag_skb->tail + flen > frag_skb->end) {
++			printk(KERN_WARNING "%s: host decrypted and "
++			       "reassembled frame did not fit skb\n",
++			       dev->name);
++			ieee80211_frag_cache_invalidate(ieee, hdr);
++			goto rx_dropped;
++		}
++
++		if (frag == 0) {
++			/* copy first fragment (including full headers) into
++			 * beginning of the fragment cache skb */
++			memcpy(skb_put(frag_skb, flen), skb->data, flen);
++		} else {
++			/* append frame payload to the end of the fragment
++			 * cache skb */
++			memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
++			       flen);
++		}
++		dev_kfree_skb_any(skb);
++		skb = NULL;
++
++		if (fc & IEEE80211_FCTL_MOREFRAGS) {
++			/* more fragments expected - leave the skb in fragment
++			 * cache for now; it will be delivered to upper layers
++			 * after all fragments have been received */
++			goto rx_exit;
++		}
++
++		/* this was the last fragment and the frame will be
++		 * delivered, so remove skb from fragment cache */
++		skb = frag_skb;
++		hdr = (struct ieee80211_hdr *) skb->data;
++		ieee80211_frag_cache_invalidate(ieee, hdr);
++	}
++
++	/* skb: hdr + (possible reassembled) full MSDU payload; possibly still
++	 * encrypted/authenticated */
++	if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) &&
++	    ieee80211_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
++		goto rx_dropped;
++
++	hdr = (struct ieee80211_hdr *) skb->data;
++	if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep) {
++		if (/*ieee->ieee802_1x &&*/
++		    ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
++
++#ifdef CONFIG_IEEE80211_DEBUG
++			/* pass unencrypted EAPOL frames even if encryption is
++			 * configured */
++			struct eapol *eap = (struct eapol *)(skb->data +
++				24);
++			IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
++						eap_get_type(eap->type));
++#endif
++		} else {
++			IEEE80211_DEBUG_DROP(
++				"encryption configured, but RX "
++				"frame not encrypted (SA=" MAC_FMT ")\n",
++				MAC_ARG(hdr->addr2));
++			goto rx_dropped;
++		}
++	} 
++
++#ifdef CONFIG_IEEE80211_DEBUG
++	if (crypt && !(fc & IEEE80211_FCTL_WEP) &&
++	    ieee80211_is_eapol_frame(ieee, skb)) {
++			struct eapol *eap = (struct eapol *)(skb->data +
++				24);
++			IEEE80211_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
++						eap_get_type(eap->type));
++	}
++#endif
++
++	if (crypt && !(fc & IEEE80211_FCTL_WEP) && !ieee->open_wep &&
++	    !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
++		IEEE80211_DEBUG_DROP(
++			"dropped unencrypted RX data "
++			"frame from " MAC_FMT
++			" (drop_unencrypted=1)\n",
++			MAC_ARG(hdr->addr2));
++		goto rx_dropped;
++	}
++/*
++	if(ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
++		printk(KERN_WARNING "RX: IEEE802.1X EPAOL frame!\n");
++	}
++*/	
++	/* skb: hdr + (possible reassembled) full plaintext payload */
++	payload = skb->data + hdrlen;
++	ethertype = (payload[6] << 8) | payload[7];
++
++#ifdef NOT_YET
++	/* If IEEE 802.1X is used, check whether the port is authorized to send
++	 * the received frame. */
++	if (ieee->ieee802_1x && ieee->iw_mode == IW_MODE_MASTER) {
++		if (ethertype == ETH_P_PAE) {
++			printk(KERN_DEBUG "%s: RX: IEEE 802.1X frame\n",
++			       dev->name);
++			if (ieee->hostapd && ieee->apdev) {
++				/* Send IEEE 802.1X frames to the user
++				 * space daemon for processing */
++				prism2_rx_80211(ieee->apdev, skb, rx_stats,
++						PRISM2_RX_MGMT);
++				ieee->apdevstats.rx_packets++;
++				ieee->apdevstats.rx_bytes += skb->len;
++				goto rx_exit;
++			}
++		} else if (!frame_authorized) {
++			printk(KERN_DEBUG "%s: dropped frame from "
++			       "unauthorized port (IEEE 802.1X): "
++			       "ethertype=0x%04x\n",
++			       dev->name, ethertype);
++			goto rx_dropped;
++		}
++	}
++#endif
++
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_process_dataframe)
++	{
++		if(ieee->ext_patch_ieee80211_rx_process_dataframe(ieee, skb, rx_stats))
++		{
++			stats->rx_packets++;
++			stats->rx_bytes += skb->len;
++			goto rx_exit;
++		}
++		else
++			goto rx_dropped;
++	}
++#endif
++	ieee->NumRxDataInPeriod++;
++//	ieee->NumRxOkTotal++;
++	/* convert hdr + possible LLC headers into Ethernet header */
++	if (skb->len - hdrlen >= 8 &&
++	    ((memcmp(payload, rfc1042_header, SNAP_SIZE) == 0 &&
++	      ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
++	     memcmp(payload, bridge_tunnel_header, SNAP_SIZE) == 0)) {
++		/* remove RFC1042 or Bridge-Tunnel encapsulation and
++		 * replace EtherType */
++		skb_pull(skb, hdrlen + SNAP_SIZE);
++		memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
++		memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
++	} else {
++		u16 len;
++		/* Leave Ethernet header part of hdr and full payload */
++		skb_pull(skb, hdrlen);
++		len = htons(skb->len);
++		memcpy(skb_push(skb, 2), &len, 2);
++		memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
++		memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
++	}
++
++#ifdef NOT_YET
++	if (wds && ((fc & (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) ==
++		    IEEE80211_FCTL_TODS) &&
++	    skb->len >= ETH_HLEN + ETH_ALEN) {
++		/* Non-standard frame: get addr4 from its bogus location after
++		 * the payload */
++		memcpy(skb->data + ETH_ALEN,
++		       skb->data + skb->len - ETH_ALEN, ETH_ALEN);
++		skb_trim(skb, skb->len - ETH_ALEN);
++	}
++#endif
++
++	stats->rx_packets++;
++	stats->rx_bytes += skb->len;
++
++#ifdef NOT_YET
++	if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
++	    ieee->ap->bridge_packets) {
++		if (dst[0] & 0x01) {
++			/* copy multicast frame both to the higher layers and
++			 * to the wireless media */
++			ieee->ap->bridged_multicast++;
++			skb2 = skb_clone(skb, GFP_ATOMIC);
++			if (skb2 == NULL)
++				printk(KERN_DEBUG "%s: skb_clone failed for "
++				       "multicast frame\n", dev->name);
++		} else if (hostap_is_sta_assoc(ieee->ap, dst)) {
++			/* send frame directly to the associated STA using
++			 * wireless media and not passing to higher layers */
++			ieee->ap->bridged_unicast++;
++			skb2 = skb;
++			skb = NULL;
++		}
++	}
++
++	if (skb2 != NULL) {
++		/* send to wireless media */
++		skb2->protocol = __constant_htons(ETH_P_802_3);
++		skb2->mac.raw = skb2->nh.raw = skb2->data;
++		/* skb2->nh.raw = skb2->data + ETH_HLEN; */
++		skb2->dev = dev;
++		dev_queue_xmit(skb2);
++	}
++
++#endif
++	if (skb) {
++		//printk("0skb_len(%d)\n", skb->len);
++		skb->protocol = eth_type_trans(skb, dev);
++		memset(skb->cb, 0, sizeof(skb->cb));
++		skb->dev = dev;
++		skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
++		//skb->ip_summed = CHECKSUM_UNNECESSARY; /* 802.11 crc not sufficient */
++		ieee->last_rx_ps_time = jiffies;
++		//printk("1skb_len(%d)\n", skb->len);
++		netif_rx(skb);
++	}
++
++//by lizhaoming for LED_RX 2008.6.23
++#ifdef LED_SHIN
++//		printk("==================>data rcvd\n");
++		ieee->ieee80211_led_contorl(dev,LED_CTL_RX);
++#endif
++
++ rx_exit:
++#ifdef NOT_YET
++	if (sta)
++		hostap_handle_sta_release(sta);
++#endif
++	return 1;
++
++ rx_dropped:
++	stats->rx_dropped++;
++#if 0
++	int i;
++	printk("======>dropped: %s():addr2:"MAC_FMT",addr1:"MAC_FMT",skb->len:%d, hdrlen:%d\n", __FUNCTION__, MAC_ARG(((struct ieee80211_hdr*)skb->data)->addr2), MAC_ARG(((struct ieee80211_hdr*)skb->data)->addr1), skb->len, hdrlen);
++        for (i = 0; i < skb->len; i++) {
++                       if (i % 16 == 0) printk("\n\t");
++                        printk("%2x ", *(skb->data+i));
++                }
++
++        printk("\n");
++#endif
++	/* Returning 0 indicates to caller that we have not handled the SKB--
++	 * so it is still allocated and can be used again by underlying
++	 * hardware as a DMA target */
++	return 0;
++}
++
++#ifdef _RTL8187_EXT_PATCH_
++int ieee_ext_skb_p80211_to_ether(struct sk_buff *skb, int hdrlen, u8 *dst, u8 *src)
++{
++	u8 *payload;
++	u16 ethertype;
++	
++	/* skb: hdr + (possible reassembled) full plaintext payload */
++	payload = skb->data + hdrlen;
++	ethertype = (payload[6] << 8) | payload[7];
++
++	/* convert hdr + possible LLC headers into Ethernet header */
++	if (skb->len - hdrlen >= 8 &&
++	    ((memcmp(payload, rfc1042_header, SNAP_SIZE) == 0 &&
++	      ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
++	     memcmp(payload, bridge_tunnel_header, SNAP_SIZE) == 0)) {
++		/* remove RFC1042 or Bridge-Tunnel encapsulation and
++		 * replace EtherType */
++		skb_pull(skb, hdrlen + SNAP_SIZE);
++		memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
++		memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
++	} else {
++		u16 len;
++		/* Leave Ethernet header part of hdr and full payload */
++		skb_pull(skb, hdrlen);
++		len = htons(skb->len);
++		memcpy(skb_push(skb, 2), &len, 2);
++		memcpy(skb_push(skb, ETH_ALEN), src, ETH_ALEN);
++		memcpy(skb_push(skb, ETH_ALEN), dst, ETH_ALEN);
++	}
++	
++	return 1;
++}
++#endif // _RTL8187_EXT_PATCH_
++
++
++#define MGMT_FRAME_FIXED_PART_LENGTH		0x24
++
++static inline int ieee80211_is_ofdm_rate(u8 rate)
++{
++	switch (rate & ~IEEE80211_BASIC_RATE_MASK) {
++	case IEEE80211_OFDM_RATE_6MB:
++	case IEEE80211_OFDM_RATE_9MB:
++	case IEEE80211_OFDM_RATE_12MB:
++	case IEEE80211_OFDM_RATE_18MB:
++	case IEEE80211_OFDM_RATE_24MB:
++	case IEEE80211_OFDM_RATE_36MB:
++	case IEEE80211_OFDM_RATE_48MB:
++	case IEEE80211_OFDM_RATE_54MB:
++		return 1;
++	}
++        return 0;
++}
++
++
++//
++//	Description:
++//		Translate 0-100 signal strength index into dBm.
++//
++int 
++TranslateToDbm8187(
++	unsigned char SignalStrengthIndex	// 0-100 index.
++	)
++{
++	unsigned char SignalPower; // in dBm.
++
++	// Translate to dBm (x=0.5y-95).
++	//SignalPower = (int)((SignalStrengthIndex + 1) >> 1); 
++	SignalPower = (int)SignalStrengthIndex * 7 / 10; 
++	SignalPower -= 95; 
++//	printk("==>SignalPower:%d\n", SignalPower);
++	return SignalPower;
++}
++
++static inline int ieee80211_SignalStrengthTranslate(
++	int  CurrSS
++	)
++{
++	int RetSS;
++
++	// Step 1. Scale mapping. 
++	if(CurrSS >= 71 && CurrSS <= 100)
++	{
++		RetSS = 95 + (((CurrSS - 70) / 6 == 5) ? 5 : ((CurrSS - 70) / 6 + 1));
++	}	
++	else if(CurrSS >= 41 && CurrSS <= 70)
++	{
++		RetSS = 83 + ((CurrSS - 40) / 3);
++	}	
++	else if(CurrSS >= 31 && CurrSS <= 40)
++	{
++		RetSS = 71 + (CurrSS - 30);
++	}	
++	else if(CurrSS >= 21 && CurrSS <= 30)
++	{
++		RetSS = 59 + (CurrSS - 20);
++	}	
++	else if(CurrSS >= 5 && CurrSS <= 20)
++	{
++		RetSS = 47 + (((CurrSS - 5) * 2) / 3);
++	}	
++	else if(CurrSS == 4)
++	{
++		RetSS = 37; 
++	}
++	else if(CurrSS == 3)
++	{
++		RetSS = 27; 
++	}
++	else if(CurrSS == 2)
++	{
++		RetSS = 18; 
++	}
++	else if(CurrSS == 1)
++	{
++		RetSS = 9; 
++	}
++	else
++	{
++		RetSS = CurrSS; 
++	}
++	//RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
++
++	// Step 2. Smoothing.
++	
++	//RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
++
++	return RetSS;
++}
++
++#ifdef ENABLE_DOT11D
++static inline void ieee80211_extract_country_ie(
++	struct ieee80211_device *ieee,
++	struct ieee80211_info_element *info_element,
++	struct ieee80211_network *network,
++	u8 * addr2
++)
++{
++#if 0
++	u32 i = 0;
++	u8 * p = (u8*)info_element->data; 
++	printk("-----------------------\n");
++	printk("%s Country IE:", network->ssid);
++	for(i=0; i<info_element->len; i++)
++		printk("\t%2.2x", *(p+i));
++	printk("\n-----------------------\n");
++#endif
++	if(IS_DOT11D_ENABLE(ieee))
++	{
++		if(info_element->len!= 0)
++		{
++			memcpy(network->CountryIeBuf, info_element->data, info_element->len);
++			network->CountryIeLen = info_element->len;
++
++			if(!IS_COUNTRY_IE_VALID(ieee))
++			{
++				Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
++			}
++		}
++
++		//
++		// 070305, rcnjko: I update country IE watch dog here because 
++		// some AP (e.g. Cisco 1242) don't include country IE in their 
++		// probe response frame.
++		//
++		if(IS_EQUAL_CIE_SRC(ieee, addr2) )
++		{
++			UPDATE_CIE_WATCHDOG(ieee);
++		}
++	}
++
++}
++#endif
++
++
++ inline int ieee80211_network_init(
++	struct ieee80211_device *ieee,
++	struct ieee80211_probe_response *beacon,
++	struct ieee80211_network *network,
++	struct ieee80211_rx_stats *stats)
++{
++#ifdef CONFIG_IEEE80211_DEBUG
++	char rates_str[64];
++	char *p;
++#endif
++	struct ieee80211_info_element *info_element;
++ 	u16 left;
++	u8 i;
++	short offset;
++
++	/* Pull out fixed field data */
++	memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
++	network->capability = beacon->capability;
++	network->last_scanned = jiffies;
++	network->time_stamp[0] = beacon->time_stamp[0];
++	network->time_stamp[1] = beacon->time_stamp[1];
++	network->beacon_interval = beacon->beacon_interval;
++	/* Where to pull this? beacon->listen_interval;*/
++	network->listen_interval = 0x0A;
++	network->rates_len = network->rates_ex_len = 0;
++	network->last_associate = 0;
++	network->ssid_len = 0;
++	network->flags = 0;
++	network->atim_window = 0;
++	network->QoS_Enable = 0;
++#ifdef THOMAS_TURBO
++	network->Turbo_Enable = 0;
++#endif
++#ifdef ENABLE_DOT11D
++	network->CountryIeLen = 0;
++	memset(network->CountryIeBuf, 0, MAX_IE_LEN);
++#endif
++		
++	if (stats->freq == IEEE80211_52GHZ_BAND) {
++		/* for A band (No DS info) */
++		network->channel = stats->received_channel;
++	} else
++		network->flags |= NETWORK_HAS_CCK;
++
++ 	network->wpa_ie_len = 0;
++ 	network->rsn_ie_len = 0;
++
++ 	info_element = &beacon->info_element;
++	left = stats->len - ((void *)info_element - (void *)beacon);
++	while (left >= sizeof(struct ieee80211_info_element_hdr)) {
++		if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
++			IEEE80211_DEBUG_SCAN("SCAN: parse failed: info_element->len + 2 > left : info_element->len+2=%d left=%d.\n",
++					     info_element->len + sizeof(struct ieee80211_info_element),
++					     left);
++			return 1;
++               	}
++
++		switch (info_element->id) {
++		case MFIE_TYPE_SSID:
++			if (ieee80211_is_empty_essid(info_element->data,
++						     info_element->len)) {
++				network->flags |= NETWORK_EMPTY_ESSID;
++				break;
++			}
++
++			network->ssid_len = min(info_element->len,
++						(u8)IW_ESSID_MAX_SIZE);
++			memcpy(network->ssid, info_element->data, network->ssid_len);
++        		if (network->ssid_len < IW_ESSID_MAX_SIZE)
++                		memset(network->ssid + network->ssid_len, 0,
++				       IW_ESSID_MAX_SIZE - network->ssid_len);
++
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_SSID: '%s' len=%d.\n",
++					     network->ssid, network->ssid_len);
++			break;
++
++		case MFIE_TYPE_RATES:
++#ifdef CONFIG_IEEE80211_DEBUG
++			p = rates_str;
++#endif
++			network->rates_len = min(info_element->len, MAX_RATES_LENGTH);
++			for (i = 0; i < network->rates_len; i++) {
++				network->rates[i] = info_element->data[i];
++#ifdef CONFIG_IEEE80211_DEBUG
++				p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
++#endif
++				if (ieee80211_is_ofdm_rate(info_element->data[i])) {
++					network->flags |= NETWORK_HAS_OFDM;
++					if (info_element->data[i] &
++					    IEEE80211_BASIC_RATE_MASK)
++						network->flags &=
++							~NETWORK_HAS_CCK;
++				}
++			}
++
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES: '%s' (%d)\n",
++					     rates_str, network->rates_len);
++			break;
++
++		case MFIE_TYPE_RATES_EX:
++#ifdef CONFIG_IEEE80211_DEBUG
++			p = rates_str;
++#endif
++			network->rates_ex_len = min(info_element->len, MAX_RATES_EX_LENGTH);
++			for (i = 0; i < network->rates_ex_len; i++) {
++				network->rates_ex[i] = info_element->data[i];
++#ifdef CONFIG_IEEE80211_DEBUG
++				p += snprintf(p, sizeof(rates_str) - (p - rates_str), "%02X ", network->rates[i]);
++#endif
++				if (ieee80211_is_ofdm_rate(info_element->data[i])) {
++					network->flags |= NETWORK_HAS_OFDM;
++					if (info_element->data[i] &
++					    IEEE80211_BASIC_RATE_MASK)
++						network->flags &=
++							~NETWORK_HAS_CCK;
++				}
++			}
++
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
++					     rates_str, network->rates_ex_len);
++			break;
++
++		case MFIE_TYPE_DS_SET:
++  			IEEE80211_DEBUG_SCAN("MFIE_TYPE_DS_SET: %d\n",
++					     info_element->data[0]);
++			if (stats->freq == IEEE80211_24GHZ_BAND)
++				network->channel = info_element->data[0];
++			break;
++
++	 	case MFIE_TYPE_FH_SET:
++  			IEEE80211_DEBUG_SCAN("MFIE_TYPE_FH_SET: ignored\n");
++			break;
++
++		case MFIE_TYPE_CF_SET:
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_CF_SET: ignored\n");
++			break;
++
++		case MFIE_TYPE_TIM:
++		
++			if(info_element->len < 4) 
++				break;
++			
++			network->dtim_period = info_element->data[1];
++			
++			if(ieee->state != IEEE80211_LINKED)
++				break;
++			
++			network->last_dtim_sta_time[0] = stats->mac_time[0];	
++			network->last_dtim_sta_time[1] = stats->mac_time[1];
++			
++			network->dtim_data = IEEE80211_DTIM_VALID;
++			
++			if(info_element->data[0] != 0)	
++				break;
++			
++			if(info_element->data[2] & 1)
++				network->dtim_data |= IEEE80211_DTIM_MBCAST;
++				
++			offset = (info_element->data[2] >> 1)*2;
++			
++			//printk("offset1:%x aid:%x\n",offset, ieee->assoc_id); 
++		
++			if(ieee->assoc_id < offset || 
++				ieee->assoc_id > 8*(offset + info_element->len -3))
++				
++				break;
++			
++			
++			offset = offset + ieee->assoc_id / 8;// + ((aid % 8)? 0 : 1) ;
++			
++		//	printk("offset:%x data:%x, ucast:%d\n", offset, 
++			//	info_element->data[3+offset] ,
++			//	info_element->data[3+offset] & (1<<(ieee->assoc_id%8)));
++				
++			if(info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
++				network->dtim_data |= IEEE80211_DTIM_UCAST;
++				
++			break;
++			
++		case MFIE_TYPE_IBSS_SET:
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_IBSS_SET: ignored\n");
++			break;
++
++		case MFIE_TYPE_CHALLENGE:
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_CHALLENGE: ignored\n");
++			break;
++
++		case MFIE_TYPE_GENERIC:
++			//nic is 87B
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n",
++					     info_element->len);
++			if (info_element->len >= 4  &&
++			    info_element->data[0] == 0x00 &&
++			    info_element->data[1] == 0x50 &&
++			    info_element->data[2] == 0xf2 &&
++			    info_element->data[3] == 0x01) {
++				network->wpa_ie_len = min(info_element->len + 2,
++							 MAX_WPA_IE_LEN);
++				memcpy(network->wpa_ie, info_element,
++				       network->wpa_ie_len);
++			}
++
++#ifdef THOMAS_TURBO
++			if (info_element->len == 7 &&
++			    info_element->data[0] == 0x00 &&
++			    info_element->data[1] == 0xe0 &&
++			    info_element->data[2] == 0x4c &&
++			    info_element->data[3] == 0x01 &&
++			    info_element->data[4] == 0x02) {
++				network->Turbo_Enable = 1;
++			}
++#endif
++			if (1 == stats->nic_type) {//nic 87
++				break;
++			}
++			
++			if (info_element->len >= 5  &&
++			    info_element->data[0] == 0x00 &&
++			    info_element->data[1] == 0x50 &&
++			    info_element->data[2] == 0xf2 &&
++			    info_element->data[3] == 0x02 &&
++			    info_element->data[4] == 0x00) {
++				//printk(KERN_WARNING "wmm info updated: %x\n", info_element->data[6]);
++				//WMM Information Element
++				network->wmm_info = info_element->data[6];
++				network->QoS_Enable = 1;
++			}
++
++			if (info_element->len >= 8  &&
++			    info_element->data[0] == 0x00 &&
++			    info_element->data[1] == 0x50 &&
++			    info_element->data[2] == 0xf2 &&
++			    info_element->data[3] == 0x02 &&
++			    info_element->data[4] == 0x01) {
++				// Not care about version at present.
++				//WMM Information Element
++				//printk(KERN_WARNING "wmm info&param updated: %x\n", info_element->data[6]);
++				network->wmm_info = info_element->data[6];
++				//WMM Parameter Element
++				memcpy(network->wmm_param, (u8 *)(info_element->data + 8),(info_element->len - 8));
++				network->QoS_Enable = 1;
++			}
++			break;
++
++		case MFIE_TYPE_RSN:
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_RSN: %d bytes\n",
++					     info_element->len);
++			network->rsn_ie_len = min(info_element->len + 2,
++						 MAX_WPA_IE_LEN);
++			memcpy(network->rsn_ie, info_element,
++			       network->rsn_ie_len);
++			break;
++			
++#ifdef ENABLE_DOT11D
++		case MFIE_TYPE_COUNTRY:
++			IEEE80211_DEBUG_SCAN("MFIE_TYPE_COUNTRY: %d bytes\n",
++					     info_element->len);
++//			printk("=====>Receive <%s> Country IE\n",network->ssid);
++			ieee80211_extract_country_ie(ieee, info_element, network, beacon->header.addr2);
++			break;
++#endif
++	
++		default:
++			IEEE80211_DEBUG_SCAN("unsupported IE %d\n",
++					     info_element->id);
++                        break;
++  		}
++
++		left -= sizeof(struct ieee80211_info_element_hdr) +
++			info_element->len;
++		info_element = (struct ieee80211_info_element *)
++                	&info_element->data[info_element->len];
++  	}
++
++	network->mode = 0;
++	if (stats->freq == IEEE80211_52GHZ_BAND)
++		network->mode = IEEE_A;
++	else {
++		if (network->flags & NETWORK_HAS_OFDM)
++			network->mode |= IEEE_G;
++		if (network->flags & NETWORK_HAS_CCK)
++			network->mode |= IEEE_B;
++	}
++
++	if (network->mode == 0) {
++		IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' "
++				     "network.\n",
++				     escape_essid(network->ssid,
++						  network->ssid_len),
++				     MAC_ARG(network->bssid));
++		return 1;
++	}
++
++	if (ieee80211_is_empty_essid(network->ssid, network->ssid_len))
++		network->flags |= NETWORK_EMPTY_ESSID;
++
++#if 1
++	//if(strcmp(network->ssid, "linksys_lzm000") == 0)
++	//	printk("----signalstrength = %d   ", stats->signalstrength);
++	stats->signal = TranslateToDbm8187(stats->signalstrength);
++	//stats->noise = stats->signal - stats->noise;
++	stats->noise = TranslateToDbm8187(100 - stats->signalstrength) - 25;
++#endif
++	memcpy(&network->stats, stats, sizeof(network->stats));
++
++	//YJ,test,080611
++	//if(strcmp(network->ssid, "ZyXEL") == 0)
++	//	IEEE_NET_DUMP(network);
++
++	return 0;
++}
++
++static inline int is_same_network(struct ieee80211_network *src,
++				  struct ieee80211_network *dst,
++				  struct ieee80211_device * ieee)
++{
++	/* A network is only a duplicate if the channel, BSSID, ESSID
++	 * and the capability field (in particular IBSS and BSS) all match.  
++	 * We treat all <hidden> with the same BSSID and channel
++	 * as one network */
++	return (((src->ssid_len == dst->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) &&  //YJ,mod,080819,for hidden ap
++		//((src->ssid_len == dst->ssid_len) &&
++		(src->channel == dst->channel) &&
++		!memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
++		(!memcmp(src->ssid, dst->ssid, src->ssid_len) || (ieee->iw_mode == IW_MODE_INFRA)) && //YJ,mod,080819,for hidden ap
++		//!memcmp(src->ssid, dst->ssid, src->ssid_len) &&
++		((src->capability & WLAN_CAPABILITY_IBSS) == 
++		(dst->capability & WLAN_CAPABILITY_IBSS)) &&
++		((src->capability & WLAN_CAPABILITY_BSS) == 
++		(dst->capability & WLAN_CAPABILITY_BSS)));
++}
++
++inline void update_network(struct ieee80211_network *dst,
++				  struct ieee80211_network *src)
++{
++	unsigned char quality = src->stats.signalstrength;
++	unsigned char signal = 0;
++	unsigned char noise = 0;
++        if(dst->stats.signalstrength > 0) {
++                quality = (dst->stats.signalstrength * 5 + src->stats.signalstrength + 5)/6;
++        }
++	signal = TranslateToDbm8187(quality);
++	//noise = signal - src->stats.noise;
++	if(dst->stats.noise > 0)
++		noise = (dst->stats.noise * 5 + src->stats.noise)/6;
++        //if(strcmp(dst->ssid, "linksys_lzm000") == 0)
++//	printk("ssid:%s, quality:%d, signal:%d\n", dst->ssid, quality, signal);
++	memcpy(&dst->stats, &src->stats, sizeof(struct ieee80211_rx_stats));
++	dst->stats.signalstrength = quality;
++	dst->stats.signal = signal;
++	dst->stats.noise = noise;
++	dst->capability = src->capability;
++	memcpy(dst->rates, src->rates, src->rates_len);
++	dst->rates_len = src->rates_len;
++	memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
++	dst->rates_ex_len = src->rates_ex_len;
++
++	//YJ,add,080819,for hidden ap
++	if(src->ssid_len > 0)
++	{
++		//if(src->ssid_len == 13)
++		//	printk("=====================>>>>>>>> Dst ssid: %s Src ssid: %s\n", dst->ssid, src->ssid);
++		memset(dst->ssid, 0, dst->ssid_len);
++		dst->ssid_len = src->ssid_len;
++		memcpy(dst->ssid, src->ssid, src->ssid_len);
++	}
++	//YJ,add,080819,for hidden ap,end
++	dst->channel = src->channel;
++	dst->mode = src->mode;
++	dst->flags = src->flags;
++	dst->time_stamp[0] = src->time_stamp[0];
++	dst->time_stamp[1] = src->time_stamp[1];
++
++	dst->beacon_interval = src->beacon_interval;
++	dst->listen_interval = src->listen_interval;
++	dst->atim_window = src->atim_window;
++	dst->dtim_period = src->dtim_period;
++	dst->dtim_data = src->dtim_data;
++	dst->last_dtim_sta_time[0] = src->last_dtim_sta_time[0];
++	dst->last_dtim_sta_time[1] = src->last_dtim_sta_time[1];
++	
++	memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
++	dst->wpa_ie_len = src->wpa_ie_len;
++	memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
++	dst->rsn_ie_len = src->rsn_ie_len;
++
++	dst->last_scanned = jiffies;
++	/* dst->last_associate is not overwritten */
++#if 1	
++	dst->wmm_info = src->wmm_info; //sure to exist in beacon or probe response frame.
++/*	
++	if((dst->wmm_info^src->wmm_info)&0x0f) {//Param Set Count change, update Parameter
++	  memcpy(dst->wmm_param, src->wmm_param, IEEE80211_AC_PRAM_LEN);
++	}
++*/
++	if(src->wmm_param[0].ac_aci_acm_aifsn|| \
++	   src->wmm_param[1].ac_aci_acm_aifsn|| \
++	   src->wmm_param[2].ac_aci_acm_aifsn|| \
++	   src->wmm_param[1].ac_aci_acm_aifsn) {
++	  memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
++	}
++	dst->QoS_Enable = src->QoS_Enable;
++#else	
++	dst->QoS_Enable = 1;//for Rtl8187 simulation
++#endif
++	dst->SignalStrength = src->SignalStrength;
++#ifdef THOMAS_TURBO
++	dst->Turbo_Enable = src->Turbo_Enable;
++#endif
++#ifdef ENABLE_DOT11D
++	dst->CountryIeLen = src->CountryIeLen;
++	memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen);
++#endif
++
++}
++
++inline void ieee80211_process_probe_response(
++	struct ieee80211_device *ieee,
++	struct ieee80211_probe_response *beacon,
++	struct ieee80211_rx_stats *stats)
++{
++	struct ieee80211_network network;
++	struct ieee80211_network *target;
++	struct ieee80211_network *oldest = NULL;
++#ifdef CONFIG_IEEE80211_DEBUG
++	struct ieee80211_info_element *info_element = &beacon->info_element;
++#endif
++	unsigned long flags;
++	short renew;
++	u8 wmm_info;
++	u8 is_beacon = (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_BEACON)? 1:0; 
++	
++	memset(&network, 0, sizeof(struct ieee80211_network));
++//rz
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_process_probe_response_1) {
++		ieee->ext_patch_ieee80211_process_probe_response_1(ieee, beacon, stats);
++		return;
++	}
++#endif
++	IEEE80211_DEBUG_SCAN(
++		"'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
++		escape_essid(info_element->data, info_element->len),
++		MAC_ARG(beacon->header.addr3),
++		(beacon->capability & (1<<0xf)) ? '1' : '0',
++		(beacon->capability & (1<<0xe)) ? '1' : '0',
++		(beacon->capability & (1<<0xd)) ? '1' : '0',
++		(beacon->capability & (1<<0xc)) ? '1' : '0',
++		(beacon->capability & (1<<0xb)) ? '1' : '0',
++		(beacon->capability & (1<<0xa)) ? '1' : '0',
++		(beacon->capability & (1<<0x9)) ? '1' : '0',
++		(beacon->capability & (1<<0x8)) ? '1' : '0',
++		(beacon->capability & (1<<0x7)) ? '1' : '0',
++		(beacon->capability & (1<<0x6)) ? '1' : '0',
++		(beacon->capability & (1<<0x5)) ? '1' : '0',
++		(beacon->capability & (1<<0x4)) ? '1' : '0',
++		(beacon->capability & (1<<0x3)) ? '1' : '0',
++		(beacon->capability & (1<<0x2)) ? '1' : '0',
++		(beacon->capability & (1<<0x1)) ? '1' : '0',
++		(beacon->capability & (1<<0x0)) ? '1' : '0');
++
++	if (ieee80211_network_init(ieee, beacon, &network, stats)) {
++		IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n",
++				     escape_essid(info_element->data,
++						  info_element->len),
++				     MAC_ARG(beacon->header.addr3),
++				     WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
++				     IEEE80211_STYPE_PROBE_RESP ?
++				     "PROBE RESPONSE" : "BEACON");
++		return;
++	}
++
++#ifdef ENABLE_DOT11D
++	// For Asus EeePc request, 
++	// (1) if wireless adapter receive get any 802.11d country code in AP beacon, 
++	//	   wireless adapter should follow the country code. 
++	// (2)  If there is no any country code in beacon, 
++	//       then wireless adapter should do active scan from ch1~11 and 
++	//       passive scan from ch12~14
++	if(ieee->bGlobalDomain)
++	{
++		if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP)
++		{
++			// Case 1: Country code
++			if(IS_COUNTRY_IE_VALID(ieee) )
++			{
++				if( !IsLegalChannel(ieee, network.channel) )
++				{
++					printk("GetScanInfo(): For Country code, filter probe response at channel(%d).\n", network.channel);
++					return;
++				}
++			}
++			// Case 2: No any country code.
++			else  
++			{
++				// Filter over channel ch12~14
++				if(network.channel > 11)
++				{
++					printk("GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network.channel);
++					return;
++				}
++			}
++		}
++		else
++		{
++			// Case 1: Country code
++			if(IS_COUNTRY_IE_VALID(ieee) )
++			{
++				if( !IsLegalChannel(ieee, network.channel) )
++				{
++					printk("GetScanInfo(): For Country code, filter beacon at channel(%d).\n",network.channel);
++					return;
++				}
++			}
++			// Case 2: No any country code.
++			else  
++			{
++				// Filter over channel ch12~14
++				if(network.channel > 14)
++				{
++					printk("GetScanInfo(): For Global Domain, filter beacon at channel(%d).\n",network.channel);
++					return;
++				}
++			}
++		}
++	}
++
++	//lzm add 081205
++	// for Toshiba request, we use channel_plan COUNTRY_CODE_WORLD_WIDE_13_INDEX,
++	// For Liteon "World Wide 13" Domain name:ch1~11 active scan & ch12~13 passive scan 
++	// So we shoud only rcv beacon in 12-13, and filter probe resp in 12-13.
++	if(ieee->MinPassiveChnlNum != MAX_CHANNEL_NUMBER+1)
++	{
++		if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == IEEE80211_STYPE_PROBE_RESP)
++		{
++			// Filter over channel ch12~13
++			if(network.channel >= ieee->MinPassiveChnlNum)
++			{
++				printk("GetScanInfo(): passive scan, filter probe resp at channel(%d).\n", network.channel);
++				return;
++			}
++		}
++	}
++#endif
++
++
++	/* The network parsed correctly -- so now we scan our known networks
++	 * to see if we can find it in our list.
++	 *
++	 * NOTE:  This search is definitely not optimized.  Once its doing
++	 *        the "right thing" we'll optimize it for efficiency if
++	 *        necessary */
++
++	/* Search for this entry in the list and update it if it is
++	 * already there. */
++
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	if(is_same_network(&ieee->current_network, &network, ieee)) {
++		//YJ,add,080819,for hidden ap
++		if(is_beacon == 0)
++			network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags);
++		if ((ieee->state == IEEE80211_LINKED) && is_beacon)
++			ieee->NumRxBcnInPeriod++;
++		wmm_info = ieee->current_network.wmm_info;
++		update_network(&ieee->current_network, &network);
++	}
++		
++	list_for_each_entry(target, &ieee->network_list, list) {
++		if (is_same_network(target, &network, ieee))
++			break;
++		if ((oldest == NULL) ||
++		    (target->last_scanned < oldest->last_scanned))
++			oldest = target;
++	}
++
++	/* If we didn't find a match, then get a new network slot to initialize
++	 * with this beacon's information */
++	if (&target->list == &ieee->network_list) {
++		if (list_empty(&ieee->network_free_list)) {
++			/* If there are no more slots, expire the oldest */
++			list_del(&oldest->list);
++			target = oldest;
++			IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from "
++					     "network list.\n",
++					     escape_essid(target->ssid,
++							  target->ssid_len),
++					     MAC_ARG(target->bssid));
++		} else {
++			/* Otherwise just pull from the free list */
++			target = list_entry(ieee->network_free_list.next,
++					    struct ieee80211_network, list);
++			list_del(ieee->network_free_list.next);
++		}
++
++
++#ifdef CONFIG_IEEE80211_DEBUG
++		IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n",
++				     escape_essid(network.ssid,
++						  network.ssid_len),
++				     MAC_ARG(network.bssid),
++				     WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
++				     IEEE80211_STYPE_PROBE_RESP ?
++				     "PROBE RESPONSE" : "BEACON");
++#endif
++
++#ifdef _RTL8187_EXT_PATCH_
++	network.ext_entry = target->ext_entry;
++#endif	
++		memcpy(target, &network, sizeof(*target));
++		list_add_tail(&target->list, &ieee->network_list);
++		if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE)
++			ieee80211_softmac_new_net(ieee,&network); 
++	} else {
++		IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n",
++				     escape_essid(target->ssid,
++						  target->ssid_len),
++				     MAC_ARG(target->bssid),
++				     WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
++				     IEEE80211_STYPE_PROBE_RESP ?
++				     "PROBE RESPONSE" : "BEACON");
++		
++		/* we have an entry and we are going to update it. But this entry may
++		 * be already expired. In this case we do the same as we found a new 
++		 * net and call the new_net handler
++		 */
++		renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
++		//YJ,add,080819,for hidden ap
++		if(is_beacon == 0)
++			network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags);
++		//if(strncmp(network.ssid, "linksys-c",9) == 0)
++		//	printk("====>2 network.ssid=%s FLAG=%d target.ssid=%s FLAG=%d\n", network.ssid, network.flags, target->ssid, target->flags);
++		if(((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \
++		    && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\
++		    ||((ieee->current_network.ssid_len == network.ssid_len)&&(strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0)&&(ieee->state == IEEE80211_NOLINK))))
++			renew = 1;
++		//YJ,add,080819,for hidden ap,end
++		update_network(target, &network);
++		if(renew && (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE))
++			ieee80211_softmac_new_net(ieee,&network); 
++	}
++
++	spin_unlock_irqrestore(&ieee->lock, flags);
++}
++
++void ieee80211_rx_mgt(struct ieee80211_device *ieee,
++		      struct ieee80211_hdr *header,
++		      struct ieee80211_rx_stats *stats)
++{
++	switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
++	
++	case IEEE80211_STYPE_BEACON:
++		IEEE80211_DEBUG_MGMT("received BEACON (%d)\n",
++				     WLAN_FC_GET_STYPE(header->frame_ctl));
++		IEEE80211_DEBUG_SCAN("Beacon\n");
++		ieee80211_process_probe_response(
++			ieee, (struct ieee80211_probe_response *)header, stats);
++		break;
++		
++	case IEEE80211_STYPE_PROBE_RESP:
++		IEEE80211_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
++				     WLAN_FC_GET_STYPE(header->frame_ctl));
++		IEEE80211_DEBUG_SCAN("Probe response\n");
++		ieee80211_process_probe_response(
++			ieee, (struct ieee80211_probe_response *)header, stats);
++		break;
++//rz
++#ifdef _RTL8187_EXT_PATCH_
++	case IEEE80211_STYPE_PROBE_REQ:
++		IEEE80211_DEBUG_MGMT("received PROBE REQUEST (%d)\n",
++				     WLAN_FC_GET_STYPE(header->frame_ctl));
++		IEEE80211_DEBUG_SCAN("Probe request\n");
++		///  
++		//printk("Probe request\n");
++		if( ieee->iw_mode == ieee->iw_ext_mode && ieee->ext_patch_ieee80211_rx_mgt_on_probe_req )
++			ieee->ext_patch_ieee80211_rx_mgt_on_probe_req( ieee, (struct ieee80211_probe_request *)header, stats);
++		break;
++#endif // _RTL8187_EXT_PATCH_
++
++	}
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(ieee80211_rx_mgt);
++EXPORT_SYMBOL(ieee80211_rx);
++EXPORT_SYMBOL(ieee80211_network_init);
++#ifdef _RTL8187_EXT_PATCH_
++EXPORT_SYMBOL(ieee_ext_skb_p80211_to_ether);
++#endif
++#else
++EXPORT_SYMBOL_NOVERS(ieee80211_rx_mgt);
++EXPORT_SYMBOL_NOVERS(ieee80211_rx);
++EXPORT_SYMBOL_NOVERS(ieee80211_network_init);
++#ifdef _RTL8187_EXT_PATCH_
++EXPORT_SYMBOL_NOVERS(ieee_ext_skb_p80211_to_ether);
++#endif
++#endif
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_softmac.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_softmac.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,4083 @@
++/* IEEE 802.11 SoftMAC layer
++ * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
++ *
++ * Mostly extracted from the rtl8180-sa2400 driver for the 
++ * in-kernel generic ieee802.11 stack.
++ *
++ * Few lines might be stolen from other part of the ieee80211
++ * stack. Copyright who own it's copyright
++ *
++ * WPA code stolen from the ipw2200 driver.
++ * Copyright who own it's copyright. 
++ *
++ * released under the GPL
++ */
++
++
++#include "ieee80211.h"
++
++#include <linux/random.h>
++#include <linux/delay.h>
++#include <linux/version.h>
++#include <asm/uaccess.h>
++
++#ifdef ENABLE_DOT11D
++#include "dot11d.h"
++#endif
++
++
++u8 rsn_authen_cipher_suite[16][4] = {
++	{0x00,0x0F,0xAC,0x00}, //Use group key, //Reserved
++	{0x00,0x0F,0xAC,0x01}, //WEP-40         //RSNA default      
++	{0x00,0x0F,0xAC,0x02}, //TKIP           //NONE		//{used just as default} 	
++	{0x00,0x0F,0xAC,0x03}, //WRAP-historical 
++	{0x00,0x0F,0xAC,0x04}, //CCMP 
++	{0x00,0x0F,0xAC,0x05}, //WEP-104
++};
++
++short ieee80211_is_54g(struct ieee80211_network net)
++{
++	return ((net.rates_ex_len > 0) || (net.rates_len > 4));
++}
++
++short ieee80211_is_shortslot(struct ieee80211_network net)
++{
++	return (net.capability & WLAN_CAPABILITY_SHORT_SLOT);
++}
++
++/* returns the total length needed for pleacing the RATE MFIE
++ * tag and the EXTENDED RATE MFIE tag if needed.
++ * It encludes two bytes per tag for the tag itself and its len
++ */
++unsigned int ieee80211_MFIE_rate_len(struct ieee80211_device *ieee)
++{
++	unsigned int rate_len = 0;
++	
++	if (ieee->modulation & IEEE80211_CCK_MODULATION)
++		rate_len = IEEE80211_CCK_RATE_LEN + 2;
++		
++	if (ieee->modulation & IEEE80211_OFDM_MODULATION)
++		
++		rate_len += IEEE80211_OFDM_RATE_LEN + 2;
++	
++	return rate_len;
++}
++
++/* pleace the MFIE rate, tag to the memory (double) poined. 
++ * Then it updates the pointer so that
++ * it points after the new MFIE tag added.
++ */  
++void ieee80211_MFIE_Brate(struct ieee80211_device *ieee, u8 **tag_p)
++{
++	u8 *tag = *tag_p; 
++	
++	if (ieee->modulation & IEEE80211_CCK_MODULATION){
++		*tag++ = MFIE_TYPE_RATES;
++		*tag++ = 7;
++		*tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
++		*tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
++		*tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
++		*tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
++		//added for basic rate set
++		*tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
++		*tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
++		*tag++ = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
++	}
++	
++	/* We may add an option for custom rates that specific HW might support */
++	*tag_p = tag;
++}
++
++void ieee80211_MFIE_Grate(struct ieee80211_device *ieee, u8 **tag_p)
++{	
++	u8 *tag = *tag_p; 
++	
++		if (ieee->modulation & IEEE80211_OFDM_MODULATION){
++		
++		*tag++ = MFIE_TYPE_RATES_EX;
++		*tag++ = 5;
++		*tag++ = IEEE80211_OFDM_RATE_9MB;
++		*tag++ = IEEE80211_OFDM_RATE_18MB;
++		*tag++ = IEEE80211_OFDM_RATE_36MB;
++		*tag++ = IEEE80211_OFDM_RATE_48MB;
++		*tag++ = IEEE80211_OFDM_RATE_54MB;
++		
++	}
++	
++	/* We may add an option for custom rates that specific HW might support */
++	*tag_p = tag;
++}
++
++
++void ieee80211_WMM_Info(struct ieee80211_device *ieee, u8 **tag_p) {
++	u8 *tag = *tag_p;
++
++	*tag++ = MFIE_TYPE_GENERIC; //0
++	*tag++ = 7;
++	*tag++ = 0x00;
++	*tag++ = 0x50;
++	*tag++ = 0xf2;
++	*tag++ = 0x02;//5
++	*tag++ = 0x00;
++	*tag++ = 0x01;
++#ifdef SUPPORT_USPD	
++	if(ieee->current_network.wmm_info & 0x80) {
++		*tag++ = 0x0f|MAX_SP_Len;
++	} else {
++		*tag++ = MAX_SP_Len;
++	}
++#else 
++	*tag++ = MAX_SP_Len;
++#endif
++	*tag_p = tag;
++}
++
++#ifdef THOMAS_TURBO
++void ieee80211_TURBO_Info(struct ieee80211_device *ieee, u8 **tag_p) {
++	u8 *tag = *tag_p;
++
++        *tag++ = MFIE_TYPE_GENERIC; //0
++        *tag++ = 7;
++        *tag++ = 0x00;
++        *tag++ = 0xe0;
++        *tag++ = 0x4c;
++        *tag++ = 0x01;//5
++        *tag++ = 0x02;
++        *tag++ = 0x11;
++	*tag++ = 0x00;
++
++	*tag_p = tag;
++	printk(KERN_ALERT "This is enable turbo mode IE process\n");
++}
++#endif
++
++void enqueue_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb)
++{
++	int nh;
++	nh = (ieee->mgmt_queue_head +1) % MGMT_QUEUE_NUM;
++			
++/*
++ * if the queue is full but we have newer frames then
++ * just overwrites the oldest.
++ *	
++ * if (nh == ieee->mgmt_queue_tail)
++ *		return -1;
++ */		
++	ieee->mgmt_queue_head = nh;
++	ieee->mgmt_queue_ring[nh] = skb;
++	
++	//return 0;
++}
++
++struct sk_buff *dequeue_mgmt(struct ieee80211_device *ieee)
++{
++	struct sk_buff *ret;
++	
++	if(ieee->mgmt_queue_tail == ieee->mgmt_queue_head)
++		return NULL;
++		
++	ret = ieee->mgmt_queue_ring[ieee->mgmt_queue_tail];
++	
++	ieee->mgmt_queue_tail = 
++		(ieee->mgmt_queue_tail+1) % MGMT_QUEUE_NUM;
++	
++	return ret;
++}
++
++void init_mgmt_queue(struct ieee80211_device *ieee)
++{
++	ieee->mgmt_queue_tail = ieee->mgmt_queue_head = 0;
++}
++
++
++void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl);
++
++inline void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)
++{
++	unsigned long flags;
++	short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
++	struct ieee80211_hdr_3addr  *header=
++		(struct ieee80211_hdr_3addr  *) skb->data;
++	
++	
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	/* called with 2nd param 0, no mgmt lock required */
++	ieee80211_sta_wakeup(ieee,0);
++		
++	if(single){
++		if(ieee->queue_stop){
++			
++			enqueue_mgmt(ieee,skb);
++		}else{
++			header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4);
++
++			if (ieee->seq_ctrl[0] == 0xFFF)
++				ieee->seq_ctrl[0] = 0;
++			else
++				ieee->seq_ctrl[0]++;
++			
++			/* avoid watchdog triggers */
++			ieee->dev->trans_start = jiffies;
++			ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)	
++//		dev_kfree_skb_any(skb);//edit by thomas //'cause this function will cause Oops called in interrupt context in old version 101907
++#endif			
++		}
++		
++		spin_unlock_irqrestore(&ieee->lock, flags);
++	}else{
++		spin_unlock_irqrestore(&ieee->lock, flags);
++		spin_lock_irqsave(&ieee->mgmt_tx_lock, flags);
++	
++		header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
++	
++		if (ieee->seq_ctrl[0] == 0xFFF)
++			ieee->seq_ctrl[0] = 0;
++		else
++			ieee->seq_ctrl[0]++;
++
++		ieee->softmac_hard_start_xmit(skb,ieee->dev);
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)	
++//		dev_kfree_skb_any(skb);//edit by thomas
++#endif		
++		spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags);
++	}
++}
++
++
++inline void softmac_ps_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)
++{
++	
++	short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
++	struct ieee80211_hdr_3addr  *header =
++		(struct ieee80211_hdr_3addr  *) skb->data;
++	
++	
++	if(single){
++		
++		header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
++
++		if (ieee->seq_ctrl[0] == 0xFFF)
++			ieee->seq_ctrl[0] = 0;
++		else
++			ieee->seq_ctrl[0]++;
++			
++		/* avoid watchdog triggers */
++		ieee->dev->trans_start = jiffies;
++		ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
++	
++	}else{
++		
++		header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
++	
++		if (ieee->seq_ctrl[0] == 0xFFF)
++			ieee->seq_ctrl[0] = 0;
++		else
++			ieee->seq_ctrl[0]++;
++
++		ieee->softmac_hard_start_xmit(skb,ieee->dev);
++		
++	}
++	dev_kfree_skb_any(skb);//edit by thomas
++}
++
++inline struct sk_buff *ieee80211_probe_req(struct ieee80211_device *ieee)
++{
++	unsigned int len,rate_len;
++	u8 *tag;
++	struct sk_buff *skb;
++	struct ieee80211_probe_request *req;
++	
++#ifdef _RTL8187_EXT_PATCH_
++	short extMore = 0;
++	if(ieee->ext_patch_ieee80211_probe_req_1)
++		extMore = ieee->ext_patch_ieee80211_probe_req_1(ieee);
++#endif
++
++	len = ieee->current_network.ssid_len;
++	
++	rate_len = ieee80211_MFIE_rate_len(ieee);
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if(!extMore)
++#endif
++	skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
++			    2 + len + rate_len);
++#ifdef _RTL8187_EXT_PATCH_
++	else
++		skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
++			    2 + len + rate_len+128); // MESHID + CAP
++#endif
++	
++	if (!skb) 
++		return NULL;
++	
++	req = (struct ieee80211_probe_request *) skb_put(skb,sizeof(struct ieee80211_probe_request));
++	req->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
++	req->header.duration_id = 0; //FIXME: is this OK ? 
++	
++	memset(req->header.addr1, 0xff, ETH_ALEN);
++	memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	memset(req->header.addr3, 0xff, ETH_ALEN);
++	
++	tag = (u8 *) skb_put(skb,len+2+rate_len);
++	
++	*tag++ = MFIE_TYPE_SSID;
++	*tag++ = len;
++	memcpy(tag, ieee->current_network.ssid, len);
++	tag += len;
++	
++	ieee80211_MFIE_Brate(ieee,&tag);
++	ieee80211_MFIE_Grate(ieee,&tag);
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if(extMore)
++		ieee->ext_patch_ieee80211_probe_req_2(ieee, skb, tag);
++#endif
++	return skb;
++}
++
++struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee);
++
++#ifdef _RTL8187_EXT_PATCH_  
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++void ext_ieee80211_send_beacon_wq(struct work_struct *work)
++{
++	struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ext_send_beacon_wq);
++#else
++void ext_ieee80211_send_beacon_wq(struct ieee80211_device *ieee)
++{
++#endif
++
++	struct sk_buff *skb;
++	
++	//unsigned long flags;	
++//	printk("=========>%s()\n", __FUNCTION__);	
++	skb = ieee80211_get_beacon_(ieee);
++
++	if (skb){
++		softmac_mgmt_xmit(skb, ieee);
++		ieee->softmac_stats.tx_beacons++;
++		dev_kfree_skb_any(skb);//edit by thomas
++	}
++	
++
++	//printk(KERN_WARNING "[1] beacon sending!\n");
++//	ieee->beacon_timer.expires = jiffies + 
++//		(MSECS( ieee->current_network.beacon_interval -5));
++	
++	//spin_lock_irqsave(&ieee->beacon_lock,flags);
++//	if(ieee->beacon_txing)
++//		add_timer(&ieee->beacon_timer);
++	//spin_unlock_irqrestore(&ieee->beacon_lock,flags);
++}
++#endif
++
++void ieee80211_send_beacon(struct ieee80211_device *ieee)
++{
++	struct sk_buff *skb;
++	
++	//unsigned long flags;	
++//	printk("=========>%s()\n", __FUNCTION__);	
++	skb = ieee80211_get_beacon_(ieee);
++
++	if (skb){
++		softmac_mgmt_xmit(skb, ieee);
++		ieee->softmac_stats.tx_beacons++;
++		dev_kfree_skb_any(skb);//edit by thomas
++	}
++	
++
++	//printk(KERN_WARNING "[1] beacon sending!\n");
++	ieee->beacon_timer.expires = jiffies + 
++		(MSECS( ieee->current_network.beacon_interval -5));
++	
++	//spin_lock_irqsave(&ieee->beacon_lock,flags);
++	if(ieee->beacon_txing)
++		add_timer(&ieee->beacon_timer);
++	//spin_unlock_irqrestore(&ieee->beacon_lock,flags);
++}
++
++
++void ieee80211_send_beacon_cb(unsigned long _ieee)
++{
++	struct ieee80211_device *ieee =
++		(struct ieee80211_device *) _ieee;
++	unsigned long flags;
++
++	spin_lock_irqsave(&ieee->beacon_lock, flags);
++	ieee80211_send_beacon(ieee);
++	spin_unlock_irqrestore(&ieee->beacon_lock, flags);
++}
++
++#ifdef _RTL8187_EXT_PATCH_
++
++inline struct sk_buff *ieee80211_probe_req_with_SSID(struct ieee80211_device *ieee, char *ssid, int len_ssid)
++{
++	unsigned int len,rate_len;
++	u8 *tag;
++	struct sk_buff *skb;
++	struct ieee80211_probe_request *req;
++	
++#ifdef _RTL8187_EXT_PATCH_
++	short extMore = 0;
++	if(ieee->ext_patch_ieee80211_probe_req_1)
++		extMore = ieee->ext_patch_ieee80211_probe_req_1(ieee);
++#endif
++
++	len = len_ssid;
++	
++	rate_len = ieee80211_MFIE_rate_len(ieee);
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if(!extMore)
++#endif
++	skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
++			    2 + len + rate_len);
++#ifdef _RTL8187_EXT_PATCH_
++	else
++		skb = dev_alloc_skb(sizeof(struct ieee80211_probe_request) +
++			    2 + len + rate_len+128); // MESHID + CAP
++#endif
++	
++	if (!skb) 
++		return NULL;
++	
++	req = (struct ieee80211_probe_request *) skb_put(skb,sizeof(struct ieee80211_probe_request));
++	req->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
++	req->header.duration_id = 0; //FIXME: is this OK ? 
++	
++	memset(req->header.addr1, 0xff, ETH_ALEN);
++	memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	memset(req->header.addr3, 0xff, ETH_ALEN);
++	
++	tag = (u8 *) skb_put(skb,len+2+rate_len);
++	
++	*tag++ = MFIE_TYPE_SSID;
++	*tag++ = len;
++	if(len)
++	{
++		memcpy(tag, ssid, len);
++		tag += len;
++	}
++	
++	ieee80211_MFIE_Brate(ieee,&tag);
++	ieee80211_MFIE_Grate(ieee,&tag);
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if(extMore)
++		ieee->ext_patch_ieee80211_probe_req_2(ieee, skb, tag);
++#endif
++	return skb;
++}
++
++#endif // _RTL8187_EXT_PATCH_
++
++
++void ieee80211_send_probe(struct ieee80211_device *ieee)
++{
++	struct sk_buff *skb;
++
++#ifdef _RTL8187_EXT_PATCH_
++	if(ieee->iw_mode == ieee->iw_ext_mode)
++		skb = ieee80211_probe_req_with_SSID(ieee, NULL, 0);
++	else
++#endif
++	skb = ieee80211_probe_req(ieee);
++	if (skb){
++		softmac_mgmt_xmit(skb, ieee);
++		ieee->softmac_stats.tx_probe_rq++;
++		dev_kfree_skb_any(skb);//edit by thomas
++	}
++}
++
++void ieee80211_send_probe_requests(struct ieee80211_device *ieee)
++{
++	if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)){
++		ieee80211_send_probe(ieee);
++		ieee80211_send_probe(ieee);
++	}
++}
++
++/* this performs syncro scan blocking the caller until all channels
++ * in the allowed channel map has been checked. 
++ */
++void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee)
++{
++	short ch = 0;
++#ifdef ENABLE_DOT11D
++	u8 channel_map[MAX_CHANNEL_NUMBER+1];
++	memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
++#endif
++
++        
++	down(&ieee->scan_sem);
++	
++	while(1)
++	{
++		
++		do{
++			ch++;
++			if (ch > MAX_CHANNEL_NUMBER) 
++				goto out; /* scan completed */
++			
++#ifdef ENABLE_DOT11D
++		}while(!channel_map[ch]);
++#else
++		}while(!ieee->channel_map[ch]);
++#endif
++
++		//printk("=>current channel is %d\n",ch);        
++	
++		/* this fuction can be called in two situations
++		 * 1- We have switched to ad-hoc mode and we are
++		 *    performing a complete syncro scan before conclude
++		 *    there are no interesting cell and to create a 
++		 *    new one. In this case the link state is 
++		 *    IEEE80211_NOLINK until we found an interesting cell.
++		 *    If so the ieee8021_new_net, called by the RX path
++		 *    will set the state to IEEE80211_LINKED, so we stop
++		 *    scanning
++		 * 2- We are linked and the root uses run iwlist scan.
++		 *    So we switch to IEEE80211_LINKED_SCANNING to remember
++		 *    that we are still logically linked (not interested in
++		 *    new network events, despite for updating the net list,
++		 *    but we are temporarly 'unlinked' as the driver shall
++		 *    not filter RX frames and the channel is changing.
++		 * So the only situation in witch are interested is to check
++		 * if the state become LINKED because of the #1 situation
++		 */    
++		    
++		if (ieee->state == IEEE80211_LINKED)
++			goto out;
++		
++		//printk("---->%s: chan %d\n", __func__, ch);
++		ieee->set_chan(ieee->dev, ch);
++#ifdef ENABLE_DOT11D
++		if(channel_map[ch] == 1)
++#endif
++		{
++			ieee80211_send_probe_requests(ieee);
++		}
++		
++		/* this prevent excessive time wait when we
++		 * need to wait for a syncro scan to end..
++		 */  		
++		if (ieee->sync_scan_hurryup)
++			goto out;
++
++
++		msleep_interruptible_rtl(IEEE80211_SOFTMAC_SCAN_TIME);
++		
++	}
++out:
++	ieee->sync_scan_hurryup = 0;
++	up(&ieee->scan_sem);
++#ifdef ENABLE_DOT11D
++	if(IS_DOT11D_ENABLE(ieee))
++		DOT11D_ScanComplete(ieee);
++#endif	
++
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
++/* called both by wq with ieee->lock held */
++void ieee80211_softmac_scan(struct ieee80211_device *ieee)
++{
++#if 0	
++	short watchdog = 0;
++	do{
++		ieee->current_network.channel = 
++			(ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
++		if (watchdog++ > MAX_CHANNEL_NUMBER) 
++				return; /* no good chans */
++				
++	}while(!ieee->channel_map[ieee->current_network.channel]);
++#endif		
++
++	schedule_task(&ieee->softmac_scan_wq);
++}
++#endif
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void ieee80211_softmac_scan_wq(struct work_struct *work)
++{
++	struct delayed_work *dwork = container_of(work, struct delayed_work, work);
++	struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, softmac_scan_wq);
++#else
++void ieee80211_softmac_scan_wq(struct ieee80211_device *ieee)
++{	
++#endif
++	//static short watchdog = 0;
++	//short watchdog = 0;//lzm move into ieee->scan_watchdog 081215 for roaming
++	u8 channel_bak = ieee->current_network.channel;//lzm for channel+1
++#ifdef ENABLE_DOT11D
++	u8 channel_map[MAX_CHANNEL_NUMBER+1];
++	memcpy(channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
++#endif
++	down(&ieee->scan_sem);
++
++	do{
++		ieee->current_network.channel = 
++			(ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
++		if (ieee->scan_watchdog++ > MAX_CHANNEL_NUMBER) 
++			goto out; /* no good chans */
++#ifdef ENABLE_DOT11D
++	}while(!channel_map[ieee->current_network.channel]);
++#else
++	}while(!ieee->channel_map[ieee->current_network.channel]);
++#endif
++	
++	if (ieee->scanning == 0 )
++		goto out;
++
++	//printk("current channel is %d\n",ieee->current_network.channel);	
++	ieee->set_chan(ieee->dev, ieee->current_network.channel);
++#ifdef ENABLE_DOT11D
++	if(channel_map[ieee->current_network.channel] == 1)
++#endif
++	{
++		ieee80211_send_probe_requests(ieee);
++	}
++
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++	queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq, IEEE80211_SOFTMAC_SCAN_TIME);
++#else
++	ieee->scan_timer.expires = jiffies + (IEEE80211_SOFTMAC_SCAN_TIME);
++	if (ieee->scanning == 1) 
++		add_timer(&ieee->scan_timer);
++#endif
++
++	up(&ieee->scan_sem);
++	return;
++out:
++	//printk("%s():Stop scan now\n",__FUNCTION__);
++	ieee->actscanning = false;
++	ieee->scan_watchdog = 0;
++	ieee->scanning = 0;
++	ieee->current_network.channel = channel_bak;
++	up(&ieee->scan_sem);
++#ifdef ENABLE_DOT11D
++	if(IS_DOT11D_ENABLE(ieee))
++		DOT11D_ScanComplete(ieee);
++#endif	
++
++	return;
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
++void ieee80211_softmac_scan_cb(unsigned long _dev)
++{
++	unsigned long flags;
++	struct ieee80211_device *ieee = (struct ieee80211_device *)_dev;
++	
++	spin_lock_irqsave(&ieee->lock, flags);
++	ieee80211_softmac_scan(ieee);
++	spin_unlock_irqrestore(&ieee->lock, flags);
++}
++#endif
++
++
++void ieee80211_beacons_start(struct ieee80211_device *ieee)
++{
++	unsigned long flags;	
++
++	spin_lock_irqsave(&ieee->beacon_lock,flags);
++
++	ieee->beacon_txing = 1;
++	ieee80211_send_beacon(ieee);
++	
++	spin_unlock_irqrestore(&ieee->beacon_lock,flags);
++}
++
++void ieee80211_beacons_stop(struct ieee80211_device *ieee)
++{
++	unsigned long flags;
++
++	spin_lock_irqsave(&ieee->beacon_lock,flags);
++
++	ieee->beacon_txing = 0;
++ 	del_timer_sync(&ieee->beacon_timer);
++
++	spin_unlock_irqrestore(&ieee->beacon_lock,flags);
++
++}
++
++
++void ieee80211_stop_send_beacons(struct ieee80211_device *ieee)
++{
++	if(ieee->stop_send_beacons)
++		ieee->stop_send_beacons(ieee->dev);
++	if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
++		ieee80211_beacons_stop(ieee);
++}
++
++
++void ieee80211_start_send_beacons(struct ieee80211_device *ieee)
++{
++	if(ieee->start_send_beacons)
++		ieee->start_send_beacons(ieee->dev);
++	if(ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
++		ieee80211_beacons_start(ieee); 
++}
++
++
++void ieee80211_softmac_stop_scan(struct ieee80211_device *ieee)
++{
++//	unsigned long flags;	
++	
++	ieee->sync_scan_hurryup = 1;
++	
++	down(&ieee->scan_sem);
++//	spin_lock_irqsave(&ieee->lock, flags);
++	
++	if (ieee->scanning == 1){
++		//printk("%s():Stop scan now\n",__FUNCTION__);
++		ieee->scanning = 0;
++		//lzm add for softmac_scan_wq can't return from out
++		//example: rcv probe_response
++		ieee->scan_watchdog = 0;//lzm add 081215 for roaming
++		ieee->actscanning = false;
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++		cancel_delayed_work(&ieee->softmac_scan_wq);
++#else
++		del_timer_sync(&ieee->scan_timer);
++#endif
++	}
++	
++//	spin_unlock_irqrestore(&ieee->lock, flags);
++	up(&ieee->scan_sem);
++}
++
++void ieee80211_stop_scan(struct ieee80211_device *ieee)
++{
++	if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
++		ieee80211_softmac_stop_scan(ieee);
++	else
++		ieee->stop_scan(ieee->dev);
++}
++
++/* called with ieee->lock held */
++void ieee80211_start_scan(struct ieee80211_device *ieee)
++{
++	ieee->actscanning = true;
++#ifdef CONFIG_IPS 
++	ieee->ieee80211_ips_leave(ieee->dev);
++#endif
++
++#ifdef ENABLE_DOT11D
++	if(IS_DOT11D_ENABLE(ieee) )
++	{			
++		if(IS_COUNTRY_IE_VALID(ieee))
++		{
++			RESET_CIE_WATCHDOG(ieee); 
++		}
++	}
++#endif
++
++	if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){	
++		if (ieee->scanning == 0){
++			ieee->scanning = 1;
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++			queue_delayed_work(ieee->wq, &ieee->softmac_scan_wq,0);
++#else
++			ieee80211_softmac_scan(ieee);
++#endif
++		}
++	}else
++		ieee->start_scan(ieee->dev);
++	
++}
++
++/* called with wx_sem held */
++void ieee80211_start_scan_syncro(struct ieee80211_device *ieee)
++{
++	//printk("====>%s()\n", __func__);
++#ifdef CONFIG_IPS 
++	ieee->ieee80211_ips_leave(ieee->dev);
++#endif
++	ieee->actscanning = true;
++
++#ifdef ENABLE_DOT11D
++	if(IS_DOT11D_ENABLE(ieee) )
++	{			
++		if(IS_COUNTRY_IE_VALID(ieee))
++		{
++			RESET_CIE_WATCHDOG(ieee); 
++		}
++	}
++#endif
++
++	ieee->sync_scan_hurryup = 0;
++	
++	if (ieee->softmac_features & IEEE_SOFTMAC_SCAN)
++		ieee80211_softmac_scan_syncro(ieee);
++	else
++		ieee->scan_syncro(ieee->dev);
++	
++	ieee->actscanning = false;
++	//printk("<====%s()\n", __func__);
++}
++
++inline struct sk_buff *ieee80211_authentication_req(struct ieee80211_network *beacon, 
++	struct ieee80211_device *ieee, int challengelen)
++{
++	struct sk_buff *skb;	
++	struct ieee80211_authentication *auth;
++	
++	skb = dev_alloc_skb(sizeof(struct ieee80211_authentication) + challengelen); 
++	
++	if (!skb) return NULL;
++	
++	auth = (struct ieee80211_authentication *)
++		skb_put(skb, sizeof(struct ieee80211_authentication));
++	
++	auth->header.frame_ctl = IEEE80211_STYPE_AUTH;
++	if (challengelen) auth->header.frame_ctl |= IEEE80211_FCTL_WEP;
++	
++	auth->header.duration_id = 0x013a; //FIXME
++	
++	memcpy(auth->header.addr1, beacon->bssid, ETH_ALEN);
++	memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
++	
++	auth->algorithm = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
++	
++	auth->transaction = cpu_to_le16(ieee->associate_seq);
++	ieee->associate_seq++;
++	
++	auth->status = cpu_to_le16(WLAN_STATUS_SUCCESS);
++	
++	return skb;
++	
++}
++
++u8 WPA_OUI[3] = {0x00, 0x50, 0xf2};
++
++static struct sk_buff* ieee80211_probe_resp(struct ieee80211_device *ieee, u8 *dest)
++{
++	u8 *tag;
++	int beacon_size;
++	struct ieee80211_probe_response *beacon_buf;
++	struct sk_buff *skb;
++	int encrypt;
++	int atim_len,erp_len;
++	struct ieee80211_crypt_data* crypt;
++	
++	char *ssid = ieee->current_network.ssid;
++	int ssid_len = ieee->current_network.ssid_len;
++	int rate_len = ieee->current_network.rates_len+2;
++	int rate_ex_len = ieee->current_network.rates_ex_len;
++
++	int wpa_ie_len = 0, wpa_type=0;
++	if(rate_ex_len > 0) rate_ex_len+=2;
++	
++	if(ieee->current_network.capability & WLAN_CAPABILITY_IBSS)
++		atim_len = 4;
++	else
++		atim_len = 0;
++	
++	if(ieee80211_is_54g(ieee->current_network)) 
++		erp_len = 3;
++	else
++		erp_len = 0;
++	if (ieee->wpa_enabled)
++	{
++	//	printk("hoho wpa_enalbe\n");
++		wpa_ie_len = ieee->wpa_ie_len; //24-2
++	}
++	beacon_size = sizeof(struct ieee80211_probe_response)+
++		ssid_len
++		+3 //channel
++		+rate_len
++		+rate_ex_len
++		+atim_len
++		+erp_len
++		+wpa_ie_len;
++	
++	skb = dev_alloc_skb(beacon_size);
++	
++	if (!skb) 
++		return NULL;
++	
++	beacon_buf = (struct ieee80211_probe_response*) skb_put(skb, beacon_size);
++	
++	memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
++	memcpy (beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	memcpy (beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
++
++	beacon_buf->header.duration_id = 0; //FIXME
++	beacon_buf->beacon_interval = 
++		cpu_to_le16(ieee->current_network.beacon_interval);
++	beacon_buf->capability = 
++		cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
++	
++	if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT))
++		cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT));		
++#ifdef _RTL8187_EXT_PATCH_
++{
++/*	struct ieee80211_crypt_data_list* cryptlist = ieee->cryptlist[1];
++	u8 i = cryptlist->used;
++	crypt = cryptlist ->crypt[ieee->tx_keyidx];
++*/
++	crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
++}
++#else
++	
++	crypt = ieee->crypt[ieee->tx_keyidx];
++#endif	
++	if (crypt)
++	wpa_type = strcmp(crypt->ops->name, "TKIP");
++
++
++	encrypt = ieee->host_encrypt && crypt && crypt->ops && 
++		((0 == strcmp(crypt->ops->name, "WEP")||wpa_ie_len));
++
++	if (encrypt)	
++		beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
++	
++		
++	beacon_buf->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_RESP);
++	
++	beacon_buf->info_element.id = MFIE_TYPE_SSID;	
++	beacon_buf->info_element.len = ssid_len;
++	
++	tag = (u8*) beacon_buf->info_element.data;
++	
++	memcpy(tag, ssid, ssid_len);
++	
++	tag += ssid_len;
++	
++	*(tag++) = MFIE_TYPE_RATES;
++	*(tag++) = rate_len-2; 
++	memcpy(tag,ieee->current_network.rates,rate_len-2);
++	tag+=rate_len-2;
++	
++	*(tag++) = MFIE_TYPE_DS_SET;
++	*(tag++) = 1;
++	*(tag++) = ieee->current_network.channel;
++	
++	if(atim_len){
++		u16 val16;	
++		*(tag++) = MFIE_TYPE_IBSS_SET;
++		*(tag++) = 2;
++		val16 = cpu_to_le16(ieee->current_network.atim_window);
++		//*((u16*)(tag)) = cpu_to_le16(ieee->current_network.atim_window);
++		memcpy((u8 *)tag,(u8 *)&val16,2);
++		tag+=2;
++	}
++	
++	if(erp_len){
++		*(tag++) = MFIE_TYPE_ERP;
++		*(tag++) = 1;
++		*(tag++) = 0; 
++	}
++	
++	if(rate_ex_len){
++		*(tag++) = MFIE_TYPE_RATES_EX;
++		*(tag++) = rate_ex_len-2; 
++		memcpy(tag,ieee->current_network.rates_ex,rate_ex_len-2);
++		tag+=rate_ex_len-2;
++	}
++	if (wpa_ie_len)
++	{
++#if 0
++		*(tag++) = 0xdd;
++		*(tag++) = wpa_ie_len-2;
++		memcpy(tag, WPA_OUI, 3);
++		tag += 3;
++		*(tag++) = 1;
++		*(tag++) = 1;
++		*(tag++) = 0;
++
++		memcpy(tag, WPA_OUI, 3);
++		tag += 3;
++		*(tag++) = wpa_type ? 4:2;
++		*(tag++) = 1;
++		*(tag++) = 0;
++
++	
++		memcpy(tag, WPA_OUI, 3);
++		tag += 3;
++		*(tag++) = wpa_type ? 4:0;
++		*(tag++) = 1;
++		*(tag++) = 0;
++
++		memcpy(tag, WPA_OUI, 3);
++		tag += 3;
++		*(tag++) = 0;
++#else
++		if (ieee->iw_mode == IW_MODE_ADHOC)
++		{//as Windows will set pairwise key same as the group key which is not allowed in Linux, so set this for IOT issue. WB 2008.07.07
++			memcpy(&ieee->wpa_ie[14], &ieee->wpa_ie[8], 4);
++		}
++
++		memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
++
++#endif
++	}
++
++
++	skb->dev = ieee->dev;
++	return skb;
++}
++
++
++#ifdef _RTL8187_EXT_PATCH_
++struct sk_buff* ieee80211_ext_probe_resp_by_net(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net)
++{
++	u8 *tag;
++	int beacon_size;
++	struct ieee80211_probe_response *beacon_buf;
++	struct sk_buff *skb;
++	int encrypt;
++	int atim_len,erp_len;
++	struct ieee80211_crypt_data* crypt;
++	u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
++	
++	char *ssid = net->ssid;
++	int ssid_len = net->ssid_len;
++
++	int rate_len = ieee->current_network.rates_len+2;
++	int rate_ex_len = ieee->current_network.rates_ex_len;
++	int wpa_ie_len = 0, wpa_type=0;
++	if(rate_ex_len > 0) rate_ex_len+=2;
++        
++	if( ieee->meshScanMode&4)
++		ieee->current_network.channel = ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel(ieee);
++	if( ieee->meshScanMode&6)
++	{
++		
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++		queue_work(ieee->wq, &ieee->ext_stop_scan_wq);
++#else
++		schedule_task(&ieee->ext_stop_scan_wq);
++#endif
++	}	
++	if(ieee->current_network.capability & WLAN_CAPABILITY_IBSS) // use current_network here
++		atim_len = 4;
++	else
++		atim_len = 0;
++	
++	if(ieee80211_is_54g(*net)) 
++		erp_len = 3;
++	else
++		erp_len = 0;
++	
++	if (ieee->wpa_enabled &&(ieee->iw_ext_mode==ieee->iw_mode))
++	{
++//		printk("hoho wpa_enalbe\n");
++		wpa_ie_len = ieee->wpa_ie_len; //24-2
++	}
++
++	beacon_size = sizeof(struct ieee80211_probe_response)+
++		ssid_len
++		+3 //channel
++		+rate_len
++		+rate_ex_len
++		+atim_len
++		+erp_len
++		+wpa_ie_len;
++//b	
++	skb = dev_alloc_skb(beacon_size+196);
++	
++	if (!skb) 
++ 		return NULL;
++	
++	beacon_buf = (struct ieee80211_probe_response*) skb_put(skb, beacon_size);
++	
++	memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
++	memcpy (beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	memcpy (beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
++
++	beacon_buf->header.duration_id = 0; //FIXME
++	
++	beacon_buf->beacon_interval = 
++		cpu_to_le16(ieee->current_network.beacon_interval);  // use current_network here
++	beacon_buf->capability = 
++		cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
++	
++	if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT))
++		cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT));		
++#ifdef _RTL8187_EXT_PATCH_
++
++        crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
++#else
++	
++	crypt = ieee->crypt[ieee->tx_keyidx];
++#endif  
++	
++//	crypt = ieee->crypt[ieee->tx_keyidx];
++	if (crypt)
++	wpa_type = strcmp(crypt->ops->name, "TKIP");
++
++	encrypt = ieee->host_encrypt && crypt && crypt->ops && 
++		((0 == strcmp(crypt->ops->name, "WEP")||wpa_ie_len));
++
++	if (encrypt)	
++		beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
++	
++		
++	beacon_buf->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_RESP);
++	
++	beacon_buf->info_element.id = MFIE_TYPE_SSID;	
++	beacon_buf->info_element.len = ssid_len;
++	
++	tag = (u8*) beacon_buf->info_element.data;
++	
++	// brocad cast / probe rsp 
++	if(memcmp(dest, broadcast_addr, ETH_ALEN ))
++		memcpy(tag, ssid, ssid_len);	
++	else	
++		ssid_len=0;
++	
++	tag += ssid_len;
++	
++//get_bssrate_set(priv, _SUPPORTEDRATES_IE_, &pbssrate, &bssrate_len);
++//pbuf = set_ie(pbuf, _SUPPORTEDRATES_IE_, bssrate_len, pbssrate, &frlen);
++		
++	*(tag++) = MFIE_TYPE_RATES;
++	*(tag++) = rate_len-2; 
++	memcpy(tag,ieee->current_network.rates,rate_len-2);
++	tag+=rate_len-2;
++	
++	*(tag++) = MFIE_TYPE_DS_SET;
++	*(tag++) = 1;
++	*(tag++) = ieee->current_network.channel;  // use current_network here
++	
++	
++	if(atim_len){
++		*(tag++) = MFIE_TYPE_IBSS_SET;
++		*(tag++) = 2;
++		*((u16*)(tag)) = cpu_to_le16(ieee->current_network.atim_window); // use current_network here
++		tag+=2;
++	}
++	
++	if(erp_len){
++		*(tag++) = MFIE_TYPE_ERP;
++		*(tag++) = 1;
++		*(tag++) = 0; 
++	}
++	
++	if(rate_ex_len){
++		*(tag++) = MFIE_TYPE_RATES_EX;
++		*(tag++) = rate_ex_len-2; 
++		memcpy(tag,ieee->current_network.rates_ex,rate_ex_len-2);
++		tag+=rate_ex_len-2;
++	}
++	
++	if (wpa_ie_len)
++	{
++#if 0
++		*(tag++) = 0xdd;
++		*(tag++) = wpa_ie_len-2;
++		memcpy(tag, WPA_OUI, 3);
++		tag += 3;
++		*(tag++) = 1;
++		*(tag++) = 1;
++		*(tag++) = 0;
++
++		memcpy(tag, WPA_OUI, 3);
++		tag += 3;
++		*(tag++) = wpa_type ? 4:2;
++		*(tag++) = 1;
++		*(tag++) = 0;
++
++	
++		memcpy(tag, WPA_OUI, 3);
++		tag += 3;
++		*(tag++) = wpa_type ? 4:0;
++		*(tag++) = 1;
++		*(tag++) = 0;
++
++		memcpy(tag, WPA_OUI, 3);
++		tag += 3;
++		*(tag++) = 0;
++#else
++		memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
++#endif
++	}
++
++
++	skb->dev = ieee->dev;
++	return skb;
++}
++#endif // _RTL8187_EXT_PATCH_
++
++
++struct sk_buff* ieee80211_assoc_resp(struct ieee80211_device *ieee, u8 *dest)
++{
++	struct sk_buff *skb;
++	u8* tag;
++	
++	struct ieee80211_crypt_data* crypt;
++	struct ieee80211_assoc_response_frame *assoc;
++	short encrypt;
++	
++	unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
++	int len = sizeof(struct ieee80211_assoc_response_frame) + rate_len;
++	
++	skb = dev_alloc_skb(len); 
++	
++	if (!skb) 
++		return NULL;
++	
++	assoc = (struct ieee80211_assoc_response_frame *)
++		skb_put(skb,sizeof(struct ieee80211_assoc_response_frame));
++	
++	assoc->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP);
++	memcpy(assoc->header.addr1, dest,ETH_ALEN);
++	memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
++	memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ? 
++		WLAN_CAPABILITY_BSS : WLAN_CAPABILITY_IBSS);
++	
++		
++	if(ieee->short_slot)
++		assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
++		
++	if (ieee->host_encrypt){
++#ifdef _RTL8187_EXT_PATCH_
++		crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
++#else
++		crypt = ieee->crypt[ieee->tx_keyidx];
++#endif
++	}
++	else crypt = NULL;
++	
++	encrypt = ( crypt && crypt->ops);
++	   
++	if (encrypt)
++		assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
++	
++	assoc->status = 0;
++	assoc->aid = cpu_to_le16(ieee->assoc_id);
++	if (ieee->assoc_id == 0x2007) ieee->assoc_id=0;
++	else ieee->assoc_id++;
++	
++	tag = (u8*) skb_put(skb, rate_len);
++	
++	ieee80211_MFIE_Brate(ieee, &tag);
++	ieee80211_MFIE_Grate(ieee, &tag);
++	
++	return skb;
++}
++
++struct sk_buff* ieee80211_auth_resp(struct ieee80211_device *ieee,int status, u8 *dest)
++{
++	struct sk_buff *skb;
++	struct ieee80211_authentication *auth;
++	
++	skb = dev_alloc_skb(sizeof(struct ieee80211_authentication)+1); 
++	
++	if (!skb) 
++		return NULL;
++	
++	skb->len = sizeof(struct ieee80211_authentication);
++	
++	auth = (struct ieee80211_authentication *)skb->data;
++	
++	auth->status = cpu_to_le16(status);
++	auth->transaction = cpu_to_le16(2);
++	auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN);
++
++#ifdef _RTL8187_EXT_PATCH_
++	if(ieee->iw_mode == ieee->iw_ext_mode)
++		memcpy(auth->header.addr3, dest, ETH_ALEN);
++#else
++	memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
++#endif
++	memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	memcpy(auth->header.addr1, dest, ETH_ALEN);
++	auth->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_AUTH); 
++	return skb;
++	
++	
++}
++
++struct sk_buff* ieee80211_null_func(struct ieee80211_device *ieee,short pwr)
++{
++	struct sk_buff *skb;
++	struct ieee80211_hdr_3addr* hdr;
++	
++	skb = dev_alloc_skb(sizeof(struct ieee80211_hdr_3addr)); 
++	
++	if (!skb) 
++		return NULL;
++	
++	hdr = (struct ieee80211_hdr_3addr*)skb_put(skb,sizeof(struct ieee80211_hdr_3addr));
++	
++	memcpy(hdr->addr1, ieee->current_network.bssid, ETH_ALEN);
++	memcpy(hdr->addr2, ieee->dev->dev_addr, ETH_ALEN);
++	memcpy(hdr->addr3, ieee->current_network.bssid, ETH_ALEN);
++	
++	hdr->frame_ctl = cpu_to_le16(IEEE80211_FTYPE_DATA | 
++		IEEE80211_STYPE_NULLFUNC | IEEE80211_FCTL_TODS | 
++		(pwr ? IEEE80211_FCTL_PM:0)); 
++	
++	return skb;
++	
++	
++}
++
++
++void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8* dest)
++{
++	struct sk_buff *buf = ieee80211_assoc_resp(ieee, dest);
++	
++	if (buf){
++		softmac_mgmt_xmit(buf, ieee);
++		dev_kfree_skb_any(buf);//edit by thomas
++	}
++}
++
++
++void ieee80211_resp_to_auth(struct ieee80211_device *ieee, int s, u8* dest)
++{
++	struct sk_buff *buf = ieee80211_auth_resp(ieee, s, dest);
++	
++	if (buf){
++		softmac_mgmt_xmit(buf, ieee);
++		dev_kfree_skb_any(buf);//edit by thomas
++	}
++}
++
++
++void ieee80211_resp_to_probe(struct ieee80211_device *ieee, u8 *dest)
++{
++	
++	struct sk_buff *buf = ieee80211_probe_resp(ieee, dest);
++	
++	if (buf) {
++		softmac_mgmt_xmit(buf, ieee);
++		dev_kfree_skb_any(buf);//edit by thomas
++	}
++}
++
++
++inline struct sk_buff *ieee80211_association_req(struct ieee80211_network *beacon,struct ieee80211_device *ieee)
++{
++	struct sk_buff *skb;
++	
++	struct ieee80211_assoc_request_frame *hdr;
++	u8 *tag;
++	//int i;
++	unsigned int wpa_len = beacon->wpa_ie_len;
++#if 1	
++	// for testing purpose
++	unsigned int rsn_len = beacon->rsn_ie_len;
++#else
++	unsigned int rsn_len = beacon->rsn_ie_len - 4;
++#endif	
++	unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
++	unsigned int wmm_info_len = beacon->QoS_Enable?9:0;
++#ifdef THOMAS_TURBO	
++	unsigned int turbo_info_len = beacon->Turbo_Enable?9:0;
++#endif
++
++	u8  encry_proto = ieee->wpax_type_notify & 0xff;
++
++	
++	int len = 0; 
++	
++	//[0] Notify type of encryption: WPA/WPA2
++	//[1] pair wise type
++	//[2] authen type
++	if(ieee->wpax_type_set) {
++		if (IEEE_PROTO_WPA == encry_proto) {
++			rsn_len = 0;
++		} else if (IEEE_PROTO_RSN == encry_proto) {
++			wpa_len = 0;
++		}
++	}
++#ifdef THOMAS_TURBO		
++	len = sizeof(struct ieee80211_assoc_request_frame)+
++		+ beacon->ssid_len//essid tagged val
++		+ rate_len//rates tagged val
++		+ wpa_len
++		+ rsn_len
++		+ wmm_info_len
++		+ turbo_info_len;
++#else
++	len = sizeof(struct ieee80211_assoc_request_frame)+
++		+ beacon->ssid_len//essid tagged val
++		+ rate_len//rates tagged val
++		+ wpa_len
++		+ rsn_len
++		+ wmm_info_len;
++#endif
++
++#ifdef _RTL8187_EXT_PATCH_
++	if(ieee->iw_mode == ieee->iw_ext_mode)
++		skb = dev_alloc_skb(len+256); // stanley
++	else
++#endif
++	skb = dev_alloc_skb(len);
++	
++	if (!skb) 
++		return NULL;
++	
++	hdr = (struct ieee80211_assoc_request_frame *)
++		skb_put(skb, sizeof(struct ieee80211_assoc_request_frame));
++	
++	
++	hdr->header.frame_ctl = IEEE80211_STYPE_ASSOC_REQ;
++	hdr->header.duration_id= 37; //FIXME
++	memcpy(hdr->header.addr1, beacon->bssid, ETH_ALEN);
++	memcpy(hdr->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	memcpy(hdr->header.addr3, beacon->bssid, ETH_ALEN);
++	memcpy(ieee->ap_mac_addr, beacon->bssid, ETH_ALEN);//for HW security, John
++	
++	hdr->capability = cpu_to_le16(WLAN_CAPABILITY_BSS);
++	if (beacon->capability & WLAN_CAPABILITY_PRIVACY ) 
++		hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
++	
++	if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE ) 
++		hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE);
++	
++	if(ieee->short_slot)
++		hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_association_req_1)
++		ieee->ext_patch_ieee80211_association_req_1(hdr);
++#endif
++
++	hdr->listen_interval = 0xa; //FIXME
++	
++	hdr->info_element.id = MFIE_TYPE_SSID;
++
++	hdr->info_element.len = beacon->ssid_len;
++	tag = skb_put(skb, beacon->ssid_len);
++	memcpy(tag, beacon->ssid, beacon->ssid_len);
++	
++	tag = skb_put(skb, rate_len); 
++	
++	ieee80211_MFIE_Brate(ieee, &tag);
++	ieee80211_MFIE_Grate(ieee, &tag);
++	
++	//add rsn==0 condition for ap's mix security mode(wpa+wpa2), john2007.8.9
++	//choose AES encryption as default algorithm while using mixed mode
++#if 0
++	if(rsn_len == 0){
++
++		tag = skb_put(skb,wpa_len);
++
++		if(wpa_len) {
++		
++
++		  //{add by david. 2006.8.31
++		  //fix linksys compatibility bug
++		  //}
++		  if(wpa_len > 24) {//22+2, mean include the capability
++			beacon->wpa_ie[wpa_len - 2] = 0;
++		  }
++		//multicast cipher OUI
++                  if(  beacon->wpa_ie[11]==0x2      ){ //0x0050f202 is the oui of tkip
++                  ieee->broadcast_key_type = KEY_TYPE_TKIP;
++                }
++                  else if(  beacon->wpa_ie[11]==0x4      ){//0x0050f204 is the oui of ccmp
++                  ieee->broadcast_key_type = KEY_TYPE_CCMP;
++                }
++ 		//unicast cipher OUI
++		  if(	beacon->wpa_ie[14]==0		 
++			&& beacon->wpa_ie[15]==0x50
++                        && beacon->wpa_ie[16]==0xf2
++                        && beacon->wpa_ie[17]==0x2  	){ //0x0050f202 is the oui of tkip
++                  ieee->pairwise_key_type = KEY_TYPE_TKIP;
++		}
++
++                  else if(   beacon->wpa_ie[14]==0
++                        && beacon->wpa_ie[15]==0x50
++                        && beacon->wpa_ie[16]==0xf2
++                        && beacon->wpa_ie[17]==0x4      ){//0x0050f204 is the oui of ccmp
++                  ieee->pairwise_key_type = KEY_TYPE_CCMP;
++		}
++		//indicate the wpa_ie content to WPA_SUPPLICANT
++		buff = kmalloc(IW_CUSTOM_MAX, GFP_ATOMIC);
++		memset(buff, 0, IW_CUSTOM_MAX);
++		p=buff;
++		p += sprintf(p, "ASSOCINFO(ReqIEs=");
++		for(i=0;i<wpa_len;i++){
++			p += sprintf(p, "%02x", beacon->wpa_ie[i]);
++		}
++		p += sprintf(p, ")");
++		memset(&wrqu, 0, sizeof(wrqu) );
++		wrqu.data.length = p - buff;
++
++		wireless_send_event(dev, IWEVCUSTOM, &wrqu, buff);
++		  memcpy(tag,beacon->wpa_ie,wpa_len);
++		}
++
++	}	
++
++	if(rsn_len > 22) {
++
++	  					if(     beacon->rsn_ie[4]==0x0 &&
++                                beacon->rsn_ie[5]==0xf &&
++                                beacon->rsn_ie[6]==0xac){
++
++                                switch(beacon->rsn_ie[7]){
++                                        case 0x1:
++                                                ieee->broadcast_key_type = KEY_TYPE_WEP40;
++                                                break;
++                                        case 0x2:
++                                                ieee->broadcast_key_type = KEY_TYPE_TKIP;
++                                                break;
++                                        case 0x4:
++                                                ieee->broadcast_key_type = KEY_TYPE_CCMP;
++                                                break;
++                                        case 0x5:
++                                                ieee->broadcast_key_type = KEY_TYPE_WEP104;
++                                                break;
++                                        default:
++                                                printk("fault suite type in RSN broadcast key\n");
++                                                break;
++                                }
++                        }
++
++                        if(     beacon->rsn_ie[10]==0x0 &&
++                                beacon->rsn_ie[11]==0xf &&
++                                beacon->rsn_ie[12]==0xac){
++				if(beacon->rsn_ie[8]==1){//not mixed mode
++	                                switch(beacon->rsn_ie[13]){
++        	                                case 0x2:
++                	                                ieee->pairwise_key_type = KEY_TYPE_TKIP;
++                        	                        break;
++                                	        case 0x4:
++                                        	        ieee->pairwise_key_type = KEY_TYPE_CCMP;
++                                                	break;
++        	                                default:	
++	                                                printk("fault suite type in RSN pairwise key\n");
++                	                                break;
++                                	}
++				}
++				else if(beacon->rsn_ie[8]==2){//mixed mode
++					ieee->pairwise_key_type = KEY_TYPE_CCMP;
++				}
++                        }
++
++
++		
++		tag = skb_put(skb,22);
++		memcpy(tag,(beacon->rsn_ie + info_addr),8);
++		tag[1] =  20;
++		tag += 8;
++		info_addr += 8;
++
++		spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
++		for (i = 0; i < 2; i++) {
++			tag[0] = 1;
++			tag[1] = 0;
++			tag += 2;
++			suite_count = beacon->rsn_ie[info_addr] + \
++				      (beacon->rsn_ie[info_addr + 1] << 8);
++			info_addr += 2;
++			if(1 == suite_count) {
++				memcpy(tag,(beacon->rsn_ie + info_addr),4);
++				info_addr += 4;
++			} else {
++				// if the wpax_type_notify has been set by the application,
++				// just use it, otherwise just use the default one.
++				if(ieee->wpax_type_set) {
++					suit_select = ((0 == i) ? pairwise_type:authen_type)&0x0f ;
++					memcpy(tag,rsn_authen_cipher_suite[suit_select],4);
++				} else {
++					//default set as ccmp, or none authentication
++					if(i == 0) {
++						memcpy(tag,rsn_authen_cipher_suite[4],4);
++					} else {
++						memcpy(tag,rsn_authen_cipher_suite[2],4);
++					}
++
++				}
++
++				info_addr += (suite_count * 4);
++			}
++			tag += 4;
++		}
++		spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
++
++		tag[0] = 0;
++		tag[1] = beacon->rsn_ie[info_addr+1];
++
++
++
++	} else {
++		tag = skb_put(skb,rsn_len);
++		if(rsn_len) {
++
++
++			if( 	beacon->rsn_ie[4]==0x0 &&
++				beacon->rsn_ie[5]==0xf &&
++				beacon->rsn_ie[6]==0xac){
++				switch(beacon->rsn_ie[7]){
++					case 0x1:
++						ieee->broadcast_key_type = KEY_TYPE_WEP40;
++                                                break;
++					case 0x2:
++						ieee->broadcast_key_type = KEY_TYPE_TKIP;
++						break;
++					case 0x4:
++   	                                        ieee->broadcast_key_type = KEY_TYPE_CCMP;
++                                                break;
++                                        case 0x5:
++                                                ieee->broadcast_key_type = KEY_TYPE_WEP104;
++                                                break;
++					default: 
++						printk("fault suite type in RSN broadcast key\n");
++						break;
++				}
++			}
++                        if(     beacon->rsn_ie[10]==0x0 &&
++                                beacon->rsn_ie[11]==0xf &&
++                                beacon->rsn_ie[12]==0xac){
++                                if(beacon->rsn_ie[8]==1){//not mixed mode
++                                        switch(beacon->rsn_ie[13]){
++                                                case 0x2:
++                                                        ieee->pairwise_key_type = KEY_TYPE_TKIP;
++                                                        break;
++                                                case 0x4:
++                                                        ieee->pairwise_key_type = KEY_TYPE_CCMP;
++                                                        break;
++                                                default:
++                                                        printk("fault suite type in RSN pairwise key\n");
++                                                        break;
++                                	}
++
++				}
++                                else if(beacon->rsn_ie[8]==2){//mixed mode
++                                        ieee->pairwise_key_type = KEY_TYPE_CCMP;
++                                }
++                        }
++
++   
++			beacon->rsn_ie[rsn_len - 2] = 0;
++			memcpy(tag,beacon->rsn_ie,rsn_len);
++		}
++	}
++#else
++        if (ieee->wpa_ie){
++	tag = skb_put(skb,ieee->wpa_ie_len);
++	memcpy(tag,ieee->wpa_ie,ieee->wpa_ie_len);
++        }
++#endif
++	tag = skb_put(skb,wmm_info_len);
++	if(wmm_info_len) {
++	  ieee80211_WMM_Info(ieee, &tag);
++	}
++#ifdef THOMAS_TURBO
++	tag = skb_put(skb,turbo_info_len);
++        if(turbo_info_len) {
++                ieee80211_TURBO_Info(ieee, &tag);
++        }
++#endif
++
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_association_req_2)
++		ieee->ext_patch_ieee80211_association_req_2(ieee, beacon, skb);
++#endif
++
++	return skb;
++}
++
++void ieee80211_associate_abort(struct ieee80211_device *ieee)
++{
++	
++	unsigned long flags;
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	ieee->associate_seq++;
++	
++	/* don't scan, and avoid to have the RX path possibily
++	 * try again to associate. Even do not react to AUTH or
++	 * ASSOC response. Just wait for the retry wq to be scheduled.
++	 * Here we will check if there are good nets to associate
++	 * with, so we retry or just get back to NO_LINK and scanning
++	 */
++	if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING){
++		IEEE80211_DEBUG_MGMT("Authentication failed\n"); 
++		ieee->softmac_stats.no_auth_rs++;
++	}else{
++		IEEE80211_DEBUG_MGMT("Association failed\n"); 
++		ieee->softmac_stats.no_ass_rs++;
++	}
++		
++	ieee->state = IEEE80211_ASSOCIATING_RETRY;
++		
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++	queue_delayed_work(ieee->wq, &ieee->associate_retry_wq, \
++                           IEEE80211_SOFTMAC_ASSOC_RETRY_TIME);
++#else
++	schedule_task(&ieee->associate_retry_wq);
++#endif
++	
++	spin_unlock_irqrestore(&ieee->lock, flags);
++}
++
++void ieee80211_associate_abort_cb(unsigned long dev)
++{
++	ieee80211_associate_abort((struct ieee80211_device *) dev);
++}
++
++
++void ieee80211_associate_step1(struct ieee80211_device *ieee)
++{
++	struct ieee80211_network *beacon = &ieee->current_network;
++	struct sk_buff *skb;
++	
++	IEEE80211_DEBUG_MGMT("Stopping scan\n");
++	
++	ieee->softmac_stats.tx_auth_rq++;
++	skb=ieee80211_authentication_req(beacon, ieee, 0);
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if(ieee->iw_mode == ieee->iw_ext_mode )	{
++		if(skb)	
++			softmac_mgmt_xmit(skb, ieee);
++		return;
++	}else
++#endif		
++	if (!skb) 
++		ieee80211_associate_abort(ieee);
++	else{ 
++		ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATING ;
++		IEEE80211_DEBUG_MGMT("Sending authentication request\n");
++		//printk(KERN_WARNING "Sending authentication request\n");
++		softmac_mgmt_xmit(skb, ieee);
++		//BUGON when you try to add_timer twice, using mod_timer may be better, john0709
++		if(!timer_pending(&ieee->associate_timer)){
++			ieee->associate_timer.expires = jiffies + (HZ / 2);
++			add_timer(&ieee->associate_timer);
++		}
++		dev_kfree_skb_any(skb);//edit by thomas
++	}	
++}
++
++void ieee80211_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
++{
++	u8 *c;	
++	struct sk_buff *skb;
++	struct ieee80211_network *beacon = &ieee->current_network;
++//	int hlen = sizeof(struct ieee80211_authentication);
++	
++	ieee->associate_seq++;
++	ieee->softmac_stats.tx_auth_rq++;
++	
++	skb = ieee80211_authentication_req(beacon, ieee, chlen+2);
++	if (!skb) 
++		ieee80211_associate_abort(ieee);
++	else{
++		c = skb_put(skb, chlen+2);
++		*(c++) = MFIE_TYPE_CHALLENGE;
++		*(c++) = chlen;
++		memcpy(c, challenge, chlen);
++		
++		IEEE80211_DEBUG_MGMT("Sending authentication challenge response\n");
++		
++		ieee80211_encrypt_fragment(ieee, skb, sizeof(struct ieee80211_hdr_3addr  ));
++			
++		softmac_mgmt_xmit(skb, ieee);
++		
++		if(!timer_pending(&ieee->associate_timer)){
++		ieee->associate_timer.expires = jiffies + (HZ / 2);
++		add_timer(&ieee->associate_timer);
++		}
++		dev_kfree_skb_any(skb);//edit by thomas
++	}	
++	kfree(challenge);
++}
++
++#ifdef _RTL8187_EXT_PATCH_
++
++// based on ieee80211_assoc_resp
++struct sk_buff* ieee80211_assoc_resp_by_net(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type)
++{
++	struct sk_buff *skb;
++	u8* tag;
++	
++	struct ieee80211_crypt_data* crypt;
++	struct ieee80211_assoc_response_frame *assoc;
++	short encrypt;
++	
++	unsigned int rate_len = ieee80211_MFIE_rate_len(ieee);
++	int len = sizeof(struct ieee80211_assoc_response_frame) + rate_len;
++	
++	if(ieee->iw_mode == ieee->iw_ext_mode)
++		skb = dev_alloc_skb(len+256); // stanley
++	else
++		skb = dev_alloc_skb(len);
++	
++	if (!skb) 
++		return NULL;
++	
++	assoc = (struct ieee80211_assoc_response_frame *)
++		skb_put(skb,sizeof(struct ieee80211_assoc_response_frame));
++	
++	assoc->header.frame_ctl = cpu_to_le16(pkt_type);
++	
++	memcpy(assoc->header.addr1, dest,ETH_ALEN);
++	memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
++	memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
++	assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ? 
++		WLAN_CAPABILITY_BSS : WLAN_CAPABILITY_IBSS);
++	
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_assoc_resp_by_net_1)
++		ieee->ext_patch_ieee80211_assoc_resp_by_net_1(assoc);
++		
++	if(ieee->short_slot)
++		assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT);
++		
++	if (ieee->host_encrypt)
++#ifdef _RTL8187_EXT_PATCH_
++                crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
++#else
++		crypt = ieee->crypt[ieee->tx_keyidx];
++#endif
++
++	else crypt = NULL;
++	
++	encrypt = ( crypt && crypt->ops);
++	   
++	if (encrypt)
++		assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
++	
++	assoc->status = 0;
++	assoc->aid = cpu_to_le16(ieee->assoc_id);
++	if (ieee->assoc_id == 0x2007) ieee->assoc_id=0;
++	else ieee->assoc_id++;
++	
++	assoc->info_element.id = 230; // Stanley, an unused id (just a hot fix)
++	assoc->info_element.len = 0;
++	
++	tag = (u8*) skb_put(skb, rate_len);
++	
++	ieee80211_MFIE_Brate(ieee, &tag);
++	ieee80211_MFIE_Grate(ieee, &tag);
++
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_assoc_resp_by_net_2)
++		ieee->ext_patch_ieee80211_assoc_resp_by_net_2(ieee, pstat, pkt_type, skb);
++	
++	return skb;
++}
++
++// based on ieee80211_resp_to_assoc_rq
++void ieee80211_ext_issue_assoc_rsp(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type)
++{
++	struct sk_buff *buf = ieee80211_assoc_resp_by_net(ieee, dest, status, pstat, pkt_type);
++	
++	if (buf)
++		softmac_mgmt_xmit(buf, ieee);
++}
++
++// based on ieee80211_associate_step2
++void ieee80211_ext_issue_assoc_req(struct ieee80211_device *ieee, struct ieee80211_network *pstat)
++{
++	
++	struct sk_buff* skb;
++	
++	// printk("@@@@@ ieee80211_ext_issue_assoc_req on channel: %d\n", ieee->current_network.channel);
++		
++	ieee->softmac_stats.tx_ass_rq++;
++	skb=ieee80211_association_req(pstat, ieee);
++	if (skb) 
++		softmac_mgmt_xmit(skb, ieee);
++}
++
++void ieee80211_ext_issue_disassoc(struct ieee80211_device *ieee, struct ieee80211_network *pstat, int reason, unsigned char extReason)
++{	
++	// do nothing
++	// printk("@@@@@ ieee80211_ext_issue_disassoc\n");
++	return;
++}
++#endif // _RTL8187_EXT_PATCH_
++
++void ieee80211_associate_step2(struct ieee80211_device *ieee)
++{
++	struct sk_buff* skb;
++	struct ieee80211_network *beacon = &ieee->current_network;
++	
++//	del_timer_sync(&ieee->associate_timer);
++	
++	IEEE80211_DEBUG_MGMT("Sending association request\n");
++	
++	ieee->softmac_stats.tx_ass_rq++;
++	skb=ieee80211_association_req(beacon, ieee);
++	if (!skb) 
++		ieee80211_associate_abort(ieee);
++	else{
++		softmac_mgmt_xmit(skb, ieee);
++		if(!timer_pending(&ieee->associate_timer)){
++		ieee->associate_timer.expires = jiffies + (HZ / 2);
++		add_timer(&ieee->associate_timer);
++		}
++		dev_kfree_skb_any(skb);//edit by thomas
++	}	
++}
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void ieee80211_associate_complete_wq(struct work_struct *work)
++{
++	struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_complete_wq);
++#else
++void ieee80211_associate_complete_wq(struct ieee80211_device *ieee)
++{
++#endif
++	printk(KERN_INFO "Associated successfully\n");
++	if(ieee80211_is_54g(ieee->current_network) && 
++		(ieee->modulation & IEEE80211_OFDM_MODULATION)){
++		
++		ieee->rate = 540;
++		printk(KERN_INFO"Using G rates\n");
++	}else{
++		ieee->rate = 110;
++		printk(KERN_INFO"Using B rates\n");
++	}
++
++//by lizhaoming for LED LINK
++#ifdef LED_SHIN
++	{
++	struct net_device *dev = ieee->dev; 
++	ieee->ieee80211_led_contorl(dev, LED_CTL_LINK);
++	}
++#endif
++
++	ieee->link_change(ieee->dev);
++	notify_wx_assoc_event(ieee); 
++	if (ieee->data_hard_resume)
++		ieee->data_hard_resume(ieee->dev);
++	netif_carrier_on(ieee->dev);
++}
++
++void ieee80211_associate_complete(struct ieee80211_device *ieee)
++{
++	int i;
++//	struct net_device *dev = ieee->dev;
++	del_timer_sync(&ieee->associate_timer);
++	
++	for(i = 0; i < 6; i++) {
++//	  ieee->seq_ctrl[i] = 0;
++	}
++	ieee->state = IEEE80211_LINKED;
++	IEEE80211_DEBUG_MGMT("Successfully associated\n");
++
++	//by lizhaoming for LED LINK
++	//ieee->ieee80211_led_contorl(dev, LED_CTL_LINK);
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)		
++	queue_work(ieee->wq, &ieee->associate_complete_wq);
++#else
++	schedule_task(&ieee->associate_complete_wq);
++#endif
++}
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void ieee80211_associate_procedure_wq(struct work_struct *work)
++{
++	struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, associate_procedure_wq);
++#else
++void ieee80211_associate_procedure_wq(struct ieee80211_device *ieee)
++{
++#endif
++	ieee->sync_scan_hurryup = 1;
++	down(&ieee->wx_sem);
++	
++	if (ieee->data_hard_stop)
++		ieee->data_hard_stop(ieee->dev);
++	
++	ieee80211_stop_scan(ieee);
++	//printk("=======>%s set chan:%d\n", __func__, ieee->current_network.channel);
++	ieee->set_chan(ieee->dev, ieee->current_network.channel);
++	
++	ieee->associate_seq = 1;
++	ieee80211_associate_step1(ieee);
++	
++	up(&ieee->wx_sem);
++}
++#ifdef _RTL8187_EXT_PATCH_
++// based on ieee80211_associate_procedure_wq
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++void ieee80211_ext_stop_scan_wq(struct work_struct *work)
++{
++	struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ext_stop_scan_wq);
++#else
++void ieee80211_ext_stop_scan_wq(struct ieee80211_device *ieee)
++{
++#endif
++/*
++	  if (ieee->scanning == 0)
++	{
++		if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel
++				&& ( ieee->current_network.channel == ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel(ieee) ) )
++		return;
++	}
++*/		
++	ieee->sync_scan_hurryup = 1;
++	
++	down(&ieee->wx_sem);
++	
++	// printk("@@@@@@@@@@ ieee80211_ext_stop_scan_wq\n");
++	if (ieee->data_hard_stop)
++		ieee->data_hard_stop(ieee->dev);
++	
++	ieee80211_stop_scan(ieee);
++
++	// set channel
++        if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel)
++        {
++            int ch = ieee->ext_patch_ieee80211_ext_stop_scan_wq_set_channel(ieee);
++            ieee->current_network.channel = ch;
++            ieee->set_chan(ieee->dev, ch);
++        }
++        else
++        {
++            ieee->set_chan(ieee->dev, ieee->current_network.channel);	
++        }
++	//
++	up(&ieee->wx_sem);
++}
++
++
++void ieee80211_ext_send_11s_beacon(struct ieee80211_device *ieee)
++{	
++	#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++		queue_work(ieee->wq, &ieee->ext_send_beacon_wq);
++	#else
++		schedule_task(&ieee->ext_send_beacon_wq);
++	#endif	
++
++}
++
++#endif // _RTL8187_EXT_PATCH_
++
++inline void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net)
++{
++	u8 tmp_ssid[IW_ESSID_MAX_SIZE+1];
++	int tmp_ssid_len = 0;
++	
++	short apset,ssidset,ssidbroad,apmatch,ssidmatch;
++//	printk("===============>%s()\n",__FUNCTION__);	
++	/* we are interested in new new only if we are not associated 
++	 * and we are not associating / authenticating
++	 */
++	if (ieee->state != IEEE80211_NOLINK)
++		return; 
++
++	if ((ieee->iw_mode == IW_MODE_INFRA) && !(net->capability & WLAN_CAPABILITY_BSS))
++		return;
++	
++	if ((ieee->iw_mode == IW_MODE_ADHOC) && !(net->capability & WLAN_CAPABILITY_IBSS))
++		return;
++
++	
++	if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC){
++		/* if the user specified the AP MAC, we need also the essid
++		 * This could be obtained by beacons or, if the network does not
++		 * broadcast it, it can be put manually.
++		 */
++		apset = ieee->wap_set;//(memcmp(ieee->current_network.bssid, zero,ETH_ALEN)!=0 );
++		ssidset = ieee->ssid_set;//ieee->current_network.ssid[0] != '\0';
++		ssidbroad =  !(net->ssid_len == 0 || net->ssid[0]== '\0');
++		apmatch = (memcmp(ieee->current_network.bssid, net->bssid, ETH_ALEN)==0);
++		if(ieee->current_network.ssid_len != net->ssid_len)
++			ssidmatch = 0;
++		else
++			ssidmatch = (0==strncmp(ieee->current_network.ssid, net->ssid, net->ssid_len));
++		
++		
++		
++		if (	/* if the user set the AP check if match.
++		         * if the network does not broadcast essid we check the user supplyed ANY essid
++			 * if the network does broadcast and the user does not set essid it is OK
++			 * if the network does broadcast and the user did set essid chech if essid match
++			 */
++			( apset && apmatch && 
++				//((ssidset && ssidbroad && ssidmatch) || (ssidbroad && !ssidset) || (!ssidbroad && ssidset)) ) ||  
++				((ssidset && ssidbroad && ssidmatch) || (!ssidbroad && ssidset)) ) ||  
++			/* if the ap is not set, check that the user set the bssid
++			 * and the network does bradcast and that those two bssid matches
++			 */ 
++			(!apset && ssidset && ssidbroad && ssidmatch) 
++			){
++				/* if the essid is hidden replace it with the
++				* essid provided by the user.
++				*/
++				if (!ssidbroad){
++					strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
++					tmp_ssid_len = ieee->current_network.ssid_len;
++				}
++				memcpy(&ieee->current_network, net, sizeof(struct ieee80211_network));
++				
++				if (!ssidbroad){
++					strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
++					ieee->current_network.ssid_len = tmp_ssid_len;
++				}
++				printk(KERN_INFO"Linking with %s, channel:%d\n",ieee->current_network.ssid, ieee->current_network.channel);
++
++#ifdef CONFIG_IPS 
++				ieee->ieee80211_ips_leave(ieee->dev);
++#endif
++				
++				if (ieee->iw_mode == IW_MODE_INFRA){
++					ieee->state = IEEE80211_ASSOCIATING;
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++					queue_work(ieee->wq, &ieee->associate_procedure_wq);
++#else
++					schedule_task(&ieee->associate_procedure_wq);
++#endif
++				}else{
++					ieee->state = IEEE80211_LINKED;
++					if(ieee80211_is_54g(ieee->current_network) && 
++						(ieee->modulation & IEEE80211_OFDM_MODULATION)){
++						ieee->rate = 540;
++						printk(KERN_INFO"Using G rates\n");
++					}else{
++						ieee->rate = 110;
++						printk(KERN_INFO"Using B rates\n");
++					}
++				}
++			
++		}
++	}
++
++}
++
++void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee)
++{
++	unsigned long flags;
++	struct ieee80211_network *target;
++
++	spin_lock_irqsave(&ieee->lock, flags);
++#if 0			
++	list_for_each_entry(target, &ieee->network_list, list) {
++            printk(KERN_INFO"check network list SSID: %s, channel: %d\n",target->ssid,target->channel);
++	}
++#endif
++	list_for_each_entry(target, &ieee->network_list, list) {
++		
++		/* if the state become different that NOLINK means
++		 * we had found what we are searching for
++		 */
++
++		if (ieee->state != IEEE80211_NOLINK) 
++			break;
++	
++		if (ieee->scan_age == 0 || time_after(target->last_scanned + ieee->scan_age, jiffies))
++			ieee80211_softmac_new_net(ieee, target);
++	}
++	
++	spin_unlock_irqrestore(&ieee->lock, flags);
++	
++	//printk("<=====%s\n", __func__);
++}
++
++
++static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
++{
++	struct ieee80211_authentication *a;
++	u8 *t;
++	if (skb->len <  (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){ 
++		IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n",skb->len);
++		return 0xcafe;
++	}
++	*challenge = NULL;
++	a = (struct ieee80211_authentication*) skb->data;
++	if(skb->len > (sizeof(struct ieee80211_authentication) +3)){
++		t = skb->data + sizeof(struct ieee80211_authentication);
++		
++		if(*(t++) == MFIE_TYPE_CHALLENGE){
++			*chlen = *(t++);
++			*challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC);
++			memcpy(*challenge, t, *chlen);
++		}
++	}
++	
++	return cpu_to_le16(a->status);
++	
++}
++
++
++int auth_rq_parse(struct sk_buff *skb,u8* dest)
++{
++	struct ieee80211_authentication *a;
++	
++	if (skb->len <  (sizeof(struct ieee80211_authentication)-sizeof(struct ieee80211_info_element))){ 
++		IEEE80211_DEBUG_MGMT("invalid len in auth request: %d\n",skb->len);	
++		return -1;
++	}
++	a = (struct ieee80211_authentication*) skb->data;
++	
++	memcpy(dest,a->header.addr2, ETH_ALEN);
++	
++	if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN) 
++		return  WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
++	
++	return WLAN_STATUS_SUCCESS;
++}
++
++static short probe_rq_parse(struct ieee80211_device *ieee, struct sk_buff *skb, u8 *src)
++{
++	u8 *tag;
++	u8 *skbend;
++	u8 *ssid=NULL;
++	u8 ssidlen = 0;
++	
++	struct ieee80211_hdr_3addr   *header =
++		(struct ieee80211_hdr_3addr   *) skb->data;
++	
++	if (skb->len < sizeof (struct ieee80211_hdr_3addr  )) 
++		return -1; /* corrupted */
++	
++	memcpy(src,header->addr2, ETH_ALEN);
++	
++	skbend = (u8*)skb->data + skb->len;
++	
++	tag = skb->data + sizeof (struct ieee80211_hdr_3addr  );
++	
++	while (tag+1 < skbend){
++		if (*tag == 0){ 
++			ssid = tag+2;
++			ssidlen = *(tag+1);
++			break;
++		}
++		tag++; /* point to the len field */
++		tag = tag + *(tag); /* point to the last data byte of the tag */
++		tag++; /* point to the next tag */
++	}
++	
++	//IEEE80211DMESG("Card MAC address is "MACSTR, MAC2STR(src));
++	if (ssidlen == 0) return 1;
++	
++	if (!ssid) return 1; /* ssid not found in tagged param */
++	return (!strncmp(ssid, ieee->current_network.ssid, ssidlen));
++		
++}
++
++int assoc_rq_parse(struct sk_buff *skb,u8* dest)
++{
++	struct ieee80211_assoc_request_frame *a;
++	
++	if (skb->len < (sizeof(struct ieee80211_assoc_request_frame) - 
++		sizeof(struct ieee80211_info_element))) { 
++		
++		IEEE80211_DEBUG_MGMT("invalid len in auth request:%d \n", skb->len);
++		return -1;
++	}
++	
++	a = (struct ieee80211_assoc_request_frame*) skb->data;
++		
++	memcpy(dest,a->header.addr2,ETH_ALEN);
++	
++	return 0;
++}
++
++static inline u16 assoc_parse(struct sk_buff *skb, int *aid)
++{
++	struct ieee80211_assoc_response_frame *a;
++	if (skb->len <  sizeof(struct ieee80211_assoc_response_frame)){ 
++		IEEE80211_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
++		return 0xcafe;
++	}
++	
++	a = (struct ieee80211_assoc_response_frame*) skb->data;
++	*aid = le16_to_cpu(a->aid) & 0x3fff;
++	return le16_to_cpu(a->status);
++}
++
++static inline void
++ieee80211_rx_probe_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
++{
++	u8 dest[ETH_ALEN];
++	
++	//IEEE80211DMESG("Rx probe");
++	ieee->softmac_stats.rx_probe_rq++;
++	//DMESG("Dest is "MACSTR, MAC2STR(dest));
++	if (probe_rq_parse(ieee, skb, dest)){
++		//IEEE80211DMESG("Was for me!");
++		ieee->softmac_stats.tx_probe_rs++;
++		ieee80211_resp_to_probe(ieee, dest);
++	}
++}
++
++//static inline void
++inline void ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
++{
++	u8 dest[ETH_ALEN];
++	int status;
++	//IEEE80211DMESG("Rx probe");
++	ieee->softmac_stats.rx_auth_rq++;
++	
++	if ((status = auth_rq_parse(skb, dest))!= -1){
++		ieee80211_resp_to_auth(ieee, status, dest);
++	}
++	//DMESG("Dest is "MACSTR, MAC2STR(dest));
++	
++}
++
++//static inline void
++inline void
++ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
++{
++	
++	u8 dest[ETH_ALEN];
++	//unsigned long flags;
++	
++	ieee->softmac_stats.rx_ass_rq++;
++	if (assoc_rq_parse(skb,dest) != -1){
++		ieee80211_resp_to_assoc_rq(ieee, dest);
++	}
++	
++	printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest));
++	//FIXME
++	#if 0
++	spin_lock_irqsave(&ieee->lock,flags);
++	add_associate(ieee,dest);
++	spin_unlock_irqrestore(&ieee->lock,flags);
++	#endif
++}
++
++
++
++void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr)
++{
++	
++	struct sk_buff *buf = ieee80211_null_func(ieee, pwr);
++	
++	printk(KERN_ALERT "ieee80211_sta_ps_send_null_frame \n");
++	if (buf)
++		softmac_ps_mgmt_xmit(buf, ieee);
++
++} 
++
++
++short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h, u32 *time_l)
++{	
++	int timeout = ieee->ps_timeout;
++	u8 dtim;
++	/*if(ieee->ps == IEEE80211_PS_DISABLED ||
++		ieee->iw_mode != IW_MODE_INFRA || 
++		ieee->state != IEEE80211_LINKED)
++		
++		return 0;
++	*/
++	dtim = ieee->current_network.dtim_data;
++	//printk("DTIM\n");
++	if(!(dtim & IEEE80211_DTIM_VALID))
++		return 0;
++	//printk("VALID\n");
++	ieee->current_network.dtim_data = IEEE80211_DTIM_INVALID;
++		
++	if(dtim & ((IEEE80211_DTIM_UCAST | IEEE80211_DTIM_MBCAST)& ieee->ps))
++		return 2;
++	
++	if(!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout)))
++		return 0;
++	
++	if(!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout)))
++		return 0;
++	
++	if((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE ) &&
++		(ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
++		return 0;
++	
++	if(time_l){
++		*time_l = ieee->current_network.last_dtim_sta_time[0] 
++			+ (ieee->current_network.beacon_interval 
++			* ieee->current_network.dtim_period) * 1000;
++	}
++	
++	if(time_h){
++		*time_h = ieee->current_network.last_dtim_sta_time[1];
++		if(time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
++			*time_h += 1;
++	}
++	
++	return 1;
++	
++	
++}
++
++inline void ieee80211_sta_ps(struct ieee80211_device *ieee)
++{
++
++	u32 th,tl;
++	short sleep;
++	
++	unsigned long flags,flags2;
++	
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	if((ieee->ps == IEEE80211_PS_DISABLED ||
++		ieee->iw_mode != IW_MODE_INFRA || 
++		ieee->state != IEEE80211_LINKED)){
++		
++	//	#warning CHECK_LOCK_HERE
++		spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
++		
++		ieee80211_sta_wakeup(ieee, 1);	
++		
++		spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
++	}
++	
++	sleep = ieee80211_sta_ps_sleep(ieee,&th, &tl);
++	/* 2 wake, 1 sleep, 0 do nothing */
++	if(sleep == 0)
++		goto out;
++	
++	if(sleep == 1){
++	
++		if(ieee->sta_sleep == 1)
++			ieee->enter_sleep_state(ieee->dev,th,tl);
++		
++		else if(ieee->sta_sleep == 0){
++		//	printk("send null 1\n");
++			spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
++			
++			if(ieee->ps_is_queue_empty(ieee->dev)){
++				
++			
++				ieee->sta_sleep = 2;
++				
++				ieee->ps_request_tx_ack(ieee->dev);
++				
++				ieee80211_sta_ps_send_null_frame(ieee,1);
++				
++				ieee->ps_th = th;
++				ieee->ps_tl = tl;
++			}		
++			spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
++			
++		}
++		
++		
++	}else if(sleep == 2){
++//#warning CHECK_LOCK_HERE
++		spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
++			
++		ieee80211_sta_wakeup(ieee,1);
++		
++		spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
++	}
++
++out:	
++	spin_unlock_irqrestore(&ieee->lock, flags);
++	
++}
++
++void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl)
++{
++	if(ieee->sta_sleep == 0){
++		if(nl){
++			printk("Warning: driver is probably failing to report TX ps error\n");
++			ieee->ps_request_tx_ack(ieee->dev);
++			ieee80211_sta_ps_send_null_frame(ieee, 0);
++		}
++		return;
++		
++	}
++	
++	if(ieee->sta_sleep == 1) 
++		ieee->sta_wake_up(ieee->dev);
++		
++	ieee->sta_sleep = 0;
++	
++	if(nl){
++		ieee->ps_request_tx_ack(ieee->dev);
++		ieee80211_sta_ps_send_null_frame(ieee, 0);
++	}
++}
++
++void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success)
++{
++	unsigned long flags,flags2;
++	
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	if(ieee->sta_sleep == 2){
++		/* Null frame with PS bit set */
++		if(success){
++			ieee->sta_sleep = 1;
++			ieee->enter_sleep_state(ieee->dev,ieee->ps_th,ieee->ps_tl);
++		}
++		/* if the card report not success we can't be sure the AP
++		 * has not RXed so we can't assume the AP believe us awake
++		 */
++	}
++	/* 21112005 - tx again null without PS bit if lost */
++	else {
++	
++		if((ieee->sta_sleep == 0) && !success){
++			spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
++			ieee80211_sta_ps_send_null_frame(ieee, 0);
++			spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
++		}
++	}
++	spin_unlock_irqrestore(&ieee->lock, flags);
++}
++
++inline int
++ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
++			struct ieee80211_rx_stats *rx_stats, u16 type,
++			u16 stype)
++{
++	struct ieee80211_hdr_3addr *header = (struct ieee80211_hdr_3addr *) skb->data;
++	u16 errcode;
++	u8* challenge=NULL;
++	int chlen=0;
++	int aid=0;
++	struct ieee80211_assoc_response_frame *assoc_resp;
++	struct ieee80211_info_element *info_element;
++	
++	if(!ieee->proto_started)
++		return 0;
++
++	if(ieee->sta_sleep || (ieee->ps != IEEE80211_PS_DISABLED &&
++		ieee->iw_mode == IW_MODE_INFRA && 
++		ieee->state == IEEE80211_LINKED))
++	
++		tasklet_schedule(&ieee->ps_task);
++				
++	if(WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_PROBE_RESP &&
++		WLAN_FC_GET_STYPE(header->frame_ctl) != IEEE80211_STYPE_BEACON)
++		ieee->last_rx_ps_time = jiffies;
++		
++	switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
++		case IEEE80211_STYPE_ASSOC_RESP:
++		case IEEE80211_STYPE_REASSOC_RESP:
++		
++			IEEE80211_DEBUG_MGMT("received [RE]ASSOCIATION RESPONSE (%d)\n",
++					WLAN_FC_GET_STYPE(header->frame_ctl));
++			//printk(KERN_WARNING "Received association response\n");
++			if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
++				ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATED && 
++				ieee->iw_mode == IW_MODE_INFRA){
++				if (0 == (errcode=assoc_parse(skb, &aid))){
++					u16 left;
++
++					ieee->state=IEEE80211_LINKED;
++					ieee->assoc_id = aid;
++					ieee->softmac_stats.rx_ass_ok++;
++					
++					//printk(KERN_WARNING "nic_type = %s", (rx_stats->nic_type == 1)?"rtl8187":"rtl8187B");
++					if(1 == rx_stats->nic_type) //card type is 8187
++					{
++						goto associate_complete;
++					}
++					assoc_resp = (struct ieee80211_assoc_response_frame*)skb->data;
++					info_element = 	&assoc_resp->info_element;
++					left = skb->len - ((void*)info_element - (void*)assoc_resp);
++						
++					while (left >= sizeof(struct ieee80211_info_element_hdr)) {
++						if (sizeof(struct ieee80211_info_element_hdr) + info_element->len > left) {
++							printk(KERN_WARNING "[re]associate reeponse error!");
++							return 1;
++						}
++						switch (info_element->id) {
++						  case MFIE_TYPE_GENERIC:
++						         IEEE80211_DEBUG_SCAN("MFIE_TYPE_GENERIC: %d bytes\n", info_element->len);
++							if (info_element->len >= 8  &&
++							    info_element->data[0] == 0x00 &&
++							    info_element->data[1] == 0x50 &&
++							    info_element->data[2] == 0xf2 &&
++							    info_element->data[3] == 0x02 &&
++							    info_element->data[4] == 0x01) {
++							    // Not care about version at present.
++							    //WMM Parameter Element
++							    memcpy(ieee->current_network.wmm_param,(u8*)(info_element->data\
++										    + 8),(info_element->len - 8));
++
++					 	            if (((ieee->current_network.wmm_info^info_element->data[6])& \
++										    0x0f)||(!ieee->init_wmmparam_flag)) {
++						   	      //refresh paramete element for current network
++							      // update the register parameter for hardware
++							      ieee->init_wmmparam_flag = 1;
++							      //ieee->wmm_param_update(ieee);
++							      //schedule_work(&ieee->wmm_param_update_wq);
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++							      queue_work(ieee->wq, &ieee->wmm_param_update_wq);
++#else
++							      schedule_task(&ieee->wmm_param_update_wq);
++#endif
++
++						            }
++						            //update info_element for current network
++						            ieee->current_network.wmm_info  = info_element->data[6];
++							}
++							break;
++						  default:
++							//nothing to do at present!!!					
++							break;
++						}
++
++						left -= sizeof(struct ieee80211_info_element_hdr) +
++							info_element->len;
++						info_element = (struct ieee80211_info_element *)
++							&info_element->data[info_element->len];
++					}
++					if(!ieee->init_wmmparam_flag) //legacy AP, reset the AC_xx_param register
++					{
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++						queue_work(ieee->wq,&ieee->wmm_param_update_wq);
++#else
++						schedule_task(&ieee->wmm_param_update_wq);
++#endif
++						ieee->init_wmmparam_flag = 1;//indicate AC_xx_param upated since last associate
++					}
++associate_complete:	
++					ieee80211_associate_complete(ieee);
++				}else{
++					ieee->softmac_stats.rx_ass_err++;
++					IEEE80211_DEBUG_MGMT(
++						"Association response status code 0x%x\n",
++						errcode);
++					printk(KERN_WARNING "Association response status code 0x%x\n",
++						errcode);
++					ieee80211_associate_abort(ieee); 
++				}
++			}
++#ifdef _RTL8187_EXT_PATCH_
++			else if ((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp)
++			{
++					ieee->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp(ieee, skb);
++			}
++#endif
++			break;
++		
++		case IEEE80211_STYPE_ASSOC_REQ:
++		case IEEE80211_STYPE_REASSOC_REQ:
++			//printk("Received IEEE80211_STYPE_ASSOC_REQ\n");
++		
++			if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
++				ieee->iw_mode == IW_MODE_MASTER)
++					
++				ieee80211_rx_assoc_rq(ieee, skb);
++#ifdef _RTL8187_EXT_PATCH_
++			else if ((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req)
++			{
++					ieee->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req(ieee, skb);
++			}
++#endif
++			break;
++			
++		case IEEE80211_STYPE_AUTH:
++			//printk("Received authentication response\n");
++
++#ifdef _RTL8187_EXT_PATCH_
++//printk("IEEE80211_STYPE_AUTH\n");
++			if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_frame_softmac_on_auth)
++			if( ieee->ext_patch_ieee80211_rx_frame_softmac_on_auth(ieee, skb, rx_stats) );
++#endif
++			if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE){
++				if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING && 
++				ieee->iw_mode == IW_MODE_INFRA){
++			
++						IEEE80211_DEBUG_MGMT("Received authentication response");
++						
++						if (0 == (errcode=auth_parse(skb, &challenge, &chlen))){
++							if(ieee->open_wep || !challenge){
++								ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
++								ieee->softmac_stats.rx_auth_rs_ok++;
++								
++								ieee80211_associate_step2(ieee);
++							}else{
++								ieee80211_auth_challenge(ieee, challenge, chlen);
++							}
++						}else{
++							ieee->softmac_stats.rx_auth_rs_err++;
++							IEEE80211_DEBUG_MGMT("Authentication respose status code 0x%x",errcode);
++							ieee80211_associate_abort(ieee);
++						}
++						
++					}else if (ieee->iw_mode == IW_MODE_MASTER){
++						ieee80211_rx_auth_rq(ieee, skb);
++					}
++				}
++			break;
++				
++		case IEEE80211_STYPE_PROBE_REQ:
++			//printk("Received IEEE80211_STYPE_PROBE_REQ\n");
++		
++			if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) && 
++				((ieee->iw_mode == IW_MODE_ADHOC || 
++				ieee->iw_mode == IW_MODE_MASTER) &&
++				ieee->state == IEEE80211_LINKED))
++				
++				ieee80211_rx_probe_rq(ieee, skb);
++			break;
++			
++		case IEEE80211_STYPE_DISASSOC:
++		case IEEE80211_STYPE_DEAUTH:
++			//printk("Received IEEE80211_STYPE_DISASSOC\n");
++#ifdef _RTL8187_EXT_PATCH_		
++//printk("IEEE80211_STYPE_DEAUTH\n");
++		if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_rx_frame_softmac_on_deauth)
++		if( ieee->ext_patch_ieee80211_rx_frame_softmac_on_deauth(ieee, skb, rx_stats) )	;
++#endif				
++			/* FIXME for now repeat all the association procedure 
++			* both for disassociation and deauthentication
++			*/
++			if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
++				ieee->state == IEEE80211_LINKED && 
++				ieee->iw_mode == IW_MODE_INFRA){
++				
++				ieee->state = IEEE80211_ASSOCIATING;
++				ieee->softmac_stats.reassoc++;
++				
++				notify_wx_assoc_event(ieee);
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)					
++				queue_work(ieee->wq, &ieee->associate_procedure_wq);
++#else
++				schedule_task(&ieee->associate_procedure_wq);
++#endif
++			}
++			
++			break;
++		
++		default: 
++			return -1;
++			break;
++	}
++	
++	//dev_kfree_skb_any(skb);
++	return 0;
++}
++
++
++
++/* following are for a simplier TX queue management.
++ * Instead of using netif_[stop/wake]_queue the driver
++ * will uses these two function (plus a reset one), that
++ * will internally uses the kernel netif_* and takes
++ * care of the ieee802.11 fragmentation.
++ * So the driver receives a fragment per time and might
++ * call the stop function when it want without take care
++ * to have enought room to TX an entire packet.
++ * This might be useful if each fragment need it's own
++ * descriptor, thus just keep a total free memory > than
++ * the max fragmentation treshold is not enought.. If the
++ * ieee802.11 stack passed a TXB struct then you needed  
++ * to keep N free descriptors where 
++ * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
++ * In this way you need just one and the 802.11 stack
++ * will take care of buffering fragments and pass them to 
++ * to the driver later, when it wakes the queue.
++ */ 
++ 
++void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee)
++{
++	
++	
++	unsigned long flags;
++	int  i;
++#ifdef _RTL8187_EXT_PATCH_
++	int rate = ieee->rate;
++#endif
++	
++	spin_lock_irqsave(&ieee->lock,flags);
++	#if 0
++	if(ieee->queue_stop){
++		IEEE80211DMESG("EE: IEEE hard_start_xmit invoked when kernel queue should be stopped");
++		netif_stop_queue(ieee->dev);
++		ieee->ieee_stats.swtxstop++;
++		//dev_kfree_skb_any(skb);
++		err = 1;
++		goto exit;
++	}
++	
++	ieee->stats.tx_bytes+=skb->len;
++	
++	
++	txb=ieee80211_skb_to_txb(ieee,skb);
++	
++	
++	if(txb==NULL){
++		IEEE80211DMESG("WW: IEEE stack failed to provide txb");
++		//dev_kfree_skb_any(skb);
++		err = 1;
++		goto exit;
++	}
++	#endif
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_softmac_xmit_get_rate && txb->nr_frags)
++	{
++		rate = ieee->ext_patch_ieee80211_softmac_xmit_get_rate(ieee, txb->fragments[0]);
++	}
++#endif
++	/* called with 2nd parm 0, no tx mgmt lock required */
++	ieee80211_sta_wakeup(ieee,0);
++
++	for(i = 0; i < txb->nr_frags; i++) {
++	
++		if (ieee->queue_stop){
++			ieee->tx_pending.txb = txb;
++			ieee->tx_pending.frag = i;
++			goto exit;
++		}else{
++			ieee->softmac_data_hard_start_xmit(
++				txb->fragments[i],
++#ifdef _RTL8187_EXT_PATCH_
++				ieee->dev, rate);
++#else
++				ieee->dev,ieee->rate);
++#endif
++				//(i+1)<txb->nr_frags);
++			ieee->stats.tx_packets++;
++			ieee->stats.tx_bytes += txb->fragments[i]->len;
++			ieee->dev->trans_start = jiffies; 
++		}
++	}	
++	
++	ieee80211_txb_free(txb);
++	
++	exit:
++	spin_unlock_irqrestore(&ieee->lock,flags);
++	
++}
++
++/* called with ieee->lock acquired */
++void ieee80211_resume_tx(struct ieee80211_device *ieee)
++{
++	int i;
++	for(i = ieee->tx_pending.frag; i < ieee->tx_pending.txb->nr_frags; i++) {
++		
++		if (ieee->queue_stop){
++			ieee->tx_pending.frag = i;
++			return;
++		}else{
++		
++			ieee->softmac_data_hard_start_xmit( 
++				ieee->tx_pending.txb->fragments[i],
++				ieee->dev,ieee->rate);
++				//(i+1)<ieee->tx_pending.txb->nr_frags);
++			ieee->stats.tx_packets++;
++			ieee->dev->trans_start = jiffies;
++		}
++	}
++	
++	
++	ieee80211_txb_free(ieee->tx_pending.txb);
++	ieee->tx_pending.txb = NULL;
++}
++
++
++void ieee80211_reset_queue(struct ieee80211_device *ieee)
++{
++	unsigned long flags;
++	
++	spin_lock_irqsave(&ieee->lock,flags);
++	init_mgmt_queue(ieee);
++	if (ieee->tx_pending.txb){
++		ieee80211_txb_free(ieee->tx_pending.txb);
++		ieee->tx_pending.txb = NULL;
++	}
++	ieee->queue_stop = 0;
++	spin_unlock_irqrestore(&ieee->lock,flags);
++
++}
++
++void ieee80211_wake_queue(struct ieee80211_device *ieee)
++{
++
++	unsigned long flags;
++	struct sk_buff *skb;
++	struct ieee80211_hdr_3addr  *header;
++	
++	spin_lock_irqsave(&ieee->lock,flags);
++	if (! ieee->queue_stop) goto exit;
++	
++	ieee->queue_stop = 0;
++	
++	if(ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE){
++		while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))){
++			
++			header = (struct ieee80211_hdr_3addr  *) skb->data;
++			
++			header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
++
++			if (ieee->seq_ctrl[0] == 0xFFF)
++				ieee->seq_ctrl[0] = 0;
++			else
++				ieee->seq_ctrl[0]++;
++
++			printk(KERN_ALERT "ieee80211_wake_queue \n");
++			ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
++			dev_kfree_skb_any(skb);//edit by thomas
++		}
++	}
++	if (!ieee->queue_stop && ieee->tx_pending.txb)
++		ieee80211_resume_tx(ieee);
++	
++	if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)){
++		ieee->softmac_stats.swtxawake++;
++		netif_wake_queue(ieee->dev);
++	}
++	
++exit :
++	spin_unlock_irqrestore(&ieee->lock,flags);
++}
++
++
++void ieee80211_stop_queue(struct ieee80211_device *ieee)
++{
++	//unsigned long flags;
++	//spin_lock_irqsave(&ieee->lock,flags);
++
++	if (! netif_queue_stopped(ieee->dev)){
++		netif_stop_queue(ieee->dev);
++		ieee->softmac_stats.swtxstop++;
++	}
++	ieee->queue_stop = 1;
++	//spin_unlock_irqrestore(&ieee->lock,flags);
++	
++}
++
++
++inline void ieee80211_randomize_cell(struct ieee80211_device *ieee)
++{
++	
++	get_random_bytes(ieee->current_network.bssid, ETH_ALEN);
++	
++	/* an IBSS cell address must have the two less significant
++	 * bits of the first byte = 2 
++	 */
++	ieee->current_network.bssid[0] &= ~0x01;
++	ieee->current_network.bssid[0] |= 0x02;
++}
++
++/* called in user context only */
++void ieee80211_start_master_bss(struct ieee80211_device *ieee)
++{
++	ieee->assoc_id = 1;
++	
++	if (ieee->current_network.ssid_len == 0){
++		strncpy(ieee->current_network.ssid, 
++			IEEE80211_DEFAULT_TX_ESSID,
++			IW_ESSID_MAX_SIZE);
++			
++		ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
++		ieee->ssid_set = 1;
++	}
++	
++	memcpy(ieee->current_network.bssid, ieee->dev->dev_addr, ETH_ALEN);
++	 
++	ieee->set_chan(ieee->dev, ieee->current_network.channel);
++	ieee->state = IEEE80211_LINKED;
++
++//by lizhaoming for LED LINK
++#ifdef LED_SHIN
++	{
++	struct net_device *dev = ieee->dev;
++	ieee->ieee80211_led_contorl(dev, LED_CTL_LINK);
++	}
++#endif
++	ieee->link_change(ieee->dev);
++	notify_wx_assoc_event(ieee);
++	
++	if (ieee->data_hard_resume)
++		ieee->data_hard_resume(ieee->dev);
++	
++	netif_carrier_on(ieee->dev);
++}
++
++void ieee80211_start_monitor_mode(struct ieee80211_device *ieee)
++{
++	if(ieee->raw_tx){
++		
++		if (ieee->data_hard_resume)
++			ieee->data_hard_resume(ieee->dev);
++	
++		netif_carrier_on(ieee->dev);
++	}
++}
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void ieee80211_start_ibss_wq(struct work_struct *work)
++{
++	struct delayed_work *dwork = container_of(work, struct delayed_work, work);
++	struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, start_ibss_wq);
++#else
++void ieee80211_start_ibss_wq(struct ieee80211_device *ieee)
++{
++#endif
++	
++	/* iwconfig mode ad-hoc will schedule this and return
++	 * on the other hand this will block further iwconfig SET
++	 * operations because of the wx_sem hold.
++	 * Anyway some most set operations set a flag to speed-up
++	 * (abort) this wq (when syncro scanning) before sleeping 
++	 * on the semaphore
++	 */
++	
++	down(&ieee->wx_sem);
++	
++	if (ieee->current_network.ssid_len == 0){
++		strcpy(ieee->current_network.ssid,IEEE80211_DEFAULT_TX_ESSID);
++		ieee->current_network.ssid_len = strlen(IEEE80211_DEFAULT_TX_ESSID);
++		ieee->ssid_set = 1;
++	} 
++	
++//by lizhaoming for LED BLINK 2008.6.23
++#ifdef LED_SHIN
++	{
++	struct net_device *dev = ieee->dev;
++	ieee->ieee80211_led_contorl(dev, LED_CTL_SITE_SURVEY);
++	}
++#endif
++	
++	/* check if we have this cell in our network list */
++	ieee80211_softmac_check_all_nets(ieee);
++
++#ifdef ENABLE_DOT11D
++	//[World wide 13]:
++	// Adhoc:
++	//      (1) active scan from ch1~11 and passive scan from ch12~13
++	//      (2) IBSS can join ch1~13 adhoc, but only start at ch10.
++	if(ieee->state == IEEE80211_NOLINK) 
++		if(ieee->IbssStartChnl != 0)
++			ieee->current_network.channel = ieee->IbssStartChnl;//chan 10
++#endif	
++
++	/* if not then the state is not linked. Maybe the user swithced to
++	 * ad-hoc mode just after being in monitor mode, or just after
++	 * being very few time in managed mode (so the card have had no
++	 * time to scan all the chans..) or we have just run up the iface
++	 * after setting ad-hoc mode. So we have to give another try..
++	 * Here, in ibss mode, should be safe to do this without extra care
++	 * (in bss mode we had to make sure no-one tryed to associate when
++	 * we had just checked the ieee->state and we was going to start the
++	 * scan) beacause in ibss mode the ieee80211_new_net function, when
++	 * finds a good net, just set the ieee->state to IEEE80211_LINKED,
++	 * so, at worst, we waste a bit of time to initiate an unneeded syncro
++	 * scan, that will stop at the first round because it sees the state
++	 * associated.
++	 */
++	if (ieee->state == IEEE80211_NOLINK){
++		ieee80211_start_scan_syncro(ieee);
++	}
++
++	/* the network definitively is not here.. create a new cell */
++	if (ieee->state == IEEE80211_NOLINK){
++		printk("creating new IBSS cell\n"); 
++		ieee->state = IEEE80211_LINKED;
++		if(!ieee->wap_set)
++			ieee80211_randomize_cell(ieee);
++		
++		if(ieee->modulation & IEEE80211_CCK_MODULATION){
++		
++			ieee->current_network.rates_len = 4;
++			
++			ieee->current_network.rates[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
++			ieee->current_network.rates[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
++			ieee->current_network.rates[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
++			ieee->current_network.rates[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
++				
++		}else
++			ieee->current_network.rates_len = 0;
++		
++		if(ieee->modulation & IEEE80211_OFDM_MODULATION){
++			ieee->current_network.rates_ex_len = 8;
++			
++			ieee->current_network.rates_ex[0] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
++			ieee->current_network.rates_ex[1] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
++			ieee->current_network.rates_ex[2] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
++			ieee->current_network.rates_ex[3] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
++			ieee->current_network.rates_ex[4] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
++			ieee->current_network.rates_ex[5] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
++			ieee->current_network.rates_ex[6] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
++			ieee->current_network.rates_ex[7] = IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
++			
++			ieee->rate = 540;
++		}else{
++			ieee->current_network.rates_ex_len = 0;
++			ieee->rate = 110;
++		}
++
++		// By default, WMM function will be disabled in IBSS mode
++		ieee->current_network.QoS_Enable = 0;
++	
++		ieee->current_network.atim_window = 0;
++		ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
++		if(ieee->short_slot)
++			ieee->current_network.capability |= WLAN_CAPABILITY_SHORT_SLOT;
++				 
++	}
++	
++	ieee->state = IEEE80211_LINKED;
++		
++//by lizhaoming for LED LINK
++#ifdef LED_SHIN
++	{
++	struct net_device *dev = ieee->dev;
++	ieee->ieee80211_led_contorl(dev, LED_CTL_LINK);
++	}
++#endif
++		
++	ieee->set_chan(ieee->dev, ieee->current_network.channel);
++	ieee->link_change(ieee->dev);
++	
++	notify_wx_assoc_event(ieee);
++	
++	ieee80211_start_send_beacons(ieee);
++	printk(KERN_WARNING "after sending beacon packet!\n");
++	
++	if (ieee->data_hard_resume)
++		ieee->data_hard_resume(ieee->dev);
++	
++	netif_carrier_on(ieee->dev);
++	
++	up(&ieee->wx_sem);
++}
++
++inline void ieee80211_start_ibss(struct ieee80211_device *ieee)
++{
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++	queue_delayed_work(ieee->wq, &ieee->start_ibss_wq, 150); //change to delayed work, delayed time is need to check
++#else
++	schedule_task(&ieee->start_ibss_wq);
++#endif
++}
++
++/* this is called only in user context, with wx_sem held */
++void ieee80211_start_bss(struct ieee80211_device *ieee)
++{
++	unsigned long flags;
++	/* check if we have already found the net we
++	 * are interested in (if any).
++	 * if not (we are disassociated and we are not
++	 * in associating / authenticating phase) start the background scanning.
++	 */
++
++//by lizhaoming for LED BLINK 2008.6.23
++#ifdef LED_SHIN
++	{
++	struct net_device *dev = ieee->dev;
++	ieee->ieee80211_led_contorl(dev, LED_CTL_SITE_SURVEY);
++	}
++#endif
++
++#ifdef ENABLE_DOT11D
++	//
++	// Ref: 802.11d 11.1.3.3
++	// STA shall not start a BSS unless properly formed Beacon frame including a Country IE.
++	//
++	if(IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee))
++	{
++		if(! ieee->bGlobalDomain)
++		{
++			return;
++		}
++	}
++#endif	
++	//printk("======>%s()\n",__FUNCTION__);
++	ieee80211_softmac_check_all_nets(ieee);
++	
++	/* ensure no-one start an associating process (thus setting
++	 * the ieee->state to ieee80211_ASSOCIATING) while we
++	 * have just cheked it and we are going to enable scan.
++	 * The ieee80211_new_net function is always called with
++	 * lock held (from both ieee80211_softmac_check_all_nets and
++	 * the rx path), so we cannot be in the middle of such function
++	 */
++
++	spin_lock_irqsave(&ieee->lock, flags);
++	if (ieee->state == IEEE80211_NOLINK){
++		//printk("Not find SSID in network list scan now\n");
++		ieee80211_start_scan(ieee);
++	}
++	spin_unlock_irqrestore(&ieee->lock, flags);
++
++}
++
++/* called only in userspace context */
++void ieee80211_disassociate(struct ieee80211_device *ieee)
++{
++	netif_carrier_off(ieee->dev);
++	
++	if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
++			ieee80211_reset_queue(ieee);
++	
++	if (ieee->data_hard_stop)
++			ieee->data_hard_stop(ieee->dev);
++	
++#ifdef ENABLE_DOT11D
++	if(IS_DOT11D_ENABLE(ieee))
++		Dot11d_Reset(ieee);
++#endif
++	
++	ieee->state = IEEE80211_NOLINK;
++	ieee->link_change(ieee->dev);
++	notify_wx_assoc_event(ieee);
++	
++}
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void ieee80211_associate_retry_wq(struct work_struct *work)
++{
++	struct delayed_work *dwork = container_of(work, struct delayed_work, work);
++	struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, associate_retry_wq);
++#else
++void ieee80211_associate_retry_wq(struct ieee80211_device *ieee)
++{
++#endif
++	unsigned long flags;
++	
++	down(&ieee->wx_sem);
++	if(!ieee->proto_started)
++		goto exit;
++		
++	if(ieee->state != IEEE80211_ASSOCIATING_RETRY)
++		goto exit;
++		
++	/* until we do not set the state to IEEE80211_NOLINK 
++	* there are no possibility to have someone else trying
++	* to start an association procdure (we get here with
++	* ieee->state = IEEE80211_ASSOCIATING).
++	* When we set the state to IEEE80211_NOLINK it is possible
++	* that the RX path run an attempt to associate, but
++	* both ieee80211_softmac_check_all_nets and the
++	* RX path works with ieee->lock held so there are no
++	* problems. If we are still disassociated then start a scan.
++	* the lock here is necessary to ensure no one try to start
++	* an association procedure when we have just checked the 
++	* state and we are going to start the scan.
++	*/
++	ieee->state = IEEE80211_NOLINK;
++
++	ieee80211_softmac_check_all_nets(ieee);
++	
++	spin_lock_irqsave(&ieee->lock, flags);
++	if(ieee->state == IEEE80211_NOLINK)
++	{
++		printk("%s():Not find SSID:%s[ch=%d, mode=%s] in network list scan now\n", __FUNCTION__,
++				ieee->current_network.ssid,ieee->current_network.channel, 
++				(ieee->iw_mode == IW_MODE_INFRA) ? "BSS" : "IBSS");
++	
++		ieee80211_start_scan(ieee);
++	}
++
++	spin_unlock_irqrestore(&ieee->lock, flags);
++
++exit:
++	up(&ieee->wx_sem);
++}
++
++struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee)
++{
++	u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
++	
++	struct sk_buff *skb = NULL;
++	struct ieee80211_probe_response *b;
++
++//rz
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_get_beacon_get_probersp )
++		skb = ieee->ext_patch_get_beacon_get_probersp(ieee, broadcast_addr, &(ieee->current_network));
++	else
++		skb = ieee80211_probe_resp(ieee, broadcast_addr);
++#else
++	skb = ieee80211_probe_resp(ieee, broadcast_addr);
++#endif
++//		
++	if (!skb) 
++		return NULL;
++	
++	b = (struct ieee80211_probe_response *) skb->data;
++	b->header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_BEACON);
++		
++	return skb;
++	
++}
++
++struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee)
++{
++	struct sk_buff *skb;
++	struct ieee80211_probe_response *b;
++//	printk("=========>%s()\n", __FUNCTION__);	
++	skb = ieee80211_get_beacon_(ieee);
++	if(!skb) 
++		return NULL;
++		
++	b = (struct ieee80211_probe_response *) skb->data;	
++	b->header.seq_ctrl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
++	
++	if (ieee->seq_ctrl[0] == 0xFFF)
++		ieee->seq_ctrl[0] = 0;
++	else
++		ieee->seq_ctrl[0]++;
++	
++	return skb;
++}
++
++void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee)
++{
++	ieee->sync_scan_hurryup = 1;
++	down(&ieee->wx_sem);
++	ieee80211_stop_protocol(ieee);
++	up(&ieee->wx_sem);
++}
++
++
++void ieee80211_stop_protocol(struct ieee80211_device *ieee)
++{
++	if (!ieee->proto_started)
++		return;
++	
++	ieee->proto_started = 0;
++	//printk("=====>%s\n", __func__);
++	
++#ifdef _RTL8187_EXT_PATCH_
++	if(ieee->ext_patch_ieee80211_stop_protocol)
++		ieee->ext_patch_ieee80211_stop_protocol(ieee);
++//if call queue_delayed_work,can call this,or do nothing..
++//edit by lawrence,20071118
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++//	cancel_delayed_work(&ieee->ext_stop_scan_wq);	
++//	cancel_delayed_work(&ieee->ext_send_beacon_wq);	
++#endif	
++#endif // _RTL8187_EXT_PATCH_
++
++	ieee80211_stop_send_beacons(ieee);
++	
++	del_timer_sync(&ieee->associate_timer);
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++	cancel_delayed_work(&ieee->associate_retry_wq);	
++    cancel_delayed_work(&ieee->start_ibss_wq); //cancel ibss start workqueue when stop protocol
++#endif	
++	ieee80211_stop_scan(ieee);
++
++	ieee80211_disassociate(ieee);
++	//printk("<=====%s\n", __func__);
++
++}
++
++void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee)
++{
++	ieee->sync_scan_hurryup = 0;
++	down(&ieee->wx_sem);
++	ieee80211_start_protocol(ieee);
++	up(&ieee->wx_sem);
++}
++
++void ieee80211_start_protocol(struct ieee80211_device *ieee)
++{
++	short ch = 0;
++ 	int i = 0;	
++
++	if (ieee->proto_started)
++		return;
++		
++	//printk("=====>%s\n", __func__);
++	
++	ieee->proto_started = 1;
++	
++	if (ieee->current_network.channel == 0){
++		do{
++			ch++;
++			if (ch > MAX_CHANNEL_NUMBER) 
++				return; /* no channel found */
++#ifdef ENABLE_DOT11D
++		}while(!GET_DOT11D_INFO(ieee)->channel_map[ch]);
++#else
++		}while(!ieee->channel_map[ch]);
++#endif
++		ieee->current_network.channel = ch;
++	}
++	
++	if (ieee->current_network.beacon_interval == 0)
++		ieee->current_network.beacon_interval = 100;
++
++	ieee->set_chan(ieee->dev,ieee->current_network.channel);
++        mdelay(10);//must or link change will fail lzm
++	
++       	for(i = 0; i < 17; i++) {
++	  ieee->last_rxseq_num[i] = -1;
++	  ieee->last_rxfrag_num[i] = -1;
++	  ieee->last_packet_time[i] = 0;
++	}
++
++	ieee->init_wmmparam_flag = 0;//reinitialize AC_xx_PARAM registers.
++
++
++	/* if the user set the MAC of the ad-hoc cell and then
++	 * switch to managed mode, shall we  make sure that association
++	 * attempts does not fail just because the user provide the essid
++	 * and the nic is still checking for the AP MAC ??
++	 */
++	
++	if (ieee->iw_mode == IW_MODE_INFRA){
++		ieee80211_start_bss(ieee);
++	//	printk("==========> IW_MODE_INFRA\n");
++	}		
++	else if (ieee->iw_mode == IW_MODE_ADHOC){
++	//	printk("==========> IW_MODE_ADHOC\n");
++		ieee80211_start_ibss(ieee);
++	}		
++	else if (ieee->iw_mode == IW_MODE_MASTER){
++		ieee80211_start_master_bss(ieee);
++//		printk("==========> IW_MODE_MASTER\n");
++	}		
++	else if(ieee->iw_mode == IW_MODE_MONITOR){
++		ieee80211_start_monitor_mode(ieee);	
++//		printk("==========> IW_MODE_MONITOR\n");
++	}	
++
++#ifdef _RTL8187_EXT_PATCH_
++//	else if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_start_protocol && ieee->ext_patch_ieee80211_start_protocol(ieee))
++	else if((ieee->iw_mode == ieee->iw_ext_mode) && ieee->ext_patch_ieee80211_start_protocol)
++	{
++		 ieee->ext_patch_ieee80211_start_mesh(ieee);
++	}
++#endif
++}
++
++
++#define DRV_NAME  "Ieee80211"
++void ieee80211_softmac_init(struct ieee80211_device *ieee)
++{
++	int i;
++	memset(&ieee->current_network, 0, sizeof(struct ieee80211_network));
++	
++	ieee->state = IEEE80211_NOLINK;
++	ieee->sync_scan_hurryup = 0;
++	for(i = 0; i < 5; i++) {
++	  ieee->seq_ctrl[i] = 0;
++	}
++	
++	ieee->assoc_id = 0;
++	ieee->queue_stop = 0;
++	ieee->scanning = 0;
++	ieee->scan_watchdog = 0;//lzm add 081215 for roaming
++	ieee->softmac_features = 0; //so IEEE2100-like driver are happy
++	ieee->wap_set = 0;
++	ieee->ssid_set = 0;
++	ieee->proto_started = 0;
++	ieee->basic_rate = IEEE80211_DEFAULT_BASIC_RATE;
++	ieee->rate = 3;
++	ieee->ps = IEEE80211_PS_DISABLED;
++	ieee->sta_sleep = 0;
++//by amy
++	ieee->bInactivePs = false;
++	ieee->actscanning = false;
++	ieee->ListenInterval = 2;
++	ieee->NumRxData = 0;
++	ieee->NumRxDataInPeriod = 0; //YJ,add,080828
++	ieee->NumRxBcnInPeriod = 0; //YJ,add,080828
++	ieee->bHwRadioOff = false;//by lizhaoming
++//by amy	
++#ifdef _RTL8187_EXT_PATCH_
++	ieee->iw_ext_mode = 999;
++#endif
++
++	init_mgmt_queue(ieee);
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
++	init_timer(&ieee->scan_timer);
++	ieee->scan_timer.data = (unsigned long)ieee;
++	ieee->scan_timer.function = ieee80211_softmac_scan_cb;
++#endif
++	ieee->tx_pending.txb = NULL;
++	
++	init_timer(&ieee->associate_timer);
++	ieee->associate_timer.data = (unsigned long)ieee;
++	ieee->associate_timer.function = ieee80211_associate_abort_cb;
++
++	init_timer(&ieee->beacon_timer);
++	ieee->beacon_timer.data = (unsigned long) ieee;
++	ieee->beacon_timer.function = ieee80211_send_beacon_cb;
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++#ifdef PF_SYNCTHREAD
++	ieee->wq = create_workqueue(DRV_NAME,0);
++#else	
++	ieee->wq = create_workqueue(DRV_NAME);
++#endif
++#endif
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)//added by lawrence,070702
++	INIT_DELAYED_WORK(&ieee->start_ibss_wq, ieee80211_start_ibss_wq);
++	INIT_WORK(&ieee->associate_complete_wq, ieee80211_associate_complete_wq);
++	INIT_WORK(&ieee->associate_procedure_wq, ieee80211_associate_procedure_wq);
++	INIT_DELAYED_WORK(&ieee->softmac_scan_wq, ieee80211_softmac_scan_wq);
++	INIT_DELAYED_WORK(&ieee->associate_retry_wq, ieee80211_associate_retry_wq);	
++	INIT_WORK(&ieee->wx_sync_scan_wq, ieee80211_wx_sync_scan_wq);
++//added by lawrence,20071118
++#ifdef _RTL8187_EXT_PATCH_
++	INIT_WORK(&ieee->ext_stop_scan_wq, ieee80211_ext_stop_scan_wq);
++	//INIT_WORK(&ieee->ext_send_beacon_wq, ieee80211_beacons_start,ieee);
++	INIT_WORK(&ieee->ext_send_beacon_wq, ext_ieee80211_send_beacon_wq);
++#endif //_RTL8187_EXT_PATCH_
++#else
++	INIT_WORK(&ieee->start_ibss_wq,(void(*)(void*)) ieee80211_start_ibss_wq,ieee);
++	INIT_WORK(&ieee->associate_retry_wq,(void(*)(void*)) ieee80211_associate_retry_wq,ieee);
++	INIT_WORK(&ieee->associate_complete_wq,(void(*)(void*)) ieee80211_associate_complete_wq,ieee);
++	INIT_WORK(&ieee->associate_procedure_wq,(void(*)(void*)) ieee80211_associate_procedure_wq,ieee);
++	INIT_WORK(&ieee->softmac_scan_wq,(void(*)(void*)) ieee80211_softmac_scan_wq,ieee);
++	INIT_WORK(&ieee->wx_sync_scan_wq,(void(*)(void*)) ieee80211_wx_sync_scan_wq,ieee);
++#ifdef _RTL8187_EXT_PATCH_
++	INIT_WORK(&ieee->ext_stop_scan_wq,(void(*)(void*)) ieee80211_ext_stop_scan_wq,ieee);
++	//INIT_WORK(&ieee->ext_send_beacon_wq,(void(*)(void*)) ieee80211_beacons_start,ieee);
++	INIT_WORK(&ieee->ext_send_beacon_wq,(void(*)(void*)) ext_ieee80211_send_beacon_wq,ieee);
++#endif
++#endif
++#else
++	tq_init(&ieee->start_ibss_wq,(void(*)(void*)) ieee80211_start_ibss_wq,ieee);
++	tq_init(&ieee->associate_retry_wq,(void(*)(void*)) ieee80211_associate_retry_wq,ieee);
++	tq_init(&ieee->associate_complete_wq,(void(*)(void*)) ieee80211_associate_complete_wq,ieee);
++	tq_init(&ieee->associate_procedure_wq,(void(*)(void*)) ieee80211_associate_procedure_wq,ieee);
++	tq_init(&ieee->softmac_scan_wq,(void(*)(void*)) ieee80211_softmac_scan_wq,ieee);
++	tq_init(&ieee->wx_sync_scan_wq,(void(*)(void*)) ieee80211_wx_sync_scan_wq,ieee);
++#ifdef _RTL8187_EXT_PATCH_
++	tq_init(&ieee->ext_stop_scan_wq,(void(*)(void*)) ieee80211_ext_stop_scan_wq,ieee);
++	//tq_init(&ieee->ext_send_beacon_wq,(void(*)(void*)) ieee80211_beacons_start,ieee);
++	tq_init(&ieee->ext_send_beacon_wq,(void(*)(void*)) ext_ieee80211_send_beacon_wq,ieee);
++#endif	
++#endif
++	sema_init(&ieee->wx_sem, 1);
++	sema_init(&ieee->scan_sem, 1);
++	sema_init(&ieee->ips_sem,1);	
++	spin_lock_init(&ieee->mgmt_tx_lock);
++	spin_lock_init(&ieee->beacon_lock);
++	spin_lock_init(&ieee->beaconflag_lock);	
++	tasklet_init(&ieee->ps_task,
++	     (void(*)(unsigned long)) ieee80211_sta_ps,
++	     (unsigned long)ieee);
++#ifdef ENABLE_DOT11D
++	ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
++#endif
++
++}
++
++void ieee80211_softmac_free(struct ieee80211_device *ieee)
++{
++	down(&ieee->wx_sem);
++	
++	del_timer_sync(&ieee->associate_timer);
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++	cancel_delayed_work(&ieee->associate_retry_wq);
++
++
++	
++#ifdef _RTL8187_EXT_PATCH_
++	//When kernel>2.6.20,crash....
++//	cancel_delayed_work(&ieee->ext_stop_scan_wq);	
++//	cancel_delayed_work(&ieee->ext_send_beacon_wq);	
++#endif
++	destroy_workqueue(ieee->wq);
++#endif
++
++#ifdef ENABLE_DOT11D
++	if(NULL != ieee->pDot11dInfo)
++		kfree(ieee->pDot11dInfo);
++#endif	
++	
++	up(&ieee->wx_sem);
++}
++
++/******************************************************** 
++ * Start of WPA code.                                   *
++ * this is stolen from the ipw2200 driver               *
++ ********************************************************/
++
++ 
++static int ieee80211_wpa_enable(struct ieee80211_device *ieee, int value)
++{
++	/* This is called when wpa_supplicant loads and closes the driver
++	 * interface. */
++	printk("%s WPA\n",value ? "enabling" : "disabling");
++	ieee->wpa_enabled = value;
++	return 0;
++}
++
++ 
++void ieee80211_wpa_assoc_frame(struct ieee80211_device *ieee, char *wpa_ie, int wpa_ie_len)
++{
++	/* make sure WPA is enabled */
++	ieee80211_wpa_enable(ieee, 1);
++
++	ieee80211_disassociate(ieee);
++}
++
++
++static int ieee80211_wpa_mlme(struct ieee80211_device *ieee, int command, int reason)
++{
++	
++	int ret = 0;
++
++	switch (command) {
++	case IEEE_MLME_STA_DEAUTH:
++		// silently ignore
++		break;
++
++	case IEEE_MLME_STA_DISASSOC:
++		ieee80211_disassociate(ieee);
++		break;
++
++	default:
++		printk("Unknown MLME request: %d\n", command);
++		ret = -EOPNOTSUPP;
++	}
++
++	return ret;
++}
++
++
++static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,
++			      struct ieee_param *param, int plen)
++{
++	u8 *buf;
++
++	if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
++	    (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
++		return -EINVAL;
++
++	if (param->u.wpa_ie.len) {
++		buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL);
++		if (buf == NULL)
++			return -ENOMEM;
++
++		memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
++		kfree(ieee->wpa_ie);
++		ieee->wpa_ie = buf;
++		ieee->wpa_ie_len = param->u.wpa_ie.len;
++	} else {
++		kfree(ieee->wpa_ie);
++		ieee->wpa_ie = NULL;
++		ieee->wpa_ie_len = 0;
++	}
++
++	ieee80211_wpa_assoc_frame(ieee, ieee->wpa_ie, ieee->wpa_ie_len);
++	return 0;
++}
++
++#define AUTH_ALG_OPEN_SYSTEM			0x1
++#define AUTH_ALG_SHARED_KEY			0x2
++
++static int ieee80211_wpa_set_auth_algs(struct ieee80211_device *ieee, int value)
++{
++	
++	struct ieee80211_security sec = {
++		.flags = SEC_AUTH_MODE,
++	};
++	int ret = 0;
++
++	if (value & AUTH_ALG_SHARED_KEY) {
++		sec.auth_mode = WLAN_AUTH_SHARED_KEY;
++		ieee->open_wep = 0;
++	} else {
++		sec.auth_mode = WLAN_AUTH_OPEN;
++		ieee->open_wep = 1;
++	}
++
++	if (ieee->set_security)
++		ieee->set_security(ieee->dev, &sec);
++	else
++		ret = -EOPNOTSUPP;
++
++	return ret;
++}
++
++static int ieee80211_wpa_set_param(struct ieee80211_device *ieee, u8 name, u32 value)
++{
++	int ret=0;
++	unsigned long flags;
++
++	switch (name) {
++	case IEEE_PARAM_WPA_ENABLED:
++		ret = ieee80211_wpa_enable(ieee, value);
++		break;
++
++	case IEEE_PARAM_TKIP_COUNTERMEASURES:
++		ieee->tkip_countermeasures=value;
++		break;
++
++	case IEEE_PARAM_DROP_UNENCRYPTED: {
++		/* HACK:
++		 *
++		 * wpa_supplicant calls set_wpa_enabled when the driver
++		 * is loaded and unloaded, regardless of if WPA is being
++		 * used.  No other calls are made which can be used to
++		 * determine if encryption will be used or not prior to
++		 * association being expected.  If encryption is not being
++		 * used, drop_unencrypted is set to false, else true -- we
++		 * can use this to determine if the CAP_PRIVACY_ON bit should
++		 * be set.
++		 */
++		struct ieee80211_security sec = {
++			.flags = SEC_ENABLED,
++			.enabled = value,
++		};
++ 		ieee->drop_unencrypted = value;
++		/* We only change SEC_LEVEL for open mode. Others
++		 * are set by ipw_wpa_set_encryption.
++		 */
++		if (!value) {
++			sec.flags |= SEC_LEVEL;
++			sec.level = SEC_LEVEL_0;
++		}
++		else {
++			sec.flags |= SEC_LEVEL;
++			sec.level = SEC_LEVEL_1;
++		}
++		if (ieee->set_security)
++			ieee->set_security(ieee->dev, &sec);
++		break;
++	}
++
++	case IEEE_PARAM_PRIVACY_INVOKED:
++		ieee->privacy_invoked=value;
++		break;
++
++	case IEEE_PARAM_AUTH_ALGS:
++		ret = ieee80211_wpa_set_auth_algs(ieee, value);
++		break;
++
++	case IEEE_PARAM_IEEE_802_1X:
++		ieee->ieee802_1x=value;
++		break;
++	case IEEE_PARAM_WPAX_SELECT:
++		// added for WPA2 mixed mode
++		//printk(KERN_WARNING "------------------------>wpax value = %x\n", value);
++		spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
++		ieee->wpax_type_set = 1;
++		ieee->wpax_type_notify = value;
++		spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
++		break;
++
++	default:
++		printk("Unknown WPA param: %d\n",name);
++		ret = -EOPNOTSUPP;
++	}
++
++	return ret;
++}
++
++/* implementation borrowed from hostap driver */
++
++static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
++				  struct ieee_param *param, int param_len)
++{
++	int ret = 0;
++	
++	struct ieee80211_crypto_ops *ops;
++	struct ieee80211_crypt_data **crypt;
++
++	struct ieee80211_security sec = {
++		.flags = 0,
++	};
++
++	param->u.crypt.err = 0;
++	param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
++
++	if (param_len !=
++	    (int) ((char *) param->u.crypt.key - (char *) param) +
++	    param->u.crypt.key_len) {
++		printk("Len mismatch %d, %d\n", param_len,
++			       param->u.crypt.key_len);
++		return -EINVAL;
++	}
++	if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
++	    param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
++	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
++		if (param->u.crypt.idx >= WEP_KEYS)
++			return -EINVAL;
++#ifdef _RTL8187_EXT_PATCH_
++                crypt = &ieee->cryptlist[0]->crypt[param->u.crypt.idx];
++#else
++		crypt = &ieee->crypt[param->u.crypt.idx];
++#endif
++
++	} else {
++		return -EINVAL;
++	}
++
++	if (strcmp(param->u.crypt.alg, "none") == 0) {
++		if (crypt) {
++			sec.enabled = 0;
++			// FIXME FIXME
++			//sec.encrypt = 0;
++			sec.level = SEC_LEVEL_0;
++			sec.flags |= SEC_ENABLED | SEC_LEVEL;
++			ieee80211_crypt_delayed_deinit(ieee, crypt);
++		}
++		goto done;
++	}
++	sec.enabled = 1;
++// FIXME FIXME
++//	sec.encrypt = 1;
++	sec.flags |= SEC_ENABLED;
++
++	/* IPW HW cannot build TKIP MIC, host decryption still needed. */
++	if (!(ieee->host_encrypt || ieee->host_decrypt) &&
++	    strcmp(param->u.crypt.alg, "TKIP"))
++		goto skip_host_crypt;
++
++	ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
++	if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) {
++		request_module("ieee80211_crypt_wep");
++		ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
++	} else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) {
++		request_module("ieee80211_crypt_tkip");
++		ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
++	} else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) {
++		request_module("ieee80211_crypt_ccmp");
++		ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
++	}
++	if (ops == NULL) {
++		printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
++		param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
++		ret = -EINVAL;
++		goto done;
++	}
++
++#ifdef _RTL8187_EXT_PATCH_
++	u8 i;
++	for (i=0; i<MAX_MP; i++){
++	crypt = &ieee->cryptlist[i]->crypt[param->u.crypt.idx];
++//	if (crypt != NULL) printk("crypt not null\n", crypt);
++
++		*crypt = ieee->cryptlist[i]->crypt[param->u.crypt.idx];
++#endif
++	if (*crypt == NULL || (*crypt)->ops != ops) {
++		struct ieee80211_crypt_data *new_crypt;
++
++		ieee80211_crypt_delayed_deinit(ieee, crypt);
++
++		new_crypt = (struct ieee80211_crypt_data *)
++			kmalloc(sizeof(*new_crypt), GFP_KERNEL);
++		if (new_crypt == NULL) {
++			ret = -ENOMEM;
++			goto done;
++		}
++		memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
++		new_crypt->ops = ops;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
++		if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
++#else
++		if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
++#endif			
++			new_crypt->priv =
++				new_crypt->ops->init(param->u.crypt.idx);
++
++		if (new_crypt->priv == NULL) {
++			kfree(new_crypt);
++			param->u.crypt.err = IEEE_CRYPT_ERR_CRYPT_INIT_FAILED;
++			ret = -EINVAL;
++			goto done;
++		}
++
++		*crypt = new_crypt;
++	}
++
++	if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
++	    (*crypt)->ops->set_key(param->u.crypt.key,
++				   param->u.crypt.key_len, param->u.crypt.seq,
++				   (*crypt)->priv) < 0) {
++		printk("key setting failed\n");
++		param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
++		ret = -EINVAL;
++		goto done;
++	}
++#ifdef _RTL8187_EXT_PATCH_
++	}
++#endif
++ skip_host_crypt:
++	if (param->u.crypt.set_tx) {
++		ieee->tx_keyidx = param->u.crypt.idx;
++		sec.active_key = param->u.crypt.idx;
++		sec.flags |= SEC_ACTIVE_KEY;
++	} else
++		sec.flags &= ~SEC_ACTIVE_KEY;
++
++	if (param->u.crypt.alg != NULL) {
++		memcpy(sec.keys[param->u.crypt.idx],
++		       param->u.crypt.key,
++		       param->u.crypt.key_len);
++		sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
++		sec.flags |= (1 << param->u.crypt.idx);
++
++		if (strcmp(param->u.crypt.alg, "WEP") == 0) {
++			sec.flags |= SEC_LEVEL;
++			sec.level = SEC_LEVEL_1;
++		} else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
++			sec.flags |= SEC_LEVEL;
++			sec.level = SEC_LEVEL_2;
++		} else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
++			sec.flags |= SEC_LEVEL;
++			sec.level = SEC_LEVEL_3;
++		}
++	}
++ done:
++	if (ieee->set_security)
++		ieee->set_security(ieee->dev, &sec);
++#if 1
++#ifdef _RTL8187_EXT_PATCH_
++	if (ret != 0)//error out
++	{
++		for (i=0; i<MAX_MP; i++)
++		{
++			if (ieee->cryptlist[i]->crypt[param->u.crypt.idx]==NULL){
++				break;
++			}
++			else{
++				//if (ieee->cryptlist[i]->crypt[param->u.crypt.idx] != NULL)
++			//	{
++					kfree(ieee->cryptlist[i]->crypt[param->u.crypt.idx]);
++					ieee->cryptlist[i]->crypt[param->u.crypt.idx] = NULL;
++			//	}
++			//	kfree(ieee->cryptlist[i]);
++			//	ieee->cryptlist[i] = NULL;
++			}
++		}
++	}
++#endif
++#endif
++	/* Do not reset port if card is in Managed mode since resetting will
++	 * generate new IEEE 802.11 authentication which may end up in looping
++	 * with IEEE 802.1X.  If your hardware requires a reset after WEP
++	 * configuration (for example... Prism2), implement the reset_port in
++	 * the callbacks structures used to initialize the 802.11 stack. */
++	if (ieee->reset_on_keychange &&
++	    ieee->iw_mode != IW_MODE_INFRA &&
++	    ieee->reset_port &&
++	    ieee->reset_port(ieee->dev)) {
++		printk("reset_port failed\n");
++		param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
++		return -EINVAL;
++	}
++
++	return ret;
++}
++
++int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p)
++{
++	struct ieee_param *param;
++	int ret=0;
++
++	down(&ieee->wx_sem);
++	//IEEE_DEBUG_INFO("wpa_supplicant: len=%d\n", p->length);
++
++	if (p->length < sizeof(struct ieee_param) || !p->pointer){
++		ret = -EINVAL;
++		goto out;
++	}
++	
++	param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
++	if (param == NULL){
++		ret = -ENOMEM;
++		goto out;
++	}
++	if (copy_from_user(param, p->pointer, p->length)) {
++		kfree(param);
++		ret = -EFAULT;
++		goto out;
++	}
++
++	switch (param->cmd) {
++
++	case IEEE_CMD_SET_WPA_PARAM:
++		ret = ieee80211_wpa_set_param(ieee, param->u.wpa_param.name,
++					param->u.wpa_param.value);
++		break;
++
++	case IEEE_CMD_SET_WPA_IE:
++		ret = ieee80211_wpa_set_wpa_ie(ieee, param, p->length);
++		break;
++
++	case IEEE_CMD_SET_ENCRYPTION:
++		ret = ieee80211_wpa_set_encryption(ieee, param, p->length);
++		break;
++
++	case IEEE_CMD_MLME:
++		ret = ieee80211_wpa_mlme(ieee, param->u.mlme.command,
++				   param->u.mlme.reason_code);
++		break;
++
++	default:
++		printk("Unknown WPA supplicant request: %d\n",param->cmd);
++		ret = -EOPNOTSUPP;
++		break;
++	}
++
++	if (ret == 0 && copy_to_user(p->pointer, param, p->length))
++		ret = -EFAULT;
++
++	kfree(param);
++out:
++	up(&ieee->wx_sem);
++	
++	return ret;
++}
++
++void notify_wx_assoc_event(struct ieee80211_device *ieee)
++{
++	union iwreq_data wrqu;
++	wrqu.ap_addr.sa_family = ARPHRD_ETHER;
++	if (ieee->state == IEEE80211_LINKED)
++		memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
++	else
++		memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
++	wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(ieee80211_get_beacon);
++EXPORT_SYMBOL(ieee80211_wake_queue);
++EXPORT_SYMBOL(ieee80211_stop_queue);
++EXPORT_SYMBOL(ieee80211_reset_queue);
++EXPORT_SYMBOL(ieee80211_softmac_stop_protocol);
++EXPORT_SYMBOL(ieee80211_softmac_start_protocol);
++EXPORT_SYMBOL(ieee80211_is_shortslot);
++EXPORT_SYMBOL(ieee80211_is_54g);
++EXPORT_SYMBOL(ieee80211_wpa_supplicant_ioctl);
++EXPORT_SYMBOL(ieee80211_ps_tx_ack);
++EXPORT_SYMBOL(notify_wx_assoc_event);
++EXPORT_SYMBOL(ieee80211_stop_send_beacons);
++EXPORT_SYMBOL(ieee80211_start_send_beacons);
++EXPORT_SYMBOL(ieee80211_start_scan_syncro);
++EXPORT_SYMBOL(ieee80211_start_protocol);
++EXPORT_SYMBOL(ieee80211_stop_protocol);
++EXPORT_SYMBOL(ieee80211_start_scan);
++EXPORT_SYMBOL(ieee80211_stop_scan);
++#ifdef _RTL8187_EXT_PATCH_
++EXPORT_SYMBOL(ieee80211_ext_issue_assoc_req);
++EXPORT_SYMBOL(ieee80211_ext_issue_disassoc);
++EXPORT_SYMBOL(ieee80211_ext_issue_assoc_rsp); 
++EXPORT_SYMBOL(softmac_mgmt_xmit);
++EXPORT_SYMBOL(ieee80211_ext_probe_resp_by_net);
++EXPORT_SYMBOL(ieee80211_stop_scan);
++EXPORT_SYMBOL(ieee80211_ext_send_11s_beacon);
++EXPORT_SYMBOL(ieee80211_rx_auth_rq);
++EXPORT_SYMBOL(ieee80211_associate_step1);
++#endif // _RTL8187_EXT_PATCH_
++#else
++EXPORT_SYMBOL_NOVERS(ieee80211_get_beacon);
++EXPORT_SYMBOL_NOVERS(ieee80211_wake_queue);
++EXPORT_SYMBOL_NOVERS(ieee80211_stop_queue);
++EXPORT_SYMBOL_NOVERS(ieee80211_reset_queue);
++EXPORT_SYMBOL_NOVERS(ieee80211_softmac_stop_protocol);
++EXPORT_SYMBOL_NOVERS(ieee80211_softmac_start_protocol);
++EXPORT_SYMBOL_NOVERS(ieee80211_is_shortslot);
++EXPORT_SYMBOL_NOVERS(ieee80211_is_54g);
++EXPORT_SYMBOL_NOVERS(ieee80211_wpa_supplicant_ioctl);
++EXPORT_SYMBOL_NOVERS(ieee80211_ps_tx_ack);
++EXPORT_SYMBOL_NOVERS(ieee80211_start_scan);
++EXPORT_SYMBOL_NOVERS(ieee80211_stop_scan);
++#ifdef _RTL8187_EXT_PATCH_
++EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_assoc_req);
++EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_disassoc);
++EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_assoc_rsp); 
++EXPORT_SYMBOL_NOVERS(softmac_mgmt_xmit);
++EXPORT_SYMBOL_NOVERS(ieee80211_ext_probe_resp_by_net);
++EXPORT_SYMBOL_NOVERS(ieee80211_stop_scan);
++EXPORT_SYMBOL_NOVERS(ieee80211_ext_send_11s_beacon);
++EXPORT_SYMBOL_NOVERS(ieee80211_rx_auth_rq);
++EXPORT_SYMBOL(ieee80211_associate_step1);
++#endif // _RTL8187_EXT_PATCH_
++  
++#endif
++//EXPORT_SYMBOL(ieee80211_sta_ps_send_null_frame);
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_softmac_wx.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_softmac_wx.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,629 @@
++/* IEEE 802.11 SoftMAC layer
++ * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
++ *
++ * Mostly extracted from the rtl8180-sa2400 driver for the 
++ * in-kernel generic ieee802.11 stack.
++ *
++ * Some pieces of code might be stolen from ipw2100 driver
++ * copyright of who own it's copyright ;-)
++ *
++ * PS wx handler mostly stolen from hostap, copyright who
++ * own it's copyright ;-)
++ *
++ * released under the GPL
++ */
++
++
++#include "ieee80211.h"
++#ifdef ENABLE_DOT11D
++#include "dot11d.h"
++#endif
++
++/* FIXME: add A freqs */
++
++const long ieee80211_wlan_frequencies[] = {  
++	2412, 2417, 2422, 2427, 
++	2432, 2437, 2442, 2447, 
++	2452, 2457, 2462, 2467, 
++	2472, 2484  
++};
++
++
++int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	int ret;
++	struct iw_freq *fwrq = & wrqu->freq;
++
++	down(&ieee->wx_sem);
++	
++	if(ieee->iw_mode == IW_MODE_INFRA){ 
++		ret = -EOPNOTSUPP;
++		goto out;
++	}
++
++	/* if setting by freq convert to channel */
++	if (fwrq->e == 1) {
++		if ((fwrq->m >= (int) 2.412e8 &&
++		     fwrq->m <= (int) 2.487e8)) {
++			int f = fwrq->m / 100000;
++			int c = 0;
++			
++			while ((c < 14) && (f != ieee80211_wlan_frequencies[c]))
++				c++;
++			
++			/* hack to fall through */
++			fwrq->e = 0;
++			fwrq->m = c + 1;
++		}
++	}
++	
++	if (fwrq->e > 0 || fwrq->m > 14 || fwrq->m < 1 ){ 
++		ret = -EOPNOTSUPP;
++		goto out;
++	
++	}else { /* Set the channel */
++	
++#ifdef ENABLE_DOT11D	
++		if(!IsLegalChannel(ieee, fwrq->m) )
++		{
++			printk("channel(%d). is invalide\n",  fwrq->m);
++			ret = -EOPNOTSUPP;
++			goto out;
++		}
++		else
++		{
++			if(ieee->iw_mode == IW_MODE_ADHOC) 
++			{ 
++				if(ieee->MinPassiveChnlNum != MAX_CHANNEL_NUMBER+1)
++					{ 
++					if(fwrq->m >= ieee->MinPassiveChnlNum)
++						{
++						ret = -EOPNOTSUPP;
++						goto out;
++						}
++					}
++			}
++		}
++#endif		
++		ieee->current_network.channel = fwrq->m;
++		ieee->set_chan(ieee->dev, ieee->current_network.channel);
++		
++		if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
++			if(ieee->state == IEEE80211_LINKED){
++			
++			ieee80211_stop_send_beacons(ieee);
++			ieee80211_start_send_beacons(ieee);
++			}
++	}
++
++	ret = 0;
++out:
++	up(&ieee->wx_sem);
++	return ret;
++}
++
++
++int ieee80211_wx_get_freq(struct ieee80211_device *ieee,
++			     struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	struct iw_freq *fwrq = & wrqu->freq;
++
++	if (ieee->current_network.channel == 0)
++		return -1;
++	
++	fwrq->m = ieee->current_network.channel;
++	fwrq->e = 0;
++	
++	return 0;
++}
++
++int ieee80211_wx_get_wap(struct ieee80211_device *ieee, 
++			    struct iw_request_info *info, 
++			    union iwreq_data *wrqu, char *extra)
++{
++	unsigned long flags;	
++	
++	wrqu->ap_addr.sa_family = ARPHRD_ETHER;
++	
++	if (ieee->iw_mode == IW_MODE_MONITOR)
++		return -1;
++	
++	/* We want avoid to give to the user inconsistent infos*/
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	if (ieee->state != IEEE80211_LINKED && 
++		ieee->state != IEEE80211_LINKED_SCANNING &&
++		ieee->wap_set == 0)
++		
++		memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
++	else
++		memcpy(wrqu->ap_addr.sa_data, 
++		       ieee->current_network.bssid, ETH_ALEN);
++	
++	spin_unlock_irqrestore(&ieee->lock, flags);
++	
++	return 0;
++}
++
++
++int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
++			 struct iw_request_info *info,
++			 union iwreq_data *awrq,
++			 char *extra)
++{
++	
++	int ret = 0;
++	u8 zero[] = {0,0,0,0,0,0};
++	unsigned long flags;
++	
++	short ifup = ieee->proto_started;//dev->flags & IFF_UP;
++	struct sockaddr *temp = (struct sockaddr *)awrq;
++
++	ieee->sync_scan_hurryup = 1;
++
++	down(&ieee->wx_sem);
++	/* use ifconfig hw ether */
++	if (ieee->iw_mode == IW_MODE_MASTER){
++		ret = -1;
++		goto out;
++	}
++	
++	if (temp->sa_family != ARPHRD_ETHER){
++		ret = -EINVAL;
++		goto out;
++	}
++	
++	if (ifup)
++		ieee80211_stop_protocol(ieee);
++	
++	/* just to avoid to give inconsistent infos in the
++	 * get wx method. not really needed otherwise 
++	 */
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN); 
++	ieee->wap_set = memcmp(temp->sa_data, zero,ETH_ALEN)!=0;
++	
++	spin_unlock_irqrestore(&ieee->lock, flags);
++	
++	if (ifup)
++		ieee80211_start_protocol(ieee);
++	
++out:
++	up(&ieee->wx_sem);
++	return ret;
++}
++	
++ int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b)
++{
++	int len,ret = 0;
++	unsigned long flags;
++	
++	if (ieee->iw_mode == IW_MODE_MONITOR)
++		return -1;
++	
++	/* We want avoid to give to the user inconsistent infos*/	
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	if (ieee->current_network.ssid[0] == '\0' ||
++		ieee->current_network.ssid_len == 0){ 
++		ret = -1;
++		goto out;
++	}
++	
++	if (ieee->state != IEEE80211_LINKED && 
++		ieee->state != IEEE80211_LINKED_SCANNING &&
++		ieee->ssid_set == 0){
++		ret = -1;
++		goto out;
++	}
++	len = ieee->current_network.ssid_len;
++	wrqu->essid.length = len;
++	strncpy(b,ieee->current_network.ssid,len);
++	wrqu->essid.flags = 1;
++
++out:
++	spin_unlock_irqrestore(&ieee->lock, flags);
++	
++	return ret;
++	
++}
++
++int ieee80211_wx_set_rate(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info,
++			     union iwreq_data *wrqu, char *extra)
++{
++
++	u32 target_rate = wrqu->bitrate.value;
++	
++	ieee->rate = target_rate/100000;
++	//FIXME: we might want to limit rate also in management protocols.
++	return 0; 
++}
++
++
++
++int ieee80211_wx_get_rate(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra)
++{
++	
++	wrqu->bitrate.value = ieee->rate * 100000;
++	
++	return 0;
++}
++
++int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	
++	ieee->sync_scan_hurryup = 1;
++	
++	down(&ieee->wx_sem);
++	//printk("=======>%s\n", __func__);
++	
++	if (wrqu->mode == ieee->iw_mode)
++		goto out;
++	
++	if (wrqu->mode == IW_MODE_MONITOR){
++	
++		ieee->dev->type = ARPHRD_IEEE80211;
++	}else{
++		ieee->dev->type = ARPHRD_ETHER;
++	}
++
++	if (!ieee->proto_started){
++		ieee->iw_mode = wrqu->mode;
++	}else{
++		ieee80211_stop_protocol(ieee);
++		ieee->iw_mode = wrqu->mode;
++		ieee80211_start_protocol(ieee);
++	}
++
++out:
++	up(&ieee->wx_sem);
++	return 0;
++}
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++void ieee80211_wx_sync_scan_wq(struct work_struct *work)
++{
++	struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wx_sync_scan_wq);
++#else
++void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee)
++{
++#endif
++	short chan;
++
++	chan = ieee->current_network.channel;
++	
++	netif_carrier_off(ieee->dev);
++	
++	if (ieee->data_hard_stop)
++		ieee->data_hard_stop(ieee->dev);
++	
++	ieee80211_stop_send_beacons(ieee);
++		
++	ieee->state = IEEE80211_LINKED_SCANNING;
++	ieee->link_change(ieee->dev);
++	
++	ieee80211_start_scan_syncro(ieee);
++	
++	ieee->set_chan(ieee->dev, chan);
++	
++	ieee->state = IEEE80211_LINKED;
++	ieee->link_change(ieee->dev);
++	
++	if (ieee->data_hard_resume)
++		ieee->data_hard_resume(ieee->dev);
++	
++	if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
++		ieee80211_start_send_beacons(ieee);
++	
++	netif_carrier_on(ieee->dev);
++	
++	up(&ieee->wx_sem);
++	
++}
++
++int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	int ret = 0;
++	
++	down(&ieee->wx_sem);
++	
++	if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)){ 
++		ret = -1;
++		goto out;
++	}
++	
++	if ( ieee->state == IEEE80211_LINKED){
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++		queue_work(ieee->wq, &ieee->wx_sync_scan_wq);
++#else
++		schedule_task(&ieee->wx_sync_scan_wq);
++#endif
++		/* intentionally forget to up sem */
++		return 0;
++	}
++		
++out:
++	up(&ieee->wx_sem);
++	return ret;
++}
++
++int ieee80211_wx_set_essid(struct ieee80211_device *ieee, 
++			      struct iw_request_info *a,
++			      union iwreq_data *wrqu, char *extra)
++{
++	
++	int ret=0,len;
++	short proto_started;
++	unsigned long flags;
++	
++	ieee->sync_scan_hurryup = 1;
++	
++	down(&ieee->wx_sem);
++	
++	//printk("=======>%s\n", __func__);
++	proto_started = ieee->proto_started;
++	
++	if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
++		ret= -E2BIG;
++		goto out;
++	}
++	
++	if (ieee->iw_mode == IW_MODE_MONITOR){
++		ret= -1;
++		goto out;
++	}
++	
++	if(proto_started){
++		ieee80211_stop_protocol(ieee);
++	}
++
++	/* this is just to be sure that the GET wx callback
++	 * has consisten infos. not needed otherwise
++	 */
++	spin_lock_irqsave(&ieee->lock, flags);
++	
++	if (wrqu->essid.flags && wrqu->essid.length) {
++		len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE;
++#if LINUX_VERSION_CODE <  KERNEL_VERSION(2,6,20)		
++		strncpy(ieee->current_network.ssid, extra, len);
++		ieee->current_network.ssid_len = len;
++#else
++		strncpy(ieee->current_network.ssid, extra, len+1);
++		ieee->current_network.ssid_len = len+1;
++#endif
++		ieee->ssid_set = 1;
++		//YJ,add,080819,for hidden ap
++		if(len == 0){
++			memset(ieee->current_network.bssid, 0, ETH_ALEN);
++			ieee->current_network.capability = 0;
++		}
++		//YJ,add,080819,for hidden ap,end
++	}
++	else{ 
++		ieee->ssid_set = 0;
++		ieee->current_network.ssid[0] = '\0';
++		ieee->current_network.ssid_len = 0;
++	}
++	
++	spin_unlock_irqrestore(&ieee->lock, flags);
++	
++	if (proto_started){
++		ieee80211_start_protocol(ieee);
++	}
++out:
++	up(&ieee->wx_sem);
++	return ret;
++}
++
++ int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++
++	wrqu->mode = ieee->iw_mode;
++	return 0;
++}
++
++ int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	
++	int *parms = (int *)extra;
++	int enable = (parms[0] > 0);
++	short prev = ieee->raw_tx;
++
++	down(&ieee->wx_sem);
++	
++	if(enable) 
++		ieee->raw_tx = 1;
++	else 
++		ieee->raw_tx = 0;
++
++	printk(KERN_INFO"raw TX is %s\n", 
++	      ieee->raw_tx ? "enabled" : "disabled");
++
++	if(ieee->iw_mode == IW_MODE_MONITOR)
++	{
++		if(prev == 0 && ieee->raw_tx){
++			if (ieee->data_hard_resume)
++				ieee->data_hard_resume(ieee->dev);
++	
++			netif_carrier_on(ieee->dev);	
++		}
++		
++		if(prev && ieee->raw_tx == 1)
++			netif_carrier_off(ieee->dev); 
++	}
++	
++	up(&ieee->wx_sem);
++	
++	return 0;
++}
++ 
++int ieee80211_wx_get_name(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra)
++{
++	strcpy(wrqu->name, "802.11");
++	if(ieee->modulation & IEEE80211_CCK_MODULATION){
++		strcat(wrqu->name, "b");
++		if(ieee->modulation & IEEE80211_OFDM_MODULATION)
++			strcat(wrqu->name, "/g");
++	}else if(ieee->modulation & IEEE80211_OFDM_MODULATION)
++		strcat(wrqu->name, "g");
++	
++	if((ieee->state == IEEE80211_LINKED) || 
++		(ieee->state == IEEE80211_LINKED_SCANNING))
++		strcat(wrqu->name," linked");
++	else if(ieee->state != IEEE80211_NOLINK)
++		strcat(wrqu->name," link..");
++	
++	
++	return 0;
++}
++
++
++/* this is mostly stolen from hostap */
++int ieee80211_wx_set_power(struct ieee80211_device *ieee,
++				 struct iw_request_info *info,
++				 union iwreq_data *wrqu, char *extra)
++{
++	int ret = 0;
++
++	if(
++		(!ieee->sta_wake_up) ||
++		(!ieee->ps_request_tx_ack) ||
++		(!ieee->enter_sleep_state) ||
++		(!ieee->ps_is_queue_empty)){
++		
++		printk("ERROR. PS mode is tryied to be use but\
++driver missed a callback\n\n");	
++	
++		return -1;
++	}
++	
++	down(&ieee->wx_sem);
++	
++	if (wrqu->power.disabled){
++		ieee->ps = IEEE80211_PS_DISABLED;
++		
++		goto exit;
++	}
++	switch (wrqu->power.flags & IW_POWER_MODE) {
++	case IW_POWER_UNICAST_R:
++		ieee->ps = IEEE80211_PS_UNICAST;
++		
++		break;
++	case IW_POWER_ALL_R:
++		ieee->ps = IEEE80211_PS_UNICAST | IEEE80211_PS_MBCAST;	
++		break;
++		
++	case IW_POWER_ON:
++		ieee->ps = IEEE80211_PS_DISABLED;
++		break;
++		
++	default:
++		ret = -EINVAL;
++		goto exit;
++	}
++
++	if (wrqu->power.flags & IW_POWER_TIMEOUT) {
++				      
++		ieee->ps_timeout = wrqu->power.value / 1000;
++		printk("Timeout %d\n",ieee->ps_timeout);
++	}
++	
++	if (wrqu->power.flags & IW_POWER_PERIOD) {
++		
++		ret = -EOPNOTSUPP;
++		goto exit;
++		//wrq->value / 1024;
++		
++	}
++exit:
++	up(&ieee->wx_sem);
++	return ret;
++
++}
++
++/* this is stolen from hostap */
++int ieee80211_wx_get_power(struct ieee80211_device *ieee,
++				 struct iw_request_info *info,
++				 union iwreq_data *wrqu, char *extra)
++{
++	int ret =0;
++	
++	down(&ieee->wx_sem);
++	
++	if(ieee->ps == IEEE80211_PS_DISABLED){	
++		wrqu->power.disabled = 1;
++		goto exit;
++	}
++
++	wrqu->power.disabled = 0;
++
++//	if ((wrqu->power.flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
++		wrqu->power.flags = IW_POWER_TIMEOUT;
++		wrqu->power.value = ieee->ps_timeout * 1000;
++//	} else {
++//		ret = -EOPNOTSUPP;
++//		goto exit;
++		//wrqu->power.flags = IW_POWER_PERIOD;
++		//wrqu->power.value = ieee->current_network.dtim_period *
++		//	ieee->current_network.beacon_interval * 1024;
++//	}
++
++
++	if (ieee->ps & IEEE80211_PS_MBCAST)
++		wrqu->power.flags |= IW_POWER_ALL_R;
++	else
++		wrqu->power.flags |= IW_POWER_UNICAST_R;
++
++exit:
++	up(&ieee->wx_sem);
++	return ret;
++
++}
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(ieee80211_wx_get_essid);
++EXPORT_SYMBOL(ieee80211_wx_set_essid);
++EXPORT_SYMBOL(ieee80211_wx_set_rate);
++EXPORT_SYMBOL(ieee80211_wx_get_rate);
++EXPORT_SYMBOL(ieee80211_wx_set_wap);
++EXPORT_SYMBOL(ieee80211_wx_get_wap);
++EXPORT_SYMBOL(ieee80211_wx_set_mode);
++EXPORT_SYMBOL(ieee80211_wx_get_mode);
++EXPORT_SYMBOL(ieee80211_wx_set_scan);
++EXPORT_SYMBOL(ieee80211_wx_get_freq);
++EXPORT_SYMBOL(ieee80211_wx_set_freq);
++EXPORT_SYMBOL(ieee80211_wx_set_rawtx);
++EXPORT_SYMBOL(ieee80211_wx_get_name);
++EXPORT_SYMBOL(ieee80211_wx_set_power);
++EXPORT_SYMBOL(ieee80211_wx_get_power);
++EXPORT_SYMBOL(ieee80211_wlan_frequencies);
++#else
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_essid);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_essid);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rate);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_rate);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_wap);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_wap);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_mode);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_mode);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_scan);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_freq);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_freq);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rawtx);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_name);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_power);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_power);
++EXPORT_SYMBOL_NOVERS(ieee80211_wlan_frequencies);
++#endif
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_tx.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_tx.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,876 @@
++/******************************************************************************
++
++  Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
++
++  This program is free software; you can redistribute it and/or modify it
++  under the terms of version 2 of the GNU General Public License as
++  published by the Free Software Foundation.
++
++  This program is distributed in the hope that it will be useful, but WITHOUT
++  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
++  more details.
++
++  You should have received a copy of the GNU General Public License along with
++  this program; if not, write to the Free Software Foundation, Inc., 59
++  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
++
++  The full GNU General Public License is included in this distribution in the
++  file called LICENSE.
++
++  Contact Information:
++  James P. Ketrenos <ipw2100-admin@linux.intel.com>
++  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
++
++******************************************************************************
++
++  Few modifications for Realtek's Wi-Fi drivers by 
++  Andrea Merello <andreamrl@tiscali.it>
++  
++  A special thanks goes to Realtek for their support ! 
++
++******************************************************************************/
++
++#include <linux/compiler.h>
++//#include <linux/config.h>
++#include <linux/errno.h>
++#include <linux/if_arp.h>
++#include <linux/in6.h>
++#include <linux/in.h>
++#include <linux/ip.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/netdevice.h>
++#include <linux/pci.h>
++#include <linux/proc_fs.h>
++#include <linux/skbuff.h>
++#include <linux/slab.h>
++#include <linux/tcp.h>
++#include <linux/types.h>
++#include <linux/version.h>
++#include <linux/wireless.h>
++#include <linux/etherdevice.h>
++#include <asm/uaccess.h>
++#include <linux/if_vlan.h>
++
++#include "ieee80211.h"
++
++
++/*
++
++
++802.11 Data Frame
++
++
++802.11 frame_contorl for data frames - 2 bytes
++     ,-----------------------------------------------------------------------------------------.
++bits | 0  |  1  |  2  |  3  |  4  |  5  |  6  |  7  |  8  |  9  |  a  |  b  |  c  |  d  |  e   |
++     |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
++val  | 0  |  0  |  0  |  1  |  x  |  0  |  0  |  0  |  1  |  0  |  x  |  x  |  x  |  x  |  x   |
++     |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
++desc | ^-ver-^  |  ^type-^  |  ^-----subtype-----^  | to  |from |more |retry| pwr |more |wep   |
++     |          |           | x=0 data,x=1 data+ack | DS  | DS  |frag |     | mgm |data |      |
++     '-----------------------------------------------------------------------------------------'
++		                                    /\
++                                                    |
++802.11 Data Frame                                   |
++           ,--------- 'ctrl' expands to >-----------'
++          |
++      ,--'---,-------------------------------------------------------------.
++Bytes |  2   |  2   |    6    |    6    |    6    |  2   | 0..2312 |   4  |
++      |------|------|---------|---------|---------|------|---------|------|
++Desc. | ctrl | dura |  DA/RA  |   TA    |    SA   | Sequ |  Frame  |  fcs |
++      |      | tion | (BSSID) |         |         | ence |  data   |      |
++      `--------------------------------------------------|         |------'
++Total: 28 non-data bytes                                 `----.----'
++                                                              |
++       .- 'Frame data' expands to <---------------------------'
++       |
++       V
++      ,---------------------------------------------------.
++Bytes |  1   |  1   |    1    |    3     |  2   |  0-2304 |
++      |------|------|---------|----------|------|---------|
++Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP      |
++      | DSAP | SSAP |         |          |      | Packet  |
++      | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8|      |         |
++      `-----------------------------------------|         |
++Total: 8 non-data bytes                         `----.----'
++                                                     |
++       .- 'IP Packet' expands, if WEP enabled, to <--'
++       |
++       V
++      ,-----------------------.
++Bytes |  4  |   0-2296  |  4  |
++      |-----|-----------|-----|
++Desc. | IV  | Encrypted | ICV |
++      |     | IP Packet |     |
++      `-----------------------'
++Total: 8 non-data bytes
++
++
++802.3 Ethernet Data Frame
++
++      ,-----------------------------------------.
++Bytes |   6   |   6   |  2   |  Variable |   4  |
++      |-------|-------|------|-----------|------|
++Desc. | Dest. | Source| Type | IP Packet |  fcs |
++      |  MAC  |  MAC  |      |           |      |
++      `-----------------------------------------'
++Total: 18 non-data bytes
++
++In the event that fragmentation is required, the incoming payload is split into
++N parts of size ieee->fts.  The first fragment contains the SNAP header and the
++remaining packets are just data.
++
++If encryption is enabled, each fragment payload size is reduced by enough space
++to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
++So if you have 1500 bytes of payload with ieee->fts set to 500 without
++encryption it will take 3 frames.  With WEP it will take 4 frames as the
++payload of each frame is reduced to 492 bytes.
++
++* SKB visualization
++*
++*  ,- skb->data
++* |
++* |    ETHERNET HEADER        ,-<-- PAYLOAD
++* |                           |     14 bytes from skb->data
++* |  2 bytes for Type --> ,T. |     (sizeof ethhdr)
++* |                       | | |
++* |,-Dest.--. ,--Src.---. | | |
++* |  6 bytes| | 6 bytes | | | |
++* v         | |         | | | |
++* 0         | v       1 | v | v           2
++* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
++*     ^     | ^         | ^ |
++*     |     | |         | | |
++*     |     | |         | `T' <---- 2 bytes for Type
++*     |     | |         |
++*     |     | '---SNAP--' <-------- 6 bytes for SNAP
++*     |     |
++*     `-IV--' <-------------------- 4 bytes for IV (WEP)
++*
++*      SNAP HEADER
++*
++*/
++
++static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
++static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
++
++static inline int ieee80211_put_snap(u8 *data, u16 h_proto)
++{
++	struct ieee80211_snap_hdr *snap;
++	u8 *oui;
++
++	snap = (struct ieee80211_snap_hdr *)data;
++	snap->dsap = 0xaa;
++	snap->ssap = 0xaa;
++	snap->ctrl = 0x03;
++
++	if (h_proto == 0x8137 || h_proto == 0x80f3)
++		oui = P802_1H_OUI;
++	else
++		oui = RFC1042_OUI;
++	snap->oui[0] = oui[0];
++	snap->oui[1] = oui[1];
++	snap->oui[2] = oui[2];
++
++	*(u16 *)(data + SNAP_SIZE) = htons(h_proto);
++
++	return SNAP_SIZE + sizeof(u16);
++}
++
++int ieee80211_encrypt_fragment(
++	struct ieee80211_device *ieee,
++	struct sk_buff *frag,
++	int hdr_len)
++{
++	struct ieee80211_crypt_data* crypt = NULL;//ieee->crypt[ieee->tx_keyidx];
++	int res;//, i;
++//	printk("====>wwwwww%s():ieee:%x, hdr_len:%d\n", __FUNCTION__, ieee, hdr_len);
++/*	  printk("\n%s(), hdr_len:%d\n", __FUNCTION__, hdr_len);
++                 for (i = 0; i < 48; i++) {
++                       if (i % 16 == 0) printk("\n\t");
++                        printk("%2x ", *(frag->data+i));
++                }
++*/
++
++#ifdef _RTL8187_EXT_PATCH_
++#if 0
++	i = ieee80211_find_MP(ieee, ((struct ieee80211_hdr*) frag->data)->addr1);
++	if (i== -1){
++		printk("error find MP entry in %s()\n", __FUNCTION__);
++		 return i;
++	}
++	//  printk("%s():"MAC_FMT", find in index:%d\n", __FUNCTION__, MAC_ARG(((struct ieee80211_hdr*)frag->data)->addr1), i);
++#endif
++//	crypt = ieee->cryptlist[MAX_MP-1]->crypt[ieee->tx_keyidx];
++	crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx]; 
++#else
++	crypt = ieee->crypt[ieee->tx_keyidx];
++#endif
++	/*added to care about null crypt condition, to solve that system hangs when shared keys error*/
++       	if (!crypt || !crypt->ops)
++	return -1;	
++	
++#ifdef CONFIG_IEEE80211_CRYPT_TKIP
++	struct ieee80211_hdr *header;
++
++	if (ieee->tkip_countermeasures &&
++	    crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
++		header = (struct ieee80211_hdr *) frag->data;
++		if (net_ratelimit()) {
++			printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
++			       "TX packet to " MAC_FMT "\n",
++			       ieee->dev->name, MAC_ARG(header->addr1));
++		}
++		return -1;
++	}
++#endif
++	/* To encrypt, frame format is:
++	 * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */
++
++	// PR: FIXME: Copied from hostap. Check fragmentation/MSDU/MPDU encryption.
++	/* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
++	 * call both MSDU and MPDU encryption functions from here. */
++	atomic_inc(&crypt->refcnt);
++	res = 0;
++	if (crypt->ops->encrypt_msdu)
++		res = crypt->ops->encrypt_msdu(frag, hdr_len, crypt->priv);
++	if (res == 0 && crypt->ops->encrypt_mpdu)
++        res = crypt->ops->encrypt_mpdu(frag, hdr_len, crypt->priv);
++       	atomic_dec(&crypt->refcnt);
++	if (res < 0) {
++		printk(KERN_INFO "%s: Encryption failed: len=%d.\n",
++		       ieee->dev->name, frag->len);
++		ieee->ieee_stats.tx_discards++;
++		return -1;
++	}
++
++	return 0;
++}
++
++
++void ieee80211_txb_free(struct ieee80211_txb *txb) {
++	int i;
++	if (unlikely(!txb))
++		return;
++	for (i = 0; i < txb->nr_frags; i++)
++		if (txb->fragments[i])
++			dev_kfree_skb_any(txb->fragments[i]);
++	kfree(txb);
++}
++
++struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size,
++					  int gfp_mask)
++{
++	struct ieee80211_txb *txb;
++	int i;
++	txb = kmalloc(
++		sizeof(struct ieee80211_txb) + (sizeof(u8*) * nr_frags),
++		gfp_mask);
++	if (!txb)
++		return NULL;
++
++	memset(txb, 0, sizeof(struct ieee80211_txb));
++	txb->nr_frags = nr_frags;
++	txb->frag_size = txb_size;
++
++	for (i = 0; i < nr_frags; i++) {
++		txb->fragments[i] = dev_alloc_skb(txb_size);
++		if (unlikely(!txb->fragments[i])) {
++			i--;
++			break;
++		}
++	}
++	if (unlikely(i != nr_frags)) {
++		while (i >= 0)
++			dev_kfree_skb_any(txb->fragments[i--]);
++		kfree(txb);
++		return NULL;
++	}
++	return txb;
++}
++
++// Classify the to-be send data packet
++// Need to acquire the sent queue index.
++static int 
++ieee80211_classify(struct sk_buff *skb, struct ieee80211_network *network)
++{
++  struct ether_header *eh = (struct ether_header*)skb->data;
++  unsigned int wme_UP = 0;
++
++  if(!network->QoS_Enable) {
++     skb->priority = 0;
++     return(wme_UP);
++  }
++
++  if(eh->ether_type == __constant_htons(ETHERTYPE_IP)) {
++    const struct iphdr *ih = (struct iphdr*)(skb->data + \
++		    sizeof(struct ether_header));
++    wme_UP = (ih->tos >> 5)&0x07;
++  } else if (vlan_tx_tag_present(skb)) {//vtag packet
++#ifndef VLAN_PRI_SHIFT
++#define VLAN_PRI_SHIFT  13              /* Shift to find VLAN user priority */
++#define VLAN_PRI_MASK   7               /* Mask for user priority bits in VLAN */ 	  
++#endif
++	u32 tag = vlan_tx_tag_get(skb);
++	wme_UP = (tag >> VLAN_PRI_SHIFT) & VLAN_PRI_MASK;
++  } else if(ETH_P_PAE ==  ntohs(((struct ethhdr *)skb->data)->h_proto)) {
++    //printk(KERN_WARNING "type = normal packet\n");
++    wme_UP = 7;
++  }
++  skb->priority = wme_UP;
++/* 
++  if (network->QoS_Enable) {
++    skb->priority = wme_UP;
++  }else {
++    skb->priority = 0;
++  }
++*/
++  return(wme_UP);
++}
++
++#ifdef _RTL8187_EXT_PATCH_
++// based on part of ieee80211_xmit. Mainly allocate txb. ieee->lock is held
++struct ieee80211_txb *ieee80211_ext_alloc_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt)
++{
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
++	struct ieee80211_device *ieee = netdev_priv(dev);
++#else
++	struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
++#endif
++	struct ieee80211_txb *txb = NULL;
++	struct ieee80211_hdr_3addr *frag_hdr;
++	int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
++	int ether_type;
++	int bytes, QOS_ctl;
++	struct sk_buff *skb_frag;
++	
++	ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
++	
++	/* Advance the SKB to the start of the payload */
++	skb_pull(skb, sizeof(struct ethhdr));
++	
++	/* Determine total amount of storage required for TXB packets */
++	bytes = skb->len + SNAP_SIZE + sizeof(u16);
++	
++	/* Determine fragmentation size based on destination (multicast
++	 * and broadcast are not fragmented) */
++	// if (is_multicast_ether_addr(dest) ||
++	// is_broadcast_ether_addr(dest)) {
++	if (is_multicast_ether_addr(header->addr1) ||
++			is_broadcast_ether_addr(header->addr1)) {
++		frag_size = MAX_FRAG_THRESHOLD;
++		QOS_ctl = QOS_CTL_NOTCONTAIN_ACK;
++	}
++	else {
++		//printk(KERN_WARNING "&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&frag_size = %d\n", frag_size);
++		frag_size = ieee->fts;//default:392
++		QOS_ctl = 0;
++	}
++	
++	if(isQoS) {
++		QOS_ctl |= skb->priority; //set in the ieee80211_classify 	
++		*pQOS_ctl = cpu_to_le16(QOS_ctl);
++	}
++	//printk(KERN_WARNING "header size = %d, QOS_ctl = %x\n", hdr_len,QOS_ctl);
++	/* Determine amount of payload per fragment.  Regardless of if
++	 * this stack is providing the full 802.11 header, one will
++	 * eventually be affixed to this fragment -- so we must account for
++	 * it when determining the amount of payload space. */
++	//bytes_per_frag = frag_size - (IEEE80211_3ADDR_LEN + (ieee->current_network->QoS_Enable ? 2:0));
++	bytes_per_frag = frag_size - hdr_len;
++	if (ieee->config &
++			(CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
++		bytes_per_frag -= IEEE80211_FCS_LEN;
++	
++	/* Each fragment may need to have room for encryptiong pre/postfix */
++	if (isEncrypt)
++		bytes_per_frag -= crypt->ops->extra_prefix_len +
++			crypt->ops->extra_postfix_len;
++	
++	/* Number of fragments is the total bytes_per_frag /
++	 * payload_per_fragment */
++	nr_frags = bytes / bytes_per_frag;
++	bytes_last_frag = bytes % bytes_per_frag;
++	if (bytes_last_frag)
++		nr_frags++;
++	else
++		bytes_last_frag = bytes_per_frag;
++	
++	/* When we allocate the TXB we allocate enough space for the reserve
++	 * and full fragment bytes (bytes_per_frag doesn't include prefix,
++	 * postfix, header, FCS, etc.) */
++	txb = ieee80211_alloc_txb(nr_frags, frag_size, GFP_ATOMIC);
++	if (unlikely(!txb)) {
++		printk(KERN_WARNING "%s: Could not allocate TXB\n",
++			ieee->dev->name);
++		return NULL;
++	}
++	txb->encrypted = isEncrypt;
++	txb->payload_size = bytes;
++	
++	for (i = 0; i < nr_frags; i++) {
++		skb_frag = txb->fragments[i];
++		skb_frag->priority = UP2AC(skb->priority);	
++		if (isEncrypt)
++			skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
++	
++		frag_hdr = (struct ieee80211_hdr_3addr *)skb_put(skb_frag, hdr_len);
++		memcpy(frag_hdr, (void *)header, hdr_len);
++	
++		/* If this is not the last fragment, then add the MOREFRAGS
++		 * bit to the frame control */
++		if (i != nr_frags - 1) {
++			frag_hdr->frame_ctl = cpu_to_le16(
++					header->frame_ctl | IEEE80211_FCTL_MOREFRAGS);
++			bytes = bytes_per_frag;
++		
++		} else {
++			/* The last fragment takes the remaining length */
++			bytes = bytes_last_frag;
++		}
++		
++		frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | i);
++		//frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl<<4 | i);
++		//
++			
++		/* Put a SNAP header on the first fragment */
++		if (i == 0) {
++			ieee80211_put_snap(
++				skb_put(skb_frag, SNAP_SIZE + sizeof(u16)), ether_type);
++			bytes -= SNAP_SIZE + sizeof(u16);
++		}
++	
++		memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
++	
++		/* Advance the SKB... */
++		skb_pull(skb, bytes);
++	
++		/* Encryption routine will move the header forward in order
++		 * to insert the IV between the header and the payload */
++		if (isEncrypt)
++			ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len);
++		if (ieee->config &
++				(CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
++			skb_put(skb_frag, 4);
++	}
++	// Advance sequence number in data frame. 
++	//printk(KERN_WARNING "QoS Enalbed? %s\n", ieee->current_network.QoS_Enable?"Y":"N");	
++	if (ieee->seq_ctrl[0] == 0xFFF)
++		ieee->seq_ctrl[0] = 0;
++	else
++		ieee->seq_ctrl[0]++;
++	// stanley, just for debug
++/*
++{
++	int j=0;
++	for(j=0;j<nr_frags;j++)
++	{
++			int i;
++		struct sk_buff *skb = txb->fragments[j];
++			printk("send(%d): ", j);
++			for (i=0;i<skb->len;i++)
++				printk("%02X ", skb->data[i]&0xff);
++			printk("\n");
++	}
++}
++*/
++	
++	return txb;
++}
++
++
++// based on part of ieee80211_xmit. Mainly allocate txb. ieee->lock is held
++// Assume no encryption, no FCS computing
++struct ieee80211_txb *ieee80211_ext_reuse_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt)
++{
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
++	struct ieee80211_device *ieee = netdev_priv(dev);
++#else
++	struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
++#endif
++	struct ieee80211_txb *txb = NULL;
++	struct ieee80211_hdr_3addr *frag_hdr;
++	int ether_type;
++	int bytes, QOS_ctl;
++	
++	ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
++	
++	/* Advance the SKB to the start of the payload */
++	skb_pull(skb, sizeof(struct ethhdr));
++	
++	/* Determine total amount of storage required for TXB packets */
++	bytes = skb->len + SNAP_SIZE + sizeof(u16);
++	
++	if (is_multicast_ether_addr(header->addr1) ||
++			is_broadcast_ether_addr(header->addr1)) {
++		QOS_ctl = QOS_CTL_NOTCONTAIN_ACK;
++	}
++	else {
++		QOS_ctl = 0;
++	}
++	
++	if(isQoS) {
++		QOS_ctl |= skb->priority; //set in the ieee80211_classify 	
++		*pQOS_ctl = cpu_to_le16(QOS_ctl);
++	}
++				
++	txb = kmalloc( sizeof(struct ieee80211_txb) + sizeof(u8*), GFP_ATOMIC );
++	if (unlikely(!txb)) {
++		printk(KERN_WARNING "%s: Could not allocate TXB\n",
++			ieee->dev->name);
++		return NULL;
++	}
++		
++	txb->nr_frags = 1;
++	txb->frag_size = bytes;
++	txb->encrypted = isEncrypt;
++	txb->payload_size = bytes;
++	
++	txb->fragments[0] = skb;
++	ieee80211_put_snap(
++			skb_push(skb, SNAP_SIZE + sizeof(u16)), ether_type);
++	frag_hdr = (struct ieee80211_hdr_3addr *)skb_push(skb, hdr_len);
++	memcpy(frag_hdr, (void *)header, hdr_len);
++	frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | 0);
++	skb->priority = UP2AC(skb->priority);	
++	if(isEncrypt)
++                ieee80211_encrypt_fragment(ieee,skb,hdr_len);
++
++	// Advance sequence number in data frame. 
++	//printk(KERN_WARNING "QoS Enalbed? %s\n", ieee->current_network.QoS_Enable?"Y":"N");	
++	if (ieee->seq_ctrl[0] == 0xFFF)
++		ieee->seq_ctrl[0] = 0;
++	else
++		ieee->seq_ctrl[0]++;
++	
++	return txb;
++}
++
++#endif // _RTL8187_EXT_PATCH_
++
++/* SKBs are added to the ieee->tx_queue. */
++int ieee80211_xmit(struct sk_buff *skb,
++		   struct net_device *dev)
++{
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
++	struct ieee80211_device *ieee = netdev_priv(dev);
++#else
++	struct ieee80211_device *ieee = (struct ieee80211_device *)dev->priv;
++#endif
++	struct ieee80211_txb *txb = NULL;
++	struct ieee80211_hdr_3addr_QOS *frag_hdr;
++	int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
++	unsigned long flags;
++	struct net_device_stats *stats = &ieee->stats;
++	int ether_type, encrypt;
++	int bytes, fc, QOS_ctl, hdr_len;
++	struct sk_buff *skb_frag;
++	//struct ieee80211_hdr header = { /* Ensure zero initialized */
++	//	.duration_id = 0,
++	//	.seq_ctl = 0
++	//};
++	struct ieee80211_hdr_3addr_QOS header = { /* Ensure zero initialized */
++		.duration_id = 0,
++		.seq_ctl = 0,
++		.QOS_ctl = 0
++	};
++	u8 dest[ETH_ALEN], src[ETH_ALEN];
++
++	struct ieee80211_crypt_data* crypt;
++
++	//printk(KERN_WARNING "upper layer packet!\n");
++	spin_lock_irqsave(&ieee->lock, flags);
++
++	/* If there is no driver handler to take the TXB, dont' bother
++	 * creating it... */
++	if ((!ieee->hard_start_xmit && !(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE))||
++	   ((!ieee->softmac_data_hard_start_xmit && (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) {
++		printk(KERN_WARNING "%s: No xmit handler.\n",
++		       ieee->dev->name);
++		goto success;
++	}
++	
++	ieee80211_classify(skb,&ieee->current_network);
++	if(likely(ieee->raw_tx == 0)){
++	
++		if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
++			printk(KERN_WARNING "%s: skb too small (%d).\n",
++			ieee->dev->name, skb->len);
++			goto success;
++		}
++	
++		
++#ifdef _RTL8187_EXT_PATCH_
++		// note, skb->priority which was set by ieee80211_classify, and used by physical tx
++		if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_xmit))
++		{
++			txb = ieee->ext_patch_ieee80211_xmit(skb, dev);
++			goto success;
++		}
++#endif
++
++		ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
++#ifdef _RTL8187_EXT_PATCH_
++		crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
++#else	
++		crypt = ieee->crypt[ieee->tx_keyidx];
++#endif	
++		encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
++			ieee->host_encrypt && crypt && crypt->ops;
++	
++		if (!encrypt && ieee->ieee802_1x &&
++		ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
++			stats->tx_dropped++;
++			goto success;
++		}
++	
++	#ifdef CONFIG_IEEE80211_DEBUG
++		if (crypt && !encrypt && ether_type == ETH_P_PAE) {
++			struct eapol *eap = (struct eapol *)(skb->data +
++				sizeof(struct ethhdr) - SNAP_SIZE - sizeof(u16));
++			IEEE80211_DEBUG_EAP("TX: IEEE 802.11 EAPOL frame: %s\n",
++				eap_get_type(eap->type));
++		}
++	#endif
++	
++		/* Save source and destination addresses */
++		memcpy(&dest, skb->data, ETH_ALEN);
++		memcpy(&src, skb->data+ETH_ALEN, ETH_ALEN);
++	
++		/* Advance the SKB to the start of the payload */
++		skb_pull(skb, sizeof(struct ethhdr));
++	
++		/* Determine total amount of storage required for TXB packets */
++		bytes = skb->len + SNAP_SIZE + sizeof(u16);
++	
++		if(ieee->current_network.QoS_Enable) {
++			if (encrypt)
++				fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA |
++					IEEE80211_FCTL_WEP;
++			else
++				fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA;
++
++		} else {
++			if (encrypt)
++				fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA |
++					IEEE80211_FCTL_WEP;
++			else
++				fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA;
++		}
++	
++		if (ieee->iw_mode == IW_MODE_INFRA) {
++			fc |= IEEE80211_FCTL_TODS;
++			/* To DS: Addr1 = BSSID, Addr2 = SA,
++			Addr3 = DA */
++			memcpy(&header.addr1, ieee->current_network.bssid, ETH_ALEN);
++			memcpy(&header.addr2, &src, ETH_ALEN);
++			memcpy(&header.addr3, &dest, ETH_ALEN);
++		} else if (ieee->iw_mode == IW_MODE_ADHOC) {
++			/* not From/To DS: Addr1 = DA, Addr2 = SA,
++			Addr3 = BSSID */
++			memcpy(&header.addr1, dest, ETH_ALEN);
++			memcpy(&header.addr2, src, ETH_ALEN);
++			memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
++		}
++	//	printk(KERN_WARNING "essid MAC address is "MAC_FMT, MAC_ARG(&header.addr1));
++		header.frame_ctl = cpu_to_le16(fc);
++		//hdr_len = IEEE80211_3ADDR_LEN;
++	
++		/* Determine fragmentation size based on destination (multicast
++		* and broadcast are not fragmented) */
++//		if (is_multicast_ether_addr(dest) ||
++//		is_broadcast_ether_addr(dest)) {
++		if (is_multicast_ether_addr(header.addr1) ||
++		is_broadcast_ether_addr(header.addr1)) {
++			frag_size = MAX_FRAG_THRESHOLD;
++			QOS_ctl = QOS_CTL_NOTCONTAIN_ACK;
++		}
++		else {
++			//printk(KERN_WARNING "&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&frag_size = %d\n", frag_size);
++			frag_size = ieee->fts;//default:392
++			QOS_ctl = 0;
++		}
++	
++		if (ieee->current_network.QoS_Enable)	{
++			hdr_len = IEEE80211_3ADDR_LEN + 2;
++			QOS_ctl |= skb->priority; //set in the ieee80211_classify 	
++			header.QOS_ctl = cpu_to_le16(QOS_ctl);
++		} else {
++			hdr_len = IEEE80211_3ADDR_LEN;		
++		}
++		//printk(KERN_WARNING "header size = %d, QOS_ctl = %x\n", hdr_len,QOS_ctl);
++		/* Determine amount of payload per fragment.  Regardless of if
++		* this stack is providing the full 802.11 header, one will
++		* eventually be affixed to this fragment -- so we must account for
++		* it when determining the amount of payload space. */
++		//bytes_per_frag = frag_size - (IEEE80211_3ADDR_LEN + (ieee->current_network->QoS_Enable ? 2:0));
++		bytes_per_frag = frag_size - hdr_len;
++		if (ieee->config &
++		(CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
++			bytes_per_frag -= IEEE80211_FCS_LEN;
++	
++		/* Each fragment may need to have room for encryptiong pre/postfix */
++		if (encrypt)
++			bytes_per_frag -= crypt->ops->extra_prefix_len +
++				crypt->ops->extra_postfix_len;
++	
++		/* Number of fragments is the total bytes_per_frag /
++		* payload_per_fragment */
++		nr_frags = bytes / bytes_per_frag;
++		bytes_last_frag = bytes % bytes_per_frag;
++		if (bytes_last_frag)
++			nr_frags++;
++		else
++			bytes_last_frag = bytes_per_frag;
++	
++		/* When we allocate the TXB we allocate enough space for the reserve
++		* and full fragment bytes (bytes_per_frag doesn't include prefix,
++		* postfix, header, FCS, etc.) */
++		txb = ieee80211_alloc_txb(nr_frags, frag_size, GFP_ATOMIC);
++		if (unlikely(!txb)) {
++			printk(KERN_WARNING "%s: Could not allocate TXB\n",
++			ieee->dev->name);
++			goto failed;
++		}
++		txb->encrypted = encrypt;
++		txb->payload_size = bytes;
++	
++		for (i = 0; i < nr_frags; i++) {
++			skb_frag = txb->fragments[i];
++			skb_frag->priority = UP2AC(skb->priority);	
++			if (encrypt)
++				skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
++	
++			frag_hdr = (struct ieee80211_hdr_3addr_QOS *)skb_put(skb_frag, hdr_len);
++			memcpy(frag_hdr, &header, hdr_len);
++	
++			/* If this is not the last fragment, then add the MOREFRAGS
++			* bit to the frame control */
++			if (i != nr_frags - 1) {
++				frag_hdr->frame_ctl = cpu_to_le16(
++					fc | IEEE80211_FCTL_MOREFRAGS);
++				bytes = bytes_per_frag;
++		
++			} else {
++				/* The last fragment takes the remaining length */
++				bytes = bytes_last_frag;
++			}
++			if(ieee->current_network.QoS_Enable) {	
++			  // add 1 only indicate to corresponding seq number control 2006/7/12
++			  frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[UP2AC(skb->priority)+1]<<4 | i);
++			  //printk(KERN_WARNING "skb->priority = %d,", skb->priority);
++			  //printk(KERN_WARNING "type:%d: seq = %d\n",UP2AC(skb->priority),ieee->seq_ctrl[UP2AC(skb->priority)+1]);
++			} else {
++			  frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | i);
++			}
++			//frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl<<4 | i);
++			//
++			
++			/* Put a SNAP header on the first fragment */
++			if (i == 0) {
++				ieee80211_put_snap(
++					skb_put(skb_frag, SNAP_SIZE + sizeof(u16)),
++					ether_type);
++				bytes -= SNAP_SIZE + sizeof(u16);
++			}
++	
++			memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
++	
++			/* Advance the SKB... */
++			skb_pull(skb, bytes);
++	
++			/* Encryption routine will move the header forward in order
++			* to insert the IV between the header and the payload */
++			if (encrypt)
++				ieee80211_encrypt_fragment(ieee, skb_frag, hdr_len);
++			if (ieee->config &
++			(CFG_IEEE80211_COMPUTE_FCS | CFG_IEEE80211_RESERVE_FCS))
++				skb_put(skb_frag, 4);
++		}
++		// Advance sequence number in data frame. 
++		//printk(KERN_WARNING "QoS Enalbed? %s\n", ieee->current_network.QoS_Enable?"Y":"N");	
++		if (ieee->current_network.QoS_Enable) {
++		  if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF)
++			ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0;
++		  else
++			ieee->seq_ctrl[UP2AC(skb->priority) + 1]++;
++		} else {
++  		  if (ieee->seq_ctrl[0] == 0xFFF)
++			ieee->seq_ctrl[0] = 0;
++		  else
++			ieee->seq_ctrl[0]++;
++		}
++		//---
++	}else{
++		if (unlikely(skb->len < sizeof(struct ieee80211_hdr_3addr))) {
++			printk(KERN_WARNING "%s: skb too small (%d).\n",
++			ieee->dev->name, skb->len);
++			goto success;
++		}
++	
++		txb = ieee80211_alloc_txb(1, skb->len, GFP_ATOMIC);
++		if(!txb){
++			printk(KERN_WARNING "%s: Could not allocate TXB\n",
++			ieee->dev->name);
++			goto failed;
++		}
++		
++		txb->encrypted = 0;
++		txb->payload_size = skb->len;
++		memcpy(skb_put(txb->fragments[0],skb->len), skb->data, skb->len);
++	}	
++
++ success:
++	spin_unlock_irqrestore(&ieee->lock, flags);
++#ifdef _RTL8187_EXT_PATCH_
++	// Sometimes, extension mode can reuse skb (by txb->fragments[0])
++	if( ! ((ieee->iw_mode == ieee->iw_ext_mode) && txb && (txb->fragments[0] == skb)) )
++#endif
++		dev_kfree_skb_any(skb);
++	if (txb) {
++		if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE){
++			ieee80211_softmac_xmit(txb, ieee);
++		}else{
++			if ((*ieee->hard_start_xmit)(txb, dev) == 0) {
++				stats->tx_packets++;
++				stats->tx_bytes += txb->payload_size;
++				return 0;
++			}
++			ieee80211_txb_free(txb);
++		}
++	}
++
++	return 0;
++
++ failed:
++	spin_unlock_irqrestore(&ieee->lock, flags);
++	netif_stop_queue(dev);
++	printk("netif_stop_queue in ieee80211_xmit \n");
++	stats->tx_errors++;
++	return 1;
++
++}
++
++
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++EXPORT_SYMBOL(ieee80211_txb_free);
++#ifdef _RTL8187_EXT_PATCH_
++EXPORT_SYMBOL(ieee80211_alloc_txb);
++EXPORT_SYMBOL(ieee80211_ext_alloc_txb);
++EXPORT_SYMBOL(ieee80211_ext_reuse_txb);
++
++EXPORT_SYMBOL(ieee80211_encrypt_fragment);
++#endif // _RTL8187_EXT_PATCH_
++#else
++EXPORT_SYMBOL_NOVERS(ieee80211_txb_free);
++#ifdef _RTL8187_EXT_PATCH_
++EXPORT_SYMBOL_NOVERS(ieee80211_alloc_txb);
++EXPORT_SYMBOL_NOVERS(ieee80211_ext_reuse_txb);
++
++EXPORT_SYMBOL_NOVERS(ieee80211_encrypt_fragment);
++#endif // _RTL8187_EXT_PATCH_
++#endif
++
+Index: drivers/net/wireless/rtl8187B/ieee80211/ieee80211_wx.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/ieee80211_wx.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,926 @@
++/******************************************************************************
++
++  Copyright(c) 2004 Intel Corporation. All rights reserved.
++
++  Portions of this file are based on the WEP enablement code provided by the
++  Host AP project hostap-drivers v0.1.3
++  Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
++  <jkmaline@cc.hut.fi>
++  Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
++
++  This program is free software; you can redistribute it and/or modify it
++  under the terms of version 2 of the GNU General Public License as
++  published by the Free Software Foundation.
++
++  This program is distributed in the hope that it will be useful, but WITHOUT
++  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
++  more details.
++
++  You should have received a copy of the GNU General Public License along with
++  this program; if not, write to the Free Software Foundation, Inc., 59
++  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
++
++  The full GNU General Public License is included in this distribution in the
++  file called LICENSE.
++
++  Contact Information:
++  James P. Ketrenos <ipw2100-admin@linux.intel.com>
++  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
++
++******************************************************************************/
++#include <linux/wireless.h>
++#include <linux/version.h>
++#include <linux/kmod.h>
++#include <linux/module.h>
++
++#include "ieee80211.h"
++static const char *ieee80211_modes[] = {
++	"?", "a", "b", "ab", "g", "ag", "bg", "abg"
++};
++
++#define MAX_CUSTOM_LEN 64
++static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,
++ 					   char *start, char *stop,
++					   struct ieee80211_network *network,
++                                           struct iw_request_info *info)
++{
++	char custom[MAX_CUSTOM_LEN];
++	char *p;
++	struct iw_event iwe;
++	int i, j;
++	u8 max_rate, rate;
++
++	/* First entry *MUST* be the AP MAC address */
++	iwe.cmd = SIOCGIWAP;
++	iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
++	memcpy(iwe.u.ap_addr.sa_data, network->bssid, ETH_ALEN);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN);
++#else
++	start = iwe_stream_add_event(start, stop, &iwe, IW_EV_ADDR_LEN);
++#endif
++	/* Remaining entries will be displayed in the order we provide them */
++
++	/* Add the ESSID */
++	iwe.cmd = SIOCGIWESSID;
++	iwe.u.data.flags = 1;
++	//YJ,modified,080903,for hidden ap
++	//if (network->flags & NETWORK_EMPTY_ESSID) {
++	if (network->ssid_len == 0) {
++		iwe.u.data.length = sizeof("<hidden>");
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++		start = iwe_stream_add_point(info, start, stop, &iwe, "<hidden>");
++#else
++		start = iwe_stream_add_point(start, stop, &iwe, "<hidden>");
++#endif
++	} else {
++		iwe.u.data.length = min(network->ssid_len, (u8)32);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++		start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
++#else
++		start = iwe_stream_add_point(start, stop, &iwe, network->ssid);
++#endif
++	}
++
++	/* Add the protocol name */
++	iwe.cmd = SIOCGIWNAME;
++	snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11%s", ieee80211_modes[network->mode]);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_CHAR_LEN);
++#else
++	start = iwe_stream_add_event(start, stop, &iwe, IW_EV_CHAR_LEN);
++#endif
++        /* Add mode */
++        iwe.cmd = SIOCGIWMODE;
++        if (network->capability &
++	    (WLAN_CAPABILITY_BSS | WLAN_CAPABILITY_IBSS)) {
++		if (network->capability & WLAN_CAPABILITY_BSS)
++			iwe.u.mode = IW_MODE_MASTER;
++		else
++			iwe.u.mode = IW_MODE_ADHOC;
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++		start = iwe_stream_add_event(info, start, stop, &iwe,
++					     IW_EV_UINT_LEN);
++#else
++		start = iwe_stream_add_event(start, stop, &iwe,
++					     IW_EV_UINT_LEN);
++#endif
++	}
++
++        /* Add frequency/channel */
++	iwe.cmd = SIOCGIWFREQ;
++/*	iwe.u.freq.m = ieee80211_frequency(network->channel, network->mode);
++	iwe.u.freq.e = 3; */
++	iwe.u.freq.m = network->channel;
++	iwe.u.freq.e = 0;
++	iwe.u.freq.i = 0;
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_FREQ_LEN);
++#else
++	start = iwe_stream_add_event(start, stop, &iwe, IW_EV_FREQ_LEN);
++#endif
++	/* Add encryption capability */
++	iwe.cmd = SIOCGIWENCODE;
++	if (network->capability & WLAN_CAPABILITY_PRIVACY)
++		iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
++	else
++		iwe.u.data.flags = IW_ENCODE_DISABLED;
++	iwe.u.data.length = 0;
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++	start = iwe_stream_add_point(info, start, stop, &iwe, network->ssid);
++#else
++	start = iwe_stream_add_point(start, stop, &iwe, network->ssid);
++#endif
++	/* Add basic and extended rates */
++	max_rate = 0;
++	p = custom;
++	p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): ");
++	for (i = 0, j = 0; i < network->rates_len; ) {
++		if (j < network->rates_ex_len &&
++		    ((network->rates_ex[j] & 0x7F) <
++		     (network->rates[i] & 0x7F)))
++			rate = network->rates_ex[j++] & 0x7F;
++		else
++			rate = network->rates[i++] & 0x7F;
++		if (rate > max_rate)
++			max_rate = rate;
++		p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
++			      "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
++	}
++	for (; j < network->rates_ex_len; j++) {
++		rate = network->rates_ex[j] & 0x7F;
++		p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
++			      "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
++		if (rate > max_rate)
++			max_rate = rate;
++	}
++
++	iwe.cmd = SIOCGIWRATE;
++	iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
++	iwe.u.bitrate.value = max_rate * 500000;
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++	start = iwe_stream_add_event(info, start, stop, &iwe,IW_EV_PARAM_LEN);
++#else
++	start = iwe_stream_add_event(start, stop, &iwe,IW_EV_PARAM_LEN);
++#endif
++	iwe.cmd = IWEVCUSTOM;
++	iwe.u.data.length = p - custom;
++	if (iwe.u.data.length)
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++		start = iwe_stream_add_point(info, start, stop, &iwe, custom);
++#else
++		start = iwe_stream_add_point(start, stop, &iwe, custom);
++#endif
++	/* Add quality statistics */
++	/* TODO: Fix these values... */
++	iwe.cmd = IWEVQUAL;
++	iwe.u.qual.qual = network->stats.signalstrength;//network->stats.signal;
++	iwe.u.qual.level = network->stats.signal;//network->stats.rssi;
++	iwe.u.qual.noise = network->stats.noise;
++#if 0
++	iwe.u.qual.updated = network->stats.mask & IEEE80211_STATMASK_WEMASK;
++	if (!(network->stats.mask & IEEE80211_STATMASK_RSSI))
++		iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
++	if (!(network->stats.mask & IEEE80211_STATMASK_NOISE))
++		iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID;
++	if (!(network->stats.mask & IEEE80211_STATMASK_SIGNAL))
++		iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID;
++#endif
++
++	iwe.u.qual.updated = 0x7;//network->stats.mask & IEEE80211_STATMASK_WEMASK;
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++	start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_QUAL_LEN);
++#else
++	start = iwe_stream_add_event(start, stop, &iwe, IW_EV_QUAL_LEN);
++#endif
++	iwe.cmd = IWEVCUSTOM;
++	p = custom;
++
++	iwe.u.data.length = p - custom;
++	if (iwe.u.data.length)
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++		start = iwe_stream_add_point(info, start, stop, &iwe, custom);
++#else
++		start = iwe_stream_add_point(start, stop, &iwe, custom);
++#endif
++#if 0
++	if (ieee->wpa_enabled && network->wpa_ie_len){
++		char buf[MAX_WPA_IE_LEN * 2 + 30];
++	//	printk("WPA IE\n");
++		u8 *p = buf;
++		p += sprintf(p, "wpa_ie=");
++		for (i = 0; i < network->wpa_ie_len; i++) {
++			p += sprintf(p, "%02x", network->wpa_ie[i]);
++		}
++
++		memset(&iwe, 0, sizeof(iwe));
++		iwe.cmd = IWEVCUSTOM;
++		iwe.u.data.length = strlen(buf);
++		start = iwe_stream_add_point(start, stop, &iwe, buf);
++	}
++
++	if (ieee->wpa_enabled && network->rsn_ie_len){
++		char buf[MAX_WPA_IE_LEN * 2 + 30];
++
++		u8 *p = buf;
++		p += sprintf(p, "rsn_ie=");
++		for (i = 0; i < network->rsn_ie_len; i++) {
++			p += sprintf(p, "%02x", network->rsn_ie[i]);
++		}
++
++
++#else
++		memset(&iwe, 0, sizeof(iwe));
++        if (network->wpa_ie_len) {
++		//printk("wpa_ie_len:%d\n", network->wpa_ie_len);
++                char buf[MAX_WPA_IE_LEN];
++                memcpy(buf, network->wpa_ie, network->wpa_ie_len);
++                iwe.cmd = IWEVGENIE;
++                iwe.u.data.length = network->wpa_ie_len;
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++                start = iwe_stream_add_point(info, start, stop, &iwe, buf);
++#else
++                start = iwe_stream_add_point(start, stop, &iwe, buf);
++#endif
++        }
++
++        memset(&iwe, 0, sizeof(iwe));
++        if (network->rsn_ie_len) {
++		//printk("=====>rsn_ie_len:\n", network->rsn_ie_len);
++		#if 0
++		{
++			int i;
++			for (i=0; i<network->rsn_ie_len; i++);
++			printk("%2x ", network->rsn_ie[i]);
++			printk("\n");
++		}
++		#endif
++                char buf[MAX_WPA_IE_LEN];
++                memcpy(buf, network->rsn_ie, network->rsn_ie_len);
++                iwe.cmd = IWEVGENIE;
++                iwe.u.data.length = network->rsn_ie_len;
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++		start = iwe_stream_add_point(info, start, stop, &iwe, buf);
++#else
++		start = iwe_stream_add_point(start, stop, &iwe, buf);
++#endif
++	}
++
++#endif
++		
++	/* Add EXTRA: Age to display seconds since last beacon/probe response
++	 * for given network. */
++	iwe.cmd = IWEVCUSTOM;
++	p = custom;
++	p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
++		      " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100));
++	iwe.u.data.length = p - custom;
++	if (iwe.u.data.length)
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) || defined (QMI_26_6))
++		start = iwe_stream_add_point(info, start, stop, &iwe, custom);
++#else
++		start = iwe_stream_add_point(start, stop, &iwe, custom);
++#endif
++
++	return start;
++}
++
++int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
++			  struct iw_request_info *info,
++			  union iwreq_data *wrqu, char *extra)
++{
++	struct ieee80211_network *network;
++	unsigned long flags;
++        int err = 0;
++	char *ev = extra;
++	char *stop = ev + wrqu->data.length;//IW_SCAN_MAX_DATA;
++	//char *stop = ev + IW_SCAN_MAX_DATA;
++	int i = 0;
++
++	IEEE80211_DEBUG_WX("Getting scan\n");
++	down(&ieee->wx_sem);
++	spin_lock_irqsave(&ieee->lock, flags);
++
++	if(!ieee->bHwRadioOff)
++	{
++	list_for_each_entry(network, &ieee->network_list, list) {
++		i++;
++
++		if((stop-ev)<200)
++               		{
++                        err = -E2BIG;
++                        break;
++                	}
++
++		if (ieee->scan_age == 0 ||
++		    time_after(network->last_scanned + ieee->scan_age, jiffies))
++		{
++			ev = rtl819x_translate_scan(ieee, ev, stop, network, info);
++		}
++		else
++			IEEE80211_DEBUG_SCAN(
++				"Not showing network '%s ("
++				MAC_FMT ")' due to age (%lums).\n",
++				escape_essid(network->ssid,
++					     network->ssid_len),
++				MAC_ARG(network->bssid),
++				(jiffies - network->last_scanned) / (HZ / 100));
++	}
++	}
++	spin_unlock_irqrestore(&ieee->lock, flags);
++	up(&ieee->wx_sem);
++	wrqu->data.length = ev -  extra;
++	wrqu->data.flags = 0;
++
++	IEEE80211_DEBUG_WX("exit: %d networks returned.\n", i);
++
++	return err;
++}
++
++int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
++			    struct iw_request_info *info,
++			    union iwreq_data *wrqu, char *keybuf)
++{
++	struct iw_point *erq = &(wrqu->encoding);
++	struct net_device *dev = ieee->dev;
++	struct ieee80211_security sec = {
++		.flags = 0
++	};
++	int i, key, key_provided, len;
++	struct ieee80211_crypt_data **crypt;
++
++	IEEE80211_DEBUG_WX("SET_ENCODE\n");
++
++	key = erq->flags & IW_ENCODE_INDEX;
++	if (key) {
++		if (key > WEP_KEYS)
++			return -EINVAL;
++		key--;
++		key_provided = 1;
++	} else {
++		key_provided = 0;
++		key = ieee->tx_keyidx;
++	}
++
++	IEEE80211_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
++			   "provided" : "default");
++#ifdef _RTL8187_EXT_PATCH_
++#if 0
++{	
++	int j;
++	for(j=0; j<MAX_MP; j++){
++	crypt = &ieee->cryptlist[j]->crypt[key];
++#else
++	crypt = &ieee->cryptlist[0]->crypt[key];
++#endif
++#else
++	crypt = &ieee->crypt[key];
++#endif
++	if (erq->flags & IW_ENCODE_DISABLED) {
++		if (key_provided && *crypt) {
++			IEEE80211_DEBUG_WX("Disabling encryption on key %d.\n",
++					   key);
++			ieee80211_crypt_delayed_deinit(ieee, crypt);
++		} else
++			IEEE80211_DEBUG_WX("Disabling encryption.\n");
++
++		/* Check all the keys to see if any are still configured,
++		 * and if no key index was provided, de-init them all */
++		for (i = 0; i < WEP_KEYS; i++) {
++#ifdef _RTL8187_EXT_PATCH_
++			
++			if (ieee->cryptlist[0]->crypt[i] != NULL){	
++#else
++	
++			if (ieee->crypt[i] != NULL) {
++#endif
++				if (key_provided)
++					break;
++				ieee80211_crypt_delayed_deinit(
++#ifdef _RTL8187_EXT_PATCH_
++					ieee, &ieee->cryptlist[0]->crypt[i]);
++#else
++					ieee, &ieee->crypt[i]);
++#endif
++			}
++		}
++
++		if (i == WEP_KEYS) {
++			sec.enabled = 0;
++			sec.level = SEC_LEVEL_0;
++			sec.flags |= SEC_ENABLED | SEC_LEVEL;
++		}
++
++		goto done;
++	}
++
++
++
++	sec.enabled = 1;
++	sec.flags |= SEC_ENABLED;
++
++	if (*crypt != NULL && (*crypt)->ops != NULL &&
++	    strcmp((*crypt)->ops->name, "WEP") != 0) {
++		/* changing to use WEP; deinit previously used algorithm
++		 * on this key */
++		ieee80211_crypt_delayed_deinit(ieee, crypt);
++	}
++
++	if (*crypt == NULL) {
++		struct ieee80211_crypt_data *new_crypt;
++
++		/* take WEP into use */
++		new_crypt = kmalloc(sizeof(struct ieee80211_crypt_data),
++				    GFP_KERNEL);
++		if (new_crypt == NULL)
++			return -ENOMEM;
++		memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
++		new_crypt->ops = ieee80211_get_crypto_ops("WEP");
++		if (!new_crypt->ops) {
++			request_module("ieee80211_crypt_wep");
++			new_crypt->ops = ieee80211_get_crypto_ops("WEP");
++		}
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
++		if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
++#else			
++		if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
++#endif			
++			new_crypt->priv = new_crypt->ops->init(key);
++
++		if (!new_crypt->ops || !new_crypt->priv) {
++			kfree(new_crypt);
++			new_crypt = NULL;
++
++			printk(KERN_WARNING "%s: could not initialize WEP: "
++			       "load module ieee80211_crypt_wep\n",
++			       dev->name);
++			return -EOPNOTSUPP;
++		}
++		*crypt = new_crypt;
++	}
++
++	/* If a new key was provided, set it up */
++	if (erq->length > 0) {
++		len = erq->length <= 5 ? 5 : 13;
++		memcpy(sec.keys[key], keybuf, erq->length);
++		if (len > erq->length)
++			memset(sec.keys[key] + erq->length, 0,
++			       len - erq->length);
++		IEEE80211_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n",
++				   key, escape_essid(sec.keys[key], len),
++				   erq->length, len);
++		sec.key_sizes[key] = len;
++ 		(*crypt)->ops->set_key(sec.keys[key], len, NULL,
++				       (*crypt)->priv);
++		sec.flags |= (1 << key);
++		/* This ensures a key will be activated if no key is
++		 * explicitely set */
++		if (key == sec.active_key)
++			sec.flags |= SEC_ACTIVE_KEY;
++
++		ieee->tx_keyidx = key; //we need it to support multi_key setting. added by wb 2008_2_22 
++	} else {
++		len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN,
++					     NULL, (*crypt)->priv);
++		if (len == 0) {
++			/* Set a default key of all 0 */
++			IEEE80211_DEBUG_WX("Setting key %d to all zero.\n",
++					   key);
++			memset(sec.keys[key], 0, 13);
++			(*crypt)->ops->set_key(sec.keys[key], 13, NULL,
++					       (*crypt)->priv);
++			sec.key_sizes[key] = 13;
++			sec.flags |= (1 << key);
++		}
++
++		/* No key data - just set the default TX key index */
++		if (key_provided) {
++			IEEE80211_DEBUG_WX(
++				"Setting key %d to default Tx key.\n", key);
++			ieee->tx_keyidx = key;
++			sec.active_key = key;
++			sec.flags |= SEC_ACTIVE_KEY;
++		}
++	}
++#ifdef _RTL8187_EXT_PATCH_
++#if 0
++}
++}
++#endif
++#endif
++ done:
++	ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED);
++	sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
++	sec.flags |= SEC_AUTH_MODE;
++	IEEE80211_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ?
++			   "OPEN" : "SHARED KEY");
++
++	/* For now we just support WEP, so only set that security level...
++	 * TODO: When WPA is added this is one place that needs to change */
++	sec.flags |= SEC_LEVEL;
++	sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
++
++	if (ieee->set_security)
++		ieee->set_security(dev, &sec);
++
++	/* Do not reset port if card is in Managed mode since resetting will
++	 * generate new IEEE 802.11 authentication which may end up in looping
++	 * with IEEE 802.1X.  If your hardware requires a reset after WEP
++	 * configuration (for example... Prism2), implement the reset_port in
++	 * the callbacks structures used to initialize the 802.11 stack. */
++	if (ieee->reset_on_keychange &&
++	    ieee->iw_mode != IW_MODE_INFRA &&
++	    ieee->reset_port && ieee->reset_port(dev)) {
++		printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
++		return -EINVAL;
++	}
++	return 0;
++}
++
++int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
++			    struct iw_request_info *info,
++			    union iwreq_data *wrqu, char *keybuf)
++{
++	struct iw_point *erq = &(wrqu->encoding);
++	int len, key;
++	struct ieee80211_crypt_data *crypt;
++
++	IEEE80211_DEBUG_WX("GET_ENCODE\n");
++
++	if(ieee->iw_mode == IW_MODE_MONITOR)
++		return -1;
++	
++	key = erq->flags & IW_ENCODE_INDEX;
++	if (key) {
++		if (key > WEP_KEYS)
++			return -EINVAL;
++		key--;
++	} else
++		key = ieee->tx_keyidx;
++#ifdef _RTL8187_EXT_PATCH_
++	crypt = ieee->cryptlist[0]->crypt[key];
++#else
++	crypt = ieee->crypt[key];
++#endif
++	erq->flags = key + 1;
++
++	if (crypt == NULL || crypt->ops == NULL) {
++		erq->length = 0;
++		erq->flags |= IW_ENCODE_DISABLED;
++		return 0;
++	}
++
++	if (strcmp(crypt->ops->name, "WEP") != 0) {
++		/* only WEP is supported with wireless extensions, so just
++		 * report that encryption is used */
++		erq->length = 0;
++		erq->flags |= IW_ENCODE_ENABLED;
++		return 0;
++	}
++
++	len = crypt->ops->get_key(keybuf, WEP_KEY_LEN, NULL, crypt->priv);
++	erq->length = (len >= 0 ? len : 0);
++
++	erq->flags |= IW_ENCODE_ENABLED;
++
++	if (ieee->open_wep)
++		erq->flags |= IW_ENCODE_OPEN;
++	else
++		erq->flags |= IW_ENCODE_RESTRICTED;
++
++	return 0;
++}
++
++int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
++                               struct iw_request_info *info,
++                               union iwreq_data *wrqu, char *extra)
++{
++	struct net_device *dev = ieee->dev;
++        struct iw_point *encoding = &wrqu->encoding;
++        struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
++        int i, idx, ret = 0;
++        int group_key = 0;
++        const char *alg, *module;
++        struct ieee80211_crypto_ops *ops;
++        struct ieee80211_crypt_data **crypt;
++
++        struct ieee80211_security sec = {
++                .flags = 0,
++        };
++	//printk("======>encoding flag:%x,ext flag:%x, ext alg:%d\n", encoding->flags,ext->ext_flags, ext->alg);
++        idx = encoding->flags & IW_ENCODE_INDEX;
++        if (idx) {
++                if (idx < 1 || idx > WEP_KEYS)
++                        return -EINVAL;
++                idx--;
++        } else
++                idx = ieee->tx_keyidx;
++
++        if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
++#ifdef _RTL8187_EXT_PATCH_
++                crypt = &ieee->cryptlist[0]->crypt[idx];
++#else
++                crypt = &ieee->crypt[idx];
++#endif
++                group_key = 1;
++        } else {
++                /* some Cisco APs use idx>0 for unicast in dynamic WEP */
++		//printk("not group key, flags:%x, ext->alg:%d\n", ext->ext_flags, ext->alg);
++                if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
++                        return -EINVAL;
++                if (ieee->iw_mode == IW_MODE_INFRA)
++#ifdef _RTL8187_EXT_PATCH_
++			crypt = &ieee->cryptlist[0]->crypt[idx];
++#else
++                        crypt = &ieee->crypt[idx];
++#endif
++                else
++                        return -EINVAL;
++        }
++
++        sec.flags |= SEC_ENABLED;// | SEC_ENCRYPT;
++        if ((encoding->flags & IW_ENCODE_DISABLED) ||
++            ext->alg == IW_ENCODE_ALG_NONE) {
++                if (*crypt)
++                        ieee80211_crypt_delayed_deinit(ieee, crypt);
++
++                for (i = 0; i < WEP_KEYS; i++)
++#ifdef _RTL8187_EXT_PATCH_
++                        if (ieee->cryptlist[0]->crypt[i] != NULL)
++#else
++			if (ieee->crypt[i] != NULL)
++#endif	
++                                break;
++
++                if (i == WEP_KEYS) {
++                        sec.enabled = 0;
++                      //  sec.encrypt = 0;
++                        sec.level = SEC_LEVEL_0;
++                        sec.flags |= SEC_LEVEL;
++                }
++		//printk("disabled: flag:%x\n", encoding->flags);
++                goto done;
++        }
++	
++	sec.enabled = 1;
++    //    sec.encrypt = 1;
++#if 0
++        if (group_key ? !ieee->host_mc_decrypt :
++            !(ieee->host_encrypt || ieee->host_decrypt ||
++              ieee->host_encrypt_msdu))
++                goto skip_host_crypt;
++#endif
++        switch (ext->alg) {
++        case IW_ENCODE_ALG_WEP:
++                alg = "WEP";
++                module = "ieee80211_crypt_wep";
++                break;
++        case IW_ENCODE_ALG_TKIP:
++                alg = "TKIP";
++                module = "ieee80211_crypt_tkip";
++                break;
++        case IW_ENCODE_ALG_CCMP:
++                alg = "CCMP";
++                module = "ieee80211_crypt_ccmp";
++                break;
++        default:
++                IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
++                                   dev->name, ext->alg);
++                ret = -EINVAL;
++                goto done;
++        }
++	printk("alg name:%s\n",alg);
++
++	 ops = ieee80211_get_crypto_ops(alg);
++        if (ops == NULL) {
++                request_module(module);
++                ops = ieee80211_get_crypto_ops(alg);
++        }
++        if (ops == NULL) {
++                IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
++                                   dev->name, ext->alg);
++		printk("========>unknown crypto alg %d\n", ext->alg);
++                ret = -EINVAL;
++                goto done;
++        }
++
++        if (*crypt == NULL || (*crypt)->ops != ops) {
++                struct ieee80211_crypt_data *new_crypt;
++
++                ieee80211_crypt_delayed_deinit(ieee, crypt);
++
++                new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
++                if (new_crypt == NULL) {
++                        ret = -ENOMEM;
++                        goto done;
++                }
++                new_crypt->ops = ops;
++                if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
++                        new_crypt->priv = new_crypt->ops->init(idx);
++                if (new_crypt->priv == NULL) {
++                        kfree(new_crypt);
++                        ret = -EINVAL;
++                        goto done;
++                }
++                *crypt = new_crypt;
++
++ 	}
++	//I need to deinit other crypt here in mesh mode instead deinit them while use them to tx&rx.
++#ifdef _RTL8187_EXT_PATCH_
++	if (ieee->iw_mode == ieee->iw_ext_mode)
++	{
++		int j;
++		for (j=1; j<MAX_MP; j++)
++		{
++			struct ieee80211_crypt_data ** crypttmp =  &ieee->cryptlist[j]->crypt[idx];
++			if (*crypttmp == NULL)
++				break;
++			if (*crypttmp && (*crypttmp)->ops != ops)
++				ieee80211_crypt_delayed_deinit(ieee, crypttmp);
++		}	
++	}
++#endif	
++        if (ext->key_len > 0 && (*crypt)->ops->set_key &&
++            (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
++                                   (*crypt)->priv) < 0) {
++                IEEE80211_DEBUG_WX("%s: key setting failed\n", dev->name);
++		printk("key setting failed\n");
++                ret = -EINVAL;
++                goto done;
++        }
++#if 1	
++// skip_host_crypt:
++	//printk("skip_host_crypt:ext_flags:%x\n", ext->ext_flags);
++        if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
++                ieee->tx_keyidx = idx;
++                sec.active_key = idx;
++                sec.flags |= SEC_ACTIVE_KEY;
++        }
++
++        if (ext->alg != IW_ENCODE_ALG_NONE) {
++                memcpy(sec.keys[idx], ext->key, ext->key_len);
++                sec.key_sizes[idx] = ext->key_len;
++                sec.flags |= (1 << idx);
++                if (ext->alg == IW_ENCODE_ALG_WEP) {
++                      //  sec.encode_alg[idx] = SEC_ALG_WEP;
++                        sec.flags |= SEC_LEVEL;
++                        sec.level = SEC_LEVEL_1;
++                } else if (ext->alg == IW_ENCODE_ALG_TKIP) {
++                      //  sec.encode_alg[idx] = SEC_ALG_TKIP;
++                        sec.flags |= SEC_LEVEL;
++                        sec.level = SEC_LEVEL_2;
++                } else if (ext->alg == IW_ENCODE_ALG_CCMP) {
++                       // sec.encode_alg[idx] = SEC_ALG_CCMP;
++                        sec.flags |= SEC_LEVEL;
++                        sec.level = SEC_LEVEL_3;
++                }
++                /* Don't set sec level for group keys. */
++                if (group_key)
++                        sec.flags &= ~SEC_LEVEL;
++        }
++#endif
++done:
++        if (ieee->set_security)
++                ieee->set_security(ieee->dev, &sec);
++
++	 if (ieee->reset_on_keychange &&
++            ieee->iw_mode != IW_MODE_INFRA &&
++            ieee->reset_port && ieee->reset_port(dev)) {
++                IEEE80211_DEBUG_WX("%s: reset_port failed\n", dev->name);
++                return -EINVAL;
++        }
++
++        return ret;
++}
++int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
++                               struct iw_request_info *info,
++                               union iwreq_data *wrqu, char *extra)
++{
++	struct iw_mlme *mlme = (struct iw_mlme *) extra;
++//	printk("\ndkgadfslkdjgalskdf===============>%s(), cmd:%x\n", __FUNCTION__, mlme->cmd);
++#if 1
++	switch (mlme->cmd) {
++        case IW_MLME_DEAUTH:
++	case IW_MLME_DISASSOC:
++	//	printk("disassoc now\n");
++		ieee80211_disassociate(ieee);
++		break;
++	 default:
++                return -EOPNOTSUPP;
++        }
++#endif		
++	return 0;
++}
++
++int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
++                               struct iw_request_info *info,
++                               struct iw_param *data, char *extra)
++{
++/*
++	 struct ieee80211_security sec = {
++                .flags = SEC_AUTH_MODE,
++	}
++*/
++	//printk("set auth:flag:%x, data value:%x\n", data->flags, data->value);
++	switch (data->flags & IW_AUTH_INDEX) {
++        case IW_AUTH_WPA_VERSION:
++	     /*need to support wpa2 here*/
++		//printk("wpa version:%x\n", data->value);
++		break;
++        case IW_AUTH_CIPHER_PAIRWISE:
++        case IW_AUTH_CIPHER_GROUP:
++        case IW_AUTH_KEY_MGMT:
++                /*
++ *                  * Host AP driver does not use these parameters and allows
++ *                                   * wpa_supplicant to control them internally.
++ *                                                    */
++                break;
++        case IW_AUTH_TKIP_COUNTERMEASURES:
++                ieee->tkip_countermeasures = data->value;
++                break;
++        case IW_AUTH_DROP_UNENCRYPTED:
++                ieee->drop_unencrypted = data->value;
++		break;
++
++	case IW_AUTH_80211_AUTH_ALG:
++		ieee->open_wep = (data->value&IW_AUTH_ALG_OPEN_SYSTEM)?1:0;
++		//printk("open_wep:%d\n", ieee->open_wep);
++		break;
++
++#if 1
++	case IW_AUTH_WPA_ENABLED:
++		ieee->wpa_enabled = (data->value)?1:0;
++		//printk("enalbe wpa:%d\n", ieee->wpa_enabled);
++		break;
++
++#endif
++	case IW_AUTH_RX_UNENCRYPTED_EAPOL:
++                ieee->ieee802_1x = data->value;
++		break;
++	case IW_AUTH_PRIVACY_INVOKED:
++		ieee->privacy_invoked = data->value;
++		break;
++	default:
++                return -EOPNOTSUPP;
++	}	
++	return 0;
++}
++
++#if 1
++int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
++{
++#if 0
++	printk("====>%s()\n", __FUNCTION__);
++	{
++		int i;
++		for (i=0; i<len; i++)
++		printk("%2x ", ie[i]&0xff);
++		printk("\n");
++	}
++#endif
++	u8 *buf = NULL; 
++	
++	if (len>MAX_WPA_IE_LEN || (len && ie == NULL))
++	{
++	//	printk("return error out, len:%d\n", len);
++	return -EINVAL;
++	}
++	if (len)
++	{
++
++		if (len != ie[1]+2) printk("len:%d, ie:%d\n", (int)len, ie[1]);
++		buf = kmalloc(len, GFP_KERNEL);
++		if (buf == NULL)
++			return -ENOMEM;
++		memcpy(buf, ie, len);
++		kfree(ieee->wpa_ie);
++		ieee->wpa_ie = buf;
++		ieee->wpa_ie_len = len;	
++	}
++	else{
++		if (ieee->wpa_ie)
++		kfree(ieee->wpa_ie);
++		ieee->wpa_ie = NULL;
++		ieee->wpa_ie_len = 0;
++	}
++//	printk("<=====out %s()\n", __FUNCTION__);
++
++	return 0;
++
++}
++#endif
++
++EXPORT_SYMBOL(ieee80211_wx_set_gen_ie);
++EXPORT_SYMBOL(ieee80211_wx_set_mlme);
++EXPORT_SYMBOL(ieee80211_wx_set_auth);
++EXPORT_SYMBOL(ieee80211_wx_set_encode_ext);
++EXPORT_SYMBOL(ieee80211_wx_get_scan);
++EXPORT_SYMBOL(ieee80211_wx_set_encode);
++EXPORT_SYMBOL(ieee80211_wx_get_encode);
++#if 0
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_scan);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_encode);
++EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_encode);
++#endif
+Index: drivers/net/wireless/rtl8187B/ieee80211/internal.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/internal.h	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,115 @@
++/*
++ * Cryptographic API.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option) 
++ * any later version.
++ *
++ */
++#ifndef _CRYPTO_INTERNAL_H
++#define _CRYPTO_INTERNAL_H
++
++
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++#include <linux/mm.h>
++#include <linux/highmem.h>
++#include <linux/init.h>
++#include <asm/hardirq.h>
++#include <asm/softirq.h>
++#include <asm/kmap_types.h>
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,20))
++#define list_for_each_entry(pos, head, member)				\
++	for (pos = list_entry((head)->next, typeof(*pos), member),	\
++		     prefetch(pos->member.next);			\
++	     &pos->member != (head); 					\
++	     pos = list_entry(pos->member.next, typeof(*pos), member),	\
++		     prefetch(pos->member.next))
++
++static inline void cond_resched(void)
++{
++	if (need_resched()) {
++		set_current_state(TASK_RUNNING);
++		schedule();
++	}
++}
++#endif
++
++extern enum km_type crypto_km_types[];
++
++static inline enum km_type crypto_kmap_type(int out)
++{
++	return crypto_km_types[(in_softirq() ? 2 : 0) + out];
++}
++
++static inline void *crypto_kmap(struct page *page, int out)
++{
++	return kmap_atomic(page, crypto_kmap_type(out));
++}
++
++static inline void crypto_kunmap(void *vaddr, int out)
++{
++	kunmap_atomic(vaddr, crypto_kmap_type(out));
++}
++
++static inline void crypto_yield(struct crypto_tfm *tfm)
++{
++	if (!in_softirq())
++		cond_resched();
++}
++
++static inline void *crypto_tfm_ctx(struct crypto_tfm *tfm)
++{
++	return (void *)&tfm[1];
++}
++
++struct crypto_alg *crypto_alg_lookup(const char *name);
++
++#ifdef CONFIG_KMOD
++void crypto_alg_autoload(const char *name);
++struct crypto_alg *crypto_alg_mod_lookup(const char *name);
++#else
++static inline struct crypto_alg *crypto_alg_mod_lookup(const char *name)
++{
++	return crypto_alg_lookup(name);
++}
++#endif
++
++#ifdef CONFIG_CRYPTO_HMAC
++int crypto_alloc_hmac_block(struct crypto_tfm *tfm);
++void crypto_free_hmac_block(struct crypto_tfm *tfm);
++#else
++static inline int crypto_alloc_hmac_block(struct crypto_tfm *tfm)
++{
++	return 0;
++}
++
++static inline void crypto_free_hmac_block(struct crypto_tfm *tfm)
++{ }
++#endif
++
++#ifdef CONFIG_PROC_FS
++void __init crypto_init_proc(void);
++#else
++static inline void crypto_init_proc(void)
++{ }
++#endif
++
++int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags);
++int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags);
++int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags);
++
++int crypto_init_digest_ops(struct crypto_tfm *tfm);
++int crypto_init_cipher_ops(struct crypto_tfm *tfm);
++int crypto_init_compress_ops(struct crypto_tfm *tfm);
++
++void crypto_exit_digest_ops(struct crypto_tfm *tfm);
++void crypto_exit_cipher_ops(struct crypto_tfm *tfm);
++void crypto_exit_compress_ops(struct crypto_tfm *tfm);
++
++#endif	/* _CRYPTO_INTERNAL_H */
++
+Index: drivers/net/wireless/rtl8187B/ieee80211/kmap_types.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/kmap_types.h	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,20 @@
++#ifndef __KMAP_TYPES_H
++
++#define __KMAP_TYPES_H
++
++
++enum km_type {
++	KM_BOUNCE_READ,
++	KM_SKB_SUNRPC_DATA,
++	KM_SKB_DATA_SOFTIRQ,
++	KM_USER0,
++	KM_USER1,
++	KM_BH_IRQ,
++	KM_SOFTIRQ0,
++	KM_SOFTIRQ1,
++	KM_TYPE_NR
++};
++
++#define _ASM_KMAP_TYPES_H
++
++#endif
+Index: drivers/net/wireless/rtl8187B/ieee80211/license
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/license	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,339 @@
++
++"This software program is licensed subject to the GNU General Public License 
++(GPL). Version 2, June 1991, available at 
++<http://www.fsf.org/copyleft/gpl.html>"
++
++GNU General Public License 
++
++Version 2, June 1991
++
++Copyright (C) 1989, 1991 Free Software Foundation, Inc.  
++59 Temple Place - Suite 330, Boston, MA  02111-1307, USA
++
++Everyone is permitted to copy and distribute verbatim copies of this license
++document, but changing it is not allowed.
++
++Preamble
++
++The licenses for most software are designed to take away your freedom to 
++share and change it. By contrast, the GNU General Public License is intended
++to guarantee your freedom to share and change free software--to make sure 
++the software is free for all its users. This General Public License applies 
++to most of the Free Software Foundation's software and to any other program 
++whose authors commit to using it. (Some other Free Software Foundation 
++software is covered by the GNU Library General Public License instead.) You 
++can apply it to your programs, too.
++
++When we speak of free software, we are referring to freedom, not price. Our
++General Public Licenses are designed to make sure that you have the freedom 
++to distribute copies of free software (and charge for this service if you 
++wish), that you receive source code or can get it if you want it, that you 
++can change the software or use pieces of it in new free programs; and that 
++you know you can do these things.
++
++To protect your rights, we need to make restrictions that forbid anyone to 
++deny you these rights or to ask you to surrender the rights. These 
++restrictions translate to certain responsibilities for you if you distribute
++copies of the software, or if you modify it.
++
++For example, if you distribute copies of such a program, whether gratis or 
++for a fee, you must give the recipients all the rights that you have. You 
++must make sure that they, too, receive or can get the source code. And you 
++must show them these terms so they know their rights.
++ 
++We protect your rights with two steps: (1) copyright the software, and (2) 
++offer you this license which gives you legal permission to copy, distribute 
++and/or modify the software. 
++
++Also, for each author's protection and ours, we want to make certain that 
++everyone understands that there is no warranty for this free software. If 
++the software is modified by someone else and passed on, we want its 
++recipients to know that what they have is not the original, so that any 
++problems introduced by others will not reflect on the original authors' 
++reputations. 
++
++Finally, any free program is threatened constantly by software patents. We 
++wish to avoid the danger that redistributors of a free program will 
++individually obtain patent licenses, in effect making the program 
++proprietary. To prevent this, we have made it clear that any patent must be 
++licensed for everyone's free use or not licensed at all. 
++
++The precise terms and conditions for copying, distribution and modification 
++follow. 
++
++TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
++
++0. This License applies to any program or other work which contains a notice
++   placed by the copyright holder saying it may be distributed under the 
++   terms of this General Public License. The "Program", below, refers to any
++   such program or work, and a "work based on the Program" means either the 
++   Program or any derivative work under copyright law: that is to say, a 
++   work containing the Program or a portion of it, either verbatim or with 
++   modifications and/or translated into another language. (Hereinafter, 
++   translation is included without limitation in the term "modification".) 
++   Each licensee is addressed as "you". 
++
++   Activities other than copying, distribution and modification are not 
++   covered by this License; they are outside its scope. The act of running 
++   the Program is not restricted, and the output from the Program is covered 
++   only if its contents constitute a work based on the Program (independent 
++   of having been made by running the Program). Whether that is true depends
++   on what the Program does. 
++
++1. You may copy and distribute verbatim copies of the Program's source code 
++   as you receive it, in any medium, provided that you conspicuously and 
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++   of the Program a copy of this License along with the Program. 
++
++   You may charge a fee for the physical act of transferring a copy, and you 
++   may at your option offer warranty protection in exchange for a fee. 
++
++2. You may modify your copy or copies of the Program or any portion of it, 
++   thus forming a work based on the Program, and copy and distribute such 
++   modifications or work under the terms of Section 1 above, provided that 
++   you also meet all of these conditions: 
++
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++        that you changed the files and the date of any change. 
++
++   * b) You must cause any work that you distribute or publish, that in 
++        whole or in part contains or is derived from the Program or any part 
++        thereof, to be licensed as a whole at no charge to all third parties
++        under the terms of this License. 
++
++   * c) If the modified program normally reads commands interactively when 
++        run, you must cause it, when started running for such interactive 
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++        print an announcement.) 
++
++   These requirements apply to the modified work as a whole. If identifiable 
++   sections of that work are not derived from the Program, and can be 
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++
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++
++   In addition, mere aggregation of another work not based on the Program 
++   with the Program (or with a work based on the Program) on a volume of a 
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++
++3. You may copy and distribute the Program (or a work based on it, under 
++   Section 2) in object code or executable form under the terms of Sections 
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++
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++
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++
++   * c) Accompany it with the information you received as to the offer to 
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++   along with the object code. 
++
++4. You may not copy, modify, sublicense, or distribute the Program except as
++   expressly provided under this License. Any attempt otherwise to copy, 
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++   automatically terminate your rights under this License. However, parties 
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++
++5. You are not required to accept this License, since you have not signed 
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++   responsible for enforcing compliance by third parties to this License. 
++
++7. If, as a consequence of a court judgment or allegation of patent 
++   infringement or for any other reason (not limited to patent issues), 
++   conditions are imposed on you (whether by court order, agreement or 
++   otherwise) that contradict the conditions of this License, they do not 
++   excuse you from the conditions of this License. If you cannot distribute 
++   so as to satisfy simultaneously your obligations under this License and 
++   any other pertinent obligations, then as a consequence you may not 
++   distribute the Program at all. For example, if a patent license would 
++   not permit royalty-free redistribution of the Program by all those who 
++   receive copies directly or indirectly through you, then the only way you 
++   could satisfy both it and this License would be to refrain entirely from 
++   distribution of the Program. 
++
++   If any portion of this section is held invalid or unenforceable under any
++   particular circumstance, the balance of the section is intended to apply
++   and the section as a whole is intended to apply in other circumstances. 
++
++   It is not the purpose of this section to induce you to infringe any 
++   patents or other property right claims or to contest validity of any 
++   such claims; this section has the sole purpose of protecting the 
++   integrity of the free software distribution system, which is implemented 
++   by public license practices. Many people have made generous contributions
++   to the wide range of software distributed through that system in 
++   reliance on consistent application of that system; it is up to the 
++   author/donor to decide if he or she is willing to distribute software 
++   through any other system and a licensee cannot impose that choice. 
++
++   This section is intended to make thoroughly clear what is believed to be 
++   a consequence of the rest of this License. 
++
++8. If the distribution and/or use of the Program is restricted in certain 
++   countries either by patents or by copyrighted interfaces, the original 
++   copyright holder who places the Program under this License may add an 
++   explicit geographical distribution limitation excluding those countries, 
++   so that distribution is permitted only in or among countries not thus 
++   excluded. In such case, this License incorporates the limitation as if 
++   written in the body of this License. 
++
++9. The Free Software Foundation may publish revised and/or new versions of 
++   the General Public License from time to time. Such new versions will be 
++   similar in spirit to the present version, but may differ in detail to 
++   address new problems or concerns. 
++
++   Each version is given a distinguishing version number. If the Program 
++   specifies a version number of this License which applies to it and "any 
++   later version", you have the option of following the terms and 
++   conditions either of that version or of any later version published by 
++   the Free Software Foundation. If the Program does not specify a version 
++   number of this License, you may choose any version ever published by the 
++   Free Software Foundation. 
++
++10. If you wish to incorporate parts of the Program into other free programs
++    whose distribution conditions are different, write to the author to ask 
++    for permission. For software which is copyrighted by the Free Software 
++    Foundation, write to the Free Software Foundation; we sometimes make 
++    exceptions for this. Our decision will be guided by the two goals of 
++    preserving the free status of all derivatives of our free software and 
++    of promoting the sharing and reuse of software generally. 
++
++   NO WARRANTY
++
++11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY 
++    FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN 
++    OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES 
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++    NECESSARY SERVICING, REPAIR OR CORRECTION. 
++
++12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING 
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++    INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF 
++    THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR 
++    OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 
++
++END OF TERMS AND CONDITIONS
++
++How to Apply These Terms to Your New Programs
++
++If you develop a new program, and you want it to be of the greatest 
++possible use to the public, the best way to achieve this is to make it free 
++software which everyone can redistribute and change under these terms. 
++
++To do so, attach the following notices to the program. It is safest to 
++attach them to the start of each source file to most effectively convey the
++exclusion of warranty; and each file should have at least the "copyright" 
++line and a pointer to where the full notice is found. 
++
++one line to give the program's name and an idea of what it does.
++Copyright (C) yyyy  name of author
++
++This program is free software; you can redistribute it and/or modify it 
++under the terms of the GNU General Public License as published by the Free 
++Software Foundation; either version 2 of the License, or (at your option) 
++any later version.
++
++This program is distributed in the hope that it will be useful, but WITHOUT 
++ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
++FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for 
++more details.
++
++You should have received a copy of the GNU General Public License along with
++this program; if not, write to the Free Software Foundation, Inc., 59 
++Temple Place - Suite 330, Boston, MA  02111-1307, USA.
++
++Also add information on how to contact you by electronic and paper mail. 
++
++If the program is interactive, make it output a short notice like this when 
++it starts in an interactive mode: 
++
++Gnomovision version 69, Copyright (C) year name of author Gnomovision comes 
++with ABSOLUTELY NO WARRANTY; for details type 'show w'.  This is free 
++software, and you are welcome to redistribute it under certain conditions; 
++type 'show c' for details.
++
++The hypothetical commands 'show w' and 'show c' should show the appropriate 
++parts of the General Public License. Of course, the commands you use may be 
++called something other than 'show w' and 'show c'; they could even be 
++mouse-clicks or menu items--whatever suits your program. 
++
++You should also get your employer (if you work as a programmer) or your 
++school, if any, to sign a "copyright disclaimer" for the program, if 
++necessary. Here is a sample; alter the names: 
++
++Yoyodyne, Inc., hereby disclaims all copyright interest in the program 
++'Gnomovision' (which makes passes at compilers) written by James Hacker.
++
++signature of Ty Coon, 1 April 1989
++Ty Coon, President of Vice
++
++This General Public License does not permit incorporating your program into 
++proprietary programs. If your program is a subroutine library, you may 
++consider it more useful to permit linking proprietary applications with the 
++library. If this is what you want to do, use the GNU Library General Public 
++License instead of this License.
+Index: drivers/net/wireless/rtl8187B/ieee80211/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/Makefile	2010-01-09 04:01:23.000000000 +0000
+@@ -0,0 +1,114 @@
++NIC_SELECT = RTL8187B
++
++#CC = mipsel-linux-gcc
++#LD = mipsel-linux-ld
++CC = gcc
++KVER  := $(shell uname -r)
++PWD = $(shell pwd)
++MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/$(NIC_SELECT)
++
++EXTRA_CFLAGS += -I$(TOPDIR)/drivers/net/wireless
++EXTRA_CFLAGS += -O2 
++EXTRA_CFLAGS += -DJACKSON_NEW_8187 -DJACKSON_NEW_RX
++#CFLAGS += -DJOHN_HWSEC -DJOHN_TKIP -DJOHN_CCMP
++EXTRA_CFLAGS += -DTHOMAS_TURBO
++EXTRA_CFLAGS += -DPOLLING_METHOD_FOR_RADIO
++EXTRA_CFLAGS += -DLED
++#EXTRA_CFLAGS += -DLED_SHIN
++#EXTRA_CFLAGS += -DSW_ANTE_DIVERSITY
++#CFLAGS += -DJOHN_DUMP
++#EXTRA_CFLAGS += -DJUST_FOR_87SEMESH -D_RTL8187_EXT_PATCH_
++#EXTRA_CFLAGS += -D_RTL8187_EXT_PATCH_
++
++#FOR QMI 2.6.26.6
++#EXTRA_CFLAGS += -DQMI_26_6
++
++#for IPS
++EXTRA_CFLAGS += -DCONFIG_IPS
++
++#for dot11d
++EXTRA_CFLAGS += -DENABLE_DOT11D
++
++ifneq ($(shell uname -r|cut -d. -f1,2), 2.4)
++
++ieee80211-rtl-objs := ieee80211_softmac.o dot11d.o ieee80211_rx.o ieee80211_tx.o ieee80211_wx.o ieee80211_module.o ieee80211_softmac_wx.o
++
++ieee80211_crypt-rtl-objs := ieee80211_crypt.o
++ieee80211_crypt_tkip-rtl-objs := ieee80211_crypt_tkip.o
++ieee80211_crypt_ccmp-rtl-objs := ieee80211_crypt_ccmp.o
++ieee80211_crypt_wep-rtl-objs := ieee80211_crypt_wep.o
++
++obj-m +=ieee80211-rtl.o
++obj-m +=ieee80211_crypt-rtl.o
++obj-m +=ieee80211_crypt_wep-rtl.o
++obj-m +=ieee80211_crypt_tkip-rtl.o
++obj-m +=ieee80211_crypt_ccmp-rtl.o
++
++KVER  := $(shell uname -r)
++#KSRC := ~/lemote/linux_loongson
++#KSRC :=  /home/yh/linux-2.6.27.1-lemote
++KSRC := /lib/modules/$(KVER)/build
++INSTALL_PREFIX :=
++
++all: modules
++
++modules:
++	$(MAKE) -C $(KSRC) M=$(PWD) CC=$(CC) modules
++
++
++install: modules
++	rm -fr $(MODDESTDIR)
++	mkdir -p $(MODDESTDIR)
++	@install -p -m 644 ieee80211_crypt-rtl.ko $(MODDESTDIR)
++	@install -p -m 644 ieee80211_crypt_wep-rtl.ko $(MODDESTDIR)
++	@install -p -m 644 ieee80211_crypt_tkip-rtl.ko $(MODDESTDIR)
++	@install -p -m 644 ieee80211_crypt_ccmp-rtl.ko $(MODDESTDIR)
++	@install -p -m 644 ieee80211-rtl.ko $(MODDESTDIR)
++	depmod -a
++uninstall:
++	rm -fr $(MODDESTDIR)
++	depmod -a 
++
++else
++
++#WARN := -W -Wall -Wstrict-prototypes -Wmissing-prototypes
++WARN := -W
++INCLUDE := -isystem /lib/modules/`uname -r`/build/include
++CFLAGS := -O2 -DMODULE -D__KERNEL__ -DEXPORT_SYMTAB -D__NO_VERSION__ ${WARN} ${INCLUDE}
++ifdef CONFIG_SMP
++CFLAGS += -D__SMP__ -DSMP
++endif
++
++OBJS := ${patsubst %.c, %.o, ${wildcard *.c}}
++
++all:${OBJS} ieee80211_crypt-rtl.o michael_mic-rtl.o aes-rtl.o ieee80211_crypt_wep-rtl.o ieee80211_crypt_tkip-rtl.o ieee80211_crypt_ccmp-rtl.o crypto-rtl.o ieee80211-rtl.o
++
++ieee80211_crypt-rtl.o: ieee80211_crypt.o
++	mv $^ $@	
++
++michael_mic-rtl.o: michael_mic.o
++	mv $^ $@
++
++aes-rtl.o: aes.o
++	mv $^ $@
++
++ieee80211_crypt_wep-rtl.o: ieee80211_crypt_wep.o
++	mv $^ $@
++
++ieee80211_crypt_tkip-rtl.o: ieee80211_crypt_tkip.o
++	mv $^ $@
++
++ieee80211_crypt_ccmp-rtl.o: ieee80211_crypt_ccmp.o
++	mv $^ $@
++
++crypto-rtl.o: arc4.o api.o autoload.o cipher.o compress.o digest.o scatterwalk.o proc.o
++	$(LD) -r $^ -o $@
++
++ieee80211-rtl.o: ieee80211_rx.o ieee80211_tx.o ieee80211_wx.o ieee80211_module.o ieee80211_softmac_wx.o ieee80211_softmac.o
++	$(LD) -r $^ -o $@
++endif
++
++.PHONY:clean
++clean:
++	rm -f *.mod.c *.mod *.o .*.cmd *.ko *~
++	rm -rf $(PWD)/tmp
+Index: drivers/net/wireless/rtl8187B/ieee80211/michael_mic.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/michael_mic.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,194 @@
++/*
++ * Cryptographic API
++ *
++ * Michael MIC (IEEE 802.11i/TKIP) keyed digest
++ *
++ * Copyright (c) 2004 Jouni Malinen <jkmaline@cc.hut.fi>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/string.h>
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++
++
++struct michael_mic_ctx {
++	u8 pending[4];
++	size_t pending_len;
++
++	u32 l, r;
++};
++
++
++static inline u32 rotl(u32 val, int bits)
++{
++	return (val << bits) | (val >> (32 - bits));
++}
++
++
++static inline u32 rotr(u32 val, int bits)
++{
++	return (val >> bits) | (val << (32 - bits));
++}
++
++
++static inline u32 xswap(u32 val)
++{
++	return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
++}
++
++
++#define michael_block(l, r)	\
++do {				\
++	r ^= rotl(l, 17);	\
++	l += r;			\
++	r ^= xswap(l);		\
++	l += r;			\
++	r ^= rotl(l, 3);	\
++	l += r;			\
++	r ^= rotr(l, 2);	\
++	l += r;			\
++} while (0)
++
++
++static inline u32 get_le32(const u8 *p)
++{
++	return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
++}
++
++
++static inline void put_le32(u8 *p, u32 v)
++{
++	p[0] = v;
++	p[1] = v >> 8;
++	p[2] = v >> 16;
++	p[3] = v >> 24;
++}
++
++
++static void michael_init(void *ctx)
++{
++	struct michael_mic_ctx *mctx = ctx;
++	mctx->pending_len = 0;
++}
++
++
++static void michael_update(void *ctx, const u8 *data, unsigned int len)
++{
++	struct michael_mic_ctx *mctx = ctx;
++
++	if (mctx->pending_len) {
++		int flen = 4 - mctx->pending_len;
++		if (flen > len)
++			flen = len;
++		memcpy(&mctx->pending[mctx->pending_len], data, flen);
++		mctx->pending_len += flen;
++		data += flen;
++		len -= flen;
++
++		if (mctx->pending_len < 4)
++			return;
++
++		mctx->l ^= get_le32(mctx->pending);
++		michael_block(mctx->l, mctx->r);
++		mctx->pending_len = 0;
++	}
++
++	while (len >= 4) {
++		mctx->l ^= get_le32(data);
++		michael_block(mctx->l, mctx->r);
++		data += 4;
++		len -= 4;
++	}
++
++	if (len > 0) {
++		mctx->pending_len = len;
++		memcpy(mctx->pending, data, len);
++	}
++}
++
++
++static void michael_final(void *ctx, u8 *out)
++{
++	struct michael_mic_ctx *mctx = ctx;
++	u8 *data = mctx->pending;
++
++	/* Last block and padding (0x5a, 4..7 x 0) */
++	switch (mctx->pending_len) {
++	case 0:
++		mctx->l ^= 0x5a;
++		break;
++	case 1:
++		mctx->l ^= data[0] | 0x5a00;
++		break;
++	case 2:
++		mctx->l ^= data[0] | (data[1] << 8) | 0x5a0000;
++		break;
++	case 3:
++		mctx->l ^= data[0] | (data[1] << 8) | (data[2] << 16) |
++			0x5a000000;
++		break;
++	}
++	michael_block(mctx->l, mctx->r);
++	/* l ^= 0; */
++	michael_block(mctx->l, mctx->r);
++
++	put_le32(out, mctx->l);
++	put_le32(out + 4, mctx->r);
++}
++
++
++static int michael_setkey(void *ctx, const u8 *key, unsigned int keylen,
++			  u32 *flags)
++{
++	struct michael_mic_ctx *mctx = ctx;
++	if (keylen != 8) {
++		if (flags)
++			*flags = CRYPTO_TFM_RES_BAD_KEY_LEN;
++		return -EINVAL;
++	}
++	mctx->l = get_le32(key);
++	mctx->r = get_le32(key + 4);
++	return 0;
++}
++
++
++static struct crypto_alg michael_mic_alg = {
++	.cra_name	= "michael_mic",
++	.cra_flags	= CRYPTO_ALG_TYPE_DIGEST,
++	.cra_blocksize	= 8,
++	.cra_ctxsize	= sizeof(struct michael_mic_ctx),
++	.cra_module	= THIS_MODULE,
++	.cra_list	= LIST_HEAD_INIT(michael_mic_alg.cra_list),
++	.cra_u		= { .digest = {
++	.dia_digestsize	= 8,
++	.dia_init	= michael_init,
++	.dia_update	= michael_update,
++	.dia_final	= michael_final,
++	.dia_setkey	= michael_setkey } }
++};
++
++
++static int __init michael_mic_init(void)
++{
++	return crypto_register_alg(&michael_mic_alg);
++}
++
++
++static void __exit michael_mic_exit(void)
++{
++	crypto_unregister_alg(&michael_mic_alg);
++}
++
++
++module_init(michael_mic_init);
++module_exit(michael_mic_exit);
++
++MODULE_LICENSE("GPL v2");
++MODULE_DESCRIPTION("Michael MIC");
++MODULE_AUTHOR("Jouni Malinen <jkmaline@cc.hut.fi>");
+Index: drivers/net/wireless/rtl8187B/ieee80211/Module.symvers
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/Module.symvers	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,63 @@
++0x232e7944	ieee80211_wlan_frequencies	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x151d2695	free_ieee80211_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x479b6dde	DOT11D_GetMaxTxPwrInDbm	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xc53dd7f1	ieee80211_stop_queue_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x4e5dd998	ieee80211_wx_get_name_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x8df595ec	ieee80211_rx_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x8d3ae1a7	ieee80211_register_crypto_ops_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0x4e697070	ieee80211_wx_set_auth_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x64934352	ieee80211_stop_protocol	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x15492f4f	ieee80211_wx_get_scan_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xc6e93de4	Dot11d_UpdateCountryIe	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xcce477e2	ieee80211_start_scan_syncro	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x03515ca2	ieee80211_wx_set_mlme	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x5de2dafe	ieee80211_wx_get_mode	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x26dd6b95	ieee80211_wx_set_mode	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x4763bb2c	ieee80211_wx_get_rate	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x3c5c0a47	ieee80211_wx_set_rate	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xb3fab822	ToLegalChannel	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x1597093a	ieee80211_wx_get_power	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xcf8c8e5b	ieee80211_wx_set_power	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x519a245b	ieee80211_wx_set_scan	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xbba57287	ieee80211_stop_scan	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xc8b223cb	ieee80211_wx_set_freq	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xb38d92a0	ieee80211_wx_get_freq	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x4caddc4d	ieee80211_is_shortslot	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xaed2f898	ieee80211_stop_send_beacons	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xdabb7217	ieee80211_wx_get_wap	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x5421b7dd	ieee80211_wx_set_wap	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xfc642776	ieee80211_wx_set_rawtx	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x50bebeff	ieee80211_is_54g	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x1f710ea1	ieee80211_wpa_supplicant_ioctl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x9c614e79	ieee80211_network_init	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x36178d5f	Dot11d_Init	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xfa1c819d	ieee80211_ps_tx_ack	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x828e4b0a	ieee80211_wx_set_encode_ext	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x8b2c7494	ieee80211_get_beacon	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xc1be3ac8	ieee80211_ccmp_null	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt_ccmp-rtl	EXPORT_SYMBOL
++0x20ca63b0	ieee80211_crypt_deinit_handler_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0x5acae55c	ieee80211_start_scan_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x5dc9d4ee	ieee80211_start_protocol	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x531323f7	ieee80211_get_crypto_ops_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0xc06439b0	ieee80211_unregister_crypto_ops_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0xfc9b034a	ieee80211_tkip_null	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt_tkip-rtl	EXPORT_SYMBOL
++0x559863ff	DOT11D_ScanComplete	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x11ee7dd1	ieee80211_wake_queue_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x2941793c	Dot11d_Reset	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x3bc78ab4	ieee80211_crypt_deinit_entries_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0xbf341fed	ieee80211_wep_null	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt_wep-rtl	EXPORT_SYMBOL
++0x1e7b9a19	ieee80211_start_send_beacons	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xeddbbbd7	ieee80211_wx_set_gen_ie	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x02201f1b	notify_wx_assoc_event	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x617c9b66	ieee80211_txb_free	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xaab527ae	ieee80211_rx_mgt	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xfb335b34	alloc_ieee80211_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x016916fc	ieee80211_softmac_stop_protocol	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x6cc2a054	ieee80211_softmac_start_protocol	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xaf6b77ee	ieee80211_crypt_delayed_deinit_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0x9407d12a	ieee80211_wx_get_encode_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x2b7f6051	ieee80211_wx_set_encode_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x52db06c7	ieee80211_wx_set_essid	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x88c081a6	ieee80211_wx_get_essid	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x0b883265	ieee80211_reset_queue	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xfbe2aaf6	IsLegalChannel	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
+Index: drivers/net/wireless/rtl8187B/ieee80211/proc.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/proc.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,116 @@
++/*
++ * Scatterlist Cryptographic API.
++ *
++ * Procfs information.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option) 
++ * any later version.
++ *
++ */
++#include <linux/init.h>
++//#include <linux/crypto.h>
++#include "rtl_crypto.h"
++#include <linux/rwsem.h>
++#include <linux/proc_fs.h>
++#include <linux/seq_file.h>
++#include "internal.h"
++
++extern struct list_head crypto_alg_list;
++extern struct rw_semaphore crypto_alg_sem;
++
++static void *c_start(struct seq_file *m, loff_t *pos)
++{
++	struct list_head *v;
++	loff_t n = *pos;
++
++	down_read(&crypto_alg_sem);
++	list_for_each(v, &crypto_alg_list)
++		if (!n--)
++			return list_entry(v, struct crypto_alg, cra_list);
++	return NULL;
++}
++
++static void *c_next(struct seq_file *m, void *p, loff_t *pos)
++{
++	struct list_head *v = p;
++	
++	(*pos)++;
++	v = v->next;
++	return (v == &crypto_alg_list) ?
++		NULL : list_entry(v, struct crypto_alg, cra_list);
++}
++
++static void c_stop(struct seq_file *m, void *p)
++{
++	up_read(&crypto_alg_sem);
++}
++
++static int c_show(struct seq_file *m, void *p)
++{
++	struct crypto_alg *alg = (struct crypto_alg *)p;
++	
++	seq_printf(m, "name         : %s\n", alg->cra_name);
++	seq_printf(m, "module       : %s\n",
++		   (alg->cra_module ?
++		    alg->cra_module->name :
++		    "kernel"));
++	
++	switch (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) {
++	case CRYPTO_ALG_TYPE_CIPHER:
++		seq_printf(m, "type         : cipher\n");
++		seq_printf(m, "blocksize    : %u\n", alg->cra_blocksize);
++		seq_printf(m, "min keysize  : %u\n",
++					alg->cra_cipher.cia_min_keysize);
++		seq_printf(m, "max keysize  : %u\n",
++					alg->cra_cipher.cia_max_keysize);
++		break;
++		
++	case CRYPTO_ALG_TYPE_DIGEST:
++		seq_printf(m, "type         : digest\n");
++		seq_printf(m, "blocksize    : %u\n", alg->cra_blocksize);
++		seq_printf(m, "digestsize   : %u\n",
++		           alg->cra_digest.dia_digestsize);
++		break;
++	case CRYPTO_ALG_TYPE_COMPRESS:
++		seq_printf(m, "type         : compression\n");
++		break;
++	default:
++		seq_printf(m, "type         : unknown\n");
++		break;
++	}
++
++	seq_putc(m, '\n');
++	return 0;
++}
++
++static struct seq_operations crypto_seq_ops = {
++	.start		= c_start,
++	.next		= c_next,
++	.stop		= c_stop,
++	.show		= c_show
++};
++
++static int crypto_info_open(struct inode *inode, struct file *file)
++{
++	return seq_open(file, &crypto_seq_ops);
++}
++        
++static struct file_operations proc_crypto_ops = {
++	.open		= crypto_info_open,
++	.read		= seq_read,
++	.llseek		= seq_lseek,
++	.release	= seq_release
++};
++
++void __init crypto_init_proc(void)
++{
++	struct proc_dir_entry *proc;
++	
++	proc = create_proc_entry("crypto", 0, NULL);
++	if (proc)
++		proc->proc_fops = &proc_crypto_ops;
++}
+Index: drivers/net/wireless/rtl8187B/ieee80211/readme
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/readme	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,162 @@
++What this layer should do
++
++- It mantain the old mechanism as alternative, so the
++  ipw2100 driver works with really few changes.
++- Encapsulate / Decapsulate ieee80211 packet 
++- Handle fragmentation 
++- Optionally provide an alterantive mechanism for netif queue stop/wake, 
++  so that the ieee80211 layer will pass one fragment per time instead of
++  one txb struct per time. so the driver can stop the queue in the middle
++  of a packet.
++- Provide two different TX interfaces for cards that can handle management
++  frames on one HW queue, and data on another, and for cards that have only
++  one HW queue  (the latter untested and very, very rough).
++- Optionally provide the logic for handling IBSS/MASTER/MONITOR/BSS modes
++  and for the channel, essid and wap get/set wireless extension requests.
++  so that the driver has only to change channel when the ieee stack tell it.
++- Optionally provide a scanning mechanism so that the driver has not to
++  worry about this, just implement the set channel calback and pass 
++  frames to the upper layer
++- Optionally provide the bss client protocol handshaking (just with open 
++  authentication)
++- Optionally provide the probe request send mechanism
++- Optionally provide the bss master mode logic to handle association
++  protocol (only open authentication) and probe responses.
++- SW wep encryption (with open authentication)
++- It collects some stats
++- It provides beacons to the card when it ask for them
++
++What this layer doesn't do (yet)
++- Perform shared authentication
++- Have full support for master mode (the AP should loop back in the air
++  frames from an associated client to another. This could be done easily
++  with few lines of code, and it is done in my previous version of the 
++  stach, but a table of association must be keept and a disassociation
++  policy must be decided and implemented.
++- Handle cleanly the full ieee 802.11 protocol. In AP mode it never
++  disassociate clients, and it is really prone to always allow access.
++  In bss client mode it is a bit rough with AP deauth and disassoc requests.
++- It has not any entry point to view the collected stats.
++- Altought it takes care of the card supported rates in the management frame
++  it sends, support for rate changing on TXed packet is not complete.
++- Give up once associated in bss client mode (it never detect a
++  signal loss condition to disassociate and restart scanning)
++- Provide a mechanism for enabling the TX in monitor mode, so
++  userspace programs can TX raw packets.
++- Provide a mechanism for cards that need that the SW take care of beacon
++  TX completely, in sense that the SW has to enqueue by itself beacons
++  to the card so it TX them (if any...)
++APIs
++
++Callback functions in the original stack has been mantained.
++following has been added (from ieee80211.h)
++
++	/* Softmac-generated frames (mamagement) are TXed via this 
++	 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is 
++	 * not set. As some cards may have different HW queues that 
++	 * one might want to use for data and management frames
++	 * the option to have two callbacks might be useful.
++	 * This fucntion can't sleep.
++	 */
++	int (*softmac_hard_start_xmit)(struct sk_buff *skb,
++			       struct net_device *dev);
++	
++	/* used instead of hard_start_xmit (not softmac_hard_start_xmit)
++	 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
++	 * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
++	 * then also management frames are sent via this callback.
++	 * This function can't sleep.
++	 */    
++	void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
++			       struct net_device *dev);
++
++	/* stops the HW queue for DATA frames. Useful to avoid
++	 * waste time to TX data frame when we are reassociating
++	 * This function can sleep.
++	 */	 
++	void (*data_hard_stop)(struct net_device *dev);
++	
++	/* OK this is complementar to data_poll_hard_stop */
++	void (*data_hard_resume)(struct net_device *dev);
++	
++	/* ask to the driver to retune the radio .
++	 * This function can sleep. the driver should ensure
++	 * the radio has been swithced before return.
++	 */
++	void (*set_chan)(struct net_device *dev,short ch);
++	
++	/* These are not used if the ieee stack takes care of
++	 * scanning (IEEE_SOFTMAC_SCAN feature set). 
++	 * In this case only the set_chan is used.
++	 *
++	 * The syncro version is similar to the start_scan but
++	 * does not return until all channels has been scanned.
++	 * this is called in user context and should sleep, 
++	 * it is called in a work_queue when swithcing to ad-hoc mode
++	 * or in behalf of iwlist scan when the card is associated 
++	 * and root user ask for a scan. 
++	 * the fucntion stop_scan should stop both the syncro and
++	 * background scanning and can sleep.
++	 * The fucntion start_scan should initiate the background 
++	 * scanning and can't sleep.
++	 */ 
++	void (*scan_syncro)(struct net_device *dev);
++	void (*start_scan)(struct net_device *dev);
++	void (*stop_scan)(struct net_device *dev);
++	
++	/* indicate the driver that the link state is changed
++	 * for example it may indicate the card is associated now.
++	 * Driver might be interested in this to apply RX filter 
++	 * rules or simply light the LINK led 
++	 */
++	void (*link_change)(struct net_device *dev);
++	
++Functions hard_data_[resume/stop] are optional and should not be used
++if the driver decides to uses data+management frames enqueue in a 
++single HQ queue (thus using just the softmac_hard_data_start_xmit 
++callback).
++ 
++Function that the driver can use are:
++
++ieee80211_get_beacon             - this is called by the driver when
++                                   the HW needs a beacon.
++ieee80211_softmac_start_protocol - this should normally be called in the
++                                   driver open function
++ieee80211_softmac_stop_protocol  - the opposite of the above
++ieee80211_wake_queue             - this is similar to netif_wake_queue 
++ieee80211_reset_queue            - this throw away fragments pending(if any)
++ieee80211_stop_queue             - this is similar to netif_stop_queue
++
++
++known BUGS:
++- When performing syncro scan (possiblily when swithcing to ad-hoc mode
++  and when running iwlist scan when associated) there is still an odd
++  behaviour.. I have not looked in this more accurately (yet).
++
++locking:
++locking is done by means of three structures.
++1- ieee->lock (by means of spin_[un]lock_irq[save/restore]
++2- ieee->wx_sem
++3- ieee->scan_sem
++
++the lock 1 is what protect most of the critical sections in the ieee stack.
++the lock 2 is used to avoid that more than one of the SET wireless extension 
++handlers (as well as start/stop protocol function) are running at the same time. 
++the lock 1 is used when we need to modify or read the shared data in the wx handlers. 
++In other words the lock 2 will prevent one SET action will run across another SET
++action (by make sleep the 2nd one) but allow GET actions, while the lock 1
++make atomic those little shared data access in both GET and SET operation.
++So get operation will be never be delayed really: they will never sleep..
++Furthermore in the top of some SET operations a flag is set before acquiring
++the lock. This is an help to make the previous running SET operation to
++finish faster if needed (just in case the second one will totally undo the
++first, so there is not need to complete the 1st really.. ).
++The background scanning mechaninsm is protected by the lock 1 except for the
++workqueue. this wq is here just to let the set_chan callback sleep (I thinked it
++might be appreciated by USB network card driver developer). In this case the lock 3 
++take its turn. 
++Thus the stop function needs both the locks.
++Funny in the syncro scan the lock 2 play its role (as both the syncro_scan
++function and the stop scan function are called with this semaphore held).
++
++
+Index: drivers/net/wireless/rtl8187B/ieee80211/rtl8187_mesh.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/rtl8187_mesh.h	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,282 @@
++#ifndef _RTL8187_MESH_H_

++#define _RTL8187_MESH_H_

++

++#include "msh_class.h" 	// struct mshclass

++#include "mesh.h"		// struct MESH-Neighbor-Entry

++#include "ieee80211.h"	// struct ieee80211-network

++#include "mesh_8185_util.h" // DOT11-QUEUE

++#include "hash_table.h" // hash-table

++#include "8185s_pathsel.h"

++#include <linux/list.h>

++

++#define GET_MESH_PRIV(x)  ((struct mshclass_priv *)(x->priv))

++

++struct ieee80211_hdr_mesh {

++	u16					frame_ctl;

++	u16					duration_id;

++	u8					addr1[ETH_ALEN];

++	u8					addr2[ETH_ALEN];

++	u8					addr3[ETH_ALEN];

++	u16					seq_ctl;

++	u8					addr4[ETH_ALEN];

++	unsigned char		mesh_flag;

++	INT8				TTL;

++	UINT16 				segNum;

++	unsigned char		DestMACAddr[ETH_ALEN]; // modify for 6 address

++	unsigned char		SrcMACAddr[ETH_ALEN];

++} __attribute__ ((packed));

++

++struct myMeshIDNode {

++	struct list_head	list;

++	char id[MESH_ID_LEN+1];

++	short popEN;

++	char  tried;

++	unsigned long expire;

++	struct ieee80211_network mesh_network;

++};

++

++struct ieee80211_hdr_mesh_QOS {

++	u16					frame_ctl;

++	u16					duration_id;

++	u8					addr1[ETH_ALEN];

++	u8					addr2[ETH_ALEN];

++	u8					addr3[ETH_ALEN];

++	u16					seq_ctl;

++	u8					addr4[ETH_ALEN];

++	u16					QOS_ctl;

++	unsigned char		mesh_flag;

++	INT8				TTL;

++	UINT16 				segNum;

++	unsigned char		DestMACAddr[ETH_ALEN]; // modify for 6 address

++	unsigned char		SrcMACAddr[ETH_ALEN];

++} __attribute__ ((packed));

++

++

++struct mesh_PeerEntry {

++	// based on 8185ag.h

++	struct list_head			hash_list;

++	unsigned int				used;	///< used == TRUE => has been allocated, \n used == FALSE => can be allocated

++	unsigned char				hwaddr[MACADDRLEN];	///< hardware address

++	

++	// struct list_head	mesh_unEstablish_ptr;	// ©|¥¼(©Î±q¤w³s½u -> ¥¼³s½u) ¤§ MP  list

++	struct list_head			mesh_mp_ptr;		// MP list

++	

++	/*mesh_neighbor:

++	 *	Inited by "Neighbor Discovering"

++	 *	cleaned by "Disassociation" or "Expired"

++	*/

++	struct MESH_Neighbor_Entry	mesh_neighbor_TBL;

++

++	struct ieee80211_network *	pstat; // a backward pointer

++	

++	// 802.11 seq checking

++	u16 last_rxseq; /* rx seq previous per-tid */

++	u16 last_rxfrag;/* tx frag previous per-tid */

++	unsigned long last_time;

++	//

++};

++

++

++struct mshclass_priv {

++	

++	struct mesh_PeerEntry	*meshEntries;				// 1-to-1 for priv->ieee80211->networks

++

++	spinlock_t				lock_stainfo;					// lock for accessing the data structure of stat info

++	spinlock_t				lock_queue;						// lock for DOT11_EnQueue2/DOT11_DeQueue2/enque/dequeue

++	spinlock_t				lock_Rreq;						// lock for rreq_retry. Some function like aodv_expire/tx use lock_queue simultaneously

++//	spinlock_t				lock_meshlist;	

++	

++	// struct _DOT11_QUEUE		*pevent_queue;	///< 802.11 QUEUEµ²ºc

++	// struct hash_table		*pathsel_table; // GANTOE

++	//tsananiu

++	struct _DOT11_QUEUE		*pathsel_queue;	///< 802.11 QUEUEµ²ºc

++

++	//tsananiu end		 

++		

++	//add by shlu 20070518

++	unsigned char RreqMAC[AODV_RREQ_TABLE_SIZE][6];

++	unsigned int RreqBegin;

++	unsigned int RreqEnd;

++

++#if defined(MESH_ROLE_ROOT) || defined(MESH_ROLE_PORTAL)

++#define MAX_SZ_BAD_MAC 3

++	unsigned char	BadMac[MAX_SZ_BAD_MAC][MACADDRLEN];

++	int				idx_BadMac;

++#endif // MESH_ROLE_ROOT || MESH_ROLE_PORTAL

++	

++	//-------------

++	unsigned char root_mac[MACADDRLEN];

++	struct mesh_info		dot11MeshInfo; // extrated from wifi_mib (ieee802_mib.h)

++	struct hash_table *proxy_table, *mesh_rreq_retry_queue;	//GANTOE	//GANTOE

++	struct hash_table *pathsel_table; // add by chuangch 2007.09.13

++	// add by Jason

++	struct mpp_tb *pann_mpp_tb;

++		

++	struct timer_list		expire_timer;			// 1sec timer

++

++	struct timer_list		beacon_timer;			// 1sec timer

++	struct list_head		stat_hash[MAX_NETWORK_COUNT];	// sta_info hash table (aid_obj)

++	

++	struct list_head		meshList[MAX_CHANNEL_NUMBER];

++	int 					scanMode;

++	

++	struct {

++		struct ieee80211_network	*pstat;

++		unsigned char				hwaddr[MACADDRLEN];

++	} stainfo_cache;

++	

++	// The following elements are used by 802.11s. 

++	// For copyright-pretection, we use an independent (binary) module.

++	// Note that it can also be put either under r8180_priv or ieee80211_device. The adv of put under 

++	// r8180_priv is to get "higher encapsulation". On the other hand, r8180_priv was originally designed 

++	// for "hardward specific."

++	char 				mesh_mac_filter_allow[8][13];

++	char 				mesh_mac_filter_deny[8][13];

++		

++	struct MESH_Share		meshare; // mesh share data

++	

++	struct {

++		

++		int						prev_iw_mode; // Save this->iw_mode for r8180_wx->r8180_wx_enable_mesh. No init requirement

++		

++		struct MESH_Profile		mesh_profile; // contains MESHID

++	

++		struct mesh_info		dot11MeshInfo; // contains meshMaxAssocNum

++		

++		struct net_device_stats	mesh_stats; 

++	

++		UINT8				mesh_Version;				// ¨Ï¥Îªºª©¥»

++		// WLAN Mesh Capability

++		INT16				mesh_PeerCAP_cap;			// peer capability-Cap number (¦³¸¹¼Æ)

++		UINT8				mesh_PeerCAP_flags;		// peer capability-flags

++		UINT8				mesh_PowerSaveCAP;		// Power Save capability

++		UINT8				mesh_SyncCAP;				// Synchronization capability

++		UINT8				mesh_MDA_CAP;				// MDA capability

++		UINT32				mesh_ChannelPrecedence;	// Channel Precedence

++	

++		// neighbor -> candidate neighbor, if mesh_available_peerlink > 0, page 56, D0.02

++		UINT8				mesh_AvailablePeerLink;  // ¦¹¬O§_¦³»Ý­n?(¦]¥¦µ¥¦P©ó mesh_PeerCAP)=>¼È ®É«O ¯d

++

++		UINT8				mesh_HeaderFlags;	// mesh header ¤ºªº mesh flags field

++

++		// MKD domain element [MKDDIE]

++		UINT8				mesh_MKD_DomainID[6];

++		UINT8				mesh_MKDDIE_SecurityConfiguration;

++	

++		// EMSA Handshake element [EMSAIE]

++		UINT8				mesh_EMSAIE_ANonce[32];

++		UINT8				mesh_EMSAIE_SNonce[32];

++		UINT8				mesh_EMSAIE_MA_ID[6];

++		UINT16				mesh_EMSAIE_MIC_Control;

++		UINT8				mesh_EMSAIE_MIC[16];

++

++		struct timer_list		mesh_peer_link_timer;	///< ¹ï©|¥¼³s ½u(»P³s½u°h¦Ü¥¼³s½u) MP mesh_unEstablish_hdr §@ peer link time out

++

++//		struct timer_list		mesh_beacon_timer;	

++		// mesh_unEstablish_hdr:

++		//  It is a list structure, only stores unEstablish (or Establish -> unEstablish [MP_HOLDING])MP entry

++		//  Each entry is a pointer pointing to an entry in "stat_info->mesh_mp_ptr"

++		//  and removed by successful "Peer link setup" or "Expired"

++		struct list_head		mesh_unEstablish_hdr;

++	

++		// mesh_mp_hdr: 

++		//  It is a list of MP/MAP/MPP who has already passed "Peer link setup"

++		//  Each entry is a pointer pointing to an entry in "stat_info->mesh_mp_ptr"

++		//  Every entry is inserted by "successful peer link setup"

++		//  and removed by "Expired"

++		struct list_head		mesh_mp_hdr;

++		

++	} mesh;

++	

++	int iCurChannel; // remember the working channel

++};

++

++// Stanley, 04/23/07

++// The following mode is used by ieee80211_device->iw_mode

++// Although it is better to put the definition under linux/wireless.h (or wireless_copy.h), it is a system file

++// that we shouldn't modify directly.

++#define IW_MODE_MESH	11	/* 802.11s mesh mode */

++

++// Default MESHID

++#define IEEE80211S_DEFAULT_MESHID "802.11s"

++

++// callback for 802.11s 

++extern short rtl8187_patch_ieee80211_probe_req_1 (struct ieee80211_device *ieee);

++extern u8* rtl8187_patch_ieee80211_probe_req_2 (struct ieee80211_device *ieee, struct sk_buff *skb, u8 *tag);

++

++// wx

++extern int rtl8187_patch_r8180_wx_get_meshinfo(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++extern int rtl8187_patch_r8180_wx_enable_mesh(struct net_device *dev);

++extern int rtl8187_patch_r8180_wx_disable_mesh(struct net_device *dev);

++extern int rtl8187_patch_r8180_wx_wx_set_meshID(struct net_device *dev, char *ext,unsigned char channel);

++extern void rtl8187_patch_r8180_wx_set_channel (struct ieee80211_device *ieee, int ch);

++extern int rtl8187_patch_r8180_wx_set_add_mac_allow(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++extern int rtl8187_patch_r8180_wx_set_del_mac_allow(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++extern int rtl8187_patch_r8180_wx_set_add_mac_deny(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++extern int rtl8187_patch_r8180_wx_set_del_mac_deny(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++extern int rtl8187_patch_r8180_wx_get_mac_allow(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++extern int rtl8187_patch_r8180_wx_get_mac_deny(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++

++extern int rtl8187_patch_r8180_wx_get_mesh_list(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++extern int rtl8187_patch_r8180_wx_mesh_scan(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++extern int rtl8187_patch_r8180_wx_get_selected_mesh(struct net_device *dev, int en, char *cho, char* id);

++//by amy for networkmanager UI

++extern int rtl8187_patch_r8180_wx_get_selected_mesh_channel(struct net_device *dev, char *extmeshid, char *cho);

++//by amy for networkmanager UI

++// osdep

++extern int rtl8187_patch_ieee80211_start_protocol (struct ieee80211_device *ieee);

++extern u8 rtl8187_patch_rtl8180_up(struct mshclass *priv);

++extern void rtl8187_patch_ieee80211_stop_protocol(struct ieee80211_device *ieee);

++

++// issue_assocreq_MP

++extern void rtl8187_patch_ieee80211_association_req_1 (struct ieee80211_assoc_request_frame *hdr);

++extern u8* rtl8187_patch_ieee80211_association_req_2 (struct ieee80211_device *ieee, struct ieee80211_network *pstat, struct sk_buff *skb);

++

++// OnAssocReq_MP

++extern int rtl8187_patch_ieee80211_rx_frame_softmac_on_assoc_req (struct ieee80211_device *ieee, struct sk_buff *skb);

++

++// issue_assocrsp_MP

++extern void rtl8187_patch_ieee80211_assoc_resp_by_net_1 (struct ieee80211_assoc_response_frame *assoc);

++u8* rtl8187_patch_ieee80211_assoc_resp_by_net_2 (struct ieee80211_device *ieee, struct ieee80211_network *pstat, int pkt_type, struct sk_buff *skb);

++

++// OnAssocRsp_MP

++extern int rtl8187_patch_ieee80211_rx_frame_softmac_on_assoc_rsp (struct ieee80211_device *ieee, struct sk_buff *skb);

++				  

++

++extern int rtl8187_patch_ieee80211_rx_frame_softmac_on_auth(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);

++extern int rtl8187_patch_ieee80211_rx_frame_softmac_on_deauth(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);

++extern unsigned int rtl8187_patch_ieee80211_process_probe_response_1(	struct ieee80211_device *ieee,	struct ieee80211_probe_response *beacon,	struct ieee80211_rx_stats *stats);

++extern void rtl8187_patch_ieee80211_rx_mgt_on_probe_req( struct ieee80211_device *ieee, struct ieee80211_probe_request *beacon, struct ieee80211_rx_stats *stats);

++extern void rtl8187_patch_ieee80211_rx_mgt_update_expire ( struct ieee80211_device *ieee, struct sk_buff *skb);

++

++// set channel

++extern int rtl8187_patch_ieee80211_ext_stop_scan_wq_set_channel (struct ieee80211_device *ieee);

++

++// on rx (rx isr)

++extern int rtl8187_patch_ieee80211_rx_on_rx (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats, u16 type, u16 stype);

++

++// r8187_core

++// handle ioctl

++extern int rtl8187_patch_rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);

++// create proc

++extern void rtl8187_patch_create_proc(struct r8180_priv *priv);

++extern void rtl8187_patch_remove_proc(struct r8180_priv *priv);

++

++// tx, xmit

++// locked by ieee->lock. Call ieee80211_softmac_xmit afterward

++extern struct ieee80211_txb* rtl8187_patch_ieee80211_xmit (struct sk_buff *skb, struct net_device *dev);

++

++// given a skb, output header's length

++extern int rtl8187_patch_ieee80211_rx_frame_get_hdrlen (struct ieee80211_device *ieee, struct sk_buff *skb);

++

++// check the frame control field, return 0: not accept, 1: accept

++extern int rtl8187_patch_ieee80211_rx_is_valid_framectl (struct ieee80211_device *ieee, u16 fc, u16 type, u16 stype);

++

++// process_dataframe

++extern int rtl8187_patch_ieee80211_rx_process_dataframe (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);

++

++extern int rtl8187_patch_is_duplicate_packet (struct ieee80211_device *ieee, struct ieee80211_hdr *header, u16 type, u16 stype);

++

++extern int rtl8187_patch_ieee80211_softmac_xmit_get_rate (struct ieee80211_device *ieee, struct sk_buff *skb);

++extern void ieee80211_start_mesh(struct ieee80211_device *ieee);

++#endif // _RTL8187_MESH_H_

+Index: drivers/net/wireless/rtl8187B/ieee80211/rtl_crypto.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/rtl_crypto.h	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,399 @@
++/*
++ * Scatterlist Cryptographic API.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ * Copyright (c) 2002 David S. Miller (davem@redhat.com)
++ *
++ * Portions derived from Cryptoapi, by Alexander Kjeldaas <astor@fast.no>
++ * and Nettle, by Niels Mé°ˆler.
++ * 
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option) 
++ * any later version.
++ *
++ */
++#ifndef _LINUX_CRYPTO_H
++#define _LINUX_CRYPTO_H
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/list.h>
++#include <linux/string.h>
++#include <asm/page.h>
++#include <asm/errno.h>
++
++#define crypto_register_alg crypto_register_alg_rtl
++#define crypto_unregister_alg crypto_unregister_alg_rtl
++#define crypto_alloc_tfm crypto_alloc_tfm_rtl
++#define crypto_free_tfm crypto_free_tfm_rtl
++#define crypto_alg_available crypto_alg_available_rtl
++
++/*
++ * Algorithm masks and types.
++ */
++#define CRYPTO_ALG_TYPE_MASK		0x000000ff
++#define CRYPTO_ALG_TYPE_CIPHER		0x00000001
++#define CRYPTO_ALG_TYPE_DIGEST		0x00000002
++#define CRYPTO_ALG_TYPE_COMPRESS	0x00000004
++
++/*
++ * Transform masks and values (for crt_flags).
++ */
++#define CRYPTO_TFM_MODE_MASK		0x000000ff
++#define CRYPTO_TFM_REQ_MASK		0x000fff00
++#define CRYPTO_TFM_RES_MASK		0xfff00000
++
++#define CRYPTO_TFM_MODE_ECB		0x00000001
++#define CRYPTO_TFM_MODE_CBC		0x00000002
++#define CRYPTO_TFM_MODE_CFB		0x00000004
++#define CRYPTO_TFM_MODE_CTR		0x00000008
++
++#define CRYPTO_TFM_REQ_WEAK_KEY		0x00000100
++#define CRYPTO_TFM_RES_WEAK_KEY		0x00100000
++#define CRYPTO_TFM_RES_BAD_KEY_LEN   	0x00200000
++#define CRYPTO_TFM_RES_BAD_KEY_SCHED 	0x00400000
++#define CRYPTO_TFM_RES_BAD_BLOCK_LEN 	0x00800000
++#define CRYPTO_TFM_RES_BAD_FLAGS 	0x01000000
++
++/*
++ * Miscellaneous stuff.
++ */
++#define CRYPTO_UNSPEC			0
++#define CRYPTO_MAX_ALG_NAME		64
++
++struct scatterlist;
++
++/*
++ * Algorithms: modular crypto algorithm implementations, managed
++ * via crypto_register_alg() and crypto_unregister_alg().
++ */
++struct cipher_alg {
++	unsigned int cia_min_keysize;
++	unsigned int cia_max_keysize;
++	int (*cia_setkey)(void *ctx, const u8 *key,
++	                  unsigned int keylen, u32 *flags);
++	void (*cia_encrypt)(void *ctx, u8 *dst, const u8 *src);
++	void (*cia_decrypt)(void *ctx, u8 *dst, const u8 *src);
++};
++
++struct digest_alg {
++	unsigned int dia_digestsize;
++	void (*dia_init)(void *ctx);
++	void (*dia_update)(void *ctx, const u8 *data, unsigned int len);
++	void (*dia_final)(void *ctx, u8 *out);
++	int (*dia_setkey)(void *ctx, const u8 *key,
++	                  unsigned int keylen, u32 *flags);
++};
++
++struct compress_alg {
++	int (*coa_init)(void *ctx);
++	void (*coa_exit)(void *ctx);
++	int (*coa_compress)(void *ctx, const u8 *src, unsigned int slen,
++	                    u8 *dst, unsigned int *dlen);
++	int (*coa_decompress)(void *ctx, const u8 *src, unsigned int slen,
++	                      u8 *dst, unsigned int *dlen);
++};
++
++#define cra_cipher	cra_u.cipher
++#define cra_digest	cra_u.digest
++#define cra_compress	cra_u.compress
++
++struct crypto_alg {
++	struct list_head cra_list;
++	u32 cra_flags;
++	unsigned int cra_blocksize;
++	unsigned int cra_ctxsize;
++	const char cra_name[CRYPTO_MAX_ALG_NAME];
++
++	union {
++		struct cipher_alg cipher;
++		struct digest_alg digest;
++		struct compress_alg compress;
++	} cra_u;
++	
++	struct module *cra_module;
++};
++
++/*
++ * Algorithm registration interface.
++ */
++int crypto_register_alg(struct crypto_alg *alg);
++int crypto_unregister_alg(struct crypto_alg *alg);
++
++/*
++ * Algorithm query interface.
++ */
++int crypto_alg_available(const char *name, u32 flags);
++
++/*
++ * Transforms: user-instantiated objects which encapsulate algorithms
++ * and core processing logic.  Managed via crypto_alloc_tfm() and
++ * crypto_free_tfm(), as well as the various helpers below.
++ */
++struct crypto_tfm;
++
++struct cipher_tfm {
++	void *cit_iv;
++	unsigned int cit_ivsize;
++	u32 cit_mode;
++	int (*cit_setkey)(struct crypto_tfm *tfm,
++	                  const u8 *key, unsigned int keylen);
++	int (*cit_encrypt)(struct crypto_tfm *tfm,
++			   struct scatterlist *dst,
++			   struct scatterlist *src,
++			   unsigned int nbytes);
++	int (*cit_encrypt_iv)(struct crypto_tfm *tfm,
++	                      struct scatterlist *dst,
++	                      struct scatterlist *src,
++	                      unsigned int nbytes, u8 *iv);
++	int (*cit_decrypt)(struct crypto_tfm *tfm,
++			   struct scatterlist *dst,
++			   struct scatterlist *src,
++			   unsigned int nbytes);
++	int (*cit_decrypt_iv)(struct crypto_tfm *tfm,
++			   struct scatterlist *dst,
++			   struct scatterlist *src,
++			   unsigned int nbytes, u8 *iv);
++	void (*cit_xor_block)(u8 *dst, const u8 *src);
++};
++
++struct digest_tfm {
++	void (*dit_init)(struct crypto_tfm *tfm);
++	void (*dit_update)(struct crypto_tfm *tfm,
++	                   struct scatterlist *sg, unsigned int nsg);
++	void (*dit_final)(struct crypto_tfm *tfm, u8 *out);
++	void (*dit_digest)(struct crypto_tfm *tfm, struct scatterlist *sg,
++	                   unsigned int nsg, u8 *out);
++	int (*dit_setkey)(struct crypto_tfm *tfm,
++	                  const u8 *key, unsigned int keylen);
++#ifdef CONFIG_CRYPTO_HMAC
++	void *dit_hmac_block;
++#endif
++};
++
++struct compress_tfm {
++	int (*cot_compress)(struct crypto_tfm *tfm,
++	                    const u8 *src, unsigned int slen,
++	                    u8 *dst, unsigned int *dlen);
++	int (*cot_decompress)(struct crypto_tfm *tfm,
++	                      const u8 *src, unsigned int slen,
++	                      u8 *dst, unsigned int *dlen);
++};
++
++#define crt_cipher	crt_u.cipher
++#define crt_digest	crt_u.digest
++#define crt_compress	crt_u.compress
++
++struct crypto_tfm {
++
++	u32 crt_flags;
++	
++	union {
++		struct cipher_tfm cipher;
++		struct digest_tfm digest;
++		struct compress_tfm compress;
++	} crt_u;
++	
++	struct crypto_alg *__crt_alg;
++};
++
++/* 
++ * Transform user interface.
++ */
++ 
++/*
++ * crypto_alloc_tfm() will first attempt to locate an already loaded algorithm.
++ * If that fails and the kernel supports dynamically loadable modules, it
++ * will then attempt to load a module of the same name or alias.  A refcount
++ * is grabbed on the algorithm which is then associated with the new transform.
++ *
++ * crypto_free_tfm() frees up the transform and any associated resources,
++ * then drops the refcount on the associated algorithm.
++ */
++struct crypto_tfm *crypto_alloc_tfm(const char *alg_name, u32 tfm_flags);
++void crypto_free_tfm(struct crypto_tfm *tfm);
++
++/*
++ * Transform helpers which query the underlying algorithm.
++ */
++static inline const char *crypto_tfm_alg_name(struct crypto_tfm *tfm)
++{
++	return tfm->__crt_alg->cra_name;
++}
++
++static inline const char *crypto_tfm_alg_modname(struct crypto_tfm *tfm)
++{
++	struct crypto_alg *alg = tfm->__crt_alg;
++	
++	if (alg->cra_module)
++		return alg->cra_module->name;
++	else
++		return NULL;
++}
++
++static inline u32 crypto_tfm_alg_type(struct crypto_tfm *tfm)
++{
++	return tfm->__crt_alg->cra_flags & CRYPTO_ALG_TYPE_MASK;
++}
++
++static inline unsigned int crypto_tfm_alg_min_keysize(struct crypto_tfm *tfm)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	return tfm->__crt_alg->cra_cipher.cia_min_keysize;
++}
++
++static inline unsigned int crypto_tfm_alg_max_keysize(struct crypto_tfm *tfm)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	return tfm->__crt_alg->cra_cipher.cia_max_keysize;
++}
++
++static inline unsigned int crypto_tfm_alg_ivsize(struct crypto_tfm *tfm)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	return tfm->crt_cipher.cit_ivsize;
++}
++
++static inline unsigned int crypto_tfm_alg_blocksize(struct crypto_tfm *tfm)
++{
++	return tfm->__crt_alg->cra_blocksize;
++}
++
++static inline unsigned int crypto_tfm_alg_digestsize(struct crypto_tfm *tfm)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
++	return tfm->__crt_alg->cra_digest.dia_digestsize;
++}
++
++/*
++ * API wrappers.
++ */
++static inline void crypto_digest_init(struct crypto_tfm *tfm)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
++	tfm->crt_digest.dit_init(tfm);
++}
++
++static inline void crypto_digest_update(struct crypto_tfm *tfm,
++                                        struct scatterlist *sg,
++                                        unsigned int nsg)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
++	tfm->crt_digest.dit_update(tfm, sg, nsg);
++}
++
++static inline void crypto_digest_final(struct crypto_tfm *tfm, u8 *out)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
++	tfm->crt_digest.dit_final(tfm, out);
++}
++
++static inline void crypto_digest_digest(struct crypto_tfm *tfm,
++                                        struct scatterlist *sg,
++                                        unsigned int nsg, u8 *out)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
++	tfm->crt_digest.dit_digest(tfm, sg, nsg, out);
++}
++
++static inline int crypto_digest_setkey(struct crypto_tfm *tfm,
++                                       const u8 *key, unsigned int keylen)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
++	if (tfm->crt_digest.dit_setkey == NULL)
++		return -ENOSYS;
++	return tfm->crt_digest.dit_setkey(tfm, key, keylen);
++}
++
++static inline int crypto_cipher_setkey(struct crypto_tfm *tfm,
++                                       const u8 *key, unsigned int keylen)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	return tfm->crt_cipher.cit_setkey(tfm, key, keylen);
++}
++
++static inline int crypto_cipher_encrypt(struct crypto_tfm *tfm,
++                                        struct scatterlist *dst,
++                                        struct scatterlist *src,
++                                        unsigned int nbytes)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	return tfm->crt_cipher.cit_encrypt(tfm, dst, src, nbytes);
++}                                        
++
++static inline int crypto_cipher_encrypt_iv(struct crypto_tfm *tfm,
++                                           struct scatterlist *dst,
++                                           struct scatterlist *src,
++                                           unsigned int nbytes, u8 *iv)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	BUG_ON(tfm->crt_cipher.cit_mode == CRYPTO_TFM_MODE_ECB);
++	return tfm->crt_cipher.cit_encrypt_iv(tfm, dst, src, nbytes, iv);
++}                                        
++
++static inline int crypto_cipher_decrypt(struct crypto_tfm *tfm,
++                                        struct scatterlist *dst,
++                                        struct scatterlist *src,
++                                        unsigned int nbytes)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	return tfm->crt_cipher.cit_decrypt(tfm, dst, src, nbytes);
++}
++
++static inline int crypto_cipher_decrypt_iv(struct crypto_tfm *tfm,
++                                           struct scatterlist *dst,
++                                           struct scatterlist *src,
++                                           unsigned int nbytes, u8 *iv)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	BUG_ON(tfm->crt_cipher.cit_mode == CRYPTO_TFM_MODE_ECB);
++	return tfm->crt_cipher.cit_decrypt_iv(tfm, dst, src, nbytes, iv);
++}
++
++static inline void crypto_cipher_set_iv(struct crypto_tfm *tfm,
++                                        const u8 *src, unsigned int len)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	memcpy(tfm->crt_cipher.cit_iv, src, len);
++}
++
++static inline void crypto_cipher_get_iv(struct crypto_tfm *tfm,
++                                        u8 *dst, unsigned int len)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
++	memcpy(dst, tfm->crt_cipher.cit_iv, len);
++}
++
++static inline int crypto_comp_compress(struct crypto_tfm *tfm,
++                                       const u8 *src, unsigned int slen,
++                                       u8 *dst, unsigned int *dlen)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_COMPRESS);
++	return tfm->crt_compress.cot_compress(tfm, src, slen, dst, dlen);
++}
++
++static inline int crypto_comp_decompress(struct crypto_tfm *tfm,
++                                         const u8 *src, unsigned int slen,
++                                         u8 *dst, unsigned int *dlen)
++{
++	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_COMPRESS);
++	return tfm->crt_compress.cot_decompress(tfm, src, slen, dst, dlen);
++}
++
++/*
++ * HMAC support.
++ */
++#ifdef CONFIG_CRYPTO_HMAC
++void crypto_hmac_init(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen);
++void crypto_hmac_update(struct crypto_tfm *tfm,
++                        struct scatterlist *sg, unsigned int nsg);
++void crypto_hmac_final(struct crypto_tfm *tfm, u8 *key,
++                       unsigned int *keylen, u8 *out);
++void crypto_hmac(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen,
++                 struct scatterlist *sg, unsigned int nsg, u8 *out);
++#endif	/* CONFIG_CRYPTO_HMAC */
++
++#endif	/* _LINUX_CRYPTO_H */
++
+Index: drivers/net/wireless/rtl8187B/ieee80211/scatterwalk.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/scatterwalk.c	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,126 @@
++/*
++ * Cryptographic API.
++ *
++ * Cipher operations.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ *               2002 Adam J. Richter <adam@yggdrasil.com>
++ *               2004 Jean-Luc Cooke <jlcooke@certainkey.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ *
++ */
++#include "kmap_types.h"
++
++#include <linux/kernel.h>
++#include <linux/mm.h>
++#include <linux/pagemap.h>
++#include <linux/highmem.h>
++#include <asm/scatterlist.h>
++#include "internal.h"
++#include "scatterwalk.h"
++
++enum km_type crypto_km_types[] = {
++	KM_USER0,
++	KM_USER1,
++	KM_SOFTIRQ0,
++	KM_SOFTIRQ1,
++};
++
++void *scatterwalk_whichbuf(struct scatter_walk *walk, unsigned int nbytes, void *scratch)
++{
++	if (nbytes <= walk->len_this_page &&
++	    (((unsigned long)walk->data) & (PAGE_CACHE_SIZE - 1)) + nbytes <=
++	    PAGE_CACHE_SIZE)
++		return walk->data;
++	else
++		return scratch;
++}
++
++static void memcpy_dir(void *buf, void *sgdata, size_t nbytes, int out)
++{
++	if (out)
++		memcpy(sgdata, buf, nbytes);
++	else
++		memcpy(buf, sgdata, nbytes);
++}
++
++void scatterwalk_start(struct scatter_walk *walk, struct scatterlist *sg)
++{
++	unsigned int rest_of_page;
++
++	walk->sg = sg;
++
++	walk->page = sg->page;
++	walk->len_this_segment = sg->length;
++
++	rest_of_page = PAGE_CACHE_SIZE - (sg->offset & (PAGE_CACHE_SIZE - 1));
++	walk->len_this_page = min(sg->length, rest_of_page);
++	walk->offset = sg->offset;
++}
++
++void scatterwalk_map(struct scatter_walk *walk, int out)
++{
++	walk->data = crypto_kmap(walk->page, out) + walk->offset;
++}
++
++static void scatterwalk_pagedone(struct scatter_walk *walk, int out,
++				 unsigned int more)
++{
++	/* walk->data may be pointing the first byte of the next page;
++	   however, we know we transfered at least one byte.  So,
++	   walk->data - 1 will be a virtual address in the mapped page. */
++
++	if (out)
++		flush_dcache_page(walk->page);
++
++	if (more) {
++		walk->len_this_segment -= walk->len_this_page;
++
++		if (walk->len_this_segment) {
++			walk->page++;
++			walk->len_this_page = min(walk->len_this_segment,
++						  (unsigned)PAGE_CACHE_SIZE);
++			walk->offset = 0;
++		}
++		else
++			scatterwalk_start(walk, sg_next(walk->sg));
++	}
++}
++
++void scatterwalk_done(struct scatter_walk *walk, int out, int more)
++{
++	crypto_kunmap(walk->data, out);
++	if (walk->len_this_page == 0 || !more)
++		scatterwalk_pagedone(walk, out, more);
++}
++
++/*
++ * Do not call this unless the total length of all of the fragments
++ * has been verified as multiple of the block size.
++ */
++int scatterwalk_copychunks(void *buf, struct scatter_walk *walk,
++			   size_t nbytes, int out)
++{
++	if (buf != walk->data) {
++		while (nbytes > walk->len_this_page) {
++			memcpy_dir(buf, walk->data, walk->len_this_page, out);
++			buf += walk->len_this_page;
++			nbytes -= walk->len_this_page;
++
++			crypto_kunmap(walk->data, out);
++			scatterwalk_pagedone(walk, out, 1);
++			scatterwalk_map(walk, out);
++		}
++
++		memcpy_dir(buf, walk->data, nbytes, out);
++	}
++
++	walk->offset += nbytes;
++	walk->len_this_page -= nbytes;
++	walk->len_this_segment -= nbytes;
++	return 0;
++}
+Index: drivers/net/wireless/rtl8187B/ieee80211/scatterwalk.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/scatterwalk.h	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,51 @@
++/*
++ * Cryptographic API.
++ *
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ * Copyright (c) 2002 Adam J. Richter <adam@yggdrasil.com>
++ * Copyright (c) 2004 Jean-Luc Cooke <jlcooke@certainkey.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ *
++ */
++
++#ifndef _CRYPTO_SCATTERWALK_H
++#define _CRYPTO_SCATTERWALK_H
++#include <linux/mm.h>
++#include <asm/scatterlist.h>
++
++struct scatter_walk {
++	struct scatterlist	*sg;
++	struct page		*page;
++	void			*data;
++	unsigned int		len_this_page;
++	unsigned int		len_this_segment;
++	unsigned int		offset;
++};
++
++/* Define sg_next is an inline routine now in case we want to change
++   scatterlist to a linked list later. */
++static inline struct scatterlist *sg_next(struct scatterlist *sg)
++{
++	return sg + 1;
++}
++
++static inline int scatterwalk_samebuf(struct scatter_walk *walk_in,
++				      struct scatter_walk *walk_out,
++				      void *src_p, void *dst_p)
++{
++	return walk_in->page == walk_out->page &&
++	       walk_in->offset == walk_out->offset &&
++	       walk_in->data == src_p && walk_out->data == dst_p;
++}
++
++void *scatterwalk_whichbuf(struct scatter_walk *walk, unsigned int nbytes, void *scratch);
++void scatterwalk_start(struct scatter_walk *walk, struct scatterlist *sg);
++int scatterwalk_copychunks(void *buf, struct scatter_walk *walk, size_t nbytes, int out);
++void scatterwalk_map(struct scatter_walk *walk, int out);
++void scatterwalk_done(struct scatter_walk *walk, int out, int more);
++
++#endif  /* _CRYPTO_SCATTERWALK_H */
+Index: drivers/net/wireless/rtl8187B/ieee80211/tags
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ieee80211/tags	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,1810 @@
++!_TAG_FILE_FORMAT	2	/extended format; --format=1 will not append ;" to lines/
++!_TAG_FILE_SORTED	1	/0=unsorted, 1=sorted, 2=foldcase/
++!_TAG_PROGRAM_AUTHOR	Darren Hiebert	/dhiebert@users.sourceforge.net/
++!_TAG_PROGRAM_NAME	Exuberant Ctags	//
++!_TAG_PROGRAM_URL	http://ctags.sourceforge.net	/official site/
++!_TAG_PROGRAM_VERSION	5.7	//
++AC2UP	ieee80211.h	990;"	d
++AES_BLOCK_LEN	ieee80211_crypt_ccmp.c	44;"	d	file:
++AES_BLOCK_SIZE	aes.c	66;"	d	file:
++AES_MAX_KEY_SIZE	aes.c	64;"	d	file:
++AES_MIN_KEY_SIZE	aes.c	63;"	d	file:
++ALG_KEY_LEN	ieee80211.h	734;"	d
++ARC4_BLOCK_SIZE	arc4.c	20;"	d	file:
++ARC4_MAX_KEY_SIZE	arc4.c	19;"	d	file:
++ARC4_MIN_KEY_SIZE	arc4.c	18;"	d	file:
++AUTH_ALG_OPEN_SYSTEM	ieee80211_softmac.c	3655;"	d	file:
++AUTH_ALG_SHARED_KEY	ieee80211_softmac.c	3656;"	d	file:
++ActionHeadLen	ieee80211_rx.c	594;"	d	file:
++BEACON_PROBE_SSID_ID_POSITION	ieee80211.h	776;"	d
++BadMac	rtl8187_mesh.h	/^	unsigned char	BadMac[MAX_SZ_BAD_MAC][MACADDRLEN];$/;"	m	struct:mshclass_priv
++CC	Makefile	/^CC = gcc$/;"	m
++CCMP_HDR_LEN	ieee80211_crypt_ccmp.c	45;"	d	file:
++CCMP_MIC_LEN	ieee80211_crypt_ccmp.c	46;"	d	file:
++CCMP_PN_LEN	ieee80211_crypt_ccmp.c	48;"	d	file:
++CCMP_TK_LEN	ieee80211_crypt_ccmp.c	47;"	d	file:
++CFG_IEEE80211_COMPUTE_FCS	ieee80211.h	1125;"	d
++CFG_IEEE80211_RESERVE_FCS	ieee80211.h	1124;"	d
++CFLAGS	Makefile	/^CFLAGS := -O2 -DMODULE -D__KERNEL__ -DEXPORT_SYMTAB -D__NO_VERSION__ ${WARN} ${INCLUDE}$/;"	m
++CHNL_TXPOWER_TRIPLE	dot11d.h	/^}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;$/;"	t	typeref:struct:_CHNL_TXPOWER_TRIPLE
++CIE_WATCHDOG_TH	dot11d.h	54;"	d
++COUNTRY_CODE_ETSI	ieee80211.h	/^	COUNTRY_CODE_ETSI = 2,$/;"	e	enum:__anon9
++COUNTRY_CODE_FCC	ieee80211.h	/^	COUNTRY_CODE_FCC = 0,$/;"	e	enum:__anon9
++COUNTRY_CODE_FRANCE	ieee80211.h	/^	COUNTRY_CODE_FRANCE = 4,$/;"	e	enum:__anon9
++COUNTRY_CODE_GLOBAL_DOMAIN	ieee80211.h	/^	COUNTRY_CODE_GLOBAL_DOMAIN = 9,$/;"	e	enum:__anon9
++COUNTRY_CODE_IC	ieee80211.h	/^	COUNTRY_CODE_IC = 1,$/;"	e	enum:__anon9
++COUNTRY_CODE_ISRAEL	ieee80211.h	/^	COUNTRY_CODE_ISRAEL = 7,$/;"	e	enum:__anon9
++COUNTRY_CODE_MKK	ieee80211.h	/^	COUNTRY_CODE_MKK = 5,$/;"	e	enum:__anon9
++COUNTRY_CODE_MKK1	ieee80211.h	/^	COUNTRY_CODE_MKK1 = 6,$/;"	e	enum:__anon9
++COUNTRY_CODE_SPAIN	ieee80211.h	/^	COUNTRY_CODE_SPAIN = 3,$/;"	e	enum:__anon9
++COUNTRY_CODE_TELEC	ieee80211.h	/^	COUNTRY_CODE_TELEC = 8,$/;"	e	enum:__anon9
++COUNTRY_CODE_WORLD_WIDE_13_INDEX	ieee80211.h	/^	COUNTRY_CODE_WORLD_WIDE_13_INDEX = 10$/;"	e	enum:__anon9
++CRC_LENGTH	ieee80211.h	950;"	d
++CRYPTO_ALG_TYPE_CIPHER	rtl_crypto.h	37;"	d
++CRYPTO_ALG_TYPE_COMPRESS	rtl_crypto.h	39;"	d
++CRYPTO_ALG_TYPE_DIGEST	rtl_crypto.h	38;"	d
++CRYPTO_ALG_TYPE_MASK	rtl_crypto.h	36;"	d
++CRYPTO_MAX_ALG_NAME	rtl_crypto.h	64;"	d
++CRYPTO_TFM_MODE_CBC	rtl_crypto.h	49;"	d
++CRYPTO_TFM_MODE_CFB	rtl_crypto.h	50;"	d
++CRYPTO_TFM_MODE_CTR	rtl_crypto.h	51;"	d
++CRYPTO_TFM_MODE_ECB	rtl_crypto.h	48;"	d
++CRYPTO_TFM_MODE_MASK	rtl_crypto.h	44;"	d
++CRYPTO_TFM_REQ_MASK	rtl_crypto.h	45;"	d
++CRYPTO_TFM_REQ_WEAK_KEY	rtl_crypto.h	53;"	d
++CRYPTO_TFM_RES_BAD_BLOCK_LEN	rtl_crypto.h	57;"	d
++CRYPTO_TFM_RES_BAD_FLAGS	rtl_crypto.h	58;"	d
++CRYPTO_TFM_RES_BAD_KEY_LEN	rtl_crypto.h	55;"	d
++CRYPTO_TFM_RES_BAD_KEY_SCHED	rtl_crypto.h	56;"	d
++CRYPTO_TFM_RES_MASK	rtl_crypto.h	46;"	d
++CRYPTO_TFM_RES_WEAK_KEY	rtl_crypto.h	54;"	d
++CRYPTO_UNSPEC	rtl_crypto.h	63;"	d
++CountryIeBuf	dot11d.h	/^	u8  CountryIeBuf[MAX_IE_LEN];$/;"	m	struct:_RT_DOT11D_INFO
++CountryIeBuf	ieee80211.h	/^	u8 CountryIeBuf[MAX_IE_LEN];$/;"	m	struct:ieee80211_network
++CountryIeLen	dot11d.h	/^	u16 CountryIeLen; \/\/ > 0 if CountryIeBuf[] contains valid country information element.$/;"	m	struct:_RT_DOT11D_INFO
++CountryIeLen	ieee80211.h	/^	u16 CountryIeLen;$/;"	m	struct:ieee80211_network
++CountryIeSrcAddr	dot11d.h	/^	u8  CountryIeSrcAddr[6]; \/\/ Source AP of the country IE.$/;"	m	struct:_RT_DOT11D_INFO
++CountryIeWatchdog	dot11d.h	/^	u8  CountryIeWatchdog; $/;"	m	struct:_RT_DOT11D_INFO
++D	aes.c	/^	u32 D[60];$/;"	m	struct:aes_ctx	file:
++DEFAULT_FTS	ieee80211.h	1104;"	d
++DEFAULT_MAX_SCAN_AGE	ieee80211.h	1103;"	d
++DOT11D_GetMaxTxPwrInDbm	dot11d.c	/^DOT11D_GetMaxTxPwrInDbm($/;"	f
++DOT11D_GetMaxTxPwrInDbm	dot11d.c	/^EXPORT_SYMBOL(DOT11D_GetMaxTxPwrInDbm);$/;"	v
++DOT11D_STATE	dot11d.h	/^}DOT11D_STATE;$/;"	t	typeref:enum:_DOT11D_STATE
++DOT11D_STATE_DONE	dot11d.h	/^	DOT11D_STATE_DONE,$/;"	e	enum:_DOT11D_STATE
++DOT11D_STATE_LEARNED	dot11d.h	/^	DOT11D_STATE_LEARNED,$/;"	e	enum:_DOT11D_STATE
++DOT11D_STATE_NONE	dot11d.h	/^	DOT11D_STATE_NONE = 0,$/;"	e	enum:_DOT11D_STATE
++DOT11D_ScanComplete	dot11d.c	/^DOT11D_ScanComplete($/;"	f
++DOT11D_ScanComplete	dot11d.c	/^EXPORT_SYMBOL(DOT11D_ScanComplete);$/;"	v
++DRV_NAME	ieee80211_module.c	61;"	d	file:
++DRV_NAME	ieee80211_softmac.c	3436;"	d	file:
++D_KEY	aes.c	104;"	d	file:
++DestMACAddr	rtl8187_mesh.h	/^	unsigned char		DestMACAddr[ETH_ALEN]; \/\/ modify for 6 address$/;"	m	struct:ieee80211_hdr_mesh
++DestMACAddr	rtl8187_mesh.h	/^	unsigned char		DestMACAddr[ETH_ALEN]; \/\/ modify for 6 address$/;"	m	struct:ieee80211_hdr_mesh_QOS
++Dot11d_Init	dot11d.c	/^Dot11d_Init(struct ieee80211_device *ieee)$/;"	f
++Dot11d_Init	dot11d.c	/^EXPORT_SYMBOL(Dot11d_Init);$/;"	v
++Dot11d_Reset	dot11d.c	/^Dot11d_Reset(struct ieee80211_device *ieee)$/;"	f
++Dot11d_Reset	dot11d.c	/^EXPORT_SYMBOL(Dot11d_Reset);$/;"	v
++Dot11d_UpdateCountryIe	dot11d.c	/^Dot11d_UpdateCountryIe($/;"	f
++Dot11d_UpdateCountryIe	dot11d.c	/^EXPORT_SYMBOL(Dot11d_UpdateCountryIe);$/;"	v
++E	aes.c	/^	u32 E[60];$/;"	m	struct:aes_ctx	file:
++EAPOL_ENCAP_ASF_ALERT	ieee80211.h	/^	EAPOL_ENCAP_ASF_ALERT$/;"	e	enum:eap_type
++EAPOL_KEY	ieee80211.h	/^	EAPOL_KEY,$/;"	e	enum:eap_type
++EAPOL_LOGOFF	ieee80211.h	/^	EAPOL_LOGOFF,$/;"	e	enum:eap_type
++EAPOL_START	ieee80211.h	/^	EAPOL_START,$/;"	e	enum:eap_type
++EAP_PACKET	ieee80211.h	/^	EAP_PACKET = 0,$/;"	e	enum:eap_type
++ETHERTYPE_IP	ieee80211.h	1007;"	d
++ETHERTYPE_PAE	ieee80211.h	1004;"	d
++ETHER_ADDR_LEN	ieee80211.h	996;"	d
++ETH_P_80211_RAW	ieee80211.h	480;"	d
++ETH_P_PAE	ieee80211.h	474;"	d
++ETH_P_PREAUTH	ieee80211.h	477;"	d
++E_KEY	aes.c	103;"	d	file:
++FirstChnl	dot11d.h	/^	u8 FirstChnl;$/;"	m	struct:_CHNL_TXPOWER_TRIPLE
++GET_CIE_WATCHDOG	dot11d.h	55;"	d
++GET_DOT11D_INFO	dot11d.h	41;"	d
++GET_MESH_PRIV	rtl8187_mesh.h	12;"	d
++GPIOChangeRFWorkItem	ieee80211.h	/^	struct delayed_work GPIOChangeRFWorkItem;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++GPIOChangeRFWorkItem	ieee80211.h	/^	struct work_struct GPIOChangeRFWorkItem;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++Hi16	ieee80211_crypt_tkip.c	/^static inline u16 Hi16(u32 val)$/;"	f	file:
++Hi8	ieee80211_crypt_tkip.c	/^static inline u8 Hi8(u16 val)$/;"	f	file:
++IEEE80211S_DEFAULT_MESHID	rtl8187_mesh.h	201;"	d
++IEEE80211_24GHZ_BAND	ieee80211.h	576;"	d
++IEEE80211_3ADDR_LEN	ieee80211.h	337;"	d
++IEEE80211_4ADDR_LEN	ieee80211.h	338;"	d
++IEEE80211_52GHZ_BAND	ieee80211.h	577;"	d
++IEEE80211_ASSOCIATING	ieee80211.h	/^	IEEE80211_ASSOCIATING,$/;"	e	enum:ieee80211_state
++IEEE80211_ASSOCIATING_AUTHENTICATED	ieee80211.h	/^	IEEE80211_ASSOCIATING_AUTHENTICATED,$/;"	e	enum:ieee80211_state
++IEEE80211_ASSOCIATING_AUTHENTICATING	ieee80211.h	/^	IEEE80211_ASSOCIATING_AUTHENTICATING,$/;"	e	enum:ieee80211_state
++IEEE80211_ASSOCIATING_RETRY	ieee80211.h	/^	IEEE80211_ASSOCIATING_RETRY,$/;"	e	enum:ieee80211_state
++IEEE80211_BASIC_RATE_MASK	ieee80211.h	593;"	d
++IEEE80211_CCK_BASIC_RATES_MASK	ieee80211.h	609;"	d
++IEEE80211_CCK_DEFAULT_RATES_MASK	ieee80211.h	611;"	d
++IEEE80211_CCK_MODULATION	ieee80211.h	573;"	d
++IEEE80211_CCK_RATES_MASK	ieee80211.h	608;"	d
++IEEE80211_CCK_RATE_11MB	ieee80211.h	583;"	d
++IEEE80211_CCK_RATE_11MB_MASK	ieee80211.h	598;"	d
++IEEE80211_CCK_RATE_1MB	ieee80211.h	580;"	d
++IEEE80211_CCK_RATE_1MB_MASK	ieee80211.h	595;"	d
++IEEE80211_CCK_RATE_2MB	ieee80211.h	581;"	d
++IEEE80211_CCK_RATE_2MB_MASK	ieee80211.h	596;"	d
++IEEE80211_CCK_RATE_5MB	ieee80211.h	582;"	d
++IEEE80211_CCK_RATE_5MB_MASK	ieee80211.h	597;"	d
++IEEE80211_CCK_RATE_LEN	ieee80211.h	579;"	d
++IEEE80211_CRYPT_H	ieee80211_crypt.h	24;"	d
++IEEE80211_DATA_HDR3_LEN	ieee80211.h	562;"	d
++IEEE80211_DATA_HDR4_LEN	ieee80211.h	563;"	d
++IEEE80211_DATA_LEN	ieee80211.h	213;"	d
++IEEE80211_DEBUG	ieee80211.h	405;"	d
++IEEE80211_DEBUG	ieee80211.h	410;"	d
++IEEE80211_DEBUG_DROP	ieee80211.h	461;"	d
++IEEE80211_DEBUG_EAP	ieee80211.h	460;"	d
++IEEE80211_DEBUG_FRAG	ieee80211.h	459;"	d
++IEEE80211_DEBUG_INFO	ieee80211.h	453;"	d
++IEEE80211_DEBUG_MGMT	ieee80211.h	458;"	d
++IEEE80211_DEBUG_RX	ieee80211.h	463;"	d
++IEEE80211_DEBUG_SCAN	ieee80211.h	456;"	d
++IEEE80211_DEBUG_STATE	ieee80211.h	457;"	d
++IEEE80211_DEBUG_TX	ieee80211.h	462;"	d
++IEEE80211_DEBUG_WX	ieee80211.h	455;"	d
++IEEE80211_DEFAULT_BASIC_RATE	ieee80211.h	840;"	d
++IEEE80211_DEFAULT_MESHID	ieee80211.h	841;"	d
++IEEE80211_DEFAULT_MESH_CHAN	ieee80211.h	842;"	d
++IEEE80211_DEFAULT_RATES_MASK	ieee80211.h	625;"	d
++IEEE80211_DEFAULT_TX_ESSID	ieee80211.h	839;"	d
++IEEE80211_DL_DROP	ieee80211.h	446;"	d
++IEEE80211_DL_EAP	ieee80211.h	445;"	d
++IEEE80211_DL_FRAG	ieee80211.h	444;"	d
++IEEE80211_DL_INFO	ieee80211.h	439;"	d
++IEEE80211_DL_MGMT	ieee80211.h	443;"	d
++IEEE80211_DL_RX	ieee80211.h	449;"	d
++IEEE80211_DL_SCAN	ieee80211.h	441;"	d
++IEEE80211_DL_STATE	ieee80211.h	442;"	d
++IEEE80211_DL_TX	ieee80211.h	448;"	d
++IEEE80211_DL_WX	ieee80211.h	440;"	d
++IEEE80211_DTIM_INVALID	ieee80211.h	961;"	d
++IEEE80211_DTIM_MBCAST	ieee80211.h	958;"	d
++IEEE80211_DTIM_UCAST	ieee80211.h	959;"	d
++IEEE80211_DTIM_VALID	ieee80211.h	960;"	d
++IEEE80211_ERROR	ieee80211.h	451;"	d
++IEEE80211_FC0_SUBTYPE_MASK	ieee80211.h	229;"	d
++IEEE80211_FC0_SUBTYPE_QOS	ieee80211.h	230;"	d
++IEEE80211_FC0_TYPE_DATA	ieee80211.h	228;"	d
++IEEE80211_FC0_TYPE_MASK	ieee80211.h	227;"	d
++IEEE80211_FCS_LEN	ieee80211.h	339;"	d
++IEEE80211_FCTL_DSTODS	ieee80211.h	350;"	d
++IEEE80211_FCTL_FROMDS	ieee80211.h	349;"	d
++IEEE80211_FCTL_FTYPE	ieee80211.h	346;"	d
++IEEE80211_FCTL_MOREDATA	ieee80211.h	354;"	d
++IEEE80211_FCTL_MOREFRAGS	ieee80211.h	351;"	d
++IEEE80211_FCTL_ORDER	ieee80211.h	356;"	d
++IEEE80211_FCTL_PM	ieee80211.h	353;"	d
++IEEE80211_FCTL_RETRY	ieee80211.h	352;"	d
++IEEE80211_FCTL_STYPE	ieee80211.h	347;"	d
++IEEE80211_FCTL_TODS	ieee80211.h	348;"	d
++IEEE80211_FCTL_VERS	ieee80211.h	345;"	d
++IEEE80211_FCTL_WEP	ieee80211.h	355;"	d
++IEEE80211_FRAG_CACHE_LEN	ieee80211.h	657;"	d
++IEEE80211_FRAME_LEN	ieee80211.h	224;"	d
++IEEE80211_FTYPE_CTL	ieee80211.h	359;"	d
++IEEE80211_FTYPE_DATA	ieee80211.h	360;"	d
++IEEE80211_FTYPE_MGMT	ieee80211.h	358;"	d
++IEEE80211_H	ieee80211.h	25;"	d
++IEEE80211_HLEN	ieee80211.h	223;"	d
++IEEE80211_LINKED	ieee80211.h	/^	IEEE80211_LINKED,$/;"	e	enum:ieee80211_state
++IEEE80211_LINKED_SCANNING	ieee80211.h	/^	IEEE80211_LINKED_SCANNING,$/;"	e	enum:ieee80211_state
++IEEE80211_MESH_LINKED	ieee80211.h	/^	IEEE80211_MESH_LINKED,$/;"	e	enum:ieee80211_state
++IEEE80211_MESH_SCANNING	ieee80211.h	/^	IEEE80211_MESH_SCANNING,$/;"	e	enum:ieee80211_state
++IEEE80211_MGMT_HDR_LEN	ieee80211.h	561;"	d
++IEEE80211_NOLINK	ieee80211.h	/^	IEEE80211_NOLINK = 0,$/;"	e	enum:ieee80211_state
++IEEE80211_NUM_CCK_RATES	ieee80211.h	629;"	d
++IEEE80211_NUM_OFDM_RATES	ieee80211.h	628;"	d
++IEEE80211_OFDM_BASIC_RATES_MASK	ieee80211.h	616;"	d
++IEEE80211_OFDM_DEFAULT_RATES_MASK	ieee80211.h	619;"	d
++IEEE80211_OFDM_MODULATION	ieee80211.h	574;"	d
++IEEE80211_OFDM_RATES_MASK	ieee80211.h	615;"	d
++IEEE80211_OFDM_RATE_12MB	ieee80211.h	587;"	d
++IEEE80211_OFDM_RATE_12MB_MASK	ieee80211.h	601;"	d
++IEEE80211_OFDM_RATE_18MB	ieee80211.h	588;"	d
++IEEE80211_OFDM_RATE_18MB_MASK	ieee80211.h	602;"	d
++IEEE80211_OFDM_RATE_24MB	ieee80211.h	589;"	d
++IEEE80211_OFDM_RATE_24MB_MASK	ieee80211.h	603;"	d
++IEEE80211_OFDM_RATE_36MB	ieee80211.h	590;"	d
++IEEE80211_OFDM_RATE_36MB_MASK	ieee80211.h	604;"	d
++IEEE80211_OFDM_RATE_48MB	ieee80211.h	591;"	d
++IEEE80211_OFDM_RATE_48MB_MASK	ieee80211.h	605;"	d
++IEEE80211_OFDM_RATE_54MB	ieee80211.h	592;"	d
++IEEE80211_OFDM_RATE_54MB_MASK	ieee80211.h	606;"	d
++IEEE80211_OFDM_RATE_6MB	ieee80211.h	585;"	d
++IEEE80211_OFDM_RATE_6MB_MASK	ieee80211.h	599;"	d
++IEEE80211_OFDM_RATE_9MB	ieee80211.h	586;"	d
++IEEE80211_OFDM_RATE_9MB_MASK	ieee80211.h	600;"	d
++IEEE80211_OFDM_RATE_LEN	ieee80211.h	584;"	d
++IEEE80211_OFDM_SHIFT_MASK_A	ieee80211.h	630;"	d
++IEEE80211_PS_DISABLED	ieee80211.h	963;"	d
++IEEE80211_PS_MBCAST	ieee80211.h	965;"	d
++IEEE80211_PS_UNICAST	ieee80211.h	964;"	d
++IEEE80211_QOS_HAS_SEQ	ieee80211.h	232;"	d
++IEEE80211_QOS_TID	ieee80211.h	925;"	d
++IEEE80211_SCTL_FRAG	ieee80211.h	397;"	d
++IEEE80211_SCTL_SEQ	ieee80211.h	398;"	d
++IEEE80211_SOFTMAC_ASSOC_RETRY_TIME	ieee80211.h	948;"	d
++IEEE80211_SOFTMAC_SCAN_TIME	ieee80211.h	946;"	d
++IEEE80211_STATMASK_NOISE	ieee80211.h	568;"	d
++IEEE80211_STATMASK_RATE	ieee80211.h	569;"	d
++IEEE80211_STATMASK_RSSI	ieee80211.h	567;"	d
++IEEE80211_STATMASK_SIGNAL	ieee80211.h	566;"	d
++IEEE80211_STATMASK_WEMASK	ieee80211.h	570;"	d
++IEEE80211_STYPE_ACK	ieee80211.h	380;"	d
++IEEE80211_STYPE_ASSOC_REQ	ieee80211.h	363;"	d
++IEEE80211_STYPE_ASSOC_RESP	ieee80211.h	364;"	d
++IEEE80211_STYPE_ATIM	ieee80211.h	370;"	d
++IEEE80211_STYPE_AUTH	ieee80211.h	372;"	d
++IEEE80211_STYPE_BEACON	ieee80211.h	369;"	d
++IEEE80211_STYPE_CFACK	ieee80211.h	390;"	d
++IEEE80211_STYPE_CFACKPOLL	ieee80211.h	392;"	d
++IEEE80211_STYPE_CFEND	ieee80211.h	381;"	d
++IEEE80211_STYPE_CFENDACK	ieee80211.h	382;"	d
++IEEE80211_STYPE_CFPOLL	ieee80211.h	391;"	d
++IEEE80211_STYPE_CTS	ieee80211.h	379;"	d
++IEEE80211_STYPE_DATA	ieee80211.h	385;"	d
++IEEE80211_STYPE_DATA_CFACK	ieee80211.h	386;"	d
++IEEE80211_STYPE_DATA_CFACKPOLL	ieee80211.h	388;"	d
++IEEE80211_STYPE_DATA_CFPOLL	ieee80211.h	387;"	d
++IEEE80211_STYPE_DEAUTH	ieee80211.h	373;"	d
++IEEE80211_STYPE_DISASSOC	ieee80211.h	371;"	d
++IEEE80211_STYPE_MANAGE_ACT	ieee80211.h	374;"	d
++IEEE80211_STYPE_NULLFUNC	ieee80211.h	389;"	d
++IEEE80211_STYPE_PROBE_REQ	ieee80211.h	367;"	d
++IEEE80211_STYPE_PROBE_RESP	ieee80211.h	368;"	d
++IEEE80211_STYPE_PSPOLL	ieee80211.h	377;"	d
++IEEE80211_STYPE_QOS_DATA	ieee80211.h	393;"	d
++IEEE80211_STYPE_QOS_NULL	ieee80211.h	394;"	d
++IEEE80211_STYPE_REASSOC_REQ	ieee80211.h	365;"	d
++IEEE80211_STYPE_REASSOC_RESP	ieee80211.h	366;"	d
++IEEE80211_STYPE_RTS	ieee80211.h	378;"	d
++IEEE80211_WARNING	ieee80211.h	452;"	d
++IEEE_A	ieee80211.h	1577;"	d
++IEEE_B	ieee80211.h	1578;"	d
++IEEE_CMD_MLME	ieee80211.h	77;"	d
++IEEE_CMD_SET_ENCRYPTION	ieee80211.h	76;"	d
++IEEE_CMD_SET_WPA_IE	ieee80211.h	75;"	d
++IEEE_CMD_SET_WPA_PARAM	ieee80211.h	74;"	d
++IEEE_CRYPT_ALG_NAME_LEN	ieee80211.h	118;"	d
++IEEE_CRYPT_ERR_CARD_CONF_FAILED	ieee80211.h	115;"	d
++IEEE_CRYPT_ERR_CRYPT_INIT_FAILED	ieee80211.h	112;"	d
++IEEE_CRYPT_ERR_KEY_SET_FAILED	ieee80211.h	113;"	d
++IEEE_CRYPT_ERR_TX_KEY_SET_FAILED	ieee80211.h	114;"	d
++IEEE_CRYPT_ERR_UNKNOWN_ADDR	ieee80211.h	111;"	d
++IEEE_CRYPT_ERR_UNKNOWN_ALG	ieee80211.h	110;"	d
++IEEE_G	ieee80211.h	1579;"	d
++IEEE_IBSS_MAC_HASH_SIZE	ieee80211.h	237;"	d
++IEEE_KEY_MGMT_IEEE8021X	ieee80211.h	101;"	d
++IEEE_KEY_MGMT_PSK	ieee80211.h	102;"	d
++IEEE_MESH_MAC_HASH_SIZE	ieee80211.h	238;"	d
++IEEE_MLME_STA_DEAUTH	ieee80211.h	106;"	d
++IEEE_MLME_STA_DISASSOC	ieee80211.h	107;"	d
++IEEE_MODE_MASK	ieee80211.h	1580;"	d
++IEEE_PACKET_RETRY_TIME	ieee80211_rx.c	447;"	d	file:
++IEEE_PARAM_AUTH_ALGS	ieee80211.h	83;"	d
++IEEE_PARAM_DROP_UNENCRYPTED	ieee80211.h	81;"	d
++IEEE_PARAM_IEEE_802_1X	ieee80211.h	84;"	d
++IEEE_PARAM_PRIVACY_INVOKED	ieee80211.h	82;"	d
++IEEE_PARAM_TKIP_COUNTERMEASURES	ieee80211.h	80;"	d
++IEEE_PARAM_WPAX_SELECT	ieee80211.h	87;"	d
++IEEE_PARAM_WPA_ENABLED	ieee80211.h	79;"	d
++IEEE_PROTO_RSN	ieee80211.h	91;"	d
++IEEE_PROTO_WPA	ieee80211.h	90;"	d
++IEEE_SOFTMAC_ASSOCIATE	ieee80211.h	1590;"	d
++IEEE_SOFTMAC_BEACONS	ieee80211.h	1611;"	d
++IEEE_SOFTMAC_PROBERQ	ieee80211.h	1593;"	d
++IEEE_SOFTMAC_PROBERS	ieee80211.h	1596;"	d
++IEEE_SOFTMAC_SCAN	ieee80211.h	1587;"	d
++IEEE_SOFTMAC_SINGLE_QUEUE	ieee80211.h	1606;"	d
++IEEE_SOFTMAC_TX_QUEUE	ieee80211.h	1601;"	d
++IEEE_WPAX_CCMP	ieee80211.h	98;"	d
++IEEE_WPAX_TKIP	ieee80211.h	96;"	d
++IEEE_WPAX_USEGROUP	ieee80211.h	94;"	d
++IEEE_WPAX_WEP104	ieee80211.h	99;"	d
++IEEE_WPAX_WEP40	ieee80211.h	95;"	d
++IEEE_WPAX_WRAP	ieee80211.h	97;"	d
++INCLUDE	Makefile	/^INCLUDE := -isystem \/lib\/modules\/`uname -r`\/build\/include$/;"	m
++INSTALL_PREFIX	Makefile	/^INSTALL_PREFIX :=$/;"	m
++IS_COUNTRY_IE_CHANGED	dot11d.h	49;"	d
++IS_COUNTRY_IE_VALID	dot11d.h	44;"	d
++IS_DOT11D_ENABLE	dot11d.h	43;"	d
++IS_DOT11D_STATE_DONE	dot11d.h	59;"	d
++IS_EQUAL_CIE_SRC	dot11d.h	46;"	d
++IW_MODE_MESH	rtl8187_mesh.h	198;"	d
++IW_QUAL_LEVEL_INVALID	ieee80211.h	176;"	d
++IW_QUAL_LEVEL_UPDATED	ieee80211.h	179;"	d
++IW_QUAL_NOISE_INVALID	ieee80211.h	177;"	d
++IW_QUAL_NOISE_UPDATED	ieee80211.h	180;"	d
++IW_QUAL_QUAL_INVALID	ieee80211.h	175;"	d
++IW_QUAL_QUAL_UPDATED	ieee80211.h	178;"	d
++IbssStartChnl	ieee80211.h	/^	u8	IbssStartChnl;$/;"	m	struct:ieee80211_device
++IsLegalChannel	dot11d.c	/^EXPORT_SYMBOL(IsLegalChannel);$/;"	v
++IsLegalChannel	dot11d.c	/^int IsLegalChannel($/;"	f
++KEY_TYPE_CCMP	ieee80211.h	64;"	d
++KEY_TYPE_NA	ieee80211.h	61;"	d
++KEY_TYPE_TKIP	ieee80211.h	63;"	d
++KEY_TYPE_WEP104	ieee80211.h	65;"	d
++KEY_TYPE_WEP40	ieee80211.h	62;"	d
++KM_BH_IRQ	kmap_types.h	/^	KM_BH_IRQ,$/;"	e	enum:km_type
++KM_BOUNCE_READ	kmap_types.h	/^	KM_BOUNCE_READ,$/;"	e	enum:km_type
++KM_SKB_DATA_SOFTIRQ	kmap_types.h	/^	KM_SKB_DATA_SOFTIRQ,$/;"	e	enum:km_type
++KM_SKB_SUNRPC_DATA	kmap_types.h	/^	KM_SKB_SUNRPC_DATA,$/;"	e	enum:km_type
++KM_SOFTIRQ0	kmap_types.h	/^	KM_SOFTIRQ0,$/;"	e	enum:km_type
++KM_SOFTIRQ1	kmap_types.h	/^	KM_SOFTIRQ1,$/;"	e	enum:km_type
++KM_TYPE_NR	kmap_types.h	/^	KM_TYPE_NR$/;"	e	enum:km_type
++KM_USER0	kmap_types.h	/^	KM_USER0,$/;"	e	enum:km_type
++KM_USER1	kmap_types.h	/^	KM_USER1,$/;"	e	enum:km_type
++KSRC	Makefile	/^KSRC := \/lib\/modules\/$(KVER)\/build$/;"	m
++KVER	Makefile	/^KVER  := $(shell uname -r)$/;"	m
++LED_CTL_LINK	ieee80211.h	/^	LED_CTL_LINK,$/;"	e	enum:_LED_CTL_MODE
++LED_CTL_MODE	ieee80211.h	/^} LED_CTL_MODE;$/;"	t	typeref:enum:_LED_CTL_MODE
++LED_CTL_NO_LINK	ieee80211.h	/^	LED_CTL_NO_LINK,$/;"	e	enum:_LED_CTL_MODE
++LED_CTL_POWER_OFF	ieee80211.h	/^	LED_CTL_POWER_OFF,$/;"	e	enum:_LED_CTL_MODE
++LED_CTL_POWER_ON	ieee80211.h	/^	LED_CTL_POWER_ON,$/;"	e	enum:_LED_CTL_MODE
++LED_CTL_RX	ieee80211.h	/^	LED_CTL_RX,$/;"	e	enum:_LED_CTL_MODE
++LED_CTL_SITE_SURVEY	ieee80211.h	/^	LED_CTL_SITE_SURVEY,$/;"	e	enum:_LED_CTL_MODE
++LED_CTL_TX	ieee80211.h	/^	LED_CTL_TX,$/;"	e	enum:_LED_CTL_MODE
++ListenInterval	ieee80211.h	/^	u16 ListenInterval;$/;"	m	struct:ieee80211_device
++Lo16	ieee80211_crypt_tkip.c	/^static inline u16 Lo16(u32 val)$/;"	f	file:
++Lo8	ieee80211_crypt_tkip.c	/^static inline u8 Lo8(u16 val)$/;"	f	file:
++MAC_ARG	ieee80211.h	1106;"	d
++MAC_FMT	ieee80211.h	1105;"	d
++MAX_CHANNEL_NUMBER	ieee80211.h	939;"	d
++MAX_CHANNEL_NUMBER	ieee80211.h	942;"	d
++MAX_CUSTOM_LEN	ieee80211_wx.c	42;"	d	file:
++MAX_FRAG_THRESHOLD	ieee80211.h	342;"	d
++MAX_IE_LEN	ieee80211.h	940;"	d
++MAX_MP	ieee80211.h	737;"	d
++MAX_NETWORK_COUNT	ieee80211.h	937;"	d
++MAX_RATES_EX_LENGTH	ieee80211.h	936;"	d
++MAX_RATES_LENGTH	ieee80211.h	935;"	d
++MAX_SP_Len	ieee80211.h	924;"	d
++MAX_SWEEP_TAB_ENTRIES	ieee80211.h	929;"	d
++MAX_SWEEP_TAB_ENTRIES_PER_PACKET	ieee80211.h	930;"	d
++MAX_SZ_BAD_MAC	rtl8187_mesh.h	102;"	d
++MAX_WPA_IE_LEN	ieee80211.h	952;"	d
++MFIE_TYPE_CF_SET	ieee80211.h	783;"	d
++MFIE_TYPE_CHALLENGE	ieee80211.h	787;"	d
++MFIE_TYPE_COUNTRY	ieee80211.h	786;"	d
++MFIE_TYPE_DS_SET	ieee80211.h	782;"	d
++MFIE_TYPE_ERP	ieee80211.h	788;"	d
++MFIE_TYPE_FH_SET	ieee80211.h	781;"	d
++MFIE_TYPE_GENERIC	ieee80211.h	791;"	d
++MFIE_TYPE_IBSS_SET	ieee80211.h	785;"	d
++MFIE_TYPE_RATES	ieee80211.h	780;"	d
++MFIE_TYPE_RATES_EX	ieee80211.h	790;"	d
++MFIE_TYPE_RSN	ieee80211.h	789;"	d
++MFIE_TYPE_SSID	ieee80211.h	779;"	d
++MFIE_TYPE_TIM	ieee80211.h	784;"	d
++MGMT_FRAME_FIXED_PART_LENGTH	ieee80211_rx.c	1239;"	d	file:
++MGMT_QUEUE_NUM	ieee80211.h	71;"	d
++MIN_FRAG_THRESHOLD	ieee80211.h	341;"	d
++MODDESTDIR	Makefile	/^MODDESTDIR := \/lib\/modules\/$(KVER)\/kernel\/drivers\/net\/wireless\/$(NIC_SELECT)$/;"	m
++MSECS	ieee80211.h	197;"	d
++MSECS	ieee80211.h	209;"	d
++MaxTxPowerInDbm	dot11d.h	/^	u8  MaxTxPowerInDbm;$/;"	m	struct:_CHNL_TXPOWER_TRIPLE
++MaxTxPwrDbmList	dot11d.h	/^	u8  MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];$/;"	m	struct:_RT_DOT11D_INFO
++MinPassiveChnlNum	ieee80211.h	/^	u8	MinPassiveChnlNum;$/;"	m	struct:ieee80211_device
++Mk16	ieee80211_crypt_tkip.c	/^static inline u16 Mk16(u8 hi, u8 lo)$/;"	f	file:
++Mk16_le	ieee80211_crypt_tkip.c	/^static inline u16 Mk16_le(u16 *v)$/;"	f	file:
++NETWORK_EMPTY_ESSID	ieee80211.h	954;"	d
++NETWORK_HAS_CCK	ieee80211.h	956;"	d
++NETWORK_HAS_OFDM	ieee80211.h	955;"	d
++NIC_SELECT	Makefile	/^NIC_SELECT = RTL8187B$/;"	m
++NumChnls	dot11d.h	/^	u8  NumChnls;$/;"	m	struct:_CHNL_TXPOWER_TRIPLE
++NumRxBcnInPeriod	ieee80211.h	/^	unsigned long NumRxBcnInPeriod;  \/\/YJ,add,080828$/;"	m	struct:ieee80211_device
++NumRxData	ieee80211.h	/^	u32 NumRxData;$/;"	m	struct:ieee80211_device
++NumRxDataInPeriod	ieee80211.h	/^	unsigned long NumRxDataInPeriod; \/\/YJ,add,080828$/;"	m	struct:ieee80211_device
++OBJS	Makefile	/^OBJS := ${patsubst %.c, %.o, ${wildcard *.c}}$/;"	m
++P80211_OUI_LEN	ieee80211.h	485;"	d
++P802_1H_OUI	ieee80211_tx.c	/^static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };$/;"	v	file:
++PCHNL_TXPOWER_TRIPLE	dot11d.h	/^}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;$/;"	t	typeref:struct:_CHNL_TXPOWER_TRIPLE
++PHASE1_LOOP_COUNT	ieee80211_crypt_tkip.c	279;"	d	file:
++PRT_DOT11D_INFO	dot11d.h	/^}RT_DOT11D_INFO, *PRT_DOT11D_INFO;$/;"	t	typeref:struct:_RT_DOT11D_INFO
++PWD	Makefile	/^PWD = $(shell pwd)$/;"	m
++QOS_CTL_NOTCONTAIN_ACK	ieee80211.h	926;"	d
++QOS_ctl	ieee80211.h	/^	u16 QOS_ctl;$/;"	m	struct:ieee80211_hdr_3addr_QOS
++QOS_ctl	ieee80211.h	/^	u16 QOS_ctl;$/;"	m	struct:ieee80211_hdr_QOS
++QOS_ctl	rtl8187_mesh.h	/^	u16					QOS_ctl;$/;"	m	struct:ieee80211_hdr_mesh_QOS
++QoS_Enable	ieee80211.h	/^	u8 QoS_Enable;$/;"	m	struct:ieee80211_network
++RESET_CIE_WATCHDOG	dot11d.h	56;"	d
++RFC1042_OUI	ieee80211_tx.c	/^static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };$/;"	v	file:
++RT_DOT11D_INFO	dot11d.h	/^}RT_DOT11D_INFO, *PRT_DOT11D_INFO;$/;"	t	typeref:struct:_RT_DOT11D_INFO
++RotR1	ieee80211_crypt_tkip.c	/^static inline u16 RotR1(u16 val)$/;"	f	file:
++RreqBegin	rtl8187_mesh.h	/^	unsigned int RreqBegin;$/;"	m	struct:mshclass_priv
++RreqEnd	rtl8187_mesh.h	/^	unsigned int RreqEnd;$/;"	m	struct:mshclass_priv
++RreqMAC	rtl8187_mesh.h	/^	unsigned char RreqMAC[AODV_RREQ_TABLE_SIZE][6];$/;"	m	struct:mshclass_priv
++S	arc4.c	/^	u8 S[256];$/;"	m	struct:arc4_ctx	file:
++SEC_ACTIVE_KEY	ieee80211.h	720;"	d
++SEC_AUTH_MODE	ieee80211.h	721;"	d
++SEC_ENABLED	ieee80211.h	724;"	d
++SEC_KEY_1	ieee80211.h	716;"	d
++SEC_KEY_2	ieee80211.h	717;"	d
++SEC_KEY_3	ieee80211.h	718;"	d
++SEC_KEY_4	ieee80211.h	719;"	d
++SEC_LEVEL	ieee80211.h	723;"	d
++SEC_LEVEL_0	ieee80211.h	726;"	d
++SEC_LEVEL_1	ieee80211.h	727;"	d
++SEC_LEVEL_2	ieee80211.h	728;"	d
++SEC_LEVEL_2_CKIP	ieee80211.h	729;"	d
++SEC_LEVEL_3	ieee80211.h	730;"	d
++SEC_UNICAST_GROUP	ieee80211.h	722;"	d
++SNAP_SIZE	ieee80211.h	496;"	d
++Sbox	ieee80211_crypt_tkip.c	/^static const u16 Sbox[256] =$/;"	v	file:
++SignalStrength	ieee80211.h	/^	u8 SignalStrength;$/;"	m	struct:ieee80211_network
++SrcMACAddr	rtl8187_mesh.h	/^	unsigned char		SrcMACAddr[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh
++SrcMACAddr	rtl8187_mesh.h	/^	unsigned char		SrcMACAddr[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh_QOS
++State	dot11d.h	/^	DOT11D_STATE State;$/;"	m	struct:_RT_DOT11D_INFO
++SwAntennaWorkItem	ieee80211.h	/^	struct delayed_work SwAntennaWorkItem;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++SwAntennaWorkItem	ieee80211.h	/^	struct work_struct SwAntennaWorkItem;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++TKIP_KEY_LEN	ieee80211_crypt_tkip.c	45;"	d	file:
++TTL	rtl8187_mesh.h	/^	INT8				TTL;$/;"	m	struct:ieee80211_hdr_mesh
++TTL	rtl8187_mesh.h	/^	INT8				TTL;$/;"	m	struct:ieee80211_hdr_mesh_QOS
++ToLegalChannel	dot11d.c	/^EXPORT_SYMBOL(ToLegalChannel);$/;"	v
++ToLegalChannel	dot11d.c	/^int ToLegalChannel($/;"	f
++TranslateToDbm8187	ieee80211_rx.c	/^TranslateToDbm8187($/;"	f
++Turbo_Enable	ieee80211.h	/^	u8 Turbo_Enable;\/\/enable turbo mode, added by thomas$/;"	m	struct:ieee80211_network
++UP2AC	ieee80211.h	983;"	d
++UPDATE_CIE_SRC	dot11d.h	47;"	d
++UPDATE_CIE_WATCHDOG	dot11d.h	57;"	d
++VLAN_PRI_MASK	ieee80211_tx.c	314;"	d	file:
++VLAN_PRI_SHIFT	ieee80211_tx.c	313;"	d	file:
++WARN	Makefile	/^WARN := -W$/;"	m
++WEP_KEYS	ieee80211.h	732;"	d
++WEP_KEY_LEN	ieee80211.h	733;"	d
++WEP_KEY_LEN	ieee80211_crypt_wep.c	44;"	d	file:
++WIFI_11S_MESH_ACTION	ieee80211_rx.c	596;"	d	file:
++WIFI_MESH_TYPE	ieee80211_rx.c	595;"	d	file:
++WIRELESS_SPY	ieee80211.h	469;"	d
++WLAN_AUTH_CHALLENGE_LEN	ieee80211.h	508;"	d
++WLAN_AUTH_OPEN	ieee80211.h	505;"	d
++WLAN_AUTH_SHARED_KEY	ieee80211.h	506;"	d
++WLAN_CAPABILITY_BSS	ieee80211.h	510;"	d
++WLAN_CAPABILITY_CF_POLLABLE	ieee80211.h	512;"	d
++WLAN_CAPABILITY_CF_POLL_REQUEST	ieee80211.h	513;"	d
++WLAN_CAPABILITY_CHANNEL_AGILITY	ieee80211.h	517;"	d
++WLAN_CAPABILITY_IBSS	ieee80211.h	511;"	d
++WLAN_CAPABILITY_PBCC	ieee80211.h	516;"	d
++WLAN_CAPABILITY_PRIVACY	ieee80211.h	514;"	d
++WLAN_CAPABILITY_SHORT_PREAMBLE	ieee80211.h	515;"	d
++WLAN_CAPABILITY_SHORT_SLOT	ieee80211.h	518;"	d
++WLAN_EID_CF_PARAMS	ieee80211.h	554;"	d
++WLAN_EID_CHALLENGE	ieee80211.h	557;"	d
++WLAN_EID_DS_PARAMS	ieee80211.h	553;"	d
++WLAN_EID_FH_PARAMS	ieee80211.h	552;"	d
++WLAN_EID_GENERIC	ieee80211.h	559;"	d
++WLAN_EID_IBSS_PARAMS	ieee80211.h	556;"	d
++WLAN_EID_RSN	ieee80211.h	558;"	d
++WLAN_EID_SSID	ieee80211.h	550;"	d
++WLAN_EID_SUPP_RATES	ieee80211.h	551;"	d
++WLAN_EID_TIM	ieee80211.h	555;"	d
++WLAN_FC_GET_STYPE	ieee80211.h	499;"	d
++WLAN_FC_GET_TYPE	ieee80211.h	498;"	d
++WLAN_GET_SEQ_FRAG	ieee80211.h	501;"	d
++WLAN_GET_SEQ_SEQ	ieee80211.h	502;"	d
++WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA	ieee80211.h	543;"	d
++WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA	ieee80211.h	544;"	d
++WLAN_REASON_DEAUTH_LEAVING	ieee80211.h	540;"	d
++WLAN_REASON_DISASSOC_AP_BUSY	ieee80211.h	542;"	d
++WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY	ieee80211.h	541;"	d
++WLAN_REASON_DISASSOC_STA_HAS_LEFT	ieee80211.h	545;"	d
++WLAN_REASON_PREV_AUTH_NOT_VALID	ieee80211.h	539;"	d
++WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH	ieee80211.h	546;"	d
++WLAN_REASON_UNSPECIFIED	ieee80211.h	538;"	d
++WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA	ieee80211.h	530;"	d
++WLAN_STATUS_ASSOC_DENIED_NOAGILITY	ieee80211.h	535;"	d
++WLAN_STATUS_ASSOC_DENIED_NOPBCC	ieee80211.h	534;"	d
++WLAN_STATUS_ASSOC_DENIED_NOSHORT	ieee80211.h	533;"	d
++WLAN_STATUS_ASSOC_DENIED_RATES	ieee80211.h	531;"	d
++WLAN_STATUS_ASSOC_DENIED_UNSPEC	ieee80211.h	525;"	d
++WLAN_STATUS_AUTH_TIMEOUT	ieee80211.h	529;"	d
++WLAN_STATUS_CAPS_UNSUPPORTED	ieee80211.h	523;"	d
++WLAN_STATUS_CHALLENGE_FAIL	ieee80211.h	528;"	d
++WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG	ieee80211.h	526;"	d
++WLAN_STATUS_REASSOC_NO_ASSOC	ieee80211.h	524;"	d
++WLAN_STATUS_SUCCESS	ieee80211.h	521;"	d
++WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION	ieee80211.h	527;"	d
++WLAN_STATUS_UNSPECIFIED_FAILURE	ieee80211.h	522;"	d
++WME_ACI_MASK	ieee80211.h	977;"	d
++WME_AC_BE	ieee80211.h	973;"	d
++WME_AC_BK	ieee80211.h	974;"	d
++WME_AC_PRAM_LEN	ieee80211.h	979;"	d
++WME_AC_VI	ieee80211.h	975;"	d
++WME_AC_VO	ieee80211.h	976;"	d
++WME_AIFSN_MASK	ieee80211.h	978;"	d
++WMM_Hang_8187	ieee80211.h	970;"	d
++WMM_all_frame	ieee80211.h	/^enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};$/;"	e	enum:__anon10
++WMM_four_frame	ieee80211.h	/^enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};$/;"	e	enum:__anon10
++WMM_six_frame	ieee80211.h	/^enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};$/;"	e	enum:__anon10
++WMM_two_frame	ieee80211.h	/^enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};$/;"	e	enum:__anon10
++WPA_OUI	ieee80211_softmac.c	/^u8 WPA_OUI[3] = {0x00, 0x50, 0xf2};$/;"	v
++_ASM_KMAP_TYPES_H	kmap_types.h	18;"	d
++_CHNL_TXPOWER_TRIPLE	dot11d.h	/^typedef struct _CHNL_TXPOWER_TRIPLE {$/;"	s
++_CRYPTO_INTERNAL_H	internal.h	13;"	d
++_CRYPTO_SCATTERWALK_H	scatterwalk.h	16;"	d
++_DOT11D_STATE	dot11d.h	/^typedef enum _DOT11D_STATE {$/;"	g
++_LED_CTL_MODE	ieee80211.h	/^typedef enum _LED_CTL_MODE {$/;"	g
++_LINUX_CRYPTO_H	rtl_crypto.h	17;"	d
++_RTL8187_MESH_H_	rtl8187_mesh.h	2;"	d
++_RT_DOT11D_INFO	dot11d.h	/^typedef struct _RT_DOT11D_INFO {$/;"	s
++_S_	ieee80211_crypt_tkip.c	/^static inline u16 _S_(u16 v)$/;"	f	file:
++__INC_DOT11D_H	dot11d.h	2;"	d
++__KMAP_TYPES_H	kmap_types.h	3;"	d
++__crt_alg	rtl_crypto.h	/^	struct crypto_alg *__crt_alg;$/;"	m	struct:crypto_tfm	typeref:struct:crypto_tfm::crypto_alg
++__initdata	aes.c	/^static u8 isb_tab[256] __initdata;$/;"	v	file:
++__initdata	aes.c	/^static u8 log_tab[256] __initdata;$/;"	v	file:
++__initdata	aes.c	/^static u8 pow_tab[256] __initdata;$/;"	v	file:
++__initdata	aes.c	/^static u8 sbx_tab[256] __initdata;$/;"	v	file:
++__this_module	ieee80211-rtl.mod.c	/^struct module __this_module$/;"	v	typeref:struct:module
++__this_module	ieee80211_crypt-rtl.mod.c	/^struct module __this_module$/;"	v	typeref:struct:module
++__this_module	ieee80211_crypt_ccmp-rtl.mod.c	/^struct module __this_module$/;"	v	typeref:struct:module
++__this_module	ieee80211_crypt_tkip-rtl.mod.c	/^struct module __this_module$/;"	v	typeref:struct:module
++__this_module	ieee80211_crypt_wep-rtl.mod.c	/^struct module __this_module$/;"	v	typeref:struct:module
++__used	ieee80211-rtl.mod.c	/^__used$/;"	v	file:
++__used	ieee80211-rtl.mod.c	/^__used$/;"	v	typeref:struct:____versions	file:
++__used	ieee80211_crypt-rtl.mod.c	/^__used$/;"	v	file:
++__used	ieee80211_crypt-rtl.mod.c	/^__used$/;"	v	typeref:struct:____versions	file:
++__used	ieee80211_crypt_ccmp-rtl.mod.c	/^__used$/;"	v	file:
++__used	ieee80211_crypt_ccmp-rtl.mod.c	/^__used$/;"	v	typeref:struct:____versions	file:
++__used	ieee80211_crypt_tkip-rtl.mod.c	/^__used$/;"	v	file:
++__used	ieee80211_crypt_tkip-rtl.mod.c	/^__used$/;"	v	typeref:struct:____versions	file:
++__used	ieee80211_crypt_wep-rtl.mod.c	/^__used$/;"	v	file:
++__used	ieee80211_crypt_wep-rtl.mod.c	/^__used$/;"	v	typeref:struct:____versions	file:
++aSifsTime	ieee80211.h	69;"	d
++abg_true	ieee80211.h	/^	int abg_true;   \/* ABG flag              *\/$/;"	m	struct:ieee80211_device
++ac_aci_acm_aifsn	ieee80211.h	/^	u8 ac_aci_acm_aifsn;$/;"	m	struct:ieee80211_wmm_ac_param
++ac_dir_tid	ieee80211.h	/^	u8 ac_dir_tid;$/;"	m	struct:ieee80211_wmm_ts_info
++ac_ecwmin_ecwmax	ieee80211.h	/^	u8 ac_ecwmin_ecwmax;$/;"	m	struct:ieee80211_wmm_ac_param
++ac_txop_limit	ieee80211.h	/^	u16 ac_txop_limit;$/;"	m	struct:ieee80211_wmm_ac_param
++ac_up_psb	ieee80211.h	/^	u8 ac_up_psb;$/;"	m	struct:ieee80211_wmm_ts_info
++active_key	ieee80211.h	/^	u16 active_key:2,$/;"	m	struct:ieee80211_security
++active_scan	ieee80211.h	/^	short active_scan;$/;"	m	struct:ieee80211_device
++actscanning	ieee80211.h	/^	bool actscanning;$/;"	m	struct:ieee80211_device
++addr1	ieee80211.h	/^	u8 addr1[6];$/;"	m	struct:ieee80211_header_data
++addr1	ieee80211.h	/^	u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr
++addr1	ieee80211.h	/^	u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr
++addr1	ieee80211.h	/^	u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr_QOS
++addr1	ieee80211.h	/^	u8 addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_QOS
++addr1	rtl8187_mesh.h	/^	u8					addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh
++addr1	rtl8187_mesh.h	/^	u8					addr1[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh_QOS
++addr2	ieee80211.h	/^	u8 addr2[6];$/;"	m	struct:ieee80211_header_data
++addr2	ieee80211.h	/^	u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr
++addr2	ieee80211.h	/^	u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr
++addr2	ieee80211.h	/^	u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr_QOS
++addr2	ieee80211.h	/^	u8 addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_QOS
++addr2	rtl8187_mesh.h	/^	u8					addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh
++addr2	rtl8187_mesh.h	/^	u8					addr2[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh_QOS
++addr3	ieee80211.h	/^	u8 addr3[6];$/;"	m	struct:ieee80211_header_data
++addr3	ieee80211.h	/^	u8 addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr
++addr3	ieee80211.h	/^	u8 addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr
++addr3	ieee80211.h	/^	u8 addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_3addr_QOS
++addr3	ieee80211.h	/^	u8 addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_QOS
++addr3	rtl8187_mesh.h	/^	u8					addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh
++addr3	rtl8187_mesh.h	/^	u8					addr3[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh_QOS
++addr4	ieee80211.h	/^	u8 addr4[ETH_ALEN];$/;"	m	struct:ieee80211_hdr
++addr4	ieee80211.h	/^	u8 addr4[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_QOS
++addr4	rtl8187_mesh.h	/^	u8					addr4[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh
++addr4	rtl8187_mesh.h	/^	u8					addr4[ETH_ALEN];$/;"	m	struct:ieee80211_hdr_mesh_QOS
++aes_alg	aes.c	/^static struct crypto_alg aes_alg = {$/;"	v	typeref:struct:crypto_alg	file:
++aes_ctx	aes.c	/^struct aes_ctx {$/;"	s	file:
++aes_decrypt	aes.c	/^static void aes_decrypt(void *ctx_arg, u8 *out, const u8 *in)$/;"	f	file:
++aes_encrypt	aes.c	/^static void aes_encrypt(void *ctx_arg, u8 *out, const u8 *in)$/;"	f	file:
++aes_fini	aes.c	/^module_exit(aes_fini);$/;"	v
++aes_fini	aes.c	/^static void __exit aes_fini(void)$/;"	f	file:
++aes_init	aes.c	/^module_init(aes_init);$/;"	v
++aes_init	aes.c	/^static int __init aes_init(void)$/;"	f	file:
++aes_set_key	aes.c	/^aes_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)$/;"	f	file:
++aid	ieee80211.h	/^	u16 aid;$/;"	m	struct:ieee80211_assoc_response_frame
++alg	ieee80211.h	/^			u8 alg[IEEE_CRYPT_ALG_NAME_LEN];$/;"	m	struct:ieee_param::__anon4::__anon8
++algorithm	ieee80211.h	/^	u16 algorithm;$/;"	m	struct:ieee80211_authentication
++algs	ieee80211_crypt.c	/^	struct list_head algs;$/;"	m	struct:ieee80211_crypto	typeref:struct:ieee80211_crypto::list_head	file:
++alloc_ieee80211	ieee80211.h	128;"	d
++alloc_ieee80211	ieee80211_module.c	/^EXPORT_SYMBOL(alloc_ieee80211);$/;"	v
++alloc_ieee80211	ieee80211_module.c	/^EXPORT_SYMBOL_NOVERS(alloc_ieee80211);$/;"	v
++alloc_ieee80211	ieee80211_module.c	/^struct net_device *alloc_ieee80211(int sizeof_priv)$/;"	f
++ap_mac_addr	ieee80211.h	/^	u8 ap_mac_addr[6];$/;"	m	struct:ieee80211_device
++arc4_alg	arc4.c	/^static struct crypto_alg arc4_alg = {$/;"	v	typeref:struct:crypto_alg	file:
++arc4_crypt	arc4.c	/^static void arc4_crypt(void *ctx_arg, u8 *out, const u8 *in)$/;"	f	file:
++arc4_ctx	arc4.c	/^struct arc4_ctx {$/;"	s	file:
++arc4_exit	arc4.c	/^module_exit(arc4_exit);$/;"	v
++arc4_exit	arc4.c	/^static void __exit arc4_exit(void)$/;"	f	file:
++arc4_init	arc4.c	/^module_init(arc4_init);$/;"	v
++arc4_init	arc4.c	/^static int __init arc4_init(void)$/;"	f	file:
++arc4_set_key	arc4.c	/^static int arc4_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)$/;"	f	file:
++assoc_id	ieee80211.h	/^	u16 assoc_id;$/;"	m	struct:ieee80211_device
++assoc_parse	ieee80211_softmac.c	/^static inline u16 assoc_parse(struct sk_buff *skb, int *aid)$/;"	f	file:
++assoc_rq_parse	ieee80211_softmac.c	/^int assoc_rq_parse(struct sk_buff *skb,u8* dest)$/;"	f
++associate_complete_wq	ieee80211.h	/^	struct tq_struct associate_complete_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++associate_complete_wq	ieee80211.h	/^	struct work_struct associate_complete_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++associate_procedure_wq	ieee80211.h	/^	struct tq_struct associate_procedure_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++associate_procedure_wq	ieee80211.h	/^	struct work_struct associate_procedure_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++associate_retry_wq	ieee80211.h	/^	struct tq_struct associate_retry_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++associate_retry_wq	ieee80211.h	/^        struct delayed_work associate_retry_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++associate_retry_wq	ieee80211.h	/^        struct work_struct associate_retry_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++associate_seq	ieee80211.h	/^	u16 associate_seq;$/;"	m	struct:ieee80211_device
++associate_timer	ieee80211.h	/^	struct timer_list associate_timer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
++atim_window	ieee80211.h	/^	u16 atim_window;$/;"	m	struct:ieee80211_network
++auth_algo	ieee80211.h	/^            auth_algo:4,$/;"	m	struct:ieee80211_security
++auth_mode	ieee80211.h	/^	    auth_mode:2,$/;"	m	struct:ieee80211_security
++auth_parse	ieee80211_softmac.c	/^static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)$/;"	f	file:
++auth_rq_parse	ieee80211_softmac.c	/^int auth_rq_parse(struct sk_buff *skb,u8* dest)$/;"	f
++bEnabled	dot11d.h	/^	bool bEnabled; \/\/ dot11MultiDomainCapabilityEnabled$/;"	m	struct:_RT_DOT11D_INFO
++bGlobalDomain	ieee80211.h	/^	bool bGlobalDomain;$/;"	m	struct:ieee80211_device
++bHwRadioOff	ieee80211.h	/^	bool bHwRadioOff;\/\/by lizhaoming$/;"	m	struct:ieee80211_device
++bInactivePs	ieee80211.h	/^	bool bInactivePs;$/;"	m	struct:ieee80211_device
++bWorldWide13	ieee80211.h	/^	bool bWorldWide13;\/\/lzm add 20081205$/;"	m	struct:ieee80211_device
++basic_rate	ieee80211.h	/^	int basic_rate;$/;"	m	struct:ieee80211_device
++bcrx_sta_key	ieee80211.h	/^	int bcrx_sta_key; \/* use individual keys to override default keys even$/;"	m	struct:ieee80211_device
++beacon_interval	ieee80211.h	/^	u16 beacon_interval;$/;"	m	struct:ieee80211_network
++beacon_interval	ieee80211.h	/^	u16 beacon_interval;$/;"	m	struct:ieee80211_probe_response
++beacon_lock	ieee80211.h	/^	spinlock_t beacon_lock;$/;"	m	struct:ieee80211_device
++beacon_timer	ieee80211.h	/^	struct timer_list beacon_timer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
++beacon_timer	rtl8187_mesh.h	/^	struct timer_list		beacon_timer;			\/\/ 1sec timer$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::timer_list
++beacon_txing	ieee80211.h	/^	short beacon_txing;$/;"	m	struct:ieee80211_device
++beaconflag_lock	ieee80211.h	/^        spinlock_t beaconflag_lock;$/;"	m	struct:ieee80211_device
++bool	ieee80211.h	/^typedef enum{false = 0, true} bool;$/;"	t	typeref:enum:__anon3
++bridge_tunnel_header	ieee80211_rx.c	/^static unsigned char bridge_tunnel_header[] =$/;"	v	file:
++broadcast_key_type	ieee80211.h	/^	u16 broadcast_key_type;$/;"	m	struct:ieee80211_device
++bssid	ieee80211.h	/^	u8 bssid[ETH_ALEN];$/;"	m	struct:ieee80211_network
++byte	aes.c	/^byte(const u32 x, const unsigned n)$/;"	f	file:
++c_next	proc.c	/^static void *c_next(struct seq_file *m, void *p, loff_t *pos)$/;"	f	file:
++c_show	proc.c	/^static int c_show(struct seq_file *m, void *p)$/;"	f	file:
++c_start	proc.c	/^static void *c_start(struct seq_file *m, loff_t *pos)$/;"	f	file:
++c_stop	proc.c	/^static void c_stop(struct seq_file *m, void *p)$/;"	f	file:
++capability	ieee80211.h	/^	u16 capability;$/;"	m	struct:ieee80211_assoc_request_frame
++capability	ieee80211.h	/^	u16 capability;$/;"	m	struct:ieee80211_assoc_response_frame
++capability	ieee80211.h	/^	u16 capability;$/;"	m	struct:ieee80211_network
++capability	ieee80211.h	/^	u16 capability;$/;"	m	struct:ieee80211_probe_response
++cbc_decrypt	cipher.c	/^static int cbc_decrypt(struct crypto_tfm *tfm,$/;"	f	file:
++cbc_decrypt_iv	cipher.c	/^static int cbc_decrypt_iv(struct crypto_tfm *tfm,$/;"	f	file:
++cbc_encrypt	cipher.c	/^static int cbc_encrypt(struct crypto_tfm *tfm,$/;"	f	file:
++cbc_encrypt_iv	cipher.c	/^static int cbc_encrypt_iv(struct crypto_tfm *tfm,$/;"	f	file:
++cbc_process	cipher.c	/^static void cbc_process(struct crypto_tfm *tfm, u8 *dst, u8 *src,$/;"	f	file:
++ccmp_init_blocks	ieee80211_crypt_ccmp.c	/^static void ccmp_init_blocks(struct crypto_tfm *tfm,$/;"	f	file:
++channel	ieee80211.h	/^	u8 channel;$/;"	m	struct:ieee80211_network
++channel_map	dot11d.h	/^	u8  channel_map[MAX_CHANNEL_NUMBER+1];  \/\/!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan)$/;"	m	struct:_RT_DOT11D_INFO
++channel_map	ieee80211.h	/^	int channel_map[MAX_CHANNEL_NUMBER+1];$/;"	m	struct:ieee80211_device
++cia_decrypt	rtl_crypto.h	/^	void (*cia_decrypt)(void *ctx, u8 *dst, const u8 *src);$/;"	m	struct:cipher_alg
++cia_encrypt	rtl_crypto.h	/^	void (*cia_encrypt)(void *ctx, u8 *dst, const u8 *src);$/;"	m	struct:cipher_alg
++cia_max_keysize	rtl_crypto.h	/^	unsigned int cia_max_keysize;$/;"	m	struct:cipher_alg
++cia_min_keysize	rtl_crypto.h	/^	unsigned int cia_min_keysize;$/;"	m	struct:cipher_alg
++cia_setkey	rtl_crypto.h	/^	int (*cia_setkey)(void *ctx, const u8 *key,$/;"	m	struct:cipher_alg
++cipher	rtl_crypto.h	/^		struct cipher_alg cipher;$/;"	m	union:crypto_alg::__anon1	typeref:struct:crypto_alg::__anon1::cipher_alg
++cipher	rtl_crypto.h	/^		struct cipher_tfm cipher;$/;"	m	union:crypto_tfm::__anon2	typeref:struct:crypto_tfm::__anon2::cipher_tfm
++cipher_alg	rtl_crypto.h	/^struct cipher_alg {$/;"	s
++cipher_tfm	rtl_crypto.h	/^struct cipher_tfm {$/;"	s
++cit_decrypt	rtl_crypto.h	/^	int (*cit_decrypt)(struct crypto_tfm *tfm,$/;"	m	struct:cipher_tfm
++cit_decrypt_iv	rtl_crypto.h	/^	int (*cit_decrypt_iv)(struct crypto_tfm *tfm,$/;"	m	struct:cipher_tfm
++cit_encrypt	rtl_crypto.h	/^	int (*cit_encrypt)(struct crypto_tfm *tfm,$/;"	m	struct:cipher_tfm
++cit_encrypt_iv	rtl_crypto.h	/^	int (*cit_encrypt_iv)(struct crypto_tfm *tfm,$/;"	m	struct:cipher_tfm
++cit_iv	rtl_crypto.h	/^	void *cit_iv;$/;"	m	struct:cipher_tfm
++cit_ivsize	rtl_crypto.h	/^	unsigned int cit_ivsize;$/;"	m	struct:cipher_tfm
++cit_mode	rtl_crypto.h	/^	u32 cit_mode;$/;"	m	struct:cipher_tfm
++cit_setkey	rtl_crypto.h	/^	int (*cit_setkey)(struct crypto_tfm *tfm,$/;"	m	struct:cipher_tfm
++cit_xor_block	rtl_crypto.h	/^	void (*cit_xor_block)(u8 *dst, const u8 *src);$/;"	m	struct:cipher_tfm
++cmd	ieee80211.h	/^	u32 cmd;$/;"	m	struct:ieee_param
++coa_compress	rtl_crypto.h	/^	int (*coa_compress)(void *ctx, const u8 *src, unsigned int slen,$/;"	m	struct:compress_alg
++coa_decompress	rtl_crypto.h	/^	int (*coa_decompress)(void *ctx, const u8 *src, unsigned int slen,$/;"	m	struct:compress_alg
++coa_exit	rtl_crypto.h	/^	void (*coa_exit)(void *ctx);$/;"	m	struct:compress_alg
++coa_init	rtl_crypto.h	/^	int (*coa_init)(void *ctx);$/;"	m	struct:compress_alg
++command	ieee80211.h	/^			int command;$/;"	m	struct:ieee_param::__anon4::__anon7
++compress	rtl_crypto.h	/^		struct compress_alg compress;$/;"	m	union:crypto_alg::__anon1	typeref:struct:crypto_alg::__anon1::compress_alg
++compress	rtl_crypto.h	/^		struct compress_tfm compress;$/;"	m	union:crypto_tfm::__anon2	typeref:struct:crypto_tfm::__anon2::compress_tfm
++compress_alg	rtl_crypto.h	/^struct compress_alg {$/;"	s
++compress_tfm	rtl_crypto.h	/^struct compress_tfm {$/;"	s
++cond_resched	internal.h	/^static inline void cond_resched(void)$/;"	f
++config	ieee80211.h	/^	u32 config;$/;"	m	struct:ieee80211_device
++control	ieee80211.h	/^	u8 control;$/;"	m	struct:ieee80211_rx_stats
++cot_compress	rtl_crypto.h	/^	int (*cot_compress)(struct crypto_tfm *tfm,$/;"	m	struct:compress_tfm
++cot_decompress	rtl_crypto.h	/^	int (*cot_decompress)(struct crypto_tfm *tfm,$/;"	m	struct:compress_tfm
++country_code_type_t	ieee80211.h	/^}country_code_type_t;	$/;"	t	typeref:enum:__anon9
++cpMacAddr	dot11d.h	40;"	d
++cra_blocksize	rtl_crypto.h	/^	unsigned int cra_blocksize;$/;"	m	struct:crypto_alg
++cra_cipher	rtl_crypto.h	99;"	d
++cra_compress	rtl_crypto.h	101;"	d
++cra_ctxsize	rtl_crypto.h	/^	unsigned int cra_ctxsize;$/;"	m	struct:crypto_alg
++cra_digest	rtl_crypto.h	100;"	d
++cra_flags	rtl_crypto.h	/^	u32 cra_flags;$/;"	m	struct:crypto_alg
++cra_list	rtl_crypto.h	/^	struct list_head cra_list;$/;"	m	struct:crypto_alg	typeref:struct:crypto_alg::list_head
++cra_module	rtl_crypto.h	/^	struct module *cra_module;$/;"	m	struct:crypto_alg	typeref:struct:crypto_alg::module
++cra_name	rtl_crypto.h	/^	const char cra_name[CRYPTO_MAX_ALG_NAME];$/;"	m	struct:crypto_alg
++cra_u	rtl_crypto.h	/^	} cra_u;$/;"	m	struct:crypto_alg	typeref:union:crypto_alg::__anon1
++crt_cipher	rtl_crypto.h	185;"	d
++crt_compress	rtl_crypto.h	187;"	d
++crt_digest	rtl_crypto.h	186;"	d
++crt_flags	rtl_crypto.h	/^	u32 crt_flags;$/;"	m	struct:crypto_tfm
++crt_u	rtl_crypto.h	/^	} crt_u;$/;"	m	struct:crypto_tfm	typeref:union:crypto_tfm::__anon2
++crypt	cipher.c	/^static int crypt(struct crypto_tfm *tfm,$/;"	f	file:
++crypt	ieee80211.h	/^		} crypt;$/;"	m	union:ieee_param::__anon4	typeref:struct:ieee_param::__anon4::__anon8
++crypt	ieee80211.h	/^	struct ieee80211_crypt_data *crypt[WEP_KEYS];$/;"	m	struct:ieee80211_crypt_data_list	typeref:struct:ieee80211_crypt_data_list::ieee80211_crypt_data
++crypt	ieee80211.h	/^	struct ieee80211_crypt_data *crypt[WEP_KEYS];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_crypt_data
++crypt_deinit_list	ieee80211.h	/^	struct list_head crypt_deinit_list;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
++crypt_deinit_timer	ieee80211.h	/^	struct timer_list crypt_deinit_timer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
++cryptfn_t	cipher.c	/^typedef void (cryptfn_t)(void *, u8 *, const u8 *);$/;"	t	file:
++cryptlist	ieee80211.h	/^	struct ieee80211_crypt_data_list* cryptlist[MAX_MP];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_crypt_data_list
++crypto_alg	rtl_crypto.h	/^struct crypto_alg {$/;"	s
++crypto_alg_autoload	autoload.c	/^void crypto_alg_autoload(const char *name)$/;"	f
++crypto_alg_available	api.c	/^EXPORT_SYMBOL_NOVERS(crypto_alg_available);$/;"	v
++crypto_alg_available	api.c	/^int crypto_alg_available(const char *name, u32 flags)$/;"	f
++crypto_alg_available	rtl_crypto.h	31;"	d
++crypto_alg_get	api.c	/^static inline int crypto_alg_get(struct crypto_alg *alg)$/;"	f	file:
++crypto_alg_list	api.c	/^LIST_HEAD(crypto_alg_list);$/;"	v
++crypto_alg_lookup	api.c	/^struct crypto_alg *crypto_alg_lookup(const char *name)$/;"	f
++crypto_alg_mod_lookup	autoload.c	/^struct crypto_alg *crypto_alg_mod_lookup(const char *name)$/;"	f
++crypto_alg_mod_lookup	internal.h	/^static inline struct crypto_alg *crypto_alg_mod_lookup(const char *name)$/;"	f
++crypto_alg_put	api.c	/^static inline void crypto_alg_put(struct crypto_alg *alg)$/;"	f	file:
++crypto_alg_sem	api.c	/^DECLARE_RWSEM(crypto_alg_sem);$/;"	v
++crypto_alloc_hmac_block	internal.h	/^static inline int crypto_alloc_hmac_block(struct crypto_tfm *tfm)$/;"	f
++crypto_alloc_tfm	api.c	/^EXPORT_SYMBOL_NOVERS(crypto_alloc_tfm);$/;"	v
++crypto_alloc_tfm	api.c	/^struct crypto_tfm *crypto_alloc_tfm(const char *name, u32 flags)$/;"	f
++crypto_alloc_tfm	ieee80211_crypt.h	87;"	d
++crypto_alloc_tfm	rtl_crypto.h	29;"	d
++crypto_cipher_decrypt	rtl_crypto.h	/^static inline int crypto_cipher_decrypt(struct crypto_tfm *tfm,$/;"	f
++crypto_cipher_decrypt_iv	rtl_crypto.h	/^static inline int crypto_cipher_decrypt_iv(struct crypto_tfm *tfm,$/;"	f
++crypto_cipher_encrypt	rtl_crypto.h	/^static inline int crypto_cipher_encrypt(struct crypto_tfm *tfm,$/;"	f
++crypto_cipher_encrypt_iv	rtl_crypto.h	/^static inline int crypto_cipher_encrypt_iv(struct crypto_tfm *tfm,$/;"	f
++crypto_cipher_get_iv	rtl_crypto.h	/^static inline void crypto_cipher_get_iv(struct crypto_tfm *tfm,$/;"	f
++crypto_cipher_set_iv	rtl_crypto.h	/^static inline void crypto_cipher_set_iv(struct crypto_tfm *tfm,$/;"	f
++crypto_cipher_setkey	rtl_crypto.h	/^static inline int crypto_cipher_setkey(struct crypto_tfm *tfm,$/;"	f
++crypto_comp_compress	rtl_crypto.h	/^static inline int crypto_comp_compress(struct crypto_tfm *tfm,$/;"	f
++crypto_comp_decompress	rtl_crypto.h	/^static inline int crypto_comp_decompress(struct crypto_tfm *tfm,$/;"	f
++crypto_compress	compress.c	/^static int crypto_compress(struct crypto_tfm *tfm,$/;"	f	file:
++crypto_decompress	compress.c	/^static int crypto_decompress(struct crypto_tfm *tfm,$/;"	f	file:
++crypto_digest_digest	rtl_crypto.h	/^static inline void crypto_digest_digest(struct crypto_tfm *tfm,$/;"	f
++crypto_digest_final	rtl_crypto.h	/^static inline void crypto_digest_final(struct crypto_tfm *tfm, u8 *out)$/;"	f
++crypto_digest_init	rtl_crypto.h	/^static inline void crypto_digest_init(struct crypto_tfm *tfm)$/;"	f
++crypto_digest_setkey	rtl_crypto.h	/^static inline int crypto_digest_setkey(struct crypto_tfm *tfm,$/;"	f
++crypto_digest_update	rtl_crypto.h	/^static inline void crypto_digest_update(struct crypto_tfm *tfm,$/;"	f
++crypto_exit_cipher_ops	cipher.c	/^void crypto_exit_cipher_ops(struct crypto_tfm *tfm)$/;"	f
++crypto_exit_compress_ops	compress.c	/^void crypto_exit_compress_ops(struct crypto_tfm *tfm)$/;"	f
++crypto_exit_digest_ops	digest.c	/^void crypto_exit_digest_ops(struct crypto_tfm *tfm)$/;"	f
++crypto_exit_ops	api.c	/^static void crypto_exit_ops(struct crypto_tfm *tfm)$/;"	f	file:
++crypto_free_hmac_block	internal.h	/^static inline void crypto_free_hmac_block(struct crypto_tfm *tfm)$/;"	f
++crypto_free_tfm	api.c	/^EXPORT_SYMBOL_NOVERS(crypto_free_tfm);$/;"	v
++crypto_free_tfm	api.c	/^void crypto_free_tfm(struct crypto_tfm *tfm)$/;"	f
++crypto_free_tfm	ieee80211_crypt.h	88;"	d
++crypto_free_tfm	rtl_crypto.h	30;"	d
++crypto_info_open	proc.c	/^static int crypto_info_open(struct inode *inode, struct file *file)$/;"	f	file:
++crypto_init_cipher_flags	cipher.c	/^int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags)$/;"	f
++crypto_init_cipher_ops	cipher.c	/^int crypto_init_cipher_ops(struct crypto_tfm *tfm)$/;"	f
++crypto_init_compress_flags	compress.c	/^int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags)$/;"	f
++crypto_init_compress_ops	compress.c	/^int crypto_init_compress_ops(struct crypto_tfm *tfm)$/;"	f
++crypto_init_digest_flags	digest.c	/^int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags)$/;"	f
++crypto_init_digest_ops	digest.c	/^int crypto_init_digest_ops(struct crypto_tfm *tfm)$/;"	f
++crypto_init_flags	api.c	/^static int crypto_init_flags(struct crypto_tfm *tfm, u32 flags)$/;"	f	file:
++crypto_init_ops	api.c	/^static int crypto_init_ops(struct crypto_tfm *tfm)$/;"	f	file:
++crypto_init_proc	internal.h	/^static inline void crypto_init_proc(void)$/;"	f
++crypto_init_proc	proc.c	/^void __init crypto_init_proc(void)$/;"	f
++crypto_km_types	scatterwalk.c	/^enum km_type crypto_km_types[] = {$/;"	v	typeref:enum:km_type
++crypto_kmap	internal.h	/^static inline void *crypto_kmap(struct page *page, int out)$/;"	f
++crypto_kmap_type	internal.h	/^static inline enum km_type crypto_kmap_type(int out)$/;"	f
++crypto_kunmap	internal.h	/^static inline void crypto_kunmap(void *vaddr, int out)$/;"	f
++crypto_register_alg	api.c	/^EXPORT_SYMBOL_NOVERS(crypto_register_alg);$/;"	v
++crypto_register_alg	api.c	/^int crypto_register_alg(struct crypto_alg *alg)$/;"	f
++crypto_register_alg	rtl_crypto.h	27;"	d
++crypto_seq_ops	proc.c	/^static struct seq_operations crypto_seq_ops = {$/;"	v	typeref:struct:seq_operations	file:
++crypto_tfm	rtl_crypto.h	/^struct crypto_tfm {$/;"	s
++crypto_tfm_alg_blocksize	rtl_crypto.h	/^static inline unsigned int crypto_tfm_alg_blocksize(struct crypto_tfm *tfm)$/;"	f
++crypto_tfm_alg_digestsize	rtl_crypto.h	/^static inline unsigned int crypto_tfm_alg_digestsize(struct crypto_tfm *tfm)$/;"	f
++crypto_tfm_alg_ivsize	rtl_crypto.h	/^static inline unsigned int crypto_tfm_alg_ivsize(struct crypto_tfm *tfm)$/;"	f
++crypto_tfm_alg_max_keysize	rtl_crypto.h	/^static inline unsigned int crypto_tfm_alg_max_keysize(struct crypto_tfm *tfm)$/;"	f
++crypto_tfm_alg_min_keysize	rtl_crypto.h	/^static inline unsigned int crypto_tfm_alg_min_keysize(struct crypto_tfm *tfm)$/;"	f
++crypto_tfm_alg_modname	rtl_crypto.h	/^static inline const char *crypto_tfm_alg_modname(struct crypto_tfm *tfm)$/;"	f
++crypto_tfm_alg_name	rtl_crypto.h	/^static inline const char *crypto_tfm_alg_name(struct crypto_tfm *tfm)$/;"	f
++crypto_tfm_alg_type	rtl_crypto.h	/^static inline u32 crypto_tfm_alg_type(struct crypto_tfm *tfm)$/;"	f
++crypto_tfm_ctx	internal.h	/^static inline void *crypto_tfm_ctx(struct crypto_tfm *tfm)$/;"	f
++crypto_unregister_alg	api.c	/^EXPORT_SYMBOL_NOVERS(crypto_unregister_alg);$/;"	v
++crypto_unregister_alg	api.c	/^int crypto_unregister_alg(struct crypto_alg *alg)$/;"	f
++crypto_unregister_alg	rtl_crypto.h	28;"	d
++crypto_yield	internal.h	/^static inline void crypto_yield(struct crypto_tfm *tfm)$/;"	f
++ctrl	ieee80211.h	/^        u8    ctrl;   \/* always 0x03 *\/$/;"	m	struct:ieee80211_snap_hdr
++current_network	ieee80211.h	/^	struct ieee80211_network current_network;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_network
++data	ieee80211.h	/^			u8 data[0];$/;"	m	struct:ieee_param::__anon4::__anon6
++data	ieee80211.h	/^	u8 data[0];$/;"	m	struct:ieee80211_info_element
++data	scatterwalk.h	/^	void			*data;$/;"	m	struct:scatter_walk
++data_hard_resume	ieee80211.h	/^	void (*data_hard_resume)(struct net_device *dev);$/;"	m	struct:ieee80211_device
++data_hard_stop	ieee80211.h	/^	void (*data_hard_stop)(struct net_device *dev);$/;"	m	struct:ieee80211_device
++debug	ieee80211_module.c	/^static int debug = 0;$/;"	v	file:
++decrypt_mpdu	ieee80211_crypt.h	/^	int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);$/;"	m	struct:ieee80211_crypto_ops
++decrypt_msdu	ieee80211_crypt.h	/^	int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,$/;"	m	struct:ieee80211_crypto_ops
++deinit	ieee80211_crypt.h	/^	void (*deinit)(void *priv);$/;"	m	struct:ieee80211_crypto_ops
++delay_bound	ieee80211.h	/^	u32 delay_bound;$/;"	m	struct:ieee80211_wmm_tspec_elem
++dequeue_mgmt	ieee80211_softmac.c	/^struct sk_buff *dequeue_mgmt(struct ieee80211_device *ieee)$/;"	f
++dev	ieee80211.h	/^	struct net_device *dev;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::net_device
++dia_digestsize	rtl_crypto.h	/^	unsigned int dia_digestsize;$/;"	m	struct:digest_alg
++dia_final	rtl_crypto.h	/^	void (*dia_final)(void *ctx, u8 *out);$/;"	m	struct:digest_alg
++dia_init	rtl_crypto.h	/^	void (*dia_init)(void *ctx);$/;"	m	struct:digest_alg
++dia_setkey	rtl_crypto.h	/^	int (*dia_setkey)(void *ctx, const u8 *key,$/;"	m	struct:digest_alg
++dia_update	rtl_crypto.h	/^	void (*dia_update)(void *ctx, const u8 *data, unsigned int len);$/;"	m	struct:digest_alg
++digest	digest.c	/^static void digest(struct crypto_tfm *tfm,$/;"	f	file:
++digest	rtl_crypto.h	/^		struct digest_alg digest;$/;"	m	union:crypto_alg::__anon1	typeref:struct:crypto_alg::__anon1::digest_alg
++digest	rtl_crypto.h	/^		struct digest_tfm digest;$/;"	m	union:crypto_tfm::__anon2	typeref:struct:crypto_tfm::__anon2::digest_tfm
++digest_alg	rtl_crypto.h	/^struct digest_alg {$/;"	s
++digest_tfm	rtl_crypto.h	/^struct digest_tfm {$/;"	s
++dit_digest	rtl_crypto.h	/^	void (*dit_digest)(struct crypto_tfm *tfm, struct scatterlist *sg,$/;"	m	struct:digest_tfm
++dit_final	rtl_crypto.h	/^	void (*dit_final)(struct crypto_tfm *tfm, u8 *out);$/;"	m	struct:digest_tfm
++dit_hmac_block	rtl_crypto.h	/^	void *dit_hmac_block;$/;"	m	struct:digest_tfm
++dit_init	rtl_crypto.h	/^	void (*dit_init)(struct crypto_tfm *tfm);$/;"	m	struct:digest_tfm
++dit_setkey	rtl_crypto.h	/^	int (*dit_setkey)(struct crypto_tfm *tfm,$/;"	m	struct:digest_tfm
++dit_update	rtl_crypto.h	/^	void (*dit_update)(struct crypto_tfm *tfm,$/;"	m	struct:digest_tfm
++dot11MeshInfo	rtl8187_mesh.h	/^		struct mesh_info		dot11MeshInfo; \/\/ contains meshMaxAssocNum$/;"	m	struct:mshclass_priv::__anon12	typeref:struct:mshclass_priv::__anon12::mesh_info
++dot11MeshInfo	rtl8187_mesh.h	/^	struct mesh_info		dot11MeshInfo; \/\/ extrated from wifi_mib (ieee802_mib.h)$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::mesh_info
++dot11RSNAStatsCCMPDecryptErrors	ieee80211_crypt_ccmp.c	/^	u32 dot11RSNAStatsCCMPDecryptErrors;$/;"	m	struct:ieee80211_ccmp_data	file:
++dot11RSNAStatsCCMPFormatErrors	ieee80211_crypt_ccmp.c	/^	u32 dot11RSNAStatsCCMPFormatErrors;$/;"	m	struct:ieee80211_ccmp_data	file:
++dot11RSNAStatsCCMPReplays	ieee80211_crypt_ccmp.c	/^	u32 dot11RSNAStatsCCMPReplays;$/;"	m	struct:ieee80211_ccmp_data	file:
++dot11RSNAStatsTKIPICVErrors	ieee80211_crypt_tkip.c	/^	u32 dot11RSNAStatsTKIPICVErrors;$/;"	m	struct:ieee80211_tkip_data	file:
++dot11RSNAStatsTKIPLocalMICFailures	ieee80211_crypt_tkip.c	/^	u32 dot11RSNAStatsTKIPLocalMICFailures;$/;"	m	struct:ieee80211_tkip_data	file:
++dot11RSNAStatsTKIPReplays	ieee80211_crypt_tkip.c	/^	u32 dot11RSNAStatsTKIPReplays;$/;"	m	struct:ieee80211_tkip_data	file:
++drop_unencrypted	ieee80211.h	/^	int drop_unencrypted;$/;"	m	struct:ieee80211_device
++dsap	ieee80211.h	/^        u8    dsap;   \/* always 0xAA *\/$/;"	m	struct:ieee80211_snap_hdr
++dst_addr	ieee80211.h	/^	u8 dst_addr[ETH_ALEN];$/;"	m	struct:ieee80211_frag_entry
++dtim_data	ieee80211.h	/^	u8 dtim_data;$/;"	m	struct:ieee80211_network
++dtim_period	ieee80211.h	/^	u8 dtim_period;$/;"	m	struct:ieee80211_network
++dump_chnl_map	dot11d.c	/^void dump_chnl_map(u8 * channel_map)$/;"	f
++duration_id	ieee80211.h	/^	u16 duration_id;$/;"	m	struct:ieee80211_hdr
++duration_id	ieee80211.h	/^	u16 duration_id;$/;"	m	struct:ieee80211_hdr_3addr
++duration_id	ieee80211.h	/^	u16 duration_id;$/;"	m	struct:ieee80211_hdr_3addr_QOS
++duration_id	ieee80211.h	/^	u16 duration_id;$/;"	m	struct:ieee80211_hdr_QOS
++duration_id	ieee80211.h	/^	u16 duration_id;$/;"	m	struct:ieee80211_header_data
++duration_id	rtl8187_mesh.h	/^	u16					duration_id;$/;"	m	struct:ieee80211_hdr_mesh
++duration_id	rtl8187_mesh.h	/^	u16					duration_id;$/;"	m	struct:ieee80211_hdr_mesh_QOS
++eap_get_type	ieee80211.h	/^static inline const char *eap_get_type(int type)$/;"	f
++eap_type	ieee80211.h	/^enum eap_type {$/;"	g
++eap_types	ieee80211.h	/^static const char *eap_types[] = {$/;"	v
++eapol	ieee80211.h	/^struct eapol {$/;"	s
++ecb_decrypt	cipher.c	/^static int ecb_decrypt(struct crypto_tfm *tfm,$/;"	f	file:
++ecb_encrypt	cipher.c	/^static int ecb_encrypt(struct crypto_tfm *tfm,$/;"	f	file:
++ecb_process	cipher.c	/^static void ecb_process(struct crypto_tfm *tfm, u8 *dst, u8 *src,$/;"	f	file:
++enabled	ieee80211.h	/^            enabled:1,$/;"	m	struct:ieee80211_security
++encrypt_mpdu	ieee80211_crypt.h	/^	int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);$/;"	m	struct:ieee80211_crypto_ops
++encrypt_msdu	ieee80211_crypt.h	/^	int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);$/;"	m	struct:ieee80211_crypto_ops
++encrypted	ieee80211.h	/^	u8 encrypted;$/;"	m	struct:ieee80211_txb
++enqueue_mgmt	ieee80211_softmac.c	/^void enqueue_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb)$/;"	f
++enter_sleep_state	ieee80211.h	/^	void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);$/;"	m	struct:ieee80211_device
++eqMacAddr	dot11d.h	39;"	d
++err	ieee80211.h	/^			u32 err;$/;"	m	struct:ieee_param::__anon4::__anon8
++escape_essid	ieee80211.h	/^static inline const char *escape_essid(const char *essid, u8 essid_len) {$/;"	f
++ether_dhost	ieee80211.h	/^	u8 ether_dhost[ETHER_ADDR_LEN];$/;"	m	struct:ether_header
++ether_header	ieee80211.h	/^struct	ether_header {$/;"	s
++ether_shost	ieee80211.h	/^	u8 ether_shost[ETHER_ADDR_LEN];$/;"	m	struct:ether_header
++ether_type	ieee80211.h	/^	u16 ether_type;$/;"	m	struct:ether_header
++ethertype	ieee80211.h	/^	u16 ethertype;$/;"	m	struct:eapol
++expire	rtl8187_mesh.h	/^	unsigned long expire;$/;"	m	struct:myMeshIDNode
++expire_timer	rtl8187_mesh.h	/^	struct timer_list		expire_timer;			\/\/ 1sec timer$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::timer_list
++ext_entry	ieee80211.h	/^	void *ext_entry;$/;"	m	struct:ieee80211_network
++ext_ieee80211_send_beacon_wq	ieee80211_softmac.c	/^void ext_ieee80211_send_beacon_wq(struct work_struct *work)$/;"	f
++ext_patch_get_beacon_get_probersp	ieee80211.h	/^	struct sk_buff* (*ext_patch_get_beacon_get_probersp)(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ext_patch_get_beacon_get_probersp
++ext_patch_ieee80211_acl_query	ieee80211.h	/^	u8 (*ext_patch_ieee80211_acl_query) (struct ieee80211_device *ieee, u8 *sa);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_assoc_resp_by_net_1	ieee80211.h	/^	void (*ext_patch_ieee80211_assoc_resp_by_net_1) (struct ieee80211_assoc_response_frame *assoc);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_assoc_resp_by_net_2	ieee80211.h	/^	u8* (*ext_patch_ieee80211_assoc_resp_by_net_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, int pkt_type, struct sk_buff *skb);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_association_req_1	ieee80211.h	/^	void (*ext_patch_ieee80211_association_req_1) (struct ieee80211_assoc_request_frame *hdr);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_association_req_2	ieee80211.h	/^	u8* (*ext_patch_ieee80211_association_req_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, struct sk_buff *skb);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_ext_stop_scan_wq_set_channel	ieee80211.h	/^	int (*ext_patch_ieee80211_ext_stop_scan_wq_set_channel) (struct ieee80211_device *ieee);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_probe_req_1	ieee80211.h	/^	short (*ext_patch_ieee80211_probe_req_1) (struct ieee80211_device *ieee); \/\/ return = 0: no more phases,  >0: another phase$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_probe_req_2	ieee80211.h	/^	u8* (*ext_patch_ieee80211_probe_req_2) (struct ieee80211_device *ieee, struct sk_buff *skb, u8 *tag); \/\/ return tag$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_process_probe_response_1	ieee80211.h	/^	unsigned int(*ext_patch_ieee80211_process_probe_response_1)(struct ieee80211_device *ieee,	struct ieee80211_probe_response *beacon,	struct ieee80211_rx_stats *stats);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_frame_get_hdrlen	ieee80211.h	/^	int (*ext_patch_ieee80211_rx_frame_get_hdrlen) (struct ieee80211_device *ieee, struct sk_buff *skb);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_frame_softmac_on_assoc_req	ieee80211.h	/^	int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_req) (struct ieee80211_device *ieee, struct sk_buff *skb);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp	ieee80211.h	/^	int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp) (struct ieee80211_device *ieee, struct sk_buff *skb);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_frame_softmac_on_auth	ieee80211.h	/^	int (*ext_patch_ieee80211_rx_frame_softmac_on_auth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_frame_softmac_on_deauth	ieee80211.h	/^	int (*ext_patch_ieee80211_rx_frame_softmac_on_deauth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_is_valid_framectl	ieee80211.h	/^	int (*ext_patch_ieee80211_rx_is_valid_framectl) (struct ieee80211_device *ieee, u16 fc, u16 type, u16 stype);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_mgt_on_probe_req	ieee80211.h	/^	void (*ext_patch_ieee80211_rx_mgt_on_probe_req) ( struct ieee80211_device *ieee, struct ieee80211_probe_request *beacon, struct ieee80211_rx_stats *stats);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_mgt_update_expire	ieee80211.h	/^	void (*ext_patch_ieee80211_rx_mgt_update_expire) ( struct ieee80211_device *ieee, struct sk_buff *skb);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_on_rx	ieee80211.h	/^	int (*ext_patch_ieee80211_rx_on_rx) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats, u16 type, u16 stype);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_rx_process_dataframe	ieee80211.h	/^	int (*ext_patch_ieee80211_rx_process_dataframe) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_softmac_xmit_get_rate	ieee80211.h	/^	int (*ext_patch_ieee80211_softmac_xmit_get_rate) (struct ieee80211_device *ieee, struct sk_buff *skb);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_start_mesh	ieee80211.h	/^	void (*ext_patch_ieee80211_start_mesh)(struct ieee80211_device *ieee);$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_start_protocol	ieee80211.h	/^	int (*ext_patch_ieee80211_start_protocol) (struct ieee80211_device *ieee); \/\/ start special mode$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_stop_protocol	ieee80211.h	/^	void (*ext_patch_ieee80211_stop_protocol) (struct ieee80211_device *ieee); \/\/ stop timer$/;"	m	struct:ieee80211_device
++ext_patch_ieee80211_xmit	ieee80211.h	/^	struct ieee80211_txb* (*ext_patch_ieee80211_xmit) (struct sk_buff *skb, struct net_device *dev);$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ext_patch_ieee80211_xmit
++ext_send_beacon_wq	ieee80211.h	/^	struct tq_struct ext_send_beacon_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++ext_send_beacon_wq	ieee80211.h	/^	struct work_struct ext_send_beacon_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++ext_stop_scan_wq	ieee80211.h	/^	struct tq_struct ext_stop_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++ext_stop_scan_wq	ieee80211.h	/^	struct work_struct ext_stop_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++extra_postfix_len	ieee80211_crypt.h	/^	int extra_prefix_len, extra_postfix_len;$/;"	m	struct:ieee80211_crypto_ops
++extra_prefix_len	ieee80211_crypt.h	/^	int extra_prefix_len, extra_postfix_len;$/;"	m	struct:ieee80211_crypto_ops
++f_lround	aes.c	336;"	d	file:
++f_mult	aes.c	/^f_mult (u8 a, u8 b)$/;"	f	file:
++f_nround	aes.c	329;"	d	file:
++f_rl	aes.c	145;"	d	file:
++f_rn	aes.c	127;"	d	file:
++false	ieee80211.h	/^typedef enum{false = 0, true} bool;$/;"	e	enum:__anon3
++ff_mult	aes.c	125;"	d	file:
++final	digest.c	/^static void final(struct crypto_tfm *tfm, u8 *out)$/;"	f	file:
++first_frag_time	ieee80211.h	/^	unsigned long first_frag_time;$/;"	m	struct:ieee80211_frag_entry
++fl_tab	aes.c	/^static u32 fl_tab[4][256];$/;"	v	file:
++flags	ieee80211.h	/^	u16 flags;$/;"	m	struct:ieee80211_security
++flags	ieee80211.h	/^	u8 flags;$/;"	m	struct:ieee80211_network
++frag	ieee80211.h	/^	int frag;$/;"	m	struct:tx_pending_t
++frag_cache	ieee80211.h	/^	struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_frag_entry
++frag_next_idx	ieee80211.h	/^	unsigned int frag_next_idx[17];$/;"	m	struct:ieee80211_device
++frag_num	ieee80211.h	/^	u16 frag_num;$/;"	m	struct:ieee_mesh_seq
++frag_num	ieee80211.h	/^	u16 frag_num[17];$/;"	m	struct:ieee_ibss_seq
++frag_size	ieee80211.h	/^	u16 frag_size;$/;"	m	struct:ieee80211_txb
++fragments	ieee80211.h	/^	struct sk_buff *fragments[0];$/;"	m	struct:ieee80211_txb	typeref:struct:ieee80211_txb::sk_buff
++frame_ctl	ieee80211.h	/^	u16 frame_ctl;$/;"	m	struct:ieee80211_hdr
++frame_ctl	ieee80211.h	/^	u16 frame_ctl;$/;"	m	struct:ieee80211_hdr_3addr
++frame_ctl	ieee80211.h	/^	u16 frame_ctl;$/;"	m	struct:ieee80211_hdr_3addr_QOS
++frame_ctl	ieee80211.h	/^	u16 frame_ctl;$/;"	m	struct:ieee80211_hdr_QOS
++frame_ctl	ieee80211.h	/^	u16 frame_ctl;$/;"	m	struct:ieee80211_header_data
++frame_ctl	rtl8187_mesh.h	/^	u16					frame_ctl;$/;"	m	struct:ieee80211_hdr_mesh
++frame_ctl	rtl8187_mesh.h	/^	u16					frame_ctl;$/;"	m	struct:ieee80211_hdr_mesh_QOS
++free_ieee80211	ieee80211.h	127;"	d
++free_ieee80211	ieee80211_module.c	/^EXPORT_SYMBOL(free_ieee80211);$/;"	v
++free_ieee80211	ieee80211_module.c	/^EXPORT_SYMBOL_NOVERS(free_ieee80211);$/;"	v
++free_ieee80211	ieee80211_module.c	/^void free_ieee80211(struct net_device *dev)$/;"	f
++freq	ieee80211.h	/^	u8 freq;$/;"	m	struct:ieee80211_rx_stats
++freq_band	ieee80211.h	/^	int freq_band;  \/* 2.4Ghz, 5.2Ghz, Mixed *\/$/;"	m	struct:ieee80211_device
++ft_tab	aes.c	/^static u32 ft_tab[4][256];$/;"	v	file:
++fts	ieee80211.h	/^	u16 fts; \/* Fragmentation Threshold *\/$/;"	m	struct:ieee80211_device
++gen_tabs	aes.c	/^gen_tabs (void)$/;"	f	file:
++generic_rotl32	aes.c	/^u32 generic_rotl32 (const u32 x, const unsigned bits)$/;"	f	file:
++generic_rotr32	aes.c	/^u32 generic_rotr32 (const u32 x, const unsigned bits)$/;"	f	file:
++get_key	ieee80211_crypt.h	/^	int (*get_key)(void *key, int len, u8 *seq, void *priv);$/;"	m	struct:ieee80211_crypto_ops
++get_le32	michael_mic.c	/^static inline u32 get_le32(const u8 *p)$/;"	f	file:
++hard_start_xmit	ieee80211.h	/^	int (*hard_start_xmit)(struct ieee80211_txb *txb,$/;"	m	struct:ieee80211_device
++hash_list	rtl8187_mesh.h	/^	struct list_head			hash_list;$/;"	m	struct:mesh_PeerEntry	typeref:struct:mesh_PeerEntry::list_head
++hcrypt	ieee80211_crypt.c	/^static struct ieee80211_crypto *hcrypt;$/;"	v	typeref:struct:ieee80211_crypto	file:
++header	ieee80211.h	/^	struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_assoc_request_frame	typeref:struct:ieee80211_assoc_request_frame::ieee80211_hdr_3addr
++header	ieee80211.h	/^	struct ieee80211_hdr_3addr header;$/;"	m	struct:ieee80211_assoc_response_frame	typeref:struct:ieee80211_assoc_response_frame::ieee80211_hdr_3addr
++header	ieee80211.h	/^	struct ieee80211_header_data header;$/;"	m	struct:ieee80211_authentication	typeref:struct:ieee80211_authentication::ieee80211_header_data
++header	ieee80211.h	/^	struct ieee80211_header_data header;$/;"	m	struct:ieee80211_probe_request	typeref:struct:ieee80211_probe_request::ieee80211_header_data
++header	ieee80211.h	/^	struct ieee80211_header_data header;$/;"	m	struct:ieee80211_probe_response	typeref:struct:ieee80211_probe_response::ieee80211_header_data
++host_decrypt	ieee80211.h	/^	int host_decrypt;$/;"	m	struct:ieee80211_device
++host_encrypt	ieee80211.h	/^	int host_encrypt;$/;"	m	struct:ieee80211_device
++hw_dig_wq	ieee80211.h	/^	struct delayed_work hw_dig_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++hw_dig_wq	ieee80211.h	/^	struct work_struct hw_dig_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++hwaddr	rtl8187_mesh.h	/^		unsigned char				hwaddr[MACADDRLEN];$/;"	m	struct:mshclass_priv::__anon11
++hwaddr	rtl8187_mesh.h	/^	unsigned char				hwaddr[MACADDRLEN];	\/\/\/< hardware address$/;"	m	struct:mesh_PeerEntry
++iCurChannel	rtl8187_mesh.h	/^	int iCurChannel; \/\/ remember the working channel$/;"	m	struct:mshclass_priv
++i_lround	aes.c	389;"	d	file:
++i_nround	aes.c	382;"	d	file:
++i_rl	aes.c	151;"	d	file:
++i_rn	aes.c	133;"	d	file:
++ibss_mac_hash	ieee80211.h	/^	struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
++id	ieee80211.h	/^	u8 id;$/;"	m	struct:ieee80211_info_element
++id	ieee80211.h	/^	u8 id;$/;"	m	struct:ieee80211_info_element_hdr
++id	rtl8187_mesh.h	/^	char id[MESH_ID_LEN+1];$/;"	m	struct:myMeshIDNode
++idx	ieee80211.h	/^			u8 idx;$/;"	m	struct:ieee_param::__anon4::__anon8
++idx_BadMac	rtl8187_mesh.h	/^	int				idx_BadMac;$/;"	m	struct:mshclass_priv
++ieee80211-rtl-objs	Makefile	/^ieee80211-rtl-objs := ieee80211_softmac.o dot11d.o ieee80211_rx.o ieee80211_tx.o ieee80211_wx.o ieee80211_module.o ieee80211_softmac_wx.o$/;"	m
++ieee80211_MFIE_Brate	ieee80211_softmac.c	/^void ieee80211_MFIE_Brate(struct ieee80211_device *ieee, u8 **tag_p)$/;"	f
++ieee80211_MFIE_Grate	ieee80211_softmac.c	/^void ieee80211_MFIE_Grate(struct ieee80211_device *ieee, u8 **tag_p)$/;"	f
++ieee80211_MFIE_rate_len	ieee80211_softmac.c	/^unsigned int ieee80211_MFIE_rate_len(struct ieee80211_device *ieee)$/;"	f
++ieee80211_SignalStrengthTranslate	ieee80211_rx.c	/^static inline int ieee80211_SignalStrengthTranslate($/;"	f	file:
++ieee80211_TURBO_Info	ieee80211_softmac.c	/^void ieee80211_TURBO_Info(struct ieee80211_device *ieee, u8 **tag_p) {$/;"	f
++ieee80211_WMM_Info	ieee80211_softmac.c	/^void ieee80211_WMM_Info(struct ieee80211_device *ieee, u8 **tag_p) {$/;"	f
++ieee80211_alloc_txb	ieee80211_tx.c	/^EXPORT_SYMBOL(ieee80211_alloc_txb);$/;"	v
++ieee80211_alloc_txb	ieee80211_tx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_alloc_txb);$/;"	v
++ieee80211_alloc_txb	ieee80211_tx.c	/^struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size,$/;"	f
++ieee80211_assoc_request_frame	ieee80211.h	/^struct ieee80211_assoc_request_frame {$/;"	s
++ieee80211_assoc_resp	ieee80211_softmac.c	/^struct sk_buff* ieee80211_assoc_resp(struct ieee80211_device *ieee, u8 *dest)$/;"	f
++ieee80211_assoc_resp_by_net	ieee80211_softmac.c	/^struct sk_buff* ieee80211_assoc_resp_by_net(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type)$/;"	f
++ieee80211_assoc_response_frame	ieee80211.h	/^struct ieee80211_assoc_response_frame {$/;"	s
++ieee80211_associate_abort	ieee80211_softmac.c	/^void ieee80211_associate_abort(struct ieee80211_device *ieee)$/;"	f
++ieee80211_associate_abort_cb	ieee80211_softmac.c	/^void ieee80211_associate_abort_cb(unsigned long dev)$/;"	f
++ieee80211_associate_complete	ieee80211_softmac.c	/^void ieee80211_associate_complete(struct ieee80211_device *ieee)$/;"	f
++ieee80211_associate_complete_wq	ieee80211_softmac.c	/^void ieee80211_associate_complete_wq(struct work_struct *work)$/;"	f
++ieee80211_associate_procedure_wq	ieee80211_softmac.c	/^void ieee80211_associate_procedure_wq(struct work_struct *work)$/;"	f
++ieee80211_associate_retry_wq	ieee80211_softmac.c	/^void ieee80211_associate_retry_wq(struct work_struct *work)$/;"	f
++ieee80211_associate_step1	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_associate_step1);$/;"	v
++ieee80211_associate_step1	ieee80211_softmac.c	/^void ieee80211_associate_step1(struct ieee80211_device *ieee)$/;"	f
++ieee80211_associate_step2	ieee80211_softmac.c	/^void ieee80211_associate_step2(struct ieee80211_device *ieee)$/;"	f
++ieee80211_association_req	ieee80211_softmac.c	/^inline struct sk_buff *ieee80211_association_req(struct ieee80211_network *beacon,struct ieee80211_device *ieee)$/;"	f
++ieee80211_auth_challenge	ieee80211_softmac.c	/^void ieee80211_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)$/;"	f
++ieee80211_auth_resp	ieee80211_softmac.c	/^struct sk_buff* ieee80211_auth_resp(struct ieee80211_device *ieee,int status, u8 *dest)$/;"	f
++ieee80211_authentication	ieee80211.h	/^struct ieee80211_authentication {$/;"	s
++ieee80211_authentication_req	ieee80211_softmac.c	/^inline struct sk_buff *ieee80211_authentication_req(struct ieee80211_network *beacon, $/;"	f
++ieee80211_beacons_start	ieee80211_softmac.c	/^void ieee80211_beacons_start(struct ieee80211_device *ieee)$/;"	f
++ieee80211_beacons_stop	ieee80211_softmac.c	/^void ieee80211_beacons_stop(struct ieee80211_device *ieee)$/;"	f
++ieee80211_ccmp_aes_encrypt	ieee80211_crypt_ccmp.c	/^void ieee80211_ccmp_aes_encrypt(struct crypto_tfm *tfm,$/;"	f
++ieee80211_ccmp_data	ieee80211_crypt_ccmp.c	/^struct ieee80211_ccmp_data {$/;"	s	file:
++ieee80211_ccmp_decrypt	ieee80211_crypt_ccmp.c	/^static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)$/;"	f	file:
++ieee80211_ccmp_deinit	ieee80211_crypt_ccmp.c	/^static void ieee80211_ccmp_deinit(void *priv)$/;"	f	file:
++ieee80211_ccmp_encrypt	ieee80211_crypt_ccmp.c	/^static int ieee80211_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)$/;"	f	file:
++ieee80211_ccmp_get_key	ieee80211_crypt_ccmp.c	/^static int ieee80211_ccmp_get_key(void *key, int len, u8 *seq, void *priv)$/;"	f	file:
++ieee80211_ccmp_init	ieee80211_crypt_ccmp.c	/^static void * ieee80211_ccmp_init(int key_idx)$/;"	f	file:
++ieee80211_ccmp_null	ieee80211_crypt_ccmp.c	/^EXPORT_SYMBOL(ieee80211_ccmp_null);$/;"	v
++ieee80211_ccmp_null	ieee80211_crypt_ccmp.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_ccmp_null);$/;"	v
++ieee80211_ccmp_null	ieee80211_crypt_ccmp.c	/^void ieee80211_ccmp_null(void)$/;"	f
++ieee80211_ccmp_print_stats	ieee80211_crypt_ccmp.c	/^static char * ieee80211_ccmp_print_stats(char *p, void *priv)$/;"	f	file:
++ieee80211_ccmp_set_key	ieee80211_crypt_ccmp.c	/^static int ieee80211_ccmp_set_key(void *key, int len, u8 *seq, void *priv)$/;"	f	file:
++ieee80211_classify	ieee80211_tx.c	/^ieee80211_classify(struct sk_buff *skb, struct ieee80211_network *network)$/;"	f	file:
++ieee80211_crypt-rtl-objs	Makefile	/^ieee80211_crypt-rtl-objs := ieee80211_crypt.o$/;"	m
++ieee80211_crypt_ccmp	ieee80211_crypt_ccmp.c	/^static struct ieee80211_crypto_ops ieee80211_crypt_ccmp = {$/;"	v	typeref:struct:ieee80211_crypto_ops	file:
++ieee80211_crypt_ccmp-rtl-objs	Makefile	/^ieee80211_crypt_ccmp-rtl-objs := ieee80211_crypt_ccmp.o$/;"	m
++ieee80211_crypt_data	ieee80211_crypt.h	/^struct ieee80211_crypt_data {$/;"	s
++ieee80211_crypt_data_list	ieee80211.h	/^struct ieee80211_crypt_data_list{$/;"	s
++ieee80211_crypt_deinit_entries	ieee80211.h	141;"	d
++ieee80211_crypt_deinit_entries	ieee80211_crypt.c	/^EXPORT_SYMBOL(ieee80211_crypt_deinit_entries);$/;"	v
++ieee80211_crypt_deinit_entries	ieee80211_crypt.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_crypt_deinit_entries);$/;"	v
++ieee80211_crypt_deinit_entries	ieee80211_crypt.c	/^void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,$/;"	f
++ieee80211_crypt_deinit_handler	ieee80211.h	142;"	d
++ieee80211_crypt_deinit_handler	ieee80211_crypt.c	/^EXPORT_SYMBOL(ieee80211_crypt_deinit_handler);$/;"	v
++ieee80211_crypt_deinit_handler	ieee80211_crypt.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_crypt_deinit_handler);$/;"	v
++ieee80211_crypt_deinit_handler	ieee80211_crypt.c	/^void ieee80211_crypt_deinit_handler(unsigned long data)$/;"	f
++ieee80211_crypt_delayed_deinit	ieee80211.h	136;"	d
++ieee80211_crypt_delayed_deinit	ieee80211_crypt.c	/^EXPORT_SYMBOL(ieee80211_crypt_delayed_deinit);$/;"	v
++ieee80211_crypt_delayed_deinit	ieee80211_crypt.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_crypt_delayed_deinit);$/;"	v
++ieee80211_crypt_delayed_deinit	ieee80211_crypt.c	/^void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,$/;"	f
++ieee80211_crypt_null	ieee80211_crypt.c	/^static struct ieee80211_crypto_ops ieee80211_crypt_null = {$/;"	v	typeref:struct:ieee80211_crypto_ops	file:
++ieee80211_crypt_null_deinit	ieee80211_crypt.c	/^static void ieee80211_crypt_null_deinit(void *priv) {}$/;"	f	file:
++ieee80211_crypt_null_init	ieee80211_crypt.c	/^static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }$/;"	f	file:
++ieee80211_crypt_tkip	ieee80211_crypt_tkip.c	/^static struct ieee80211_crypto_ops ieee80211_crypt_tkip = {$/;"	v	typeref:struct:ieee80211_crypto_ops	file:
++ieee80211_crypt_tkip-rtl-objs	Makefile	/^ieee80211_crypt_tkip-rtl-objs := ieee80211_crypt_tkip.o$/;"	m
++ieee80211_crypt_wep	ieee80211_crypt_wep.c	/^static struct ieee80211_crypto_ops ieee80211_crypt_wep = {$/;"	v	typeref:struct:ieee80211_crypto_ops	file:
++ieee80211_crypt_wep-rtl-objs	Makefile	/^ieee80211_crypt_wep-rtl-objs := ieee80211_crypt_wep.o$/;"	m
++ieee80211_crypto	ieee80211_crypt.c	/^struct ieee80211_crypto {$/;"	s	file:
++ieee80211_crypto_alg	ieee80211_crypt.c	/^struct ieee80211_crypto_alg {$/;"	s	file:
++ieee80211_crypto_ccmp_exit	ieee80211_crypt_ccmp.c	/^module_exit(ieee80211_crypto_ccmp_exit);$/;"	v
++ieee80211_crypto_ccmp_exit	ieee80211_crypt_ccmp.c	/^static void __exit ieee80211_crypto_ccmp_exit(void)$/;"	f	file:
++ieee80211_crypto_ccmp_init	ieee80211_crypt_ccmp.c	/^module_init(ieee80211_crypto_ccmp_init);$/;"	v
++ieee80211_crypto_ccmp_init	ieee80211_crypt_ccmp.c	/^static int __init ieee80211_crypto_ccmp_init(void)$/;"	f	file:
++ieee80211_crypto_deinit	ieee80211_crypt.c	/^module_exit(ieee80211_crypto_deinit);$/;"	v
++ieee80211_crypto_deinit	ieee80211_crypt.c	/^static void __exit ieee80211_crypto_deinit(void)$/;"	f	file:
++ieee80211_crypto_init	ieee80211_crypt.c	/^module_init(ieee80211_crypto_init);$/;"	v
++ieee80211_crypto_init	ieee80211_crypt.c	/^static int __init ieee80211_crypto_init(void)$/;"	f	file:
++ieee80211_crypto_ops	ieee80211_crypt.h	/^struct ieee80211_crypto_ops {$/;"	s
++ieee80211_crypto_tkip_exit	ieee80211_crypt_tkip.c	/^module_exit(ieee80211_crypto_tkip_exit);$/;"	v
++ieee80211_crypto_tkip_exit	ieee80211_crypt_tkip.c	/^static void __exit ieee80211_crypto_tkip_exit(void)$/;"	f	file:
++ieee80211_crypto_tkip_init	ieee80211_crypt_tkip.c	/^module_init(ieee80211_crypto_tkip_init);$/;"	v
++ieee80211_crypto_tkip_init	ieee80211_crypt_tkip.c	/^static int __init ieee80211_crypto_tkip_init(void)$/;"	f	file:
++ieee80211_crypto_wep_exit	ieee80211_crypt_wep.c	/^module_exit(ieee80211_crypto_wep_exit);$/;"	v
++ieee80211_crypto_wep_exit	ieee80211_crypt_wep.c	/^static void __exit ieee80211_crypto_wep_exit(void)$/;"	f	file:
++ieee80211_crypto_wep_init	ieee80211_crypt_wep.c	/^module_init(ieee80211_crypto_wep_init);$/;"	v
++ieee80211_crypto_wep_init	ieee80211_crypt_wep.c	/^static int __init ieee80211_crypto_wep_init(void)$/;"	f	file:
++ieee80211_debug_level	ieee80211_module.c	/^u32 ieee80211_debug_level = 0;$/;"	v
++ieee80211_device	ieee80211.h	/^struct ieee80211_device {$/;"	s
++ieee80211_disassociate	ieee80211_softmac.c	/^void ieee80211_disassociate(struct ieee80211_device *ieee)$/;"	f
++ieee80211_encrypt_fragment	ieee80211_tx.c	/^EXPORT_SYMBOL(ieee80211_encrypt_fragment);$/;"	v
++ieee80211_encrypt_fragment	ieee80211_tx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_encrypt_fragment);$/;"	v
++ieee80211_encrypt_fragment	ieee80211_tx.c	/^int ieee80211_encrypt_fragment($/;"	f
++ieee80211_exit	ieee80211_module.c	/^module_exit(ieee80211_exit);$/;"	v
++ieee80211_exit	ieee80211_module.c	/^static void __exit ieee80211_exit(void)$/;"	f	file:
++ieee80211_ext_alloc_txb	ieee80211_tx.c	/^EXPORT_SYMBOL(ieee80211_ext_alloc_txb);$/;"	v
++ieee80211_ext_alloc_txb	ieee80211_tx.c	/^struct ieee80211_txb *ieee80211_ext_alloc_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt)$/;"	f
++ieee80211_ext_issue_assoc_req	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_ext_issue_assoc_req);$/;"	v
++ieee80211_ext_issue_assoc_req	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_assoc_req);$/;"	v
++ieee80211_ext_issue_assoc_req	ieee80211_softmac.c	/^void ieee80211_ext_issue_assoc_req(struct ieee80211_device *ieee, struct ieee80211_network *pstat)$/;"	f
++ieee80211_ext_issue_assoc_rsp	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_ext_issue_assoc_rsp); $/;"	v
++ieee80211_ext_issue_assoc_rsp	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_assoc_rsp); $/;"	v
++ieee80211_ext_issue_assoc_rsp	ieee80211_softmac.c	/^void ieee80211_ext_issue_assoc_rsp(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type)$/;"	f
++ieee80211_ext_issue_disassoc	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_ext_issue_disassoc);$/;"	v
++ieee80211_ext_issue_disassoc	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_ext_issue_disassoc);$/;"	v
++ieee80211_ext_issue_disassoc	ieee80211_softmac.c	/^void ieee80211_ext_issue_disassoc(struct ieee80211_device *ieee, struct ieee80211_network *pstat, int reason, unsigned char extReason)$/;"	f
++ieee80211_ext_probe_resp_by_net	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_ext_probe_resp_by_net);$/;"	v
++ieee80211_ext_probe_resp_by_net	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_ext_probe_resp_by_net);$/;"	v
++ieee80211_ext_probe_resp_by_net	ieee80211_softmac.c	/^struct sk_buff* ieee80211_ext_probe_resp_by_net(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net)$/;"	f
++ieee80211_ext_reuse_txb	ieee80211_tx.c	/^EXPORT_SYMBOL(ieee80211_ext_reuse_txb);$/;"	v
++ieee80211_ext_reuse_txb	ieee80211_tx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_ext_reuse_txb);$/;"	v
++ieee80211_ext_reuse_txb	ieee80211_tx.c	/^struct ieee80211_txb *ieee80211_ext_reuse_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt)$/;"	f
++ieee80211_ext_send_11s_beacon	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_ext_send_11s_beacon);$/;"	v
++ieee80211_ext_send_11s_beacon	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_ext_send_11s_beacon);$/;"	v
++ieee80211_ext_send_11s_beacon	ieee80211_softmac.c	/^void ieee80211_ext_send_11s_beacon(struct ieee80211_device *ieee)$/;"	f
++ieee80211_ext_stop_scan_wq	ieee80211_softmac.c	/^void ieee80211_ext_stop_scan_wq(struct work_struct *work)$/;"	f
++ieee80211_extract_country_ie	ieee80211_rx.c	/^static inline void ieee80211_extract_country_ie($/;"	f	file:
++ieee80211_find_MP	ieee80211.h	/^extern inline int ieee80211_find_MP(struct ieee80211_device* ieee, const u8* addr, u8 set)$/;"	f
++ieee80211_frag_cache_find	ieee80211_rx.c	/^ieee80211_frag_cache_find(struct ieee80211_device *ieee, unsigned int seq,$/;"	f	file:
++ieee80211_frag_cache_get	ieee80211_rx.c	/^ieee80211_frag_cache_get(struct ieee80211_device *ieee,$/;"	f	file:
++ieee80211_frag_cache_invalidate	ieee80211_rx.c	/^static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,$/;"	f	file:
++ieee80211_frag_entry	ieee80211.h	/^struct ieee80211_frag_entry {$/;"	s
++ieee80211_get_beacon	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_get_beacon);$/;"	v
++ieee80211_get_beacon	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_get_beacon);$/;"	v
++ieee80211_get_beacon	ieee80211_softmac.c	/^struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee)$/;"	f
++ieee80211_get_beacon_	ieee80211_softmac.c	/^struct sk_buff *ieee80211_get_beacon_(struct ieee80211_device *ieee)$/;"	f
++ieee80211_get_crypto_ops	ieee80211.h	135;"	d
++ieee80211_get_crypto_ops	ieee80211_crypt.c	/^EXPORT_SYMBOL(ieee80211_get_crypto_ops);$/;"	v
++ieee80211_get_crypto_ops	ieee80211_crypt.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_get_crypto_ops);$/;"	v
++ieee80211_get_crypto_ops	ieee80211_crypt.c	/^struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name)$/;"	f
++ieee80211_get_hdrlen	ieee80211.h	/^extern inline int ieee80211_get_hdrlen(u16 fc)$/;"	f
++ieee80211_get_scans	ieee80211.h	/^extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)$/;"	f
++ieee80211_hdr	ieee80211.h	/^struct ieee80211_hdr {$/;"	s
++ieee80211_hdr_3addr	ieee80211.h	/^struct ieee80211_hdr_3addr {$/;"	s
++ieee80211_hdr_3addr_QOS	ieee80211.h	/^struct ieee80211_hdr_3addr_QOS {$/;"	s
++ieee80211_hdr_QOS	ieee80211.h	/^struct ieee80211_hdr_QOS {$/;"	s
++ieee80211_hdr_mesh	rtl8187_mesh.h	/^struct ieee80211_hdr_mesh {$/;"	s
++ieee80211_hdr_mesh_QOS	rtl8187_mesh.h	/^struct ieee80211_hdr_mesh_QOS {$/;"	s
++ieee80211_header_data	ieee80211.h	/^struct ieee80211_header_data {$/;"	s
++ieee80211_increment_scans	ieee80211.h	/^extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)$/;"	f
++ieee80211_info_element	ieee80211.h	/^struct ieee80211_info_element {$/;"	s
++ieee80211_info_element_hdr	ieee80211.h	/^struct ieee80211_info_element_hdr {$/;"	s
++ieee80211_init	ieee80211_module.c	/^module_init(ieee80211_init);$/;"	v
++ieee80211_init	ieee80211_module.c	/^static int __init ieee80211_init(void)$/;"	f	file:
++ieee80211_ips_leave	ieee80211.h	/^	void (*ieee80211_ips_leave) (struct net_device *dev);$/;"	m	struct:ieee80211_device
++ieee80211_is_54g	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_is_54g);$/;"	v
++ieee80211_is_54g	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_is_54g);$/;"	v
++ieee80211_is_54g	ieee80211_softmac.c	/^short ieee80211_is_54g(struct ieee80211_network net)$/;"	f
++ieee80211_is_eapol_frame	ieee80211_rx.c	/^static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,$/;"	f	file:
++ieee80211_is_empty_essid	ieee80211.h	/^extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)$/;"	f
++ieee80211_is_ofdm_rate	ieee80211_rx.c	/^static inline int ieee80211_is_ofdm_rate(u8 rate)$/;"	f	file:
++ieee80211_is_shortslot	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_is_shortslot);$/;"	v
++ieee80211_is_shortslot	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_is_shortslot);$/;"	v
++ieee80211_is_shortslot	ieee80211_softmac.c	/^short ieee80211_is_shortslot(struct ieee80211_network net)$/;"	f
++ieee80211_is_valid_mode	ieee80211.h	/^extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)$/;"	f
++ieee80211_led_contorl	ieee80211.h	/^	void (*ieee80211_led_contorl) (struct net_device *dev, LED_CTL_MODE LedAction);$/;"	m	struct:ieee80211_device
++ieee80211_michael_mic_add	ieee80211_crypt_tkip.c	/^static int ieee80211_michael_mic_add(struct sk_buff *skb, int hdr_len, void *priv)$/;"	f	file:
++ieee80211_michael_mic_failure	ieee80211_crypt_tkip.c	/^static inline void ieee80211_michael_mic_failure(struct net_device *dev,$/;"	f	file:
++ieee80211_michael_mic_failure	ieee80211_crypt_tkip.c	/^static void ieee80211_michael_mic_failure(struct net_device *dev,$/;"	f	file:
++ieee80211_michael_mic_verify	ieee80211_crypt_tkip.c	/^static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,$/;"	f	file:
++ieee80211_modes	ieee80211_wx.c	/^static const char *ieee80211_modes[] = {$/;"	v	file:
++ieee80211_monitor_rx	ieee80211_rx.c	/^static inline void ieee80211_monitor_rx(struct ieee80211_device *ieee,$/;"	f	file:
++ieee80211_network	ieee80211.h	/^struct ieee80211_network {$/;"	s
++ieee80211_network_init	ieee80211_rx.c	/^ inline int ieee80211_network_init($/;"	f
++ieee80211_network_init	ieee80211_rx.c	/^EXPORT_SYMBOL(ieee80211_network_init);$/;"	v
++ieee80211_network_init	ieee80211_rx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_network_init);$/;"	v
++ieee80211_networks_allocate	ieee80211_module.c	/^static inline int ieee80211_networks_allocate(struct ieee80211_device *ieee)$/;"	f	file:
++ieee80211_networks_free	ieee80211_module.c	/^static inline void ieee80211_networks_free(struct ieee80211_device *ieee)$/;"	f	file:
++ieee80211_networks_initialize	ieee80211_module.c	/^static inline void ieee80211_networks_initialize(struct ieee80211_device *ieee)$/;"	f	file:
++ieee80211_null_func	ieee80211_softmac.c	/^struct sk_buff* ieee80211_null_func(struct ieee80211_device *ieee,short pwr)$/;"	f
++ieee80211_priv	ieee80211.h	/^static inline void *ieee80211_priv(struct net_device *dev)$/;"	f
++ieee80211_probe_req	ieee80211_softmac.c	/^inline struct sk_buff *ieee80211_probe_req(struct ieee80211_device *ieee)$/;"	f
++ieee80211_probe_req_with_SSID	ieee80211_softmac.c	/^inline struct sk_buff *ieee80211_probe_req_with_SSID(struct ieee80211_device *ieee, char *ssid, int len_ssid)$/;"	f
++ieee80211_probe_request	ieee80211.h	/^struct ieee80211_probe_request {$/;"	s
++ieee80211_probe_resp	ieee80211_softmac.c	/^static struct sk_buff* ieee80211_probe_resp(struct ieee80211_device *ieee, u8 *dest)$/;"	f	file:
++ieee80211_probe_response	ieee80211.h	/^struct ieee80211_probe_response {$/;"	s
++ieee80211_proc	ieee80211_module.c	/^struct proc_dir_entry *ieee80211_proc = NULL;$/;"	v	typeref:struct:proc_dir_entry
++ieee80211_process_probe_response	ieee80211_rx.c	/^inline void ieee80211_process_probe_response($/;"	f
++ieee80211_ps_tx_ack	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_ps_tx_ack);$/;"	v
++ieee80211_ps_tx_ack	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_ps_tx_ack);$/;"	v
++ieee80211_ps_tx_ack	ieee80211_softmac.c	/^void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success)$/;"	f
++ieee80211_put_snap	ieee80211_tx.c	/^static inline int ieee80211_put_snap(u8 *data, u16 h_proto)$/;"	f	file:
++ieee80211_randomize_cell	ieee80211_softmac.c	/^inline void ieee80211_randomize_cell(struct ieee80211_device *ieee)$/;"	f
++ieee80211_register_crypto_ops	ieee80211.h	139;"	d
++ieee80211_register_crypto_ops	ieee80211_crypt.c	/^EXPORT_SYMBOL(ieee80211_register_crypto_ops);$/;"	v
++ieee80211_register_crypto_ops	ieee80211_crypt.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_register_crypto_ops);$/;"	v
++ieee80211_register_crypto_ops	ieee80211_crypt.c	/^int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)$/;"	f
++ieee80211_reset_queue	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_reset_queue);$/;"	v
++ieee80211_reset_queue	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_reset_queue);$/;"	v
++ieee80211_reset_queue	ieee80211_softmac.c	/^void ieee80211_reset_queue(struct ieee80211_device *ieee)$/;"	f
++ieee80211_resp_to_assoc_rq	ieee80211_softmac.c	/^void ieee80211_resp_to_assoc_rq(struct ieee80211_device *ieee, u8* dest)$/;"	f
++ieee80211_resp_to_auth	ieee80211_softmac.c	/^void ieee80211_resp_to_auth(struct ieee80211_device *ieee, int s, u8* dest)$/;"	f
++ieee80211_resp_to_probe	ieee80211_softmac.c	/^void ieee80211_resp_to_probe(struct ieee80211_device *ieee, u8 *dest)$/;"	f
++ieee80211_resume_tx	ieee80211_softmac.c	/^void ieee80211_resume_tx(struct ieee80211_device *ieee)$/;"	f
++ieee80211_rx	ieee80211.h	131;"	d
++ieee80211_rx	ieee80211_rx.c	/^EXPORT_SYMBOL(ieee80211_rx);$/;"	v
++ieee80211_rx	ieee80211_rx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_rx);$/;"	v
++ieee80211_rx	ieee80211_rx.c	/^int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,$/;"	f
++ieee80211_rx_assoc_rq	ieee80211_softmac.c	/^ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb)$/;"	f
++ieee80211_rx_auth_rq	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_rx_auth_rq);$/;"	v
++ieee80211_rx_auth_rq	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_rx_auth_rq);$/;"	v
++ieee80211_rx_auth_rq	ieee80211_softmac.c	/^inline void ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb)$/;"	f
++ieee80211_rx_frame_decrypt	ieee80211_rx.c	/^ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,$/;"	f	file:
++ieee80211_rx_frame_decrypt_msdu	ieee80211_rx.c	/^ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *skb,$/;"	f	file:
++ieee80211_rx_frame_mgmt	ieee80211_rx.c	/^ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,$/;"	f	file:
++ieee80211_rx_frame_softmac	ieee80211_softmac.c	/^ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,$/;"	f
++ieee80211_rx_mgt	ieee80211_rx.c	/^EXPORT_SYMBOL(ieee80211_rx_mgt);$/;"	v
++ieee80211_rx_mgt	ieee80211_rx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_rx_mgt);$/;"	v
++ieee80211_rx_mgt	ieee80211_rx.c	/^void ieee80211_rx_mgt(struct ieee80211_device *ieee,$/;"	f
++ieee80211_rx_probe_rq	ieee80211_softmac.c	/^ieee80211_rx_probe_rq(struct ieee80211_device *ieee, struct sk_buff *skb)$/;"	f	file:
++ieee80211_rx_stats	ieee80211.h	/^struct ieee80211_rx_stats {$/;"	s
++ieee80211_security	ieee80211.h	/^struct ieee80211_security {$/;"	s
++ieee80211_send_beacon	ieee80211_softmac.c	/^void ieee80211_send_beacon(struct ieee80211_device *ieee)$/;"	f
++ieee80211_send_beacon_cb	ieee80211_softmac.c	/^void ieee80211_send_beacon_cb(unsigned long _ieee)$/;"	f
++ieee80211_send_probe	ieee80211_softmac.c	/^void ieee80211_send_probe(struct ieee80211_device *ieee)$/;"	f
++ieee80211_send_probe_requests	ieee80211_softmac.c	/^void ieee80211_send_probe_requests(struct ieee80211_device *ieee)$/;"	f
++ieee80211_snap_hdr	ieee80211.h	/^struct ieee80211_snap_hdr {$/;"	s
++ieee80211_softmac_check_all_nets	ieee80211_softmac.c	/^void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee)$/;"	f
++ieee80211_softmac_free	ieee80211_softmac.c	/^void ieee80211_softmac_free(struct ieee80211_device *ieee)$/;"	f
++ieee80211_softmac_init	ieee80211_softmac.c	/^void ieee80211_softmac_init(struct ieee80211_device *ieee)$/;"	f
++ieee80211_softmac_new_net	ieee80211_softmac.c	/^inline void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net)$/;"	f
++ieee80211_softmac_scan	ieee80211_softmac.c	/^void ieee80211_softmac_scan(struct ieee80211_device *ieee)$/;"	f
++ieee80211_softmac_scan_cb	ieee80211_softmac.c	/^void ieee80211_softmac_scan_cb(unsigned long _dev)$/;"	f
++ieee80211_softmac_scan_syncro	ieee80211_softmac.c	/^void ieee80211_softmac_scan_syncro(struct ieee80211_device *ieee)$/;"	f
++ieee80211_softmac_scan_wq	ieee80211_softmac.c	/^void ieee80211_softmac_scan_wq(struct work_struct *work)$/;"	f
++ieee80211_softmac_start_protocol	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_softmac_start_protocol);$/;"	v
++ieee80211_softmac_start_protocol	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_softmac_start_protocol);$/;"	v
++ieee80211_softmac_start_protocol	ieee80211_softmac.c	/^void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee)$/;"	f
++ieee80211_softmac_stats	ieee80211.h	/^struct ieee80211_softmac_stats{$/;"	s
++ieee80211_softmac_stop_protocol	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_softmac_stop_protocol);$/;"	v
++ieee80211_softmac_stop_protocol	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_softmac_stop_protocol);$/;"	v
++ieee80211_softmac_stop_protocol	ieee80211_softmac.c	/^void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee)$/;"	f
++ieee80211_softmac_stop_scan	ieee80211_softmac.c	/^void ieee80211_softmac_stop_scan(struct ieee80211_device *ieee)$/;"	f
++ieee80211_softmac_xmit	ieee80211_softmac.c	/^void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee)$/;"	f
++ieee80211_sta_ps	ieee80211_softmac.c	/^inline void ieee80211_sta_ps(struct ieee80211_device *ieee)$/;"	f
++ieee80211_sta_ps_send_null_frame	ieee80211_softmac.c	/^void ieee80211_sta_ps_send_null_frame(struct ieee80211_device *ieee, short pwr)$/;"	f
++ieee80211_sta_ps_sleep	ieee80211_softmac.c	/^short ieee80211_sta_ps_sleep(struct ieee80211_device *ieee, u32 *time_h, u32 *time_l)$/;"	f
++ieee80211_sta_wakeup	ieee80211_softmac.c	/^void ieee80211_sta_wakeup(struct ieee80211_device *ieee, short nl)$/;"	f
++ieee80211_start_bss	ieee80211_softmac.c	/^void ieee80211_start_bss(struct ieee80211_device *ieee)$/;"	f
++ieee80211_start_ibss	ieee80211_softmac.c	/^inline void ieee80211_start_ibss(struct ieee80211_device *ieee)$/;"	f
++ieee80211_start_ibss_wq	ieee80211_softmac.c	/^void ieee80211_start_ibss_wq(struct work_struct *work)$/;"	f
++ieee80211_start_master_bss	ieee80211_softmac.c	/^void ieee80211_start_master_bss(struct ieee80211_device *ieee)$/;"	f
++ieee80211_start_monitor_mode	ieee80211_softmac.c	/^void ieee80211_start_monitor_mode(struct ieee80211_device *ieee)$/;"	f
++ieee80211_start_protocol	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_start_protocol);$/;"	v
++ieee80211_start_protocol	ieee80211_softmac.c	/^void ieee80211_start_protocol(struct ieee80211_device *ieee)$/;"	f
++ieee80211_start_scan	ieee80211.h	138;"	d
++ieee80211_start_scan	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_start_scan);$/;"	v
++ieee80211_start_scan	ieee80211_softmac.c	/^void ieee80211_start_scan(struct ieee80211_device *ieee)$/;"	f
++ieee80211_start_scan_syncro	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_start_scan_syncro);$/;"	v
++ieee80211_start_scan_syncro	ieee80211_softmac.c	/^void ieee80211_start_scan_syncro(struct ieee80211_device *ieee)$/;"	f
++ieee80211_start_send_beacons	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_start_send_beacons);$/;"	v
++ieee80211_start_send_beacons	ieee80211_softmac.c	/^void ieee80211_start_send_beacons(struct ieee80211_device *ieee)$/;"	f
++ieee80211_state	ieee80211.h	/^enum ieee80211_state {$/;"	g
++ieee80211_stats	ieee80211.h	/^struct ieee80211_stats {$/;"	s
++ieee80211_stop_protocol	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_stop_protocol);$/;"	v
++ieee80211_stop_protocol	ieee80211_softmac.c	/^void ieee80211_stop_protocol(struct ieee80211_device *ieee)$/;"	f
++ieee80211_stop_queue	ieee80211.h	133;"	d
++ieee80211_stop_queue	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_stop_queue);$/;"	v
++ieee80211_stop_queue	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_stop_queue);$/;"	v
++ieee80211_stop_queue	ieee80211_softmac.c	/^void ieee80211_stop_queue(struct ieee80211_device *ieee)$/;"	f
++ieee80211_stop_scan	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_stop_scan);$/;"	v
++ieee80211_stop_scan	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_stop_scan);$/;"	v
++ieee80211_stop_scan	ieee80211_softmac.c	/^void ieee80211_stop_scan(struct ieee80211_device *ieee)$/;"	f
++ieee80211_stop_send_beacons	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_stop_send_beacons);$/;"	v
++ieee80211_stop_send_beacons	ieee80211_softmac.c	/^void ieee80211_stop_send_beacons(struct ieee80211_device *ieee)$/;"	f
++ieee80211_tkip_data	ieee80211_crypt_tkip.c	/^struct ieee80211_tkip_data {$/;"	s	file:
++ieee80211_tkip_decrypt	ieee80211_crypt_tkip.c	/^static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)$/;"	f	file:
++ieee80211_tkip_deinit	ieee80211_crypt_tkip.c	/^static void ieee80211_tkip_deinit(void *priv)$/;"	f	file:
++ieee80211_tkip_encrypt	ieee80211_crypt_tkip.c	/^static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)$/;"	f	file:
++ieee80211_tkip_get_key	ieee80211_crypt_tkip.c	/^static int ieee80211_tkip_get_key(void *key, int len, u8 *seq, void *priv)$/;"	f	file:
++ieee80211_tkip_init	ieee80211_crypt_tkip.c	/^static void * ieee80211_tkip_init(int key_idx)$/;"	f	file:
++ieee80211_tkip_null	ieee80211_crypt_tkip.c	/^EXPORT_SYMBOL(ieee80211_tkip_null);$/;"	v
++ieee80211_tkip_null	ieee80211_crypt_tkip.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_tkip_null);$/;"	v
++ieee80211_tkip_null	ieee80211_crypt_tkip.c	/^void ieee80211_tkip_null(void)$/;"	f
++ieee80211_tkip_print_stats	ieee80211_crypt_tkip.c	/^static char * ieee80211_tkip_print_stats(char *p, void *priv)$/;"	f	file:
++ieee80211_tkip_set_key	ieee80211_crypt_tkip.c	/^static int ieee80211_tkip_set_key(void *key, int len, u8 *seq, void *priv)$/;"	f	file:
++ieee80211_txb	ieee80211.h	/^struct ieee80211_txb {$/;"	s
++ieee80211_txb_free	ieee80211_tx.c	/^EXPORT_SYMBOL(ieee80211_txb_free);$/;"	v
++ieee80211_txb_free	ieee80211_tx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_txb_free);$/;"	v
++ieee80211_txb_free	ieee80211_tx.c	/^void ieee80211_txb_free(struct ieee80211_txb *txb) {$/;"	f
++ieee80211_unregister_crypto_ops	ieee80211.h	140;"	d
++ieee80211_unregister_crypto_ops	ieee80211_crypt.c	/^EXPORT_SYMBOL(ieee80211_unregister_crypto_ops);$/;"	v
++ieee80211_unregister_crypto_ops	ieee80211_crypt.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_unregister_crypto_ops);$/;"	v
++ieee80211_unregister_crypto_ops	ieee80211_crypt.c	/^int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)$/;"	f
++ieee80211_wake_queue	ieee80211.h	132;"	d
++ieee80211_wake_queue	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_wake_queue);$/;"	v
++ieee80211_wake_queue	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wake_queue);$/;"	v
++ieee80211_wake_queue	ieee80211_softmac.c	/^void ieee80211_wake_queue(struct ieee80211_device *ieee)$/;"	f
++ieee80211_wep_null	ieee80211_crypt_wep.c	/^EXPORT_SYMBOL(ieee80211_wep_null);$/;"	v
++ieee80211_wep_null	ieee80211_crypt_wep.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wep_null);$/;"	v
++ieee80211_wep_null	ieee80211_crypt_wep.c	/^void ieee80211_wep_null(void)$/;"	f
++ieee80211_wlan_frequencies	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wlan_frequencies);$/;"	v
++ieee80211_wlan_frequencies	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wlan_frequencies);$/;"	v
++ieee80211_wlan_frequencies	ieee80211_softmac_wx.c	/^const long ieee80211_wlan_frequencies[] = {  $/;"	v
++ieee80211_wmm_ac_param	ieee80211.h	/^struct ieee80211_wmm_ac_param {$/;"	s
++ieee80211_wmm_ts_info	ieee80211.h	/^struct ieee80211_wmm_ts_info {$/;"	s
++ieee80211_wmm_tspec_elem	ieee80211.h	/^struct ieee80211_wmm_tspec_elem {$/;"	s
++ieee80211_wpa_assoc_frame	ieee80211_softmac.c	/^void ieee80211_wpa_assoc_frame(struct ieee80211_device *ieee, char *wpa_ie, int wpa_ie_len)$/;"	f
++ieee80211_wpa_enable	ieee80211_softmac.c	/^static int ieee80211_wpa_enable(struct ieee80211_device *ieee, int value)$/;"	f	file:
++ieee80211_wpa_mlme	ieee80211_softmac.c	/^static int ieee80211_wpa_mlme(struct ieee80211_device *ieee, int command, int reason)$/;"	f	file:
++ieee80211_wpa_set_auth_algs	ieee80211_softmac.c	/^static int ieee80211_wpa_set_auth_algs(struct ieee80211_device *ieee, int value)$/;"	f	file:
++ieee80211_wpa_set_encryption	ieee80211_softmac.c	/^static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,$/;"	f	file:
++ieee80211_wpa_set_param	ieee80211_softmac.c	/^static int ieee80211_wpa_set_param(struct ieee80211_device *ieee, u8 name, u32 value)$/;"	f	file:
++ieee80211_wpa_set_wpa_ie	ieee80211_softmac.c	/^static int ieee80211_wpa_set_wpa_ie(struct ieee80211_device *ieee,$/;"	f	file:
++ieee80211_wpa_supplicant_ioctl	ieee80211_softmac.c	/^EXPORT_SYMBOL(ieee80211_wpa_supplicant_ioctl);$/;"	v
++ieee80211_wpa_supplicant_ioctl	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wpa_supplicant_ioctl);$/;"	v
++ieee80211_wpa_supplicant_ioctl	ieee80211_softmac.c	/^int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p)$/;"	f
++ieee80211_wx_get_encode	ieee80211.h	123;"	d
++ieee80211_wx_get_encode	ieee80211_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_encode);$/;"	v
++ieee80211_wx_get_encode	ieee80211_wx.c	/^int ieee80211_wx_get_encode(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_get_essid	ieee80211_softmac_wx.c	/^ int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b)$/;"	f
++ieee80211_wx_get_essid	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_essid);$/;"	v
++ieee80211_wx_get_essid	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_essid);$/;"	v
++ieee80211_wx_get_freq	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_freq);$/;"	v
++ieee80211_wx_get_freq	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_freq);$/;"	v
++ieee80211_wx_get_freq	ieee80211_softmac_wx.c	/^int ieee80211_wx_get_freq(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_get_mode	ieee80211_softmac_wx.c	/^ int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,$/;"	f
++ieee80211_wx_get_mode	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_mode);$/;"	v
++ieee80211_wx_get_mode	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_mode);$/;"	v
++ieee80211_wx_get_name	ieee80211.h	126;"	d
++ieee80211_wx_get_name	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_name);$/;"	v
++ieee80211_wx_get_name	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_name);$/;"	v
++ieee80211_wx_get_name	ieee80211_softmac_wx.c	/^int ieee80211_wx_get_name(struct ieee80211_device *ieee, $/;"	f
++ieee80211_wx_get_power	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_power);$/;"	v
++ieee80211_wx_get_power	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_power);$/;"	v
++ieee80211_wx_get_power	ieee80211_softmac_wx.c	/^int ieee80211_wx_get_power(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_get_rate	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_rate);$/;"	v
++ieee80211_wx_get_rate	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_rate);$/;"	v
++ieee80211_wx_get_rate	ieee80211_softmac_wx.c	/^int ieee80211_wx_get_rate(struct ieee80211_device *ieee, $/;"	f
++ieee80211_wx_get_scan	ieee80211.h	121;"	d
++ieee80211_wx_get_scan	ieee80211_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_scan);$/;"	v
++ieee80211_wx_get_scan	ieee80211_wx.c	/^int ieee80211_wx_get_scan(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_get_wap	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_get_wap);$/;"	v
++ieee80211_wx_get_wap	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_get_wap);$/;"	v
++ieee80211_wx_get_wap	ieee80211_softmac_wx.c	/^int ieee80211_wx_get_wap(struct ieee80211_device *ieee, $/;"	f
++ieee80211_wx_set_auth	ieee80211.h	134;"	d
++ieee80211_wx_set_auth	ieee80211_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_auth);$/;"	v
++ieee80211_wx_set_auth	ieee80211_wx.c	/^int ieee80211_wx_set_auth(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_set_encode	ieee80211.h	122;"	d
++ieee80211_wx_set_encode	ieee80211_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_encode);$/;"	v
++ieee80211_wx_set_encode	ieee80211_wx.c	/^int ieee80211_wx_set_encode(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_set_encode_ext	ieee80211_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_encode_ext);$/;"	v
++ieee80211_wx_set_encode_ext	ieee80211_wx.c	/^int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_set_essid	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_essid);$/;"	v
++ieee80211_wx_set_essid	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_essid);$/;"	v
++ieee80211_wx_set_essid	ieee80211_softmac_wx.c	/^int ieee80211_wx_set_essid(struct ieee80211_device *ieee, $/;"	f
++ieee80211_wx_set_freq	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_freq);$/;"	v
++ieee80211_wx_set_freq	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_freq);$/;"	v
++ieee80211_wx_set_freq	ieee80211_softmac_wx.c	/^int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,$/;"	f
++ieee80211_wx_set_gen_ie	ieee80211_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_gen_ie);$/;"	v
++ieee80211_wx_set_gen_ie	ieee80211_wx.c	/^int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)$/;"	f
++ieee80211_wx_set_mlme	ieee80211_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_mlme);$/;"	v
++ieee80211_wx_set_mlme	ieee80211_wx.c	/^int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_set_mode	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_mode);$/;"	v
++ieee80211_wx_set_mode	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_mode);$/;"	v
++ieee80211_wx_set_mode	ieee80211_softmac_wx.c	/^int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,$/;"	f
++ieee80211_wx_set_power	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_power);$/;"	v
++ieee80211_wx_set_power	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_power);$/;"	v
++ieee80211_wx_set_power	ieee80211_softmac_wx.c	/^int ieee80211_wx_set_power(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_set_rate	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_rate);$/;"	v
++ieee80211_wx_set_rate	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rate);$/;"	v
++ieee80211_wx_set_rate	ieee80211_softmac_wx.c	/^int ieee80211_wx_set_rate(struct ieee80211_device *ieee, $/;"	f
++ieee80211_wx_set_rawtx	ieee80211_softmac_wx.c	/^ int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee, $/;"	f
++ieee80211_wx_set_rawtx	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_rawtx);$/;"	v
++ieee80211_wx_set_rawtx	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_rawtx);$/;"	v
++ieee80211_wx_set_scan	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_scan);$/;"	v
++ieee80211_wx_set_scan	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_scan);$/;"	v
++ieee80211_wx_set_scan	ieee80211_softmac_wx.c	/^int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,$/;"	f
++ieee80211_wx_set_wap	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL(ieee80211_wx_set_wap);$/;"	v
++ieee80211_wx_set_wap	ieee80211_softmac_wx.c	/^EXPORT_SYMBOL_NOVERS(ieee80211_wx_set_wap);$/;"	v
++ieee80211_wx_set_wap	ieee80211_softmac_wx.c	/^int ieee80211_wx_set_wap(struct ieee80211_device *ieee,$/;"	f
++ieee80211_wx_sync_scan_wq	ieee80211_softmac_wx.c	/^void ieee80211_wx_sync_scan_wq(struct work_struct *work)$/;"	f
++ieee80211_xmit	ieee80211_tx.c	/^int ieee80211_xmit(struct sk_buff *skb,$/;"	f
++ieee802_1x	ieee80211.h	/^	int ieee802_1x; \/* is IEEE 802.1X used *\/$/;"	m	struct:ieee80211_device
++ieee_ext_skb_p80211_to_ether	ieee80211_rx.c	/^EXPORT_SYMBOL(ieee_ext_skb_p80211_to_ether);$/;"	v
++ieee_ext_skb_p80211_to_ether	ieee80211_rx.c	/^EXPORT_SYMBOL_NOVERS(ieee_ext_skb_p80211_to_ether);$/;"	v
++ieee_ext_skb_p80211_to_ether	ieee80211_rx.c	/^int ieee_ext_skb_p80211_to_ether(struct sk_buff *skb, int hdrlen, u8 *dst, u8 *src)$/;"	f
++ieee_ibss_seq	ieee80211.h	/^struct ieee_ibss_seq {$/;"	s
++ieee_mesh_seq	ieee80211.h	/^struct ieee_mesh_seq {$/;"	s
++ieee_param	ieee80211.h	/^typedef struct ieee_param {$/;"	s
++ieee_param	ieee80211.h	/^}ieee_param;$/;"	t	typeref:struct:ieee_param
++ieee_stats	ieee80211.h	/^	struct ieee80211_stats ieee_stats;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_stats
++il_tab	aes.c	/^static u32 il_tab[4][256];$/;"	v	file:
++imix_col	aes.c	230;"	d	file:
++inact_inter	ieee80211.h	/^	u32 inact_inter;$/;"	m	struct:ieee80211_wmm_tspec_elem
++info_element	ieee80211.h	/^	struct ieee80211_info_element info_element; \/* supported rates *\/$/;"	m	struct:ieee80211_assoc_response_frame	typeref:struct:ieee80211_assoc_response_frame::ieee80211_info_element
++info_element	ieee80211.h	/^	struct ieee80211_info_element info_element;$/;"	m	struct:ieee80211_probe_response	typeref:struct:ieee80211_probe_response::ieee80211_info_element
++info_element	ieee80211.h	/^	struct ieee80211_info_element_hdr info_element;$/;"	m	struct:ieee80211_assoc_request_frame	typeref:struct:ieee80211_assoc_request_frame::ieee80211_info_element_hdr
++init	digest.c	/^static void init(struct crypto_tfm *tfm)$/;"	f	file:
++init	ieee80211_crypt.h	/^	void * (*init)(int keyidx);$/;"	m	struct:ieee80211_crypto_ops
++init_crypto	api.c	/^__initcall(init_crypto);$/;"	v
++init_crypto	api.c	/^static int __init init_crypto(void)$/;"	f	file:
++init_mgmt_queue	ieee80211_softmac.c	/^void init_mgmt_queue(struct ieee80211_device *ieee)$/;"	f
++init_wmmparam_flag	ieee80211.h	/^	char init_wmmparam_flag;$/;"	m	struct:ieee80211_device
++ips_leave_wq	ieee80211.h	/^	struct tq_struct ips_leave_wq;  \/\/YJ,add,081230,for IPS$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++ips_leave_wq	ieee80211.h	/^	struct work_struct ips_leave_wq;  \/\/YJ,add,081230,for IPS$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++ips_sem	ieee80211.h	/^	struct semaphore ips_sem;	$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::semaphore
++is_broadcast_ether_addr	ieee80211.h	/^extern inline int is_broadcast_ether_addr(const u8 *addr)$/;"	f
++is_duplicate_packet	ieee80211_rx.c	/^static int is_duplicate_packet(struct ieee80211_device *ieee,$/;"	f	file:
++is_multicast_ether_addr	ieee80211.h	/^extern inline int is_multicast_ether_addr(const u8 *addr)$/;"	f
++is_same_network	ieee80211_rx.c	/^static inline int is_same_network(struct ieee80211_network *src,$/;"	f	file:
++it_tab	aes.c	/^static u32 it_tab[4][256];$/;"	v	file:
++iv	ieee80211_crypt_wep.c	/^	u32 iv;$/;"	m	struct:prism2_wep_data	file:
++iw_ext_mode	ieee80211.h	/^	int iw_ext_mode; \/\/ if iw_mode == iw_ext_mode, do ext_patch_**();$/;"	m	struct:ieee80211_device
++iw_mode	ieee80211.h	/^	int iw_mode; \/* operating mode (IW_MODE_*) *\/$/;"	m	struct:ieee80211_device
++key	ieee80211.h	/^			u8 key[0];$/;"	m	struct:ieee_param::__anon4::__anon8
++key	ieee80211_crypt_ccmp.c	/^	u8 key[CCMP_TK_LEN];$/;"	m	struct:ieee80211_ccmp_data	file:
++key	ieee80211_crypt_tkip.c	/^	u8 key[TKIP_KEY_LEN];$/;"	m	struct:ieee80211_tkip_data	file:
++key	ieee80211_crypt_wep.c	/^	u8 key[WEP_KEY_LEN + 1];$/;"	m	struct:prism2_wep_data	file:
++key_idx	ieee80211_crypt_ccmp.c	/^	int key_idx;$/;"	m	struct:ieee80211_ccmp_data	file:
++key_idx	ieee80211_crypt_tkip.c	/^	int key_idx;$/;"	m	struct:ieee80211_tkip_data	file:
++key_idx	ieee80211_crypt_wep.c	/^	u8 key_idx;$/;"	m	struct:prism2_wep_data	file:
++key_len	ieee80211.h	/^			u16 key_len;$/;"	m	struct:ieee_param::__anon4::__anon8
++key_len	ieee80211_crypt_wep.c	/^	u8 key_len;$/;"	m	struct:prism2_wep_data	file:
++key_length	aes.c	/^	int key_length;$/;"	m	struct:aes_ctx	file:
++key_set	ieee80211_crypt_ccmp.c	/^	int key_set;$/;"	m	struct:ieee80211_ccmp_data	file:
++key_set	ieee80211_crypt_tkip.c	/^	int key_set;$/;"	m	struct:ieee80211_tkip_data	file:
++key_sizes	ieee80211.h	/^	u8 key_sizes[WEP_KEYS];$/;"	m	struct:ieee80211_security
++keys	ieee80211.h	/^	u8 keys[WEP_KEYS][ALG_KEY_LEN];$/;"	m	struct:ieee80211_security
++km_type	kmap_types.h	/^enum km_type {$/;"	g
++l	michael_mic.c	/^	u32 l, r;$/;"	m	struct:michael_mic_ctx	file:
++last_associate	ieee80211.h	/^	u32 last_associate;$/;"	m	struct:ieee80211_network
++last_dtim_sta_time	ieee80211.h	/^	u32 last_dtim_sta_time[2];$/;"	m	struct:ieee80211_network
++last_frag	ieee80211.h	/^	unsigned int last_frag;$/;"	m	struct:ieee80211_frag_entry
++last_packet_time	ieee80211.h	/^	unsigned long last_packet_time[17];$/;"	m	struct:ieee80211_device
++last_rx_ps_time	ieee80211.h	/^	unsigned long last_rx_ps_time;$/;"	m	struct:ieee80211_device
++last_rxfrag	rtl8187_mesh.h	/^	u16 last_rxfrag;\/* tx frag previous per-tid *\/$/;"	m	struct:mesh_PeerEntry
++last_rxfrag_num	ieee80211.h	/^	u16 last_rxfrag_num[17];\/* tx frag previous per-tid *\/$/;"	m	struct:ieee80211_device
++last_rxseq	rtl8187_mesh.h	/^	u16 last_rxseq; \/* rx seq previous per-tid *\/$/;"	m	struct:mesh_PeerEntry
++last_rxseq_num	ieee80211.h	/^	u16 last_rxseq_num[17]; \/* rx seq previous per-tid *\/$/;"	m	struct:ieee80211_device
++last_scanned	ieee80211.h	/^	unsigned long last_scanned;$/;"	m	struct:ieee80211_network
++last_time	rtl8187_mesh.h	/^	unsigned long last_time;$/;"	m	struct:mesh_PeerEntry
++len	ieee80211.h	/^			u32 len;$/;"	m	struct:ieee_param::__anon4::__anon6
++len	ieee80211.h	/^	u16 len;$/;"	m	struct:ieee80211_rx_stats
++len	ieee80211.h	/^	u8 len;$/;"	m	struct:ieee80211_info_element
++len	ieee80211.h	/^	u8 len;$/;"	m	struct:ieee80211_info_element_hdr
++len_this_page	scatterwalk.h	/^	unsigned int		len_this_page;$/;"	m	struct:scatter_walk
++len_this_segment	scatterwalk.h	/^	unsigned int		len_this_segment;$/;"	m	struct:scatter_walk
++length	ieee80211.h	/^	u16 length;$/;"	m	struct:eapol
++level	ieee80211.h	/^	u8 level;$/;"	m	struct:ieee80211_security
++link_change	ieee80211.h	/^	void (*link_change)(struct net_device *dev);$/;"	m	struct:ieee80211_device
++list	ieee80211.h	/^	struct list_head list;$/;"	m	struct:ieee80211_network	typeref:struct:ieee80211_network::list_head
++list	ieee80211.h	/^	struct list_head list;$/;"	m	struct:ieee_ibss_seq	typeref:struct:ieee_ibss_seq::list_head
++list	ieee80211.h	/^	struct list_head list;$/;"	m	struct:ieee_mesh_seq	typeref:struct:ieee_mesh_seq::list_head
++list	ieee80211_crypt.c	/^	struct list_head list;$/;"	m	struct:ieee80211_crypto_alg	typeref:struct:ieee80211_crypto_alg::list_head	file:
++list	ieee80211_crypt.h	/^	struct list_head list; \/* delayed deletion list *\/$/;"	m	struct:ieee80211_crypt_data	typeref:struct:ieee80211_crypt_data::list_head
++list	rtl8187_mesh.h	/^	struct list_head	list;$/;"	m	struct:myMeshIDNode	typeref:struct:myMeshIDNode::list_head
++list_for_each_entry	internal.h	26;"	d
++listen_interval	ieee80211.h	/^	u16 listen_interval;$/;"	m	struct:ieee80211_assoc_request_frame
++listen_interval	ieee80211.h	/^	u16 listen_interval;$/;"	m	struct:ieee80211_network
++lock	ieee80211.h	/^	spinlock_t lock;$/;"	m	struct:ieee80211_device
++lock	ieee80211_crypt.c	/^	spinlock_t lock;$/;"	m	struct:ieee80211_crypto	file:
++lock_Rreq	rtl8187_mesh.h	/^	spinlock_t				lock_Rreq;						\/\/ lock for rreq_retry. Some function like aodv_expire\/tx use lock_queue simultaneously$/;"	m	struct:mshclass_priv
++lock_queue	rtl8187_mesh.h	/^	spinlock_t				lock_queue;						\/\/ lock for DOT11_EnQueue2\/DOT11_DeQueue2\/enque\/dequeue$/;"	m	struct:mshclass_priv
++lock_stainfo	rtl8187_mesh.h	/^	spinlock_t				lock_stainfo;					\/\/ lock for accessing the data structure of stat info$/;"	m	struct:mshclass_priv
++loop4	aes.c	242;"	d	file:
++loop6	aes.c	250;"	d	file:
++loop8	aes.c	260;"	d	file:
++ls_box	aes.c	139;"	d	file:
++mac	ieee80211.h	/^	u8 mac[ETH_ALEN];$/;"	m	struct:ieee_ibss_seq
++mac	ieee80211.h	/^	u8 mac[ETH_ALEN];$/;"	m	struct:ieee_mesh_seq
++mac_addr	ieee80211.h	/^	u8 mac_addr[ETH_ALEN];  \/\/record mac_add$/;"	m	struct:ieee80211_crypt_data_list
++mac_time	ieee80211.h	/^	u32 mac_time[2];$/;"	m	struct:ieee80211_rx_stats
++mask	ieee80211.h	/^	u8 mask;$/;"	m	struct:ieee80211_rx_stats
++max_burst_size	ieee80211.h	/^	u32 max_burst_size;$/;"	m	struct:ieee80211_wmm_tspec_elem
++max_msdu_size	ieee80211.h	/^	u16 max_msdu_size;$/;"	m	struct:ieee80211_wmm_tspec_elem
++max_serv_inter	ieee80211.h	/^	u32 max_serv_inter;$/;"	m	struct:ieee80211_wmm_tspec_elem
++mean_data_rate	ieee80211.h	/^	u32 mean_data_rate;$/;"	m	struct:ieee80211_wmm_tspec_elem
++medium_time	ieee80211.h	/^	u16 medium_time;$/;"	m	struct:ieee80211_wmm_tspec_elem
++memcpy_dir	scatterwalk.c	/^static void memcpy_dir(void *buf, void *sgdata, size_t nbytes, int out)$/;"	f	file:
++mesh	rtl8187_mesh.h	/^	} mesh;$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::__anon12
++meshEntries	rtl8187_mesh.h	/^	struct mesh_PeerEntry	*meshEntries;				\/\/ 1-to-1 for priv->ieee80211->networks$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::mesh_PeerEntry
++meshList	rtl8187_mesh.h	/^	struct list_head		meshList[MAX_CHANNEL_NUMBER];$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::list_head
++meshScanMode	ieee80211.h	/^        short meshScanMode;$/;"	m	struct:ieee80211_device
++mesh_AvailablePeerLink	rtl8187_mesh.h	/^		UINT8				mesh_AvailablePeerLink;  \/\/ ¦¹¬O§_¦³»Ý­n?(¦]¥¦µ¥¦P©ó mesh_PeerCAP)=>¼È ®É«O ¯d$/;"	m	struct:mshclass_priv::__anon12
++mesh_ChannelPrecedence	rtl8187_mesh.h	/^		UINT32				mesh_ChannelPrecedence;	\/\/ Channel Precedence$/;"	m	struct:mshclass_priv::__anon12
++mesh_EMSAIE_ANonce	rtl8187_mesh.h	/^		UINT8				mesh_EMSAIE_ANonce[32];$/;"	m	struct:mshclass_priv::__anon12
++mesh_EMSAIE_MA_ID	rtl8187_mesh.h	/^		UINT8				mesh_EMSAIE_MA_ID[6];$/;"	m	struct:mshclass_priv::__anon12
++mesh_EMSAIE_MIC	rtl8187_mesh.h	/^		UINT8				mesh_EMSAIE_MIC[16];$/;"	m	struct:mshclass_priv::__anon12
++mesh_EMSAIE_MIC_Control	rtl8187_mesh.h	/^		UINT16				mesh_EMSAIE_MIC_Control;$/;"	m	struct:mshclass_priv::__anon12
++mesh_EMSAIE_SNonce	rtl8187_mesh.h	/^		UINT8				mesh_EMSAIE_SNonce[32];$/;"	m	struct:mshclass_priv::__anon12
++mesh_HeaderFlags	rtl8187_mesh.h	/^		UINT8				mesh_HeaderFlags;	\/\/ mesh header ¤ºªº mesh flags field$/;"	m	struct:mshclass_priv::__anon12
++mesh_MDA_CAP	rtl8187_mesh.h	/^		UINT8				mesh_MDA_CAP;				\/\/ MDA capability$/;"	m	struct:mshclass_priv::__anon12
++mesh_MKDDIE_SecurityConfiguration	rtl8187_mesh.h	/^		UINT8				mesh_MKDDIE_SecurityConfiguration;$/;"	m	struct:mshclass_priv::__anon12
++mesh_MKD_DomainID	rtl8187_mesh.h	/^		UINT8				mesh_MKD_DomainID[6];$/;"	m	struct:mshclass_priv::__anon12
++mesh_PeerCAP_cap	rtl8187_mesh.h	/^		INT16				mesh_PeerCAP_cap;			\/\/ peer capability-Cap number (¦³¸¹¼Æ)$/;"	m	struct:mshclass_priv::__anon12
++mesh_PeerCAP_flags	rtl8187_mesh.h	/^		UINT8				mesh_PeerCAP_flags;		\/\/ peer capability-flags$/;"	m	struct:mshclass_priv::__anon12
++mesh_PeerEntry	rtl8187_mesh.h	/^struct mesh_PeerEntry {$/;"	s
++mesh_PowerSaveCAP	rtl8187_mesh.h	/^		UINT8				mesh_PowerSaveCAP;		\/\/ Power Save capability$/;"	m	struct:mshclass_priv::__anon12
++mesh_SyncCAP	rtl8187_mesh.h	/^		UINT8				mesh_SyncCAP;				\/\/ Synchronization capability$/;"	m	struct:mshclass_priv::__anon12
++mesh_Version	rtl8187_mesh.h	/^		UINT8				mesh_Version;				\/\/ ¨Ï¥Îªºª©¥»$/;"	m	struct:mshclass_priv::__anon12
++mesh_flag	rtl8187_mesh.h	/^	unsigned char		mesh_flag;$/;"	m	struct:ieee80211_hdr_mesh
++mesh_flag	rtl8187_mesh.h	/^	unsigned char		mesh_flag;$/;"	m	struct:ieee80211_hdr_mesh_QOS
++mesh_mac_filter_allow	rtl8187_mesh.h	/^	char 				mesh_mac_filter_allow[8][13];$/;"	m	struct:mshclass_priv
++mesh_mac_filter_deny	rtl8187_mesh.h	/^	char 				mesh_mac_filter_deny[8][13];$/;"	m	struct:mshclass_priv
++mesh_mac_hash	ieee80211.h	/^	struct list_head mesh_mac_hash[IEEE_MESH_MAC_HASH_SIZE];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
++mesh_mp_hdr	rtl8187_mesh.h	/^		struct list_head		mesh_mp_hdr;$/;"	m	struct:mshclass_priv::__anon12	typeref:struct:mshclass_priv::__anon12::list_head
++mesh_mp_ptr	rtl8187_mesh.h	/^	struct list_head			mesh_mp_ptr;		\/\/ MP list$/;"	m	struct:mesh_PeerEntry	typeref:struct:mesh_PeerEntry::list_head
++mesh_neighbor_TBL	rtl8187_mesh.h	/^	struct MESH_Neighbor_Entry	mesh_neighbor_TBL;$/;"	m	struct:mesh_PeerEntry	typeref:struct:mesh_PeerEntry::MESH_Neighbor_Entry
++mesh_network	rtl8187_mesh.h	/^	struct ieee80211_network mesh_network;$/;"	m	struct:myMeshIDNode	typeref:struct:myMeshIDNode::ieee80211_network
++mesh_peer_link_timer	rtl8187_mesh.h	/^		struct timer_list		mesh_peer_link_timer;	\/\/\/< ¹ï©|¥¼³s ½u(»P³s½u°h¦Ü¥¼³s½u) MP mesh_unEstablish_hdr §@ peer link time out$/;"	m	struct:mshclass_priv::__anon12	typeref:struct:mshclass_priv::__anon12::timer_list
++mesh_profile	rtl8187_mesh.h	/^		struct MESH_Profile		mesh_profile; \/\/ contains MESHID$/;"	m	struct:mshclass_priv::__anon12	typeref:struct:mshclass_priv::__anon12::MESH_Profile
++mesh_rreq_retry_queue	rtl8187_mesh.h	/^	struct hash_table *proxy_table, *mesh_rreq_retry_queue;	\/\/GANTOE	\/\/GANTOE$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::
++mesh_stats	rtl8187_mesh.h	/^		struct net_device_stats	mesh_stats; $/;"	m	struct:mshclass_priv::__anon12	typeref:struct:mshclass_priv::__anon12::net_device_stats
++mesh_unEstablish_hdr	rtl8187_mesh.h	/^		struct list_head		mesh_unEstablish_hdr;$/;"	m	struct:mshclass_priv::__anon12	typeref:struct:mshclass_priv::__anon12::list_head
++meshare	rtl8187_mesh.h	/^	struct MESH_Share		meshare; \/\/ mesh share data$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::MESH_Share
++meshid_set	ieee80211.h	/^	short meshid_set;	$/;"	m	struct:ieee80211_device
++mgmt_queue_head	ieee80211.h	/^	int mgmt_queue_head;$/;"	m	struct:ieee80211_device
++mgmt_queue_ring	ieee80211.h	/^	struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::sk_buff
++mgmt_queue_tail	ieee80211.h	/^	int mgmt_queue_tail;$/;"	m	struct:ieee80211_device
++mgmt_tx_lock	ieee80211.h	/^	spinlock_t mgmt_tx_lock;	$/;"	m	struct:ieee80211_device
++michael_block	michael_mic.c	46;"	d	file:
++michael_final	michael_mic.c	/^static void michael_final(void *ctx, u8 *out)$/;"	f	file:
++michael_init	michael_mic.c	/^static void michael_init(void *ctx)$/;"	f	file:
++michael_mic	ieee80211_crypt_tkip.c	/^static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,$/;"	f	file:
++michael_mic	ieee80211_crypt_tkip.c	/^static int michael_mic(struct ieee80211_tkip_data *tkey, u8 *key, u8 *hdr,$/;"	f	file:
++michael_mic_alg	michael_mic.c	/^static struct crypto_alg michael_mic_alg = {$/;"	v	typeref:struct:crypto_alg	file:
++michael_mic_ctx	michael_mic.c	/^struct michael_mic_ctx {$/;"	s	file:
++michael_mic_exit	michael_mic.c	/^module_exit(michael_mic_exit);$/;"	v
++michael_mic_exit	michael_mic.c	/^static void __exit michael_mic_exit(void)$/;"	f	file:
++michael_mic_hdr	ieee80211_crypt_tkip.c	/^static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)$/;"	f	file:
++michael_mic_init	michael_mic.c	/^module_init(michael_mic_init);$/;"	v
++michael_mic_init	michael_mic.c	/^static int __init michael_mic_init(void)$/;"	f	file:
++michael_setkey	michael_mic.c	/^static int michael_setkey(void *ctx, const u8 *key, unsigned int keylen,$/;"	f	file:
++michael_update	michael_mic.c	/^static void michael_update(void *ctx, const u8 *data, unsigned int len)$/;"	f	file:
++min_data_rate	ieee80211.h	/^	u32 min_data_rate;$/;"	m	struct:ieee80211_wmm_tspec_elem
++min_phy_rate	ieee80211.h	/^	u32 min_phy_rate;$/;"	m	struct:ieee80211_wmm_tspec_elem
++min_serv_inter	ieee80211.h	/^	u32 min_serv_inter;$/;"	m	struct:ieee80211_wmm_tspec_elem
++mlme	ieee80211.h	/^		} mlme;$/;"	m	union:ieee_param::__anon4	typeref:struct:ieee_param::__anon4::__anon7
++mode	ieee80211.h	/^	int mode;       \/* A, B, G *\/$/;"	m	struct:ieee80211_device
++mode	ieee80211.h	/^	u8 mode;$/;"	m	struct:ieee80211_network
++modulation	ieee80211.h	/^	int modulation; \/* CCK, OFDM *\/$/;"	m	struct:ieee80211_device
++mshclass_priv	rtl8187_mesh.h	/^struct mshclass_priv {$/;"	s
++msleep_interruptible_rtl	ieee80211.h	/^static inline unsigned long msleep_interruptible_rtl(unsigned int msecs)$/;"	f
++msleep_interruptible_rtl	ieee80211.h	210;"	d
++myMeshIDNode	rtl8187_mesh.h	/^struct myMeshIDNode {$/;"	s
++name	ieee80211.h	/^			u8 name;$/;"	m	struct:ieee_param::__anon4::__anon5
++name	ieee80211_crypt.h	/^	const char *name;$/;"	m	struct:ieee80211_crypto_ops
++network_free_list	ieee80211.h	/^	struct list_head network_free_list;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
++network_list	ieee80211.h	/^	struct list_head network_list;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::list_head
++networks	ieee80211.h	/^	struct ieee80211_network *networks;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_network
++nic_type	ieee80211.h	/^	u8 nic_type;$/;"	m	struct:ieee80211_rx_stats
++no_ass_rs	ieee80211.h	/^	unsigned int no_ass_rs;$/;"	m	struct:ieee80211_softmac_stats
++no_auth_rs	ieee80211.h	/^	unsigned int no_auth_rs;$/;"	m	struct:ieee80211_softmac_stats
++nocrypt	cipher.c	/^static int nocrypt(struct crypto_tfm *tfm,$/;"	f	file:
++nocrypt_iv	cipher.c	/^static int nocrypt_iv(struct crypto_tfm *tfm,$/;"	f	file:
++noise	ieee80211.h	/^	u8 noise;$/;"	m	struct:ieee80211_rx_stats
++norm_msdu_size	ieee80211.h	/^	u16 norm_msdu_size;$/;"	m	struct:ieee80211_wmm_tspec_elem
++notify_wx_assoc_event	ieee80211_softmac.c	/^EXPORT_SYMBOL(notify_wx_assoc_event);$/;"	v
++notify_wx_assoc_event	ieee80211_softmac.c	/^void notify_wx_assoc_event(struct ieee80211_device *ieee)$/;"	f
++nr_frags	ieee80211.h	/^	u8 nr_frags;$/;"	m	struct:ieee80211_txb
++offset	scatterwalk.h	/^	unsigned int		offset;$/;"	m	struct:scatter_walk
++offset_in_page	ieee80211_crypt.h	86;"	d
++open_wep	ieee80211.h	/^	int open_wep; \/* Set to 1 to allow unencrypted frames *\/$/;"	m	struct:ieee80211_device
++ops	ieee80211_crypt.c	/^	struct ieee80211_crypto_ops *ops;$/;"	m	struct:ieee80211_crypto_alg	typeref:struct:ieee80211_crypto_alg::ieee80211_crypto_ops	file:
++ops	ieee80211_crypt.h	/^	struct ieee80211_crypto_ops *ops;$/;"	m	struct:ieee80211_crypt_data	typeref:struct:ieee80211_crypt_data::ieee80211_crypto_ops
++oui	ieee80211.h	/^        u8    oui[P80211_OUI_LEN];    \/* organizational universal id *\/$/;"	m	struct:ieee80211_snap_hdr
++owner	ieee80211_crypt.h	/^	struct module *owner;$/;"	m	struct:ieee80211_crypto_ops	typeref:struct:ieee80211_crypto_ops::module
++pDot11dInfo	ieee80211.h	/^	void * pDot11dInfo;$/;"	m	struct:ieee80211_device
++packet_time	ieee80211.h	/^	unsigned long packet_time;$/;"	m	struct:ieee_mesh_seq
++packet_time	ieee80211.h	/^	unsigned long packet_time[17];$/;"	m	struct:ieee_ibss_seq
++page	scatterwalk.h	/^	struct page		*page;$/;"	m	struct:scatter_walk	typeref:struct:scatter_walk::page
++pairwise_key_type	ieee80211.h	/^	u16 pairwise_key_type;$/;"	m	struct:ieee80211_device
++pann_mpp_tb	rtl8187_mesh.h	/^	struct mpp_tb *pann_mpp_tb;$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::mpp_tb
++pathsel_queue	rtl8187_mesh.h	/^	struct _DOT11_QUEUE		*pathsel_queue;	\/\/\/< 802.11 QUEUEµ²ºc$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::_DOT11_QUEUE
++pathsel_table	rtl8187_mesh.h	/^	struct hash_table *pathsel_table; \/\/ add by chuangch 2007.09.13$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::hash_table
++payload_size	ieee80211.h	/^	u16 payload_size;$/;"	m	struct:ieee80211_txb
++peak_data_rate	ieee80211.h	/^	u32 peak_data_rate;$/;"	m	struct:ieee80211_wmm_tspec_elem
++pending	michael_mic.c	/^	u8 pending[4];$/;"	m	struct:michael_mic_ctx	file:
++pending_len	michael_mic.c	/^	size_t pending_len;$/;"	m	struct:michael_mic_ctx	file:
++popEN	rtl8187_mesh.h	/^	short popEN;$/;"	m	struct:myMeshIDNode
++prev_iw_mode	rtl8187_mesh.h	/^		int						prev_iw_mode; \/\/ Save this->iw_mode for r8180_wx->r8180_wx_enable_mesh. No init requirement$/;"	m	struct:mshclass_priv::__anon12
++print_stats	ieee80211_crypt.h	/^	char * (*print_stats)(char *p, void *priv);$/;"	m	struct:ieee80211_crypto_ops
++prism2_wep_data	ieee80211_crypt_wep.c	/^struct prism2_wep_data {$/;"	s	file:
++prism2_wep_decrypt	ieee80211_crypt_wep.c	/^static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)$/;"	f	file:
++prism2_wep_deinit	ieee80211_crypt_wep.c	/^static void prism2_wep_deinit(void *priv)$/;"	f	file:
++prism2_wep_encrypt	ieee80211_crypt_wep.c	/^static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)$/;"	f	file:
++prism2_wep_get_key	ieee80211_crypt_wep.c	/^static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)$/;"	f	file:
++prism2_wep_init	ieee80211_crypt_wep.c	/^static void * prism2_wep_init(int keyidx)$/;"	f	file:
++prism2_wep_print_stats	ieee80211_crypt_wep.c	/^static char * prism2_wep_print_stats(char *p, void *priv)$/;"	f	file:
++prism2_wep_set_key	ieee80211_crypt_wep.c	/^static int prism2_wep_set_key(void *key, int len, u8 *seq, void *priv)$/;"	f	file:
++priv	ieee80211.h	/^	u8 priv[0];$/;"	m	struct:ieee80211_device
++priv	ieee80211_crypt.h	/^	void *priv;$/;"	m	struct:ieee80211_crypt_data
++privacy_invoked	ieee80211.h	/^	int privacy_invoked;$/;"	m	struct:ieee80211_device
++probe_rq_parse	ieee80211_softmac.c	/^static short probe_rq_parse(struct ieee80211_device *ieee, struct sk_buff *skb, u8 *src)$/;"	f	file:
++proc_crypto_ops	proc.c	/^static struct file_operations proc_crypto_ops = {$/;"	v	typeref:struct:file_operations	file:
++procfn_t	cipher.c	/^typedef void (procfn_t)(struct crypto_tfm *, u8 *,$/;"	t	file:
++proto_started	ieee80211.h	/^	short proto_started;$/;"	m	struct:ieee80211_device
++proxy_table	rtl8187_mesh.h	/^	struct hash_table *proxy_table, *mesh_rreq_retry_queue;	\/\/GANTOE	\/\/GANTOE$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::hash_table
++ps	ieee80211.h	/^	short ps;$/;"	m	struct:ieee80211_device
++ps_is_queue_empty	ieee80211.h	/^	short (*ps_is_queue_empty) (struct net_device *dev);$/;"	m	struct:ieee80211_device
++ps_request_tx_ack	ieee80211.h	/^	void (*ps_request_tx_ack) (struct net_device *dev);$/;"	m	struct:ieee80211_device
++ps_task	ieee80211.h	/^	struct tasklet_struct ps_task;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tasklet_struct
++ps_th	ieee80211.h	/^	u32 ps_th;$/;"	m	struct:ieee80211_device
++ps_timeout	ieee80211.h	/^	int ps_timeout;$/;"	m	struct:ieee80211_device
++ps_tl	ieee80211.h	/^	u32 ps_tl;$/;"	m	struct:ieee80211_device
++pstat	rtl8187_mesh.h	/^		struct ieee80211_network	*pstat;$/;"	m	struct:mshclass_priv::__anon11	typeref:struct:mshclass_priv::__anon11::ieee80211_network
++pstat	rtl8187_mesh.h	/^	struct ieee80211_network *	pstat; \/\/ a backward pointer$/;"	m	struct:mesh_PeerEntry	typeref:struct:mesh_PeerEntry::ieee80211_network
++put_le32	michael_mic.c	/^static inline void put_le32(u8 *p, u32 v)$/;"	f	file:
++queue_stop	ieee80211.h	/^	short queue_stop;$/;"	m	struct:ieee80211_device
++r	michael_mic.c	/^	u32 l, r;$/;"	m	struct:michael_mic_ctx	file:
++rate	ieee80211.h	/^	int rate;       \/* current rate *\/$/;"	m	struct:ieee80211_device
++rate	ieee80211.h	/^	u16 rate; \/* in 100 kbps *\/$/;"	m	struct:ieee80211_rx_stats
++rate_adapter_wq	ieee80211.h	/^                struct delayed_work rate_adapter_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++rate_adapter_wq	ieee80211.h	/^                struct work_struct rate_adapter_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++rates	ieee80211.h	/^	u8 rates[MAX_RATES_LENGTH];$/;"	m	struct:ieee80211_network
++rates_ex	ieee80211.h	/^	u8 rates_ex[MAX_RATES_EX_LENGTH];$/;"	m	struct:ieee80211_network
++rates_ex_len	ieee80211.h	/^	u8 rates_ex_len;$/;"	m	struct:ieee80211_network
++rates_len	ieee80211.h	/^	u8 rates_len;$/;"	m	struct:ieee80211_network
++raw_tx	ieee80211.h	/^	short raw_tx;$/;"	m	struct:ieee80211_device
++rco_tab	aes.c	/^static u32 rco_tab[10];$/;"	v	file:
++reason_code	ieee80211.h	/^    			int reason_code;$/;"	m	struct:ieee_param::__anon4::__anon7
++reassoc	ieee80211.h	/^	unsigned int reassoc;$/;"	m	struct:ieee80211_softmac_stats
++received_channel	ieee80211.h	/^	u8 received_channel;$/;"	m	struct:ieee80211_rx_stats
++refcnt	ieee80211_crypt.h	/^	atomic_t refcnt;$/;"	m	struct:ieee80211_crypt_data
++reserved	ieee80211.h	/^			u8 reserved[32];$/;"	m	struct:ieee_param::__anon4::__anon6
++reserved	ieee80211.h	/^	u16 reserved;$/;"	m	struct:ieee80211_txb
++reserved	ieee80211.h	/^	u8 reserved;$/;"	m	struct:ieee80211_wmm_ts_info
++reset_on_keychange	ieee80211.h	/^	int reset_on_keychange; \/* Set to 1 if the HW needs to be reset on$/;"	m	struct:ieee80211_device
++reset_port	ieee80211.h	/^	int (*reset_port)(struct net_device *dev);$/;"	m	struct:ieee80211_device
++rfc1042_header	ieee80211_rx.c	/^static unsigned char rfc1042_header[] =$/;"	v	file:
++root_mac	rtl8187_mesh.h	/^	unsigned char root_mac[MACADDRLEN];$/;"	m	struct:mshclass_priv
++rotl	aes.c	82;"	d	file:
++rotl	michael_mic.c	/^static inline u32 rotl(u32 val, int bits)$/;"	f	file:
++rotr	aes.c	83;"	d	file:
++rotr	michael_mic.c	/^static inline u32 rotr(u32 val, int bits)$/;"	f	file:
++rsn_authen_cipher_suite	ieee80211_softmac.c	/^u8 rsn_authen_cipher_suite[16][4] = {$/;"	v
++rsn_ie	ieee80211.h	/^	u8 rsn_ie[MAX_WPA_IE_LEN];$/;"	m	struct:ieee80211_network
++rsn_ie_len	ieee80211.h	/^	size_t rsn_ie_len;$/;"	m	struct:ieee80211_network
++rssi	ieee80211.h	/^	s8 rssi;$/;"	m	struct:ieee80211_rx_stats
++rtl819x_translate_scan	ieee80211_wx.c	/^static inline char *rtl819x_translate_scan(struct ieee80211_device *ieee,$/;"	f	file:
++rx_a	ieee80211_crypt_ccmp.c	/^	u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];$/;"	m	struct:ieee80211_ccmp_data	file:
++rx_ass_err	ieee80211.h	/^	unsigned int rx_ass_err;$/;"	m	struct:ieee80211_softmac_stats
++rx_ass_ok	ieee80211.h	/^	unsigned int rx_ass_ok;$/;"	m	struct:ieee80211_softmac_stats
++rx_ass_rq	ieee80211.h	/^	unsigned int rx_ass_rq;$/;"	m	struct:ieee80211_softmac_stats
++rx_auth_rq	ieee80211.h	/^	unsigned int rx_auth_rq;$/;"	m	struct:ieee80211_softmac_stats
++rx_auth_rs_err	ieee80211.h	/^	unsigned int rx_auth_rs_err;$/;"	m	struct:ieee80211_softmac_stats
++rx_auth_rs_ok	ieee80211.h	/^	unsigned int rx_auth_rs_ok;$/;"	m	struct:ieee80211_softmac_stats
++rx_b	ieee80211_crypt_ccmp.c	/^	u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];$/;"	m	struct:ieee80211_ccmp_data	file:
++rx_b0	ieee80211_crypt_ccmp.c	/^	u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];$/;"	m	struct:ieee80211_ccmp_data	file:
++rx_discards_no_buffer	ieee80211.h	/^	unsigned int rx_discards_no_buffer;$/;"	m	struct:ieee80211_stats
++rx_discards_undecryptable	ieee80211.h	/^	unsigned int rx_discards_undecryptable;$/;"	m	struct:ieee80211_stats
++rx_fcs_errors	ieee80211.h	/^	unsigned int rx_fcs_errors;$/;"	m	struct:ieee80211_stats
++rx_fragments	ieee80211.h	/^	unsigned int rx_fragments;$/;"	m	struct:ieee80211_stats
++rx_hdr	ieee80211_crypt_tkip.c	/^	u8 rx_hdr[16], tx_hdr[16];$/;"	m	struct:ieee80211_tkip_data	file:
++rx_iv16	ieee80211_crypt_tkip.c	/^	u16 rx_iv16;$/;"	m	struct:ieee80211_tkip_data	file:
++rx_iv16_new	ieee80211_crypt_tkip.c	/^	u16 rx_iv16_new;$/;"	m	struct:ieee80211_tkip_data	file:
++rx_iv32	ieee80211_crypt_tkip.c	/^	u32 rx_iv32;$/;"	m	struct:ieee80211_tkip_data	file:
++rx_iv32_new	ieee80211_crypt_tkip.c	/^	u32 rx_iv32_new;$/;"	m	struct:ieee80211_tkip_data	file:
++rx_message_in_bad_msg_fragments	ieee80211.h	/^	unsigned int rx_message_in_bad_msg_fragments;$/;"	m	struct:ieee80211_stats
++rx_message_in_msg_fragments	ieee80211.h	/^	unsigned int rx_message_in_msg_fragments;$/;"	m	struct:ieee80211_stats
++rx_multicast_frames	ieee80211.h	/^	unsigned int rx_multicast_frames;$/;"	m	struct:ieee80211_stats
++rx_multicast_octets	ieee80211.h	/^	unsigned int rx_multicast_octets;$/;"	m	struct:ieee80211_stats
++rx_phase1_done	ieee80211_crypt_tkip.c	/^	int rx_phase1_done;$/;"	m	struct:ieee80211_tkip_data	file:
++rx_pn	ieee80211_crypt_ccmp.c	/^	u8 rx_pn[CCMP_PN_LEN];$/;"	m	struct:ieee80211_ccmp_data	file:
++rx_probe_rq	ieee80211.h	/^	unsigned int rx_probe_rq;$/;"	m	struct:ieee80211_softmac_stats
++rx_tfm	ieee80211_crypt_wep.c	/^	struct crypto_blkcipher *rx_tfm;$/;"	m	struct:prism2_wep_data	typeref:struct:prism2_wep_data::crypto_blkcipher	file:
++rx_tfm_arc4	ieee80211_crypt_tkip.c	/^	   	struct crypto_blkcipher *rx_tfm_arc4;$/;"	m	struct:ieee80211_tkip_data	typeref:struct:ieee80211_tkip_data::crypto_blkcipher	file:
++rx_tfm_michael	ieee80211_crypt_tkip.c	/^	       struct crypto_hash *rx_tfm_michael;$/;"	m	struct:ieee80211_tkip_data	typeref:struct:ieee80211_tkip_data::crypto_hash	file:
++rx_ttak	ieee80211_crypt_tkip.c	/^	u16 rx_ttak[5];$/;"	m	struct:ieee80211_tkip_data	file:
++rx_unicast_frames	ieee80211.h	/^	unsigned int rx_unicast_frames;$/;"	m	struct:ieee80211_stats
++rx_unicast_octets	ieee80211.h	/^	unsigned int rx_unicast_octets;$/;"	m	struct:ieee80211_stats
++scanMode	rtl8187_mesh.h	/^	int 					scanMode;$/;"	m	struct:mshclass_priv
++scan_age	ieee80211.h	/^	int scan_age;$/;"	m	struct:ieee80211_device
++scan_sem	ieee80211.h	/^	struct semaphore scan_sem;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::semaphore
++scan_syncro	ieee80211.h	/^	void (*scan_syncro)(struct net_device *dev);$/;"	m	struct:ieee80211_device
++scan_timer	ieee80211.h	/^	struct timer_list scan_timer;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::timer_list
++scan_watchdog	ieee80211.h	/^	short scan_watchdog;\/\/lzm add 081215 for roaming$/;"	m	struct:ieee80211_device
++scanning	ieee80211.h	/^	short scanning;$/;"	m	struct:ieee80211_device
++scans	ieee80211.h	/^	int scans;$/;"	m	struct:ieee80211_device
++scatter_walk	scatterwalk.h	/^struct scatter_walk {$/;"	s
++scatterwalk_copychunks	scatterwalk.c	/^int scatterwalk_copychunks(void *buf, struct scatter_walk *walk,$/;"	f
++scatterwalk_done	scatterwalk.c	/^void scatterwalk_done(struct scatter_walk *walk, int out, int more)$/;"	f
++scatterwalk_map	scatterwalk.c	/^void scatterwalk_map(struct scatter_walk *walk, int out)$/;"	f
++scatterwalk_pagedone	scatterwalk.c	/^static void scatterwalk_pagedone(struct scatter_walk *walk, int out,$/;"	f	file:
++scatterwalk_samebuf	scatterwalk.h	/^static inline int scatterwalk_samebuf(struct scatter_walk *walk_in,$/;"	f
++scatterwalk_start	scatterwalk.c	/^void scatterwalk_start(struct scatter_walk *walk, struct scatterlist *sg)$/;"	f
++scatterwalk_whichbuf	scatterwalk.c	/^void *scatterwalk_whichbuf(struct scatter_walk *walk, unsigned int nbytes, void *scratch)$/;"	f
++segNum	rtl8187_mesh.h	/^	UINT16 				segNum;$/;"	m	struct:ieee80211_hdr_mesh
++segNum	rtl8187_mesh.h	/^	UINT16 				segNum;$/;"	m	struct:ieee80211_hdr_mesh_QOS
++seq	ieee80211.h	/^			u8 seq[8]; \/* sequence counter (set: RX, get: TX) *\/$/;"	m	struct:ieee_param::__anon4::__anon8
++seq	ieee80211.h	/^	unsigned int seq;$/;"	m	struct:ieee80211_frag_entry
++seq_ctl	ieee80211.h	/^	u16 seq_ctl;$/;"	m	struct:ieee80211_hdr
++seq_ctl	ieee80211.h	/^	u16 seq_ctl;$/;"	m	struct:ieee80211_hdr_3addr
++seq_ctl	ieee80211.h	/^	u16 seq_ctl;$/;"	m	struct:ieee80211_hdr_3addr_QOS
++seq_ctl	ieee80211.h	/^	u16 seq_ctl;$/;"	m	struct:ieee80211_hdr_QOS
++seq_ctl	rtl8187_mesh.h	/^	u16					seq_ctl;$/;"	m	struct:ieee80211_hdr_mesh
++seq_ctl	rtl8187_mesh.h	/^	u16					seq_ctl;$/;"	m	struct:ieee80211_hdr_mesh_QOS
++seq_ctrl	ieee80211.h	/^	u16 seq_ctrl;$/;"	m	struct:ieee80211_header_data
++seq_ctrl	ieee80211.h	/^	u16 seq_ctrl[5];$/;"	m	struct:ieee80211_device
++seq_num	ieee80211.h	/^	u16 seq_num;$/;"	m	struct:ieee_mesh_seq
++seq_num	ieee80211.h	/^	u16 seq_num[17];$/;"	m	struct:ieee_ibss_seq
++serv_start_time	ieee80211.h	/^	u32 serv_start_time;$/;"	m	struct:ieee80211_wmm_tspec_elem
++set_chan	ieee80211.h	/^	void (*set_chan)(struct net_device *dev,short ch);$/;"	m	struct:ieee80211_device
++set_key	ieee80211_crypt.h	/^	int (*set_key)(void *key, int len, u8 *seq, void *priv);$/;"	m	struct:ieee80211_crypto_ops
++set_security	ieee80211.h	/^	void (*set_security)(struct net_device *dev,$/;"	m	struct:ieee80211_device
++set_tx	ieee80211.h	/^			u8 set_tx;$/;"	m	struct:ieee_param::__anon4::__anon8
++setkey	cipher.c	/^static int setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)$/;"	f	file:
++setkey	digest.c	/^static int setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)$/;"	f	file:
++sg	scatterwalk.h	/^	struct scatterlist	*sg;$/;"	m	struct:scatter_walk	typeref:struct:scatter_walk::scatterlist
++sg_next	scatterwalk.h	/^static inline struct scatterlist *sg_next(struct scatterlist *sg)$/;"	f
++short_slot	ieee80211.h	/^	int short_slot;$/;"	m	struct:ieee80211_device
++show_debug_level	ieee80211_module.c	/^static int show_debug_level(char *page, char **start, off_t offset,$/;"	f	file:
++signal	ieee80211.h	/^	u8 signal;$/;"	m	struct:ieee80211_rx_stats
++signalstrength	ieee80211.h	/^	u8 signalstrength;$/;"	m	struct:ieee80211_rx_stats
++skb	ieee80211.h	/^	struct sk_buff *skb;$/;"	m	struct:ieee80211_frag_entry	typeref:struct:ieee80211_frag_entry::sk_buff
++snap	ieee80211.h	/^	u8 snap[6];$/;"	m	struct:eapol
++softmac_data_hard_start_xmit	ieee80211.h	/^	void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,$/;"	m	struct:ieee80211_device
++softmac_features	ieee80211.h	/^	u16 softmac_features;$/;"	m	struct:ieee80211_device
++softmac_hard_start_xmit	ieee80211.h	/^	int (*softmac_hard_start_xmit)(struct sk_buff *skb,$/;"	m	struct:ieee80211_device
++softmac_mgmt_xmit	ieee80211_softmac.c	/^EXPORT_SYMBOL(softmac_mgmt_xmit);$/;"	v
++softmac_mgmt_xmit	ieee80211_softmac.c	/^EXPORT_SYMBOL_NOVERS(softmac_mgmt_xmit);$/;"	v
++softmac_mgmt_xmit	ieee80211_softmac.c	/^inline void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)$/;"	f
++softmac_ps_mgmt_xmit	ieee80211_softmac.c	/^inline void softmac_ps_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee)$/;"	f
++softmac_scan_wq	ieee80211.h	/^	struct tq_struct softmac_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++softmac_scan_wq	ieee80211.h	/^        struct delayed_work softmac_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++softmac_scan_wq	ieee80211.h	/^        struct work_struct softmac_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++softmac_stats	ieee80211.h	/^	struct ieee80211_softmac_stats softmac_stats;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::ieee80211_softmac_stats
++src_addr	ieee80211.h	/^	u8 src_addr[ETH_ALEN];$/;"	m	struct:ieee80211_frag_entry
++ssap	ieee80211.h	/^        u8    ssap;   \/* always 0xAA *\/$/;"	m	struct:ieee80211_snap_hdr
++ssid	ieee80211.h	/^	u8 ssid[IW_ESSID_MAX_SIZE + 1];$/;"	m	struct:ieee80211_network
++ssid_len	ieee80211.h	/^	u8 ssid_len;$/;"	m	struct:ieee80211_network
++ssid_set	ieee80211.h	/^	short ssid_set;$/;"	m	struct:ieee80211_device
++sta_addr	ieee80211.h	/^	u8 sta_addr[ETH_ALEN];$/;"	m	struct:ieee_param
++sta_sleep	ieee80211.h	/^	short sta_sleep;$/;"	m	struct:ieee80211_device
++sta_wake_up	ieee80211.h	/^	void (*sta_wake_up) (struct net_device *dev);$/;"	m	struct:ieee80211_device
++stainfo_cache	rtl8187_mesh.h	/^	} stainfo_cache;$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::__anon11
++star_x	aes.c	228;"	d	file:
++start_ibss_wq	ieee80211.h	/^	struct delayed_work start_ibss_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++start_ibss_wq	ieee80211.h	/^	struct tq_struct start_ibss_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++start_ibss_wq	ieee80211.h	/^	struct work_struct start_ibss_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++start_scan	ieee80211.h	/^	void (*start_scan)(struct net_device *dev);$/;"	m	struct:ieee80211_device
++start_send_beacons	ieee80211.h	/^	void (*start_send_beacons) (struct net_device *dev);$/;"	m	struct:ieee80211_device
++stat_hash	rtl8187_mesh.h	/^	struct list_head		stat_hash[MAX_NETWORK_COUNT];	\/\/ sta_info hash table (aid_obj)$/;"	m	struct:mshclass_priv	typeref:struct:mshclass_priv::list_head
++state	ieee80211.h	/^	enum ieee80211_state state;$/;"	m	struct:ieee80211_device	typeref:enum:ieee80211_device::ieee80211_state
++stats	ieee80211.h	/^	struct ieee80211_rx_stats stats;$/;"	m	struct:ieee80211_network	typeref:struct:ieee80211_network::ieee80211_rx_stats
++stats	ieee80211.h	/^	struct net_device_stats stats;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::net_device_stats
++status	ieee80211.h	/^	u16 status;$/;"	m	struct:ieee80211_assoc_response_frame
++status	ieee80211.h	/^	u16 status;$/;"	m	struct:ieee80211_authentication
++stop_scan	ieee80211.h	/^	void (*stop_scan)(struct net_device *dev);$/;"	m	struct:ieee80211_device
++stop_send_beacons	ieee80211.h	/^	void (*stop_send_beacons) (struct net_device *dev);$/;"	m	struct:ieee80211_device
++store_debug_level	ieee80211_module.c	/^static int store_debug_level(struct file *file, const char *buffer,$/;"	f	file:
++surp_band_allow	ieee80211.h	/^	u16 surp_band_allow;$/;"	m	struct:ieee80211_wmm_tspec_elem
++suspen_inter	ieee80211.h	/^	u32 suspen_inter;$/;"	m	struct:ieee80211_wmm_tspec_elem
++swtxawake	ieee80211.h	/^	unsigned int swtxawake;$/;"	m	struct:ieee80211_softmac_stats
++swtxstop	ieee80211.h	/^	unsigned int swtxstop;$/;"	m	struct:ieee80211_softmac_stats
++sync_scan_hurryup	ieee80211.h	/^	short sync_scan_hurryup; $/;"	m	struct:ieee80211_device
++tfm	ieee80211_crypt_ccmp.c	/^	struct crypto_tfm *tfm;$/;"	m	struct:ieee80211_ccmp_data	typeref:struct:ieee80211_ccmp_data::crypto_tfm	file:
++tfm	ieee80211_crypt_wep.c	/^	struct crypto_tfm *tfm;$/;"	m	struct:prism2_wep_data	typeref:struct:prism2_wep_data::crypto_tfm	file:
++tfm_arc4	ieee80211_crypt_tkip.c	/^	struct crypto_tfm *tfm_arc4;$/;"	m	struct:ieee80211_tkip_data	typeref:struct:ieee80211_tkip_data::crypto_tfm	file:
++tfm_michael	ieee80211_crypt_tkip.c	/^	struct crypto_tfm *tfm_michael;$/;"	m	struct:ieee80211_tkip_data	typeref:struct:ieee80211_tkip_data::crypto_tfm	file:
++time_stamp	ieee80211.h	/^	u32 time_stamp[2];$/;"	m	struct:ieee80211_network
++time_stamp	ieee80211.h	/^	u32 time_stamp[2];$/;"	m	struct:ieee80211_probe_response
++tkip_countermeasures	ieee80211.h	/^	int tkip_countermeasures;$/;"	m	struct:ieee80211_device
++tkip_mixing_phase1	ieee80211_crypt_tkip.c	/^static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)$/;"	f	file:
++tkip_mixing_phase2	ieee80211_crypt_tkip.c	/^static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,$/;"	f	file:
++tq_init	ieee80211.h	/^static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)$/;"	f
++transaction	ieee80211.h	/^	u16 transaction;$/;"	m	struct:ieee80211_authentication
++tried	rtl8187_mesh.h	/^	char  tried;$/;"	m	struct:myMeshIDNode
++true	ieee80211.h	/^typedef enum{false = 0, true} bool;$/;"	e	enum:__anon3
++ts_info	ieee80211.h	/^	struct ieee80211_wmm_ts_info ts_info;$/;"	m	struct:ieee80211_wmm_tspec_elem	typeref:struct:ieee80211_wmm_tspec_elem::ieee80211_wmm_ts_info
++tx_ass_rq	ieee80211.h	/^	unsigned int tx_ass_rq;$/;"	m	struct:ieee80211_softmac_stats
++tx_auth_rq	ieee80211.h	/^	unsigned int tx_auth_rq;$/;"	m	struct:ieee80211_softmac_stats
++tx_b	ieee80211_crypt_ccmp.c	/^	u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],$/;"	m	struct:ieee80211_ccmp_data	file:
++tx_b0	ieee80211_crypt_ccmp.c	/^	u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],$/;"	m	struct:ieee80211_ccmp_data	file:
++tx_beacons	ieee80211.h	/^	unsigned int tx_beacons;$/;"	m	struct:ieee80211_softmac_stats
++tx_deferred_transmissions	ieee80211.h	/^	unsigned int tx_deferred_transmissions;$/;"	m	struct:ieee80211_stats
++tx_discards	ieee80211.h	/^	unsigned int tx_discards;$/;"	m	struct:ieee80211_stats
++tx_discards_wrong_sa	ieee80211.h	/^	unsigned int tx_discards_wrong_sa;$/;"	m	struct:ieee80211_stats
++tx_e	ieee80211_crypt_ccmp.c	/^		tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];$/;"	m	struct:ieee80211_ccmp_data	file:
++tx_fragments	ieee80211.h	/^	unsigned int tx_fragments;$/;"	m	struct:ieee80211_stats
++tx_hdr	ieee80211_crypt_tkip.c	/^	u8 rx_hdr[16], tx_hdr[16];$/;"	m	struct:ieee80211_tkip_data	file:
++tx_headroom	ieee80211.h	/^	int tx_headroom; \/* Set to size of any additional room needed at front$/;"	m	struct:ieee80211_device
++tx_iv16	ieee80211_crypt_tkip.c	/^	u16 tx_iv16;$/;"	m	struct:ieee80211_tkip_data	file:
++tx_iv32	ieee80211_crypt_tkip.c	/^	u32 tx_iv32;$/;"	m	struct:ieee80211_tkip_data	file:
++tx_keyidx	ieee80211.h	/^	int tx_keyidx; \/* default TX key index (crypt[tx_keyidx]) *\/$/;"	m	struct:ieee80211_device
++tx_multicast_frames	ieee80211.h	/^	unsigned int tx_multicast_frames;$/;"	m	struct:ieee80211_stats
++tx_multicast_octets	ieee80211.h	/^	unsigned int tx_multicast_octets;$/;"	m	struct:ieee80211_stats
++tx_multiple_retry_frames	ieee80211.h	/^	unsigned int tx_multiple_retry_frames;$/;"	m	struct:ieee80211_stats
++tx_pending	ieee80211.h	/^	struct  tx_pending_t tx_pending;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tx_pending_t
++tx_pending_t	ieee80211.h	/^typedef struct tx_pending_t{$/;"	s
++tx_pending_t	ieee80211.h	/^}tx_pending_t;$/;"	t	typeref:struct:tx_pending_t
++tx_phase1_done	ieee80211_crypt_tkip.c	/^	int tx_phase1_done;$/;"	m	struct:ieee80211_tkip_data	file:
++tx_pn	ieee80211_crypt_ccmp.c	/^	u8 tx_pn[CCMP_PN_LEN];$/;"	m	struct:ieee80211_ccmp_data	file:
++tx_probe_rq	ieee80211.h	/^	unsigned int tx_probe_rq;$/;"	m	struct:ieee80211_softmac_stats
++tx_probe_rs	ieee80211.h	/^	unsigned int tx_probe_rs;$/;"	m	struct:ieee80211_softmac_stats
++tx_pw_wq	ieee80211.h	/^	struct delayed_work tx_pw_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++tx_pw_wq	ieee80211.h	/^	struct work_struct tx_pw_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++tx_retry_limit_exceeded	ieee80211.h	/^	unsigned int tx_retry_limit_exceeded;$/;"	m	struct:ieee80211_stats
++tx_s0	ieee80211_crypt_ccmp.c	/^		tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];$/;"	m	struct:ieee80211_ccmp_data	file:
++tx_single_retry_frames	ieee80211.h	/^	unsigned int tx_single_retry_frames;$/;"	m	struct:ieee80211_stats
++tx_tfm	ieee80211_crypt_wep.c	/^	struct crypto_blkcipher *tx_tfm;$/;"	m	struct:prism2_wep_data	typeref:struct:prism2_wep_data::crypto_blkcipher	file:
++tx_tfm_arc4	ieee80211_crypt_tkip.c	/^	       struct crypto_blkcipher *tx_tfm_arc4;$/;"	m	struct:ieee80211_tkip_data	typeref:struct:ieee80211_tkip_data::crypto_blkcipher	file:
++tx_tfm_michael	ieee80211_crypt_tkip.c	/^	       struct crypto_hash *tx_tfm_michael;$/;"	m	struct:ieee80211_tkip_data	typeref:struct:ieee80211_tkip_data::crypto_hash	file:
++tx_ttak	ieee80211_crypt_tkip.c	/^	u16 tx_ttak[5];$/;"	m	struct:ieee80211_tkip_data	file:
++tx_unicast_frames	ieee80211.h	/^	unsigned int tx_unicast_frames;$/;"	m	struct:ieee80211_stats
++tx_unicast_octets	ieee80211.h	/^	unsigned int tx_unicast_octets;$/;"	m	struct:ieee80211_stats
++txb	ieee80211.h	/^	struct ieee80211_txb *txb;$/;"	m	struct:tx_pending_t	typeref:struct:tx_pending_t::ieee80211_txb
++type	ieee80211.h	/^	u8 type;$/;"	m	struct:eapol
++u	ieee80211.h	/^	} u;$/;"	m	struct:ieee_param	typeref:union:ieee_param::__anon4
++u32_in	aes.c	94;"	d	file:
++u32_out	aes.c	95;"	d	file:
++unicast_uses_group	ieee80211.h	/^            unicast_uses_group:1;$/;"	m	struct:ieee80211_security
++update	digest.c	/^static void update(struct crypto_tfm *tfm,$/;"	f	file:
++update_network	ieee80211_rx.c	/^inline void update_network(struct ieee80211_network *dst,$/;"	f
++used	ieee80211.h	/^	u8 used;$/;"	m	struct:ieee80211_crypt_data_list
++used	rtl8187_mesh.h	/^	unsigned int				used;	\/\/\/< used == TRUE => has been allocated, \\n used == FALSE => can be allocated$/;"	m	struct:mesh_PeerEntry
++value	ieee80211.h	/^			u32 value;$/;"	m	struct:ieee_param::__anon4::__anon5
++version	ieee80211.h	/^	u8 version;$/;"	m	struct:eapol
++wap_set	ieee80211.h	/^	short wap_set;$/;"	m	struct:ieee80211_device
++watch_dog_wq	ieee80211.h	/^	struct delayed_work watch_dog_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::delayed_work
++watch_dog_wq	ieee80211.h	/^	struct work_struct watch_dog_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++wmm_info	ieee80211.h	/^	u8 wmm_info;$/;"	m	struct:ieee80211_network
++wmm_param	ieee80211.h	/^	struct ieee80211_wmm_ac_param wmm_param[4];$/;"	m	struct:ieee80211_network	typeref:struct:ieee80211_network::ieee80211_wmm_ac_param
++wmm_param_update_wq	ieee80211.h	/^	struct tq_struct wmm_param_update_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++wmm_param_update_wq	ieee80211.h	/^	struct work_struct wmm_param_update_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++wpa_enabled	ieee80211.h	/^	int wpa_enabled;$/;"	m	struct:ieee80211_device
++wpa_ie	ieee80211.h	/^		} wpa_ie;$/;"	m	union:ieee_param::__anon4	typeref:struct:ieee_param::__anon4::__anon6
++wpa_ie	ieee80211.h	/^	u8 *wpa_ie;$/;"	m	struct:ieee80211_device
++wpa_ie	ieee80211.h	/^	u8 wpa_ie[MAX_WPA_IE_LEN];$/;"	m	struct:ieee80211_network
++wpa_ie_len	ieee80211.h	/^	size_t wpa_ie_len;$/;"	m	struct:ieee80211_device
++wpa_ie_len	ieee80211.h	/^	size_t wpa_ie_len;$/;"	m	struct:ieee80211_network
++wpa_param	ieee80211.h	/^		} wpa_param;$/;"	m	union:ieee_param::__anon4	typeref:struct:ieee_param::__anon4::__anon5
++wpax_suitlist_lock	ieee80211.h	/^	spinlock_t wpax_suitlist_lock;$/;"	m	struct:ieee80211_device
++wpax_type_notify	ieee80211.h	/^	u32 wpax_type_notify; \/\/{added by David, 2006.9.26}$/;"	m	struct:ieee80211_device
++wpax_type_set	ieee80211.h	/^	u8  wpax_type_set;    \/\/{added by David, 2006.9.28}$/;"	m	struct:ieee80211_device
++wq	ieee80211.h	/^	struct workqueue_struct *wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::workqueue_struct
++wx_sem	ieee80211.h	/^	struct semaphore wx_sem;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::semaphore
++wx_sync_scan_wq	ieee80211.h	/^	struct tq_struct wx_sync_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::tq_struct
++wx_sync_scan_wq	ieee80211.h	/^	struct work_struct wx_sync_scan_wq;$/;"	m	struct:ieee80211_device	typeref:struct:ieee80211_device::work_struct
++x	arc4.c	/^	u8 x, y;$/;"	m	struct:arc4_ctx	file:
++xor_128	cipher.c	/^static inline void xor_128(u8 *a, const u8 *b)$/;"	f	file:
++xor_64	cipher.c	/^static inline void xor_64(u8 *a, const u8 *b)$/;"	f	file:
++xor_block	ieee80211_crypt_ccmp.c	/^static inline void xor_block(u8 *b, u8 *a, size_t len)$/;"	f	file:
++xswap	michael_mic.c	/^static inline u32 xswap(u32 val)$/;"	f	file:
++y	arc4.c	/^	u8 x, y;$/;"	m	struct:arc4_ctx	file:
+Index: drivers/net/wireless/rtl8187B/ifcfg-wlan0
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ifcfg-wlan0	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,4 @@
++#DHCP client

++DEVICE=wlan0

++BOOTPROTO=dhcp

++ONBOOT=yes
+\ No newline at end of file
+Index: drivers/net/wireless/rtl8187B/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/Makefile	2010-01-09 04:01:22.000000000 +0000
+@@ -0,0 +1,30 @@
++LINUX_KSRC_MODULE = /lib/modules/$(shell uname -r)/kernel/drivers/net/wireless/
++RTL8187B_DIR = $(shell pwd)
++KVER  = $(shell uname -r)
++#KSRC = ~/lemote/linux_loongson
++KSRC = /lib/modules/$(KVER)/build
++#KSRC = /home/yh/linux-2.6.27.1-lemote
++HAL_SUB_DIR = rtl8187
++
++#export CROSS_COMPILE=mipsel-linux-
++all: 
++ifeq ($(shell uname -r|cut -d. -f1,2), 2.4)
++	@make -C $(RTL8187B_DIR)/ieee80211
++	@make -C $(RTL8187B_DIR)/rtl8187 
++else	
++	@make -C $(KSRC) SUBDIRS=$(RTL8187B_DIR)/ieee80211 modules 
++	@cp $(RTL8187B_DIR)/ieee80211/Module.symvers $(RTL8187B_DIR)/rtl8187 
++	@make -C $(KSRC) SUBDIRS=$(RTL8187B_DIR)/rtl8187 modules 
++endif
++install:
++	@grep rtl8187.ko /lib/modules/$(shell uname -r)/modules.dep && rm -fr $(LINUX_KSRC_MODULE)/rtl8187.ko || echo > /dev/null 
++	@cp $(RTL8187B_DIR)/RadioPower.sh /etc/acpi/events/
++	@make -C ieee80211/ install
++	@make -C rtl8187/ install
++uninstall:
++	@make -C ieee80211/ uninstall
++	@make -C rtl8187/ uninstall
++clean:
++	@make -C rtl8187/ clean
++	@make -C ieee80211/ clean
++	@rm -rf *~
+Index: drivers/net/wireless/rtl8187B/RadioPower.sh
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/RadioPower.sh	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,10 @@
++#! /bin/sh
++
++if [ "$1" = "RFON" ]; then
++	dbus-send --system --type=method_call --dest=org.freedesktop.NetworkManager /org/freedesktop/NetworkManager org.freedesktop.NetworkManager.setWirelessEnabled boolean:true
++	echo "==============>Now Polling Method Turn  RF ON !" > /etc/acpi/events/RadioPowerTest
++else
++	dbus-send --system --type=method_call --dest=org.freedesktop.NetworkManager /org/freedesktop/NetworkManager org.freedesktop.NetworkManager.setWirelessEnabled boolean:false
++	echo "==============>Now Polling Method Turn RF OFF !" > /etc/acpi/events/RadioPowerTest
++fi
++
+Index: drivers/net/wireless/rtl8187B/ReadMe
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/ReadMe	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,288 @@
++Release Date: 2009-01-16, ver 1051 
++RTL8187B Linux driver version 1051 
++ 
++   --This driver supports RealTek RTL8187B Wireless LAN NIC 
++     for 
++     2.6 kernel: 
++     Fedora Core 2/3/4/5/6/7, Debian 3.1, Mandrake 10.2/Mandriva 2006,  
++     SUSE 9.3/10.1/10.2, Gentoo 3.1, etc. 
++     2.4 kernel: 
++     Redhat 9.2, etc 
++   - Support Client mode for either infrastructure or adhoc mode 
++   - Support WEP, WPAPSK and WPA2PSK connection 
++ 
++======================================================================================
++                                Component
++======================================================================================
++The driver is composed of several parts:
++        1. Module source code
++           ieee80211
++           rtl8187
++
++        2. Script ot build the modules
++           Makefile
++
++        3. Script to load/unload modules
++           wlan0up
++           wlan0down
++
++        4. Script and configuration for DHCP
++           wlan0dhcp
++           ifcfg-wlan0
++ 
++	5. Supplicant source code: 
++	   wpa_supplicant-0.5.3.tar.gz 
++ 
++	6. Example of supplicant configuration file: 
++	   wpa1.conf 
++ 
++======================================================================================
++                                Installation
++======================================================================================
++<<Method 1>>
++Runing the scripts can finish all operations of building up modules
++from the source code, installing driver to the kernel and starting up the nic.
++        1. Build up the drivers from the source code
++           make
++
++        2. Install the driver to the kernel
++           make install
++           reboot
++	
++        3. bring up wlan if nic is not brought up by GUI, such as NetworkManager
++           ifconfig wlan0 up
++           Note: use ifconfig to check whether wlan0 is brought up and use iwconfig to 
++           check your wlan interface name,since it may change wlan0 to wlan1,etc.
++
++<<Method 2>>
++Or only load the driver module to kernel and start up nic.
++        1. Build up the drivers from the source code
++           make
++
++        2. Load driver module to kernel and start up nic.
++           ./wlan0up
++
++           Note: when "insmod: error inserting 'xxxx.ko': -1 File exists" comes out
++                 after run ./wlan0up, please run ./wlan0down first, then it should
++                 be ok..
++           Note: If you see the message of "unkown symbol" during ./wlan0up, it
++                 is suggested to build driver by <<Method 1>>.
++ 
++======================================================================================
++                                Set wireless lan MIBs
++======================================================================================
++This driver uses Wireless Extension as an interface allowing you to set 
++Wireless LAN specific parameters. 
++ 
++Current driver supports "iwlist" to show the device status of nic 
++        iwlist wlan0 [parameters] 
++where 
++        parameter explaination      	[parameters]     
++        -----------------------     	-------------    
++        Show available chan and freq	freq / channel   
++        Show and Scan BSS and IBSS 	scan[ning]           
++        Show supported bit-rate         rate / bit[rate]         
++        Show Power Management mode      power              
++ 
++For example: 
++	iwlist wlan0 channel 
++	iwlist wlan0 scan 
++	iwlist wlan0 rate 
++	iwlist wlan0 power 
++ 
++Driver also supports "iwconfig", manipulate driver private ioctls, to set 
++MIBs. 
++ 
++	iwconfig wlan0 [parameters] [val] 
++where 
++	parameter explaination      [parameters]        [val] constraints 
++        -----------------------     -------------        ------------------ 
++        Connect to AP by address    ap              	[mac_addr] 
++        Set the essid, join (I)BSS  essid             	[essid] 
++        Set operation mode          mode                {Managed|Ad-hoc} 
++        Set keys and security mode  key/enc[ryption]    {N|open|restricted|off} 
++ 
++For example: 
++	iwconfig wlan0 ap XX:XX:XX:XX:XX:XX 
++	iwconfig wlan0 essid "ap_name" 
++	iwconfig wlan0 mode Ad-hoc 
++	iwconfig wlan0 mode essid "name" mode Ad-hoc 
++	iwconfig wlan0 key 0123456789 [2] open 
++	iwconfig wlan0 key off 
++	iwconfig wlan0 key restricted [3] 0123456789 
++ 
++======================================================================================
++                                Getting IP address
++======================================================================================
++After start up the nic, the network needs to obtain an IP address before 
++transmit/receive data. 
++This can be done by setting the static IP via "ifconfig wlan0 IP_ADDRESS" 
++command, or using DHCP. 
++ 
++If using DHCP, setting steps is as below: 
++	(1)connect to an AP via "iwconfig" settings 
++		iwconfig wlan0 essid [name]	or 
++		iwconfig wlan0 ap XX:XX:XX:XX:XX:XX 
++ 
++	(2)run the script which run the dhclient 
++		./wlan0dhcp 
++           or  
++		dhcpcd wlan0 
++              	(Some network admins require that you use the 
++              	hostname and domainname provided by the DHCP server. 
++              	In that case, use  
++		dhcpcd -HD wlan0) 
++		 
++======================================================================================
++                        WPAPSK/WPA2PSK
++======================================================================================
++Wpa_supplicant helps to secure wireless connection with the protection of
++WPAPSK/WPA2PSK mechanism.
++
++If the version of Wireless Extension in your system is equal or larger than 18,
++WEXT driver interface is recommended. Otherwise, IPW driver interface is advised.
++
++	Note: Wireless Extension is defined us "#define WIRELESS_EXT" in Kernel
++	Note: To check the version of wireless extension, please type "iwconfig -v"
++
++If IPW driver interface is used, We suggested to follow the steps from 1 to 6.
++If wpa_supplicant has been installed in your system, only steps 5 and 6 are required
++to be executed for WEXT driver interface.
++
++To see detailed description for driver interface and wpa_supplicant, please type
++"man wpa_supplicant".
++	
++	(1)Download latetest source code for wpa supplicant or use wpa_supplicant-0.5.3
++           attached in this package. (It is suggested to use default package contained
++           in the distribution because there should less compilation issue.)
++
++           Unpack source code of WPA supplicant:
++
++           tar -zxvf wpa_supplicant-0.5.3.tar.gz (e.g.)
++           cd wpa_supplicant-0.5.3
++
++	(2)Create .config file:
++
++           cp defconfig .config
++
++        (3)Edit .config file, uncomment the following line if ipw driver interface
++           will be applied:
++
++           #CONFIG_DRIVER_IPW=y.
++
++        (4)Build and install WPA supplicant:
++           
++           make
++           cp wpa_cli wpa_supplicant /usr/local/bin
++
++           If make error for lack of <include/md5.h>, install the openssl lib(two ways):
++           1. Install the openssl lib from corresponding installation disc:
++              Fedora Core 2/3/4/5(openssl-0.9.71x-xx),
++              Mandrake10.2/Mandriva10.2(openssl-0.9.7x-xmdk),
++              Debian 3.1(libssl-dev), Suse 9.3/10.0/10.1(openssl_devl),
++              Gentoo(dev-libs/openssl), etc.
++           2. Download the openssl open source package from www.openssl.org, build and
++              install it.
++
++        (5)Edit wpa_supplicant.conf to set up SSID and its passphrase.
++           For example, the following setting in "wpa1.conf" means SSID
++           to join is "BufAG54_Ch6" and its passphrase is "87654321".
++
++           Example 1: Configuration for WPA-PWK
++           network={
++                        ssid="BufAG54_Ch6"
++                        proto=WPA
++                        key_mgmt=WPA-PSK
++                        pairwise=CCMP TKIP
++                        group=CCMP TKIP WEP104 WEP40
++                        psk="87654321"
++                        priority=2
++                  }
++
++           Example 2: Configuration for LEAP
++           network={
++                        ssid="BufAG54_Ch6"
++                        key_mgmt=IEEE8021X
++                        group=WEP40 WEP104
++                        eap=LEAP
++                        identity="user1"
++                        password="1111"
++                  }
++
++        Note: 1. proto=WPA for WPA, proto=RSN for WPA2.
++              2. If user needs to connect an AP with WPA or WPA2 mixed mode, it is suggested
++                 to set the cipher of pairwise and group to both CCMP and TKIP unless you
++                 know exactly which cipher type AP is configured.
++              3. Low kernel version which is lower than 2.6.18.rc2 may have trouble with
++                 TKIP heavy traffic while SMP is configured. Please change your security
++                 cipher or update your kernel.
++              4. According to documentaion "wpa_supplicant.conf" provided by the package of
++                 wpa_supplicant, ap_scan is set to 2 for IBSS connection. If user is trying to
++                 associate to AP in Infrastructure mode, please unmark this line us as belowing
++                 "#ap_scan=2"
++
++        (6)Execute WPA supplicant (Assume rtl8187B and related modules had been
++           loaded):
++           wpa_supplicant -D wext -c wpa1.conf -i wlan0 & (recommended)
++           wpa_supplicant -D ipw -c wpa1.conf -i wlan0
++
++           Note: At first, user sholud check Wireless Extension by typing "iwconfig -v"
++                 on the comment line. If the version of Wireless Extension is equal or
++                 larger than 18, the option of "-D wext" is suggested. If the version
++                 of Wireless extension is less than 18, the option of "-D ipw" is
++                 suggested.
++           	 
++		 But before you use "wext" or "ipw" command, you sholud check which drivers 
++                 wpa_supplicant can support by typing command "wpa_supplicant". after typing the 
++                 comment line, you can see some infomations about wpa_supplicant are listed, 
++                 example:
++		 ---------------------------------------------------------------------------
++		 usage:
++                      	XXXXXXXXX
++                 drivers:
++                        wext = Linux wireless extensions (generic)
++  			atmel = ATMEL AT76C5XXx (USB, PCMCIA)
++  			wired = wpa_supplicant wired Ethernet driver
++                 options:
++                      	XXXXXXXXX
++                 example:
++                      	XXXXXXXXX 
++		 ---------------------------------------------------------------------------
++		 The driver interface wpa_supplicant can support are listed in "drivers", 
++                 if "ipw" or "wext" is not listed in it, you can only use the the other interface. 
++                 If the interface you want to use is not supported by wpa_supplicant. you can 
++                 follow steps (1)-(6), And in step (3) you must let:
++
++                 CONFIG_DRIVER_IPW=y.
++                 or
++                 CONFIG_DRIVER_WEXT=y.
++		 or both 
++                 CONFIG_DRIVER_IPW=y.
++                 CONFIG_DRIVER_WEXT=y.
++
++======================================================================================
++                         	GPIO Radio On/Off
++======================================================================================
++	(1) The Change For Deliverring Power State:
++
++        	Now we add the RadioPower.sh script in the driver root path.
++        	When you run ./wlan0up, this script will be copied to /etc/acpi/events.
++        	And the driver can deliver the power state "RFON" or "RFOFF" into
++       	 	/etc/acpi/events/RadioPower.sh from driver.
++        	So you can change this script based on the power state RFON or RFOFF.
++
++	(2) For Example:
++
++        	Now the RadioPower.sh's content is:
++        	if[ "$1" = ""RFON ]; then
++                	echo "===================>Now Polling Method Turn RF ON!" > /etc/acpi/events/RadioPowerTest
++        	else
++                	echo "===================>Now Polling Method Turn RF OFF!" > /etc/acpi/events/RadioPowerTest
++        	fi
++
++        	So when you turn on RF using Polling Method, you can see "===================>>Now Polling Method Turn RF ON!"
++        	using command: cat /etc/acpi/events/RadioPowerTest.
++
++        	And when you turn off RF using Polling Method, you can see "===================>>Now Polling Method Turn RF OFF!"
++        	using command: cat /etc/acpi/events/RadioPowerTest.
++
+Index: drivers/net/wireless/rtl8187B/release_note
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/release_note	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,229 @@
++---------------------------------------------------
++Release for rtl8187B mesh linux driver
++---------------------------------------------------
++2007-12
++1.porting to the latest rtl8187b linux driver.
++more info from file "CHANGES_for_MESH"
++
++2008-01-11
++1.fix the bug:macdenyadd
++2.make wpa can autorun.
++
++2880-01-25
++1.support both mesh and station driver.
++
++
++-------------------------------------
++reless LAN Linux driver for RTL8187B
++-------------------------------------
++Release date = 2007-08-16
++Operating system release = Fedora 4
++Kernel version = 2.6.22.2
++Release driver version = 1023.0816.2007
++Change history =    
++	1.Let driver support to Linux 2.6.22.2 
++
++------------------------------------------
++Release date = 2007-08-22
++Operating system release = Fedora 4
++Kernel version = 2.6.22.2
++Release driver version = 1024.0822.2007
++Change history =    
++	1.Fix the channel plan scan range bug. 
++
++------------------------------------------
++Release date = 2007-09-19
++Operating system release = Suse 10
++Kernel version = 2.6.13
++Release driver version = 1025.0917.2007
++Change history =    
++	1. Fix 8187B current issue with Linux.
++	2. Fix 8187 with RF_ZEBRA2 module bug.
++
++------------------------------------------
++Release date = 2008-06-17
++Operating system release = ubuntu 8.04 
++Kernel version = 2.6.24-12-generic
++Release driver version = 1033.0617.2008
++Change history =
++        1. Add WorkItem method for RF power on/off.
++
++------------------------------------------
++Release date = 2008-06-20
++Operating system release = ubuntu 8.04 
++Kernel version = 2.6.24-12-generic
++Release driver version = 1036.0620.2008
++Change history =
++        1. Add install file for driver install.
++
++------------------------------------------
++Release date = 2008-10-23
++Operating system release = ubuntu 7.10
++Kernel version = 2.6.22-14-generic
++Release driver version = 1037.1023.2008
++Change history =
++        1. Add Roaming when AP changes channel or disappear
++	2. try to clean warning message
++  
++------------------------------------------
++Release date = 2008-10-27
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1038.1027.2008
++Change history =
++        1. make driver support 2.6.27 kernel
++
++------------------------------------------
++Release date = 2008-10-28
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1038.1028.2008
++Change history =
++        1. Modify SignalStrength bug, compensate SignalStrength when switch TR to SW controled
++
++------------------------------------------
++Release date = 2008-10-30
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1039.1030.2008
++Change history =
++        1. Fix the bug of CPU occupation
++
++------------------------------------------
++Release date = 2008-10-30
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1040.1107.2008
++Change history =
++        1. Fix the bug of crash on 64bit CPU.
++
++------------------------------------------
++Release date = 2008-11-10
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1041.1110.2008
++Change history =
++        1. Ad SW antenna diversity.
++
++------------------------------------------
++Release date = 2008-11-14
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1042.1114.2008
++Change history =
++        1. Fix the bug of tx pending, add restart when tx pending, add Radio off when down.
++        2. Fix the bug of commit crash.
++	3. Modfied for the issue of Windows will set pairwise key same as the group key which is not allowed in Linux.
++	3. Add hidden SSID function.
++
++------------------------------------------
++Release date = 2008-11-15
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1042.1115.2008
++Change history =
++        1. Fix the bug of /net/core/dev.c net_tx_action warning when radio off.
++
++------------------------------------------
++Release date = 2008-11-17
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1042.1117.2008
++Change history =
++        1. Modify ReadMe for wpa_supplicant.
++
++------------------------------------------
++Release date = 2008-11-17
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1042.1117.2008_QMI
++Change history =
++        1. Add patch for QMI 2.6.26.6 in Makefile QMI_26_6.
++
++------------------------------------------
++Release date = 2008-11-19
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1043.1119.2008
++Change history =
++        1. Change beacon from hadrware to softmac.
++	2. Change scan methord, and when essid not set we only scan all 
++	   channels one time (in ieee80211_softmac_scan_wq).
++	3. Fix the bug of IPS, when ./wlan0up it will enter IPS because beinretry is false,
++  	   and it will cause the first scan in start_bss faile.
++
++------------------------------------------
++Release date = 2008-11-21
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1044.1121.2008
++Change history =
++        1. Add Macro "LED_SHIN" in ieee80211/Makefile and rtl8187/Makefile for end user choose.
++           If you choose it, LED will shinning with mini card protocal methord, or LED will light
++	   all the time after "ifconfig wlan0 up".
++------------------------------------------
++Release date = 2008-11-24
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1045.1124.2008
++Change history =
++        1. Add idProduct = 0x8187 and bcdDevice = 0x0200.
++------------------------------------------
++Release date = 2008-11-28
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1046.1128.2008
++Change history =
++        1. Add IPSLeave in start_bss, because sometimes IPS close RF but here still 
++	   tx pkt to RF and it will cause commit.
++        2. Add Radio on after 10ms of Radio off, we just want close radio once for TX_PENDIGN.
++	3. Del Radio off in rtl8180_down, it's not needed.
++------------------------------------------
++Release date = 2008-11-29
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1047.1202.2008
++Change history =
++        1. Add net_if_stop before commit(reset).
++	2. Del some mdelay for up take too long time. 
++------------------------------------------
++Release date = 2008-12-10
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1048.1210.2008
++Change history =
++        1. Fix the bug of can't association and hardware come into
++	   a strange state after switch mode from adhoc to managed,
++	   and we should power off card for card resume.
++	2. Add Dot11D for channel_plan. 
++	3. Add passive scan and active scan for toshiba. 
++------------------------------------------
++Release date = 2008-12-12
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1049.1212.2008
++Change history =
++        1. fix the bug:Radio on will turn on led ,but if you don't ifconfig wlan0 up 
++           and rmmod r8187 led will not off.  
++------------------------------------------
++Release date = 2008-12-15
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1049.1215.2008
++Change history =
++        1. modify 0x91 form 0x03->0x01 open GPIO BIT1, because Polling methord will rurn off Radio
++	   the first time when read GPI(0x92).because after 0x91:bit1 form 1->0, there will 
++	   be time for 0x92:bit1 form 0->1.
++------------------------------------------
++Release date = 2008-01-16
++Operating system release = ubuntu 8.04
++Kernel version = 2.6.27-4-generic
++Release driver version = 1051.0116.2008
++Change history =
++        1. del some no use code. 
++        2. move ipsleave into queue work. 
++        3. fix channel+1 issue because no link scan. 
++	4. Fix the issue of read/write time out back form s3/s4. 
++	5. mod all scan to eee80211_softmac_scan_syncro because wq can't scan complete once.
++	6. add ips leave before start no link scan ,and stop scan before no linked scan in r8180_wx.c.
++	7. mod IEEE80211_SOFTMAC_SCAN_TIME 200->100, because long time may cause some OS(SUSE) link fail. 
+Index: drivers/net/wireless/rtl8187B/rtl8187/changes
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/changes	2010-01-09 03:57:44.000000000 +0000
+@@ -0,0 +1,5 @@
++v 0.1
++
++First version.
++This is based on the rtl8180-sa2400 pre-0.22-CVS code..
++
+Index: drivers/net/wireless/rtl8187B/rtl8187/copying
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/copying	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,340 @@
++		    GNU GENERAL PUBLIC LICENSE
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++  Ty Coon, President of Vice
++
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+Index: drivers/net/wireless/rtl8187B/rtl8187/dot11d.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/dot11d.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,102 @@
++#ifndef __INC_DOT11D_H

++#define __INC_DOT11D_H

++

++#include "ieee80211.h"

++

++//#define ENABLE_DOT11D

++

++//#define DOT11D_MAX_CHNL_NUM 83

++

++typedef struct _CHNL_TXPOWER_TRIPLE {

++	u8 FirstChnl;

++	u8  NumChnls;

++	u8  MaxTxPowerInDbm;

++}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;

++

++typedef enum _DOT11D_STATE {

++	DOT11D_STATE_NONE = 0,

++	DOT11D_STATE_LEARNED,

++	DOT11D_STATE_DONE,

++}DOT11D_STATE;

++

++typedef struct _RT_DOT11D_INFO {

++	//DECLARE_RT_OBJECT(RT_DOT11D_INFO);

++

++	bool bEnabled; // dot11MultiDomainCapabilityEnabled

++

++	u16 CountryIeLen; // > 0 if CountryIeBuf[] contains valid country information element.

++	u8  CountryIeBuf[MAX_IE_LEN];

++	u8  CountryIeSrcAddr[6]; // Source AP of the country IE.

++	u8  CountryIeWatchdog; 

++

++	u8  channel_map[MAX_CHANNEL_NUMBER+1];  //!!!Value 0: Invalid, 1: Valid (active scan), 2: Valid (passive scan)

++	//u8  ChnlListLen; // #Bytes valid in ChnlList[].

++	//u8  ChnlList[DOT11D_MAX_CHNL_NUM];

++	u8  MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];

++

++	DOT11D_STATE State;

++}RT_DOT11D_INFO, *PRT_DOT11D_INFO;

++#define eqMacAddr(a,b)		( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )

++#define cpMacAddr(des,src)	      ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])

++#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))

++

++#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled

++#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)

++

++#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) 

++#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)

++

++#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \

++	(((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \

++	FALSE : \

++	(!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))

++

++#define CIE_WATCHDOG_TH 1

++#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog

++#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0 

++#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)

++

++#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)

++

++

++void

++Dot11d_Init(

++	struct ieee80211_device *dev

++	);

++

++void

++Dot11d_Reset(

++	struct ieee80211_device *dev

++	);

++

++void

++Dot11d_UpdateCountryIe(

++	struct ieee80211_device *dev,

++	u8 *		pTaddr,

++	u16	CoutryIeLen,

++	u8 * pCoutryIe	 

++	);

++

++u8

++DOT11D_GetMaxTxPwrInDbm(

++	struct ieee80211_device *dev,

++	u8 Channel

++	);

++

++void

++DOT11D_ScanComplete(

++	struct ieee80211_device * dev

++	);

++

++int IsLegalChannel(

++	struct ieee80211_device * dev,

++	u8 channel

++);

++

++int ToLegalChannel(

++	struct ieee80211_device * dev,

++	u8 channel

++);

++

++void dump_chnl_map(u8 * channel_map);

++#endif // #ifndef __INC_DOT11D_H

+Index: drivers/net/wireless/rtl8187B/rtl8187/ieee80211_crypt.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/ieee80211_crypt.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,91 @@
++/*
++ * Original code based on Host AP (software wireless LAN access point) driver
++ * for Intersil Prism2/2.5/3.
++ *
++ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
++ * <jkmaline@cc.hut.fi>
++ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
++ *
++ * Adaption to a generic IEEE 802.11 stack by James Ketrenos
++ * <jketreno@linux.intel.com>
++ *
++ * Copyright (c) 2004, Intel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ */
++
++/*
++ * This file defines the interface to the ieee80211 crypto module.
++ */
++#ifndef IEEE80211_CRYPT_H
++#define IEEE80211_CRYPT_H
++
++#include <linux/skbuff.h>
++
++struct ieee80211_crypto_ops {
++	const char *name;
++
++	/* init new crypto context (e.g., allocate private data space,
++	 * select IV, etc.); returns NULL on failure or pointer to allocated
++	 * private data on success */
++	void * (*init)(int keyidx);
++
++	/* deinitialize crypto context and free allocated private data */
++	void (*deinit)(void *priv);
++
++	/* encrypt/decrypt return < 0 on error or >= 0 on success. The return
++	 * value from decrypt_mpdu is passed as the keyidx value for
++	 * decrypt_msdu. skb must have enough head and tail room for the
++	 * encryption; if not, error will be returned; these functions are
++	 * called for all MPDUs (i.e., fragments).
++	 */
++	int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
++	int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
++
++	/* These functions are called for full MSDUs, i.e. full frames.
++	 * These can be NULL if full MSDU operations are not needed. */
++	int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
++	int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
++			    void *priv);
++
++	int (*set_key)(void *key, int len, u8 *seq, void *priv);
++	int (*get_key)(void *key, int len, u8 *seq, void *priv);
++
++	/* procfs handler for printing out key information and possible
++	 * statistics */
++	char * (*print_stats)(char *p, void *priv);
++
++	/* maximum number of bytes added by encryption; encrypt buf is
++	 * allocated with extra_prefix_len bytes, copy of in_buf, and
++	 * extra_postfix_len; encrypt need not use all this space, but
++	 * the result must start at the beginning of the buffer and correct
++	 * length must be returned */
++	int extra_prefix_len, extra_postfix_len;
++
++	struct module *owner;
++};
++
++struct ieee80211_crypt_data {
++	struct list_head list; /* delayed deletion list */
++	struct ieee80211_crypto_ops *ops;
++	void *priv;
++	atomic_t refcnt;
++};
++
++int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops);
++int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops);
++struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name);
++void ieee80211_crypt_deinit_entries(struct ieee80211_device *, int);
++void ieee80211_crypt_deinit_handler(unsigned long);
++void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
++				    struct ieee80211_crypt_data **crypt);
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
++#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
++#define crypto_alloc_tfm crypto_alloc_tfm_rtl
++#define crypto_free_tfm crypto_free_tfm_rtl
++#endif
++
++#endif
+Index: drivers/net/wireless/rtl8187B/rtl8187/ieee80211.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/ieee80211.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,1913 @@
++/*
++ * Merged with mainline ieee80211.h in Aug 2004.  Original ieee802_11
++ * remains copyright by the original authors
++ *
++ * Portions of the merged code are based on Host AP (software wireless
++ * LAN access point) driver for Intersil Prism2/2.5/3.
++ *
++ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
++ * <jkmaline@cc.hut.fi>
++ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
++ *
++ * Adaption to a generic IEEE 802.11 stack by James Ketrenos
++ * <jketreno@linux.intel.com>
++ * Copyright (c) 2004, Intel Corporation
++ *
++ * Modified for Realtek's wi-fi cards by Andrea Merello
++ * <andreamrl@tiscali.it>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation. See README and COPYING for
++ * more details.
++ */
++#ifndef IEEE80211_H
++#define IEEE80211_H
++#include <linux/if_ether.h> /* ETH_ALEN */
++#include <linux/kernel.h>   /* ARRAY_SIZE */
++#include <linux/version.h>
++#include <linux/module.h>
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++#include <linux/jiffies.h>
++#else
++#include <linux/jffs.h>
++#include <linux/tqueue.h>
++#endif
++#include <linux/timer.h>
++#include <linux/sched.h>
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,13))
++#include <linux/wireless.h>
++#endif
++/*
++#ifndef bool
++#define bool int
++#endif
++
++#ifndef true
++#define true   1
++#endif
++
++#ifndef false
++#define false  0
++#endif
++*/
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
++#ifndef bool
++typedef enum{false = 0, true} bool;
++#endif
++#endif
++//#ifdef JOHN_HWSEC
++#define KEY_TYPE_NA		0x0
++#define KEY_TYPE_WEP40 		0x1
++#define KEY_TYPE_TKIP		0x2
++#define KEY_TYPE_CCMP		0x4
++#define KEY_TYPE_WEP104		0x5
++//#endif
++
++
++#define aSifsTime					10
++
++#define MGMT_QUEUE_NUM 5
++
++
++#define IEEE_CMD_SET_WPA_PARAM			1
++#define	IEEE_CMD_SET_WPA_IE			2
++#define IEEE_CMD_SET_ENCRYPTION			3
++#define IEEE_CMD_MLME				4
++
++#define IEEE_PARAM_WPA_ENABLED			1
++#define IEEE_PARAM_TKIP_COUNTERMEASURES		2
++#define IEEE_PARAM_DROP_UNENCRYPTED		3
++#define IEEE_PARAM_PRIVACY_INVOKED		4
++#define IEEE_PARAM_AUTH_ALGS			5
++#define IEEE_PARAM_IEEE_802_1X			6
++//It should consistent with the driver_XXX.c
++//   David, 2006.9.26
++#define IEEE_PARAM_WPAX_SELECT			7
++//Added for notify the encryption type selection
++//   David, 2006.9.26
++#define IEEE_PROTO_WPA				1	
++#define IEEE_PROTO_RSN				2
++//Added for notify the encryption type selection
++//   David, 2006.9.26
++#define IEEE_WPAX_USEGROUP			0
++#define IEEE_WPAX_WEP40				1
++#define IEEE_WPAX_TKIP				2
++#define IEEE_WPAX_WRAP   			3
++#define IEEE_WPAX_CCMP				4
++#define IEEE_WPAX_WEP104			5
++
++#define IEEE_KEY_MGMT_IEEE8021X			1
++#define IEEE_KEY_MGMT_PSK			2
++
++
++
++#define IEEE_MLME_STA_DEAUTH			1
++#define IEEE_MLME_STA_DISASSOC			2
++
++
++#define IEEE_CRYPT_ERR_UNKNOWN_ALG		2
++#define IEEE_CRYPT_ERR_UNKNOWN_ADDR		3
++#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED		4
++#define IEEE_CRYPT_ERR_KEY_SET_FAILED		5
++#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED		6
++#define IEEE_CRYPT_ERR_CARD_CONF_FAILED		7
++
++
++#define	IEEE_CRYPT_ALG_NAME_LEN			16
++
++//#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
++#define ieee80211_wx_get_scan ieee80211_wx_get_scan_rtl
++#define ieee80211_wx_set_encode ieee80211_wx_set_encode_rtl
++#define ieee80211_wx_get_encode ieee80211_wx_get_encode_rtl
++////////////////////////////////
++// added for kernel conflict under FC5
++#define ieee80211_wx_get_name   ieee80211_wx_get_name_rtl
++#define free_ieee80211          free_ieee80211_rtl
++#define alloc_ieee80211        alloc_ieee80211_rtl
++///////////////////////////////
++//#endif
++#define ieee80211_rx ieee80211_rx_rtl
++#define ieee80211_wake_queue ieee80211_wake_queue_rtl
++#define ieee80211_stop_queue ieee80211_stop_queue_rtl
++#define ieee80211_wx_set_auth ieee80211_wx_set_auth_rtl
++#define ieee80211_get_crypto_ops ieee80211_get_crypto_ops_rtl
++#define ieee80211_crypt_delayed_deinit ieee80211_crypt_delayed_deinit_rtl
++
++#define ieee80211_start_scan ieee80211_start_scan_rtl
++#define ieee80211_register_crypto_ops ieee80211_register_crypto_ops_rtl
++#define ieee80211_unregister_crypto_ops ieee80211_unregister_crypto_ops_rtl
++#define ieee80211_crypt_deinit_entries ieee80211_crypt_deinit_entries_rtl
++#define ieee80211_crypt_deinit_handler ieee80211_crypt_deinit_handler_rtl
++typedef struct ieee_param {
++	u32 cmd;
++	u8 sta_addr[ETH_ALEN];
++        union {
++		struct {
++			u8 name;
++			u32 value;
++		} wpa_param;
++		struct {
++			u32 len;
++			u8 reserved[32];
++			u8 data[0];
++		} wpa_ie;
++	        struct{
++			int command;
++    			int reason_code;
++		} mlme;
++		struct {
++			u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
++			u8 set_tx;
++			u32 err;
++			u8 idx;
++			u8 seq[8]; /* sequence counter (set: RX, get: TX) */
++			u16 key_len;
++			u8 key[0];
++		} crypt;
++
++	} u;
++}ieee_param;
++
++
++#if WIRELESS_EXT < 17
++#define IW_QUAL_QUAL_INVALID   0x10
++#define IW_QUAL_LEVEL_INVALID  0x20
++#define IW_QUAL_NOISE_INVALID  0x40
++#define IW_QUAL_QUAL_UPDATED   0x1
++#define IW_QUAL_LEVEL_UPDATED  0x2
++#define IW_QUAL_NOISE_UPDATED  0x4
++#endif
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
++static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)
++{
++	task->routine = func;
++	task->data 	= data;
++	//task->next = NULL;
++	INIT_LIST_HEAD(&task->list);
++	task->sync = 0;
++}
++#endif
++
++// linux under 2.6.9 release may not support it, so modify it for common use
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
++//#define MSECS(t)	(1000 * ((t) / HZ) + 1000 * ((t) % HZ) / HZ)
++#define MSECS(t)	(HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
++static inline unsigned long msleep_interruptible_rtl(unsigned int msecs)
++{
++         unsigned long timeout = MSECS(msecs) + 1;
++ 
++         while (timeout) {
++                 set_current_state(TASK_UNINTERRUPTIBLE);
++                 timeout = schedule_timeout(timeout);
++         }
++         return timeout;
++}
++#else
++#define MSECS(t) msecs_to_jiffies(t)
++#define msleep_interruptible_rtl  msleep_interruptible
++#endif
++
++#define IEEE80211_DATA_LEN		2304
++/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
++   6.2.1.1.2.
++
++   The figure in section 7.1.2 suggests a body size of up to 2312
++   bytes is allowed, which is a bit confusing, I suspect this
++   represents the 2304 bytes of real data, plus a possible 8 bytes of
++   WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
++
++
++#define IEEE80211_HLEN			30
++#define IEEE80211_FRAME_LEN		(IEEE80211_DATA_LEN + IEEE80211_HLEN)
++
++/* this is stolen and modified from the madwifi driver*/
++#define IEEE80211_FC0_TYPE_MASK		0x0c
++#define IEEE80211_FC0_TYPE_DATA		0x08
++#define IEEE80211_FC0_SUBTYPE_MASK	0xB0
++#define IEEE80211_FC0_SUBTYPE_QOS	0x80
++
++#define IEEE80211_QOS_HAS_SEQ(fc) \
++	(((fc) & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == \
++	 (IEEE80211_FC0_TYPE_DATA | IEEE80211_FC0_SUBTYPE_QOS))
++	
++/* this is stolen from ipw2200 driver */
++#define IEEE_IBSS_MAC_HASH_SIZE 31
++#define IEEE_MESH_MAC_HASH_SIZE 31
++struct ieee_ibss_seq {
++	u8 mac[ETH_ALEN];
++	u16 seq_num[17];
++	u16 frag_num[17];
++	unsigned long packet_time[17];
++	struct list_head list;
++};
++
++struct ieee_mesh_seq {
++	u8 mac[ETH_ALEN];
++	u16 seq_num;
++	u16 frag_num;
++	unsigned long packet_time;
++	struct list_head list;
++};
++
++struct ieee80211_hdr {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[ETH_ALEN];
++	u8 addr2[ETH_ALEN];
++	u8 addr3[ETH_ALEN];
++	u16 seq_ctl;
++	u8 addr4[ETH_ALEN];
++} __attribute__ ((packed));
++
++struct ieee80211_hdr_QOS {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[ETH_ALEN];
++	u8 addr2[ETH_ALEN];
++	u8 addr3[ETH_ALEN];
++	u16 seq_ctl;
++	u8 addr4[ETH_ALEN];
++	u16 QOS_ctl;
++} __attribute__ ((packed));
++
++struct ieee80211_hdr_3addr {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[ETH_ALEN];
++	u8 addr2[ETH_ALEN];
++	u8 addr3[ETH_ALEN];
++	u16 seq_ctl;
++} __attribute__ ((packed));
++
++struct ieee80211_hdr_3addr_QOS {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[ETH_ALEN];
++	u8 addr2[ETH_ALEN];
++	u8 addr3[ETH_ALEN];
++	u16 seq_ctl;
++	u16 QOS_ctl;
++} __attribute__ ((packed));
++
++enum eap_type {
++	EAP_PACKET = 0,
++	EAPOL_START,
++	EAPOL_LOGOFF,
++	EAPOL_KEY,
++	EAPOL_ENCAP_ASF_ALERT
++};
++
++//by lizhaoming for LED 2008.6.23 from r8187_led.h
++#ifdef LED
++typedef enum _LED_CTL_MODE {
++	LED_CTL_POWER_ON,
++	LED_CTL_POWER_OFF,
++	LED_CTL_LINK,
++	LED_CTL_NO_LINK,
++	LED_CTL_TX,
++	LED_CTL_RX,
++	LED_CTL_SITE_SURVEY,
++} LED_CTL_MODE;
++#endif
++
++static const char *eap_types[] = {
++	[EAP_PACKET]		= "EAP-Packet",
++	[EAPOL_START]		= "EAPOL-Start",
++	[EAPOL_LOGOFF]		= "EAPOL-Logoff",
++	[EAPOL_KEY]		= "EAPOL-Key",
++	[EAPOL_ENCAP_ASF_ALERT]	= "EAPOL-Encap-ASF-Alert"
++};
++
++static inline const char *eap_get_type(int type)
++{
++	return (type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
++}
++
++struct eapol {
++	u8 snap[6];
++	u16 ethertype;
++	u8 version;
++	u8 type;
++	u16 length;
++} __attribute__ ((packed));
++
++#define IEEE80211_3ADDR_LEN 24
++#define IEEE80211_4ADDR_LEN 30
++#define IEEE80211_FCS_LEN    4
++
++#define MIN_FRAG_THRESHOLD     256U
++#define	MAX_FRAG_THRESHOLD     2346U
++
++/* Frame control field constants */
++#define IEEE80211_FCTL_VERS		0x0002
++#define IEEE80211_FCTL_FTYPE		0x000c
++#define IEEE80211_FCTL_STYPE		0x00f0
++#define IEEE80211_FCTL_TODS		0x0100
++#define IEEE80211_FCTL_FROMDS		0x0200
++#define IEEE80211_FCTL_DSTODS		0x0300 //added by david
++#define IEEE80211_FCTL_MOREFRAGS	0x0400
++#define IEEE80211_FCTL_RETRY		0x0800
++#define IEEE80211_FCTL_PM		0x1000
++#define IEEE80211_FCTL_MOREDATA	0x2000
++#define IEEE80211_FCTL_WEP		0x4000
++#define IEEE80211_FCTL_ORDER		0x8000
++
++#define IEEE80211_FTYPE_MGMT		0x0000
++#define IEEE80211_FTYPE_CTL		0x0004
++#define IEEE80211_FTYPE_DATA		0x0008
++
++/* management */
++#define IEEE80211_STYPE_ASSOC_REQ	0x0000
++#define IEEE80211_STYPE_ASSOC_RESP 	0x0010
++#define IEEE80211_STYPE_REASSOC_REQ	0x0020
++#define IEEE80211_STYPE_REASSOC_RESP	0x0030
++#define IEEE80211_STYPE_PROBE_REQ	0x0040
++#define IEEE80211_STYPE_PROBE_RESP	0x0050
++#define IEEE80211_STYPE_BEACON		0x0080
++#define IEEE80211_STYPE_ATIM		0x0090
++#define IEEE80211_STYPE_DISASSOC	0x00A0
++#define IEEE80211_STYPE_AUTH		0x00B0
++#define IEEE80211_STYPE_DEAUTH		0x00C0
++#define IEEE80211_STYPE_MANAGE_ACT	0x00D0
++
++/* control */
++#define IEEE80211_STYPE_PSPOLL		0x00A0
++#define IEEE80211_STYPE_RTS		0x00B0
++#define IEEE80211_STYPE_CTS		0x00C0
++#define IEEE80211_STYPE_ACK		0x00D0
++#define IEEE80211_STYPE_CFEND		0x00E0
++#define IEEE80211_STYPE_CFENDACK	0x00F0
++
++/* data */
++#define IEEE80211_STYPE_DATA		0x0000
++#define IEEE80211_STYPE_DATA_CFACK	0x0010
++#define IEEE80211_STYPE_DATA_CFPOLL	0x0020
++#define IEEE80211_STYPE_DATA_CFACKPOLL	0x0030
++#define IEEE80211_STYPE_NULLFUNC	0x0040
++#define IEEE80211_STYPE_CFACK		0x0050
++#define IEEE80211_STYPE_CFPOLL		0x0060
++#define IEEE80211_STYPE_CFACKPOLL	0x0070
++#define IEEE80211_STYPE_QOS_DATA	0x0080 //added for WMM 2006/8/2
++#define IEEE80211_STYPE_QOS_NULL	0x00C0
++
++
++#define IEEE80211_SCTL_FRAG		0x000F
++#define IEEE80211_SCTL_SEQ		0xFFF0
++
++
++/* debug macros */
++
++#ifdef CONFIG_IEEE80211_DEBUG
++extern u32 ieee80211_debug_level;
++#define IEEE80211_DEBUG(level, fmt, args...) \
++do { if (ieee80211_debug_level & (level)) \
++  printk(KERN_DEBUG "ieee80211: %c %s " fmt, \
++         in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0)
++#else
++#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
++#endif	/* CONFIG_IEEE80211_DEBUG */
++
++/*
++ * To use the debug system;
++ *
++ * If you are defining a new debug classification, simply add it to the #define
++ * list here in the form of:
++ *
++ * #define IEEE80211_DL_xxxx VALUE
++ *
++ * shifting value to the left one bit from the previous entry.  xxxx should be
++ * the name of the classification (for example, WEP)
++ *
++ * You then need to either add a IEEE80211_xxxx_DEBUG() macro definition for your
++ * classification, or use IEEE80211_DEBUG(IEEE80211_DL_xxxx, ...) whenever you want
++ * to send output to that classification.
++ *
++ * To add your debug level to the list of levels seen when you perform
++ *
++ * % cat /proc/net/ipw/debug_level
++ *
++ * you simply need to add your entry to the ipw_debug_levels array.
++ *
++ * If you do not see debug_level in /proc/net/ipw then you do not have
++ * CONFIG_IEEE80211_DEBUG defined in your kernel configuration
++ *
++ */
++
++#define IEEE80211_DL_INFO          (1<<0)
++#define IEEE80211_DL_WX            (1<<1)
++#define IEEE80211_DL_SCAN          (1<<2)
++#define IEEE80211_DL_STATE         (1<<3)
++#define IEEE80211_DL_MGMT          (1<<4)
++#define IEEE80211_DL_FRAG          (1<<5)
++#define IEEE80211_DL_EAP           (1<<6)
++#define IEEE80211_DL_DROP          (1<<7)
++
++#define IEEE80211_DL_TX            (1<<8)
++#define IEEE80211_DL_RX            (1<<9)
++
++#define IEEE80211_ERROR(f, a...) printk(KERN_ERR "ieee80211: " f, ## a)
++#define IEEE80211_WARNING(f, a...) printk(KERN_WARNING "ieee80211: " f, ## a)
++#define IEEE80211_DEBUG_INFO(f, a...)   IEEE80211_DEBUG(IEEE80211_DL_INFO, f, ## a)
++
++#define IEEE80211_DEBUG_WX(f, a...)     IEEE80211_DEBUG(IEEE80211_DL_WX, f, ## a)
++#define IEEE80211_DEBUG_SCAN(f, a...)   IEEE80211_DEBUG(IEEE80211_DL_SCAN, f, ## a)
++#define IEEE80211_DEBUG_STATE(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_STATE, f, ## a)
++#define IEEE80211_DEBUG_MGMT(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_MGMT, f, ## a)
++#define IEEE80211_DEBUG_FRAG(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_FRAG, f, ## a)
++#define IEEE80211_DEBUG_EAP(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_EAP, f, ## a)
++#define IEEE80211_DEBUG_DROP(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_DROP, f, ## a)
++#define IEEE80211_DEBUG_TX(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_TX, f, ## a)
++#define IEEE80211_DEBUG_RX(f, a...)  IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
++#include <linux/netdevice.h>
++#include <linux/wireless.h>
++#include <linux/if_arp.h> /* ARPHRD_ETHER */
++
++#ifndef WIRELESS_SPY
++#define WIRELESS_SPY		// enable iwspy support
++#endif
++#include <net/iw_handler.h>	// new driver API
++
++#ifndef ETH_P_PAE
++#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
++#endif /* ETH_P_PAE */
++
++#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
++
++#ifndef ETH_P_80211_RAW
++#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
++#endif
++
++/* IEEE 802.11 defines */
++
++#define P80211_OUI_LEN 3
++
++struct ieee80211_snap_hdr {
++
++        u8    dsap;   /* always 0xAA */
++        u8    ssap;   /* always 0xAA */
++        u8    ctrl;   /* always 0x03 */
++        u8    oui[P80211_OUI_LEN];    /* organizational universal id */
++
++} __attribute__ ((packed));
++
++#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
++
++#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE)
++#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE)
++
++#define WLAN_GET_SEQ_FRAG(seq) ((seq) & IEEE80211_SCTL_FRAG)
++#define WLAN_GET_SEQ_SEQ(seq)  ((seq) & IEEE80211_SCTL_SEQ)
++
++/* Authentication algorithms */
++#define WLAN_AUTH_OPEN 0
++#define WLAN_AUTH_SHARED_KEY 1
++
++#define WLAN_AUTH_CHALLENGE_LEN 128
++
++#define WLAN_CAPABILITY_BSS (1<<0)
++#define WLAN_CAPABILITY_IBSS (1<<1)
++#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
++#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
++#define WLAN_CAPABILITY_PRIVACY (1<<4)
++#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
++#define WLAN_CAPABILITY_PBCC (1<<6)
++#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
++#define WLAN_CAPABILITY_SHORT_SLOT (1<<10)
++
++/* Status codes */
++#define WLAN_STATUS_SUCCESS 0
++#define WLAN_STATUS_UNSPECIFIED_FAILURE 1
++#define WLAN_STATUS_CAPS_UNSUPPORTED 10
++#define WLAN_STATUS_REASSOC_NO_ASSOC 11
++#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12
++#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13
++#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14
++#define WLAN_STATUS_CHALLENGE_FAIL 15
++#define WLAN_STATUS_AUTH_TIMEOUT 16
++#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17
++#define WLAN_STATUS_ASSOC_DENIED_RATES 18
++/* 802.11b */
++#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19
++#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20
++#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21
++
++/* Reason codes */
++#define WLAN_REASON_UNSPECIFIED 1
++#define WLAN_REASON_PREV_AUTH_NOT_VALID 2
++#define WLAN_REASON_DEAUTH_LEAVING 3
++#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4
++#define WLAN_REASON_DISASSOC_AP_BUSY 5
++#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6
++#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
++#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
++#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
++
++
++/* Information Element IDs */
++#define WLAN_EID_SSID 0
++#define WLAN_EID_SUPP_RATES 1
++#define WLAN_EID_FH_PARAMS 2
++#define WLAN_EID_DS_PARAMS 3
++#define WLAN_EID_CF_PARAMS 4
++#define WLAN_EID_TIM 5
++#define WLAN_EID_IBSS_PARAMS 6
++#define WLAN_EID_CHALLENGE 16
++#define WLAN_EID_RSN 48
++#define WLAN_EID_GENERIC 221
++
++#define IEEE80211_MGMT_HDR_LEN 24
++#define IEEE80211_DATA_HDR3_LEN 24
++#define IEEE80211_DATA_HDR4_LEN 30
++
++
++#define IEEE80211_STATMASK_SIGNAL (1<<0)
++#define IEEE80211_STATMASK_RSSI (1<<1)
++#define IEEE80211_STATMASK_NOISE (1<<2)
++#define IEEE80211_STATMASK_RATE (1<<3)
++#define IEEE80211_STATMASK_WEMASK 0x7
++
++
++#define IEEE80211_CCK_MODULATION    (1<<0)
++#define IEEE80211_OFDM_MODULATION   (1<<1)
++
++#define IEEE80211_24GHZ_BAND     (1<<0)
++#define IEEE80211_52GHZ_BAND     (1<<1)
++
++#define IEEE80211_CCK_RATE_LEN  		4
++#define IEEE80211_CCK_RATE_1MB		        0x02
++#define IEEE80211_CCK_RATE_2MB		        0x04
++#define IEEE80211_CCK_RATE_5MB		        0x0B
++#define IEEE80211_CCK_RATE_11MB		        0x16
++#define IEEE80211_OFDM_RATE_LEN 		8
++#define IEEE80211_OFDM_RATE_6MB		        0x0C
++#define IEEE80211_OFDM_RATE_9MB		        0x12
++#define IEEE80211_OFDM_RATE_12MB		0x18
++#define IEEE80211_OFDM_RATE_18MB		0x24
++#define IEEE80211_OFDM_RATE_24MB		0x30
++#define IEEE80211_OFDM_RATE_36MB		0x48
++#define IEEE80211_OFDM_RATE_48MB		0x60
++#define IEEE80211_OFDM_RATE_54MB		0x6C
++#define IEEE80211_BASIC_RATE_MASK		0x80
++
++#define IEEE80211_CCK_RATE_1MB_MASK		(1<<0)
++#define IEEE80211_CCK_RATE_2MB_MASK		(1<<1)
++#define IEEE80211_CCK_RATE_5MB_MASK		(1<<2)
++#define IEEE80211_CCK_RATE_11MB_MASK		(1<<3)
++#define IEEE80211_OFDM_RATE_6MB_MASK		(1<<4)
++#define IEEE80211_OFDM_RATE_9MB_MASK		(1<<5)
++#define IEEE80211_OFDM_RATE_12MB_MASK		(1<<6)
++#define IEEE80211_OFDM_RATE_18MB_MASK		(1<<7)
++#define IEEE80211_OFDM_RATE_24MB_MASK		(1<<8)
++#define IEEE80211_OFDM_RATE_36MB_MASK		(1<<9)
++#define IEEE80211_OFDM_RATE_48MB_MASK		(1<<10)
++#define IEEE80211_OFDM_RATE_54MB_MASK		(1<<11)
++
++#define IEEE80211_CCK_RATES_MASK	        0x0000000F
++#define IEEE80211_CCK_BASIC_RATES_MASK	(IEEE80211_CCK_RATE_1MB_MASK | \
++	IEEE80211_CCK_RATE_2MB_MASK)
++#define IEEE80211_CCK_DEFAULT_RATES_MASK	(IEEE80211_CCK_BASIC_RATES_MASK | \
++        IEEE80211_CCK_RATE_5MB_MASK | \
++        IEEE80211_CCK_RATE_11MB_MASK)
++
++#define IEEE80211_OFDM_RATES_MASK		0x00000FF0
++#define IEEE80211_OFDM_BASIC_RATES_MASK	(IEEE80211_OFDM_RATE_6MB_MASK | \
++	IEEE80211_OFDM_RATE_12MB_MASK | \
++	IEEE80211_OFDM_RATE_24MB_MASK)
++#define IEEE80211_OFDM_DEFAULT_RATES_MASK	(IEEE80211_OFDM_BASIC_RATES_MASK | \
++	IEEE80211_OFDM_RATE_9MB_MASK  | \
++	IEEE80211_OFDM_RATE_18MB_MASK | \
++	IEEE80211_OFDM_RATE_36MB_MASK | \
++	IEEE80211_OFDM_RATE_48MB_MASK | \
++	IEEE80211_OFDM_RATE_54MB_MASK)
++#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \
++                                IEEE80211_CCK_DEFAULT_RATES_MASK)
++
++#define IEEE80211_NUM_OFDM_RATES	    8
++#define IEEE80211_NUM_CCK_RATES	            4
++#define IEEE80211_OFDM_SHIFT_MASK_A         4
++
++
++
++
++/* NOTE: This data is for statistical purposes; not all hardware provides this
++ *       information for frames received.  Not setting these will not cause
++ *       any adverse affects. */
++struct ieee80211_rx_stats {
++	u32 mac_time[2];
++	u8 signalstrength;
++	s8 rssi;
++	u8 signal;
++	u8 noise;
++	u16 rate; /* in 100 kbps */
++	u8 received_channel;
++	u8 control;
++	u8 mask;
++	u8 freq;
++	u16 len;
++	u8 nic_type;
++};
++
++/* IEEE 802.11 requires that STA supports concurrent reception of at least
++ * three fragmented frames. This define can be increased to support more
++ * concurrent frames, but it should be noted that each entry can consume about
++ * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
++#define IEEE80211_FRAG_CACHE_LEN 4
++
++struct ieee80211_frag_entry {
++	unsigned long first_frag_time;
++	unsigned int seq;
++	unsigned int last_frag;
++	struct sk_buff *skb;
++	u8 src_addr[ETH_ALEN];
++	u8 dst_addr[ETH_ALEN];
++};
++
++struct ieee80211_stats {
++	unsigned int tx_unicast_frames;
++	unsigned int tx_multicast_frames;
++	unsigned int tx_fragments;
++	unsigned int tx_unicast_octets;
++	unsigned int tx_multicast_octets;
++	unsigned int tx_deferred_transmissions;
++	unsigned int tx_single_retry_frames;
++	unsigned int tx_multiple_retry_frames;
++	unsigned int tx_retry_limit_exceeded;
++	unsigned int tx_discards;
++	unsigned int rx_unicast_frames;
++	unsigned int rx_multicast_frames;
++	unsigned int rx_fragments;
++	unsigned int rx_unicast_octets;
++	unsigned int rx_multicast_octets;
++	unsigned int rx_fcs_errors;
++	unsigned int rx_discards_no_buffer;
++	unsigned int tx_discards_wrong_sa;
++	unsigned int rx_discards_undecryptable;
++	unsigned int rx_message_in_msg_fragments;
++	unsigned int rx_message_in_bad_msg_fragments;
++};
++
++struct ieee80211_softmac_stats{
++	unsigned int rx_ass_ok;
++	unsigned int rx_ass_err;
++	unsigned int rx_probe_rq;
++	unsigned int tx_probe_rs;
++	unsigned int tx_beacons;
++	unsigned int rx_auth_rq;
++	unsigned int rx_auth_rs_ok;
++	unsigned int rx_auth_rs_err;
++	unsigned int tx_auth_rq;
++	unsigned int no_auth_rs;
++	unsigned int no_ass_rs;
++	unsigned int tx_ass_rq;
++	unsigned int rx_ass_rq;
++	unsigned int tx_probe_rq;
++	unsigned int reassoc;
++	unsigned int swtxstop;
++	unsigned int swtxawake;
++};
++
++struct ieee80211_device;
++
++#include "ieee80211_crypt.h"
++
++#define SEC_KEY_1         (1<<0)
++#define SEC_KEY_2         (1<<1)
++#define SEC_KEY_3         (1<<2)
++#define SEC_KEY_4         (1<<3)
++#define SEC_ACTIVE_KEY    (1<<4)
++#define SEC_AUTH_MODE     (1<<5)
++#define SEC_UNICAST_GROUP (1<<6)
++#define SEC_LEVEL         (1<<7)
++#define SEC_ENABLED       (1<<8)
++
++#define SEC_LEVEL_0      0 /* None */
++#define SEC_LEVEL_1      1 /* WEP 40 and 104 bit */
++#define SEC_LEVEL_2      2 /* Level 1 + TKIP */
++#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
++#define SEC_LEVEL_3      4 /* Level 2 + CCMP */
++
++#define WEP_KEYS 4
++#define WEP_KEY_LEN 13
++#define ALG_KEY_LEN 32
++
++#ifdef _RTL8187_EXT_PATCH_
++#define MAX_MP 16
++#endif
++struct ieee80211_security {
++	u16 active_key:2,
++            enabled:1,
++	    auth_mode:2,
++            auth_algo:4,
++            unicast_uses_group:1;
++	u8 key_sizes[WEP_KEYS];
++	u8 keys[WEP_KEYS][ALG_KEY_LEN];
++	u8 level;
++	u16 flags;
++} __attribute__ ((packed));
++
++
++/*
++
++ 802.11 data frame from AP
++
++      ,-------------------------------------------------------------------.
++Bytes |  2   |  2   |    6    |    6    |    6    |  2   | 0..2312 |   4  |
++      |------|------|---------|---------|---------|------|---------|------|
++Desc. | ctrl | dura |  DA/RA  |   TA    |    SA   | Sequ |  frame  |  fcs |
++      |      | tion | (BSSID) |         |         | ence |  data   |      |
++      `-------------------------------------------------------------------'
++
++Total: 28-2340 bytes
++
++*/
++
++struct ieee80211_header_data {
++	u16 frame_ctl;
++	u16 duration_id;
++	u8 addr1[6];
++	u8 addr2[6];
++	u8 addr3[6];
++	u16 seq_ctrl;
++};
++
++#define BEACON_PROBE_SSID_ID_POSITION 12
++
++/* Management Frame Information Element Types */
++#define MFIE_TYPE_SSID       0
++#define MFIE_TYPE_RATES      1
++#define MFIE_TYPE_FH_SET     2
++#define MFIE_TYPE_DS_SET     3
++#define MFIE_TYPE_CF_SET     4
++#define MFIE_TYPE_TIM        5
++#define MFIE_TYPE_IBSS_SET   6
++#define MFIE_TYPE_COUNTRY    7
++#define MFIE_TYPE_CHALLENGE  16
++#define MFIE_TYPE_ERP        42
++#define MFIE_TYPE_RSN	     48
++#define MFIE_TYPE_RATES_EX   50
++#define MFIE_TYPE_GENERIC    221
++
++#ifdef ENABLE_DOT11D
++typedef enum 
++{
++	COUNTRY_CODE_FCC = 0,
++	COUNTRY_CODE_IC = 1,
++	COUNTRY_CODE_ETSI = 2,
++	COUNTRY_CODE_SPAIN = 3,
++	COUNTRY_CODE_FRANCE = 4,
++	COUNTRY_CODE_MKK = 5,
++	COUNTRY_CODE_MKK1 = 6,
++	COUNTRY_CODE_ISRAEL = 7,
++	COUNTRY_CODE_TELEC = 8,
++	COUNTRY_CODE_GLOBAL_DOMAIN = 9,
++	COUNTRY_CODE_WORLD_WIDE_13_INDEX = 10
++}country_code_type_t;	
++#endif
++
++
++struct ieee80211_info_element_hdr {
++	u8 id;
++	u8 len;
++} __attribute__ ((packed));
++
++struct ieee80211_info_element {
++	u8 id;
++	u8 len;
++	u8 data[0];
++} __attribute__ ((packed));
++
++/*
++ * These are the data types that can make up management packets
++ *
++	u16 auth_algorithm;
++	u16 auth_sequence;
++	u16 beacon_interval;
++	u16 capability;
++	u8 current_ap[ETH_ALEN];
++	u16 listen_interval;
++	struct {
++		u16 association_id:14, reserved:2;
++	} __attribute__ ((packed));
++	u32 time_stamp[2];
++	u16 reason;
++	u16 status;
++*/
++
++#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
++#define IEEE80211_DEFAULT_BASIC_RATE 10
++#define IEEE80211_DEFAULT_MESHID   "802.11s"
++#define IEEE80211_DEFAULT_MESH_CHAN 1
++
++struct ieee80211_authentication {
++	struct ieee80211_header_data header;
++	u16 algorithm;
++	u16 transaction;
++	u16 status;
++	//struct ieee80211_info_element_hdr info_element;
++} __attribute__ ((packed));
++
++
++struct ieee80211_probe_response {
++	struct ieee80211_header_data header;
++	u32 time_stamp[2];
++	u16 beacon_interval;
++	u16 capability;
++	struct ieee80211_info_element info_element;
++} __attribute__ ((packed));
++
++struct ieee80211_probe_request {
++	struct ieee80211_header_data header;
++	/*struct ieee80211_info_element info_element;*/
++} __attribute__ ((packed));
++
++struct ieee80211_assoc_request_frame {
++	struct ieee80211_hdr_3addr header;
++	u16 capability;
++	u16 listen_interval;
++	//u8 current_ap[ETH_ALEN];
++	struct ieee80211_info_element_hdr info_element;
++} __attribute__ ((packed));
++
++struct ieee80211_assoc_response_frame {
++	struct ieee80211_hdr_3addr header;
++	u16 capability;
++	u16 status;
++	u16 aid;
++	struct ieee80211_info_element info_element; /* supported rates */
++} __attribute__ ((packed));
++
++
++struct ieee80211_txb {
++	u8 nr_frags;
++	u8 encrypted;
++	u16 reserved;
++	u16 frag_size;
++	u16 payload_size;
++	struct sk_buff *fragments[0];
++};
++
++struct ieee80211_wmm_ac_param {
++	u8 ac_aci_acm_aifsn;
++	u8 ac_ecwmin_ecwmax;
++	u16 ac_txop_limit;
++};
++
++struct ieee80211_wmm_ts_info {
++	u8 ac_dir_tid;
++	u8 ac_up_psb;
++	u8 reserved;
++} __attribute__ ((packed));
++
++struct ieee80211_wmm_tspec_elem {
++	struct ieee80211_wmm_ts_info ts_info;
++	u16 norm_msdu_size;
++	u16 max_msdu_size;
++	u32 min_serv_inter;
++	u32 max_serv_inter;
++	u32 inact_inter;
++	u32 suspen_inter;
++	u32 serv_start_time;
++	u32 min_data_rate;
++	u32 mean_data_rate;
++	u32 peak_data_rate;
++	u32 max_burst_size;
++	u32 delay_bound;
++	u32 min_phy_rate;
++	u16 surp_band_allow;
++	u16 medium_time;
++}__attribute__((packed));
++
++enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
++#define MAX_SP_Len  (WMM_all_frame << 4)
++#define IEEE80211_QOS_TID 0x0f
++#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
++
++/* SWEEP TABLE ENTRIES NUMBER*/
++#define MAX_SWEEP_TAB_ENTRIES		  42
++#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET  7
++/* MAX_RATES_LENGTH needs to be 12.  The spec says 8, and many APs
++ * only use 8, and then use extended rates for the remaining supported
++ * rates.  Other APs, however, stick all of their supported rates on the
++ * main rates information element... */
++#define MAX_RATES_LENGTH                  ((u8)12)
++#define MAX_RATES_EX_LENGTH               ((u8)16)
++#define MAX_NETWORK_COUNT                  128
++#ifdef ENABLE_DOT11D
++#define MAX_CHANNEL_NUMBER                 165 //YJ,modified,080625
++#define MAX_IE_LEN					0xFF //+YJ,080625
++#else
++#define MAX_CHANNEL_NUMBER                 161
++#endif
++
++//#define IEEE80211_SOFTMAC_SCAN_TIME	  400
++#define IEEE80211_SOFTMAC_SCAN_TIME	  100//lzm mod 081209
++//(HZ / 2)
++#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
++
++#define CRC_LENGTH                 4U
++
++#define MAX_WPA_IE_LEN 64
++
++#define NETWORK_EMPTY_ESSID (1<<0)
++#define NETWORK_HAS_OFDM    (1<<1)
++#define NETWORK_HAS_CCK     (1<<2)
++
++#define IEEE80211_DTIM_MBCAST 4
++#define IEEE80211_DTIM_UCAST 2
++#define IEEE80211_DTIM_VALID 1
++#define IEEE80211_DTIM_INVALID 0
++
++#define IEEE80211_PS_DISABLED 0
++#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
++#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
++
++//added by David for QoS 2006/6/30
++//#define WMM_Hang_8187
++#ifdef WMM_Hang_8187
++#undef WMM_Hang_8187
++#endif
++
++#define WME_AC_BE   0x00
++#define WME_AC_BK   0x01
++#define WME_AC_VI   0x02
++#define WME_AC_VO   0x03
++#define WME_ACI_MASK 0x03
++#define WME_AIFSN_MASK 0x03
++#define WME_AC_PRAM_LEN 16
++
++//UP Mapping to AC, using in MgntQuery_SequenceNumber() and maybe for DSCP
++//#define UP2AC(up)	((up<3) ? ((up==0)?1:0) : (up>>1)) 
++#define UP2AC(up) (		   \
++	((up) < 1) ? WME_AC_BE : \
++	((up) < 3) ? WME_AC_BK : \
++	((up) < 4) ? WME_AC_BE : \
++	((up) < 6) ? WME_AC_VI : \
++	WME_AC_VO)	
++//AC Mapping to UP, using in Tx part for selecting the corresponding TX queue
++#define AC2UP(_ac)	(       \
++	((_ac) == WME_AC_VO) ? 6 : \
++	((_ac) == WME_AC_VI) ? 5 : \
++	((_ac) == WME_AC_BK) ? 1 : \
++	0)
++
++#define	ETHER_ADDR_LEN		6	/* length of an Ethernet address */
++struct	ether_header {
++	u8 ether_dhost[ETHER_ADDR_LEN];
++	u8 ether_shost[ETHER_ADDR_LEN];
++	u16 ether_type;
++} __attribute__((packed)); 
++
++#ifndef ETHERTYPE_PAE
++#define	ETHERTYPE_PAE	0x888e		/* EAPOL PAE/802.1x */
++#endif
++#ifndef ETHERTYPE_IP
++#define	ETHERTYPE_IP	0x0800		/* IP protocol */
++#endif
++
++struct ieee80211_network {
++	/* These entries are used to identify a unique network */
++	u8 bssid[ETH_ALEN];
++	u8 channel;
++	/* Ensure null-terminated for any debug msgs */
++	u8 ssid[IW_ESSID_MAX_SIZE + 1];
++	u8 ssid_len;
++
++	/* These are network statistics */
++	struct ieee80211_rx_stats stats;
++	u16 capability;
++	u8 rates[MAX_RATES_LENGTH];
++	u8 rates_len;
++	u8 rates_ex[MAX_RATES_EX_LENGTH];
++	u8 rates_ex_len;
++	unsigned long last_scanned;
++	u8 mode;
++	u8 flags;
++	u32 last_associate;
++	u32 time_stamp[2];
++	u16 beacon_interval;
++	u16 listen_interval;
++	u16 atim_window;
++	u8 wpa_ie[MAX_WPA_IE_LEN];
++	size_t wpa_ie_len;
++	u8 rsn_ie[MAX_WPA_IE_LEN];
++	size_t rsn_ie_len;
++	u8 dtim_period;
++	u8 dtim_data;
++	u32 last_dtim_sta_time[2];
++#ifdef _RTL8187_EXT_PATCH_
++	void *ext_entry;
++#endif
++	struct list_head list;
++	//appeded for QoS
++	u8 wmm_info;
++	struct ieee80211_wmm_ac_param wmm_param[4];
++	u8 QoS_Enable;
++	u8 SignalStrength;
++#ifdef THOMAS_TURBO
++	u8 Turbo_Enable;//enable turbo mode, added by thomas
++#endif
++
++#ifdef ENABLE_DOT11D
++	u16 CountryIeLen;
++	u8 CountryIeBuf[MAX_IE_LEN];
++#endif
++
++};
++
++enum ieee80211_state {
++
++	/* the card is not linked at all */
++	IEEE80211_NOLINK = 0,
++	
++	/* IEEE80211_ASSOCIATING* are for BSS client mode
++	 * the driver shall not perform RX filtering unless
++	 * the state is LINKED.
++	 * The driver shall just check for the state LINKED and
++	 * defaults to NOLINK for ALL the other states (including
++	 * LINKED_SCANNING)
++	 */
++	
++	/* the association procedure will start (wq scheduling)*/
++	IEEE80211_ASSOCIATING,
++	IEEE80211_ASSOCIATING_RETRY,
++	
++	/* the association procedure is sending AUTH request*/
++	IEEE80211_ASSOCIATING_AUTHENTICATING,
++	
++	/* the association procedure has successfully authentcated
++	 * and is sending association request
++	 */
++	IEEE80211_ASSOCIATING_AUTHENTICATED,
++	
++	/* the link is ok. the card associated to a BSS or linked
++	 * to a ibss cell or acting as an AP and creating the bss
++	 */
++	IEEE80211_LINKED,
++	
++	/* same as LINKED, but the driver shall apply RX filter
++	 * rules as we are in NO_LINK mode. As the card is still
++	 * logically linked, but it is doing a syncro site survey
++	 * then it will be back to LINKED state.
++	 */
++	IEEE80211_LINKED_SCANNING,
++//by amy for mesh
++	IEEE80211_MESH_SCANNING,
++	IEEE80211_MESH_LINKED,
++//by amy for mesh
++	
++};
++
++#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
++#define DEFAULT_FTS 2346
++#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
++#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
++
++
++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,11))
++extern inline int is_multicast_ether_addr(const u8 *addr)
++{
++        return ((addr[0] != 0xff) && (0x01 & addr[0]));
++}
++#endif
++
++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13))
++extern inline int is_broadcast_ether_addr(const u8 *addr)
++{
++	return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) &&   \
++		(addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
++}
++#endif
++
++#define CFG_IEEE80211_RESERVE_FCS (1<<0)
++#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
++
++typedef struct tx_pending_t{
++	int frag;
++	struct ieee80211_txb *txb;
++}tx_pending_t;
++
++#ifdef _RTL8187_EXT_PATCH_
++struct ieee80211_crypt_data_list{
++	u8 used;
++	u8 mac_addr[ETH_ALEN];  //record mac_add
++	struct ieee80211_crypt_data *crypt[WEP_KEYS];
++}__attribute__((packed));
++
++#endif
++
++struct ieee80211_device {
++	struct net_device *dev;
++
++	/* Bookkeeping structures */
++	struct net_device_stats stats;
++	struct ieee80211_stats ieee_stats;
++	struct ieee80211_softmac_stats softmac_stats;
++	
++	/* Probe / Beacon management */
++	struct list_head network_free_list;
++	struct list_head network_list;
++	struct ieee80211_network *networks;
++	int scans;
++	int scan_age;
++
++	int iw_mode; /* operating mode (IW_MODE_*) */
++#ifdef _RTL8187_EXT_PATCH_
++	int iw_ext_mode; // if iw_mode == iw_ext_mode, do ext_patch_**();
++#endif
++
++	spinlock_t lock;
++	spinlock_t wpax_suitlist_lock;
++	
++	int tx_headroom; /* Set to size of any additional room needed at front
++			  * of allocated Tx SKBs */
++	u32 config;
++
++	/* WEP and other encryption related settings at the device level */
++	int open_wep; /* Set to 1 to allow unencrypted frames */
++
++	int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
++				 * WEP key changes */
++
++	/* If the host performs {en,de}cryption, then set to 1 */
++	int host_encrypt;
++	int host_decrypt;
++	int ieee802_1x; /* is IEEE 802.1X used */
++
++	/* WPA data */
++	int wpa_enabled;
++	int drop_unencrypted;
++	int tkip_countermeasures;
++	int privacy_invoked;
++	size_t wpa_ie_len;
++	u8 *wpa_ie;
++
++//#ifdef JOHN_TKIP
++	u8 ap_mac_addr[6];
++	u16 pairwise_key_type;
++	u16 broadcast_key_type;
++//#endif
++	struct list_head crypt_deinit_list;
++#ifdef _RTL8187_EXT_PATCH_
++	struct ieee80211_crypt_data_list* cryptlist[MAX_MP];
++#else
++	struct ieee80211_crypt_data *crypt[WEP_KEYS];
++#endif
++	int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
++	struct timer_list crypt_deinit_timer;
++
++	int bcrx_sta_key; /* use individual keys to override default keys even
++			   * with RX of broad/multicast frames */
++
++	/* Fragmentation structures */
++	// each streaming contain a entry
++	struct ieee80211_frag_entry frag_cache[17][IEEE80211_FRAG_CACHE_LEN];
++	unsigned int frag_next_idx[17];
++	u16 fts; /* Fragmentation Threshold */
++
++	/* This stores infos for the current network.
++	 * Either the network we are associated in INFRASTRUCTURE
++	 * or the network that we are creating in MASTER mode.
++	 * ad-hoc is a mixture ;-).
++	 * Note that in infrastructure mode, even when not associated,
++	 * fields bssid and essid may be valid (if wpa_set and essid_set
++	 * are true) as thy carry the value set by the user via iwconfig  
++	 */
++	struct ieee80211_network current_network;
++
++	
++	enum ieee80211_state state;
++
++	int short_slot;
++	int mode;       /* A, B, G */
++	int modulation; /* CCK, OFDM */
++	int freq_band;  /* 2.4Ghz, 5.2Ghz, Mixed */
++	int abg_true;   /* ABG flag              */
++	
++	/* used for forcing the ibss workqueue to terminate 
++	 * without wait for the syncro scan to terminate
++	 */
++	short sync_scan_hurryup; 
++
++#ifdef ENABLE_DOT11D
++	void * pDot11dInfo;
++	bool bGlobalDomain;
++	bool bWorldWide13;//lzm add 20081205
++
++	// For Liteon Ch12~13 passive scan
++	u8	MinPassiveChnlNum;
++	u8	IbssStartChnl;
++#else
++	/* map of allowed channels. 0 is dummy */
++	// FIXME: remeber to default to a basic channel plan depending of the PHY type
++	int channel_map[MAX_CHANNEL_NUMBER+1];
++#endif
++
++	int rate;       /* current rate */
++	int basic_rate;
++	//FIXME: pleace callback, see if redundant with softmac_features
++	short active_scan;
++	
++#ifdef _RTL8187_EXT_PATCH_
++//	short ch_lock;
++        short meshScanMode;
++#endif	
++	/* this contains flags for selectively enable softmac support */
++	u16 softmac_features;
++	
++	/* if the sequence control field is not filled by HW */
++	u16 seq_ctrl[5];
++	
++	/* association procedure transaction sequence number */
++	u16 associate_seq;
++	
++	/* AID for RTXed association responses */
++	u16 assoc_id;
++	
++	/* power save mode related*/
++	short ps;
++	short sta_sleep;
++	int ps_timeout;
++	struct tasklet_struct ps_task;
++	u32 ps_th;
++	u32 ps_tl;
++	
++	short raw_tx;
++	/* used if IEEE_SOFTMAC_TX_QUEUE is set */
++	short queue_stop;
++	short scanning;
++	short scan_watchdog;//lzm add 081215 for roaming
++	short proto_started;
++	
++	struct semaphore wx_sem;
++	struct semaphore scan_sem;
++	struct semaphore ips_sem;	
++	spinlock_t mgmt_tx_lock;	
++	spinlock_t beacon_lock;
++        spinlock_t beaconflag_lock;
++	short beacon_txing;
++
++	short wap_set;
++	short ssid_set;
++	
++	u8  wpax_type_set;    //{added by David, 2006.9.28}
++	u32 wpax_type_notify; //{added by David, 2006.9.26}
++
++	/* QoS related flag */
++	char init_wmmparam_flag;
++	
++	/* for discarding duplicated packets in IBSS */
++	struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
++	
++	/* for discarding duplicated packets in Mesh */ //added by david 2008.2.28/
++	struct list_head mesh_mac_hash[IEEE_MESH_MAC_HASH_SIZE];
++	
++	/* for discarding duplicated packets in BSS */
++	u16 last_rxseq_num[17]; /* rx seq previous per-tid */
++	u16 last_rxfrag_num[17];/* tx frag previous per-tid */
++	unsigned long last_packet_time[17];
++	
++	/* for PS mode */
++	unsigned long last_rx_ps_time;
++	
++	/* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
++	struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
++	int mgmt_queue_head;
++	int mgmt_queue_tail;
++//by amy for ps
++	bool bInactivePs;
++	bool actscanning;
++	u16 ListenInterval;
++	u32 NumRxData;
++	unsigned long NumRxDataInPeriod; //YJ,add,080828
++	unsigned long NumRxBcnInPeriod;  //YJ,add,080828
++//by amy for ps
++	short meshid_set;	
++	/* used if IEEE_SOFTMAC_TX_QUEUE is set */
++	struct  tx_pending_t tx_pending;
++	
++	/* used if IEEE_SOFTMAC_ASSOCIATE is set */
++	struct timer_list associate_timer;
++
++	/* used if IEEE_SOFTMAC_BEACONS is set */
++	struct timer_list beacon_timer;
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++	struct work_struct associate_complete_wq;
++//	struct work_struct associate_retry_wq;
++//	struct work_struct start_ibss_wq;
++	struct work_struct associate_procedure_wq;
++	struct work_struct ips_leave_wq;  //YJ,add,081230,for IPS
++	bool bHwRadioOff;//by lizhaoming
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++        struct delayed_work softmac_scan_wq;
++	struct delayed_work start_ibss_wq;
++        struct delayed_work associate_retry_wq;
++//by amy for rate adaptive
++                struct delayed_work rate_adapter_wq;
++//by amy for rate adaptive
++	struct delayed_work watch_dog_wq;
++	struct delayed_work hw_dig_wq;
++	struct delayed_work tx_pw_wq;
++
++//Added for RF power on power off by lizhaoming 080512
++#ifdef POLLING_METHOD_FOR_RADIO
++	struct delayed_work GPIOChangeRFWorkItem;
++#endif
++
++#ifdef SW_ANTE_DIVERSITY
++	struct delayed_work SwAntennaWorkItem;
++#endif
++
++#else
++        struct work_struct softmac_scan_wq;
++	struct work_struct start_ibss_wq;
++        struct work_struct associate_retry_wq;
++//by amy for rate adaptive
++                struct work_struct rate_adapter_wq;
++//by amy for rate adaptive
++	struct work_struct watch_dog_wq;
++	struct work_struct hw_dig_wq;
++	struct work_struct tx_pw_wq;
++
++//Added for RF power on power off by lizhaoming 080512
++#ifdef POLLING_METHOD_FOR_RADIO
++	struct work_struct GPIOChangeRFWorkItem;
++#endif
++
++#ifdef SW_ANTE_DIVERSITY
++	struct work_struct SwAntennaWorkItem;
++#endif
++
++#endif
++	
++//struct work_struct softmac_scan_wq;
++	struct work_struct wx_sync_scan_wq;
++	struct work_struct wmm_param_update_wq;
++#ifdef _RTL8187_EXT_PATCH_
++	struct work_struct ext_stop_scan_wq;
++	struct work_struct ext_send_beacon_wq;
++#endif
++	struct workqueue_struct *wq;
++#else
++	/* used for periodly scan */
++	struct timer_list scan_timer;
++
++	struct tq_struct associate_complete_wq;
++	struct tq_struct associate_retry_wq;
++	struct tq_struct start_ibss_wq;
++	struct tq_struct associate_procedure_wq;
++	struct tq_struct ips_leave_wq;  //YJ,add,081230,for IPS
++	struct tq_struct softmac_scan_wq;
++	struct tq_struct wx_sync_scan_wq;
++	struct tq_struct wmm_param_update_wq;
++#ifdef _RTL8187_EXT_PATCH_
++	struct tq_struct ext_stop_scan_wq;
++	struct tq_struct ext_send_beacon_wq;
++#endif
++#endif
++
++	/* Callback functions */
++	void (*set_security)(struct net_device *dev,
++			     struct ieee80211_security *sec);
++	
++	/* Used to TX data frame by using txb structs.
++	 * this is not used if in the softmac_features
++	 * is set the flag IEEE_SOFTMAC_TX_QUEUE
++	 */
++	int (*hard_start_xmit)(struct ieee80211_txb *txb,
++			       struct net_device *dev);
++	
++	int (*reset_port)(struct net_device *dev);
++
++	/* Softmac-generated frames (mamagement) are TXed via this 
++	 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is 
++	 * not set. As some cards may have different HW queues that 
++	 * one might want to use for data and management frames
++	 * the option to have two callbacks might be useful.
++	 * This fucntion can't sleep.
++	 */
++	int (*softmac_hard_start_xmit)(struct sk_buff *skb,
++			       struct net_device *dev);
++	
++	/* used instead of hard_start_xmit (not softmac_hard_start_xmit)
++	 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
++	 * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
++	 * then also management frames are sent via this callback.
++	 * This function can't sleep.
++	 */    
++	void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
++			       struct net_device *dev,int rate);
++
++	/* stops the HW queue for DATA frames. Useful to avoid
++	 * waste time to TX data frame when we are reassociating
++	 * This function can sleep.
++	 */	 
++	void (*data_hard_stop)(struct net_device *dev);
++	
++	/* OK this is complementar to data_poll_hard_stop */
++	void (*data_hard_resume)(struct net_device *dev);
++	
++	/* ask to the driver to retune the radio .
++	 * This function can sleep. the driver should ensure
++	 * the radio has been swithced before return.
++	 */
++	void (*set_chan)(struct net_device *dev,short ch);
++	
++	/* These are not used if the ieee stack takes care of
++	 * scanning (IEEE_SOFTMAC_SCAN feature set). 
++	 * In this case only the set_chan is used.
++	 *
++	 * The syncro version is similar to the start_scan but
++	 * does not return until all channels has been scanned.
++	 * this is called in user context and should sleep, 
++	 * it is called in a work_queue when swithcing to ad-hoc mode
++	 * or in behalf of iwlist scan when the card is associated 
++	 * and root user ask for a scan. 
++	 * the fucntion stop_scan should stop both the syncro and
++	 * background scanning and can sleep.
++	 * The fucntion start_scan should initiate the background 
++	 * scanning and can't sleep.
++	 */ 
++	void (*scan_syncro)(struct net_device *dev);
++	void (*start_scan)(struct net_device *dev);
++	void (*stop_scan)(struct net_device *dev);
++	
++	/* indicate the driver that the link state is changed
++	 * for example it may indicate the card is associated now.
++	 * Driver might be interested in this to apply RX filter 
++	 * rules or simply light the LINK led 
++	 */
++	void (*link_change)(struct net_device *dev);
++	
++	/* these two function indicates to the HW when to start
++	 * and stop to send beacons. This is used when the 
++	 * IEEE_SOFTMAC_BEACONS is not set. For now the
++	 * stop_send_bacons is NOT guaranteed to be called only
++	 * after start_send_beacons.
++	 */
++	void (*start_send_beacons) (struct net_device *dev);
++	void (*stop_send_beacons) (struct net_device *dev);
++	
++	/* power save mode related */
++	void (*sta_wake_up) (struct net_device *dev);
++	void (*ps_request_tx_ack) (struct net_device *dev);
++	void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
++	short (*ps_is_queue_empty) (struct net_device *dev);
++
++//by lizhaoming for LED 2008.6.23
++#ifdef LED
++	void (*ieee80211_led_contorl) (struct net_device *dev, LED_CTL_MODE LedAction);
++#endif
++#ifdef CONFIG_IPS
++	void (*ieee80211_ips_leave) (struct net_device *dev);
++#endif
++	/* QoS related */
++	//void (*wmm_param_update) (struct net_device *dev, u8 *ac_param);
++	//void (*wmm_param_update) (struct ieee80211_device *ieee);
++	
++	
++#ifdef _RTL8187_EXT_PATCH_
++
++	/// ieee80211_softmac.c
++	int (*ext_patch_ieee80211_start_protocol) (struct ieee80211_device *ieee); // start special mode
++
++	short (*ext_patch_ieee80211_probe_req_1) (struct ieee80211_device *ieee); // return = 0: no more phases,  >0: another phase
++	u8* (*ext_patch_ieee80211_probe_req_2) (struct ieee80211_device *ieee, struct sk_buff *skb, u8 *tag); // return tag
++
++	void (*ext_patch_ieee80211_stop_protocol) (struct ieee80211_device *ieee); // stop timer
++	
++	void (*ext_patch_ieee80211_association_req_1) (struct ieee80211_assoc_request_frame *hdr);
++	u8* (*ext_patch_ieee80211_association_req_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, struct sk_buff *skb);
++	
++	int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_req) (struct ieee80211_device *ieee, struct sk_buff *skb);
++	int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp) (struct ieee80211_device *ieee, struct sk_buff *skb);
++
++	void (*ext_patch_ieee80211_assoc_resp_by_net_1) (struct ieee80211_assoc_response_frame *assoc);
++	u8* (*ext_patch_ieee80211_assoc_resp_by_net_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, int pkt_type, struct sk_buff *skb);
++		
++	int (*ext_patch_ieee80211_ext_stop_scan_wq_set_channel) (struct ieee80211_device *ieee);
++	
++	int (*ext_patch_ieee80211_softmac_xmit_get_rate) (struct ieee80211_device *ieee, struct sk_buff *skb);
++	
++	int (*ext_patch_ieee80211_rx_frame_softmac_on_auth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
++	int (*ext_patch_ieee80211_rx_frame_softmac_on_deauth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
++//by amy for mesh
++	void (*ext_patch_ieee80211_start_mesh)(struct ieee80211_device *ieee);
++//by amy for mesh 	
++	// ieee80211_rx.c
++	// rz
++	void (*ext_patch_ieee80211_rx_mgt_on_probe_req) ( struct ieee80211_device *ieee, struct ieee80211_probe_request *beacon, struct ieee80211_rx_stats *stats);
++	unsigned int(*ext_patch_ieee80211_process_probe_response_1)(struct ieee80211_device *ieee,	struct ieee80211_probe_response *beacon,	struct ieee80211_rx_stats *stats);
++	
++	void (*ext_patch_ieee80211_rx_mgt_update_expire) ( struct ieee80211_device *ieee, struct sk_buff *skb);
++	struct sk_buff* (*ext_patch_get_beacon_get_probersp)(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);
++
++	// success(return 0) is responsible to free skb
++	int (*ext_patch_ieee80211_rx_on_rx) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats, u16 type, u16 stype);
++	
++	int (*ext_patch_ieee80211_rx_frame_get_hdrlen) (struct ieee80211_device *ieee, struct sk_buff *skb);
++	
++	// Check whether or not accept the incoming frame. return 0: not accept, >0: accept
++	int (*ext_patch_ieee80211_rx_is_valid_framectl) (struct ieee80211_device *ieee, u16 fc, u16 type, u16 stype);
++	
++	// return > 0 is success.  0 when failed
++	// success(return >0) is responsible to free skb
++	int (*ext_patch_ieee80211_rx_process_dataframe) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);
++	
++	/* added by david for setting acl dynamically */
++	u8 (*ext_patch_ieee80211_acl_query) (struct ieee80211_device *ieee, u8 *sa);
++
++	// int (*ext_patch_is_duplicate_packet) (struct ieee80211_device *ieee, struct ieee80211_hdr *header, u16 type, u16 stype);
++	
++	// ieee80211_tx.c
++	
++	// locked by ieee->lock. Call ieee80211_softmac_xmit afterward
++	struct ieee80211_txb* (*ext_patch_ieee80211_xmit) (struct sk_buff *skb, struct net_device *dev);
++	
++	
++#endif // _RTL8187_EXT_PATCH_
++
++	/* This must be the last item so that it points to the data
++	 * allocated beyond this structure by alloc_ieee80211 */
++	u8 priv[0];
++};
++
++#define IEEE_A            (1<<0)
++#define IEEE_B            (1<<1)
++#define IEEE_G            (1<<2)
++#define IEEE_MODE_MASK    (IEEE_A|IEEE_B|IEEE_G)
++
++/* Generate a 802.11 header */
++
++/* Uses the channel change callback directly
++ * instead of [start/stop] scan callbacks
++ */
++#define IEEE_SOFTMAC_SCAN (1<<2)
++
++/* Perform authentication and association handshake */
++#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
++
++/* Generate probe requests */
++#define IEEE_SOFTMAC_PROBERQ (1<<4)
++
++/* Generate respones to probe requests */
++#define IEEE_SOFTMAC_PROBERS (1<<5)
++
++/* The ieee802.11 stack will manages the netif queue
++ * wake/stop for the driver, taking care of 802.11
++ * fragmentation. See softmac.c for details. */
++#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
++
++/* Uses only the softmac_data_hard_start_xmit
++ * even for TX management frames.
++ */
++#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
++
++/* Generate beacons.  The stack will enqueue beacons
++ * to the card 
++ */ 
++#define IEEE_SOFTMAC_BEACONS (1<<6)
++#ifdef _RTL8187_EXT_PATCH_
++extern inline int ieee80211_find_MP(struct ieee80211_device* ieee, const u8* addr, u8 set)
++{
++	int i=0;
++	for (i=1; i<MAX_MP; i++)
++	{
++		if ((ieee->cryptlist[i]->used == 0)&&set)
++		{//entry is empty
++			memcpy(ieee->cryptlist[i]->mac_addr, addr, ETH_ALEN);
++			ieee->cryptlist[i]->used = 1;
++			return i;
++		}
++		else if (0 == memcmp(ieee->cryptlist[i]->mac_addr, addr, ETH_ALEN)) //find matched entry
++		{
++			return i;
++		}
++	}
++	return -1;
++}
++#endif
++
++
++
++static inline void *ieee80211_priv(struct net_device *dev)
++{
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 
++	return ((struct ieee80211_device *)netdev_priv(dev))->priv;
++#else
++	return ((struct ieee80211_device *)dev->priv)->priv;
++#endif
++}
++
++extern inline int ieee80211_is_empty_essid(const char *essid, int essid_len)
++{
++	/* Single white space is for Linksys APs */
++	if (essid_len == 1 && essid[0] == ' ')
++		return 1;
++
++	/* Otherwise, if the entire essid is 0, we assume it is hidden */
++	while (essid_len) {
++		essid_len--;
++		if (essid[essid_len] != '\0')
++			return 0;
++	}
++
++	return 1;
++}
++
++extern inline int ieee80211_is_valid_mode(struct ieee80211_device *ieee, int mode)
++{
++	/*
++	 * It is possible for both access points and our device to support
++	 * combinations of modes, so as long as there is one valid combination
++	 * of ap/device supported modes, then return success
++	 *
++	 */
++	if ((mode & IEEE_A) &&
++	    (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
++	    (ieee->freq_band & IEEE80211_52GHZ_BAND))
++		return 1;
++
++	if ((mode & IEEE_G) &&
++	    (ieee->modulation & IEEE80211_OFDM_MODULATION) &&
++	    (ieee->freq_band & IEEE80211_24GHZ_BAND))
++		return 1;
++
++	if ((mode & IEEE_B) &&
++	    (ieee->modulation & IEEE80211_CCK_MODULATION) &&
++	    (ieee->freq_band & IEEE80211_24GHZ_BAND))
++		return 1;
++
++	return 0;
++}
++
++extern inline int ieee80211_get_hdrlen(u16 fc)
++{
++	int hdrlen = 24;
++
++	switch (WLAN_FC_GET_TYPE(fc)) {
++	case IEEE80211_FTYPE_DATA:
++		if ((fc & IEEE80211_FCTL_FROMDS) && (fc & IEEE80211_FCTL_TODS))
++			hdrlen = 30; /* Addr4 */
++		if(IEEE80211_QOS_HAS_SEQ(fc))
++			hdrlen += 2; /* QOS ctrl*/
++		break;
++	case IEEE80211_FTYPE_CTL:
++		switch (WLAN_FC_GET_STYPE(fc)) {
++		case IEEE80211_STYPE_CTS:
++		case IEEE80211_STYPE_ACK:
++			hdrlen = 10;
++			break;
++		default:
++			hdrlen = 16;
++			break;
++		}
++		break;
++	}
++
++	return hdrlen;
++}
++
++
++
++/* ieee80211.c */
++extern void free_ieee80211(struct net_device *dev);
++extern struct net_device *alloc_ieee80211(int sizeof_priv);
++
++extern int ieee80211_set_encryption(struct ieee80211_device *ieee);
++
++/* ieee80211_tx.c */
++
++extern int ieee80211_encrypt_fragment(
++	struct ieee80211_device *ieee,
++	struct sk_buff *frag,
++	int hdr_len);
++	
++extern int ieee80211_xmit(struct sk_buff *skb,
++			  struct net_device *dev);
++extern void ieee80211_txb_free(struct ieee80211_txb *);
++
++
++/* ieee80211_rx.c */
++extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
++			struct ieee80211_rx_stats *rx_stats);
++extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
++			     struct ieee80211_hdr *header,
++			     struct ieee80211_rx_stats *stats);
++
++/* ieee80211_wx.c */
++extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
++				 struct iw_request_info *info,
++				 union iwreq_data *wrqu, char *key);
++extern int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
++				   struct iw_request_info *info,
++				   union iwreq_data *wrqu, char *key);
++extern int ieee80211_wx_get_encode(struct ieee80211_device *ieee,
++				   struct iw_request_info *info,
++				   union iwreq_data *wrqu, char *key);
++extern int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
++                            struct iw_request_info *info,
++                            union iwreq_data* wrqu, char *extra);
++int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
++                               struct iw_request_info *info,
++                               struct iw_param *data, char *extra);
++int ieee80211_wx_set_mlme(struct ieee80211_device *ieee,
++                               struct iw_request_info *info,
++                               union iwreq_data *wrqu, char *extra);
++
++int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len);
++/* ieee80211_softmac.c */
++extern short ieee80211_is_54g(struct ieee80211_network net);
++extern short ieee80211_is_shortslot(struct ieee80211_network net);
++extern int ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
++			struct ieee80211_rx_stats *rx_stats, u16 type,
++			u16 stype);
++extern void ieee80211_softmac_new_net(struct ieee80211_device *ieee, struct ieee80211_network *net);
++
++extern void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *ieee);
++extern void ieee80211_softmac_check_all_nets(struct ieee80211_device *ieee);
++extern void ieee80211_start_bss(struct ieee80211_device *ieee);
++extern void ieee80211_start_master_bss(struct ieee80211_device *ieee);
++extern void ieee80211_start_ibss(struct ieee80211_device *ieee);
++extern void ieee80211_softmac_init(struct ieee80211_device *ieee);
++extern void ieee80211_softmac_free(struct ieee80211_device *ieee);
++extern void ieee80211_associate_abort(struct ieee80211_device *ieee);
++extern void ieee80211_disassociate(struct ieee80211_device *ieee);
++extern void ieee80211_stop_scan(struct ieee80211_device *ieee);
++extern void ieee80211_start_scan_syncro(struct ieee80211_device *ieee);
++extern void ieee80211_check_all_nets(struct ieee80211_device *ieee);
++extern void ieee80211_start_protocol(struct ieee80211_device *ieee);
++extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
++extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
++extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
++extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
++extern void ieee80211_wake_queue(struct ieee80211_device *ieee);
++extern void ieee80211_stop_queue(struct ieee80211_device *ieee);
++extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
++extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
++extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
++extern int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct iw_point *p);
++extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
++extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
++extern void ieee80211_start_scan(struct ieee80211_device *ieee);
++
++#ifdef _RTL8187_EXT_PATCH_
++extern void ieee80211_rx_auth_rq(struct ieee80211_device *ieee, struct sk_buff *skb);
++extern void ieee80211_ext_issue_assoc_req(struct ieee80211_device *ieee, struct ieee80211_network *pstat);
++extern void ieee80211_associate_step1(struct ieee80211_device *ieee);
++extern void ieee80211_ext_issue_disassoc(struct ieee80211_device *ieee, struct ieee80211_network *pstat, int reason, unsigned char extReason);
++extern void ieee80211_ext_issue_assoc_rsp(struct ieee80211_device *ieee, u8 *dest, unsigned short status, struct ieee80211_network *pstat, int pkt_type);
++extern void softmac_mgmt_xmit(struct sk_buff *skb, struct ieee80211_device *ieee);
++extern struct sk_buff* ieee80211_ext_probe_resp_by_net(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);
++extern int ieee80211_network_init(struct ieee80211_device *ieee, struct ieee80211_probe_response *beacon, struct ieee80211_network *network, struct ieee80211_rx_stats *stats);
++extern struct ieee80211_txb *ieee80211_alloc_txb(int nr_frags, int txb_size, int gfp_mask);
++extern void ieee80211_ext_send_11s_beacon(struct ieee80211_device *ieee);
++extern struct ieee80211_txb *ieee80211_ext_alloc_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt);
++extern struct ieee80211_txb *ieee80211_ext_reuse_txb(struct sk_buff *skb, struct net_device *dev, struct ieee80211_hdr_3addr *header, int hdr_len, u8 isQoS, u16 *pQOS_ctl, int isEncrypt, struct ieee80211_crypt_data* crypt);
++extern int ieee_ext_skb_p80211_to_ether(struct sk_buff *skb, int hdrlen, u8 *dst, u8 *src);
++#endif
++
++/* ieee80211_crypt_ccmp&tkip&wep.c */
++extern void ieee80211_tkip_null(void);
++extern void ieee80211_wep_null(void);
++extern void ieee80211_ccmp_null(void);
++/* ieee80211_softmac_wx.c */
++
++extern int ieee80211_wx_get_wap(struct ieee80211_device *ieee, 
++			    struct iw_request_info *info, 
++			    union iwreq_data *wrqu, char *ext);
++			    
++extern int ieee80211_wx_set_wap(struct ieee80211_device *ieee,
++			 struct iw_request_info *info,
++			 union iwreq_data *awrq,
++			 char *extra);
++			 
++extern int ieee80211_wx_get_essid(struct ieee80211_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b);
++
++extern int ieee80211_wx_set_rate(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info,
++			     union iwreq_data *wrqu, char *extra);
++			     
++extern int ieee80211_wx_get_rate(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra);
++			     
++extern int ieee80211_wx_set_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++			     
++extern int ieee80211_wx_set_scan(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++			     
++extern int ieee80211_wx_set_essid(struct ieee80211_device *ieee, 
++			      struct iw_request_info *a,
++			      union iwreq_data *wrqu, char *extra);
++			      
++extern int ieee80211_wx_get_mode(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++
++extern int ieee80211_wx_set_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++
++extern int ieee80211_wx_get_freq(struct ieee80211_device *ieee, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b);
++
++//extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++extern void ieee80211_wx_sync_scan_wq(struct work_struct *work);
++#else
++ extern void ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
++#endif
++extern int ieee80211_wx_set_rawtx(struct ieee80211_device *ieee, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra);
++			       
++extern int ieee80211_wx_get_name(struct ieee80211_device *ieee, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra);
++
++extern int ieee80211_wx_set_power(struct ieee80211_device *ieee,
++				 struct iw_request_info *info,
++				 union iwreq_data *wrqu, char *extra);
++
++extern int ieee80211_wx_get_power(struct ieee80211_device *ieee,
++				 struct iw_request_info *info,
++				 union iwreq_data *wrqu, char *extra);
++				 			     
++extern const long ieee80211_wlan_frequencies[];
++
++extern inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
++{
++	ieee->scans++;
++}
++
++extern inline int ieee80211_get_scans(struct ieee80211_device *ieee)
++{
++	return ieee->scans;
++}
++
++static inline const char *escape_essid(const char *essid, u8 essid_len) {
++	static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
++	const char *s = essid;
++	char *d = escaped;
++
++	if (ieee80211_is_empty_essid(essid, essid_len)) {
++		memcpy(escaped, "<hidden>", sizeof("<hidden>"));
++		return escaped;
++	}
++
++	essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
++	while (essid_len--) {
++		if (*s == '\0') {
++			*d++ = '\\';
++			*d++ = '0';
++			s++;
++		} else {
++			*d++ = *s++;
++		}
++	}
++	*d = '\0';
++	return escaped;
++}
++#endif /* IEEE80211_H */
+Index: drivers/net/wireless/rtl8187B/rtl8187/install
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/install	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,239 @@
++    Installing the rtl8180-sa2400 Linux kernel driver
++
++Released under the terms of GNU General Public Licence (GPL)
++Copyright(c) Andrea Merello - 2004, Install instructions by Rick Bronson
++
++NOTE: These instructions were written for a Knoppix 3.6 (using Linux
++2.6.7 kernel)
++
++1. Hardware prerequisites
++
++1.1 One of the following devices:
++
++  1.1.1	Realtek card, Man ID = 0x10ec. Device ID =0x8180 (make sure it
++        mount sa2400 radio. Many cards do, many don't)
++  1.1.2 Belkin F5D6001 PCI card, Man ID = 0x1799, Device ID =0x6001
++        (Version 3)
++  1.1.3	Belkin F5D6020 Version 3 (3000) Cardbus card, , Man ID =
++        0x1799, Device ID =0x6020  NOTE: version 1 and 2 will not work
++  1.1.4 DLINK card, Man ID = 0x1799, 0x1186, Device ID =0x3300
++        (A DWL-610 is working here, but I'm not sure all these cards 
++	have rtl8180 & sa2400)
++
++2. Software prerequisites
++
++2.1 Linux 2.6.0 or greater, 2.4 might work but you'll have to do some
++    hacking.
++
++3. Instructions
++
++3.1 Get latest driver from
++    http://sourceforge.net/projects/rtl8180-sa2400 (in this example
++    we'll use rtl8180-0.9.1) and build:
++
++tar xzf rtl8180-0.9.1.tar.gz
++cd rtl8180-0.9.1
++make
++
++(naturally, substitute 0.9.1 with the current version number)
++
++  You can ignore any "no CRC" warnings.
++
++3.2 Module loading (order is important)
++
++for user convenience a ./module_load script is provided.
++Anyway if you want to do manually:
++
++sudo insmod ieee80211-r8180_crypt.ko
++# you may or may not have to do this following step, Knoppix needs it
++sudo insmod /usr/src/linux/lib/crc32.ko
++# you will also need ARC4 support in kernel or by loading module
++
++sudo insmod ieee80211_crypt_wep.ko
++sudo insmod ieee80211-r8180.ko 
++sudo insmod r8180.ko
++
++Once the above is done, you can do some checks to verify if all went
++OK:
++
++  Doing 
++
++cat /proc/modules
++
++ Gives:
++
++---------------------------------------
++r8180 34312 0 - Live 0xc6c55000
++ieee80211-r8180 25988 1 r8180, Live 0xc6c41000
++ieee80211_crypt_wep 9216 0 - Live 0xc6c34000
++crc32 8064 1 ieee80211_crypt_wep, Live 0xc6c31000
++ieee80211-r8180_crypt 9092 2 ieee80211-r8180,ieee80211_crypt_wep, Live 0xc6c2d000
++---------------------------------------
++
++  If you do:
++
++dmesg
++
++  You should see something like:
++
++---------------------------
++rtl8180: Card MAC address is XX:XX:XX:XX:XX:XX
++...
++rtl8180: driver probe completed
++---------------------------
++
++In this output you should see also other detail like if you have a
++digital or analog PHY. support for the latter is experimental, please
++report..
++
++  If you do:
++
++ifconfig -a
++
++  You should see
++
++---------------------------
++wlan0     Link encap:Ethernet  HWaddr XX:XX:XX:XX:XX:XX
++          BROADCAST MULTICAST  MTU:1500  Metric:1
++          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
++          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
++          collisions:0 txqueuelen:1000 
++          RX bytes:0 (0.0 b)  TX bytes:0 (0.0 b)
++          Interrupt:9 Base address:0x4800 
++---------------------------
++
++   Doing:
++
++cat /proc/interrupts
++
++  You should see something like:
++
++---------------------------
++  9:          0          ..... , wlan0
++---------------------------
++Where '9' could be any number
++
++If you have a CARDBUS card, doing "cardctl ident" should say something
++like:
++
++---------------------------------------
++Socket 1:
++  product info: "Realtek", "Rtl8180"
++  manfid: 0x0000, 0x024c
++  function: 6 (network)
++---------------------------------------
++
++  Doing:
++
++iwconfig
++
++  Shows:
++
++---------------------------
++wlan0     IEEE 802.11b  ESSID:""  Nickname:""
++          NWID:off/any  Mode:Managed  Frequency:2.462GHz  
++          Access Point: 00:11:50:0A:07:85  Bit Rate=-1.07375e+06kb/s   Tx-Power:off   
++          Sensitivity=1074102348/0  
++          Retry:off   RTS thr=-1073745104 B   Fragment thr:off
++          Power Management:off
++---------------------------
++For now not all parameters are meaningful (like Sensivity).
++
++
++3.3 Setup
++
++sudo ifconfig wlan0 up
++
++  At this point, if you are near an AP or wireless router you should
++start getting interrupts:
++
++cat /proc/interrupts
++
++---------------------------
++  9:        500          ...., wlan0
++---------------------------
++
++The second number increments. Note that this happens also if you have
++other peripherical on the same interrupt line and you use them.
++
++  Doing:
++
++ifconfig
++
++  Shows (note RX bytes):
++
++---------------------------
++wlan0     Link encap:UNSPEC  HWaddr 00-30-BD-4D-8F-9E-00-00-00-00-00-00-00-00-00-00  
++          UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1
++          RX packets:2170 errors:0 dropped:0 overruns:0 frame:0
++          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
++          collisions:0 txqueuelen:1000 
++          RX bytes:93343 (91.1 KiB)  TX bytes:0 (0.0 b)
++          Interrupt:9 Base address:0x4000 
++---------------------------
++
++  If you do:
++
++iwlist scan
++
++  If you are in range of an AP or wireless router, you should see
++  something like:
++
++---------------------------
++wlan0     Scan completed :
++          Cell 01 - Address: 00:11:50:0A:07:85
++                    ESSID:"solar"
++                    Mode:Master
++                    Frequency:2.462GHz (channel 11)
++                    Bit Rate:1Mb/s
++                    Bit Rate:2Mb/s
++                    Bit Rate:5.5Mb/s
++                    Bit Rate:11Mb/s
++                    Bit Rate:18Mb/s
++                    Bit Rate:24Mb/s
++                    Bit Rate:36Mb/s
++                    Bit Rate:54Mb/s
++                    Quality=21/100  Signal level=-28 dBm  Noise level=-256 dBm
++                    Encryption key:off
++---------------------------
++
++3.4 Test
++
++  Now set your SSID:
++
++sudo iwconfig wlan0 essid solar
++
++ Substitute 'solar' (my essid) with your essid.
++
++  Set your address (you may want to use different numbers here):
++
++sudo ifconfig wlan0 broadcast 192.168.0.255 netmask 255.255.255.0 192.168.0.100
++
++  Add a route, if you need it:
++
++sudo route add default gw 192.168.0.1 dev wlan0
++
++  Try pinging another host (like the wireless router itself):
++
++ping 192.168.0.1
++
++  For further usage hint (es. setting WEP key or monitor mode see README file)
++  
++3.3 Installing permanently (so the driver is loaded when you reboot).
++
++  < Not done yet >
++
++3.4 Diagnostics
++
++ Some commands you can use to try to figure out what's gone wrong:
++
++lsmod
++dmesg
++ifconfig -a
++iwconfig
++cat /proc/iomem
++cat /proc/interrupts
++cardctl ident
++iwlist scan
++
++ In particular dmesg output is very useful/appreciated in report
+Index: drivers/net/wireless/rtl8187B/rtl8187/license
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/license	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,340 @@
++		    GNU GENERAL PUBLIC LICENSE
++		       Version 2, June 1991
++
++ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
++     59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ Everyone is permitted to copy and distribute verbatim copies
++ of this license document, but changing it is not allowed.
++
++			    Preamble
++
++  The licenses for most software are designed to take away your
++freedom to share and change it.  By contrast, the GNU General Public
++License is intended to guarantee your freedom to share and change free
++software--to make sure the software is free for all its users.  This
++General Public License applies to most of the Free Software
++Foundation's software and to any other program whose authors commit to
++using it.  (Some other Free Software Foundation software is covered by
++the GNU Library General Public License instead.)  You can apply it to
++your programs, too.
++
++  When we speak of free software, we are referring to freedom, not
++price.  Our General Public Licenses are designed to make sure that you
++have the freedom to distribute copies of free software (and charge for
++this service if you wish), that you receive source code or can get it
++if you want it, that you can change the software or use pieces of it
++in new free programs; and that you know you can do these things.
++
++  To protect your rights, we need to make restrictions that forbid
++anyone to deny you these rights or to ask you to surrender the rights.
++These restrictions translate to certain responsibilities for you if you
++distribute copies of the software, or if you modify it.
++
++  For example, if you distribute copies of such a program, whether
++gratis or for a fee, you must give the recipients all the rights that
++you have.  You must make sure that they, too, receive or can get the
++source code.  And you must show them these terms so they know their
++rights.
++
++  We protect your rights with two steps: (1) copyright the software, and
++(2) offer you this license which gives you legal permission to copy,
++distribute and/or modify the software.
++
++  Also, for each author's protection and ours, we want to make certain
++that everyone understands that there is no warranty for this free
++software.  If the software is modified by someone else and passed on, we
++want its recipients to know that what they have is not the original, so
++that any problems introduced by others will not reflect on the original
++authors' reputations.
++
++  Finally, any free program is threatened constantly by software
++patents.  We wish to avoid the danger that redistributors of a free
++program will individually obtain patent licenses, in effect making the
++program proprietary.  To prevent this, we have made it clear that any
++patent must be licensed for everyone's free use or not licensed at all.
++
++  The precise terms and conditions for copying, distribution and
++modification follow.
++
++		    GNU GENERAL PUBLIC LICENSE
++   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
++
++  0. This License applies to any program or other work which contains
++a notice placed by the copyright holder saying it may be distributed
++under the terms of this General Public License.  The "Program", below,
++refers to any such program or work, and a "work based on the Program"
++means either the Program or any derivative work under copyright law:
++that is to say, a work containing the Program or a portion of it,
++either verbatim or with modifications and/or translated into another
++language.  (Hereinafter, translation is included without limitation in
++the term "modification".)  Each licensee is addressed as "you".
++
++Activities other than copying, distribution and modification are not
++covered by this License; they are outside its scope.  The act of
++running the Program is not restricted, and the output from the Program
++is covered only if its contents constitute a work based on the
++Program (independent of having been made by running the Program).
++Whether that is true depends on what the Program does.
++
++  1. You may copy and distribute verbatim copies of the Program's
++source code as you receive it, in any medium, provided that you
++conspicuously and appropriately publish on each copy an appropriate
++copyright notice and disclaimer of warranty; keep intact all the
++notices that refer to this License and to the absence of any warranty;
++and give any other recipients of the Program a copy of this License
++along with the Program.
++
++You may charge a fee for the physical act of transferring a copy, and
++you may at your option offer warranty protection in exchange for a fee.
++
++  2. You may modify your copy or copies of the Program or any portion
++of it, thus forming a work based on the Program, and copy and
++distribute such modifications or work under the terms of Section 1
++above, provided that you also meet all of these conditions:
++
++    a) You must cause the modified files to carry prominent notices
++    stating that you changed the files and the date of any change.
++
++    b) You must cause any work that you distribute or publish, that in
++    whole or in part contains or is derived from the Program or any
++    part thereof, to be licensed as a whole at no charge to all third
++    parties under the terms of this License.
++
++    c) If the modified program normally reads commands interactively
++    when run, you must cause it, when started running for such
++    interactive use in the most ordinary way, to print or display an
++    announcement including an appropriate copyright notice and a
++    notice that there is no warranty (or else, saying that you provide
++    a warranty) and that users may redistribute the program under
++    these conditions, and telling the user how to view a copy of this
++    License.  (Exception: if the Program itself is interactive but
++    does not normally print such an announcement, your work based on
++    the Program is not required to print an announcement.)
++
++These requirements apply to the modified work as a whole.  If
++identifiable sections of that work are not derived from the Program,
++and can be reasonably considered independent and separate works in
++themselves, then this License, and its terms, do not apply to those
++sections when you distribute them as separate works.  But when you
++distribute the same sections as part of a whole which is a work based
++on the Program, the distribution of the whole must be on the terms of
++this License, whose permissions for other licensees extend to the
++entire whole, and thus to each and every part regardless of who wrote it.
++
++Thus, it is not the intent of this section to claim rights or contest
++your rights to work written entirely by you; rather, the intent is to
++exercise the right to control the distribution of derivative or
++collective works based on the Program.
++
++In addition, mere aggregation of another work not based on the Program
++with the Program (or with a work based on the Program) on a volume of
++a storage or distribution medium does not bring the other work under
++the scope of this License.
++
++  3. You may copy and distribute the Program (or a work based on it,
++under Section 2) in object code or executable form under the terms of
++Sections 1 and 2 above provided that you also do one of the following:
++
++    a) Accompany it with the complete corresponding machine-readable
++    source code, which must be distributed under the terms of Sections
++    1 and 2 above on a medium customarily used for software interchange; or,
++
++    b) Accompany it with a written offer, valid for at least three
++    years, to give any third party, for a charge no more than your
++    cost of physically performing source distribution, a complete
++    machine-readable copy of the corresponding source code, to be
++    distributed under the terms of Sections 1 and 2 above on a medium
++    customarily used for software interchange; or,
++
++    c) Accompany it with the information you received as to the offer
++    to distribute corresponding source code.  (This alternative is
++    allowed only for noncommercial distribution and only if you
++    received the program in object code or executable form with such
++    an offer, in accord with Subsection b above.)
++
++The source code for a work means the preferred form of the work for
++making modifications to it.  For an executable work, complete source
++code means all the source code for all modules it contains, plus any
++associated interface definition files, plus the scripts used to
++control compilation and installation of the executable.  However, as a
++special exception, the source code distributed need not include
++anything that is normally distributed (in either source or binary
++form) with the major components (compiler, kernel, and so on) of the
++operating system on which the executable runs, unless that component
++itself accompanies the executable.
++
++If distribution of executable or object code is made by offering
++access to copy from a designated place, then offering equivalent
++access to copy the source code from the same place counts as
++distribution of the source code, even though third parties are not
++compelled to copy the source along with the object code.
++
++  4. You may not copy, modify, sublicense, or distribute the Program
++except as expressly provided under this License.  Any attempt
++otherwise to copy, modify, sublicense or distribute the Program is
++void, and will automatically terminate your rights under this License.
++However, parties who have received copies, or rights, from you under
++this License will not have their licenses terminated so long as such
++parties remain in full compliance.
++
++  5. You are not required to accept this License, since you have not
++signed it.  However, nothing else grants you permission to modify or
++distribute the Program or its derivative works.  These actions are
++prohibited by law if you do not accept this License.  Therefore, by
++modifying or distributing the Program (or any work based on the
++Program), you indicate your acceptance of this License to do so, and
++all its terms and conditions for copying, distributing or modifying
++the Program or works based on it.
++
++  6. Each time you redistribute the Program (or any work based on the
++Program), the recipient automatically receives a license from the
++original licensor to copy, distribute or modify the Program subject to
++these terms and conditions.  You may not impose any further
++restrictions on the recipients' exercise of the rights granted herein.
++You are not responsible for enforcing compliance by third parties to
++this License.
++
++  7. If, as a consequence of a court judgment or allegation of patent
++infringement or for any other reason (not limited to patent issues),
++conditions are imposed on you (whether by court order, agreement or
++otherwise) that contradict the conditions of this License, they do not
++excuse you from the conditions of this License.  If you cannot
++distribute so as to satisfy simultaneously your obligations under this
++License and any other pertinent obligations, then as a consequence you
++may not distribute the Program at all.  For example, if a patent
++license would not permit royalty-free redistribution of the Program by
++all those who receive copies directly or indirectly through you, then
++the only way you could satisfy both it and this License would be to
++refrain entirely from distribution of the Program.
++
++If any portion of this section is held invalid or unenforceable under
++any particular circumstance, the balance of the section is intended to
++apply and the section as a whole is intended to apply in other
++circumstances.
++
++It is not the purpose of this section to induce you to infringe any
++patents or other property right claims or to contest validity of any
++such claims; this section has the sole purpose of protecting the
++integrity of the free software distribution system, which is
++implemented by public license practices.  Many people have made
++generous contributions to the wide range of software distributed
++through that system in reliance on consistent application of that
++system; it is up to the author/donor to decide if he or she is willing
++to distribute software through any other system and a licensee cannot
++impose that choice.
++
++This section is intended to make thoroughly clear what is believed to
++be a consequence of the rest of this License.
++
++  8. If the distribution and/or use of the Program is restricted in
++certain countries either by patents or by copyrighted interfaces, the
++original copyright holder who places the Program under this License
++may add an explicit geographical distribution limitation excluding
++those countries, so that distribution is permitted only in or among
++countries not thus excluded.  In such case, this License incorporates
++the limitation as if written in the body of this License.
++
++  9. The Free Software Foundation may publish revised and/or new versions
++of the General Public License from time to time.  Such new versions will
++be similar in spirit to the present version, but may differ in detail to
++address new problems or concerns.
++
++Each version is given a distinguishing version number.  If the Program
++specifies a version number of this License which applies to it and "any
++later version", you have the option of following the terms and conditions
++either of that version or of any later version published by the Free
++Software Foundation.  If the Program does not specify a version number of
++this License, you may choose any version ever published by the Free Software
++Foundation.
++
++  10. If you wish to incorporate parts of the Program into other free
++programs whose distribution conditions are different, write to the author
++to ask for permission.  For software which is copyrighted by the Free
++Software Foundation, write to the Free Software Foundation; we sometimes
++make exceptions for this.  Our decision will be guided by the two goals
++of preserving the free status of all derivatives of our free software and
++of promoting the sharing and reuse of software generally.
++
++			    NO WARRANTY
++
++  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
++FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
++OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
++PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
++OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
++MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
++TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
++PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
++REPAIR OR CORRECTION.
++
++  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
++WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
++REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
++INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
++OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
++TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
++YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
++PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
++POSSIBILITY OF SUCH DAMAGES.
++
++		     END OF TERMS AND CONDITIONS
++
++	    How to Apply These Terms to Your New Programs
++
++  If you develop a new program, and you want it to be of the greatest
++possible use to the public, the best way to achieve this is to make it
++free software which everyone can redistribute and change under these terms.
++
++  To do so, attach the following notices to the program.  It is safest
++to attach them to the start of each source file to most effectively
++convey the exclusion of warranty; and each file should have at least
++the "copyright" line and a pointer to where the full notice is found.
++
++    <one line to give the program's name and a brief idea of what it does.>
++    Copyright (C) <year>  <name of author>
++
++    This program is free software; you can redistribute it and/or modify
++    it under the terms of the GNU General Public License as published by
++    the Free Software Foundation; either version 2 of the License, or
++    (at your option) any later version.
++
++    This program is distributed in the hope that it will be useful,
++    but WITHOUT ANY WARRANTY; without even the implied warranty of
++    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++    GNU General Public License for more details.
++
++    You should have received a copy of the GNU General Public License
++    along with this program; if not, write to the Free Software
++    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++
++
++Also add information on how to contact you by electronic and paper mail.
++
++If the program is interactive, make it output a short notice like this
++when it starts in an interactive mode:
++
++    Gnomovision version 69, Copyright (C) year  name of author
++    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
++    This is free software, and you are welcome to redistribute it
++    under certain conditions; type `show c' for details.
++
++The hypothetical commands `show w' and `show c' should show the appropriate
++parts of the General Public License.  Of course, the commands you use may
++be called something other than `show w' and `show c'; they could even be
++mouse-clicks or menu items--whatever suits your program.
++
++You should also get your employer (if you work as a programmer) or your
++school, if any, to sign a "copyright disclaimer" for the program, if
++necessary.  Here is a sample; alter the names:
++
++  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
++  `Gnomovision' (which makes passes at compilers) written by James Hacker.
++
++  <signature of Ty Coon>, 1 April 1989
++  Ty Coon, President of Vice
++
++This General Public License does not permit incorporating your program into
++proprietary programs.  If your program is a subroutine library, you may
++consider it more useful to permit linking proprietary applications with the
++library.  If this is what you want to do, use the GNU Library General
++Public License instead of this License.
+Index: drivers/net/wireless/rtl8187B/rtl8187/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/Makefile	2010-01-09 04:01:22.000000000 +0000
+@@ -0,0 +1,83 @@
++NIC_SELECT = RTL8187B
++
++#CC = mipsel-linux-gcc
++#LD = mipsel-linux-ld
++CC = gcc
++KVER  := $(shell uname -r)
++MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/$(NIC_SELECT)
++
++#EXTRA_CFLAGS += -DCONFIG_IEEE80211_NOWEP=y
++#EXTRA_CFLAGS += -DCONFIG_RTL8180_IOMAP
++EXTRA_CFLAGS += -I$(TOPDIR)/drivers/net/wireless
++EXTRA_CFLAGS += -std=gnu89
++EXTRA_CFLAGS += -O2
++#EXTRA_CFLAGS += -DJUST_FOR_87SEMESH -D_RTL8187_EXT_PATCH_
++EXTRA_CFLAGS += -DCONFIG_RTL8180_PM
++EXTRA_CFLAGS += -DJACKSON_NEW_8187 -DJACKSON_NEW_RX
++EXTRA_CFLAGS += -DTHOMAS_BEACON -DTHOMAS_TASKLET -DTHOMAS_SKB -DTHOMAS_TURBO
++EXTRA_CFLAGS += -DJOHN_IOCTL
++EXTRA_CFLAGS += -DLED
++#EXTRA_CFLAGS += -DLED_SHIN
++EXTRA_CFLAGS += -DPOLLING_METHOD_FOR_RADIO
++#EXTRA_CFLAGS += -DSW_ANTE_DIVERSITY
++EXTRA_CFLAGS += -DCPU_64BIT
++EXTRA_CFLAGS += -DCONFIG_IPS
++#CFLAGS += -DJOHN_HWSEC -DJOHN_TKIP
++#CFLAGS += -DJOHN_DUMP_TX
++#EXTRA_CFLAGS += -DJOHN_DUMP_TXPKT
++
++#Radio On/Off debug
++EXTRA_CFLAGS += -DCONFIG_RADIO_DEBUG
++
++#for dot11d
++EXTRA_CFLAGS += -DENABLE_DOT11D
++
++#for Toshiba
++#EXTRA_CFLAGS += -DENABLE_TOSHIBA_CONFIG
++
++ifneq ($(shell uname -r|cut -d. -f1,2), 2.4)
++
++r8187-objs := r8187_core.o r8180_93cx6.o r8180_wx.o r8180_rtl8225.o r8180_rtl8225z2.o r8180_pm.o r8180_dm.o r8187_led.o
++
++obj-m := r8187.o
++
++KVER  := $(shell uname -r)
++#KSRC := ~/lemote/linux_loongson
++#KSRC := /home/yh/linux-2.6.27.1-lemote
++KSRC := /lib/modules/$(KVER)/build
++PWD = $(shell pwd)
++INSTALL_PREFIX :=
++
++all: modules
++
++modules:
++	$(MAKE) -C $(KSRC) M=$(PWD) CC=$(CC) modules
++
++install: modules
++	install -p -m 644 r8187.ko $(MODDESTDIR)
++	depmod -a
++
++uninstall:
++	$(shell [ -d $(MODDESTDIR) ] && rm -fr $(MODDESTDIR))
++	depmod -a
++else
++
++WARN := -W
++INCLUDE := -isystem /lib/modules/`uname -r`/build/include
++CFLAGS := -O2 -DMODULE -D__KERNEL__ ${WARN} ${INCLUDE}
++ifdef CONFIG_SMP
++CFLAGS += -D__SMP__ -DSMP
++endif
++OBJS := ${patsubst %.c, %.o, ${wildcard *.c}}
++                                                                                
++all:r8187.o
++                                                                                
++r8187.o:${OBJS}
++	$(LD) -r $^ -o $@
++endif
++
++.PHONY:clean
++clean:
++	rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~
++	rm -fr .tmp_versions
++
+Index: drivers/net/wireless/rtl8187B/rtl8187/Module.symvers
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/Module.symvers	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,63 @@
++0x232e7944	ieee80211_wlan_frequencies	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x151d2695	free_ieee80211_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x479b6dde	DOT11D_GetMaxTxPwrInDbm	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xc53dd7f1	ieee80211_stop_queue_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x4e5dd998	ieee80211_wx_get_name_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x8df595ec	ieee80211_rx_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x8d3ae1a7	ieee80211_register_crypto_ops_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0x4e697070	ieee80211_wx_set_auth_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x64934352	ieee80211_stop_protocol	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x15492f4f	ieee80211_wx_get_scan_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xc6e93de4	Dot11d_UpdateCountryIe	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xcce477e2	ieee80211_start_scan_syncro	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x03515ca2	ieee80211_wx_set_mlme	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x5de2dafe	ieee80211_wx_get_mode	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x26dd6b95	ieee80211_wx_set_mode	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x4763bb2c	ieee80211_wx_get_rate	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x3c5c0a47	ieee80211_wx_set_rate	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xb3fab822	ToLegalChannel	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x1597093a	ieee80211_wx_get_power	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xcf8c8e5b	ieee80211_wx_set_power	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x519a245b	ieee80211_wx_set_scan	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xbba57287	ieee80211_stop_scan	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xc8b223cb	ieee80211_wx_set_freq	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xb38d92a0	ieee80211_wx_get_freq	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x4caddc4d	ieee80211_is_shortslot	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xaed2f898	ieee80211_stop_send_beacons	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xdabb7217	ieee80211_wx_get_wap	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x5421b7dd	ieee80211_wx_set_wap	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xfc642776	ieee80211_wx_set_rawtx	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x50bebeff	ieee80211_is_54g	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x1f710ea1	ieee80211_wpa_supplicant_ioctl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x9c614e79	ieee80211_network_init	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x36178d5f	Dot11d_Init	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xfa1c819d	ieee80211_ps_tx_ack	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x828e4b0a	ieee80211_wx_set_encode_ext	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x8b2c7494	ieee80211_get_beacon	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xc1be3ac8	ieee80211_ccmp_null	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt_ccmp-rtl	EXPORT_SYMBOL
++0x20ca63b0	ieee80211_crypt_deinit_handler_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0x5acae55c	ieee80211_start_scan_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x5dc9d4ee	ieee80211_start_protocol	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x531323f7	ieee80211_get_crypto_ops_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0xc06439b0	ieee80211_unregister_crypto_ops_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0xfc9b034a	ieee80211_tkip_null	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt_tkip-rtl	EXPORT_SYMBOL
++0x559863ff	DOT11D_ScanComplete	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x11ee7dd1	ieee80211_wake_queue_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x2941793c	Dot11d_Reset	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x3bc78ab4	ieee80211_crypt_deinit_entries_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0xbf341fed	ieee80211_wep_null	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt_wep-rtl	EXPORT_SYMBOL
++0x1e7b9a19	ieee80211_start_send_beacons	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xeddbbbd7	ieee80211_wx_set_gen_ie	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x02201f1b	notify_wx_assoc_event	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x617c9b66	ieee80211_txb_free	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xaab527ae	ieee80211_rx_mgt	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xfb335b34	alloc_ieee80211_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x016916fc	ieee80211_softmac_stop_protocol	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x6cc2a054	ieee80211_softmac_start_protocol	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xaf6b77ee	ieee80211_crypt_delayed_deinit_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211_crypt-rtl	EXPORT_SYMBOL
++0x9407d12a	ieee80211_wx_get_encode_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x2b7f6051	ieee80211_wx_set_encode_rtl	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x52db06c7	ieee80211_wx_set_essid	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x88c081a6	ieee80211_wx_get_essid	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0x0b883265	ieee80211_reset_queue	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
++0xfbe2aaf6	IsLegalChannel	/home/lzm/87b/rtl8187B_linux_26.1051.0113.2009.0907/ieee80211/ieee80211-rtl	EXPORT_SYMBOL
+Index: drivers/net/wireless/rtl8187B/rtl8187/msh_class.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/msh_class.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,117 @@
++/*!	\file	msh_class.h

++	\brief	msh CLASS extension

++

++	\date 2007/5/2 

++	\author	Stanley Chang <chagnsl@cs.nctu.edu.tw>

++*/

++

++#ifndef _MESH_CLASS_HDR_H_

++#define _MESH_CLASS_HDR_H_

++

++#include <linux/if_ether.h> /* ETH_ALEN */

++#include <linux/kernel.h>   /* ARRAY_SIZE */

++#include <linux/version.h>

++#include <linux/jiffies.h>

++#include <linux/timer.h>

++#include <linux/sched.h>

++

++#include "ieee80211.h" // for struct ieee80211-xxxx

++#include "r8187.h" // for struct r8180-priv

++

++#define MAC_TABLE_SIZE	8

++

++struct mshclass {

++	struct r8180_priv *	p8187;

++	

++	// callback functions

++	// ieee80211_softmac.c

++	int (*ext_patch_ieee80211_start_protocol) (struct ieee80211_device *ieee); // start special mode

++

++	short (*ext_patch_ieee80211_probe_req_1) (struct ieee80211_device *ieee); // return = 0: no more phases,  >0: another phase

++	u8* (*ext_patch_ieee80211_probe_req_2) (struct ieee80211_device *ieee, struct sk_buff *skb, u8 *tag); // return tag	

++

++	void (*ext_patch_ieee80211_association_req_1) (struct ieee80211_assoc_request_frame *hdr);

++	u8* (*ext_patch_ieee80211_association_req_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, struct sk_buff *skb);

++	

++	int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_req) (struct ieee80211_device *ieee, struct sk_buff *skb);

++	int (*ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp) (struct ieee80211_device *ieee, struct sk_buff *skb);

++	

++	void (*ext_patch_ieee80211_stop_protocol) (struct ieee80211_device *ieee); // stop timer

++	

++	void (*ext_patch_ieee80211_assoc_resp_by_net_1) (struct ieee80211_assoc_response_frame *assoc);

++	u8* (*ext_patch_ieee80211_assoc_resp_by_net_2) (struct ieee80211_device *ieee, struct ieee80211_network *pstat, int pkt_type, struct sk_buff *skb);

++	

++	int (*ext_patch_ieee80211_ext_stop_scan_wq_set_channel) (struct ieee80211_device *ieee);

++	

++	struct sk_buff* (*ext_patch_get_beacon_get_probersp)(struct ieee80211_device *ieee, u8 *dest, struct ieee80211_network *net);

++	

++	int (*ext_patch_ieee80211_softmac_xmit_get_rate) (struct ieee80211_device *ieee, struct sk_buff *skb);

++	int (*ext_patch_ieee80211_rx_frame_softmac_on_auth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);

++	int (*ext_patch_ieee80211_rx_frame_softmac_on_deauth)(struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);

++//by amy for mesh

++	void (*ext_patch_ieee80211_start_mesh)(struct ieee80211_device *ieee);

++//by amy for mesh	

++	/// r8180_wx.c

++	int (*ext_patch_r8180_wx_get_meshinfo) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	int (*ext_patch_r8180_wx_enable_mesh) (struct net_device *dev);

++	int (*ext_patch_r8180_wx_disable_mesh) (struct net_device *dev);

++	int (*ext_patch_r8180_wx_set_meshID) ( struct net_device *dev, char *ext);

++//by amy for mesh

++	int (*ext_patch_r8180_wx_set_mesh_chan)(struct net_device *dev, unsigned char channel);

++//by amy for mesh

++	void (*ext_patch_r8180_wx_set_channel) (struct ieee80211_device *ieee, int ch);

++		

++	int (*ext_patch_r8180_wx_set_add_mac_allow) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	int (*ext_patch_r8180_wx_set_del_mac_allow) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	int (*ext_patch_r8180_wx_set_add_mac_deny) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	int (*ext_patch_r8180_wx_set_del_mac_deny) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	int (*ext_patch_r8180_wx_get_mac_allow) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	int (*ext_patch_r8180_wx_get_mac_deny) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	

++	int (*ext_patch_r8180_wx_get_mesh_list) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	int (*ext_patch_r8180_wx_mesh_scan) (struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);

++	int (*ext_patch_r8180_wx_get_selected_mesh)(struct net_device *dev, int en, char *cho, char* id);

++//by amy for networkmanager UI

++	int (*ext_patch_r8180_wx_get_selected_mesh_channel)(struct net_device *dev, char* extmeshid, char *cho);

++//by amy for networkmanager UI

++	/// r8187_core.c

++	u8 (*ext_patch_rtl8180_up) (struct mshclass *priv);

++

++	// ieee80211_rx.c

++	unsigned int (*ext_patch_ieee80211_process_probe_response_1)  (	struct ieee80211_device *ieee,	struct ieee80211_probe_response *beacon,	struct ieee80211_rx_stats *stats);

++	void (*ext_patch_ieee80211_rx_mgt_on_probe_req) ( struct ieee80211_device *ieee, struct ieee80211_probe_request *beacon, struct ieee80211_rx_stats *stats);

++	

++	void (*ext_patch_ieee80211_rx_mgt_update_expire) ( struct ieee80211_device *ieee, struct sk_buff *skb);

++	

++	int (*ext_patch_ieee80211_rx_on_rx) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats, u16 type, u16 stype);

++	

++	int (*ext_patch_ieee80211_rx_frame_get_hdrlen) (struct ieee80211_device *ieee, struct sk_buff *skb);

++	

++	int (*ext_patch_ieee80211_rx_is_valid_framectl) (struct ieee80211_device *ieee, u16 fc, u16 type, u16 stype);

++	

++	// return > 0 is success.  0 when failed

++	int (*ext_patch_ieee80211_rx_process_dataframe) (struct ieee80211_device *ieee, struct sk_buff *skb, struct ieee80211_rx_stats *rx_stats);

++	

++	int (*ext_patch_is_duplicate_packet) (struct ieee80211_device *ieee, struct ieee80211_hdr *header, u16 type, u16 stype);

++	/* added by david for setting acl dynamically */

++	u8 (*ext_patch_ieee80211_acl_query) (struct ieee80211_device *ieee, u8 *sa);

++	

++	// r8187_core.c

++	int (*ext_patch_rtl8180_ioctl) (struct net_device *dev, struct ifreq *rq, int cmd);

++	void (*ext_patch_create_proc) (struct r8180_priv *priv);

++	void (*ext_patch_remove_proc) (struct r8180_priv *priv);

++	

++	// ieee80211_tx.c

++	

++	// locked by ieee->lock. Call ieee80211_softmac_xmit afterward

++	struct ieee80211_txb* (*ext_patch_ieee80211_xmit) (struct sk_buff *skb, struct net_device *dev);

++	

++	// DO NOT MODIFY ANY STRUCTURE BELOW THIS LINE	

++	u8					priv[0]; // mshclass_priv;

++};

++

++extern void free_mshobj(struct mshclass **pObj);

++extern struct mshclass *alloc_mshobj(struct r8180_priv *caller_priv);

++

++

++#endif // _MESH_CLASS_HDR_H_

+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_93cx6.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_93cx6.c	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,146 @@
++/* 
++   This files contains card eeprom (93c46 or 93c56) programming routines,
++   memory is addressed by 16 bits words.
++
++   This is part of rtl8180 OpenSource driver.
++   Copyright (C) Andrea Merello 2004  <andreamrl@tiscali.it> 
++   Released under the terms of GPL (General Public Licence)
++   
++   Parts of this driver are based on the GPL part of the 
++   official realtek driver.
++   
++   Parts of this driver are based on the rtl8180 driver skeleton 
++   from Patric Schenke & Andres Salomon.
++
++   Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
++   
++   We want to tanks the Authors of those projects and the Ndiswrapper 
++   project Authors.
++*/
++
++#include "r8180_93cx6.h"
++
++void eprom_cs(struct net_device *dev, short bit)
++{
++	if(bit)
++		write_nic_byte(dev, EPROM_CMD,
++			       (1<<EPROM_CS_SHIFT) | \
++			       read_nic_byte(dev, EPROM_CMD)); //enable EPROM
++	else
++		write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
++			       &~(1<<EPROM_CS_SHIFT)); //disable EPROM
++
++	force_pci_posting(dev);
++	udelay(EPROM_DELAY);
++}
++
++
++void eprom_ck_cycle(struct net_device *dev)
++{
++	write_nic_byte(dev, EPROM_CMD,
++		       (1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD)); 
++	force_pci_posting(dev);
++	udelay(EPROM_DELAY);
++	write_nic_byte(dev, EPROM_CMD, 
++		       read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT)); 
++	force_pci_posting(dev);
++	udelay(EPROM_DELAY);
++}
++
++
++void eprom_w(struct net_device *dev,short bit)
++{
++	if(bit)
++		write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
++			       read_nic_byte(dev,EPROM_CMD)); 
++	else
++		write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\
++			       &~(1<<EPROM_W_SHIFT)); 
++
++	force_pci_posting(dev);
++	udelay(EPROM_DELAY);
++}
++
++
++short eprom_r(struct net_device *dev)
++{
++	short bit;
++
++	bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
++	udelay(EPROM_DELAY);
++
++	if(bit) return 1;
++	return 0;
++}
++
++
++void eprom_send_bits_string(struct net_device *dev, short b[], int len)
++{
++	int i;
++	
++	for(i=0; i<len; i++){
++		eprom_w(dev, b[i]);
++		eprom_ck_cycle(dev);
++	}
++}
++
++
++u32 eprom_read(struct net_device *dev, u32 addr)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	short read_cmd[]={1,1,0};
++	short addr_str[8];
++	int i;
++	int addr_len;
++	u32 ret;
++
++	ret=0;
++        //enable EPROM programming
++	write_nic_byte(dev, EPROM_CMD,
++		       (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT)); 
++	force_pci_posting(dev);
++	udelay(EPROM_DELAY);
++	
++	if (priv->epromtype==EPROM_93c56){
++		addr_str[7]=addr & 1;
++		addr_str[6]=addr & (1<<1);
++		addr_str[5]=addr & (1<<2);
++		addr_str[4]=addr & (1<<3);
++		addr_str[3]=addr & (1<<4);
++		addr_str[2]=addr & (1<<5);
++		addr_str[1]=addr & (1<<6);
++		addr_str[0]=addr & (1<<7);
++		addr_len=8;
++	}else{
++		addr_str[5]=addr & 1;
++		addr_str[4]=addr & (1<<1);
++		addr_str[3]=addr & (1<<2);
++		addr_str[2]=addr & (1<<3);
++		addr_str[1]=addr & (1<<4);
++		addr_str[0]=addr & (1<<5);
++		addr_len=6;
++	}
++	eprom_cs(dev, 1);
++	eprom_ck_cycle(dev);
++	eprom_send_bits_string(dev, read_cmd, 3);
++	eprom_send_bits_string(dev, addr_str, addr_len);
++
++	//keep chip pin D to low state while reading.
++	//I'm unsure if it is necessary, but anyway shouldn't hurt
++	eprom_w(dev, 0); 
++	
++	for(i=0;i<16;i++){	
++		//eeprom needs a clk cycle between writing opcode&adr 
++		//and reading data. (eeprom outs a dummy 0)
++		eprom_ck_cycle(dev);
++		ret |= (eprom_r(dev)<<(15-i));
++	}
++	
++	eprom_cs(dev, 0);
++	eprom_ck_cycle(dev);
++
++	//disable EPROM programming
++	write_nic_byte(dev, EPROM_CMD,
++		       (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT)); 
++	return ret;
++}
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_93cx6.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_93cx6.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,46 @@
++/* 
++	This is part of rtl8187 OpenSource driver
++	Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it> 
++	Released under the terms of GPL (General Public Licence)
++	
++	Parts of this driver are based on the GPL part of the official realtek driver
++	Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
++	Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
++	
++	We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
++*/
++
++/*This files contains card eeprom (93c46 or 93c56) programming routines*/
++/*memory is addressed by WORDS*/
++
++#include "r8187.h"
++#include "r8180_hw.h"
++
++#define EPROM_DELAY 10
++
++#define EPROM_ANAPARAM_ADDRLWORD 	0xd 
++#define EPROM_ANAPARAM_ADDRHWORD 	0xe 
++
++#define EPROM_CHANNEL_PLAN		0x3 //0x6>>1
++//0x77 BIT[0]0:use gpio 1 bit 1, 1:use gpio 1 bit 2.
++#define EPROM_SELECT_GPIO               (0x77 >> 1)
++//#define EEPROM_COUNTRY_CODE	0x2E//87se channel plan is here
++
++#define EPROM_RFCHIPID 			0x6
++#define EPROM_TXPW_BASE 		0x05
++#define EPROM_RFCHIPID_RTL8225U 	5 
++#define EPROM_RFCHIPID_RTL8225U_VF 	6 
++#define EPROM_RF_PARAM 			0x4
++#define EPROM_CONFIG2 			0xc
++
++#define EPROM_VERSION 			0x1E
++#define MAC_ADR 			0x7
++
++#define CIS 				0x18 
++
++#define EPROM_TXPW0 			0x16 
++#define EPROM_TXPW2 			0x1b
++#define EPROM_TXPW1 			0x3d
++
++
++u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_dm.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_dm.c	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,882 @@
++/*++
++Copyright (c) Realtek Semiconductor Corp. All rights reserved.
++
++Module Name:
++ 	r8180_dig.c
++	
++Abstract:
++ 	Hardware dynamic mechanism for RTL8187B
++ 	    
++Major Change History:
++	When        	Who      	What
++	----------    ---------------   -------------------------------
++	2006-11-15     david		Created
++
++Notes:	
++	This file is ported from RTL8187B Windows driver.
++	
++ 	
++--*/
++#include "r8180_dm.h"
++#include "r8180_hw.h"
++#include "r8180_rtl8225.h"
++
++//================================================================================
++//	Local Constant.
++//================================================================================
++#define Z1_HIPWR_UPPER_TH			99
++#define Z1_HIPWR_LOWER_TH			70	
++#define Z2_HIPWR_UPPER_TH			99
++#define Z2_HIPWR_LOWER_TH			90
++
++bool CheckDig(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++
++	if(ieee->state != IEEE80211_LINKED)
++		return false;
++
++	if(priv->card_8187 == NIC_8187B) {
++		//
++		// We need to schedule dig workitem on either of the below mechanisms.
++		// By Bruce, 2007-06-01.
++		//
++		if(!priv->bDigMechanism && !priv->bCCKThMechanism)
++			return false;
++
++		if(priv->CurrentOperaRate < 36) // Schedule Dig under all OFDM rates. By Bruce, 2007-06-01.
++			return false;
++	} else { 
++		if(!priv->bDigMechanism)
++			return false;
++
++		if(priv->CurrentOperaRate < 48)
++			return false;
++	}
++	return true;
++}
++
++
++//
++//	Description:
++//		Implementation of DIG for Zebra and Zebra2.	
++//
++void DIG_Zebra(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	//PHAL_DATA_8187	pHalData = GetHalData8187(Adapter);
++	u16			CCKFalseAlarm, OFDMFalseAlarm;
++	u16			OfdmFA1, OfdmFA2;
++	int			InitialGainStep = 7; // The number of initial gain stages.
++	int			LowestGainStage = 4; // The capable lowest stage of performing dig workitem.
++
++//	printk("---------> DIG_Zebra()\n");
++
++	//Read only 1 byte because of HW bug. This is a temporal modification. Joseph
++	// Modify by Isaiah 2006-06-27
++	if(priv->card_8187_Bversion == VERSION_8187B_B)
++	{
++		CCKFalseAlarm = 0;
++		OFDMFalseAlarm = (u16)(priv->FalseAlarmRegValue);
++		OfdmFA1 =  0x01;
++		OfdmFA2 = priv->RegDigOfdmFaUpTh; 
++	}
++	else
++	{
++		CCKFalseAlarm = (u16)(priv->FalseAlarmRegValue & 0x0000ffff);
++		OFDMFalseAlarm = (u16)((priv->FalseAlarmRegValue >> 16) & 0x0000ffff);
++		OfdmFA1 =  0x15;
++		//OfdmFA2 =  0xC00;
++		OfdmFA2 = ((u16)(priv->RegDigOfdmFaUpTh)) << 8;
++	}	
++
++//	printk("DIG**********CCK False Alarm: %#X \n",CCKFalseAlarm);
++//	printk("DIG**********OFDM False Alarm: %#X \n",OFDMFalseAlarm);
++
++
++
++	// The number of initial gain steps is different, by Bruce, 2007-04-13.
++	if(priv->card_8187 == NIC_8187) {
++		if (priv->InitialGain == 0 ) //autoDIG
++		{
++			switch( priv->rf_chip)
++			{
++				case RF_ZEBRA:
++					priv->InitialGain = 5; // m74dBm;
++					break;
++				case RF_ZEBRA2:
++					priv->InitialGain = 4; // m78dBm;
++					break;
++				default:
++					priv->InitialGain = 5; // m74dBm;
++					break;
++			}
++		}
++		InitialGainStep = 7;
++		if(priv->InitialGain > 7)
++			priv->InitialGain = 5;
++		LowestGainStage = 4;
++	} else {
++		if (priv->InitialGain == 0 ) //autoDIG
++		{ // Advised from SD3 DZ, by Bruce, 2007-06-05.
++			priv->InitialGain = 4; // In 87B, m74dBm means State 4 (m82dBm)
++		}
++		if(priv->card_8187_Bversion != VERSION_8187B_B)
++		{ // Advised from SD3 DZ, by Bruce, 2007-06-05.
++			OfdmFA1 =  0x20;
++		}
++		InitialGainStep = 8;
++		LowestGainStage = priv->RegBModeGainStage; // Lowest gain stage.
++	}
++
++	if (OFDMFalseAlarm > OfdmFA1)
++	{
++		if (OFDMFalseAlarm > OfdmFA2)
++		{
++			priv->DIG_NumberFallbackVote++;
++			if (priv->DIG_NumberFallbackVote >1)
++			{
++				//serious OFDM  False Alarm, need fallback
++				// By Bruce, 2007-03-29.
++				// if (pHalData->InitialGain < 7) // In 87B, m66dBm means State 7 (m74dBm)
++				if (priv->InitialGain < InitialGainStep)
++				{
++					priv->InitialGain = (priv->InitialGain + 1);
++					//printk("DIG**********OFDM False Alarm: %#X,  OfdmFA1: %#X, OfdmFA2: %#X\n", OFDMFalseAlarm, OfdmFA1, OfdmFA2);
++					//printk("DIG+++++++ fallback OFDM:%d \n", priv->InitialGain);
++					UpdateInitialGain(dev); // 2005.01.06, by rcnjko.
++				}
++				priv->DIG_NumberFallbackVote = 0;
++				priv->DIG_NumberUpgradeVote=0;
++			}
++		}
++		else
++		{
++			if (priv->DIG_NumberFallbackVote)
++				priv->DIG_NumberFallbackVote--;
++		}
++		priv->DIG_NumberUpgradeVote=0;		
++	}
++	else	//OFDM False Alarm < 0x15
++	{
++		if (priv->DIG_NumberFallbackVote)
++			priv->DIG_NumberFallbackVote--;
++		priv->DIG_NumberUpgradeVote++;
++
++		if (priv->DIG_NumberUpgradeVote>9)
++		{
++			if (priv->InitialGain > LowestGainStage) // In 87B, m78dBm means State 4 (m864dBm)
++			{
++				priv->InitialGain = (priv->InitialGain - 1);
++				//printk("DIG**********OFDM False Alarm: %#X,  OfdmFA1: %#X, OfdmFA2: %#X\n", OFDMFalseAlarm, OfdmFA1, OfdmFA2);
++				//printk("DIG--------- Upgrade OFDM:%d \n", priv->InitialGain);
++				UpdateInitialGain(dev); // 2005.01.06, by rcnjko.
++			}
++			priv->DIG_NumberFallbackVote = 0;
++			priv->DIG_NumberUpgradeVote=0;
++		}
++	}
++
++//	printk("DIG+++++++ OFDM:%d\n", priv->InitialGain);	
++//	printk("<--------- DIG_Zebra()\n");
++}
++
++//
++//	Description:
++//		Dispatch DIG implementation according to RF. 	
++//
++void DynamicInitGain(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++
++	switch(priv->rf_chip)
++	{
++		case RF_ZEBRA:
++		case RF_ZEBRA2:  // [AnnieWorkaround] For Zebra2, 2005-08-01.
++		//case RF_ZEBRA4:
++			DIG_Zebra(dev);
++			break;
++		
++		default:
++			printk("DynamicInitGain(): unknown RFChipID(%d) !!!\n", priv->rf_chip);
++			break;
++	}
++}
++
++// By Bruce, 2007-03-29.
++//
++//	Description:
++//		Dispatch CCK Power Detection implementation according to RF.	
++//
++void DynamicCCKThreshold(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	u16			CCK_Up_Th;
++	u16			CCK_Lw_Th;
++	u16			CCKFalseAlarm;
++
++	printk("=====>DynamicCCKThreshold()\n");
++
++	CCK_Up_Th = priv->CCKUpperTh;
++	CCK_Lw_Th = priv->CCKLowerTh;	
++	CCKFalseAlarm = (u16)((priv->FalseAlarmRegValue & 0x0000ffff) >> 8); // We only care about the higher byte.	
++	printk("DynamicCCKThreshold(): CCK Upper Threshold: 0x%02X, Lower Threshold: 0x%02X, CCKFalseAlarmHighByte: 0x%02X\n", CCK_Up_Th, CCK_Lw_Th, CCKFalseAlarm);
++
++	if(priv->StageCCKTh < 3 && CCKFalseAlarm >= CCK_Up_Th)
++	{
++		priv->StageCCKTh ++;
++		UpdateCCKThreshold(dev);
++	}
++	else if(priv->StageCCKTh > 0 && CCKFalseAlarm <= CCK_Lw_Th)
++	{
++		priv->StageCCKTh --;
++		UpdateCCKThreshold(dev);
++	}
++	
++	printk("<=====DynamicCCKThreshold()\n");
++}
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void rtl8180_hw_dig_wq (struct work_struct *work)
++{
++        struct delayed_work *dwork = container_of(work,struct delayed_work,work);
++        struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_dig_wq);
++        struct net_device *dev = ieee->dev;
++#else
++void rtl8180_hw_dig_wq(struct net_device *dev)
++{
++	// struct r8180_priv *priv = ieee80211_priv(dev);
++#endif
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	// Read CCK and OFDM False Alarm.
++	if(priv->card_8187_Bversion == VERSION_8187B_B) {
++		// Read only 1 byte because of HW bug. This is a temporal modification. Joseph
++		// Modify by Isaiah 2006-06-27
++		priv->FalseAlarmRegValue = (u32)read_nic_byte(dev, (OFDM_FALSE_ALARM+1));
++	} else {
++		priv->FalseAlarmRegValue = read_nic_dword(dev, CCK_FALSE_ALARM);
++	}
++
++	// Adjust Initial Gain dynamically.
++	if(priv->bDigMechanism) {
++		DynamicInitGain(dev);
++	}
++
++	//
++	// Move from DynamicInitGain to be independent of the OFDM DIG mechanism, by Bruce, 2007-06-01.
++	//
++	if(priv->card_8187 == NIC_8187B) {
++		// By Bruce, 2007-03-29.
++		// Dynamically update CCK Power Detection Threshold.
++		if(priv->bCCKThMechanism)
++		{
++			DynamicCCKThreshold(dev);
++		}
++	}
++}
++
++void SetTxPowerLevel8187(struct net_device *dev, short chan)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	switch(priv->rf_chip)
++	{
++	case  RF_ZEBRA:
++		rtl8225_SetTXPowerLevel(dev,chan);
++		break;
++
++	case RF_ZEBRA2:
++	//case RF_ZEBRA4:
++		rtl8225z2_SetTXPowerLevel(dev,chan);
++		break;
++	}
++}
++
++//
++//	Description:
++//		Check if input power signal strength exceeds maximum input power threshold 
++//		of current HW. 
++//		If yes, we set our HW to high input power state:
++//			RX: always force TR switch to SW Tx mode to reduce input power. 
++//			TX: turn off smaller Tx output power (see RtUsbCheckForHang).
++//
++//		If no, we restore our HW to normal input power state:
++///			RX: restore TR switch to HW controled mode.
++//			TX: restore TX output power (see RtUsbCheckForHang).
++//
++//	TODO: 
++//		1. Tx power control shall not be done in Platform-dependent timer (e.g. RtUsbCheckForHang). 
++//		2. Allow these threshold adjustable by RF SD.
++//
++void DoRxHighPower(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	TR_SWITCH_STATE TrSwState;
++	u16		HiPwrUpperTh = 0;
++	u16		HiPwrLowerTh = 0;
++	u16		RSSIHiPwrUpperTh = 0;
++	u16		RSSIHiPwrLowerTh = 0;	
++
++	//87S remove TrSwitch mechanism
++	if((priv->card_8187 == NIC_8187B)||(priv->card_8187 == NIC_8187)) {
++
++		//printk("----> DoRxHighPower()\n");
++
++		//
++		// Get current TR switch setting.
++		//
++		//Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_TR_SWITCH, (pu1Byte)(&TrSwState));
++		TrSwState = priv->TrSwitchState;
++
++		//
++		// Determine threshold according to RF type.
++		//
++		switch(priv->rf_chip)
++		{
++			case RF_ZEBRA:
++				HiPwrUpperTh = Z1_HIPWR_UPPER_TH;
++				HiPwrLowerTh = Z1_HIPWR_LOWER_TH;
++				printk("DoRxHighPower(): RF_ZEBRA, Upper Threshold: %d LOWER Threshold: %d\n", 
++						HiPwrUpperTh, HiPwrLowerTh);
++				break;	
++
++			case RF_ZEBRA2:
++				if((priv->card_8187 == NIC_8187)) {
++					HiPwrUpperTh = Z2_HIPWR_UPPER_TH;
++					HiPwrLowerTh = Z2_HIPWR_LOWER_TH;
++				} else {
++					// By Bruce, 2007-04-11.
++					// HiPwrUpperTh = Z2_HIPWR_UPPER_TH;
++					// HiPwrLowerTh = Z2_HIPWR_LOWER_TH;
++
++					HiPwrUpperTh = priv->Z2HiPwrUpperTh;
++					HiPwrLowerTh = priv->Z2HiPwrLowerTh;
++					HiPwrUpperTh = HiPwrUpperTh * 10;
++					HiPwrLowerTh = HiPwrLowerTh * 10;
++
++					RSSIHiPwrUpperTh = priv->Z2RSSIHiPwrUpperTh;
++					RSSIHiPwrLowerTh = priv->Z2RSSIHiPwrLowerTh;
++					//printk("DoRxHighPower(): RF_ZEBRA2, Upper Threshold: %d LOWER Threshold: %d, RSSI Upper Th: %d, RSSI Lower Th: %d\n",HiPwrUpperTh, HiPwrLowerTh, RSSIHiPwrUpperTh, RSSIHiPwrLowerTh);
++				}
++				break;	
++
++			default:
++				printk("DoRxHighPower(): Unknown RFChipID(%d), UndecoratedSmoothedSS(%d), TrSwState(%d)!!!\n", 
++						priv->rf_chip, priv->UndecoratedSmoothedSS, TrSwState);
++				return;
++				break;	
++		}
++
++		/*printk(">>>>>>>>>>Set TR switch to software control, UndecoratedSmoothedSS:%d, CurCCKRSSI = %d\n",\
++					priv->UndecoratedSmoothedSS, priv->CurCCKRSSI);
++	*/
++		if((priv->card_8187 == NIC_8187)) {
++			//
++			// Perform Rx part High Power Mechanism by UndecoratedSmoothedSS.
++			//
++			if (priv->UndecoratedSmoothedSS > HiPwrUpperTh)
++			{ //  High input power state.
++				if( priv->TrSwitchState == TR_HW_CONTROLLED )	
++				{
++				/*	printk(">>>>>>>>>>Set TR switch to software control, UndecoratedSmoothedSS:%d \n", \
++							priv->UndecoratedSmoothedSS);
++				//	printk(">>>>>>>>>> TR_SW_TX\n");
++				*/
++					write_nic_byte(dev, RFPinsSelect, 
++							(u8)(priv->wMacRegRfPinsSelect | TR_SW_MASK_8187 ));
++					write_nic_byte(dev, RFPinsOutput, 
++						(u8)((priv->wMacRegRfPinsOutput&(~TR_SW_MASK_8187))|TR_SW_MASK_TX_8187));
++					priv->TrSwitchState = TR_SW_TX;
++					priv->bToUpdateTxPwr = true;
++				}
++			}
++			else if (priv->UndecoratedSmoothedSS < HiPwrLowerTh)
++			{ // Normal input power state. 
++				if( priv->TrSwitchState == TR_SW_TX)	
++				{
++				/*	printk("<<<<<<<<<<<Set TR switch to hardware control UndecoratedSmoothedSS:%d \n", \
++							priv->UndecoratedSmoothedSS);
++				//	printk("<<<<<<<<<< TR_HW_CONTROLLED\n");
++				*/
++					write_nic_byte(dev, RFPinsOutput, (u8)(priv->wMacRegRfPinsOutput));
++					write_nic_byte(dev, RFPinsSelect, (u8)(priv->wMacRegRfPinsSelect));
++					priv->TrSwitchState = TR_HW_CONTROLLED;
++					priv->bToUpdateTxPwr = true;
++				}
++			}
++		}else {
++			/*printk("=====>TrSwState = %s\n", (TrSwState==TR_HW_CONTROLLED)?"TR_HW_CONTROLLED":"TR_SW_TX");
++			//printk("UndecoratedSmoothedSS:%d, CurCCKRSSI = %d\n",priv->UndecoratedSmoothedSS, priv->CurCCKRSSI); */
++			// Asked by SD3 DZ, by Bruce, 2007-04-12.
++			if(TrSwState == TR_HW_CONTROLLED)
++			{
++				if((priv->UndecoratedSmoothedSS > HiPwrUpperTh) ||
++						(priv->bCurCCKPkt && (priv->CurCCKRSSI > RSSIHiPwrUpperTh)))
++				{
++					//printk("===============================> high power!\n");
++					write_nic_byte(dev, RFPinsSelect, (u8)(priv->wMacRegRfPinsSelect|TR_SW_MASK_8187 ));
++					write_nic_byte(dev, RFPinsOutput, 
++						(u8)((priv->wMacRegRfPinsOutput&(~TR_SW_MASK_8187))|TR_SW_MASK_TX_8187));
++					priv->TrSwitchState = TR_SW_TX;
++					priv->bToUpdateTxPwr = true;
++				}
++			}
++			else
++			{
++				if((priv->UndecoratedSmoothedSS < HiPwrLowerTh) &&
++						(!priv->bCurCCKPkt || priv->CurCCKRSSI < RSSIHiPwrLowerTh))
++				{
++					write_nic_byte(dev, RFPinsOutput, (u8)(priv->wMacRegRfPinsOutput));
++					write_nic_byte(dev, RFPinsSelect, (u8)(priv->wMacRegRfPinsSelect));
++					priv->TrSwitchState = TR_HW_CONTROLLED;
++					priv->bToUpdateTxPwr = true;
++				}
++			}
++			//printk("<=======TrSwState = %s\n", (TrSwState==TR_HW_CONTROLLED)?"TR_HW_CONTROLLED":"TR_SW_TX");
++		}
++		//printk("<---- DoRxHighPower()\n");
++	}
++}
++
++
++//
++//	Description:
++//		Callback function of UpdateTxPowerWorkItem.
++//		Because of some event happend, e.g. CCX TPC, High Power Mechanism, 
++//		We update Tx power of current channel again. 
++//
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void rtl8180_tx_pw_wq (struct work_struct *work)
++{
++        struct delayed_work *dwork = container_of(work,struct delayed_work,work);
++        struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,tx_pw_wq);
++        struct net_device *dev = ieee->dev;
++#else
++void rtl8180_tx_pw_wq(struct net_device *dev)
++{
++	// struct r8180_priv *priv = ieee80211_priv(dev);
++#endif
++
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	//printk("----> UpdateTxPowerWorkItemCallback()\n");
++	
++	if(priv->bToUpdateTxPwr)
++	{
++		//printk("DoTxHighPower(): schedule UpdateTxPowerWorkItem......\n");
++		priv->bToUpdateTxPwr = false;
++		SetTxPowerLevel8187(dev, priv->chan);
++	}
++	
++	DoRxHighPower(dev);	
++	//printk("<---- UpdateTxPowerWorkItemCallback()\n");
++}
++
++//
++//	Description:
++//		Return TRUE if we shall perform High Power Mecahnism, FALSE otherwise.	
++//
++bool CheckHighPower(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++
++	if(!priv->bRegHighPowerMechanism)
++	{
++		return false;
++	}
++		
++	if((ieee->state == IEEE80211_LINKED_SCANNING)||(ieee->state == IEEE80211_MESH_SCANNING))
++	{
++		return false;
++	}
++
++	return true;
++}
++
++#ifdef SW_ANTE_DIVERSITY
++
++#define ANTENNA_DIVERSITY_TIMER_PERIOD          1000 // 1000 m
++
++void
++SwAntennaDiversityRxOk8185(
++	struct net_device *dev, 
++	u8 SignalStrength
++	)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++
++	//printk("+SwAntennaDiversityRxOk8185: RxSs: %d\n", SignalStrength);
++
++	priv->AdRxOkCnt++;
++
++	if( priv->AdRxSignalStrength != -1)
++	{
++		priv->AdRxSignalStrength = ((priv->AdRxSignalStrength*7) + (SignalStrength*3)) / 10;
++	}
++	else
++	{ // Initialization case.
++		priv->AdRxSignalStrength = SignalStrength;
++	}
++        
++        //printk("====>pkt rcvd by %d\n", priv->LastRxPktAntenna);
++	if( priv->LastRxPktAntenna ) //Main antenna.	
++		priv->AdMainAntennaRxOkCnt++;	
++	else	 // Aux antenna.
++		priv->AdAuxAntennaRxOkCnt++;
++	//printk("-SwAntennaDiversityRxOk8185: AdRxOkCnt: %d AdRxSignalStrength: %d\n", priv->AdRxOkCnt, priv->AdRxSignalStrength);
++}
++
++//
++//	Description: Change Antenna Switch.
++//
++bool
++SetAntenna8185(
++	struct net_device *dev,
++	u8		u1bAntennaIndex
++	)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	bool bAntennaSwitched = false;
++
++//	printk("+SetAntenna8185(): Antenna is switching to: %d \n", u1bAntennaIndex);
++
++	switch(u1bAntennaIndex)
++	{
++	case 0://main antenna
++		switch(priv->rf_chip)
++		{
++		case RF_ZEBRA:
++		case RF_ZEBRA2:
++		//case RF_ZEBRA4:
++			// Tx Antenna.
++			write_nic_byte(dev, ANTSEL, 0x03); // Config TX antenna.
++			
++			//PlatformEFIOWrite4Byte(Adapter, BBAddr, 0x01009b90); // Config CCK RX antenna.
++			//PlatformEFIOWrite4Byte(Adapter, BBAddr, 0x5c8D); // Config OFDM RX antenna.
++			
++			// Rx CCK .
++			write_nic_byte(dev, 0x7f, ((0x01009b90 & 0xff000000) >> 24)); 
++			write_nic_byte(dev, 0x7e, ((0x01009b90 & 0x00ff0000) >> 16)); 
++			write_nic_byte(dev, 0x7d, ((0x01009b90 & 0x0000ff00) >> 8)); 
++			write_nic_byte(dev, 0x7c, ((0x01009b90 & 0x000000ff) >> 0)); 
++
++			// Rx OFDM.
++			write_nic_byte(dev, 0x7f, ((0x00005c8D & 0xff000000) >> 24)); 
++			write_nic_byte(dev, 0x7e, ((0x00005c8D & 0x00ff0000) >> 16)); 
++			write_nic_byte(dev, 0x7d, ((0x00005c8D & 0x0000ff00) >> 8)); 
++			write_nic_byte(dev, 0x7c, ((0x00005c8D & 0x000000ff) >> 0)); 
++
++                        bAntennaSwitched = true;
++			break;
++
++		default:
++			printk("SetAntenna8185: unkown RFChipID(%d)\n", priv->rf_chip);
++			break;
++		}
++		break;
++
++	case 1:
++		switch(priv->rf_chip)
++		{
++		case RF_ZEBRA:
++		case RF_ZEBRA2:
++		//case RF_ZEBRA4:
++			// Tx Antenna.
++			write_nic_byte(dev, ANTSEL, 0x00); // Config TX antenna.
++			
++			//PlatformEFIOWrite4Byte(Adapter, BBAddr, 0x0100bb90); // Config CCK RX antenna.
++			//PlatformEFIOWrite4Byte(Adapter, BBAddr, 0x548D); // Config OFDM RX antenna.
++			
++			// Rx CCK.
++			write_nic_byte(dev, 0x7f, ((0x0100bb90 & 0xff000000) >> 24)); 
++			write_nic_byte(dev, 0x7e, ((0x0100bb90 & 0x00ff0000) >> 16)); 
++			write_nic_byte(dev, 0x7d, ((0x0100bb90 & 0x0000ff00) >> 8)); 
++			write_nic_byte(dev, 0x7c, ((0x0100bb90 & 0x000000ff) >> 0)); 
++
++			// Rx OFDM.
++			write_nic_byte(dev, 0x7f, ((0x0000548D & 0xff000000) >> 24)); 
++			write_nic_byte(dev, 0x7e, ((0x0000548D & 0x00ff0000) >> 16)); 
++			write_nic_byte(dev, 0x7d, ((0x0000548D & 0x0000ff00) >> 8)); 
++			write_nic_byte(dev, 0x7c, ((0x0000548D & 0x000000ff) >> 0)); 
++
++			bAntennaSwitched = true;
++			break;
++
++		default:
++			printk("SetAntenna8185: unkown RFChipID(%d)\n", priv->rf_chip);
++			break;
++		}
++		break;
++
++	default:
++		printk("SetAntenna8185: unkown u1bAntennaIndex(%d)\n", u1bAntennaIndex);
++		break;
++	}
++
++	if(bAntennaSwitched)
++	{
++		priv->CurrAntennaIndex = u1bAntennaIndex;
++	}
++
++//	printk("-SetAntenna8185(): return (%#X)\n", bAntennaSwitched);
++
++	return bAntennaSwitched;
++}
++
++//
++//	Description: Toggle Antenna switch.
++//
++bool SwitchAntenna(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++
++	bool		bResult = false;
++
++	if(priv->CurrAntennaIndex == 0)
++	{
++            bResult = SetAntenna8185(dev, 1);
++            if(priv->ieee80211->state == IEEE80211_LINKED)
++                printk("Switching to Aux antenna 1 \n");
++	}
++	else
++	{
++            bResult = SetAntenna8185(dev, 0);
++            if(priv->ieee80211->state == IEEE80211_LINKED)
++                printk("Switching to Main antenna 0 \n");
++	}
++
++	return bResult;
++}
++
++//
++//	Description:
++//		Engine of SW Antenna Diversity mechanism.
++//		Since 8187 has no Tx part information, 
++//		this implementation is only dependend on Rx part information. 
++//
++//	2006.04.17, by rcnjko.
++//
++void SwAntennaDiversity(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	//bool   bSwCheckSS=false;
++	bool   bSwCheckSS=true;//open the SignalStrength check if not switched by rx ok pkt.
++
++//	printk("+SwAntennaDiversity(): CurrAntennaIndex: %d\n", priv->CurrAntennaIndex);
++
++//by amy 080312
++	if(bSwCheckSS){
++		priv->AdTickCount++;
++	
++		//printk("(1) AdTickCount: %d, AdCheckPeriod: %d\n", priv->AdTickCount, priv->AdCheckPeriod);
++		//printk("(2) AdRxSignalStrength: %ld, AdRxSsThreshold: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsThreshold);
++	}
++//	priv->AdTickCount++;//-by amy 080312
++	
++	// Case 1. No Link.
++	if(priv->ieee80211->state != IEEE80211_LINKED){
++		//printk("SwAntennaDiversity(): Case 1. No Link.\n");
++
++		priv->bAdSwitchedChecking = false;
++		// I switch antenna here to prevent any one of antenna is broken before link established, 2006.04.18, by rcnjko..
++		SwitchAntenna(dev);
++	}
++	// Case 2. Linked but no packet received.
++	else if(priv->AdRxOkCnt == 0){
++		printk("SwAntennaDiversity(): Case 2. Linked but no packet received.\n");
++
++		priv->bAdSwitchedChecking = false;
++		SwitchAntenna(dev);
++	}
++	// Case 3. Evaluate last antenna switch action in case4. and undo it if necessary.
++	else if(priv->bAdSwitchedChecking == true){
++		//printk("SwAntennaDiversity(): Case 3. Evaluate last antenna switch action.\n");
++
++		priv->bAdSwitchedChecking = false;
++
++		// Adjust Rx signal strength threashold.
++		priv->AdRxSsThreshold = (priv->AdRxSignalStrength + priv->AdRxSsBeforeSwitched) / 2;
++
++		priv->AdRxSsThreshold = (priv->AdRxSsThreshold > priv->AdMaxRxSsThreshold) ?	
++					priv->AdMaxRxSsThreshold: priv->AdRxSsThreshold;
++		if(priv->AdRxSignalStrength < priv->AdRxSsBeforeSwitched){ 
++			// Rx signal strength is not improved after we swtiched antenna. => Swich back.
++			printk("SwAntennaDiversity(): Rx Signal Strength is not improved, CurrRxSs: %ld, LastRxSs: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsBeforeSwitched);
++                        
++                        //by amy 080312
++			// Increase Antenna Diversity checking period due to bad decision.
++			priv->AdCheckPeriod *= 2;
++                        //by amy 080312
++                        //
++			// Increase Antenna Diversity checking period.
++			if(priv->AdCheckPeriod > priv->AdMaxCheckPeriod)
++				priv->AdCheckPeriod = priv->AdMaxCheckPeriod;
++	
++			// Wrong deceision => switch back.
++			SwitchAntenna(dev);
++		}else{ // Rx Signal Strength is improved. 
++			printk("SwAntennaDiversity(): Rx Signal Strength is improved, CurrRxSs: %ld, LastRxSs: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsBeforeSwitched);
++
++			// Reset Antenna Diversity checking period to its min value.
++			priv->AdCheckPeriod = priv->AdMinCheckPeriod;
++		}
++
++		//printk("SwAntennaDiversity(): AdRxSsThreshold: %ld, AdCheckPeriod: %d\n",
++		//	priv->AdRxSsThreshold, priv->AdCheckPeriod);
++	}
++	// Case 4. Evaluate if we shall switch antenna now.
++	// Cause Table Speed is very fast in TRC Dell Lab, we check it every time. 
++	else// if(priv->AdTickCount >= priv->AdCheckPeriod)//-by amy 080312
++	{
++		//printk("SwAntennaDiversity(): Case 4. Evaluate if we shall switch antenna now.\n");
++
++		priv->AdTickCount = 0;
++
++		//
++		// <Roger_Notes> We evaluate RxOk counts for each antenna first and than 
++		// evaluate signal strength. 
++		// The following operation can overcome the disability of CCA on both two antennas
++		// When signal strength was extremely low or high.
++		// 2008.01.30.
++		// 
++		
++		//
++		// Evaluate RxOk count from each antenna if we shall switch default antenna now.
++		// Added by Roger, 2008.02.21.
++                
++                //{by amy 080312
++		if((priv->AdMainAntennaRxOkCnt < priv->AdAuxAntennaRxOkCnt) && (priv->CurrAntennaIndex == 0)){ 
++			// We set Main antenna as default but RxOk count was less than Aux ones.
++
++			printk("SwAntennaDiversity(): Main antenna %d RxOK is poor, AdMainAntennaRxOkCnt: %d, AdAuxAntennaRxOkCnt: %d\n",priv->CurrAntennaIndex, priv->AdMainAntennaRxOkCnt, priv->AdAuxAntennaRxOkCnt);
++			
++			// Switch to Aux antenna.
++			SwitchAntenna(dev);	
++			priv->bHWAdSwitched = true;
++		}else if((priv->AdAuxAntennaRxOkCnt < priv->AdMainAntennaRxOkCnt) && (priv->CurrAntennaIndex == 1)){ 
++			// We set Aux antenna as default but RxOk count was less than Main ones.
++
++			printk("SwAntennaDiversity(): Aux antenna %d RxOK is poor, AdMainAntennaRxOkCnt: %d, AdAuxAntennaRxOkCnt: %d\n",priv->CurrAntennaIndex, priv->AdMainAntennaRxOkCnt, priv->AdAuxAntennaRxOkCnt);
++			
++			// Switch to Main antenna.
++			SwitchAntenna(dev);
++			priv->bHWAdSwitched = true;
++		}else{// Default antenna is better.
++
++			printk("SwAntennaDiversity(): Current Antenna %d is better., AdMainAntennaRxOkCnt: %d, AdAuxAntennaRxOkCnt: %d\n",priv->CurrAntennaIndex, priv->AdMainAntennaRxOkCnt, priv->AdAuxAntennaRxOkCnt);
++
++			// Still need to check current signal strength.
++			priv->bHWAdSwitched = false;	
++		}
++		//
++		// <Roger_Notes> We evaluate Rx signal strength ONLY when default antenna 
++		// didn't changed by HW evaluation. 
++		// 2008.02.27.
++		//
++		// [TRC Dell Lab] SignalStrength is inaccuracy. Isaiah 2008-03-05 
++		// For example, Throughput of aux is better than main antenna(about 10M v.s 2M), 
++		// but AdRxSignalStrength is less than main. 
++		// Our guess is that main antenna have lower throughput and get many change 
++		// to receive more CCK packets(ex.Beacon) which have stronger SignalStrength.
++		//
++		if( (!priv->bHWAdSwitched) && (bSwCheckSS)){
++                //by amy 080312}
++
++                // Evaluate Rx signal strength if we shall switch antenna now.
++                if(priv->AdRxSignalStrength < priv->AdRxSsThreshold){ 
++		    // Rx signal strength is weak => Switch Antenna.
++                    printk("SwAntennaDiversity(): Rx Signal Strength is weak, CurrRxSs: %ld, RxSsThreshold: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsThreshold);	
++
++                    priv->AdRxSsBeforeSwitched = priv->AdRxSignalStrength; 
++                    priv->bAdSwitchedChecking = true;
++
++                    SwitchAntenna(dev);
++                }else{ // Rx signal strength is OK. 
++			printk("SwAntennaDiversity(): Rx Signal Strength is OK, CurrRxSs: %ld, RxSsThreshold: %ld\n", priv->AdRxSignalStrength, priv->AdRxSsThreshold);
++
++			priv->bAdSwitchedChecking = false;
++			// Increase Rx signal strength threashold if necessary.
++			if(	(priv->AdRxSignalStrength > (priv->AdRxSsThreshold + 10)) && // Signal is much stronger than current threshold
++				priv->AdRxSsThreshold <= priv->AdMaxRxSsThreshold) // Current threhold is not yet reach upper limit.
++			{
++				priv->AdRxSsThreshold = (priv->AdRxSsThreshold + priv->AdRxSignalStrength) / 2;
++				priv->AdRxSsThreshold = (priv->AdRxSsThreshold > priv->AdMaxRxSsThreshold) ?
++							priv->AdMaxRxSsThreshold: priv->AdRxSsThreshold;//+by amy 080312
++			}
++
++			// Reduce Antenna Diversity checking period if possible. 
++			if( priv->AdCheckPeriod > priv->AdMinCheckPeriod )
++			{
++				priv->AdCheckPeriod /= 2; 
++			}
++		}
++		}
++	}
++//by amy 080312
++	// Reset antenna diversity Rx related statistics.
++	priv->AdRxOkCnt = 0;
++	priv->AdMainAntennaRxOkCnt = 0;
++	priv->AdAuxAntennaRxOkCnt = 0;
++//by amy 080312
++
++//	priv->AdRxOkCnt = 0;//-by amy 080312
++
++	//printk("-SwAntennaDiversity()\n");
++}
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void SwAntennaWorkItemCallback(struct work_struct *work)
++{
++	struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, SwAntennaWorkItem.work);
++	struct net_device *dev = ieee->dev;
++#else
++void SwAntennaWorkItemCallback(struct net_device *dev)
++{
++#endif
++        //printk("==>%s \n", __func__);
++	SwAntennaDiversity(dev);
++}
++
++//
++//	Description: Timer callback function of SW Antenna Diversity.
++//
++void SwAntennaDiversityTimerCallback(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	RT_RF_POWER_STATE rtState;
++	
++	//printk("+SwAntennaDiversityTimerCallback()\n");
++
++	//
++	// We do NOT need to switch antenna while RF is off.
++	// 2007.05.09, added by Roger.
++	//
++	rtState = priv->eRFPowerState;
++	do{
++		if (rtState == eRfOff){	
++//			printk("SwAntennaDiversityTimer - RF is OFF.\n");
++			break;
++		}else if (rtState == eRfSleep){	
++			// Don't access BB/RF under Disable PLL situation.
++			//RT_TRACE((COMP_RF|COMP_ANTENNA), DBG_LOUD, ("SwAntennaDiversityTimerCallback(): RF is Sleep => skip it\n"));
++			break;
++		}  
++		
++	        queue_work(priv->ieee80211->wq,(void *)&priv->ieee80211->SwAntennaWorkItem);
++
++	}while(false);
++
++	if(priv->up){
++		//priv->SwAntennaDiversityTimer.expires = jiffies + MSECS(ANTENNA_DIVERSITY_TIMER_PERIOD);
++		//add_timer(&priv->SwAntennaDiversityTimer);
++		mod_timer(&priv->SwAntennaDiversityTimer, jiffies + MSECS(ANTENNA_DIVERSITY_TIMER_PERIOD));
++	}
++
++}
++#endif
++
++
++
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_dm.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_dm.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,38 @@
++/* 
++       Hardware dynamic mechanism for RTL8187B. 
++Notes:	
++	This file is ported from RTL8187B Windows driver
++*/
++
++#ifndef R8180_DM_H
++#define R8180_DM_H
++
++#include "r8187.h"
++
++bool CheckDig(struct net_device *dev);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void rtl8180_hw_dig_wq (struct work_struct *work);
++#else
++void rtl8180_hw_dig_wq(struct net_device *dev);
++#endif
++
++bool CheckHighPower(struct net_device *dev);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void rtl8180_tx_pw_wq (struct work_struct *work);
++#else
++void rtl8180_tx_pw_wq(struct net_device *dev);
++#endif
++
++//by lzm for antenna
++#ifdef SW_ANTE_DIVERSITY
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void SwAntennaWorkItemCallback(struct work_struct *work);
++#else   
++void SwAntennaWorkItemCallback(struct net_device *dev);
++#endif
++void SwAntennaDiversityRxOk8185(struct net_device *dev, u8 SignalStrength);
++void SwAntennaDiversityTimerCallback(struct net_device *dev);
++#endif
++//by lzm for antenna
++
++#endif //R8180_PM_H
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_hw.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_hw.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,788 @@
++/* 
++	This is part of rtl8187 OpenSource driver.
++	Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it> 
++	Released under the terms of GPL (General Public Licence)
++	
++	Parts of this driver are based on the GPL part of the 
++	official Realtek driver.
++	Parts of this driver are based on the rtl8180 driver skeleton 
++	from Patric Schenke & Andres Salomon.
++	Parts of this driver are based on the Intel Pro Wireless 
++	2100 GPL driver.
++	
++	We want to tanks the Authors of those projects 
++	and the Ndiswrapper project Authors.
++*/
++
++/* Mariusz Matuszek added full registers definition with Realtek's name */
++
++/* this file contains register definitions for the rtl8187 MAC controller */
++#ifndef R8180_HW
++#define R8180_HW
++
++typedef	enum _RF_TYPE_8187{
++	RF_TYPE_MIN,
++	RF_ZEBRA = 5,
++	RF_ZEBRA2,		// added by Annie, 2005-08-01.
++	RF_TYPE_MAX,
++}RF_TYPE_8187,*PRF_TYPE_8187;
++
++typedef enum _VERSION_8187{
++	// RTL8187
++	VERSION_8187_B, // B-cut
++	VERSION_8187_D, // D-cut
++	// RTL8187B
++	VERSION_8187B_B, // B-cut
++	VERSION_8187B_D,  //D-cut   //added 2007-9-14
++	VERSION_8187B_E,  //E-cut   //added 2007-9-14
++}VERSION_8187,*PVERSION_8187;
++
++//by lzm for antenna
++#ifdef SW_ANTE_DIVERSITY
++#define RF_PARAM 0x19
++#define RF_PARAM_DIGPHY_SHIFT 0
++#define RF_PARAM_ANTBDEFAULT_SHIFT 1
++#define EEPROM_VERSION                                  0x3c
++#define EEPROM_CONFIG2                                  0x18
++#define EEPROM_CS_THRESHOLD                             0x2F
++#define EEPROM_RF_PARAM                         0x08
++//// BIT[8-9] is for SW Antenna Diversity. Only the value EEPROM_SW_AD_ENABLE means enable, other values are diable.
++#define EEPROM_SW_AD_MASK                       0x0300
++#define EEPROM_SW_AD_ENABLE                     0x0100
++//// BIT[10-11] determine if Antenna 1 is the Default Antenna. Only the value EEPROM_DEF_ANT_1 means TRUE, other values are FALSE.
++#define EEPROM_DEF_ANT_MASK                     0x0C00
++#define EEPROM_DEF_ANT_1                        0x0400
++
++#define RCR_EnCS1			BIT29				// enable carrier sense method 1
++#define RCR_EnCS2			BIT30				// enable carrier sense method 2
++#endif
++//by lzm for antenna
++
++#define	RTL8187_RF_INDEX	0x8225
++#define	RTL8187_REQT_READ	0xc0
++#define	RTL8187_REQT_WRITE	0x40
++#define	RTL8187_REQ_GET_REGS	0x05
++#define	RTL8187_REQ_SET_REGS	0x05
++
++
++
++#define MAX_TX_URB 5
++#define MAX_RX_URB 16 
++#define RX_URB_SIZE 0x9C4
++
++
++
++
++
++#define BB_ANTATTEN_CHAN14	0x0c
++#define BB_ANTENNA_B 0x40
++
++#define BB_HOST_BANG (1<<30)
++#define BB_HOST_BANG_EN (1<<2)
++#define BB_HOST_BANG_CLK (1<<1)
++#define BB_HOST_BANG_RW (1<<3)
++#define BB_HOST_BANG_DATA	 1
++
++#define ANAPARAM_TXDACOFF_SHIFT 27
++#define ANAPARAM_PWR0_MASK ((1<<30)|(1<<29)|(1<<28))
++#define ANAPARAM_PWR0_SHIFT 28
++#define ANAPARAM_PWR1_MASK ((1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20))
++#define ANAPARAM_PWR1_SHIFT 20
++
++#define MAC0 0
++#define MAC1 1
++#define MAC2 2
++#define MAC3 3
++#define MAC4 4
++#define MAC5 5
++
++#define RXFIFOCOUNT 0x10
++#define TXFIFOCOUNT 0x12
++#define BcnIntTime 0x74
++#define TALLY_SEL 0xfc
++#define BQREQ 0x13
++
++#define CMD 0x37
++#define CMD_RST_SHIFT 4
++#define CMD_RESERVED_MASK ((1<<1) | (1<<5) | (1<<6) | (1<<7))
++#define CMD_RX_ENABLE_SHIFT 3
++#define CMD_TX_ENABLE_SHIFT 2
++
++#define EPROM_CMD 0x50
++#define EPROM_CMD_RESERVED_MASK ((1<<5)|(1<<4))
++#define EPROM_CMD_OPERATING_MODE_SHIFT 6
++#define EPROM_CMD_OPERATING_MODE_MASK ((1<<7)|(1<<6))
++#define EPROM_CMD_CONFIG 0x3
++#define EPROM_CMD_NORMAL 0 
++#define EPROM_CMD_LOAD 1
++#define EPROM_CMD_PROGRAM 2
++#define EPROM_CS_SHIFT 3
++#define EPROM_CK_SHIFT 2
++#define EPROM_W_SHIFT 1
++#define EPROM_R_SHIFT 0
++#define CONFIG2_DMA_POLLING_MODE_SHIFT 3
++#define INTA 0x3e
++#define INTA_TXOVERFLOW (1<<15)
++#define INTA_TIMEOUT (1<<14)
++#define INTA_BEACONTIMEOUT (1<<13)
++#define INTA_ATIM (1<<12)
++#define INTA_BEACONDESCERR (1<<11)
++#define INTA_BEACONDESCOK (1<<10)
++#define INTA_HIPRIORITYDESCERR (1<<9)
++#define INTA_HIPRIORITYDESCOK (1<<8)
++#define INTA_NORMPRIORITYDESCERR (1<<7)
++#define INTA_NORMPRIORITYDESCOK (1<<6)
++#define INTA_RXOVERFLOW (1<<5)
++#define INTA_RXDESCERR (1<<4)
++#define INTA_LOWPRIORITYDESCERR (1<<3)
++#define INTA_LOWPRIORITYDESCOK (1<<2)
++#define INTA_RXCRCERR (1<<1)
++#define INTA_RXOK (1)
++#define INTA_MASK 0x3c
++#define RXRING_ADDR 0xe4 // page 0
++#define PGSELECT 0x5e
++#define PGSELECT_PG_SHIFT 0
++#define RX_CONF 0x44
++#define MAC_FILTER_MASK ((1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<5) | \
++(1<<12) | (1<<18) | (1<<19) | (1<<20) | (1<<21) | (1<<22) | (1<<23))
++#define RX_CHECK_BSSID_SHIFT 23
++#define ACCEPT_PWR_FRAME_SHIFT 22
++#define ACCEPT_MNG_FRAME_SHIFT 20
++#define ACCEPT_CTL_FRAME_SHIFT 19
++#define ACCEPT_DATA_FRAME_SHIFT 18
++#define ACCEPT_ICVERR_FRAME_SHIFT 12
++#define ACCEPT_CRCERR_FRAME_SHIFT 5
++#define ACCEPT_BCAST_FRAME_SHIFT 3
++#define ACCEPT_MCAST_FRAME_SHIFT 2
++#define ACCEPT_ALLMAC_FRAME_SHIFT 0
++#define ACCEPT_NICMAC_FRAME_SHIFT 1
++#define RX_FIFO_THRESHOLD_MASK ((1<<13) | (1<<14) | (1<<15))
++#define RX_FIFO_THRESHOLD_SHIFT 13
++#define RX_FIFO_THRESHOLD_128 3
++#define RX_FIFO_THRESHOLD_256 4
++#define RX_FIFO_THRESHOLD_512 5
++#define RX_FIFO_THRESHOLD_1024 6
++#define RX_FIFO_THRESHOLD_NONE 7
++#define RX_AUTORESETPHY_SHIFT 28
++#define EPROM_TYPE_SHIFT 6
++#define TX_CONF 0x40
++#define TX_CONF_HEADER_AUTOICREMENT_SHIFT 30
++#define TX_LOOPBACK_SHIFT 17
++#define TX_LOOPBACK_MAC 1
++#define TX_LOOPBACK_BASEBAND 2
++#define TX_LOOPBACK_NONE 0
++#define TX_LOOPBACK_CONTINUE 3
++#define TX_LOOPBACK_MASK ((1<<17)|(1<<18))
++#define TX_LRLRETRY_SHIFT 0
++#define R8180_MAX_RETRY 255
++#define TX_SRLRETRY_SHIFT 8
++#define TX_NOICV_SHIFT 19
++#define TX_NOCRC_SHIFT 16
++#define TX_DMA_POLLING 0xd9
++#define TX_DMA_POLLING_BEACON_SHIFT 7
++#define TX_DMA_POLLING_HIPRIORITY_SHIFT 6
++#define TX_DMA_POLLING_NORMPRIORITY_SHIFT 5
++#define TX_DMA_POLLING_LOWPRIORITY_SHIFT 4
++#define TX_DMA_STOP_BEACON_SHIFT 3
++#define TX_DMA_STOP_HIPRIORITY_SHIFT 2
++#define TX_DMA_STOP_NORMPRIORITY_SHIFT 1
++#define TX_DMA_STOP_LOWPRIORITY_SHIFT 0
++#define TX_NORMPRIORITY_RING_ADDR 0x24
++#define TX_HIGHPRIORITY_RING_ADDR 0x28
++#define TX_LOWPRIORITY_RING_ADDR 0x20
++#define MAX_RX_DMA_MASK ((1<<8) | (1<<9) | (1<<10))
++#define MAX_RX_DMA_2048 7
++#define MAX_RX_DMA_1024	6
++#define MAX_RX_DMA_SHIFT 10
++#define INT_TIMEOUT 0x48
++#define CONFIG3_CLKRUN_SHIFT 2
++#define CONFIG3_ANAPARAM_W_SHIFT 6
++#define ANAPARAM 0x54
++#define BEACON_INTERVAL 0x70
++#define BEACON_INTERVAL_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)| \
++(1<<6)|(1<<7)|(1<<8)|(1<<9))
++#define ATIM_MASK ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7)| \
++(1<<8)|(1<<9))
++#define ATIM 0x72
++#define EPROM_CS_SHIFT 3
++#define EPROM_CK_SHIFT 2
++#define PHY_DELAY 0x78
++#define PHY_CONFIG 0x80
++#define PHY_ADR 0x7c
++#define PHY_READ 0x7e
++#define CARRIER_SENSE_COUNTER 0x79 //byte
++#define SECURITY 0x5f
++#define SECURITY_WEP_TX_ENABLE_SHIFT 1
++#define SECURITY_WEP_RX_ENABLE_SHIFT 0
++#define SECURITY_ENCRYP_104 1
++#define SECURITY_ENCRYP_SHIFT 4
++#define SECURITY_ENCRYP_MASK ((1<<4)|(1<<5))
++#define KEY0 0x90
++#define CONFIG2_ANTENNA_SHIFT 6
++#define TX_BEACON_RING_ADDR 0x4c
++#define CONFIG0_WEP40_SHIFT 7
++#define CONFIG0_WEP104_SHIFT 6
++#define AGCRESET_SHIFT 5
++
++
++
++/* 
++ * Operational registers offsets in PCI (I/O) space. 
++ * RealTek names are used.
++ */
++
++#define IDR0 0x0000
++#define IDR1 0x0001
++#define IDR2 0x0002
++#define IDR3 0x0003
++#define IDR4 0x0004
++#define IDR5 0x0005
++
++/* 0x0006 - 0x0007 - reserved */
++
++#define MAR0 0x0008
++#define MAR1 0x0009
++#define MAR2 0x000A
++#define MAR3 0x000B
++#define MAR4 0x000C
++#define MAR5 0x000D
++#define MAR6 0x000E
++#define MAR7 0x000F
++
++/* 0x0010 - 0x0017 - reserved */
++
++#define TSFTR 0x0018
++#define TSFTR_END 0x001F
++
++#define TLPDA 0x0020
++#define TLPDA_END 0x0023
++#define TNPDA 0x0024
++#define TNPDA_END 0x0027
++#define THPDA 0x0028
++#define THPDA_END 0x002B
++
++#define BRSR_8187 0x002C
++#define BRSR_8187_END 0x002D
++#define BRSR_8187B 0x0034
++#define BRSR_8187B_END 0x0035
++
++#define BSSID 0x002E
++#define BSSID_END 0x0033
++
++/* 0x0034 - 0x0034 - reserved */
++
++/* 0x0038 - 0x003B - reserved */
++
++#define IMR 0x003C
++#define IMR_END 0x003D
++
++#define ISR 0x003E
++#define ISR_END 0x003F
++
++#define TCR 0x0040
++#define TCR_END 0x0043
++
++#define RCR 0x0044
++#define RCR_END 0x0047
++
++#define TimerInt 0x0048
++#define TimerInt_END 0x004B
++
++#define TBDA 0x004C
++#define TBDA_END 0x004F
++
++#define CR9346 0x0050
++
++#define CONFIG0 0x0051
++#define CONFIG1 0x0052
++#define CONFIG2 0x0053
++
++#define ANA_PARAM 0x0054
++#define ANA_PARAM_END 0x0x0057
++
++#define MSR 0x0058
++
++#define CONFIG3 0x0059
++#define CONFIG4 0x005A
++
++#define TESTR 0x005B
++
++/* 0x005C - 0x005D - reserved */
++#define TFPC_AC  0x005C
++#define PSR 0x005E
++
++#define SCR 0x005F
++
++/* 0x0060 - 0x006F - reserved */
++#define ANA_PARAM2 0x0060
++#define ANA_PARAM2_END 0x0063
++
++#define BcnIntv 0x0070
++#define BcnItv_END 0x0071
++
++#define AtimWnd 0x0072
++#define AtimWnd_END 0x0073
++
++#define BintrItv 0x0074
++#define BintrItv_END 0x0075
++
++#define AtimtrItv 0x0076
++#define AtimtrItv_END 0x0077
++
++#define PhyDelay 0x0078
++
++//#define CRCount 0x0079
++
++#define AckTimeOutReg      0x79            // ACK timeout register, in unit of 4 us.
++/* 0x007A - 0x007B - reserved */
++#define BBAddr	0x007C
++
++
++#define PhyAddr 0x007C
++#define PhyDataW 0x007D
++#define PhyDataR 0x007E
++#define RF_Ready 0x007F
++
++#define PhyCFG 0x0080
++#define PhyCFG_END 0x0083
++
++/* following are for rtl8185 */
++#define RFPinsOutput 0x80
++#define RFPinsEnable 0x82
++#define RF_TIMING 0x8c 
++#define RFPinsSelect 0x84
++#define ANAPARAM2 0x60
++#define RF_PARA 0x88
++#define RFPinsInput 0x86
++#define GP_ENABLE 0x90
++#define GPIO 0x91
++#define HSSI_PARA       0x94                    // HSS Parameter
++#define SW_CONTROL_GPIO 0x400
++#define CCK_TXAGC 0x9d
++#define OFDM_TXAGC 0x9e
++#define ANTSEL 0x9f
++#define TXAGC_CTL_PER_PACKET_ANT_SEL 0x02
++#define WPA_CONFIG 0xb0
++#define TX_AGC_CTL 0x9c
++#define TX_AGC_CTL_PER_PACKET_TXAGC	0x01
++#define TX_AGC_CTL_PERPACKET_GAIN_SHIFT 0
++#define TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT 1
++#define TX_AGC_CTL_FEEDBACK_ANT 2
++#define RESP_RATE 0x34
++#define SIFS 0xb4
++#define DIFS 0xb5
++#define EIFS_8187  0x35
++#define EIFS_8187B 0x2D
++#define SLOT 0xb6
++#define CW_VAL 0xbd
++#define CW_CONF 0xbc
++#define CW_CONF_PERPACKET_RETRY_LIMIT 0x02
++#define CW_CONF_PERPACKET_CW 0x01
++#define CW_CONF_PERPACKET_RETRY_SHIFT 1
++#define CW_CONF_PERPACKET_CW_SHIFT 0
++#define MAX_RESP_RATE_SHIFT 4
++#define MIN_RESP_RATE_SHIFT 0
++#define RATE_FALLBACK 0xbe
++#define RATE_FALLBACK_CTL_ENABLE  0x80
++#define RATE_FALLBACK_CTL_AUTO_STEP0 0x00
++
++#define ARFR                    0x1E0   // Auto Rate Fallback Register (0x1e0 ~ 0x1e2)
++#define RMS                     0x1EC   // Rx Max Pacetk Size (0x1ec[0:12])
++
++/*
++ *  0x0084 - 0x00D3 is selected to page 1 when PSEn bit (bit0, PSR) 
++ *  is set to 1
++ */
++
++#define Wakeup0 0x0084
++#define Wakeup0_END 0x008B
++
++#define Wakeup1 0x008C
++#define Wakeup1_END 0x0093
++
++#define Wakeup2LD 0x0094
++#define Wakeup2LD_END 0x009B
++#define Wakeup2HD 0x009C
++#define Wakeup2HD_END 0x00A3
++
++#define Wakeup3LD 0x00A4
++#define Wakeup3LD_END 0x00AB
++#define Wakeup3HD 0x00AC
++#define Wakeup3HD_END 0x00B3
++
++#define Wakeup4LD 0x00B4
++#define Wakeup4LD_END 0x00BB
++#define Wakeup4HD 0x00BC
++#define Wakeup4HD_END 0x00C3
++
++#define CRC0 0x00C4
++#define CRC0_END 0x00C5
++#define CRC1 0x00C6
++#define CRC1_END 0x00C7
++#define CRC2 0x00C8
++#define CRC2_END 0x00C9
++#define CRC3 0x00CA
++#define CRC3_END 0x00CB
++#define CRC4 0x00CC
++#define CRC4_END 0x00CD
++
++/* 0x00CE - 0x00D3 - reserved */
++
++
++
++/*
++ *  0x0084 - 0x00D3 is selected to page 0 when PSEn bit (bit0, PSR) 
++ *  is set to 0
++ */
++
++/* 0x0084 - 0x008F - reserved */
++
++#define DK0 0x0090
++#define DK0_END 0x009F
++#define DK1 0x00A0
++#define DK1_END 0x00AF
++#define DK2 0x00B0
++#define DK2_END 0x00BF
++#define DK3 0x00C0
++#define DK3_END 0x00CF
++
++#define GPO				0x90
++#define GPE				0x91
++#define GPI				0x92
++
++#define RFTiming	        0x008C
++#define ACM_CONTROL             0x00BF      // ACM Control Registe
++#define INT_MIG                 0x00E2      // Interrupt Migration (0xE2 ~ 0xE3)
++#define TID_AC_MAP         	0x00E8      // TID to AC Mapping Register
++
++#define AC_VO_PARAM             0x00F0                    // AC_VO Parameters Record
++#define AC_VI_PARAM             0x00F4                    // AC_VI Parameters Record
++#define AC_BE_PARAM             0x00F8                    // AC_BE Parameters Record
++#define AC_BK_PARAM             0x00FC                    // AC_BK Parameters Record  
++
++/* 0x00D0 - 0x00D3 - reserved */
++#define CCK_FALSE_ALARM		0x00D0
++#define OFDM_FALSE_ALARM	0x00D2
++
++
++/* 0x00D4 - 0x00D7 - reserved */
++
++#define CONFIG5 0x00D8
++
++#define TPPoll 0x00D9
++
++/* 0x00DA - 0x00DB - reserved */
++
++#define CWR 0x00DC
++#define CWR_END 0x00DD
++
++#define RetryCTR 0x00DE
++
++/* 0x00DF - 0x00E3 - reserved */
++
++#define RDSAR 0x00E4
++#define RDSAR_END 0x00E7
++
++/* 0x00E8 - 0x00EF - reserved */
++#define ANA_PARAM3 0x00EE
++
++#define FER 0x00F0
++#define FER_END 0x00F3
++
++#define FEMR    0x1D4   // Function Event Mask register (0xf4 ~ 0xf7)
++//#define FEMR 0x00F4
++#define FEMR_END 0x00F7
++
++#define FPSR 0x00F8
++#define FPSR_END 0x00FB
++
++#define FFER 0x00FC
++#define FFER_END 0x00FF
++
++/*
++ *  0x0000 - 0x00ff is selected to page 0 when PSEn bit (bit0, PSR) 
++ *  is set to 2
++ */
++#define RFSW_CTRL                  0x272   // 0x272-0x273.
++
++
++
++//----------------------------------------------------------------------------
++//       8187B AC_XX_PARAM bits 
++//----------------------------------------------------------------------------
++#define AC_PARAM_TXOP_LIMIT_OFFSET		16
++#define AC_PARAM_ECW_MAX_OFFSET			12
++#define AC_PARAM_ECW_MIN_OFFSET			8
++#define AC_PARAM_AIFS_OFFSET			0
++
++//----------------------------------------------------------------------------
++//       8187B ACM_CONTROL bits						(Offset 0xBF, 1 Byte)
++//----------------------------------------------------------------------------
++#define VOQ_ACM_EN				(0x01 << 7) //BIT7
++#define VIQ_ACM_EN				(0x01 << 6) //BIT6
++#define BEQ_ACM_EN				(0x01 << 5) //BIT5
++#define ACM_HW_EN				(0x01 << 4) //BIT4
++#define TXOPSEL					(0x01 << 3) //BIT3
++#define VOQ_ACM_CTL				(0x01 << 2) //BIT2 // Set to 1 when AC_VO used time reaches or exceeds the admitted time
++#define VIQ_ACM_CTL				(0x01 << 1) //BIT1 // Set to 1 when AC_VI used time reaches or exceeds the admitted time
++#define BEQ_ACM_CTL				(0x01 << 0) //BIT0 // Set to 1 when AC_BE used time reaches or exceeds the admitted time
++
++//----------------------------------------------------------------------------
++//       8187B RF pins related setting 				(offset 0xFF80-0xFF87,)
++//----------------------------------------------------------------------------
++#define TR_SW_MASK_TX_8187 BIT5 
++#define TR_SW_MASK_RX_8187 BIT6
++#define TR_SW_MASK_8187 (TR_SW_MASK_TX_8187 | TR_SW_MASK_RX_8187)
++
++/*
++ * Bitmasks for specific register functions. 
++ * Names are derived from the register name and function name.
++ *
++ * <REGISTER>_<FUNCTION>[<bit>]
++ *
++ * this leads to some awkward names...
++ */
++
++#define BRSR_BPLCP  ((1<< 8))
++#define BRSR_MBR    ((1<< 1)|(1<< 0))
++#define BRSR_MBR_8185 ((1<< 11)|(1<< 10)|(1<< 9)|(1<< 8)|(1<< 7)|(1<< 6)|(1<< 5)|(1<< 4)|(1<< 3)|(1<< 2)|(1<< 1)|(1<< 0))
++#define BRSR_MBR0   ((1<< 0))
++#define BRSR_MBR1   ((1<< 1))
++
++#define CR_RST      ((1<< 4))
++#define CR_RE       ((1<< 3))
++#define CR_TE       ((1<< 2))
++#define CR_MulRW    ((1<< 0))
++
++#define IMR_TXFOVW  ((1<<15))
++#define IMR_TimeOut ((1<<14))
++#define IMR_BcnInt  ((1<<13))
++#define IMR_ATIMInt ((1<<12))
++#define IMR_TBDER   ((1<<11))
++#define IMR_TBDOK   ((1<<10))
++#define IMR_THPDER  ((1<< 9))
++#define IMR_THPDOK  ((1<< 8))
++#define IMR_TNPDER  ((1<< 7))
++#define IMR_TNPDOK  ((1<< 6))
++#define IMR_RXFOVW  ((1<< 5))
++#define IMR_RDU     ((1<< 4))
++#define IMR_TLPDER  ((1<< 3))
++#define IMR_TLPDOK  ((1<< 2))
++#define IMR_RER     ((1<< 1))
++#define IMR_ROK     ((1<< 0))
++
++#define ISR_TXFOVW  ((1<<15))
++#define ISR_TimeOut ((1<<14))
++#define ISR_BcnInt  ((1<<13))
++#define ISR_ATIMInt ((1<<12))
++#define ISR_TBDER   ((1<<11))
++#define ISR_TBDOK   ((1<<10))
++#define ISR_THPDER  ((1<< 9))
++#define ISR_THPDOK  ((1<< 8))
++#define ISR_TNPDER  ((1<< 7))
++#define ISR_TNPDOK  ((1<< 6))
++#define ISR_RXFOVW  ((1<< 5))
++#define ISR_RDU     ((1<< 4))
++#define ISR_TLPDER  ((1<< 3))
++#define ISR_TLPDOK  ((1<< 2))
++#define ISR_RER     ((1<< 1))
++#define ISR_ROK     ((1<< 0))
++
++#define HW_VERID_R8180_F 3
++#define HW_VERID_R8180_ABCD 2
++#define HW_VERID_R8185_ABC 4
++#define HW_VERID_R8185_D 5
++
++#define TCR_DurProcMode  ((1<<30))
++#define TCR_DISReqQsize  ((1<<28))
++#define TCR_HWVERID_MASK ((1<<27)|(1<<26)|(1<<25))
++#define TCR_HWVERID_SHIFT 25
++#define TCR_SWPLCPLEN     ((1<<24))
++#define TCR_PLCP_LEN TCR_SAT // rtl8180
++#define TCR_MXDMA_MASK   ((1<<23)|(1<<22)|(1<<21)) 
++#define TCR_MXDMA_1024 6
++#define TCR_MXDMA_2048 7
++#define TCR_MXDMA_SHIFT  21
++#define TCR_DISCW   ((1<<20))
++#define TCR_ICV     ((1<<19))
++#define TCR_LBK     ((1<<18)|(1<<17))
++#define TCR_LBK1    ((1<<18))
++#define TCR_LBK0    ((1<<17))
++#define TCR_CRC     ((1<<16))
++#define TCR_SRL_MASK   ((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8))
++#define TCR_LRL_MASK   ((1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7))
++#define TCR_PROBE_NOTIMESTAMP_SHIFT 29 //rtl8185
++
++#define RCR_ONLYERLPKT ((1<<31))
++#define RCR_CS_SHIFT   29
++#define RCR_CS_MASK    ((1<<30) | (1<<29))
++#define RCR_ENMARP     ((1<<28))
++#define RCR_CBSSID     ((1<<23))
++#define RCR_APWRMGT    ((1<<22))
++#define RCR_ADD3       ((1<<21))
++#define RCR_AMF        ((1<<20))
++#define RCR_ACF        ((1<<19))
++#define RCR_ADF        ((1<<18))
++#define RCR_RXFTH      ((1<<15)|(1<<14)|(1<<13))
++#define RCR_RXFTH2     ((1<<15))
++#define RCR_RXFTH1     ((1<<14))
++#define RCR_RXFTH0     ((1<<13))
++#define RCR_AICV       ((1<<12))
++#define RCR_MXDMA      ((1<<10)|(1<< 9)|(1<< 8))
++#define RCR_MXDMA2     ((1<<10))
++#define RCR_MXDMA1     ((1<< 9))
++#define RCR_MXDMA0     ((1<< 8))
++#define RCR_9356SEL    ((1<< 6))
++#define RCR_ACRC32     ((1<< 5))
++#define RCR_AB         ((1<< 3))
++#define RCR_AM         ((1<< 2))
++#define RCR_APM        ((1<< 1))
++#define RCR_AAP        ((1<< 0))
++
++#define CR9346_EEM     ((1<<7)|(1<<6))
++#define CR9346_EEM1    ((1<<7))
++#define CR9346_EEM0    ((1<<6))
++#define CR9346_EECS    ((1<<3))
++#define CR9346_EESK    ((1<<2))
++#define CR9346_EED1    ((1<<1))
++#define CR9346_EED0    ((1<<0))
++
++#define CONFIG0_WEP104     ((1<<6))
++#define CONFIG0_LEDGPO_En  ((1<<4))
++#define CONFIG0_Aux_Status ((1<<3))
++#define CONFIG0_GL         ((1<<1)|(1<<0))
++#define CONFIG0_GL1        ((1<<1))
++#define CONFIG0_GL0        ((1<<0))
++
++#define CONFIG1_LEDS       ((1<<7)|(1<<6))
++#define CONFIG1_LEDS1      ((1<<7))
++#define CONFIG1_LEDS0      ((1<<6))
++#define CONFIG1_LWACT      ((1<<4))
++#define CONFIG1_MEMMAP     ((1<<3))
++#define CONFIG1_IOMAP      ((1<<2))
++#define CONFIG1_VPD        ((1<<1))
++#define CONFIG1_PMEn       ((1<<0))
++
++#define CONFIG2_LCK        ((1<<7))
++#define CONFIG2_ANT        ((1<<6))
++#define CONFIG2_DPS        ((1<<3))
++#define CONFIG2_PAPE_sign  ((1<<2))
++#define CONFIG2_PAPE_time  ((1<<1)|(1<<0))
++#define CONFIG2_PAPE_time1 ((1<<1))
++#define CONFIG2_PAPE_time0 ((1<<0))
++
++#define CONFIG3_GNTSel     ((1<<7))
++#define CONFIG3_PARM_En    ((1<<6))
++#define CONFIG3_Magic      ((1<<5))
++#define CONFIG3_CardB_En   ((1<<3))
++#define CONFIG3_CLKRUN_En  ((1<<2))
++#define CONFIG3_FuncRegEn  ((1<<1))
++#define CONFIG3_FBtbEn     ((1<<0))
++
++#define CONFIG4_VCOPDN     ((1<<7))
++#define CONFIG4_PWROFF     ((1<<6))
++#define CONFIG4_PWRMGT     ((1<<5))
++#define CONFIG4_LWPME      ((1<<4))
++#define CONFIG4_LWPTN      ((1<<2))
++#define CONFIG4_RFTYPE     ((1<<1)|(1<<0))
++#define CONFIG4_RFTYPE1    ((1<<1))
++#define CONFIG4_RFTYPE0    ((1<<0))
++
++#define CONFIG5_TX_FIFO_OK ((1<<7))
++#define CONFIG5_RX_FIFO_OK ((1<<6))
++#define CONFIG5_CALON      ((1<<5))
++#define CONFIG5_EACPI      ((1<<2))
++#define CONFIG5_LANWake    ((1<<1))
++#define CONFIG5_PME_STS    ((1<<0))
++
++#define MSR_LINK_MASK      ((1<<2)|(1<<3))
++#define MSR_LINK_MANAGED   2
++#define MSR_LINK_NONE      0
++#define MSR_LINK_SHIFT     2
++#define MSR_LINK_ADHOC     1
++#define MSR_LINK_MASTER    3
++#define MSR_LINK_ENEDCA	   (1<<4)
++
++#define PSR_GPO            ((1<<7))
++#define PSR_GPI            ((1<<6))
++#define PSR_LEDGPO1        ((1<<5))
++#define PSR_LEDGPO0        ((1<<4))
++#define PSR_UWF            ((1<<1))
++#define PSR_PSEn           ((1<<0))
++
++#define SCR_KM             ((1<<5)|(1<<4))
++#define SCR_KM1            ((1<<5))
++#define SCR_KM0            ((1<<4))
++#define SCR_TXSECON        ((1<<1))
++#define SCR_RXSECON        ((1<<0))
++
++#define BcnItv_BcnItv      (0x01FF)
++
++#define AtimWnd_AtimWnd    (0x01FF)
++
++#define BintrItv_BintrItv  (0x01FF)
++
++#define AtimtrItv_AtimtrItv (0x01FF)
++
++#define PhyDelay_PhyDelay  ((1<<2)|(1<<1)|(1<<0))
++
++#define TPPoll_BQ    ((1<<7))
++#define TPPoll_HPQ   ((1<<6))
++#define TPPoll_NPQ   ((1<<5))
++#define TPPoll_LPQ   ((1<<4))
++#define TPPoll_SBQ   ((1<<3))
++#define TPPoll_SHPQ  ((1<<2))
++#define TPPoll_SNPQ  ((1<<1))
++#define TPPoll_SLPQ  ((1<<0))
++
++#define CWR_CW       (0x01FF)
++
++#define FER_INTR     ((1<<15))
++#define FER_GWAKE    ((1<< 4))
++
++#define FEMR_INTR    ((1<<15))
++#define FEMR_WKUP    ((1<<14))
++#define FEMR_GWAKE   ((1<< 4))
++
++#define FPSR_INTR    ((1<<15))
++#define FPSR_GWAKE   ((1<< 4))
++
++#define FFER_INTR    ((1<<15))
++#define FFER_GWAKE   ((1<< 4))
++
++
++//----------------------------------------------------------------------------
++//       818xB AnaParm & AnaParm2 Register
++//----------------------------------------------------------------------------
++/*
++#ifdef RTL8185B_FPGA
++#define ANAPARM_FPGA_ON    0xa0000b59
++//#define ANAPARM_FPGA_OFF    
++#define ANAPARM2_FPGA_ON  0x860dec11
++//#define ANAPARM2_FPGA_OFF
++#else //ASIC
++*/
++#define ANAPARM_ASIC_ON    0x45090658
++//#define ANAPARM_ASIC_OFF
++#define ANAPARM2_ASIC_ON  0x727f3f52
++//#define ANAPARM2_ASIC_OFF
++//#endif
++//by amy for power save
++#define RF_CHANGE_BY_SW BIT31
++#define RF_CHANGE_BY_HW BIT30
++#define RF_CHANGE_BY_PS BIT29
++#define RF_CHANGE_BY_IPS BIT28
++#define ANAPARM_ASIC_ON    0x45090658
++#define ANAPARM2_ASIC_ON  0x727f3f52
++
++#define ANAPARM_ON ANAPARM_ASIC_ON
++#define ANAPARM2_ON ANAPARM2_ASIC_ON
++#define TFPC			0x5C			// Tx FIFO Packet Count for BK, BE, VI, VO queues (2 bytes)
++#define Config4_PowerOff		BIT6			// Turn ON/Off RF Power(RFMD)
++#define ANAPARM_OFF 0x51480658
++#define ANAPARM2_OFF 0x72003f70
++//by amy for power save
++
++#define MAX_DOZE_WAITING_TIMES_87B 500
++
++#endif
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_pm.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_pm.c	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,99 @@
++/* 
++   Power management interface routines. 
++   Written by Mariusz Matuszek.
++   This code is currently just a placeholder for later work and 
++   does not do anything useful.
++   
++   This is part of rtl8180 OpenSource driver.
++   Copyright (C) Andrea Merello 2004  <andreamrl@tiscali.it> 
++   Released under the terms of GPL (General Public Licence)	
++*/
++
++#ifdef CONFIG_RTL8180_PM
++
++
++#include "r8180_hw.h"
++#include "r8180_pm.h"
++#include "r8187.h"
++int rtl8180_save_state (struct pci_dev *dev, u32 state)
++{
++        printk(KERN_NOTICE "r8180 save state call (state %u).\n", state);
++	return(-EAGAIN);
++}
++
++//netif_running is set to 0 before system call rtl8180_close, 
++//netif_running is set to 1 before system call rtl8180_open,
++//if open success it will not change, or it change to 0;
++int rtl8187_suspend (struct usb_interface *intf, pm_message_t state)
++{
++	struct r8180_priv *priv;
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	struct net_device *dev = usb_get_intfdata(intf);
++#else
++	//struct net_device *dev = (struct net_device *)ptr;
++#endif
++
++	printk("====>%s \n", __func__);
++	priv=ieee80211_priv(dev);
++
++	if(dev) {
++#ifdef POLLING_METHOD_FOR_RADIO
++		del_timer_sync(&priv->gpio_polling_timer);
++		cancel_delayed_work(&priv->ieee80211->GPIOChangeRFWorkItem);
++		priv->polling_timer_on = 0;
++#endif
++		if (!netif_running(dev)) {
++			//printk(KERN_WARNING "UI or other close dev before suspend, go out suspend function\n");
++			return 0;
++		}
++
++		dev->stop(dev);
++		netif_device_detach(dev);
++	}
++	return 0;
++}
++
++
++int rtl8187_resume (struct usb_interface *intf)
++{
++	struct r8180_priv *priv;
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	struct net_device *dev = usb_get_intfdata(intf);
++#else
++	//struct net_device *dev = (struct net_device *)ptr;
++#endif
++
++	printk("====>%s \n", __func__);
++	priv=ieee80211_priv(dev);
++
++	if(dev) {
++#ifdef POLLING_METHOD_FOR_RADIO
++		if(priv->polling_timer_on == 0){//add for S3/S4
++			gpio_change_polling((unsigned long)dev);
++		}
++#endif
++		if (!netif_running(dev)){
++			//printk(KERN_WARNING "UI or other close dev before suspend, go out resume function\n");
++			return 0;
++		}
++
++		netif_device_attach(dev);
++		dev->open(dev);
++	}
++
++	return 0;
++}
++
++
++int rtl8180_enable_wake (struct pci_dev *dev, u32 state, int enable)
++{
++		
++		//printk(KERN_NOTICE "r8180 enable wake call (state %u, enable %d).\n", 
++	//       state, enable);
++	return 0;
++	//return(-EAGAIN);
++}
++
++
++
++#endif //CONFIG_RTL8180_PM
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_pm.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_pm.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,28 @@
++/* 
++        Power management interface routines. 
++	Written by Mariusz Matuszek.
++	This code is currently just a placeholder for later work and 
++	does not do anything useful.
++
++	This is part of rtl8180 OpenSource driver.
++	Copyright (C) Andrea Merello 2004  <andreamrl@tiscali.it> 
++	Released under the terms of GPL (General Public Licence)
++	
++*/
++
++#ifdef CONFIG_RTL8180_PM
++
++#ifndef R8180_PM_H
++#define R8180_PM_H
++
++#include <linux/types.h>
++#include <linux/usb.h>
++
++int rtl8180_save_state (struct pci_dev *dev, u32 state);
++int rtl8187_suspend  (struct usb_interface *intf,pm_message_t state);
++int rtl8187_resume (struct usb_interface *intf);
++int rtl8180_enable_wake (struct pci_dev *dev, u32 state, int enable);
++
++#endif //R8180_PM_H
++
++#endif // CONFIG_RTL8180_PM
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_rtl8225.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_rtl8225.c	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,1007 @@
++/*
++  This is part of the rtl8180-sa2400 driver
++  released under the GPL (See file COPYING for details).
++  Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
++  
++  This files contains programming code for the rtl8225 
++  radio frontend.
++  
++  *Many* thanks to Realtek Corp. for their great support!
++  
++*/
++
++
++
++#include "r8180_hw.h"
++#include "r8180_rtl8225.h"
++#ifdef ENABLE_DOT11D
++#include "dot11d.h"
++#endif
++
++#define USE_8051_3WIRE 1
++
++u8 rtl8225_threshold[]={
++	0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
++};
++
++u8 rtl8225_gain[]={
++	0x23,0x88,0x7c,0xa5,// -82dbm 
++	0x23,0x88,0x7c,0xb5,// -82dbm 
++	0x23,0x88,0x7c,0xc5,// -82dbm 
++	0x33,0x80,0x79,0xc5,// -78dbm 
++	0x43,0x78,0x76,0xc5,// -74dbm 
++	0x53,0x60,0x73,0xc5,// -70dbm 
++	0x63,0x58,0x70,0xc5,// -66dbm 
++};
++
++u16 rtl8225bcd_rxgain[]={	
++	0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
++	0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,  
++	0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
++	0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 
++	0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
++	0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
++	0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
++	0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
++	0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,  
++	0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,  
++	0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,  
++	0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
++
++};
++
++
++
++u8 rtl8225_tx_gain_cck_ofdm[]={
++	0x02,0x06,0x0e,0x1e,0x3e,0x7e
++};
++
++
++u8 rtl8225_tx_power_ofdm[]={
++	0x80,0x90,0xa2,0xb5,0xcb,0xe4
++};
++
++
++u8 rtl8225_tx_power_cck_ch14[]={
++	0x18,0x17,0x15,0x0c,0x00,0x00,0x00,0x00,
++	0x1b,0x1a,0x17,0x0e,0x00,0x00,0x00,0x00,
++	0x1f,0x1e,0x1a,0x0f,0x00,0x00,0x00,0x00,
++	0x22,0x21,0x1d,0x11,0x00,0x00,0x00,0x00,
++	0x26,0x25,0x21,0x13,0x00,0x00,0x00,0x00,
++	0x2b,0x2a,0x25,0x15,0x00,0x00,0x00,0x00
++};
++
++
++u8 rtl8225_tx_power_cck[]={
++	0x18,0x17,0x15,0x11,0x0c,0x08,0x04,0x02,
++	0x1b,0x1a,0x17,0x13,0x0e,0x09,0x04,0x02,
++	0x1f,0x1e,0x1a,0x15,0x10,0x0a,0x05,0x02,
++	0x22,0x21,0x1d,0x18,0x11,0x0b,0x06,0x02,
++	0x26,0x25,0x21,0x1b,0x14,0x0d,0x06,0x03,
++	0x2b,0x2a,0x25,0x1e,0x16,0x0e,0x07,0x03
++};
++
++u8 rtl8225_agc[]={
++	0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9d,0x9c,0x9b,0x9a,0x99,0x98,0x97,0x96,
++	0x95,0x94,0x93,0x92,0x91,0x90,0x8f,0x8e,0x8d,0x8c,0x8b,0x8a,0x89,0x88,0x87,0x86,
++	0x85,0x84,0x83,0x82,0x81,0x80,0x3f,0x3e,0x3d,0x3c,0x3b,0x3a,0x39,0x38,0x37,0x36,
++	0x35,0x34,0x33,0x32,0x31,0x30,0x2f,0x2e,0x2d,0x2c,0x2b,0x2a,0x29,0x28,0x27,0x26,
++	0x25,0x24,0x23,0x22,0x21,0x20,0x1f,0x1e,0x1d,0x1c,0x1b,0x1a,0x19,0x18,0x17,0x16,
++	0x15,0x14,0x13,0x12,0x11,0x10,0x0f,0x0e,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,
++	0x05,0x04,0x03,0x02,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
++	0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
++};
++
++u32 rtl8225_chan[] = {
++	0,	//dummy channel 0
++	0x085c, //1	 
++	0x08dc, //2  
++	0x095c, //3  
++	0x09dc, //4  
++	0x0a5c, //5  
++	0x0adc, //6  
++	0x0b5c, //7  
++	0x0bdc, //8  
++	0x0c5c, //9 
++	0x0cdc, //10  
++	0x0d5c, //11  
++	0x0ddc, //12  
++	0x0e5c, //13 
++	//0x0f5c, //14
++	0x0f72, // 14  
++};
++
++void rtl8225_set_gain(struct net_device *dev, short gain)
++{
++	write_phy_ofdm(dev, 0x0d, rtl8225_gain[gain * 4]);
++	write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 4 + 2]);
++	write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 4 + 3]);
++	write_phy_ofdm(dev, 0x23, rtl8225_gain[gain * 4 + 1]);
++
++}
++
++
++void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
++{
++//in windows the delays in this function was del from 85 to 87,  
++//here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008  
++
++#ifdef USE_8051_3WIRE
++
++        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++        struct usb_device *udev = priv->udev;
++        //u8 bit;
++        //u16  wReg80, wReg82, wReg84;
++        u16  wReg80, wReg84;
++
++        wReg80 = read_nic_word(dev, RFPinsOutput);
++        wReg80 &= 0xfff3;
++//        wReg82 = read_nic_word(dev, RFPinsEnable);
++        wReg84 = read_nic_word(dev, RFPinsSelect);
++        // <RJ_NOTE> 3-wire should be controled by HW when we finish SW 3-wire programming. 2005.08.10, by rcnjko.
++        //wReg84 &= 0xfff0;
++        wReg84 &= 0xfff8; //modified by david according to windows segment code.
++
++        // We must set SW enabled before terminating HW 3-wire, 2005.07.29, by rcnjko.
++//        write_nic_word(dev, RFPinsEnable, (wReg82|0x0007));     // Set To Output Enable
++        write_nic_word(dev, RFPinsSelect, (wReg84|0x0007));     // Set To SW Switch
++//        force_pci_posting(dev);
++//        udelay(10); //
++
++        write_nic_word(dev, 0x80, (BB_HOST_BANG_EN|wReg80)); // Set SI_EN (RFLE)
++//        force_pci_posting(dev);
++//        udelay(2);
++        //twreg.struc.enableB = 0;
++        write_nic_word(dev, 0x80, (wReg80)); // Clear SI_EN (RFLE)
++//        force_pci_posting(dev);
++//        udelay(10);
++
++        usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++                               RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++                               adr, 0x8225, &data, 2, HZ / 2);
++
++ //       write_nic_word(dev, 0x80, (BB_HOST_BANG_EN|wReg80));
++//        force_pci_posting(dev);
++//        udelay(10);
++
++        write_nic_word(dev, 0x80, (wReg80|0x0004));
++        write_nic_word(dev, 0x84, (wReg84|0x0000));// Set To SW Switch
++
++        if(priv->card_type == USB)
++               ;// msleep(2);
++        else
++    ; //           rtl8185_rf_pins_enable(dev);
++
++#else
++	int i;
++	u16 out,select;
++	u8 bit;
++	u32 bangdata = (data << 4) | (adr & 0xf);
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
++		
++	write_nic_word(dev,RFPinsEnable,
++		(read_nic_word(dev,RFPinsEnable) | 0x7));
++	
++	select = read_nic_word(dev, RFPinsSelect);
++	
++	write_nic_word(dev, RFPinsSelect, select | 0x7 | 
++		((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
++	
++//	force_pci_posting(dev);
++//	udelay(10);
++	
++	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
++	
++//	force_pci_posting(dev);
++//	udelay(2);
++	
++	write_nic_word(dev, RFPinsOutput, out);
++	
++//	force_pci_posting(dev);
++//	udelay(10);
++	
++	
++	for(i=15; i>=0;i--){
++	
++		bit = (bangdata & (1<<i)) >> i;
++		
++		write_nic_word(dev, RFPinsOutput, bit | out);
++		
++		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
++		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
++
++		i--;
++		bit = (bangdata & (1<<i)) >> i;
++		
++		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
++		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
++
++		write_nic_word(dev, RFPinsOutput, bit | out);
++
++	}
++	
++	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
++	
++//	force_pci_posting(dev);
++//	udelay(10);
++
++	write_nic_word(dev, RFPinsOutput, out | 
++		((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));
++
++	write_nic_word(dev, RFPinsSelect, select | 
++		((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));	
++
++	if(priv->card_type == USB)
++	;//	msleep(2);
++	else
++//		rtl8185_rf_pins_enable(dev);
++#endif
++}
++
++
++void write_rtl8225_patch(struct net_device *dev, u8 adr, u16 data)
++{
++
++        int i;
++        u16 out,select;
++        u8 bit;
++        u32 bangdata = (data << 4) | (adr & 0xf);
++        struct r8180_priv *priv = ieee80211_priv(dev);
++
++        out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
++
++        write_nic_word(dev,RFPinsEnable,
++                (read_nic_word(dev,RFPinsEnable) | 0x7));
++
++        select = read_nic_word(dev, RFPinsSelect);
++
++        write_nic_word(dev, RFPinsSelect, select | 0x7 |
++                ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
++
++        force_pci_posting(dev);
++        udelay(10);
++
++        write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
++
++        force_pci_posting(dev);
++        udelay(2);
++
++        write_nic_word(dev, RFPinsOutput, out);
++
++        force_pci_posting(dev);
++        udelay(10);
++
++        for(i=15; i>=0;i--){
++
++                bit = (bangdata & (1<<i)) >> i;
++
++                write_nic_word(dev, RFPinsOutput, bit | out);
++
++                write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
++                write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
++
++                i--;
++                bit = (bangdata & (1<<i)) >> i;
++
++                write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
++                write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
++
++                write_nic_word(dev, RFPinsOutput, bit | out);
++
++        }
++	
++        write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
++
++        force_pci_posting(dev);
++        udelay(10);
++
++        write_nic_word(dev, RFPinsOutput, out |
++                ((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));
++
++        write_nic_word(dev, RFPinsSelect, select |
++                ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
++
++        if(priv->card_type == USB)
++                mdelay(2);
++        else
++                rtl8185_rf_pins_enable(dev);
++
++}
++
++void rtl8225_rf_close(struct net_device *dev)
++{
++	write_rtl8225(dev, 0x4, 0x1f);   
++	
++	force_pci_posting(dev);
++	mdelay(1);
++	
++	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_OFF);
++	rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_OFF);
++}
++
++#ifdef ENABLE_DOT11D
++//
++//	Description:
++//		Map dBm into Tx power index according to 
++//		current HW model, for example, RF and PA, and
++//		current wireless mode.
++//
++s8
++DbmToTxPwrIdx(
++	struct r8180_priv *priv,
++	WIRELESS_MODE	WirelessMode,
++	s32			PowerInDbm
++	)
++{
++ 	bool bUseDefault = true; 
++	s8 TxPwrIdx = 0;
++
++#ifdef CONFIG_RTL818X_S
++	//
++	// 071011, SD3 SY:
++	// OFDM Power in dBm = Index * 0.5 + 0 
++	// CCK Power in dBm = Index * 0.25 + 13
++	//
++	if(priv->card_8185 >= VERSION_8187S_B)
++	{
++		s32 tmp = 0;
++
++		if(WirelessMode == WIRELESS_MODE_G)
++		{
++			bUseDefault = false;
++			tmp = (2 * PowerInDbm);
++
++			if(tmp < 0) 
++				TxPwrIdx = 0; 
++			else if(tmp > 40) // 40 means 20 dBm.
++				TxPwrIdx = 40;
++			else 
++				TxPwrIdx = (s8)tmp;
++		}
++		else if(WirelessMode == WIRELESS_MODE_B)
++		{
++			bUseDefault = false;
++			tmp = (4 * PowerInDbm) - 52;
++
++			if(tmp < 0) 
++				TxPwrIdx = 0; 
++			else if(tmp > 28) // 28 means 20 dBm.
++				TxPwrIdx = 28;
++			else 
++				TxPwrIdx = (s8)tmp;
++		}
++	}
++#endif
++
++	//	
++	// TRUE if we want to use a default implementation.
++	// We shall set it to FALSE when we have exact translation formular 
++	// for target IC. 070622, by rcnjko.
++	//
++	if(bUseDefault)
++	{
++		if(PowerInDbm < 0)
++			TxPwrIdx = 0;
++		else if(PowerInDbm > 35)
++			TxPwrIdx = 35;
++		else
++			TxPwrIdx = (u8)PowerInDbm;
++	}
++
++	return TxPwrIdx;
++}
++#endif
++
++
++short rtl8225_rf_set_sens(struct net_device *dev, short sens)
++{
++	if (sens <0 || sens > 6) return -1;
++	
++	if(sens > 4)
++		write_rtl8225(dev, 0x0c, 0x850);
++	else	
++		write_rtl8225(dev, 0x0c, 0x50);
++
++	sens= 6-sens;
++	rtl8225_set_gain(dev, sens);
++	
++	write_phy_cck(dev, 0x41, rtl8225_threshold[sens]);
++	return 0;
++	
++}
++
++void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	int GainIdx;
++	int GainSetting;
++	int i;
++	u8 power;
++	u8 *cck_power_table;
++	u8 max_cck_power_level;
++	u8 max_ofdm_power_level;
++	u8 min_ofdm_power_level;	
++	u8 cck_power_level = 0xff & priv->chtxpwr[ch];
++	u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
++
++#ifdef ENABLE_DOT11D
++	if(IS_DOT11D_ENABLE(priv->ieee80211) &&
++		IS_DOT11D_STATE_DONE(priv->ieee80211) )
++	{
++		//PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(priv->ieee80211);
++		u8 MaxTxPwrInDbm = DOT11D_GetMaxTxPwrInDbm(priv->ieee80211, ch);
++		u8 CckMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_B, MaxTxPwrInDbm);
++		u8 OfdmMaxPwrIdx = DbmToTxPwrIdx(priv, WIRELESS_MODE_G, MaxTxPwrInDbm);
++
++		//printk("Max Tx Power dBm (%d) => CCK Tx power index : %d, OFDM Tx power index: %d\n", MaxTxPwrInDbm, CckMaxPwrIdx, OfdmMaxPwrIdx);
++
++		//printk("EEPROM channel(%d) => CCK Tx power index: %d, OFDM Tx power index: %d\n", 
++		//	ch, cck_power_level, ofdm_power_level); 
++
++		if(cck_power_level > CckMaxPwrIdx)
++			cck_power_level = CckMaxPwrIdx;
++		if(ofdm_power_level > OfdmMaxPwrIdx)
++			ofdm_power_level = OfdmMaxPwrIdx;
++	}
++
++	//priv->CurrentCckTxPwrIdx = cck_power_level;
++	//priv->CurrentOfdmTxPwrIdx = ofdm_power_level;
++#endif	
++
++	
++	if(priv->card_type == USB){
++		max_cck_power_level = 11;
++		max_ofdm_power_level = 25; //  12 -> 25
++		min_ofdm_power_level = 10;
++	}else{
++		max_cck_power_level = 35;
++		max_ofdm_power_level = 35;
++		min_ofdm_power_level = 0;
++	}
++	if( priv->TrSwitchState == TR_SW_TX )	
++	{
++		printk("SetTxPowerLevel8187(): Origianl OFDM Tx power level %d\n", ofdm_power_level); 
++		ofdm_power_level -= GetTxOfdmHighPowerBias(dev);
++		cck_power_level -= GetTxCckHighPowerBias(dev);
++		printk("SetTxPowerLevel8187(): Adjusted OFDM Tx power level %d for we are in High Power state\n", 
++				ofdm_power_level); 
++		printk("SetTxPowerLevel8187(): Adjusted CCK Tx power level %d for we are in High Power state\n",
++			       cck_power_level); 
++	}
++
++
++
++	/* CCK power setting */
++	if(cck_power_level > max_cck_power_level)
++		cck_power_level = max_cck_power_level;
++	GainIdx=cck_power_level % 6;
++	GainSetting=cck_power_level / 6;
++	
++	if(ch == 14) 
++		cck_power_table = rtl8225_tx_power_cck_ch14;
++	else 
++		cck_power_table = rtl8225_tx_power_cck;
++	
++//	if(priv->card_8185 == 1 && priv->card_8185_Bversion ){
++		/*Ver B*/
++//		write_nic_byte(dev, TX_GAIN_CCK, rtl8225_tx_gain_cck_ofdm[GainSetting]);
++//	}else{
++		/*Ver C - D */
++	write_nic_byte(dev, CCK_TXAGC, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
++//	}
++	
++	for(i=0;i<8;i++){
++	
++		power = cck_power_table[GainIdx * 8 + i];
++		write_phy_cck(dev, 0x44 + i, power);
++	}
++	
++	/* FIXME Is this delay really needeed ? */
++	force_pci_posting(dev);
++	mdelay(1);
++	
++	/* OFDM power setting */
++//  Old:
++//	if(ofdm_power_level > max_ofdm_power_level)
++//		ofdm_power_level = 35;
++//	ofdm_power_level += min_ofdm_power_level;
++//  Latest:
++	if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
++		ofdm_power_level = max_ofdm_power_level;
++	else
++		ofdm_power_level += min_ofdm_power_level;
++	if(ofdm_power_level > 35)
++		ofdm_power_level = 35;
++//
++	
++	GainIdx=ofdm_power_level % 6;
++	GainSetting=ofdm_power_level / 6;
++#if 1 	
++//	if(priv->card_type == USB){
++		rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
++	
++		write_phy_ofdm(dev,2,0x42);
++		write_phy_ofdm(dev,6,0);
++		write_phy_ofdm(dev,8,0);	
++//	}
++#endif
++//	if(priv->card_8185 == 1 && priv->card_8185_Bversion){
++//		/*Ver B*/
++//		write_nic_byte(dev, TX_GAIN_OFDM, rtl8225_tx_gain_cck_ofdm[GainSetting]);
++//	}else{
++		/*Ver C - D */
++	write_nic_byte(dev, OFDM_TXAGC, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
++//	}
++				
++			
++	power = rtl8225_tx_power_ofdm[GainIdx];
++	
++	write_phy_ofdm(dev, 0x5, power);
++	write_phy_ofdm(dev, 0x7, power);
++	
++	force_pci_posting(dev);
++	mdelay(1);
++	//write_nic_byte(dev, TX_AGC_CONTROL,4);
++}
++
++void rtl8225_rf_set_chan(struct net_device *dev, short ch)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	short gset = (priv->ieee80211->state == IEEE80211_LINKED &&
++		ieee80211_is_54g(priv->ieee80211->current_network)) ||
++		priv->ieee80211->iw_mode == IW_MODE_MONITOR;
++	int eifs_addr;
++	
++	if(NIC_8187 == priv->card_8187) {
++		eifs_addr = EIFS_8187;
++	} else {
++		eifs_addr = EIFS_8187B;
++	}	
++
++#ifdef ENABLE_DOT11D	
++	if(!IsLegalChannel(priv->ieee80211, ch) )
++	{
++		printk("channel(%d). is invalide\n",  ch);
++		return;
++	}
++#endif		
++	
++	rtl8225_SetTXPowerLevel(dev, ch);
++	
++	write_rtl8225(dev, 0x7, rtl8225_chan[ch]);
++	
++	force_pci_posting(dev);
++	mdelay(10);
++	
++	write_nic_byte(dev,SIFS,0x22);// SIFS: 0x22
++	
++	if(gset)
++		write_nic_byte(dev,DIFS,20); //DIFS: 20 
++	else
++		write_nic_byte(dev,DIFS,0x24); //DIFS: 36 
++	
++	if(priv->ieee80211->state == IEEE80211_LINKED &&
++		ieee80211_is_shortslot(priv->ieee80211->current_network))
++		write_nic_byte(dev,SLOT,0x9); //SLOT: 9
++		
++	else
++		write_nic_byte(dev,SLOT,0x14); //SLOT: 20 (0x14)
++		
++	
++	if(gset){
++		write_nic_byte(dev,eifs_addr,91 - 20); // EIFS: 91 (0x5B)
++		write_nic_byte(dev,CW_VAL,0x73); //CW VALUE: 0x37
++		//DMESG("using G net params");
++	}else{
++		write_nic_byte(dev,eifs_addr,91 - 0x24); // EIFS: 91 (0x5B)
++		write_nic_byte(dev,CW_VAL,0xa5); //CW VALUE: 0x37
++		//DMESG("using B net params");
++	}
++
++
++}
++
++void rtl8225_host_pci_init(struct net_device *dev) 
++{
++	write_nic_word(dev, RFPinsOutput, 0x480);
++	
++	rtl8185_rf_pins_enable(dev);
++	
++	//if(priv->card_8185 == 2 && priv->enable_gpio0 ) /* version D */
++	//write_nic_word(dev, RFPinsSelect, 0x88);
++	//else
++	write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO); /* 0x488 | SW_CONTROL_GPIO */
++	
++	write_nic_byte(dev, GP_ENABLE, 0);
++	
++	force_pci_posting(dev);
++	mdelay(200);
++	
++	write_nic_word(dev, GP_ENABLE, 0xff & (~(1<<6))); /* bit 6 is for RF on/off detection */
++
++	
++}
++
++void rtl8225_host_usb_init(struct net_device *dev) 
++{
++	write_nic_byte(dev,RFPinsSelect+1,0);
++
++	write_nic_byte(dev,GPIO,0);
++	
++	write_nic_byte_E(dev,0x53,read_nic_byte_E(dev,0x53) | (1<<7));
++		
++	write_nic_byte(dev,RFPinsSelect+1,4);
++
++	write_nic_byte(dev,GPIO,0x20);
++
++	write_nic_byte(dev,GP_ENABLE,0);
++
++			
++	/* Config BB & RF */	
++	write_nic_word(dev, RFPinsOutput, 0x80);
++
++	write_nic_word(dev, RFPinsSelect, 0x80);
++
++	write_nic_word(dev, RFPinsEnable, 0x80);
++
++	
++	mdelay(100);
++
++	mdelay(1000); 
++
++}
++
++void rtl8225_rf_init(struct net_device *dev) 
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int i;
++	short channel = 1;
++	u16 brsr;
++	int brsr_addr;
++	
++	if(NIC_8187 == priv->card_8187) {
++		brsr_addr = BRSR_8187;
++	} else {
++		brsr_addr = BRSR_8187B;
++	}
++
++	
++	priv->chan = channel;
++
++	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
++	
++
++	if(priv->card_type == USB)
++		rtl8225_host_usb_init(dev);
++	else
++		rtl8225_host_pci_init(dev);
++
++	write_nic_dword(dev, RF_TIMING, 0x000a8008);
++	
++	//brsr = read_nic_word(dev, BRSR);
++	brsr = read_nic_word(dev, brsr_addr);
++	
++	//write_nic_word(dev, BRSR, 0xffff); 
++	write_nic_word(dev, brsr_addr, 0xffff); 
++
++	write_nic_dword(dev, RF_PARA, 0x100044);
++	
++	#if 1  //0->1
++	rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
++	write_nic_byte(dev, CONFIG3, 0x44);
++	rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
++	#endif
++	
++	if(priv->card_type == USB){
++		rtl8185_rf_pins_enable(dev);
++
++		mdelay(1000);
++	}
++
++	write_rtl8225(dev, 0x0, 0x67); mdelay(1);
++	
++	
++	write_rtl8225(dev, 0x1, 0xfe0); mdelay(1);
++
++	write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
++
++	write_rtl8225(dev, 0x3, 0x441); mdelay(1);
++
++	if(priv->card_type == USB)
++		write_rtl8225(dev, 0x4, 0x486);
++	else
++		write_rtl8225(dev, 0x4, 0x8be);
++
++	mdelay(1);
++	
++	
++	/* version B & C */
++	
++	if(priv->card_type == USB)
++		write_rtl8225(dev, 0x5, 0xbc0);
++	else if(priv->card_type == MINIPCI)
++		write_rtl8225(dev, 0x5, 0xbc0 + 3 +(6<<3));
++	else
++		write_rtl8225(dev, 0x5, 0xbc0 + (6<<3));
++
++	 mdelay(1);
++//	}
++	
++	write_rtl8225(dev, 0x6, 0xae6);  mdelay(1);
++
++	write_rtl8225(dev, 0x7, ((priv->card_type == USB)? 0x82a : rtl8225_chan[channel]));  mdelay(1);
++
++	write_rtl8225(dev, 0x8, 0x1f);  mdelay(1);
++
++	write_rtl8225(dev, 0x9, 0x334);  mdelay(1);
++
++	write_rtl8225(dev, 0xa, 0xfd4);  mdelay(1);
++
++	write_rtl8225(dev, 0xb, 0x391);  mdelay(1);
++
++	write_rtl8225(dev, 0xc, 0x50);  mdelay(1);
++
++
++	write_rtl8225(dev, 0xd, 0x6db);   mdelay(1);
++
++	write_rtl8225(dev, 0xe, 0x29);  mdelay(1);
++
++	write_rtl8225(dev, 0xf, 0x914); 
++	
++	if(priv->card_type == USB){
++		//force_pci_posting(dev);
++		mdelay(100);
++	}
++	
++	write_rtl8225(dev, 0x2, 0xc4d);
++	
++	if(priv->card_type == USB){
++	//	force_pci_posting(dev);
++		mdelay(200);
++		
++		write_rtl8225(dev, 0x2, 0x44d);
++		
++	//	force_pci_posting(dev);
++		mdelay(100);
++		
++	}//End of if(priv->card_type == USB)
++	/* FIXME!! rtl8187 we have to check if calibrarion
++	 * is successful and eventually cal. again (repeat
++	 * the two write on reg 2)
++	*/
++	force_pci_posting(dev);
++	
++	mdelay(100); //200 for 8187 
++	
++	//if(priv->card_type != USB) /* maybe not needed even for 8185 */
++//	write_rtl8225(dev, 0x7, rtl8225_chan[channel]); 
++	
++	write_rtl8225(dev, 0x0, 0x127);
++	
++	for(i=0;i<95;i++){
++		write_rtl8225(dev, 0x1, (u8)(i+1));
++		
++		/* version B & C & D*/
++		
++		write_rtl8225(dev, 0x2, rtl8225bcd_rxgain[i]);
++	}
++	
++	write_rtl8225(dev, 0x0, 0x27);
++
++
++//	//if(priv->card_type != USB){
++//		write_rtl8225(dev, 0x2, 0x44d);
++//		write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
++//		write_rtl8225(dev, 0x2, 0x47d);
++//		
++//		force_pci_posting(dev);
++//		mdelay(100);
++//		
++//		write_rtl8225(dev, 0x2, 0x44d);
++//	//}
++	
++	write_rtl8225(dev, 0x0, 0x22f);   
++	
++	if(priv->card_type != USB)
++		rtl8185_rf_pins_enable(dev);
++	
++	for(i=0;i<128;i++){
++		write_phy_ofdm(dev, 0xb, rtl8225_agc[i]);
++		
++		mdelay(1); 
++		write_phy_ofdm(dev, 0xa, (u8)i+ 0x80);
++	
++		mdelay(1); 
++	}
++	
++	force_pci_posting(dev);
++	mdelay(1);
++	
++	write_phy_ofdm(dev, 0x0, 0x1); mdelay(1);
++	write_phy_ofdm(dev, 0x1, 0x2); mdelay(1);
++	write_phy_ofdm(dev, 0x2, ((priv->card_type == USB)? 0x42 : 0x62)); mdelay(1);
++	write_phy_ofdm(dev, 0x3, 0x0); mdelay(1);
++	write_phy_ofdm(dev, 0x4, 0x0); mdelay(1);
++	write_phy_ofdm(dev, 0x5, 0x0); mdelay(1);
++	write_phy_ofdm(dev, 0x6, 0x40); mdelay(1);
++	write_phy_ofdm(dev, 0x7, 0x0); mdelay(1);
++	write_phy_ofdm(dev, 0x8, 0x40); mdelay(1);
++	write_phy_ofdm(dev, 0x9, 0xfe); mdelay(1);
++	
++			/* ver C & D */
++	write_phy_ofdm(dev, 0xa, 0x9); mdelay(1);
++
++	//write_phy_ofdm(dev, 0x18, 0xef); 
++	//	}
++	//}
++	write_phy_ofdm(dev, 0xb, 0x80); mdelay(1);
++
++	write_phy_ofdm(dev, 0xc, 0x1);mdelay(1);
++
++	
++	//if(priv->card_type != USB)
++	//write_phy_ofdm(dev, 0xd, 0x33); // <>
++		
++	write_phy_ofdm(dev, 0xe, 0xd3);mdelay(1);
++	
++	write_phy_ofdm(dev, 0xf, 0x38);mdelay(1);
++/*ver D & 8187*/
++//	}
++	
++//	if(priv->card_8185 == 1 && priv->card_8185_Bversion)
++//		write_phy_ofdm(dev, 0x10, 0x04);/*ver B*/
++//	else
++	write_phy_ofdm(dev, 0x10, 0x84);mdelay(1);
++/*ver C & D & 8187*/
++	
++	write_phy_ofdm(dev, 0x11, 0x06);mdelay(1);
++/*agc resp time 700*/
++
++	
++//	if(priv->card_8185 == 2){
++	/* Ver D & 8187*/
++	write_phy_ofdm(dev, 0x12, 0x20);mdelay(1);
++
++	write_phy_ofdm(dev, 0x13, 0x20);mdelay(1);
++
++	write_phy_ofdm(dev, 0x14, 0x0); mdelay(1);
++	write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
++	write_phy_ofdm(dev, 0x16, 0x0); mdelay(1);
++	write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
++	
++//	if (priv->card_type == USB)
++//		write_phy_ofdm(dev, 0x18, 0xef);
++	
++	write_phy_ofdm(dev, 0x18, 0xef);mdelay(1);
++ 
++
++	write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
++	write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
++	
++//	if (priv->card_type != USB){
++//		if(priv->card_8185 == 1 && priv->card_8185_Bversion)
++//			write_phy_ofdm(dev, 0x1b, 0x66); /* Ver B */
++//		else
++	write_phy_ofdm(dev, 0x1b, 0x76);mdelay(1);
++ /* Ver C & D */ //FIXME:MAYBE not needed
++//	}
++	
++	write_phy_ofdm(dev, 0x1c, 0x4);mdelay(1);
++
++		/*ver D & 8187*/
++	write_phy_ofdm(dev, 0x1e, 0x95);mdelay(1);
++
++	write_phy_ofdm(dev, 0x1f, 0x75);	mdelay(1);
++
++//	}
++	
++	write_phy_ofdm(dev, 0x20, 0x1f);mdelay(1);
++
++	write_phy_ofdm(dev, 0x21, 0x27);mdelay(1);
++	
++	write_phy_ofdm(dev, 0x22, 0x16);mdelay(1);
++
++//	if(priv->card_type != USB)
++	//write_phy_ofdm(dev, 0x23, 0x43); //FIXME maybe not needed // <>
++	
++	write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
++	write_phy_ofdm(dev, 0x25, 0x20); mdelay(1);
++	write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
++	write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
++/* Ver C & D & 8187*/
++	
++	// <> Set init. gain to m74dBm.
++	
++	rtl8225_set_gain(dev,4);
++	/*write_phy_ofdm(dev, 0x0d, 0x43);	 mdelay(1);
++	write_phy_ofdm(dev, 0x1b, 0x76);	 mdelay(1);
++	write_phy_ofdm(dev, 0x1d, 0xc5);	 mdelay(1);
++	write_phy_ofdm(dev, 0x23, 0x78);	 mdelay(1);
++*/
++	//if(priv->card_type == USB);
++	//	rtl8225_set_gain_usb(dev, 1); /* FIXME this '2' is random */
++		
++	write_phy_cck(dev, 0x0, 0x98); mdelay(1);
++	write_phy_cck(dev, 0x3, 0x20); mdelay(1);
++	write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
++	write_phy_cck(dev, 0x5, 0x12); mdelay(1);
++	write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
++	write_phy_cck(dev, 0x7, 0x78);mdelay(1);
++ /* Ver C & D & 8187*/
++
++	write_phy_cck(dev, 0x8, 0x2e);mdelay(1);
++
++	write_phy_cck(dev, 0x10, ((priv->card_type == USB) ? 0x9b: 0x93)); mdelay(1);
++	write_phy_cck(dev, 0x11, 0x88); mdelay(1);
++	write_phy_cck(dev, 0x12, 0x47); mdelay(1);
++	write_phy_cck(dev, 0x13, 0xd0); /* Ver C & D & 8187*/
++		
++	write_phy_cck(dev, 0x19, 0x0);
++	write_phy_cck(dev, 0x1a, 0xa0);
++	write_phy_cck(dev, 0x1b, 0x8);
++	write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */
++	
++	write_phy_cck(dev, 0x41, 0x8d);mdelay(1);
++
++	
++	write_phy_cck(dev, 0x42, 0x15); mdelay(1);
++	write_phy_cck(dev, 0x43, 0x18); mdelay(1);
++	write_phy_cck(dev, 0x44, 0x1f); mdelay(1);
++	write_phy_cck(dev, 0x45, 0x1e); mdelay(1);
++	write_phy_cck(dev, 0x46, 0x1a); mdelay(1);
++	write_phy_cck(dev, 0x47, 0x15); mdelay(1);
++	write_phy_cck(dev, 0x48, 0x10); mdelay(1);
++	write_phy_cck(dev, 0x49, 0xa); mdelay(1);
++	write_phy_cck(dev, 0x4a, 0x5); mdelay(1);
++	write_phy_cck(dev, 0x4b, 0x2); mdelay(1);
++	write_phy_cck(dev, 0x4c, 0x5);mdelay(1);
++
++
++	write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
++
++	
++
++// <>
++//	// TESTR 0xb 8187
++//	write_phy_cck(dev, 0x10, 0x93);// & 0xfb);
++//	
++//	//if(priv->card_type != USB){
++//		write_phy_ofdm(dev, 0x2, 0x62);
++//		write_phy_ofdm(dev, 0x6, 0x0);
++//		write_phy_ofdm(dev, 0x8, 0x0);
++//	//}
++	
++	rtl8225_SetTXPowerLevel(dev, channel);
++	
++	write_phy_cck(dev, 0x10, 0x9b); mdelay(1); /* Rx ant A, 0xdb for B */
++	write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); /* Rx ant A, 0x10 for B */
++	
++	rtl8185_tx_antenna(dev, 0x3); /* TX ant A, 0x0 for B */
++	
++	/* switch to high-speed 3-wire 
++	 * last digit. 2 for both cck and ofdm
++	 */
++	if(priv->card_type == USB)
++		write_nic_dword(dev, 0x94, 0x3dc00002);
++	else{
++		write_nic_dword(dev, 0x94, 0x15c00002);
++		rtl8185_rf_pins_enable(dev);
++	}
++
++//	if(priv->card_type != USB)
++//	rtl8225_set_gain(dev, 4); /* FIXME this '1' is random */ // <>
++//	 rtl8225_set_mode(dev, 1); /* FIXME start in B mode */ // <>
++//	
++//	/* make sure is waken up! */
++//	write_rtl8225(dev,0x4, 0x9ff);
++//	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON); 
++//	rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
++	
++	rtl8225_rf_set_chan(dev, priv->chan);
++
++	//write_nic_word(dev,BRSR,brsr);
++
++}
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_rtl8225.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_rtl8225.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,77 @@
++/*
++  This is part of the rtl8180-sa2400 driver
++  released under the GPL (See file COPYING for details).
++  Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
++  
++  This files contains programming code for the rtl8225 
++  radio frontend.
++  
++  *Many* thanks to Realtek Corp. for their great support!
++  
++*/
++
++#ifndef RTL8225H
++#define RTL8225H
++
++#include "r8187.h"
++
++#define RTL8225_ANAPARAM_ON  0xa0000a59
++
++// FIXME: OFF ANAPARAM MIGHT BE WRONG!
++#define RTL8225_ANAPARAM_OFF 0xa00beb59
++#define RTL8225_ANAPARAM2_OFF 0x840dec11
++
++#define RTL8225_ANAPARAM2_ON  0x860c7312
++
++void rtl8225_rf_init(struct net_device *dev);
++void rtl8225z2_rf_init(struct net_device *dev);
++void rtl8225z2_rf_set_chan(struct net_device *dev, short ch);
++short rtl8225_is_V_z2(struct net_device *dev);
++void rtl8225_rf_set_chan(struct net_device *dev,short ch);
++void rtl8225_rf_close(struct net_device *dev);
++short rtl8225_rf_set_sens(struct net_device *dev, short sens);
++void rtl8225_host_pci_init(struct net_device *dev);
++void rtl8225_host_usb_init(struct net_device *dev);
++void write_rtl8225(struct net_device *dev, u8 adr, u16 data);
++void rtl8225z2_rf_set_mode(struct net_device *dev) ;
++void rtl8185_rf_pins_enable(struct net_device *dev);
++void rtl8180_set_mode(struct net_device *dev,int mode);
++void UpdateInitialGain(struct net_device *dev);
++void UpdateCCKThreshold(struct net_device *dev);
++void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch);
++void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch);
++
++#define RTL8225_RF_MAX_SENS 6
++#define RTL8225_RF_DEF_SENS 4
++
++extern inline  char GetTxOfdmHighPowerBias(struct net_device *dev)
++{
++	//
++	// We should always adjust our Tx Power for 8187 and 8187B.
++	// It was ever recommended not to adjust Tx Power of 8187B with Atheros AP
++	// for throughput by David, but now we found it is not the issue to impact 
++	// the Atheros's problem and also no adjustion for Tx Power will cause "low" 
++	// throughput. By Bruce, 2007-07-03.
++	//
++	return 10;
++}
++
++//
++//	Description:
++//		Return Tx power level to minus if we are in high power state. 
++//
++//	Note: 
++//		Adjust it according to RF if required.
++//
++extern inline char GetTxCckHighPowerBias(struct net_device *dev)
++{
++	return 7;
++}
++
++
++
++extern u8 rtl8225_agc[];
++
++extern u32 rtl8225_chan[];
++
++#endif
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_rtl8225z2.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_rtl8225z2.c	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,2090 @@
++/*
++  This is part of the rtl8180-sa2400 driver
++  released under the GPL (See file COPYING for details).
++  Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
++  
++  This files contains programming code for the rtl8225 
++  radio frontend.
++  
++  *Many* thanks to Realtek Corp. for their great support!
++  
++*/
++
++
++
++#include "r8180_hw.h"
++#include "r8180_rtl8225.h"
++#ifdef ENABLE_DOT11D
++#include "dot11d.h"
++#endif
++
++//2005.11.16
++u8 rtl8225z2_threshold[]={
++        0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
++};
++
++//      0xd 0x19 0x1b 0x21
++u8 rtl8225z2_gain_bg[]={
++	0x23, 0x15, 0xa5, // -82-1dbm
++        0x23, 0x15, 0xb5, // -82-2dbm
++        0x23, 0x15, 0xc5, // -82-3dbm
++        0x33, 0x15, 0xc5, // -78dbm
++        0x43, 0x15, 0xc5, // -74dbm
++        0x53, 0x15, 0xc5, // -70dbm
++        0x63, 0x15, 0xc5, // -66dbm
++};
++
++u8 rtl8225z2_gain_a[]={
++	0x13,0x27,0x5a,//,0x37,// -82dbm 
++	0x23,0x23,0x58,//,0x37,// -82dbm 
++	0x33,0x1f,0x56,//,0x37,// -82dbm 
++	0x43,0x1b,0x54,//,0x37,// -78dbm 
++	0x53,0x17,0x51,//,0x37,// -74dbm 
++	0x63,0x24,0x4f,//,0x37,// -70dbm 
++	0x73,0x0f,0x4c,//,0x37,// -66dbm 
++};
++static u32 MAC_REG_TABLE[][3]={ 
++	{0xf0, 0x32, 0000}, {0xf1, 0x32, 0000}, {0xf2, 0x00, 0000}, {0xf3, 0x00, 0000}, 
++	{0xf4, 0x32, 0000}, {0xf5, 0x43, 0000}, {0xf6, 0x00, 0000}, {0xf7, 0x00, 0000},
++	{0xf8, 0x46, 0000}, {0xf9, 0xa4, 0000}, {0xfa, 0x00, 0000}, {0xfb, 0x00, 0000},
++	{0xfc, 0x96, 0000}, {0xfd, 0xa4, 0000}, {0xfe, 0x00, 0000}, {0xff, 0x00, 0000}, 
++
++	{0x58, 0x4b, 0001}, {0x59, 0x00, 0001}, {0x5a, 0x4b, 0001}, {0x5b, 0x00, 0001},
++	{0x60, 0x4b, 0001}, {0x61, 0x09, 0001}, {0x62, 0x4b, 0001}, {0x63, 0x09, 0001},
++	{0xce, 0x0f, 0001}, {0xcf, 0x00, 0001}, {0xe0, 0xff, 0001}, {0xe1, 0x0f, 0001},
++	{0xe2, 0x00, 0001}, {0xf0, 0x4e, 0001}, {0xf1, 0x01, 0001}, {0xf2, 0x02, 0001},
++	{0xf3, 0x03, 0001}, {0xf4, 0x04, 0001}, {0xf5, 0x05, 0001}, {0xf6, 0x06, 0001},
++	{0xf7, 0x07, 0001}, {0xf8, 0x08, 0001}, 
++
++	{0x4e, 0x00, 0002}, {0x0c, 0x04, 0002}, {0x21, 0x61, 0002}, {0x22, 0x68, 0002}, 
++	{0x23, 0x6f, 0002}, {0x24, 0x76, 0002}, {0x25, 0x7d, 0002}, {0x26, 0x84, 0002}, 
++	{0x27, 0x8d, 0002}, {0x4d, 0x08, 0002}, {0x50, 0x05, 0002}, {0x51, 0xf5, 0002}, 
++	{0x52, 0x04, 0002}, {0x53, 0xa0, 0002}, {0x54, 0x1f, 0002}, {0x55, 0x23, 0002}, 
++	{0x56, 0x45, 0002}, {0x57, 0x67, 0002}, {0x58, 0x08, 0002}, {0x59, 0x08, 0002}, 
++	{0x5a, 0x08, 0002}, {0x5b, 0x08, 0002}, {0x60, 0x08, 0002}, {0x61, 0x08, 0002}, 
++	{0x62, 0x08, 0002}, {0x63, 0x08, 0002}, {0x64, 0xcf, 0002}, {0x72, 0x56, 0002}, 
++	{0x73, 0x9a, 0002},
++
++	{0x34, 0xf0, 0000}, {0x35, 0x0f, 0000}, {0x5b, 0x40, 0000}, {0x84, 0x88, 0000},
++	{0x85, 0x24, 0000}, {0x88, 0x54, 0000}, {0x8b, 0xb8, 0000}, {0x8c, 0x07, 0000},
++	{0x8d, 0x00, 0000}, {0x94, 0x1b, 0000}, {0x95, 0x12, 0000}, {0x96, 0x00, 0000},
++	{0x97, 0x06, 0000}, {0x9d, 0x1a, 0000}, {0x9f, 0x10, 0000}, {0xb4, 0x22, 0000},
++	{0xbe, 0x80, 0000}, {0xdb, 0x00, 0000}, {0xee, 0x00, 0000}, {0x91, 0x01, 0000},
++	//lzm mode 0x91 form 0x03->0x01 open GPIO BIT1, 
++	//because Polling methord will rurn off Radio
++	//the first time when read GPI(0x92).
++	//because after 0x91:bit1 form 1->0, there will 
++	//be time for 0x92:bit1 form 0->1
++
++	{0x4c, 0x00, 0002}, {0x9f, 0x00, 0003}, {0x8c, 0x01, 0000}, {0x8d, 0x10, 0000},
++	{0x8e, 0x08, 0000}, {0x8f, 0x00, 0000}
++};
++
++static u8  ZEBRA_AGC[]={
++	0,
++	0x5e,0x5e,0x5e,0x5e,0x5d,0x5b,0x59,0x57,0x55,0x53,0x51,0x4f,0x4d,0x4b,0x49,0x47,
++	0x45,0x43,0x41,0x3f,0x3d,0x3b,0x39,0x37,0x35,0x33,0x31,0x2f,0x2d,0x2b,0x29,0x27,
++	0x25,0x23,0x21,0x1f,0x1d,0x1b,0x19,0x17,0x15,0x13,0x11,0x0f,0x0d,0x0b,0x09,0x07,
++	0x05,0x03,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
++	0x19,0x19,0x19,0x019,0x19,0x19,0x19,0x19,0x19,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
++	0x26,0x27,0x27,0x28,0x28,0x29,0x2a,0x2a,0x2a,0x2b,0x2b,0x2b,0x2c,0x2c,0x2c,0x2d,
++	0x2d,0x2d,0x2d,0x2e,0x2e,0x2e,0x2e,0x2f,0x2f,0x2f,0x30,0x30,0x31,0x31,0x31,0x31,
++	0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31,0x31
++};
++
++static u32 ZEBRA_RF_RX_GAIN_TABLE[]={	
++	0,
++	0x0400,0x0401,0x0402,0x0403,0x0404,0x0405,0x0408,0x0409,
++	0x040a,0x040b,0x0502,0x0503,0x0504,0x0505,0x0540,0x0541,
++	0x0542,0x0543,0x0544,0x0545,0x0580,0x0581,0x0582,0x0583,
++	0x0584,0x0585,0x0588,0x0589,0x058a,0x058b,0x0643,0x0644,
++	0x0645,0x0680,0x0681,0x0682,0x0683,0x0684,0x0685,0x0688,
++	0x0689,0x068a,0x068b,0x068c,0x0742,0x0743,0x0744,0x0745,
++	0x0780,0x0781,0x0782,0x0783,0x0784,0x0785,0x0788,0x0789,
++	0x078a,0x078b,0x078c,0x078d,0x0790,0x0791,0x0792,0x0793,
++	0x0794,0x0795,0x0798,0x0799,0x079a,0x079b,0x079c,0x079d,  
++	0x07a0,0x07a1,0x07a2,0x07a3,0x07a4,0x07a5,0x07a8,0x07a9,  
++	0x03aa,0x03ab,0x03ac,0x03ad,0x03b0,0x03b1,0x03b2,0x03b3,
++	0x03b4,0x03b5,0x03b8,0x03b9,0x03ba,0x03bb,0x03bb
++};
++
++// Use the new SD3 given param, by shien chang, 2006.07.14
++
++static u8 OFDM_CONFIG[]={
++			// 0x00
++	0x10, 0x0d, 0x01, 0x00, 0x14, 0xfb, 0xfb, 0x60, 
++	0x00, 0x60, 0x00, 0x00, 0x00, 0x5c, 0x00, 0x00, 
++			
++			// 0x10
++	0x40, 0x00, 0x40, 0x00, 0x00, 0x00, 0xa8, 0x26, 
++	0x32, 0x33, 0x07, 0xa5, 0x6f, 0x55, 0xc8, 0xb3, 
++			
++			// 0x20
++	0x0a, 0xe1, 0x2C, 0x8a, 0x86, 0x83, 0x34, 0x0f, 
++	0x4f, 0x24, 0x6f, 0xc2, 0x6b, 0x40, 0x80, 0x00, 
++			
++			// 0x30
++	0xc0, 0xc1, 0x58, 0xf1, 0x00, 0xe4, 0x90, 0x3e, 
++	0x6d, 0x3c, 0xfb, 0x07//0xc7
++		};
++
++//2005.11.16,
++u8 ZEBRA2_CCK_OFDM_GAIN_SETTING[]={
++        0x00,0x01,0x02,0x03,0x04,0x05,
++        0x06,0x07,0x08,0x09,0x0a,0x0b,
++        0x0c,0x0d,0x0e,0x0f,0x10,0x11,
++        0x12,0x13,0x14,0x15,0x16,0x17,
++        0x18,0x19,0x1a,0x1b,0x1c,0x1d,
++        0x1e,0x1f,0x20,0x21,0x22,0x23,
++};
++//-
++u16 rtl8225z2_rxgain[]={	
++	0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
++	0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,  
++	0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
++	0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 
++	0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
++	0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
++	0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
++	0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
++	0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,  
++	0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,  
++	0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,  
++	0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
++
++};
++
++
++/*
++ from 0 to 0x23
++u8 rtl8225_tx_gain_cck_ofdm[]={
++	0x02,0x06,0x0e,0x1e,0x3e,0x7e
++};
++*/
++
++//-
++u8 rtl8225z2_tx_power_ofdm[]={
++	0x42,0x00,0x40,0x00,0x40
++};
++
++
++//-
++u8 rtl8225z2_tx_power_cck_ch14[]={
++	0x36,0x35,0x2e,0x1b,0x00,0x00,0x00,0x00,
++	0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
++	0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
++	0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
++};
++
++
++//-
++u8 rtl8225z2_tx_power_cck[]={
++	0x36,0x35,0x2e,0x25,0x1c,0x12,0x09,0x04,
++	0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03,
++	0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03,
++	0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03
++};
++
++#ifdef ENABLE_DOT11D
++//
++//	Description:
++//		Map dBm into Tx power index according to 
++//		current HW model, for example, RF and PA, and
++//		current wireless mode.
++//
++s8
++rtl8187B_DbmToTxPwrIdx(
++	struct r8180_priv *priv,
++	WIRELESS_MODE	WirelessMode,
++	s32			PowerInDbm
++	)
++{
++ 	bool bUseDefault = true; 
++	s8 TxPwrIdx = 0;
++
++#ifdef CONFIG_RTL818X_S
++	//
++	// 071011, SD3 SY:
++	// OFDM Power in dBm = Index * 0.5 + 0 
++	// CCK Power in dBm = Index * 0.25 + 13
++	//
++	if(priv->card_8185 >= VERSION_8187S_B)
++	{
++		s32 tmp = 0;
++
++		if(WirelessMode == WIRELESS_MODE_G)
++		{
++			bUseDefault = false;
++			tmp = (2 * PowerInDbm);
++
++			if(tmp < 0) 
++				TxPwrIdx = 0; 
++			else if(tmp > 40) // 40 means 20 dBm.
++				TxPwrIdx = 40;
++			else 
++				TxPwrIdx = (s8)tmp;
++		}
++		else if(WirelessMode == WIRELESS_MODE_B)
++		{
++			bUseDefault = false;
++			tmp = (4 * PowerInDbm) - 52;
++
++			if(tmp < 0) 
++				TxPwrIdx = 0; 
++			else if(tmp > 28) // 28 means 20 dBm.
++				TxPwrIdx = 28;
++			else 
++				TxPwrIdx = (s8)tmp;
++		}
++	}
++#endif
++
++	//	
++	// TRUE if we want to use a default implementation.
++	// We shall set it to FALSE when we have exact translation formular 
++	// for target IC. 070622, by rcnjko.
++	//
++	if(bUseDefault)
++	{
++		if(PowerInDbm < 0)
++			TxPwrIdx = 0;
++		else if(PowerInDbm > 35)
++			TxPwrIdx = 35;
++		else
++			TxPwrIdx = (u8)PowerInDbm;
++	}
++
++	return TxPwrIdx;
++}
++#endif
++
++
++void rtl8225z2_set_gain(struct net_device *dev, short gain)
++{
++	u8* rtl8225_gain;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	u8 mode = priv->ieee80211->mode;
++	
++	if(mode == IEEE_B || mode == IEEE_G)
++		rtl8225_gain = rtl8225z2_gain_bg;
++	else
++		rtl8225_gain = rtl8225z2_gain_a;
++		
++	//write_phy_ofdm(dev, 0x0d, rtl8225_gain[gain * 3]);
++	//write_phy_ofdm(dev, 0x19, rtl8225_gain[gain * 3 + 1]);
++	//write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 3 + 2]);
++        //2005.11.17, by ch-hsu
++        write_phy_ofdm(dev, 0x0b, rtl8225_gain[gain * 3]);
++        write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 3 + 1]);
++        write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 3 + 2]);
++	write_phy_ofdm(dev, 0x21, 0x37);
++
++}
++
++u32 read_rtl8225(struct net_device *dev, u8 adr)
++{
++	u32 data2Write = ((u32)(adr & 0x1f)) << 27;
++	u32 dataRead;
++	u32 mask;
++	u16 oval,oval2,oval3,tmp;
++//	ThreeWireReg twreg;
++//	ThreeWireReg tdata;
++	int i;
++	short bit, rw;
++	
++	u8 wLength = 6;
++	u8 rLength = 12;
++	u8 low2high = 0;
++
++	oval = read_nic_word(dev, RFPinsOutput);
++	oval2 = read_nic_word(dev, RFPinsEnable);
++	oval3 = read_nic_word(dev, RFPinsSelect);
++	write_nic_word(dev, RFPinsEnable, (oval2|0xf));
++	write_nic_word(dev, RFPinsSelect, (oval3|0xf));
++
++	dataRead = 0;
++
++	oval &= ~0xf; 
++
++	write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN ); udelay(4);
++
++	write_nic_word(dev, RFPinsOutput, oval ); udelay(5);
++	
++	rw = 0;
++	
++	mask = (low2high) ? 0x01 : (((u32)0x01)<<(32-1));
++	for(i = 0; i < wLength/2; i++)
++	{
++		bit = ((data2Write&mask) != 0) ? 1 : 0;
++		write_nic_word(dev, RFPinsOutput, bit|oval | rw); udelay(1);
++		
++		write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
++		write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
++
++		mask = (low2high) ? (mask<<1): (mask>>1);
++
++		if(i == 2)
++		{
++			rw = BB_HOST_BANG_RW;
++			write_nic_word(dev, RFPinsOutput, bit|oval | BB_HOST_BANG_CLK | rw); udelay(2);
++			write_nic_word(dev, RFPinsOutput, bit|oval | rw); udelay(2);
++			break;
++		}
++		
++		bit = ((data2Write&mask) != 0) ? 1: 0;
++		
++		write_nic_word(dev, RFPinsOutput, oval|bit|rw| BB_HOST_BANG_CLK); udelay(2);
++		write_nic_word(dev, RFPinsOutput, oval|bit|rw| BB_HOST_BANG_CLK); udelay(2);
++
++		write_nic_word(dev, RFPinsOutput, oval| bit |rw); udelay(1);
++
++		mask = (low2high) ? (mask<<1) : (mask>>1);
++	}
++
++	//twreg.struc.clk = 0;
++	//twreg.struc.data = 0;
++	write_nic_word(dev, RFPinsOutput, rw|oval); udelay(2);
++	mask = (low2high) ? 0x01 : (((u32)0x01) << (12-1));
++	
++	// We must set data pin to HW controled, otherwise RF can't driver it and 
++	// value RF register won't be able to read back properly. 2006.06.13, by rcnjko.
++	write_nic_word(dev, RFPinsEnable,((oval2|0xe) & (~0x01)));
++
++	for(i = 0; i < rLength; i++)
++	{
++		write_nic_word(dev, RFPinsOutput, rw|oval); udelay(1);
++		
++		write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
++		write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
++		write_nic_word(dev, RFPinsOutput, rw|oval|BB_HOST_BANG_CLK); udelay(2);
++		tmp = read_nic_word(dev, RFPinsInput);
++		
++		dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0);
++
++		write_nic_word(dev, RFPinsOutput, (rw|oval)); udelay(2);
++
++		mask = (low2high) ? (mask<<1) : (mask>>1);
++	}
++	
++	write_nic_word(dev, RFPinsOutput, BB_HOST_BANG_EN|BB_HOST_BANG_RW|oval); udelay(2);
++
++	write_nic_word(dev, RFPinsEnable, oval2);   
++	write_nic_word(dev, RFPinsSelect, oval3);   // Set To SW Switch
++	write_nic_word(dev, RFPinsOutput, 0x3a0);
++
++	return dataRead;
++	
++}
++short rtl8225_is_V_z2(struct net_device *dev)
++{
++	short vz2 = 1;
++	//set VCO-PDN pin
++//	printk("%s()\n", __FUNCTION__);
++	write_nic_word(dev, RFPinsOutput, 0x0080);
++	write_nic_word(dev, RFPinsSelect, 0x0080);
++	write_nic_word(dev, RFPinsEnable, 0x0080);
++
++	//lzm mod for up take too long time 20081201
++	//mdelay(100);
++	//mdelay(1000);
++	
++	/* sw to reg pg 1 */
++	write_rtl8225(dev, 0, 0x1b7);
++	/* reg 8 pg 1 = 23*/
++	if( read_rtl8225(dev, 8) != 0x588)
++		vz2 = 0;
++	
++	else	/* reg 9 pg 1 = 24 */ 
++		if( read_rtl8225(dev, 9) != 0x700)
++			vz2 = 0;
++
++	/* sw back to pg 0 */	
++	write_rtl8225(dev, 0, 0xb7);
++
++	return vz2;
++	
++}
++
++void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++//	int GainIdx;
++//	int GainSetting;
++	int i;
++	u8 power;
++	u8 *cck_power_table;
++	u8 max_cck_power_level;
++	u8 min_cck_power_level;
++	u8 max_ofdm_power_level;
++	u8 min_ofdm_power_level;	
++	s8 cck_power_level = 0xff & priv->chtxpwr[ch];
++	s8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
++	u8 hw_version = priv->card_8187_Bversion;
++	
++#ifdef ENABLE_DOT11D
++	if(IS_DOT11D_ENABLE(priv->ieee80211) &&
++		IS_DOT11D_STATE_DONE(priv->ieee80211) )
++	{
++		//PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(priv->ieee80211);
++		u8 MaxTxPwrInDbm = DOT11D_GetMaxTxPwrInDbm(priv->ieee80211, ch);
++		u8 CckMaxPwrIdx = rtl8187B_DbmToTxPwrIdx(priv, WIRELESS_MODE_B, MaxTxPwrInDbm);
++		u8 OfdmMaxPwrIdx = rtl8187B_DbmToTxPwrIdx(priv, WIRELESS_MODE_G, MaxTxPwrInDbm);
++
++		//printk("Max Tx Power dBm (%d) => CCK Tx power index : %d, OFDM Tx power index: %d\n", MaxTxPwrInDbm, CckMaxPwrIdx, OfdmMaxPwrIdx);
++
++		//printk("EEPROM channel(%d) => CCK Tx power index: %d, OFDM Tx power index: %d\n", 
++		//	ch, cck_power_level, ofdm_power_level); 
++
++		if(cck_power_level > CckMaxPwrIdx)
++			cck_power_level = CckMaxPwrIdx;
++		if(ofdm_power_level > OfdmMaxPwrIdx)
++			ofdm_power_level = OfdmMaxPwrIdx;
++	}
++
++	//priv->CurrentCckTxPwrIdx = cck_power_level;
++	//priv->CurrentOfdmTxPwrIdx = ofdm_power_level;
++#endif	
++
++	if (NIC_8187B == priv->card_8187)
++	{
++		if (hw_version == VERSION_8187B_B)
++		{
++			min_cck_power_level = 0;
++			max_cck_power_level = 15;
++			min_ofdm_power_level = 2;
++			max_ofdm_power_level = 17;
++		}else
++		{	
++			min_cck_power_level = 7;
++			max_cck_power_level = 22;
++			min_ofdm_power_level = 10;
++			max_ofdm_power_level = 25;
++		}
++
++		if( priv->TrSwitchState == TR_SW_TX )	
++		{
++			//printk("SetTxPowerLevel8187(): Origianl OFDM Tx power level %d, adjust value = %d\n", ofdm_power_level,GetTxOfdmHighPowerBias(dev)); 
++			ofdm_power_level -= GetTxOfdmHighPowerBias(dev);
++			cck_power_level -= GetTxCckHighPowerBias(dev);
++			//printk("SetTxPowerLevel8187(): Adjusted OFDM Tx power level %d for we are in High Power state\n", 
++			//		ofdm_power_level); 
++			//printk("SetTxPowerLevel8187(): Adjusted CCK Tx power level %d for we are in High Power state\n",
++			//		cck_power_level); 
++		}		
++		/* CCK power setting */
++		if(cck_power_level > (max_cck_power_level -min_cck_power_level))
++			cck_power_level = max_cck_power_level;
++		else
++			cck_power_level += min_cck_power_level; 
++		cck_power_level += priv->cck_txpwr_base;
++		
++		if(cck_power_level > 35)
++			cck_power_level = 35;
++		if(cck_power_level < 0)
++			cck_power_level = 0;
++			
++		if(ch == 14) 
++			cck_power_table = rtl8225z2_tx_power_cck_ch14;
++		else 
++			cck_power_table = rtl8225z2_tx_power_cck;
++		if (hw_version == VERSION_8187B_B)
++		{
++			if (cck_power_level <= 6){
++			}
++			else if (cck_power_level <=11){
++				cck_power_table += 8;
++			}
++			else{
++				cck_power_table += (8*2);
++			}
++		}else{
++			if (cck_power_level<=5){
++			}else if(cck_power_level<=11){
++				cck_power_table += 8;
++			}else if(cck_power_level <= 17){
++				cck_power_table += 8*2;
++			}else{
++				cck_power_table += 8*3;
++			}
++		}	
++			
++		
++		
++		for(i=0;i<8;i++){
++		
++			power = cck_power_table[i];
++			write_phy_cck(dev, 0x44 + i, power);
++		}
++		
++		//write_nic_byte(dev, TX_GAIN_CCK, power);
++		//2005.11.17,
++		write_nic_byte(dev, CCK_TXAGC, (ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level]*2));
++		
++//		force_pci_posting(dev);
++//		msleep(1);
++//in windows the delay was del from 85 to 87, 
++//here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008  
++		
++		/* OFDM power setting */
++	//  Old:
++	//	if(ofdm_power_level > max_ofdm_power_level)
++	//		ofdm_power_level = 35;
++	//	ofdm_power_level += min_ofdm_power_level;
++	//  Latest:
++		if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
++			ofdm_power_level = max_ofdm_power_level;
++		else
++			ofdm_power_level += min_ofdm_power_level;
++		
++		ofdm_power_level += priv->ofdm_txpwr_base;
++			
++		if(ofdm_power_level > 35)
++			ofdm_power_level = 35;
++
++		if(ofdm_power_level < 0)
++			ofdm_power_level = 0;
++		write_nic_byte(dev, OFDM_TXAGC, ZEBRA2_CCK_OFDM_GAIN_SETTING[ofdm_power_level]*2);
++		
++		if (hw_version == VERSION_8187B_B)
++		{
++			if(ofdm_power_level<=11){
++				write_phy_ofdm(dev, 0x87, 0x60);
++				write_phy_ofdm(dev, 0x89, 0x60);
++			}
++			else{
++				write_phy_ofdm(dev, 0x87, 0x5c);
++				write_phy_ofdm(dev, 0x89, 0x5c);
++			}
++		}else{
++			if(ofdm_power_level<=11){
++				write_phy_ofdm(dev, 0x87, 0x5c);
++				write_phy_ofdm(dev, 0x89, 0x5c);
++			}
++			if(ofdm_power_level<=17){
++				write_phy_ofdm(dev, 0x87, 0x54);
++				write_phy_ofdm(dev, 0x89, 0x54);
++			}
++			else{
++				write_phy_ofdm(dev, 0x87, 0x50);
++				write_phy_ofdm(dev, 0x89, 0x50);
++			}
++		}
++//			force_pci_posting(dev);
++//			msleep(1);
++//in windows the delay was del from 85 to 87, 
++//and here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008  
++	}else if(NIC_8187 == priv->card_8187) {
++			min_cck_power_level = 0;
++			max_cck_power_level = 15;
++			min_ofdm_power_level = 10;
++			max_ofdm_power_level = 25;
++			if(cck_power_level > (max_cck_power_level -min_cck_power_level))
++				cck_power_level = max_cck_power_level;
++			else
++				cck_power_level += min_cck_power_level; 
++			cck_power_level += priv->cck_txpwr_base;
++			
++			if(cck_power_level > 35)
++				cck_power_level = 35;
++				
++			if(ch == 14) 
++				cck_power_table = rtl8225z2_tx_power_cck_ch14;
++			else 
++				cck_power_table = rtl8225z2_tx_power_cck;
++			for(i=0;i<8;i++){
++				power = cck_power_table[i];
++				write_phy_cck(dev, 0x44 + i, power);
++			}
++			
++			//write_nic_byte(dev, TX_GAIN_CCK, power);
++			//2005.11.17,
++			write_nic_byte(dev, CCK_TXAGC, ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level]);
++			
++//			force_pci_posting(dev);
++//			msleep(1);
++//in windows the delay was del from 85 to 87, 
++//and here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008  
++			if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
++				ofdm_power_level = max_ofdm_power_level;
++			else
++				ofdm_power_level += min_ofdm_power_level;
++			
++			ofdm_power_level += priv->ofdm_txpwr_base;
++				
++			if(ofdm_power_level > 35)
++				ofdm_power_level = 35;
++			write_nic_byte(dev, OFDM_TXAGC, ZEBRA2_CCK_OFDM_GAIN_SETTING[ofdm_power_level]);
++
++			rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
++
++			write_phy_ofdm(dev,2,0x42);
++			write_phy_ofdm(dev,5,0);
++			write_phy_ofdm(dev,6,0x40);
++			write_phy_ofdm(dev,7,0);
++			write_phy_ofdm(dev,8,0x40);	
++		}
++
++}
++
++void rtl8225z2_rf_set_chan(struct net_device *dev, short ch)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	short gset = (priv->ieee80211->state == IEEE80211_LINKED &&
++			ieee80211_is_54g(priv->ieee80211->current_network)) ||
++		priv->ieee80211->iw_mode == IW_MODE_MONITOR;
++	int eifs_addr;
++
++	down(&priv->set_chan_sem);
++
++	if(NIC_8187 == priv->card_8187) {
++		eifs_addr = EIFS_8187;
++	} else {
++		eifs_addr = EIFS_8187B;
++	}	
++
++#ifdef ENABLE_DOT11D    
++	if(!IsLegalChannel(priv->ieee80211, ch) )
++	{
++		printk("channel(%d). is invalide\n",  ch);
++		up(&priv->set_chan_sem);
++		return;
++	}
++#endif
++        //87B not do it FIXME
++	rtl8225z2_SetTXPowerLevel(dev, ch);
++	
++        //write_nic_byte(dev,0x7,(u8)rtl8225_chan[ch]);
++        write_rtl8225(dev, 0x7, rtl8225_chan[ch]);
++
++	force_pci_posting(dev);
++	//mdelay(10);
++//in windows the delay was del from 85 to 87, 
++//and here we mod to sleep, or The CPU occupany is too hight. LZM 31/10/2008  
++	if(NIC_8187 == priv->card_8187){	
++		write_nic_byte(dev,SIFS,0x22);// SIFS: 0x22
++
++		if(gset)
++			write_nic_byte(dev,DIFS,20); //DIFS: 20 
++		else
++			write_nic_byte(dev,DIFS,0x24); //DIFS: 36 
++
++		if(priv->ieee80211->state == IEEE80211_LINKED &&
++				ieee80211_is_shortslot(priv->ieee80211->current_network))
++			write_nic_byte(dev,SLOT,0x9); //SLOT: 9
++
++		else
++			write_nic_byte(dev,SLOT,0x14); //SLOT: 20 (0x14)
++
++
++		if(gset){
++			write_nic_byte(dev,eifs_addr,91 - 20); // EIFS: 91 (0x5B)
++			write_nic_byte(dev,CW_VAL,0x73); //CW VALUE: 0x37
++			//DMESG("using G net params");
++		}else{
++			write_nic_byte(dev,eifs_addr,91 - 0x24); // EIFS: 91 (0x5B)
++			write_nic_byte(dev,CW_VAL,0xa5); //CW VALUE: 0x37
++			//DMESG("using B net params");
++		}
++	}
++
++	else {
++#ifdef THOMAS_TURBO
++		if(priv->ieee80211->current_network.Turbo_Enable && priv->ieee80211->iw_mode == IW_MODE_INFRA){
++			write_nic_word(dev,AC_VO_PARAM,0x5114);
++			write_nic_word(dev,AC_VI_PARAM,0x5114);
++			write_nic_word(dev,AC_BE_PARAM,0x5114);
++			write_nic_word(dev,AC_BK_PARAM,0x5114);
++		} else {
++			write_nic_word(dev,AC_VO_PARAM,0x731c);
++			write_nic_word(dev,AC_VI_PARAM,0x731c);
++			write_nic_word(dev,AC_BE_PARAM,0x731c);
++			write_nic_word(dev,AC_BK_PARAM,0x731c);
++		}
++#endif
++	}
++
++	up(&priv->set_chan_sem);
++}
++void
++MacConfig_87BASIC_HardCode(struct net_device *dev)
++{
++	//============================================================================
++	// MACREG.TXT
++	//============================================================================
++	int	nLinesRead = 0;
++	u32	u4bRegOffset, u4bRegValue, u4bPageIndex;
++	int	i;
++
++	nLinesRead=(sizeof(MAC_REG_TABLE)/3)/4;
++
++	for(i = 0; i < nLinesRead; i++)
++	{
++		u4bRegOffset=MAC_REG_TABLE[i][0]; 
++		u4bRegValue=MAC_REG_TABLE[i][1]; 
++		u4bPageIndex=MAC_REG_TABLE[i][2]; 
++
++		u4bRegOffset|= (u4bPageIndex << 8);
++
++		write_nic_byte(dev, u4bRegOffset, (u8)u4bRegValue); 
++	}
++	//============================================================================
++}
++
++static void MacConfig_87BASIC(struct net_device *dev)
++{
++	MacConfig_87BASIC_HardCode(dev);
++
++	//============================================================================
++
++	// Follow TID_AC_MAP of WMac.
++	//PlatformEFIOWrite2Byte(dev, TID_AC_MAP, 0xfa50);
++	write_nic_word(dev, TID_AC_MAP, 0xfa50);
++
++	// Interrupt Migration, Jong suggested we use set 0x0000 first, 2005.12.14, by rcnjko.
++	write_nic_word(dev, INT_MIG, 0x0000);
++
++	// Prevent TPC to cause CRC error. Added by Annie, 2006-06-10.
++	write_nic_dword(dev, 0x1F0, 0x00000000);
++	write_nic_dword(dev, 0x1F4, 0x00000000);
++	write_nic_byte(dev, 0x1F8, 0x00);
++
++	// For WiFi 5.2.2.5 Atheros AP performance. Added by Annie, 2006-06-12.
++	// PlatformIOWrite4Byte(dev, RFTiming, 0x0008e00f);
++	// Asked for by SD3 CM Lin, 2006.06.27, by rcnjko.
++	write_nic_dword(dev, RFTiming, 0x00004001);
++
++#ifdef TODO
++	// Asked for by Victor, for 87B B-cut Rx FIFO overflow bug, 2006.06.27, by rcnjko.	
++	if(dev->NdisUsbDev.CardInfo.USBIsHigh == FALSE)
++	{
++		PlatformEFIOWrite1Byte(dev, 0x24E, 0x01);
++	}
++#endif	
++}
++
++
++//
++// Description:
++//		Initialize RFE and read Zebra2 version code.
++//
++//	2005-08-01, by Annie.
++//
++void
++SetupRFEInitialTiming(struct net_device*  dev)
++{
++	//u32		data8, data9;
++        struct r8180_priv *priv = ieee80211_priv(dev);
++
++	// setup initial timing for RFE
++	// Set VCO-PDN pin.
++	write_nic_word(dev, RFPinsOutput, 0x0480);
++	write_nic_word(dev, RFPinsSelect, 0x2488);
++	write_nic_word(dev, RFPinsEnable, 0x1FFF);
++	
++	mdelay(100);
++	// Steven recommends: delay 1 sec for setting RF 1.8V. by Annie, 2005-04-28.
++	mdelay(1000);
++
++	//
++	// TODO: Read Zebra version code if necessary.
++	//
++	priv->rf_chip = RF_ZEBRA2;
++}
++
++
++void ZEBRA_Config_87BASIC_HardCode(struct net_device* dev)
++{
++	u32			i;
++	u32			addr,data;
++	u32			u4bRegOffset, u4bRegValue;
++
++
++	//=============================================================================
++	// RADIOCFG.TXT
++	//=============================================================================
++	write_rtl8225(dev, 0x00, 0x00b7);			mdelay(1);
++	write_rtl8225(dev, 0x01, 0x0ee0);			mdelay(1);
++	write_rtl8225(dev, 0x02, 0x044d);			mdelay(1);
++	write_rtl8225(dev, 0x03, 0x0441);			mdelay(1);
++	write_rtl8225(dev, 0x04, 0x08c3);			mdelay(1);
++	write_rtl8225(dev, 0x05, 0x0c72);			mdelay(1);
++	write_rtl8225(dev, 0x06, 0x00e6);			mdelay(1);
++	write_rtl8225(dev, 0x07, 0x082a);			mdelay(1);
++	write_rtl8225(dev, 0x08, 0x003f);			mdelay(1);
++	write_rtl8225(dev, 0x09, 0x0335);			mdelay(1);
++	write_rtl8225(dev, 0x0a, 0x09d4);			mdelay(1);
++	write_rtl8225(dev, 0x0b, 0x07bb);			mdelay(1);
++	write_rtl8225(dev, 0x0c, 0x0850);			mdelay(1);
++	write_rtl8225(dev, 0x0d, 0x0cdf);			mdelay(1);
++	write_rtl8225(dev, 0x0e, 0x002b);			mdelay(1);
++	write_rtl8225(dev, 0x0f, 0x0114);			mdelay(1);
++	
++	write_rtl8225(dev, 0x00, 0x01b7);			mdelay(1);
++
++
++	for(i=1;i<=95;i++)
++	{
++		write_rtl8225(dev, 0x01, i);mdelay(1); 
++		write_rtl8225(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1);
++		//DbgPrint("RF - 0x%x =  0x%x\n", i, ZEBRA_RF_RX_GAIN_TABLE[i]);
++	}
++
++	write_rtl8225(dev, 0x03, 0x0080);			mdelay(1); 	// write reg 18
++	write_rtl8225(dev, 0x05, 0x0004);			mdelay(1);	// write reg 20
++	write_rtl8225(dev, 0x00, 0x00b7);			mdelay(1);	// switch to reg0-reg15
++	//lzm mod for up take too long time 20081201
++#ifdef THOMAS_BEACON
++        msleep(1000);// Deay 1 sec. //0xfd
++        //msleep(1000);// Deay 1 sec. //0xfd
++        //msleep(1000);// Deay 1 sec. //0xfd
++        msleep(400);// Deay 1 sec. //0xfd
++#else
++
++	mdelay(1000);	
++	//mdelay(1000);
++	//mdelay(1000);
++	mdelay(400);
++#endif
++	write_rtl8225(dev, 0x02, 0x0c4d);			mdelay(1);
++	//lzm mod for up take too long time 20081201
++	//mdelay(1000);
++	//mdelay(1000);
++	msleep(100);// Deay 100 ms. //0xfe
++	msleep(100);// Deay 100 ms. //0xfe
++	write_rtl8225(dev, 0x02, 0x044d);			mdelay(1); 	
++	write_rtl8225(dev, 0x00, 0x02bf);			mdelay(1);	//0x002f disable 6us corner change,  06f--> enable
++	
++	//=============================================================================
++	
++	//=============================================================================
++	// CCKCONF.TXT
++	//=============================================================================
++	/*
++	u4bRegOffset=0x41;
++	u4bRegValue=0xc8;
++	
++	//DbgPrint("\nCCK- 0x%x = 0x%x\n", u4bRegOffset, u4bRegValue);
++	WriteBB(dev, (0x01000080 | (u4bRegOffset & 0x7f) | ((u4bRegValue & 0xff) << 8)));
++	*/
++
++	
++	//=============================================================================
++
++	//=============================================================================
++	// Follow WMAC RTL8225_Config()
++	//=============================================================================
++//	//
++//	// enable EEM0 and EEM1 in 9346CR
++//	PlatformEFIOWrite1Byte(dev, CR9346, PlatformEFIORead1Byte(dev, CR9346)|0xc0);
++//	// enable PARM_En in Config3
++//	PlatformEFIOWrite1Byte(dev, CONFIG3, PlatformEFIORead1Byte(dev, CONFIG3)|0x40);	
++//
++//	PlatformEFIOWrite4Byte(dev, AnaParm2, ANAPARM2_ASIC_ON); //0x727f3f52
++//	PlatformEFIOWrite4Byte(dev, AnaParm, ANAPARM_ASIC_ON); //0x45090658
++
++	// power control
++	write_nic_byte(dev, CCK_TXAGC, 0x03);
++	write_nic_byte(dev, OFDM_TXAGC, 0x07);
++	write_nic_byte(dev, ANTSEL, 0x03);
++
++//	// disable PARM_En in Config3
++//	PlatformEFIOWrite1Byte(dev, CONFIG3, PlatformEFIORead1Byte(dev, CONFIG3)&0xbf);
++//	// disable EEM0 and EEM1 in 9346CR
++//	PlatformEFIOWrite1Byte(dev, CR9346, PlatformEFIORead1Byte(dev, CR9346)&0x3f);
++	//=============================================================================
++
++	//=============================================================================
++	// AGC.txt
++	//=============================================================================
++	//write_nic_dword( dev, PhyAddr, 0x00001280);	// Annie, 2006-05-05
++	//write_phy_ofdm( dev, 0x00, 0x12);	// David, 2006-08-01
++	write_phy_ofdm( dev, 0x80, 0x12);	// David, 2006-08-09
++
++	for (i=0; i<128; i++)
++	{
++		//DbgPrint("AGC - [%x+1] = 0x%x\n", i, ZEBRA_AGC[i+1]);
++		
++		data = ZEBRA_AGC[i+1];
++		data = data << 8;
++		data = data | 0x0000008F;
++
++		addr = i + 0x80; //enable writing AGC table
++		addr = addr << 8;
++		addr = addr | 0x0000008E;
++
++		write_phy_ofdm(dev,data&0x7f,(data>>8)&0xff);
++		write_phy_ofdm(dev,addr&0x7f,(addr>>8)&0xff);
++		write_phy_ofdm(dev,0x0E,0x00);
++	}
++
++	//write_nic_dword(dev, PhyAddr, 0x00001080);	// Annie, 2006-05-05
++	//write_phy_ofdm( dev, 0x00, 0x10);	// David, 2006-08-01
++	write_phy_ofdm( dev, 0x80, 0x10);	// David, 2006-08-09
++
++	//=============================================================================
++	
++	//=============================================================================
++	// OFDMCONF.TXT
++	//=============================================================================
++
++	for(i=0; i<60; i++)
++	{
++		u4bRegOffset=i;
++		u4bRegValue=OFDM_CONFIG[i];
++		//u4bRegValue=OFDM_CONFIG3m82[i];
++
++	//	write_nic_dword(dev,PhyAddr,(0x00000080 | (u4bRegOffset & 0x7f) | ((u4bRegValue & 0xff) << 8)));
++		write_phy_ofdm(dev,i,u4bRegValue);
++	}
++
++
++	//=============================================================================
++}
++
++void ZEBRA_Config_87BASIC(struct net_device *dev)
++{
++	ZEBRA_Config_87BASIC_HardCode(dev);
++}
++//by amy for DIG
++//
++//	Description:
++//		Update initial gain into PHY.
++//
++void
++UpdateCCKThreshold(
++	struct net_device *dev
++	)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	// Update CCK Power Detection(0x41) value.
++	switch(priv->StageCCKTh)
++	{
++	case 0:
++//		printk("Update CCK Stage 0: 88 \n");
++		write_phy_cck(dev, 0xc1, 0x88);mdelay(1);
++		break;
++		
++	case 1:
++//		printk("Update CCK Stage 1: 98 \n");
++		write_phy_cck(dev, 0xc1, 0x98);mdelay(1);
++		break;
++
++	case 2:
++//		printk("Update CCK Stage 2: C8 \n");
++		write_phy_cck(dev, 0xc1, 0xC8);mdelay(1);
++		break;
++
++	case 3:
++//		printk("Update CCK Stage 3: D8 \n");
++		write_phy_cck(dev, 0xc1, 0xD8);mdelay(1);
++		break;
++
++	default:
++//		printk("Update CCK Stage %d ERROR!\n", pHalData->StageCCKTh);
++		break;
++	}
++}
++//
++//	Description:
++//		Update initial gain into PHY.
++//
++void
++UpdateInitialGain(
++	struct net_device *dev
++	)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//u8	   u1Tmp=0;
++
++	//printk("UpdateInitialGain(): InitialGain: %d RFChipID: %d\n", priv->InitialGain, priv->rf_chip);
++
++	switch(priv->rf_chip)
++	{
++		case RF_ZEBRA:
++		case RF_ZEBRA2:
++
++			//
++			// Note: 
++			// 	Whenever we update this gain table, we should be careful about those who call it.
++			// 	Functions which call UpdateInitialGain as follows are important:
++			// 	(1)StaRateAdaptive87B
++			//	(2)DIG_Zebra
++			//	(3)ActSetWirelessMode8187 (when the wireless mode is "B" mode, we set the 
++			//		OFDM[0x17] = 0x26 to improve the Rx sensitivity).
++			//	By Bruce, 2007-06-01.
++			//
++
++			//
++			// SD3 C.M. Lin Initial Gain Table, by Bruce, 2007-06-01.
++			//
++			switch(priv->InitialGain)
++			{
++				case 1: //m861dBm
++					DMESG("RTL8187 + 8225 Initial Gain State 1: -82 dBm ");
++					write_phy_ofdm(dev, 0x97, 0x26);	mdelay(1);
++					write_phy_ofdm(dev, 0xa4, 0x86);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfa);	mdelay(1);
++					break;
++					
++				case 2: //m862dBm
++					DMESG("RTL8187 + 8225 Initial Gain State 2: -78 dBm ");
++					write_phy_ofdm(dev, 0x97, 0x36);	mdelay(1);// Revise 0x26 to 0x36, by Roger, 2007.05.03.
++					write_phy_ofdm(dev, 0xa4, 0x86);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfa);	mdelay(1);
++					break;
++
++				case 3: //m863dBm
++					DMESG("RTL8187 + 8225 Initial Gain State 3: -78 dBm ");
++					write_phy_ofdm(dev, 0x97, 0x36);	mdelay(1);// Revise 0x26 to 0x36, by Roger, 2007.05.03.
++					write_phy_ofdm(dev, 0xa4, 0x86);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfb);	mdelay(1);
++					break;
++
++				case 4: //m864dBm
++					DMESG("RTL8187 + 8225 Initial Gain State 4: -74 dBm ");
++					write_phy_ofdm(dev, 0x97, 0x46);	mdelay(1);// Revise 0x26 to 0x36, by Roger, 2007.05.03.
++					write_phy_ofdm(dev, 0xa4, 0x86);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfb);	mdelay(1);
++					break;
++
++				case 5: //m82dBm
++					DMESG("RTL8187 + 8225 Initial Gain State 5: -74 dBm ");
++					write_phy_ofdm(dev, 0x97, 0x46);	mdelay(1);
++					write_phy_ofdm(dev, 0xa4, 0x96);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfb);	mdelay(1);
++					break;
++
++				case 6: //m78dBm
++					DMESG("RTL8187 + 8225 Initial Gain State 6: -70 dBm ");
++					write_phy_ofdm(dev, 0x97, 0x56);	mdelay(1);					
++					write_phy_ofdm(dev, 0xa4, 0x96);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfc);	mdelay(1);
++					break;
++
++				case 7: //m74dBm
++					DMESG("RTL8187 + 8225 Initial Gain State 7: -70 dBm ");
++					write_phy_ofdm(dev, 0x97, 0x56);	mdelay(1);
++					write_phy_ofdm(dev, 0xa4, 0xa6);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfc);	mdelay(1);
++					break;
++
++				// By Bruce, 2007-03-29.
++				case 8:
++					write_phy_ofdm(dev, 0x97, 0x66);	mdelay(1);
++					write_phy_ofdm(dev, 0xa4, 0xb6);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfc);	mdelay(1);
++					break;
++
++				default:	//MP
++					DMESG("RTL8187 + 8225 Initial Gain State: -82 dBm (default), InitialGain(%d)", priv->InitialGain);
++					write_phy_ofdm(dev, 0x97, 0x26);	mdelay(1);
++					write_phy_ofdm(dev, 0xa4, 0x86);	mdelay(1);
++					write_phy_ofdm(dev, 0x85, 0xfa);	mdelay(1);
++					break;	
++			}			
++			break;
++
++		default:
++			break;
++	}
++}
++//by amy for DIG
++void PhyConfig8187(struct net_device *dev)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++	u8			btConfig4;
++
++	btConfig4 = read_nic_byte(dev, CONFIG4);
++	priv->RFProgType = (btConfig4 & 0x03);
++
++
++
++	switch(priv->rf_chip)
++	{
++	case  RF_ZEBRA2:
++		ZEBRA_Config_87BASIC(dev);
++		break;
++	}
++	if(priv->bDigMechanism)
++	{
++		if(priv->InitialGain == 0)
++			priv->InitialGain = 4;
++		DMESG("DIG is enabled, set default initial gain index to %d", priv->InitialGain);
++	}
++
++	// By Bruce, 2007-03-29.
++	UpdateCCKThreshold(dev);
++	// Update initial gain after PhyConfig comleted, asked for by SD3 CMLin.
++	UpdateInitialGain(dev);
++	return ;
++}
++
++u8 GetSupportedWirelessMode8187(struct net_device* dev)
++{
++	u8 btSupportedWirelessMode;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	btSupportedWirelessMode = 0;
++	
++	switch(priv->rf_chip)
++	{
++		case RF_ZEBRA:
++		case RF_ZEBRA2:
++			btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G);
++			break;
++		default:
++			btSupportedWirelessMode = WIRELESS_MODE_B;
++			break;
++	}
++	return btSupportedWirelessMode;
++}
++
++void ActUpdateChannelAccessSetting(struct net_device *dev,
++		int WirelessMode, 
++		PCHANNEL_ACCESS_SETTING ChnlAccessSetting)
++{
++	AC_CODING	eACI;
++	AC_PARAM	AcParam;
++#ifdef TODO	
++	PSTA_QOS	pStaQos = Adapter->MgntInfo.pStaQos;
++#endif	
++	//bool		bFollowLegacySetting = false;
++
++
++	switch( WirelessMode )
++	{
++		case WIRELESS_MODE_A:
++			ChnlAccessSetting->SIFS_Timer = 0x22;
++			ChnlAccessSetting->DIFS_Timer = 34; // 34 = 16 + 2*9. 2006.06.07, by rcnjko.
++			ChnlAccessSetting->SlotTimeTimer = 9;
++			ChnlAccessSetting->EIFS_Timer = 23;
++			ChnlAccessSetting->CWminIndex = 4;
++			ChnlAccessSetting->CWmaxIndex = 10;
++			break;
++
++		case WIRELESS_MODE_B:
++			ChnlAccessSetting->SIFS_Timer = 0x22;
++			ChnlAccessSetting->DIFS_Timer = 50; // 50 = 10 + 2*20. 2006.06.07, by rcnjko.
++			ChnlAccessSetting->SlotTimeTimer = 20;
++			ChnlAccessSetting->EIFS_Timer = 91;
++			ChnlAccessSetting->CWminIndex = 5;
++			ChnlAccessSetting->CWmaxIndex = 10;
++			break;
++
++		case WIRELESS_MODE_G:
++			//
++			// <RJ_TODO_8185B> 
++			// TODO: We still don't know how to set up these registers, just follow WMAC to 
++			// verify 8185B FPAG.
++			//
++			// <RJ_TODO_8185B>
++			// Jong said CWmin/CWmax register are not functional in 8185B, 
++			// so we shall fill channel access realted register into AC parameter registers,
++			// even in nQBss.
++			//
++			ChnlAccessSetting->SIFS_Timer = 0x22; // Suggested by Jong, 2005.12.08.
++			ChnlAccessSetting->SlotTimeTimer = 9; // 2006.06.07, by rcnjko.
++			ChnlAccessSetting->DIFS_Timer = 28; // 28 = 10 + 2*9. 2006.06.07, by rcnjko.
++			ChnlAccessSetting->EIFS_Timer = 0x5B; // Suggested by wcchu, it is the default value of EIFS register, 2005.12.08.
++#ifdef TODO
++			switch (Adapter->NdisUsbDev.CWinMaxMin)
++#else
++			switch (2)				
++#endif
++			{
++				case 0:// 0: [max:7 min:1 ]
++					ChnlAccessSetting->CWminIndex = 1;
++					ChnlAccessSetting->CWmaxIndex = 7;
++					break;
++				case 1:// 1: [max:7 min:2 ]
++					ChnlAccessSetting->CWminIndex = 2;
++					ChnlAccessSetting->CWmaxIndex = 7;
++					break;
++				case 2:// 2: [max:7 min:3 ]
++					ChnlAccessSetting->CWminIndex = 3;
++					ChnlAccessSetting->CWmaxIndex = 7;
++					break;
++				case 3:// 3: [max:9 min:1 ]
++					ChnlAccessSetting->CWminIndex = 1;
++					ChnlAccessSetting->CWmaxIndex = 9;
++					break;
++				case 4:// 4: [max:9 min:2 ]
++					ChnlAccessSetting->CWminIndex = 2;
++					ChnlAccessSetting->CWmaxIndex = 9;
++					break;
++				case 5:// 5: [max:9 min:3 ]
++					ChnlAccessSetting->CWminIndex = 3;
++					ChnlAccessSetting->CWmaxIndex = 9;
++					break;
++				case 6:// 6: [max:A min:5 ]
++					ChnlAccessSetting->CWminIndex = 5;
++					ChnlAccessSetting->CWmaxIndex = 10;
++					break;
++				case 7:// 7: [max:A min:4 ]
++					ChnlAccessSetting->CWminIndex = 4;
++					ChnlAccessSetting->CWmaxIndex = 10;
++					break;
++
++				default:
++					ChnlAccessSetting->CWminIndex = 1;
++					ChnlAccessSetting->CWmaxIndex = 7;
++					break;
++			}
++#ifdef TODO
++			if( Adapter->MgntInfo.OpMode == RT_OP_MODE_IBSS)
++			{
++				ChnlAccessSetting->CWminIndex= 4;
++				ChnlAccessSetting->CWmaxIndex= 10;
++			}
++#endif
++			break;
++	}
++
++
++	write_nic_byte(dev, SIFS, ChnlAccessSetting->SIFS_Timer);
++//{ update slot time related by david, 2006-7-21
++	write_nic_byte(dev, SLOT, ChnlAccessSetting->SlotTimeTimer);	// Rewrited from directly use PlatformEFIOWrite1Byte(), by Annie, 2006-03-29.
++#ifdef TODO
++	if(pStaQos->CurrentQosMode > QOS_DISABLE)
++	{
++		for(eACI = 0; eACI < AC_MAX; eACI++)
++		{
++		Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, \
++				(pu1Byte)(&(pStaQos->WMMParamEle.AcParam[eACI])) );
++		}
++	}
++	else
++#endif		
++	{
++		u8 u1bAIFS = aSifsTime + (2 * ChnlAccessSetting->SlotTimeTimer );
++
++		write_nic_byte(dev, AC_VO_PARAM, u1bAIFS);
++		write_nic_byte(dev, AC_VI_PARAM, u1bAIFS);
++		write_nic_byte(dev, AC_BE_PARAM, u1bAIFS);
++		write_nic_byte(dev, AC_BK_PARAM, u1bAIFS);
++	}
++//}
++
++	write_nic_byte(dev, EIFS_8187B, ChnlAccessSetting->EIFS_Timer);
++	write_nic_byte(dev, AckTimeOutReg, 0x5B); // <RJ_EXPR_QOS> Suggested by wcchu, it is the default value of EIFS register, 2005.12.08.
++#ifdef TODO
++	// <RJ_TODO_NOW_8185B> Update ECWmin/ECWmax, AIFS, TXOP Limit of each AC to the value defined by SPEC.
++	if( pStaQos->CurrentQosMode > QOS_DISABLE )
++	{ // QoS mode.
++		if(pStaQos->QBssWirelessMode == WirelessMode)
++		{
++			// Follow AC Parameters of the QBSS.
++			for(eACI = 0; eACI < AC_MAX; eACI++)
++			{
++				Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, (pu1Byte)(&(pStaQos->WMMParamEle.AcParam[eACI])) );
++			}
++		}
++		else
++		{
++			// Follow Default WMM AC Parameters.
++			bFollowLegacySetting = TRUE;
++		}
++	}
++	else
++	{ // Legacy 802.11.
++		bFollowLegacySetting = TRUE;
++	}
++
++	if(bFollowLegacySetting)
++#endif		
++	if(true)
++	{
++		//
++		// Follow 802.11 seeting to AC parameter, all AC shall use the same parameter.
++		// 2005.12.01, by rcnjko.
++		//
++		AcParam.longData = 0;
++		AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
++		AcParam.f.AciAifsn.f.ACM = 0;
++		AcParam.f.Ecw.f.ECWmin = ChnlAccessSetting->CWminIndex; // Follow 802.11 CWmin.
++		AcParam.f.Ecw.f.ECWmax = ChnlAccessSetting->CWmaxIndex; // Follow 802.11 CWmax.
++		AcParam.f.TXOPLimit = 0;
++		for(eACI = 0; eACI < AC_MAX; eACI++)
++		{
++			AcParam.f.AciAifsn.f.ACI = (u8)eACI;
++			{
++				PAC_PARAM	pAcParam = (PAC_PARAM)(&AcParam);
++				AC_CODING	eACI;
++				u8		u1bAIFS;
++				u32		u4bAcParam;
++
++				// Retrive paramters to udpate.
++				eACI = pAcParam->f.AciAifsn.f.ACI; 
++				u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * ChnlAccessSetting->SlotTimeTimer + aSifsTime; 
++				u4bAcParam = (	(((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)	| 
++						(((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)	|  
++						(((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)	|  
++						(((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
++
++				switch(eACI)
++				{
++					case AC1_BK:
++						write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
++						break;
++
++					case AC0_BE:
++						write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
++						break;
++
++					case AC2_VI:
++						write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
++						break;
++
++					case AC3_VO:
++						write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
++						break;
++
++					default:
++						printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
++						break;
++				}
++
++				// Cehck ACM bit.
++				// If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13.
++				//write_nic_byte(dev, ACM_CONTROL, pAcParam->f.AciAifsn);
++				{
++					PACI_AIFSN	pAciAifsn = (PACI_AIFSN)(&pAcParam->f.AciAifsn);
++					AC_CODING	eACI = pAciAifsn->f.ACI;
++
++					//modified Joseph
++					//for 8187B AsynIORead issue
++#ifdef TODO				
++					u8	AcmCtrl = pHalData->AcmControl;
++#else
++					u8	AcmCtrl = 0;	
++#endif
++					if( pAciAifsn->f.ACM )
++					{ // ACM bit is 1.
++						switch(eACI)
++						{
++							case AC0_BE:
++								AcmCtrl |= (BEQ_ACM_EN|BEQ_ACM_CTL|ACM_HW_EN);	// or 0x21
++								break;
++
++							case AC2_VI:
++								AcmCtrl |= (VIQ_ACM_EN|VIQ_ACM_CTL|ACM_HW_EN);	// or 0x42
++								break;
++
++							case AC3_VO:
++								AcmCtrl |= (VOQ_ACM_EN|VOQ_ACM_CTL|ACM_HW_EN);	// or 0x84
++								break;
++
++							default:
++								printk(KERN_WARNING "SetHwReg8185(): [HW_VAR_ACM_CTRL] ACM set\
++										failed: eACI is %d\n", eACI );
++								break;
++						}
++					}
++					else
++					{ // ACM bit is 0.
++						switch(eACI)
++						{
++							case AC0_BE:
++								AcmCtrl &= ( (~BEQ_ACM_EN) & (~BEQ_ACM_CTL) & (~ACM_HW_EN) );	// and 0xDE
++								break;
++
++							case AC2_VI:
++								AcmCtrl &= ( (~VIQ_ACM_EN) & (~VIQ_ACM_CTL) & (~ACM_HW_EN) );	// and 0xBD
++								break;
++
++							case AC3_VO:
++								AcmCtrl &= ( (~VOQ_ACM_EN) & (~VOQ_ACM_CTL) & (~ACM_HW_EN) );	// and 0x7B
++								break;
++
++							default:
++								break;
++						}
++					}
++
++					//printk(KERN_WARNING "SetHwReg8185(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
++
++#ifdef TO_DO
++					pHalData->AcmControl = AcmCtrl;
++#endif				
++					write_nic_byte(dev, ACM_CONTROL, AcmCtrl);
++				}
++			}
++		}
++	}
++}
++
++void ActSetWirelessMode8187(struct net_device* dev, u8	btWirelessMode)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++	//PMGNT_INFO		pMgntInfo = &(pAdapter->MgntInfo);
++	u8			btSupportedWirelessMode = GetSupportedWirelessMode8187(dev);
++
++	if( (btWirelessMode & btSupportedWirelessMode) == 0 )
++	{ // Don't switch to unsupported wireless mode, 2006.02.15, by rcnjko.
++		printk(KERN_WARNING "ActSetWirelessMode8187(): WirelessMode(%d) is not supported (%d)!\n", 
++				 btWirelessMode, btSupportedWirelessMode);
++		return;
++	}
++
++	// 1. Assign wireless mode to swtich if necessary.
++	if( (btWirelessMode == WIRELESS_MODE_AUTO) || 
++			(btWirelessMode & btSupportedWirelessMode) == 0 )
++	{
++		if((btSupportedWirelessMode & WIRELESS_MODE_A))
++		{
++			btWirelessMode = WIRELESS_MODE_A;
++		}
++		else if((btSupportedWirelessMode & WIRELESS_MODE_G))
++		{
++			btWirelessMode = WIRELESS_MODE_G;
++		}
++		else if((btSupportedWirelessMode & WIRELESS_MODE_B))
++		{
++			btWirelessMode = WIRELESS_MODE_B;
++		}
++		else
++		{
++			printk(KERN_WARNING "MptActSetWirelessMode8187(): No valid wireless mode supported, \
++					btSupportedWirelessMode(%x)!!!\n", btSupportedWirelessMode);
++			btWirelessMode = WIRELESS_MODE_B;
++		}
++	}
++
++	// 2. Swtich band.
++	switch(priv->rf_chip)
++	{
++		case RF_ZEBRA:
++		case RF_ZEBRA2:
++			{
++				// Update current wireless mode if we swtich to specified band successfully.
++				ieee->mode = (WIRELESS_MODE)btWirelessMode;
++			}
++			break;
++
++		default:
++			printk(KERN_WARNING "MptActSetWirelessMode8187(): unsupported RF: 0x%X !!!\n", priv->rf_chip);
++			break;
++	}
++
++	// 4. Change related setting.
++	if( ieee->mode == WIRELESS_MODE_A ){
++		DMESG("WIRELESS_MODE_A"); 
++	}
++	else if(ieee->mode == WIRELESS_MODE_B ){
++		DMESG("WIRELESS_MODE_B"); 
++	}
++	else if( ieee->mode == WIRELESS_MODE_G ){
++		DMESG("WIRELESS_MODE_G"); 
++	}
++	ActUpdateChannelAccessSetting(dev, ieee->mode, &priv->ChannelAccessSetting );
++//by amy 0305
++#ifdef TODO	
++	if(ieee->mode == WIRELESS_MODE_B && priv->InitialGain > pHalData->RegBModeGainStage)
++	{
++		pHalData->InitialGain = pHalData->RegBModeGainStage;	// B mode, OFDM[0x17] = 26.
++		RT_TRACE(COMP_INIT | COMP_DIG, DBG_LOUD, ("ActSetWirelessMode8187(): update init_gain to index %d for B mode\n",pHalData->InitialGain));
++		PlatformScheduleWorkItem( &(pHalData->UpdateDigWorkItem) );
++	}
++//	pAdapter->MgntInfo.dot11CurrentWirelessMode = pHalData->CurrentWirelessMode;
++//	MgntSetRegdot11OperationalRateSet( pAdapter );
++#endif	
++//by amy 0305
++}
++
++
++void
++InitializeExtraRegsOn8185(struct net_device	*dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++	//RTL8185_TODO: Determine Retrylimit, TxAGC, AutoRateFallback control.
++	bool		bUNIVERSAL_CONTROL_RL = false; // Enable per-packet tx retry, 2005.03.31, by rcnjko.
++	bool		bUNIVERSAL_CONTROL_AGC = true;//false;
++	bool		bUNIVERSAL_CONTROL_ANT = true;//false;
++	bool		bAUTO_RATE_FALLBACK_CTL = true;
++	u8		val8;
++
++	// Set up ACK rate.
++	// Suggested by wcchu, 2005.08.25, by rcnjko.
++	// 1. Initialize (MinRR, MaxRR) to (6,24) for A/G.
++	// 2. MUST Set RR before BRSR.
++	// 3. CCK must be basic rate.
++	if((ieee->mode == IEEE_G)||(ieee->mode == IEEE_A))
++	{
++		write_nic_word(dev, BRSR_8187B, 0x0fff);
++	}
++	else
++	{
++		write_nic_word(dev, BRSR_8187B, 0x000f);
++	}
++
++
++	// Retry limit
++	val8 = read_nic_byte(dev, CW_CONF);
++	if(bUNIVERSAL_CONTROL_RL)
++	{
++		val8 &= (~CW_CONF_PERPACKET_RETRY_LIMIT); 
++	}
++	else
++	{
++		val8 |= CW_CONF_PERPACKET_RETRY_LIMIT; 
++	}
++
++	write_nic_byte(dev, CW_CONF, val8);
++
++	// Tx AGC
++	val8 = read_nic_byte(dev, TX_AGC_CTL);
++	if(bUNIVERSAL_CONTROL_AGC)
++	{
++		val8 &= (~TX_AGC_CTL_PER_PACKET_TXAGC);
++		write_nic_byte(dev, CCK_TXAGC, 128);
++		write_nic_byte(dev, OFDM_TXAGC, 128);
++	}
++	else
++	{
++		val8 |= TX_AGC_CTL_PER_PACKET_TXAGC;
++	}
++	write_nic_byte(dev, TX_AGC_CTL, val8);
++
++	// Tx Antenna including Feedback control
++	val8 = read_nic_byte(dev, TX_AGC_CTL);
++
++	if(bUNIVERSAL_CONTROL_ANT)
++	{
++		write_nic_byte(dev, ANTSEL, 0x00);
++		val8 &= (~TXAGC_CTL_PER_PACKET_ANT_SEL);
++	}
++	else
++	{
++		val8 |= TXAGC_CTL_PER_PACKET_ANT_SEL;
++	}
++	write_nic_byte(dev, TX_AGC_CTL, val8);
++
++	// Auto Rate fallback control
++	val8 = read_nic_byte(dev, RATE_FALLBACK);
++	if( bAUTO_RATE_FALLBACK_CTL )
++	{
++		val8 |= RATE_FALLBACK_CTL_ENABLE | RATE_FALLBACK_CTL_AUTO_STEP0;
++		
++		// <RJ_TODO_8187B> We shall set up the ARFR according to user's setting.
++                write_nic_word(dev, ARFR, 0x0fff); // set 1M ~ 54M
++	}
++	else
++	{
++		val8 &= (~RATE_FALLBACK_CTL_ENABLE);
++	}
++	write_nic_byte(dev, RATE_FALLBACK, val8);
++
++}
++///////////////////////////
++void rtl8225z2_rf_init(struct net_device *dev) 
++{
++
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	if (NIC_8187B == priv->card_8187){	
++		struct ieee80211_device *ieee = priv->ieee80211;
++		u8			InitWirelessMode;
++		u8			SupportedWirelessMode;
++		bool			bInvalidWirelessMode = false;	
++		InitializeExtraRegsOn8185(dev);	
++
++		write_nic_byte(dev, MSR, read_nic_byte(dev,MSR) & 0xf3);	// default network type to 'No  Link'
++		//{to avoid tx stall 
++		write_nic_byte(dev, MSR, read_nic_byte(dev, MSR)|MSR_LINK_ENEDCA);//should always set ENDCA bit
++		write_nic_byte(dev, ACM_CONTROL, priv->AcmControl);	
++
++		write_nic_word(dev, BcnIntv, 100);
++		write_nic_word(dev, AtimWnd, 2);
++		write_nic_word(dev, FEMR, 0xFFFF);
++		//LED TYPE
++		{
++			write_nic_byte(dev, CONFIG1,((read_nic_byte(dev, CONFIG1)&0x3f)|0x80));	//turn on bit 5:Clkrun_mode
++		}
++		write_nic_byte(dev, CR9346, 0x0);	// disable config register write
++
++		//{ add some info here
++		write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
++		write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
++
++		write_nic_byte(dev, WPA_CONFIG, 0);	
++		//}
++
++		MacConfig_87BASIC(dev);
++
++		// Override the RFSW_CTRL (MAC offset 0x272-0x273), 2006.06.07, by rcnjko.
++		write_nic_word(dev, RFSW_CTRL, 0x569a);
++#ifdef JOHN_TKIP
++		{
++			void CamResetAllEntry(struct net_device *dev);
++			void EnableHWSecurityConfig8187(struct net_device *dev);
++			CamResetAllEntry(dev);
++			EnableHWSecurityConfig8187(dev);
++			write_nic_word(dev, AESMSK_FC, AESMSK_FC_DEFAULT); mdelay(1);
++			write_nic_word(dev, AESMSK_SC, AESMSK_SC_DEFAULT); mdelay(1);
++			write_nic_word(dev, AESMSK_QC, AESMSK_QC_DEFAULT); mdelay(1);
++		}
++#endif
++		//-----------------------------------------------------------------------------
++		// Set up PHY related. 
++		//-----------------------------------------------------------------------------
++		// Enable Config3.PARAM_En to revise AnaaParm.
++		write_nic_byte(dev, CR9346, 0xC0);
++		write_nic_byte(dev, CONFIG3, read_nic_byte(dev,CONFIG3)|CONFIG3_PARM_En);
++		write_nic_byte(dev, CR9346, 0x0);
++
++		// Initialize RFE and read Zebra2 version code. Added by Annie, 2005-08-01.
++		SetupRFEInitialTiming(dev);
++		// PHY config.
++		PhyConfig8187(dev);
++
++		// We assume RegWirelessMode has already been initialized before, 
++		// however, we has to validate the wireless mode here and provide a reasonble
++		// initialized value if necessary. 2005.01.13, by rcnjko.
++		SupportedWirelessMode = GetSupportedWirelessMode8187(dev);
++
++		if((ieee->mode != WIRELESS_MODE_B) && 
++				(ieee->mode != WIRELESS_MODE_G) &&
++				(ieee->mode != WIRELESS_MODE_A) &&
++				(ieee->mode != WIRELESS_MODE_AUTO)) 
++		{ // It should be one of B, G, A, or AUTO. 
++			bInvalidWirelessMode = true;
++		}
++		else
++		{ // One of B, G, A, or AUTO.
++			// Check if the wireless mode is supported by RF.
++			if( (ieee->mode != WIRELESS_MODE_AUTO) &&
++					(ieee->mode & SupportedWirelessMode) == 0 )
++			{
++				bInvalidWirelessMode = true;
++			}
++		}
++
++		if(bInvalidWirelessMode || ieee->mode==WIRELESS_MODE_AUTO)
++		{ // Auto or other invalid value.
++			// Assigne a wireless mode to initialize.
++			if((SupportedWirelessMode & WIRELESS_MODE_A))
++			{
++				InitWirelessMode = WIRELESS_MODE_A;
++			}
++			else if((SupportedWirelessMode & WIRELESS_MODE_G))
++			{
++
++				InitWirelessMode = WIRELESS_MODE_G;
++			}
++			else if((SupportedWirelessMode & WIRELESS_MODE_B))
++			{
++
++				InitWirelessMode = WIRELESS_MODE_B;
++			}
++			else
++			{
++				printk(KERN_WARNING 
++						"InitializeAdapter8187(): No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", 
++						SupportedWirelessMode);
++				InitWirelessMode = WIRELESS_MODE_B;
++			}
++
++			// Initialize RegWirelessMode if it is not a valid one.
++			if(bInvalidWirelessMode)
++			{
++				ieee->mode = (WIRELESS_MODE)InitWirelessMode;
++			}
++		}
++		else
++		{ // One of B, G, A.
++			InitWirelessMode = ieee->mode; 
++		}
++		ActSetWirelessMode8187(dev, (u8)(InitWirelessMode));
++		{//added for init gain 
++			write_phy_ofdm(dev, 0x97, 0x46); mdelay(1);
++			write_phy_ofdm(dev, 0xa4, 0xb6); mdelay(1);
++			write_phy_ofdm(dev, 0x85, 0xfc); mdelay(1);
++			write_phy_cck(dev, 0xc1, 0x88); mdelay(1);
++		}
++	
++	}
++	else{
++		int i;
++		short channel = 1;
++		u16	brsr;
++		u32	data,addr;
++		
++		priv->chan = channel;
++
++		rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
++
++		if(priv->card_type == USB)
++			rtl8225_host_usb_init(dev);
++		else
++			rtl8225_host_pci_init(dev);
++
++		write_nic_dword(dev, RF_TIMING, 0x000a8008);
++		
++		brsr = read_nic_word(dev, BRSR_8187);
++		
++		write_nic_word(dev, BRSR_8187, 0xffff); 
++
++
++		write_nic_dword(dev, RF_PARA, 0x100044);
++		
++		#if 1  //0->1
++		rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
++		write_nic_byte(dev, CONFIG3, 0x44);
++		rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
++		#endif
++		
++		
++		rtl8185_rf_pins_enable(dev);
++
++	//		mdelay(1000);
++
++		write_rtl8225(dev, 0x0, 0x2bf); mdelay(1);
++		
++		
++		write_rtl8225(dev, 0x1, 0xee0); mdelay(1);
++
++		write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
++
++		write_rtl8225(dev, 0x3, 0x441); mdelay(1);
++
++		
++		write_rtl8225(dev, 0x4, 0x8c3);mdelay(1);
++		
++		
++		
++		write_rtl8225(dev, 0x5, 0xc72);mdelay(1);
++	//	}
++		
++		write_rtl8225(dev, 0x6, 0xe6);  mdelay(1);
++
++		write_rtl8225(dev, 0x7, ((priv->card_type == USB)? 0x82a : rtl8225_chan[channel]));  mdelay(1);
++
++		write_rtl8225(dev, 0x8, 0x3f);  mdelay(1);
++
++		write_rtl8225(dev, 0x9, 0x335);  mdelay(1);
++
++		write_rtl8225(dev, 0xa, 0x9d4);  mdelay(1);
++
++		write_rtl8225(dev, 0xb, 0x7bb);  mdelay(1);
++
++		write_rtl8225(dev, 0xc, 0x850);  mdelay(1);
++
++
++		write_rtl8225(dev, 0xd, 0xcdf);   mdelay(1);
++
++		write_rtl8225(dev, 0xe, 0x2b);  mdelay(1);
++
++		write_rtl8225(dev, 0xf, 0x114); 
++		
++		
++		mdelay(100);
++		
++		
++		//if(priv->card_type != USB) /* maybe not needed even for 8185 */
++	//	write_rtl8225(dev, 0x7, rtl8225_chan[channel]); 
++		
++		write_rtl8225(dev, 0x0, 0x1b7);
++		
++		for(i=0;i<95;i++){
++			write_rtl8225(dev, 0x1, (u8)(i+1));
++			/* version B & C & D*/
++			write_rtl8225(dev, 0x2, rtl8225z2_rxgain[i]);
++		}
++		//write_rtl8225(dev, 0x3, 0x80);
++		write_rtl8225(dev, 0x3, 0x2);
++		write_rtl8225(dev, 0x5, 0x4);
++
++		write_rtl8225(dev, 0x0, 0xb7);
++
++		write_rtl8225(dev, 0x2, 0xc4d);
++		
++		if(priv->card_type == USB){
++		//	force_pci_posting(dev);
++			mdelay(200);
++			
++			write_rtl8225(dev, 0x2, 0x44d);
++			
++		//	force_pci_posting(dev);
++			mdelay(200);
++			
++		}//End of if(priv->card_type == USB)
++		/* FIXME!! rtl8187 we have to check if calibrarion
++		 * is successful and eventually cal. again (repeat
++		 * the two write on reg 2)
++		*/
++		// Check for calibration status, 2005.11.17,
++		data = read_rtl8225(dev, 6);
++		if (!(data&0x00000080))
++		{
++			write_rtl8225(dev, 0x02, 0x0c4d);
++			force_pci_posting(dev); mdelay(200);
++			write_rtl8225(dev, 0x02, 0x044d);
++			force_pci_posting(dev); mdelay(100);
++			data = read_rtl8225(dev, 6);
++			if (!(data&0x00000080))
++				{
++					DMESGW("RF Calibration Failed!!!!\n");
++				}
++		}
++		//force_pci_posting(dev);
++		
++		mdelay(200); //200 for 8187 
++		
++		
++	//	//if(priv->card_type != USB){
++	//		write_rtl8225(dev, 0x2, 0x44d);
++	//		write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
++	//		write_rtl8225(dev, 0x2, 0x47d);
++	//		
++	//		force_pci_posting(dev);
++	//		mdelay(100);
++	//		
++	//		write_rtl8225(dev, 0x2, 0x44d);
++	//	//}
++		
++		write_rtl8225(dev, 0x0, 0x2bf);   
++		
++		if(priv->card_type != USB)
++			rtl8185_rf_pins_enable(dev);
++		//set up ZEBRA AGC table, 2005.11.17,
++		for(i=0;i<128;i++){
++			data = rtl8225_agc[i];
++
++			addr = i + 0x80; //enable writing AGC table
++			write_phy_ofdm(dev, 0xb, data);
++
++			mdelay(1);
++			write_phy_ofdm(dev, 0xa, addr);
++
++			mdelay(1);
++		}
++			
++		force_pci_posting(dev);
++		mdelay(1);
++		
++		write_phy_ofdm(dev, 0x0, 0x1); mdelay(1);
++		write_phy_ofdm(dev, 0x1, 0x2); mdelay(1);
++		write_phy_ofdm(dev, 0x2, ((priv->card_type == USB)? 0x42 : 0x62)); mdelay(1);
++		write_phy_ofdm(dev, 0x3, 0x0); mdelay(1);
++		write_phy_ofdm(dev, 0x4, 0x0); mdelay(1);
++		write_phy_ofdm(dev, 0x5, 0x0); mdelay(1);
++		write_phy_ofdm(dev, 0x6, 0x40); mdelay(1);
++		write_phy_ofdm(dev, 0x7, 0x0); mdelay(1);
++		write_phy_ofdm(dev, 0x8, 0x40); mdelay(1);
++		write_phy_ofdm(dev, 0x9, 0xfe); mdelay(1);
++
++		write_phy_ofdm(dev, 0xa, 0x8); mdelay(1);
++
++		//write_phy_ofdm(dev, 0x18, 0xef); 
++		//	}
++		//}
++		write_phy_ofdm(dev, 0xb, 0x80); mdelay(1);
++
++		write_phy_ofdm(dev, 0xc, 0x1);mdelay(1);
++
++		
++		//if(priv->card_type != USB)
++		write_phy_ofdm(dev, 0xd, 0x43); 
++			
++		write_phy_ofdm(dev, 0xe, 0xd3);mdelay(1);
++		
++		write_phy_ofdm(dev, 0xf, 0x38);mdelay(1);
++	/*ver D & 8187*/
++	//	}
++		
++	//	if(priv->card_8185 == 1 && priv->card_8185_Bversion)
++	//		write_phy_ofdm(dev, 0x10, 0x04);/*ver B*/
++	//	else
++		write_phy_ofdm(dev, 0x10, 0x84);mdelay(1);
++	/*ver C & D & 8187*/
++		
++		write_phy_ofdm(dev, 0x11, 0x07);mdelay(1);
++	/*agc resp time 700*/
++
++		
++	//	if(priv->card_8185 == 2){
++		/* Ver D & 8187*/
++		write_phy_ofdm(dev, 0x12, 0x20);mdelay(1);
++
++		write_phy_ofdm(dev, 0x13, 0x20);mdelay(1);
++
++		write_phy_ofdm(dev, 0x14, 0x0); mdelay(1);
++		write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
++		write_phy_ofdm(dev, 0x16, 0x0); mdelay(1);
++		write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
++		
++	//	if (priv->card_type == USB)
++	//		write_phy_ofdm(dev, 0x18, 0xef);
++		
++		write_phy_ofdm(dev, 0x18, 0xef);mdelay(1);
++	 
++
++		write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
++		write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
++		write_phy_ofdm(dev, 0x1b, 0x15);mdelay(1);
++		
++		write_phy_ofdm(dev, 0x1c, 0x4);mdelay(1);
++
++		write_phy_ofdm(dev, 0x1d, 0xc5);mdelay(1); //2005.11.17,
++		
++		write_phy_ofdm(dev, 0x1e, 0x95);mdelay(1);
++
++		write_phy_ofdm(dev, 0x1f, 0x75);	mdelay(1);
++
++	//	}
++		
++		write_phy_ofdm(dev, 0x20, 0x1f);mdelay(1);
++
++		write_phy_ofdm(dev, 0x21, 0x17);mdelay(1);
++		
++		write_phy_ofdm(dev, 0x22, 0x16);mdelay(1);
++
++	//	if(priv->card_type != USB)
++		write_phy_ofdm(dev, 0x23, 0x80);mdelay(1); //FIXME maybe not needed // <>
++		
++		write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
++		write_phy_ofdm(dev, 0x25, 0x00); mdelay(1);
++		write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
++
++		write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
++
++		
++		// <> Set init. gain to m74dBm.
++		
++		rtl8225z2_set_gain(dev,4);
++		//rtl8225z2_set_gain(dev,2);
++		
++		write_phy_cck(dev, 0x0, 0x98); mdelay(1);
++		write_phy_cck(dev, 0x3, 0x20); mdelay(1);
++		write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
++		write_phy_cck(dev, 0x5, 0x12); mdelay(1);
++		write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
++		write_phy_cck(dev, 0x7, 0x78);mdelay(1);
++	 /* Ver C & D & 8187*/
++		write_phy_cck(dev, 0x8, 0x2e);mdelay(1);
++
++		write_phy_cck(dev, 0x9, 0x11);mdelay(1);
++		write_phy_cck(dev, 0xa, 0x17);mdelay(1);
++		write_phy_cck(dev, 0xb, 0x11);mdelay(1);
++		
++		write_phy_cck(dev, 0x10, ((priv->card_type == USB) ? 0x9b: 0x93)); mdelay(1);
++		write_phy_cck(dev, 0x11, 0x88); mdelay(1);
++		write_phy_cck(dev, 0x12, 0x47); mdelay(1);
++		write_phy_cck(dev, 0x13, 0xd0); /* Ver C & D & 8187*/
++			
++		write_phy_cck(dev, 0x19, 0x0); mdelay(1);
++		write_phy_cck(dev, 0x1a, 0xa0); mdelay(1);
++		write_phy_cck(dev, 0x1b, 0x8); mdelay(1);
++		write_phy_cck(dev, 0x1d, 0x0); mdelay(1);
++		
++		write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */ mdelay(1);
++		
++		write_phy_cck(dev, 0x41, 0x9d);mdelay(1);
++
++		
++		write_phy_cck(dev, 0x42, 0x15); mdelay(1);
++		write_phy_cck(dev, 0x43, 0x18); mdelay(1);
++		
++		
++		write_phy_cck(dev, 0x44, 0x36); mdelay(1);
++		write_phy_cck(dev, 0x45, 0x35); mdelay(1);
++		write_phy_cck(dev, 0x46, 0x2e); mdelay(1);
++		write_phy_cck(dev, 0x47, 0x25); mdelay(1);
++		write_phy_cck(dev, 0x48, 0x1c); mdelay(1);
++		write_phy_cck(dev, 0x49, 0x12); mdelay(1);
++		write_phy_cck(dev, 0x4a, 0x09); mdelay(1);
++		write_phy_cck(dev, 0x4b, 0x04); mdelay(1);
++		write_phy_cck(dev, 0x4c, 0x5);mdelay(1);
++
++
++		write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
++
++		
++
++	// <>
++	//	// TESTR 0xb 8187
++	//	write_phy_cck(dev, 0x10, 0x93);// & 0xfb);
++	//	
++	//	//if(priv->card_type != USB){
++	//		write_phy_ofdm(dev, 0x2, 0x62);
++	//		write_phy_ofdm(dev, 0x6, 0x0);
++	//		write_phy_ofdm(dev, 0x8, 0x0);
++	//	//}
++		
++		rtl8225z2_SetTXPowerLevel(dev, channel);
++		
++		write_phy_cck(dev, 0x10, 0x9b); mdelay(1); /* Rx ant A, 0xdb for B */
++		write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); /* Rx ant A, 0x10 for B */
++		
++		rtl8185_tx_antenna(dev, 0x3); /* TX ant A, 0x0 for B */
++		
++		/* switch to high-speed 3-wire 
++		 * last digit. 2 for both cck and ofdm
++		 */
++		if(priv->card_type == USB)
++			write_nic_dword(dev, 0x94, 0x3dc00002);
++		else{
++			write_nic_dword(dev, 0x94, 0x15c00002);
++			rtl8185_rf_pins_enable(dev);
++		}
++
++	//	if(priv->card_type != USB)
++	//	rtl8225_set_gain(dev, 4); /* FIXME this '1' is random */ // <>
++	//	 rtl8225_set_mode(dev, 1); /* FIXME start in B mode */ // <>
++	//	
++	//	/* make sure is waken up! */
++	//	write_rtl8225(dev,0x4, 0x9ff);
++	//	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON); 
++	//	rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
++		
++		rtl8225_rf_set_chan(dev, priv->chan);
++
++		//write_nic_word(dev,BRSR,brsr);
++		
++		//rtl8225z2_rf_set_mode(dev);	
++	}
++}
++
++void rtl8225z2_rf_set_mode(struct net_device *dev) 
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if(priv->ieee80211->mode == IEEE_A)
++	{
++		write_rtl8225(dev, 0x5, 0x1865);
++		write_nic_dword(dev, RF_PARA, 0x10084);
++		write_nic_dword(dev, RF_TIMING, 0xa8008);
++		write_phy_ofdm(dev, 0x0, 0x0);
++		write_phy_ofdm(dev, 0xa, 0x6);
++		write_phy_ofdm(dev, 0xb, 0x99);
++		write_phy_ofdm(dev, 0xf, 0x20);
++		write_phy_ofdm(dev, 0x11, 0x7);
++		
++		rtl8225z2_set_gain(dev,4);
++		
++		write_phy_ofdm(dev,0x15, 0x40);
++		write_phy_ofdm(dev,0x17, 0x40);
++	
++		write_nic_dword(dev, 0x94,0x10000000);
++	}else{
++	
++		write_rtl8225(dev, 0x5, 0x1864);
++		write_nic_dword(dev, RF_PARA, 0x10044);
++		write_nic_dword(dev, RF_TIMING, 0xa8008);
++		write_phy_ofdm(dev, 0x0, 0x1);
++		write_phy_ofdm(dev, 0xa, 0x6);
++		write_phy_ofdm(dev, 0xb, 0x99);
++		write_phy_ofdm(dev, 0xf, 0x20);
++		write_phy_ofdm(dev, 0x11, 0x7);
++		
++		rtl8225z2_set_gain(dev,4);
++		
++		write_phy_ofdm(dev,0x15, 0x40);
++		write_phy_ofdm(dev,0x17, 0x40);
++	
++		write_nic_dword(dev, 0x94,0x04000002);
++	}
++}
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_wx.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_wx.c	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,2067 @@
++/* 
++   This file contains wireless extension handlers.
++
++   This is part of rtl8180 OpenSource driver.
++   Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it> 
++   Released under the terms of GPL (General Public Licence)
++   
++   Parts of this driver are based on the GPL part 
++   of the official realtek driver.
++   
++   Parts of this driver are based on the rtl8180 driver skeleton 
++   from Patric Schenke & Andres Salomon.
++
++   Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
++   
++   We want to tanks the Authors of those projects and the Ndiswrapper 
++   project Authors.
++*/
++
++
++
++#include "r8187.h"
++#include "r8180_hw.h"
++//added 1117
++#include "ieee80211.h"
++#ifdef ENABLE_DOT11D
++#include "dot11d.h"
++#endif
++
++
++//#define RATE_COUNT 4
++u32 rtl8180_rates[] = {1000000,2000000,5500000,11000000,
++	6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000};
++#define RATE_COUNT sizeof(rtl8180_rates)/(sizeof(rtl8180_rates[0]))
++
++#ifdef _RTL8187_EXT_PATCH_
++#define IW_MODE_MESH 11
++static int r8180_wx_join_mesh(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
++int r8180_wx_set_channel(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
++static int r8180_wx_mesh_scan(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
++static int r8180_wx_get_mesh_list(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
++#endif
++
++static int r8180_wx_get_freq(struct net_device *dev,
++			     struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	return ieee80211_wx_get_freq(priv->ieee80211,a,wrqu,b);
++}
++
++
++#if 0
++
++static int r8180_wx_set_beaconinterval(struct net_device *dev, struct iw_request_info *aa,
++			  union iwreq_data *wrqu, char *b)
++{
++	int *parms = (int *)b;
++	int bi = parms[0];
++	
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++	down(&priv->wx_sem);
++	DMESG("setting beacon interval to %x",bi);
++	
++	priv->ieee80211->beacon_interval=bi;
++	rtl8180_commit(dev);
++	up(&priv->wx_sem);
++		
++	return 0;	
++}
++
++
++static int r8180_wx_set_forceassociate(struct net_device *dev, struct iw_request_info *aa,
++			  union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv=ieee80211_priv(dev);	
++	int *parms = (int *)extra;
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	priv->ieee80211->force_associate = (parms[0] > 0);
++	
++
++	return 0;
++}
++
++#endif
++static int r8180_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	struct r8180_priv *priv=ieee80211_priv(dev);	
++
++	return ieee80211_wx_get_mode(priv->ieee80211,a,wrqu,b);
++}
++
++
++
++static int r8180_wx_get_rate(struct net_device *dev, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	return ieee80211_wx_get_rate(priv->ieee80211,info,wrqu,extra);
++}
++
++
++
++static int r8180_wx_set_rate(struct net_device *dev, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra)
++{
++	int ret;
++	struct r8180_priv *priv = ieee80211_priv(dev);	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++
++	ret = ieee80211_wx_set_rate(priv->ieee80211,info,wrqu,extra);
++	
++	up(&priv->wx_sem);
++	
++	return ret;
++}
++#ifdef JOHN_IOCTL
++u16 read_rtl8225(struct net_device *dev, u8 addr);
++void write_rtl8225(struct net_device *dev, u8 adr, u16 data);
++u32 john_read_rtl8225(struct net_device *dev, u8 adr);
++void _write_rtl8225(struct net_device *dev, u8 adr, u16 data);
++
++static int r8180_wx_read_regs(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	u8 addr = 0;
++	u16 data1;
++
++	down(&priv->wx_sem);
++
++	
++	get_user(addr,(u8*)wrqu->data.pointer);
++	data1 = read_rtl8225(dev, addr);
++	wrqu->data.length = data1;	
++
++	up(&priv->wx_sem);
++	return 0;
++	 
++}
++
++static int r8180_wx_write_regs(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++        u8 addr = 0;
++
++        down(&priv->wx_sem);
++             
++        get_user(addr, (u8*)wrqu->data.pointer);
++	write_rtl8225(dev, addr, wrqu->data.length);
++
++        up(&priv->wx_sem);
++	return 0;
++
++}
++
++void rtl8187_write_phy(struct net_device *dev, u8 adr, u32 data);
++u8 rtl8187_read_phy(struct net_device *dev,u8 adr, u32 data);
++
++static int r8180_wx_read_bb(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++	u8 databb;
++#if 0 
++	int i;
++	for(i=0;i<12;i++) printk("%8x\n", read_cam(dev, i) );
++#endif
++
++        down(&priv->wx_sem);
++
++	databb = rtl8187_read_phy(dev, (u8)wrqu->data.length, 0x00000000);
++	wrqu->data.length = databb;
++
++	up(&priv->wx_sem);
++	return 0;
++}
++
++void rtl8187_write_phy(struct net_device *dev, u8 adr, u32 data);
++static int r8180_wx_write_bb(struct net_device *dev,
++                               struct iw_request_info *info,
++                               union iwreq_data *wrqu, char *extra)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++        u8 databb = 0;
++
++        down(&priv->wx_sem);
++
++        get_user(databb, (u8*)wrqu->data.pointer);
++        rtl8187_write_phy(dev, wrqu->data.length, databb);
++
++        up(&priv->wx_sem);
++        return 0;
++
++}
++
++
++static int r8180_wx_write_nicb(struct net_device *dev,
++                               struct iw_request_info *info,
++                               union iwreq_data *wrqu, char *extra)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++        u32 addr = 0;
++
++        down(&priv->wx_sem);
++	
++        get_user(addr, (u32*)wrqu->data.pointer);
++        write_nic_byte(dev, addr, wrqu->data.length);
++
++        up(&priv->wx_sem);
++        return 0;
++
++}
++static int r8180_wx_read_nicb(struct net_device *dev,
++                               struct iw_request_info *info,
++                               union iwreq_data *wrqu, char *extra)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++        u32 addr = 0;
++        u16 data1;
++
++        down(&priv->wx_sem);
++
++        get_user(addr,(u32*)wrqu->data.pointer);
++        data1 = read_nic_byte(dev, addr);
++        wrqu->data.length = data1;
++
++        up(&priv->wx_sem);
++        return 0;
++}
++
++static inline int is_same_network(struct ieee80211_network *src,
++                                  struct ieee80211_network *dst,
++				  struct ieee80211_device *ieee)
++{
++        /* A network is only a duplicate if the channel, BSSID, ESSID
++         * and the capability field (in particular IBSS and BSS) all match.  
++         * We treat all <hidden> with the same BSSID and channel
++         * as one network */
++        return (((src->ssid_len == dst->ssid_len)||(ieee->iw_mode == IW_MODE_INFRA)) &&  //YJ,mod, 080819,for hidden ap
++			//((src->ssid_len == dst->ssid_len) &&
++			(src->channel == dst->channel) &&
++			!memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
++			(!memcmp(src->ssid, dst->ssid, src->ssid_len)||(ieee->iw_mode == IW_MODE_INFRA)) &&  //YJ,mod, 080819,for hidden ap 
++			//!memcmp(src->ssid, dst->ssid, src->ssid_len) &&
++			((src->capability & WLAN_CAPABILITY_IBSS) ==
++			(dst->capability & WLAN_CAPABILITY_IBSS)) &&
++			((src->capability & WLAN_CAPABILITY_BSS) ==
++			(dst->capability & WLAN_CAPABILITY_BSS)));
++}
++
++static int r8180_wx_get_ap_status(struct net_device *dev,
++                               struct iw_request_info *info,
++                               union iwreq_data *wrqu, char *extra)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++        struct ieee80211_device *ieee = priv->ieee80211;
++        struct ieee80211_network *target;
++	int name_len;
++
++        down(&priv->wx_sem);
++
++	//count the length of input ssid
++	for(name_len=0 ; ((char*)wrqu->data.pointer)[name_len]!='\0' ; name_len++);
++
++	//search for the correspoding info which is received
++        list_for_each_entry(target, &ieee->network_list, list) {
++                if ( (target->ssid_len == name_len) &&
++		     (strncmp(target->ssid, (char*)wrqu->data.pointer, name_len)==0)){
++			if( ((jiffies-target->last_scanned)/HZ > 1) && (ieee->state == IEEE80211_LINKED) && (is_same_network(&ieee->current_network,target, ieee)) )
++				wrqu->data.length = 999;
++			else
++				wrqu->data.length = target->SignalStrength;
++			if(target->wpa_ie_len>0 || target->rsn_ie_len>0 )
++				//set flags=1 to indicate this ap is WPA
++				wrqu->data.flags = 1;
++			else wrqu->data.flags = 0;
++		
++
++		break;
++                }
++        }
++
++	if (&target->list == &ieee->network_list){
++		wrqu->data.flags = 3;
++	}
++        up(&priv->wx_sem);
++        return 0;
++}
++
++
++
++#endif
++
++static int r8180_wx_set_rawtx(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int ret;
++		
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	
++	ret = ieee80211_wx_set_rawtx(priv->ieee80211, info, wrqu, extra);
++	
++	up(&priv->wx_sem);
++	
++	return ret;
++	 
++}
++
++static int r8180_wx_set_crcmon(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int *parms = (int *)extra;
++	int enable = (parms[0] > 0);
++	short prev = priv->crcmon;
++	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	
++	if(enable) 
++		priv->crcmon=1;
++	else 
++		priv->crcmon=0;
++
++	DMESG("bad CRC in monitor mode are %s", 
++	      priv->crcmon ? "accepted" : "rejected");
++
++	if(prev != priv->crcmon && priv->up){
++		rtl8180_down(dev);
++		rtl8180_up(dev);
++	}
++	
++	up(&priv->wx_sem);
++	
++	return 0;
++}
++
++static int r8180_wx_set_mode(struct net_device *dev, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int ret;	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++#ifdef _RTL8187_EXT_PATCH_
++	if (priv->mshobj && (priv->ieee80211->iw_ext_mode==11)) return 0;	
++#endif
++	down(&priv->wx_sem);
++
++#ifdef CONFIG_IPS
++	if(priv->bInactivePs){
++		if(wrqu->mode != IW_MODE_INFRA){ 
++			down(&priv->ieee80211->ips_sem);
++			IPSLeave(dev);	
++			up(&priv->ieee80211->ips_sem);	
++		}
++	}
++#endif
++	ret = ieee80211_wx_set_mode(priv->ieee80211,a,wrqu,b);
++	
++	rtl8187_set_rxconf(dev);
++	
++	up(&priv->wx_sem);
++	return ret;
++}
++
++
++//YJ,add,080819,for hidden ap
++struct  iw_range_with_scan_capa
++{
++        /* Informative stuff (to choose between different interface) */
++        __u32           throughput;     /* To give an idea... */
++        /* In theory this value should be the maximum benchmarked
++         * TCP/IP throughput, because with most of these devices the
++         * bit rate is meaningless (overhead an co) to estimate how
++         * fast the connection will go and pick the fastest one.
++         * I suggest people to play with Netperf or any benchmark...
++         */
++
++        /* NWID (or domain id) */
++        __u32           min_nwid;       /* Minimal NWID we are able to set */
++        __u32           max_nwid;       /* Maximal NWID we are able to set */
++
++        /* Old Frequency (backward compat - moved lower ) */
++        __u16           old_num_channels;
++        __u8            old_num_frequency;
++
++        /* Scan capabilities */
++        __u8            scan_capa;       
++};
++//YJ,add,080819,for hidden ap
++
++static int rtl8180_wx_get_range(struct net_device *dev, 
++				struct iw_request_info *info, 
++				union iwreq_data *wrqu, char *extra)
++{
++	struct iw_range *range = (struct iw_range *)extra;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	u16 val;
++	int i;
++	struct iw_range_with_scan_capa* tmp = (struct iw_range_with_scan_capa*)range; //YJ,add,080819,for hidden ap
++
++	wrqu->data.length = sizeof(*range);
++	memset(range, 0, sizeof(*range));
++
++	/* Let's try to keep this struct in the same order as in
++	 * linux/include/wireless.h
++	 */
++	
++	/* TODO: See what values we can set, and remove the ones we can't
++	 * set, or fill them with some default data.
++	 */
++
++	/* ~5 Mb/s real (802.11b) */
++	range->throughput = 5 * 1000 * 1000;     
++
++	// TODO: Not used in 802.11b?
++//	range->min_nwid;	/* Minimal NWID we are able to set */
++	// TODO: Not used in 802.11b?
++//	range->max_nwid;	/* Maximal NWID we are able to set */
++	
++        /* Old Frequency (backward compat - moved lower ) */
++//	range->old_num_channels; 
++//	range->old_num_frequency;
++//	range->old_freq[6]; /* Filler to keep "version" at the same offset */
++	if(priv->rf_set_sens != NULL)
++		range->sensitivity = priv->max_sens;	/* signal level threshold range */
++	
++	range->max_qual.qual = 100;
++	/* TODO: Find real max RSSI and stick here */
++	range->max_qual.level = 0;
++	range->max_qual.noise = -98;
++	range->max_qual.updated = 7; /* Updated all three */
++
++	range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */
++	/* TODO: Find real 'good' to 'bad' threshol value for RSSI */
++	range->avg_qual.level = 20 + -98;
++	range->avg_qual.noise = 0;
++	range->avg_qual.updated = 7; /* Updated all three */
++
++	range->num_bitrates = RATE_COUNT;
++	
++	for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) {
++		range->bitrate[i] = rtl8180_rates[i];
++	}
++	
++	range->min_frag = MIN_FRAG_THRESHOLD;
++	range->max_frag = MAX_FRAG_THRESHOLD;
++	
++	range->pm_capa = 0;
++
++	range->we_version_compiled = WIRELESS_EXT;
++	range->we_version_source = 16;
++
++//	range->retry_capa;	/* What retry options are supported */
++//	range->retry_flags;	/* How to decode max/min retry limit */
++//	range->r_time_flags;	/* How to decode max/min retry life */
++//	range->min_retry;	/* Minimal number of retries */
++//	range->max_retry;	/* Maximal number of retries */
++//	range->min_r_time;	/* Minimal retry lifetime */
++//	range->max_r_time;	/* Maximal retry lifetime */
++
++        range->num_channels = 14;
++
++	for (i = 0, val = 0; i < 14; i++) {
++		
++		// Include only legal frequencies for some countries
++#ifdef ENABLE_DOT11D
++		if ((GET_DOT11D_INFO(priv->ieee80211)->channel_map)[i+1]) {
++#else
++		if ((priv->ieee80211->channel_map)[i+1]) {
++#endif
++		        range->freq[val].i = i + 1;
++			range->freq[val].m = ieee80211_wlan_frequencies[i] * 100000;
++			range->freq[val].e = 1;
++			val++;
++		} else {
++			// FIXME: do we need to set anything for channels
++			// we don't use ?
++		}
++		
++		if (val == IW_MAX_FREQUENCIES)
++		break;
++	}
++
++	range->num_frequency = val;
++	range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 |
++                          IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP;
++
++	tmp->scan_capa = 0x01; //YJ,add,080819,for hidden ap
++	
++	return 0;
++}
++
++
++static int r8180_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device* ieee = priv->ieee80211;
++	int ret;
++		
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++	//printk("==============>%s()\n",__FUNCTION__);
++	if(!priv->up) 
++		return -1;
++
++	if (wrqu->data.flags & IW_SCAN_THIS_ESSID)
++	{
++		struct iw_scan_req* req = (struct iw_scan_req*)b;
++		if (req->essid_len)
++		{
++			ieee->current_network.ssid_len = req->essid_len;
++			memcpy(ieee->current_network.ssid, req->essid, req->essid_len);
++		}
++	}
++
++	//set Tr switch to hardware control to scan more bss
++	if(priv->TrSwitchState == TR_SW_TX) {
++		//YJ,add,080611
++		write_nic_byte(dev, RFPinsSelect, (u8)(priv->wMacRegRfPinsSelect));
++		write_nic_byte(dev, RFPinsOutput, (u8)(priv->wMacRegRfPinsOutput));
++		//YJ,add,080611,end
++		priv->TrSwitchState = TR_HW_CONTROLLED;
++	}
++#ifdef _RTL8187_EXT_PATCH_ 
++	if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
++		r8180_wx_mesh_scan(dev,a,wrqu,b);
++		ret = 0;
++	}
++	else
++#endif
++	{
++		down(&priv->wx_sem);
++		if(priv->ieee80211->state != IEEE80211_LINKED){
++			//printk("===>start no link scan\n");
++			//ieee80211_start_scan(priv->ieee80211);	
++			//lzm mod 090115 because wq can't scan complete once
++			//because after start protocal wq scan is in doing
++			//so we should stop it first. 
++			ieee80211_stop_scan(priv->ieee80211);
++			ieee80211_start_scan_syncro(priv->ieee80211);
++			ret = 0;
++		} else {
++			ret = ieee80211_wx_set_scan(priv->ieee80211,a,wrqu,b);
++		}
++		up(&priv->wx_sem);
++	}
++	return ret;
++}
++
++
++static int r8180_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++
++	int ret;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if(!priv->up) return -1;
++#ifdef _RTL8187_EXT_PATCH_
++	if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
++		ret = r8180_wx_get_mesh_list(dev, a, wrqu, b);
++	}
++	else
++#endif
++	{
++	down(&priv->wx_sem);
++
++	ret = ieee80211_wx_get_scan(priv->ieee80211,a,wrqu,b);
++		
++	up(&priv->wx_sem);
++	}
++	return ret;
++}
++
++
++static int r8180_wx_set_essid(struct net_device *dev, 
++			      struct iw_request_info *a,
++			      union iwreq_data *wrqu, char *b)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int ret;
++#ifdef _RTL8187_EXT_PATCH_ 
++	struct ieee80211_device *ieee = priv->ieee80211;	
++	char ch = 0;
++	char tmpmeshid[32];
++	char *p;
++	int tmpmeshid_len=0;
++	int i;
++	short proto_started;	
++#endif
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++	//printk("==========>%s()\n",__FUNCTION__);
++	down(&priv->wx_sem);
++
++#ifdef _RTL8187_EXT_PATCH_ 
++	if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
++		if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
++			ret= -E2BIG;
++			goto out;
++		}
++		if (wrqu->essid.flags && (wrqu->essid.length > 1)) {
++			memset(tmpmeshid,0,32);
++#if LINUX_VERSION_CODE <  KERNEL_VERSION(2,6,20)  
++			tmpmeshid_len=wrqu->essid.length;
++#else
++			tmpmeshid_len=wrqu->essid.length + 1;
++#endif
++			p=b+tmpmeshid_len-2;
++			for(i=tmpmeshid_len-1;i>0;i--)
++			{
++				if((*p)=='@')
++					break;
++				p--;
++			}
++			if((i == 0) || (i == 1)){
++				printk("error:wrong meshid\n");
++				ret = -1;
++				goto out;
++			}	
++				
++			memcpy(tmpmeshid,b,(i-1));
++			p++;
++			 if((tmpmeshid_len-1-i)==1)
++                        {
++                                if(*p > '9'|| *p <= '0'){
++                                        goto out;
++                                } else {
++                                        ch = *p - '0';
++                                }
++                        }
++                        else if((tmpmeshid_len-1-i)==2)
++                        {
++                                if((*p == '1') && (*(p+1) >= '0') && (*(p+1) <= '9'))
++                                        ch = (*p - '0') * 10 + (*(p+1) - '0');
++                                else
++                                        goto out;
++                        }
++                        else {
++                                ret = 0;
++                                goto out;
++                        }
++                        if(ch > 14)
++                        {
++                                ret = 0;
++                                printk("channel is invalid: %d\n",ch);
++                                goto out;
++                        }
++			ieee->sync_scan_hurryup = 1;
++
++			proto_started = ieee->proto_started;
++			if(proto_started)
++				ieee80211_stop_protocol(ieee);
++	
++			printk("==============>tmpmeshid is %s\n",tmpmeshid);
++			priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, tmpmeshid);
++			priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);
++			r8180_wx_set_channel(dev, NULL, NULL, &ch);
++			if (proto_started)
++			        ieee80211_start_protocol(ieee);
++		}
++		else{
++			printk("BUG:meshid is null\n");
++			ret=0;
++			goto out;
++		}
++	
++		ret = 0;
++	}
++	else
++#endif
++	{
++		ret = ieee80211_wx_set_essid(priv->ieee80211,a,wrqu,b);
++	}
++
++#ifdef _RTL8187_EXT_PATCH_ 
++out:
++#endif	
++	up(&priv->wx_sem);
++	return ret;
++}
++
++
++static int r8180_wx_get_essid(struct net_device *dev, 
++			      struct iw_request_info *a,
++			      union iwreq_data *wrqu, char *b)
++{
++	int ret;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	down(&priv->wx_sem);
++	
++	ret = ieee80211_wx_get_essid(priv->ieee80211, a, wrqu, b);
++
++	up(&priv->wx_sem);
++	
++	return ret;
++}
++
++
++static int r8180_wx_set_freq(struct net_device *dev, struct iw_request_info *a,
++			     union iwreq_data *wrqu, char *b)
++{
++	int ret;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++		
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	
++	ret = ieee80211_wx_set_freq(priv->ieee80211, a, wrqu, b);
++	
++	up(&priv->wx_sem);
++	return ret;
++}
++
++static int r8180_wx_get_name(struct net_device *dev, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	return ieee80211_wx_get_name(priv->ieee80211, info, wrqu, extra);
++}
++
++
++static int r8180_wx_set_frag(struct net_device *dev, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	if (wrqu->frag.disabled)
++		priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
++	else {
++		if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
++		    wrqu->frag.value > MAX_FRAG_THRESHOLD)
++			return -EINVAL;
++		
++		priv->ieee80211->fts = wrqu->frag.value & ~0x1;
++	}
++
++	return 0;
++}
++
++
++static int r8180_wx_get_frag(struct net_device *dev, 
++			     struct iw_request_info *info, 
++			     union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	wrqu->frag.value = priv->ieee80211->fts;
++	wrqu->frag.fixed = 0;	/* no auto select */
++	wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD);
++
++	return 0;
++}
++
++
++static int r8180_wx_set_wap(struct net_device *dev,
++			 struct iw_request_info *info,
++			 union iwreq_data *awrq,
++			 char *extra)
++{
++	int ret;
++	struct r8180_priv *priv = ieee80211_priv(dev);	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	//printk("in function %s\n",__FUNCTION__);	
++#ifdef _RTL8187_EXT_PATCH_
++        if (priv->mshobj && (priv->ieee80211->iw_ext_mode==11)){
++		return 0;
++	}
++#endif
++	down(&priv->wx_sem);
++	
++	ret = ieee80211_wx_set_wap(priv->ieee80211,info,awrq,extra);
++	
++	up(&priv->wx_sem);
++	return ret;
++	
++}
++	
++
++static int r8180_wx_get_wap(struct net_device *dev, 
++			    struct iw_request_info *info, 
++			    union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	return ieee80211_wx_get_wap(priv->ieee80211,info,wrqu,extra);
++}
++
++
++static int r8180_wx_get_enc(struct net_device *dev, 
++			    struct iw_request_info *info, 
++			    union iwreq_data *wrqu, char *key)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	return ieee80211_wx_get_encode(priv->ieee80211, info, wrqu, key);
++}
++
++static int r8180_wx_set_enc(struct net_device *dev, 
++			    struct iw_request_info *info, 
++			    union iwreq_data *wrqu, char *key)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int ret;
++#ifdef 	JOHN_HWSEC
++//	struct ieee80211_device *ieee = priv->ieee80211;
++//	u32 TargetContent;
++	u32 hwkey[4]={0,0,0,0};
++	u8 mask=0xff;
++	u32 key_idx=0;
++	u8 broadcast_addr[6] ={	0xff,0xff,0xff,0xff,0xff,0xff}; 
++	u8 zero_addr[4][6] ={	{0x00,0x00,0x00,0x00,0x00,0x00},
++				{0x00,0x00,0x00,0x00,0x00,0x01}, 
++				{0x00,0x00,0x00,0x00,0x00,0x02}, 
++				{0x00,0x00,0x00,0x00,0x00,0x03} };
++	int i;
++
++#endif
++	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	
++	DMESG("Setting SW wep key");
++	ret = ieee80211_wx_set_encode(priv->ieee80211,info,wrqu,key);
++
++	up(&priv->wx_sem);
++
++#ifdef	JOHN_HWSEC
++
++	//sometimes, the length is zero while we do not type key value
++	if(wrqu->encoding.length!=0){
++
++		for(i=0 ; i<4 ; i++){
++			hwkey[i] |=  key[4*i+0]&mask;
++			if(i==1&&(4*i+1)==wrqu->encoding.length) mask=0x00;
++			if(i==3&&(4*i+1)==wrqu->encoding.length) mask=0x00;
++			hwkey[i] |= (key[4*i+1]&mask)<<8;
++			hwkey[i] |= (key[4*i+2]&mask)<<16;
++			hwkey[i] |= (key[4*i+3]&mask)<<24;
++		}
++
++		#define CONF_WEP40  0x4
++		#define CONF_WEP104 0x14
++
++		switch(wrqu->encoding.flags){
++			case 0:
++			case 1:	key_idx = 0; break;
++			case 2:	key_idx = 1; break;
++			case 3:	key_idx = 2; break;
++			case 4:	key_idx	= 3; break;
++			default: break;
++		}
++
++		if(wrqu->encoding.length==0x5){
++			setKey( dev,
++				key_idx,                //EntryNo
++				key_idx,                //KeyIndex 
++				KEY_TYPE_WEP40,         //KeyType
++				zero_addr[key_idx],
++				0,                      //DefaultKey
++				hwkey);                 //KeyContent
++
++			if(key_idx == 0){
++
++				write_nic_byte(dev, WPA_CONFIG, 7);
++
++				setKey( dev,
++					4,                      //EntryNo
++					key_idx,                      //KeyIndex 
++					KEY_TYPE_WEP40,        //KeyType
++					broadcast_addr,         //addr
++					0,                      //DefaultKey
++					hwkey);                 //KeyContent
++			}
++		}
++
++		else if(wrqu->encoding.length==0xd){
++			setKey( dev,
++				key_idx,                //EntryNo
++				key_idx,                //KeyIndex 
++				KEY_TYPE_WEP104,        //KeyType
++				zero_addr[key_idx],
++				0,                      //DefaultKey
++				hwkey);                 //KeyContent
++ 
++			if(key_idx == 0){
++
++				write_nic_byte(dev, WPA_CONFIG, 7);
++		
++				setKey( dev,
++					4,                      //EntryNo
++					key_idx,                      //KeyIndex 
++					KEY_TYPE_WEP104,        //KeyType
++					broadcast_addr,         //addr
++					0,                      //DefaultKey
++					hwkey);                 //KeyContent
++			}
++		}
++		else printk("wrong type in WEP, not WEP40 and WEP104\n");
++
++	}
++
++	//consider the setting different key index situation
++	//wrqu->encoding.flags = 801 means that we set key with index "1"
++	if(wrqu->encoding.length==0 && (wrqu->encoding.flags >>8) == 0x8 ){
++		
++		write_nic_byte(dev, WPA_CONFIG, 7);
++
++		//copy wpa config from default key(key0~key3) to broadcast key(key5)
++		//
++		key_idx = (wrqu->encoding.flags & 0xf)-1 ;
++		write_cam(dev, (4*6),   0xffff0000|read_cam(dev, key_idx*6) );
++		write_cam(dev, (4*6)+1, 0xffffffff);
++		write_cam(dev, (4*6)+2, read_cam(dev, (key_idx*6)+2) );
++		write_cam(dev, (4*6)+3, read_cam(dev, (key_idx*6)+3) );
++		write_cam(dev, (4*6)+4, read_cam(dev, (key_idx*6)+4) );
++		write_cam(dev, (4*6)+5, read_cam(dev, (key_idx*6)+5) );
++	}
++
++#endif /*JOHN_HWSEC*/
++	return ret;
++}
++
++
++static int r8180_wx_set_scan_type(struct net_device *dev, struct iw_request_info *aa, union
++ iwreq_data *wrqu, char *p){
++  
++ 	struct r8180_priv *priv = ieee80211_priv(dev);
++	int *parms=(int*)p;
++	int mode=parms[0];
++		
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	priv->ieee80211->active_scan = mode;
++	
++	return 1;
++}
++
++
++
++static int r8180_wx_set_retry(struct net_device *dev, 
++				struct iw_request_info *info, 
++				union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int err = 0;
++		
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	
++	if (wrqu->retry.flags & IW_RETRY_LIFETIME || 
++	    wrqu->retry.disabled){
++		err = -EINVAL;
++		goto exit;
++	}
++	if (!(wrqu->retry.flags & IW_RETRY_LIMIT)){
++		err = -EINVAL;
++		goto exit;
++	}
++
++	if(wrqu->retry.value > R8180_MAX_RETRY){
++		err= -EINVAL;
++		goto exit;
++	}
++	if (wrqu->retry.flags & IW_RETRY_MAX) {
++		priv->retry_rts = wrqu->retry.value;
++		DMESG("Setting retry for RTS/CTS data to %d", wrqu->retry.value);
++	
++	}else {
++		priv->retry_data = wrqu->retry.value;
++		DMESG("Setting retry for non RTS/CTS data to %d", wrqu->retry.value);
++	}
++	
++	/* FIXME ! 
++	 * We might try to write directly the TX config register
++	 * or to restart just the (R)TX process.
++	 * I'm unsure if whole reset is really needed
++	 */
++
++ 	rtl8180_commit(dev);
++	/*
++	if(priv->up){
++		rtl8180_rtx_disable(dev);
++		rtl8180_rx_enable(dev);
++		rtl8180_tx_enable(dev);
++			
++	}
++	*/
++exit:
++	up(&priv->wx_sem);
++	
++	return err;
++}
++
++static int r8180_wx_get_retry(struct net_device *dev, 
++				struct iw_request_info *info, 
++				union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++
++	wrqu->retry.disabled = 0; /* can't be disabled */
++
++	if ((wrqu->retry.flags & IW_RETRY_TYPE) == 
++	    IW_RETRY_LIFETIME) 
++		return -EINVAL;
++	
++	if (wrqu->retry.flags & IW_RETRY_MAX) {
++		wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MAX;
++		wrqu->retry.value = priv->retry_rts;
++	} else {
++		wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MIN;
++		wrqu->retry.value = priv->retry_data;
++	}
++	//DMESG("returning %d",wrqu->retry.value);
++	
++
++	return 0;
++}
++
++static int r8180_wx_get_sens(struct net_device *dev, 
++				struct iw_request_info *info, 
++				union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	if(priv->rf_set_sens == NULL) 
++		return -1; /* we have not this support for this radio */
++	wrqu->sens.value = priv->sens;
++	return 0;
++}
++
++
++static int r8180_wx_set_sens(struct net_device *dev, 
++				struct iw_request_info *info, 
++				union iwreq_data *wrqu, char *extra)
++{
++	
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	short err = 0;	
++
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	//DMESG("attempt to set sensivity to %ddb",wrqu->sens.value);
++	if(priv->rf_set_sens == NULL) {
++		err= -1; /* we have not this support for this radio */
++		goto exit;
++	}
++	if(priv->rf_set_sens(dev, wrqu->sens.value) == 0)
++		priv->sens = wrqu->sens.value;
++	else
++		err= -EINVAL;
++
++exit:
++	up(&priv->wx_sem);
++	
++	return err;
++}
++
++
++static int dummy(struct net_device *dev, struct iw_request_info *a,
++		 union iwreq_data *wrqu,char *b)
++{
++	return -1;
++}
++static int r8180_wx_set_enc_ext(struct net_device *dev,
++                                        struct iw_request_info *info,
++                                        union iwreq_data *wrqu, char *extra)
++{
++	
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//printk("===>%s()\n", __FUNCTION__);
++
++	int ret=0;
++	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	ret = ieee80211_wx_set_encode_ext(priv->ieee80211, info, wrqu, extra);
++	up(&priv->wx_sem);
++	return ret;	
++
++}
++static int r8180_wx_set_auth(struct net_device *dev,
++                                        struct iw_request_info *info,
++                                        union iwreq_data* data, char *extra)
++{
++	//printk("====>%s()\n", __FUNCTION__);
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int ret=0;
++	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	ret = ieee80211_wx_set_auth(priv->ieee80211, info, &(data->param), extra);
++	up(&priv->wx_sem);
++	return ret;
++}
++
++static int r8180_wx_set_mlme(struct net_device *dev,
++                                        struct iw_request_info *info,
++                                        union iwreq_data *wrqu, char *extra)
++{
++	//printk("====>%s()\n", __FUNCTION__);
++
++	int ret=0;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++#if 1
++	ret = ieee80211_wx_set_mlme(priv->ieee80211, info, wrqu, extra);
++#endif
++	up(&priv->wx_sem);
++	return ret;
++}
++
++static int r8180_wx_set_gen_ie(struct net_device *dev,
++                                        struct iw_request_info *info,
++                                        union iwreq_data* data, char *extra)
++{
++	   //printk("====>%s(), len:%d\n", __FUNCTION__, data->length);
++	int ret=0;
++        struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++        down(&priv->wx_sem);
++#if 1
++        ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, data->data.length);
++#endif
++        up(&priv->wx_sem);
++	//printk("<======%s(), ret:%d\n", __FUNCTION__, ret);
++        return ret;
++
++
++}
++
++#ifdef _RTL8187_EXT_PATCH_
++/*
++   Output:
++     (case 1) Mesh: Enable. MESHID=[%s] (max length of %s is 32 bytes). 
++     (case 2) Mesh: Disable.
++*/
++static int r8180_wx_get_meshinfo(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_get_meshinfo )
++		return 0;
++	return priv->mshobj->ext_patch_r8180_wx_get_meshinfo(dev, info, wrqu, extra);
++}
++
++
++static int r8180_wx_enable_mesh(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++
++	int ret = 0;
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_enable_mesh )
++		return 0;
++
++	down(&priv->wx_sem);
++	if(priv->mshobj->ext_patch_r8180_wx_enable_mesh(dev))
++	{
++		union iwreq_data tmprqu;
++		tmprqu.mode = ieee->iw_mode;
++		ieee->iw_mode = 0;
++		ret = ieee80211_wx_set_mode(ieee, info, &tmprqu, extra);
++		rtl8187_set_rxconf(dev);
++	}
++
++	up(&priv->wx_sem);
++	
++	return ret;
++	
++}
++
++static int r8180_wx_disable_mesh(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++
++	int ret = 0;
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_disable_mesh )
++		return 0;
++
++	down(&priv->wx_sem);
++	if(priv->mshobj->ext_patch_r8180_wx_disable_mesh(dev))
++	{
++		union iwreq_data tmprqu;
++		tmprqu.mode = ieee->iw_mode;
++		ieee->iw_mode = 999;
++		ret = ieee80211_wx_set_mode(ieee, info, &tmprqu, extra);
++		rtl8187_set_rxconf(dev);
++	}
++
++	up(&priv->wx_sem);
++	
++	return ret;
++}
++
++
++int r8180_wx_set_channel(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	int ch = *extra;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++		
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	// is 11s ?
++	if (!priv->mshobj || (ieee->iw_mode != ieee->iw_ext_mode) || !priv->mshobj->ext_patch_r8180_wx_set_channel )
++		return 0;	
++			
++	printk("set channel = %d\n", ch);		
++	if ( ch < 0 ) 	
++	{
++		ieee80211_start_scan(ieee);			// auto
++		ieee->meshScanMode =2;
++	}
++	else	
++	{	
++//#ifdef NETWORKMANAGER_UI
++		if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
++		}
++//#else		
++		else{
++		down(&priv->wx_sem);}
++//#endif
++		ieee->meshScanMode =0;		
++		// ieee->set_chan(dev, ch);
++//#ifdef _RTL8187_EXT_PATCH_
++		if(priv->mshobj->ext_patch_r8180_wx_set_channel)
++		{
++			priv->mshobj->ext_patch_r8180_wx_set_channel(ieee, ch);
++			priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);
++		}
++//#endif
++		ieee->set_chan(ieee->dev, ch);
++		ieee->current_network.channel = ch;
++		queue_work(ieee->wq, &ieee->ext_stop_scan_wq);
++		ieee80211_ext_send_11s_beacon(ieee);
++//#ifdef NETWORKMANAGER_UI
++		if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
++		}
++//#else		
++		else{
++		up(&priv->wx_sem);}
++//#endif
++		//up(&ieee->wx_sem);	
++		
++		// ieee80211_stop_scan(ieee);			// user set	
++		//
++	
++		/*
++		netif_carrier_off(ieee->dev);
++		
++		if (ieee->data_hard_stop)
++			ieee->data_hard_stop(ieee->dev);
++		
++		ieee->state = IEEE80211_NOLINK;
++		ieee->link_change(ieee->dev);
++			
++		ieee->current_network.channel = fwrq->m;
++		ieee->set_chan(ieee->dev, ieee->current_network.channel);
++		
++			
++		if (ieee->data_hard_resume)
++			ieee->data_hard_resume(ieee->dev);	
++		
++		netif_carrier_on(ieee->dev);
++		*/
++		
++	}
++		
++	return 0;
++}
++
++static int r8180_wx_set_meshID(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{	
++	struct r8180_priv *priv = ieee80211_priv(dev);	
++	
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_meshID )
++		return 0;
++
++	//printk("len=%d\n", wrqu->data.length);
++	//printk("\nCall setMeshid.");
++	return priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, wrqu->data.pointer);	
++}
++
++
++/* reserved for future
++static int r8180_wx_add_mac_allow(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_add_mac_allow )
++		return 0;
++
++	return priv->mshobj->ext_patch_r8180_wx_set_add_mac_allow(dev, info, wrqu, extra);
++}
++
++static int r8180_wx_del_mac_allow(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_del_mac_allow )
++		return 0;
++
++	return priv->mshobj->ext_patch_r8180_wx_set_del_mac_allow(dev, info, wrqu, extra);
++}
++*/
++static int r8180_wx_add_mac_deny(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_add_mac_deny )
++		return 0;
++
++	return priv->mshobj->ext_patch_r8180_wx_set_add_mac_deny(dev, info, wrqu, extra);
++}
++
++static int r8180_wx_del_mac_deny(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_set_del_mac_deny )
++		return 0;
++
++	return priv->mshobj->ext_patch_r8180_wx_set_del_mac_deny(dev, info, wrqu, extra);
++}
++
++/* reserved for future
++static int r8180_wx_get_mac_allow(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_get_mac_allow )
++		return 0;
++
++	return priv->mshobj->ext_patch_r8180_wx_get_mac_allow(dev, info, wrqu, extra);
++}
++*/
++
++static int r8180_wx_get_mac_deny(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_get_mac_deny )
++		return 0;
++
++	return priv->mshobj->ext_patch_r8180_wx_get_mac_deny(dev, info, wrqu, extra);
++}
++
++
++static int r8180_wx_get_mesh_list(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_get_mesh_list )
++		return 0;
++
++	return priv->mshobj->ext_patch_r8180_wx_get_mesh_list(dev, info, wrqu, extra);
++}
++
++static int r8180_wx_mesh_scan(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if( ! priv->mshobj || !priv->mshobj->ext_patch_r8180_wx_mesh_scan )
++		return 0;
++
++	return priv->mshobj->ext_patch_r8180_wx_mesh_scan(dev, info, wrqu, extra);
++}
++
++static int r8180_wx_join_mesh(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{	
++	struct r8180_priv *priv = ieee80211_priv(dev);	
++	int index;
++	int ret=0;
++	char extmeshid[32];
++	int len=0;
++	char id[50], ch;
++//#ifdef NETWORKMANAGER_UI
++
++	if((priv->ieee80211->iw_mode == IW_MODE_MESH) && (priv->ieee80211->iw_ext_mode == IW_MODE_MESH)){
++		printk("join mesh %s\n",extra);
++		if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
++			ret= -E2BIG;
++			goto out;
++		}
++		//printk("wrqu->essid.length is %d\n",wrqu->essid.length);
++		//printk("wrqu->essid.flags is %d\n",wrqu->essid.flags);
++		if((wrqu->essid.length == 1) && (wrqu->essid.flags == 1)){
++			ret = 0;
++			goto out;
++		}
++		if (wrqu->essid.flags && wrqu->essid.length) {
++			if(priv->mshobj->ext_patch_r8180_wx_get_selected_mesh_channel(dev, extra, &ch))
++			{
++				priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, extra); 
++				priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch); 
++				r8180_wx_set_channel(dev, NULL, NULL, &ch);
++			}
++			else
++				printk("invalid mesh #\n");
++
++		}
++#if 0
++		else{
++			if(priv->mshobj->ext_patch_r8180_wx_get_selected_mesh_channel(dev, 0, &ch))
++			{
++				priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, extra);
++				priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);  
++				r8180_wx_set_channel(dev, NULL, NULL, &ch);
++			}
++			else
++				printk("invalid mesh #\n");
++
++		}
++#endif
++	}
++	else{
++//#else
++	index = *(extra);
++//	printk("index=%d\n", index);
++	
++	if( ! priv->mshobj 
++		|| !priv->mshobj->ext_patch_r8180_wx_set_meshID 
++		|| !priv->mshobj->ext_patch_r8180_wx_get_selected_mesh )		
++		return 0;
++	
++	if( priv->mshobj->ext_patch_r8180_wx_get_selected_mesh(dev, index, &ch, id) )
++	{
++				//	printk("ch=%d, id=%s\n", ch, id);
++		 priv->mshobj->ext_patch_r8180_wx_set_meshID(dev, id);	
++			priv->mshobj->ext_patch_r8180_wx_set_mesh_chan(dev,ch);	
++		r8180_wx_set_channel(dev, NULL, NULL, &ch);
++	}
++	else
++		printk("invalid mesh #\n");
++	}
++//#endif
++out:
++	return ret;
++}
++
++#endif // _RTL8187_EXT_PATCH_
++
++
++static int r8180_wx_get_radion(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++//	u8 addr;
++
++	down(&priv->wx_sem);
++	if(priv->radion == 1) {
++		*(int *)extra = 1;
++	} else {
++			
++		*(int *)extra = 0;
++	}
++	up(&priv->wx_sem);
++	return 0;
++	 
++}
++
++static int r8180_wx_set_radion(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	int radion = *extra;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++//	struct ieee80211_device *ieee = priv->ieee80211;
++	u8     btCR9346, btConfig3;	
++	int    i;
++	u16    u2bTFPC = 0;
++	u8     u1bTmp;
++
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	printk("set radion = %d\n", radion);
++
++#ifdef _RTL8187_EXT_PATCH_
++        if(ieee->iw_mode == ieee->iw_ext_mode) {
++             printk("mesh mode:: could not set radi on/off = %d\n", radion);
++	     up(&priv->wx_sem);
++             return 0;
++        }
++#endif
++	// Set EEM0 and EEM1 in 9346CR.
++	btCR9346 = read_nic_byte(dev, CR9346);
++	write_nic_byte(dev, CR9346, (btCR9346|0xC0) );
++	// Set PARM_En in Config3.
++	btConfig3 = read_nic_byte(dev, CONFIG3);
++	write_nic_byte(dev, CONFIG3, (btConfig3|CONFIG3_PARM_En) );
++
++	if ( radion == 1) 	//radion off
++	{	
++		printk("==================>RF on\n");
++		write_nic_dword(dev, ANAPARAM, ANAPARM_ON);
++		write_nic_dword(dev, ANAPARAM2, ANAPARM2_ON);
++		write_nic_byte(dev, CONFIG4, (priv->RFProgType));
++		
++		write_nic_byte(dev, 0x085, 0x24); // 061219, SD3 ED: for minicard CCK power leakage issue.
++		write_rtl8225(dev, 0x4, 0x9FF);
++
++		u1bTmp = read_nic_byte(dev, 0x24E);
++		write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5|BIT6))) );// 070124 SD1 Alex: turn on CCK and OFDM.
++		priv->radion = 1; //radion on
++	}
++	else	
++	{	
++		printk("==================>RF off\n");
++		for(i = 0; i < MAX_DOZE_WAITING_TIMES_87B; i++)
++		{ // Make sure TX FIFO is empty befor turn off RFE pwoer.
++			u2bTFPC = read_nic_word(dev, TFPC);
++			if(u2bTFPC == 0)
++			{
++				break;
++			}
++			else
++			{
++				printk("%d times TFPC: %d != 0 before doze!\n", (i+1), u2bTFPC);
++				udelay(10);
++			}
++		}
++		if( i == MAX_DOZE_WAITING_TIMES_87B )
++		{
++			printk("\n\n\n SetZebraRFPowerState8187B(): %d times TFPC: %d != 0 !!!\n\n\n",\
++				      	MAX_DOZE_WAITING_TIMES_87B, u2bTFPC);
++		}
++
++		u1bTmp = read_nic_byte(dev, 0x24E);
++		write_nic_byte(dev, 0x24E, (u1bTmp|BIT5|BIT6));// 070124 SD1 Alex: turn off CCK and OFDM.
++		
++		write_rtl8225(dev, 0x4,0x1FF); // Turn off RF first to prevent BB lock up, suggested by PJ, 2006.03.03.
++		write_nic_byte(dev, 0x085, 0x04); // 061219, SD3 ED: for minicard CCK power leakage issue.
++
++		write_nic_byte(dev, CONFIG4, (priv->RFProgType|Config4_PowerOff));
++
++		write_nic_dword(dev, ANAPARAM, ANAPARM_OFF);
++		write_nic_dword(dev, ANAPARAM2, ANAPARM2_OFF); // 070301, SD1 William: to reduce RF off power consumption to 80 mA.	
++		priv->radion = 0; //radion off
++	}
++	// Clear PARM_En in Config3.
++	btConfig3 &= ~(CONFIG3_PARM_En);
++	write_nic_byte(dev, CONFIG3, btConfig3);
++	// Clear EEM0 and EEM1 in 9346CR.
++	btCR9346 &= ~(0xC0);
++	write_nic_byte(dev, CR9346, btCR9346);
++
++	up(&priv->wx_sem);
++
++	return 0;
++}
++
++static int r8180_wx_set_ratadpt (struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	int ratadapt = *extra;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++		
++	if(priv->ieee80211->bHwRadioOff)
++		return 0;
++
++	down(&priv->wx_sem);
++	printk("Set rate adaptive %s\n", (ratadapt==0)?"on":"off");
++	if(ratadapt == 0) {
++	        del_timer_sync(&priv->rateadapter_timer);
++        	cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
++		priv->rateadapter_timer.function((unsigned long)dev);
++	} else {
++	        del_timer_sync(&priv->rateadapter_timer);
++        	cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
++		printk("force rate to %d\n", ratadapt);
++		ieee->rate = ratadapt;
++	}
++	up(&priv->wx_sem);
++	return 0;
++}
++
++#ifdef ENABLE_TOSHIBA_CONFIG 
++static int r8180_wx_get_tblidx(struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//extern u8 chan_plan_index;
++	//printk("=========>%s(), %x\n", __FUNCTION__, priv->channel_plan);
++	down(&priv->wx_sem);
++	put_user(priv->channel_plan, (u8*)wrqu->data.pointer);	
++	up(&priv->wx_sem);
++	return 0;	
++
++}
++
++//This func will be called after probe auto
++static int r8180_wx_set_tbl (struct net_device *dev, 
++			       struct iw_request_info *info, 
++			       union iwreq_data *wrqu, char *extra)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	u8 len = 0; 
++	s8 err = -1;
++	extern	CHANNEL_LIST Current_tbl;		
++	down(&priv->wx_sem);
++	if (!wrqu->data.pointer)
++	{
++		printk("user data pointer is null\n");
++		goto exit;
++	}
++	len = wrqu->data.length;
++	//printk("=========>%s(), len:%d\n", __FUNCTION__, len);
++	//memset(&Current_tbl, 0, sizeof(CHANNEL_LIST));
++	if (copy_from_user((u8*)&Current_tbl, (void*)wrqu->data.pointer, len))
++	{
++		printk("error copy from user\n");
++		goto exit;
++	}
++	{
++		int i;
++		Current_tbl.Len = len;
++		//printk("%d\n", Current_tbl.Len);
++
++		Dot11d_Init(priv->ieee80211);
++		priv->ieee80211->bGlobalDomain = false;
++		priv->ieee80211->bWorldWide13 = false;
++
++		//lzm add 081205
++		priv->ieee80211->MinPassiveChnlNum=12;
++		priv->ieee80211->IbssStartChnl= 10;
++
++		for (i=0; i<Current_tbl.Len; i++){
++			//printk("%2d ", Current_tbl.Channel[i]);
++			if(priv->channel_plan == COUNTRY_CODE_ETSI)
++			{
++				if(Current_tbl.Channel[i] <= 11)
++				{
++#ifdef ENABLE_DOT11D
++					GET_DOT11D_INFO(priv->ieee80211)->channel_map[Current_tbl.Channel[i]] = 1;
++#else
++					priv->ieee80211->channel_map[Current_tbl.Channel[i]] = 1;
++#endif
++				}
++				else if((Current_tbl.Channel[i] >= 11) && (Current_tbl.Channel[i] <= 13))
++				{
++#ifdef ENABLE_DOT11D
++					GET_DOT11D_INFO(priv->ieee80211)->channel_map[Current_tbl.Channel[i]] = 2;
++#else
++					priv->ieee80211->channel_map[Current_tbl.Channel[i]] = 2;
++#endif
++				}
++			}
++			else
++			{
++				if(Current_tbl.Channel[i] <= 14)
++				{
++#ifdef ENABLE_DOT11D
++					GET_DOT11D_INFO(priv->ieee80211)->channel_map[Current_tbl.Channel[i]] = 1;
++#else
++					priv->ieee80211->channel_map[Current_tbl.Channel[i]] = 1;
++#endif
++				}
++			}
++		}
++#if 0
++		printk("\n");
++		for(i=1; i<MAX_CHANNEL_NUMBER; i++)
++		{
++#ifdef ENABLE_DOT11D
++			printk("%2d ", GET_DOT11D_INFO(priv->ieee80211)->channel_map[i]);
++#else
++			printk("%2d ", priv->ieee80211->channel_map[i]);
++#endif
++		}
++		printk("\n");
++
++#endif
++		if(priv->ieee80211->proto_started)
++		{//we need to restart protocol now if it was start before channel map
++			ieee80211_softmac_stop_protocol(priv->ieee80211);
++			//mdelay(1);
++			ieee80211_softmac_start_protocol(priv->ieee80211); 
++		}
++	}
++	err = 0;
++exit:
++	up(&priv->wx_sem);
++	return err;	
++
++
++}
++
++#endif
++
++
++static iw_handler r8180_wx_handlers[] =
++{
++        NULL,                     /* SIOCSIWCOMMIT */
++        r8180_wx_get_name,   	  /* SIOCGIWNAME */
++        dummy,                    /* SIOCSIWNWID */
++        dummy,                    /* SIOCGIWNWID */
++        r8180_wx_set_freq,        /* SIOCSIWFREQ */
++        r8180_wx_get_freq,        /* SIOCGIWFREQ */
++        r8180_wx_set_mode,        /* SIOCSIWMODE */
++        r8180_wx_get_mode,        /* SIOCGIWMODE */
++        r8180_wx_set_sens,        /* SIOCSIWSENS */
++        r8180_wx_get_sens,        /* SIOCGIWSENS */
++        NULL,                     /* SIOCSIWRANGE */
++        rtl8180_wx_get_range,	  /* SIOCGIWRANGE */
++        NULL,                     /* SIOCSIWPRIV */
++        NULL,                     /* SIOCGIWPRIV */
++        NULL,                     /* SIOCSIWSTATS */
++        NULL,                     /* SIOCGIWSTATS */
++        dummy,                    /* SIOCSIWSPY */
++        dummy,                    /* SIOCGIWSPY */
++        NULL,                     /* SIOCGIWTHRSPY */
++        NULL,                     /* SIOCWIWTHRSPY */
++        r8180_wx_set_wap,      	  /* SIOCSIWAP */
++        r8180_wx_get_wap,         /* SIOCGIWAP */
++        r8180_wx_set_mlme, //NULL,    /* SIOCSIWMLME*/                 /* -- hole -- */
++        dummy,                     /* SIOCGIWAPLIST -- depricated */
++        r8180_wx_set_scan,        /* SIOCSIWSCAN */
++        r8180_wx_get_scan,        /* SIOCGIWSCAN */
++        r8180_wx_set_essid,       /* SIOCSIWESSID */
++        r8180_wx_get_essid,       /* SIOCGIWESSID */
++        dummy,                    /* SIOCSIWNICKN */
++        dummy,                    /* SIOCGIWNICKN */
++        NULL,                     /* -- hole -- */
++        NULL,                     /* -- hole -- */
++        r8180_wx_set_rate,        /* SIOCSIWRATE */
++        r8180_wx_get_rate,        /* SIOCGIWRATE */
++        dummy,                    /* SIOCSIWRTS */
++        dummy,                    /* SIOCGIWRTS */
++        r8180_wx_set_frag,        /* SIOCSIWFRAG */
++        r8180_wx_get_frag,        /* SIOCGIWFRAG */
++        dummy,                    /* SIOCSIWTXPOW */
++        dummy,                    /* SIOCGIWTXPOW */
++        r8180_wx_set_retry,       /* SIOCSIWRETRY */
++        r8180_wx_get_retry,       /* SIOCGIWRETRY */
++        r8180_wx_set_enc,         /* SIOCSIWENCODE */
++        r8180_wx_get_enc,         /* SIOCGIWENCODE */
++        dummy,                    /* SIOCSIWPOWER */
++        dummy,                    /* SIOCGIWPOWER */
++		NULL,			/*---hole---*/
++		NULL, 			/*---hole---*/
++		r8180_wx_set_gen_ie,//NULL, 			/* SIOCSIWGENIE */
++		NULL, 			/* SIOCSIWGENIE */
++		r8180_wx_set_auth,//NULL, 			/* SIOCSIWAUTH */
++		NULL,//r8180_wx_get_auth,//NULL, 			/* SIOCSIWAUTH */
++		r8180_wx_set_enc_ext, 			/* SIOCSIWENCODEEXT */
++		NULL,//r8180_wx_get_enc_ext,//NULL, 			/* SIOCSIWENCODEEXT */
++		NULL, 			/* SIOCSIWPMKSA */
++		NULL, 			 /*---hole---*/
++}; 
++
++
++static const struct iw_priv_args r8180_private_args[] = { 
++	{
++		SIOCIWFIRSTPRIV + 0x0, 
++		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "badcrc" 
++	}, 
++	
++	{
++		SIOCIWFIRSTPRIV + 0x1,
++		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "activescan"
++	
++	},
++	{
++		SIOCIWFIRSTPRIV + 0x2, 
++		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx" 
++	},
++#ifdef JOHN_IOCTL	
++	{
++		SIOCIWFIRSTPRIV + 0x3,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readRF"
++	}
++	,
++	{
++		SIOCIWFIRSTPRIV + 0x4,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writeRF"
++	}
++	,
++	{
++		SIOCIWFIRSTPRIV + 0x5,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readBB"
++	}
++	,
++	{
++		SIOCIWFIRSTPRIV + 0x6,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writeBB"
++	}
++    ,
++    {
++        SIOCIWFIRSTPRIV + 0x7,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "readnicb"
++    }
++    ,
++    {
++        SIOCIWFIRSTPRIV + 0x8,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "writenicb"
++    }
++    ,
++    {
++        SIOCIWFIRSTPRIV + 0x9,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo"
++    },
++#endif
++    {
++        SIOCIWFIRSTPRIV + 0xA,
++                0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED |1, "getradion"
++    },
++    {
++        SIOCIWFIRSTPRIV + 0xB,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setradion"
++    },
++    {
++        SIOCIWFIRSTPRIV + 0xC,
++                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "ratadpt"
++    },
++#ifdef ENABLE_TOSHIBA_CONFIG
++   {
++	SIOCIWFIRSTPRIV + 0xD, 
++	0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "gettblidx" 
++   },
++   {
++	SIOCIWFIRSTPRIV + 0xE, 
++	IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,0, "settblidx" 
++   },
++
++#endif
++
++};
++
++/*
++ * Private ioctl interface information
++ 
++struct	iw_priv_args
++{
++//	__u32		cmd;		
++//	__u16		set_args;	
++//	__u16		get_args;	
++//	char		name[IFNAMSIZ];	
++//};
++*/
++//If get cmd's number is big,there may cause some problemes.
++//So modified by Lawrence,071120
++ 
++static iw_handler r8180_private_handler[] = {
++//	r8180_wx_set_monitor,  /* SIOCIWFIRSTPRIV */
++	r8180_wx_set_crcmon,   /*SIOCIWSECONDPRIV*/
++//	r8180_wx_set_forceassociate,
++//	r8180_wx_set_beaconinterval,
++//	r8180_wx_set_monitor_type,
++	r8180_wx_set_scan_type,
++	r8180_wx_set_rawtx,
++	
++#if 0
++#ifdef _RTL8187_EXT_PATCH_
++	r8180_wx_get_meshinfo,
++	r8180_wx_enable_mesh,
++	r8180_wx_disable_mesh,
++	r8180_wx_set_channel,
++	r8180_wx_set_meshID,
++
++//	r8180_wx_add_mac_allow,
++//	r8180_wx_get_mac_allow,
++//	r8180_wx_del_mac_allow,
++	r8180_wx_add_mac_deny,
++	r8180_wx_get_mac_deny,
++	r8180_wx_del_mac_deny,
++	r8180_wx_get_mesh_list,
++	r8180_wx_mesh_scan,
++	r8180_wx_join_mesh,
++#endif	
++#endif
++
++#ifdef JOHN_IOCTL
++	r8180_wx_read_regs,
++	r8180_wx_write_regs,
++	r8180_wx_read_bb,
++	r8180_wx_write_bb,
++    	r8180_wx_read_nicb,
++    	r8180_wx_write_nicb,
++	r8180_wx_get_ap_status,	
++#endif
++	r8180_wx_get_radion,
++	r8180_wx_set_radion,
++	r8180_wx_set_ratadpt,
++#ifdef ENABLE_TOSHIBA_CONFIG
++	r8180_wx_get_tblidx,
++	r8180_wx_set_tbl,
++#endif
++};
++
++#if WIRELESS_EXT >= 17	
++//WB modefied to show signal to GUI on 18-01-2008
++static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
++{
++       struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_device* ieee = priv->ieee80211;
++	struct iw_statistics* wstats = &priv->wstats;
++//	struct ieee80211_network* target = NULL;
++	int tmp_level = 0;
++	int tmp_qual = 0;
++	int tmp_noise = 0;
++//	unsigned long flag;
++
++	if (ieee->state < IEEE80211_LINKED)
++	{
++		wstats->qual.qual = 0;
++		wstats->qual.level = 0;
++		wstats->qual.noise = 0;
++		wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
++		return wstats;
++	}	
++#if 0
++	spin_lock_irqsave(&ieee->lock, flag);
++	list_for_each_entry(target, &ieee->network_list, list)
++	{
++		if (is_same_network(target, &ieee->current_network))
++		{
++			printk("it's same network:%s\n", target->ssid);
++#if 0
++			if (!tmp_level)
++			{
++				tmp_level = target->stats.signalstrength;
++				tmp_qual = target->stats.signal;
++			}
++			else
++			{
++
++				tmp_level = (15*tmp_level + target->stats.signalstrength)/16;
++				tmp_qual = (15*tmp_qual + target->stats.signal)/16;
++			}
++#else
++			tmp_level = target->stats.signal;
++			tmp_qual = target->stats.signalstrength;
++			tmp_noise = target->stats.noise;			
++			printk("level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise);
++#endif
++			break;
++		}
++	}
++	spin_unlock_irqrestore(&ieee->lock, flag);
++#endif
++	tmp_level = (&ieee->current_network)->stats.signal;
++	tmp_qual = (&ieee->current_network)->stats.signalstrength;
++	tmp_noise = (&ieee->current_network)->stats.noise;			
++	//printk("level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise);
++
++	wstats->qual.level = tmp_level;
++	wstats->qual.qual = tmp_qual;
++	wstats->qual.noise = tmp_noise;
++	wstats->qual.updated = IW_QUAL_ALL_UPDATED| IW_QUAL_DBM;
++	return wstats;
++}
++#endif
++
++
++struct iw_handler_def  r8180_wx_handlers_def={
++	.standard = r8180_wx_handlers,
++	.num_standard = sizeof(r8180_wx_handlers) / sizeof(iw_handler),
++	.private = r8180_private_handler,
++	.num_private = sizeof(r8180_private_handler) / sizeof(iw_handler),
++ 	.num_private_args = sizeof(r8180_private_args) / sizeof(struct iw_priv_args),
++#if WIRELESS_EXT >= 17	
++	.get_wireless_stats = r8180_get_wireless_stats,
++#endif
++	.private_args = (struct iw_priv_args *)r8180_private_args,	
++};
++#ifdef _RTL8187_EXT_PATCH_
++EXPORT_SYMBOL(r8180_wx_set_channel);
++#endif
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8180_wx.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8180_wx.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,21 @@
++/* 
++	This is part of rtl8180 OpenSource driver - v 0.3
++	Copyright (C) Andrea Merello 2004  <andreamrl@tiscali.it> 
++	Released under the terms of GPL (General Public Licence)
++	
++	Parts of this driver are based on the GPL part of the official realtek driver
++	Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
++	Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
++	
++	We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
++*/
++
++/* this file (will) contains wireless extension handlers*/
++
++#ifndef R8180_WX_H
++#define R8180_WX_H
++#include <linux/wireless.h>
++#include "ieee80211.h"
++extern struct iw_handler_def r8180_wx_handlers_def;
++
++#endif
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8187_core.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8187_core.c	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,7149 @@
++/*
++   This is part of rtl8187 OpenSource driver - v 0.1
++   Copyright (C) Andrea Merello 2005  <andreamrl@tiscali.it> 
++   Released under the terms of GPL (General Public License)
++   
++   
++   Parts of this driver are based on the rtl8180 driver skeleton 
++   from Patric Schenke & Andres Salomon.
++
++   Parts of this driver are based on the Intel Pro Wireless 2*00 GPL drivers.
++   
++   some ideas might be derived from David Young rtl8180 netbsd driver.
++   
++   Parts of the usb code are from the r8150.c driver in linux kernel
++   
++   Some ideas borrowed from the 8139too.c driver included in linux kernel.
++   
++   We (I?) want to thanks the Authors of those projecs and also the 
++   Ndiswrapper's project Authors.
++   
++   A special big thanks goes also to Realtek corp. for their help in my 
++   attempt to add RTL8187 and RTL8225 support, and to David Young also. 
++
++	- Please note that this file is a modified version from rtl8180-sa2400 
++	drv. So some other people have contributed to this project, and they are
++	thanked in the rtl8180-sa2400 CHANGELOG.
++*/
++
++#undef LOOP_TEST
++#undef DUMP_RX
++#undef DUMP_TX
++#undef DEBUG_TX_DESC2
++#undef RX_DONT_PASS_UL
++#undef DEBUG_EPROM
++#undef DEBUG_RX_VERBOSE
++#undef DUMMY_RX
++#undef DEBUG_ZERO_RX
++#undef DEBUG_RX_SKB
++#undef DEBUG_TX_FRAG
++#undef DEBUG_RX_FRAG
++#undef DEBUG_TX_FILLDESC
++#undef DEBUG_TX
++#undef DEBUG_IRQ
++#undef DEBUG_RX
++#undef DEBUG_RXALLOC
++#undef DEBUG_REGISTERS
++#undef DEBUG_RING
++#undef DEBUG_IRQ_TASKLET
++#undef DEBUG_TX_ALLOC
++#undef DEBUG_TX_DESC
++#undef CONFIG_SOFT_BEACON
++#undef DEBUG_RW_REGISTER
++
++#define CONFIG_RTL8180_IO_MAP
++//#define CONFIG_SOFT_BEACON
++//#define DEBUG_RW_REGISTER
++
++#include <linux/dmapool.h>
++
++#include "r8180_hw.h"
++#include "r8187.h"
++#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
++#include "r8180_93cx6.h"   /* Card EEPROM */
++#include "r8180_wx.h"
++#include "r8180_dm.h"
++
++#include <linux/usb.h>
++// FIXME: check if 2.6.7 is ok
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7))
++#define usb_kill_urb usb_unlink_urb
++#endif
++
++#ifdef CONFIG_RTL8180_PM
++#include "r8180_pm.h"
++#endif
++
++#ifdef ENABLE_DOT11D
++#include "dot11d.h"
++#endif
++
++#ifndef USB_VENDOR_ID_REALTEK
++#define USB_VENDOR_ID_REALTEK		0x0bda
++#endif
++#ifndef USB_VENDOR_ID_NETGEAR
++#define USB_VENDOR_ID_NETGEAR		0x0846
++#endif
++
++#define TXISR_SELECT(priority)	  ((priority == MANAGE_PRIORITY)?rtl8187_managetx_isr:\
++	(priority == BEACON_PRIORITY)?rtl8187_beacontx_isr: \
++	(priority == VO_PRIORITY)?rtl8187_votx_isr: \
++	(priority == VI_PRIORITY)?rtl8187_vitx_isr:\
++	(priority == BE_PRIORITY)?rtl8187_betx_isr:rtl8187_bktx_isr)
++
++static struct usb_device_id rtl8187_usb_id_tbl[] = {
++	{USB_DEVICE(USB_VENDOR_ID_REALTEK, 0x8187)},
++	{USB_DEVICE(USB_VENDOR_ID_REALTEK, 0x8189)},
++//	{USB_DEVICE_VER(USB_VENDOR_ID_REALTEK, 0x8187,0x0200,0x0200)},
++	{USB_DEVICE(USB_VENDOR_ID_NETGEAR, 0x6100)},
++	{USB_DEVICE(USB_VENDOR_ID_NETGEAR, 0x6a00)},
++	{USB_DEVICE(USB_VENDOR_ID_REALTEK, 0x8197)},
++	{USB_DEVICE(USB_VENDOR_ID_REALTEK, 0x8198)},
++	{}
++};
++
++static char* ifname = "wlan%d";
++#if 0
++static int hwseqnum = 0;
++static int hwwep = 0;
++#endif
++static int channels = 0x3fff;
++//static int channels = 0x7ff;// change by thomas, use 1 - 11 channel 0907-2007
++#define eqMacAddr(a,b)      ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
++//by amy for rate adaptive
++#define DEFAULT_RATE_ADAPTIVE_TIMER_PERIOD      300
++//by amy for rate adaptive
++//by amy for ps
++#define IEEE80211_WATCH_DOG_TIME    2000
++//by amy for ps
++MODULE_LICENSE("GPL");
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++MODULE_VERSION("V 1.1");
++#endif
++MODULE_DEVICE_TABLE(usb, rtl8187_usb_id_tbl);
++MODULE_AUTHOR("Realsil Wlan");
++MODULE_DESCRIPTION("Linux driver for Realtek RTL8187 WiFi cards");
++
++#if 0
++MODULE_PARM(ifname,"s");
++MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
++
++MODULE_PARM(hwseqnum,"i");
++MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
++
++MODULE_PARM(hwwep,"i");
++MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
++
++MODULE_PARM(channels,"i");
++MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
++#endif
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
++module_param(ifname, charp, S_IRUGO|S_IWUSR );
++//module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
++//module_param(hwwep,int, S_IRUGO|S_IWUSR);
++module_param(channels,int, S_IRUGO|S_IWUSR);
++#else
++MODULE_PARM(ifname, "s");
++//MODULE_PARM(hwseqnum,"i");
++//MODULE_PARM(hwwep,"i");
++MODULE_PARM(channels,"i");
++#endif
++
++MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
++//MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
++//MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
++MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++static int __devinit rtl8187_usb_probe(struct usb_interface *intf,
++			 const struct usb_device_id *id);
++static void __devexit rtl8187_usb_disconnect(struct usb_interface *intf);
++#else
++static void *__devinit rtl8187_usb_probe(struct usb_device *udev,unsigned int ifnum,
++			 const struct usb_device_id *id);
++static void __devexit rtl8187_usb_disconnect(struct usb_device *udev, void *ptr);
++#endif
++		 
++
++static struct usb_driver rtl8187_usb_driver = {
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15)
++	.owner		= THIS_MODULE,
++#endif
++	.name		= RTL8187_MODULE_NAME,	          /* Driver name   */
++	.id_table	= rtl8187_usb_id_tbl,	          /* PCI_ID table  */
++	.probe		= rtl8187_usb_probe,	          /* probe fn      */
++	.disconnect	= rtl8187_usb_disconnect,	  /* remove fn     */
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0)
++#ifdef CONFIG_RTL8180_PM
++	.suspend	= rtl8187_suspend,	          /* PM suspend fn */
++	.resume		= rtl8187_resume,                 /* PM resume fn  */
++#else
++	.suspend	= NULL,			          /* PM suspend fn */
++	.resume      	= NULL,			          /* PM resume fn  */
++#endif
++#endif
++};
++
++#ifdef JOHN_HWSEC
++void CAM_mark_invalid(struct net_device *dev, u8 ucIndex)
++{
++        u32 ulContent=0;
++        u32 ulCommand=0;
++        u32 ulEncAlgo=CAM_AES;
++
++        // keyid must be set in config field
++        ulContent |= (ucIndex&3) | ((u16)(ulEncAlgo)<<2);
++
++        ulContent |= BIT15;
++        // polling bit, and No Write enable, and address
++        ulCommand= CAM_CONTENT_COUNT*ucIndex;
++        ulCommand= ulCommand | BIT31|BIT16;
++        // write content 0 is equall to mark invalid
++
++        write_nic_dword(dev, WCAMI, ulContent);  //delay_ms(40);
++        //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_mark_invalid(): WRITE A4: %x \n",ulContent));
++        write_nic_dword(dev, RWCAM, ulCommand);  //delay_ms(40);
++        //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_mark_invalid(): WRITE A0: %x \n",ulCommand));
++}
++
++void CAM_empty_entry(struct net_device *dev, u8 ucIndex)
++{
++        u32 ulCommand=0;
++        u32 ulContent=0;
++        u8 i;   
++        u32 ulEncAlgo=CAM_AES;
++
++        for(i=0;i<6;i++)
++        {
++
++                // filled id in CAM config 2 byte
++                if( i == 0)
++                {
++                        ulContent |=(ucIndex & 0x03) | (ulEncAlgo<<2);
++                        ulContent |= BIT15;
++
++                }
++                else
++                {
++                        ulContent = 0;
++                }
++                // polling bit, and No Write enable, and address
++                ulCommand= CAM_CONTENT_COUNT*ucIndex+i;
++                ulCommand= ulCommand | BIT31|BIT16;
++                // write content 0 is equall to mark invalid
++                write_nic_dword(dev, WCAMI, ulContent);  //delay_ms(40);
++                //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A4: %x \n",ulContent));
++                write_nic_dword(dev, RWCAM, ulCommand);  //delay_ms(40);
++                //RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A0: %x \n",ulCommand));
++        }
++}
++
++void CamResetAllEntry(struct net_device *dev)
++{
++        u8 ucIndex;
++
++        //2004/02/11  In static WEP, OID_ADD_KEY or OID_ADD_WEP are set before STA associate to AP.
++        // However, ResetKey is called on OID_802_11_INFRASTRUCTURE_MODE and MlmeAssociateRequest
++        // In this condition, Cam can not be reset because upper layer will not set this static key again.
++        //if(Adapter->EncAlgorithm == WEP_Encryption)
++        //      return;
++	//debug
++        //DbgPrint("========================================\n");
++        //DbgPrint("          Call ResetAllEntry            \n");
++        //DbgPrint("========================================\n\n");
++
++        for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
++                CAM_mark_invalid(dev, ucIndex);
++        for(ucIndex=0;ucIndex<TOTAL_CAM_ENTRY;ucIndex++)
++                CAM_empty_entry(dev, ucIndex);
++
++}
++
++
++void write_cam(struct net_device *dev, u8 addr, u32 data)
++{
++        write_nic_dword(dev, WCAMI, data);
++        write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
++}
++u32 read_cam(struct net_device *dev, u8 addr)
++{
++        write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
++        return read_nic_dword(dev, 0xa8);
++}
++#endif  /*JOHN_HWSEC*/
++
++#ifdef DEBUG_RW_REGISTER
++//lzm add for write time out test
++void add_into_rw_registers(struct net_device *dev, u32 addr, u32 cont, u8 flag)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	int reg_index = (priv->write_read_register_index % 200) ;
++
++	priv->write_read_registers[reg_index].address = 0;
++	priv->write_read_registers[reg_index].content = 0;
++	priv->write_read_registers[reg_index].flag = 0;
++
++	priv->write_read_registers[reg_index].address = addr;
++	priv->write_read_registers[reg_index].content = cont;
++	priv->write_read_registers[reg_index].flag = flag;
++
++	priv->write_read_register_index = (priv->write_read_register_index + 1) % 200;
++}
++
++bool print_once = 0;
++
++void print_rw_registers(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	int reg_index = 0;
++	int watchdog = 0;
++	if(print_once == false)
++	{
++		print_once = true;
++		for(reg_index = ((priv->write_read_register_index + 1) % 200); watchdog <= 199; reg_index++)
++		{
++			watchdog++;
++			printk("====>reg_addr:0x%x, reg_cont:0x%x, read_or_write:0x%d\n", 
++					priv->write_read_registers[reg_index].address,
++					priv->write_read_registers[reg_index].content,
++					priv->write_read_registers[reg_index].flag);
++		}
++	}
++}
++//lzm add for write time out test
++#endif
++
++#ifdef CPU_64BIT
++void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
++{
++	int status;	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++			       RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++			       indx|0xfe00, 0, &data, 1, HZ / 2);
++	
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	add_into_rw_registers(dev, indx, data, 2);
++#endif
++
++	if (status < 0)
++	{
++		printk("write_nic_byte_E TimeOut!addr:%x, status:%x\n", indx, status);
++#ifdef DEBUG_RW_REGISTER
++		print_rw_registers(dev);
++#endif
++	}	
++}
++
++u8 read_nic_byte_E(struct net_device *dev, int indx)
++{
++	int status;
++	u8 data, *buf;
++	dma_addr_t dma_handle;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	buf = dma_pool_alloc(priv->usb_pool, GFP_ATOMIC, &dma_handle);
++	if (!buf) {
++		printk("read_nic_byte_E out of memory\n");
++		return -ENOMEM;
++	}
++	status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
++			       RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
++			       indx|0xfe00, 0, buf, 1, HZ / 2);
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	add_into_rw_registers(dev, indx, buf[0], 1);
++#endif
++
++        if (status < 0)
++        {
++                printk("read_nic_byte_E TimeOut!addr:%x, status:%x\n",indx,  status);
++#ifdef DEBUG_RW_REGISTER
++		print_rw_registers(dev);
++#endif
++        }
++
++	data = buf[0];
++	dma_pool_free(priv->usb_pool, buf, dma_handle);
++	return data;
++}
++
++void write_nic_byte(struct net_device *dev, int indx, u8 data)
++{
++	int status;
++	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++			       RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 1, HZ / 2);
++
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	add_into_rw_registers(dev, indx, data, 2);
++#endif
++        if (status < 0)
++        {
++                printk("write_nic_byte TimeOut!addr:%x, status:%x\n",indx,  status);
++#ifdef DEBUG_RW_REGISTER
++		print_rw_registers(dev);
++#endif
++        }
++
++
++}
++
++void write_nic_word(struct net_device *dev, int indx, u16 data)
++{
++	
++	int status;
++	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++			       RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 2, HZ / 2);
++
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	add_into_rw_registers(dev, indx, data, 2);
++
++	if(priv->write_read_register_index == 199)
++	{
++		//print_rw_registers(dev);
++	}
++#endif
++        if (status < 0)
++        {
++                printk("write_nic_word TimeOut!addr:%x, status:%x\n",indx,  status);
++#ifdef DEBUG_RW_REGISTER
++		print_rw_registers(dev);
++#endif
++        }
++
++}
++
++void write_nic_dword(struct net_device *dev, int indx, u32 data)
++{
++
++	int status;
++	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++			       RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 4, HZ / 2);
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	add_into_rw_registers(dev, indx, data, 2);
++#endif
++
++
++        if (status < 0)
++        {
++                printk("write_nic_dword TimeOut!addr:%x, status:%x\n",indx,  status);
++#ifdef DEBUG_RW_REGISTER
++		print_rw_registers(dev);
++#endif
++        }
++
++}
++ 
++ u8 read_nic_byte(struct net_device *dev, int indx)
++{
++	u8 data, *buf;
++	int status;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	dma_addr_t dma_handle;
++	
++	buf = dma_pool_alloc(priv->usb_pool, GFP_ATOMIC, &dma_handle);
++	if (!buf) {
++		printk("read_nic_byte: out of memory\n");
++		return -ENOMEM;
++	}
++	status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
++			       RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 1, HZ / 2);
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	add_into_rw_registers(dev, indx, buf[0], 1);
++#endif
++	
++        if (status < 0)
++        {
++                printk("read_nic_byte TimeOut!addr:%x, status:%x\n",indx,  status);
++#ifdef DEBUG_RW_REGISTER
++		print_rw_registers(dev);
++#endif
++        }
++
++	data = buf[0];
++	dma_pool_free(priv->usb_pool, buf, dma_handle);
++	return data;
++}
++
++u16 read_nic_word(struct net_device *dev, int indx)
++{
++	u16 data, *buf;
++	int status;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	dma_addr_t dma_handle;
++	
++	buf = dma_pool_alloc(priv->usb_pool, GFP_ATOMIC, &dma_handle);
++	if (!buf) {
++		printk("read_nic_word: out of memory\n");
++		return -ENOMEM;
++	}
++	status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
++			       RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 2, HZ / 2);
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	add_into_rw_registers(dev, indx, buf[0], 1);
++#endif
++	
++        if (status < 0)
++        {
++                printk("read_nic_word TimeOut!addr:%x, status:%x\n",indx,  status);
++#ifdef DEBUG_RW_REGISTER
++		print_rw_registers(dev);
++#endif
++        }
++
++
++	data = buf[0];
++	dma_pool_free(priv->usb_pool, buf, dma_handle);
++	return data;
++}
++
++u32 read_nic_dword(struct net_device *dev, int indx)
++{
++	u32 data, *buf;
++	int status;
++	dma_addr_t dma_handle;
++//	int result;
++	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	buf = dma_pool_alloc(priv->usb_pool, GFP_ATOMIC, &dma_handle);
++	if (!buf){
++		printk("read_nic_dword: out of memory\n");
++		return -ENOMEM;
++	}
++	status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
++			       RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 4, HZ / 2);
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	add_into_rw_registers(dev, indx, buf[0], 1);
++#endif
++	
++        if (status < 0)
++        {
++                printk("read_nic_dword TimeOut!addr:%x, status:%x\n",indx, status);
++#ifdef DEBUG_RW_REGISTER
++		print_rw_registers(dev);
++#endif
++        }
++
++
++
++	data = buf[0];
++	dma_pool_free(priv->usb_pool, buf, dma_handle);
++	return data;
++}
++#else
++void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
++{
++	int status;	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++			       RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++			       indx|0xfe00, 0, &data, 1, HZ / 2);
++
++	if (status < 0)
++	{
++		printk("write_nic_byte_E TimeOut!addr:0x%x,val:0x%x, status:%x\n", indx,data,status);
++	}	
++}
++
++u8 read_nic_byte_E(struct net_device *dev, int indx)
++{
++	int status;
++	u8 data = 0;
++	u8 buf[64];
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
++			       RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
++			       indx|0xfe00, 0, buf, 1, HZ / 2);
++
++        if (status < 0)
++        {
++                printk("read_nic_byte_E TimeOut!addr:0x%x, status:%x\n", indx, status);
++        }
++
++	data = *(u8*)buf;
++	return data;
++}
++
++void write_nic_byte(struct net_device *dev, int indx, u8 data)
++{
++	int status;
++	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++			       RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 1, HZ / 2);
++
++        if (status < 0)
++        {
++                printk("write_nic_byte TimeOut!addr:0x%x,val:0x%x, status:%x\n", indx,data, status);
++        }
++
++
++}
++
++void write_nic_word(struct net_device *dev, int indx, u16 data)
++{
++	
++	int status;
++	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++			       RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 2, HZ / 2);
++
++        if (status < 0)
++        {
++                printk("write_nic_word TimeOut!addr:0x%x,val:0x%x, status:%x\n", indx,data, status);
++        }
++
++}
++
++void write_nic_dword(struct net_device *dev, int indx, u32 data)
++{
++
++	int status;
++	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
++			       RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, &data, 4, HZ / 2);
++
++
++        if (status < 0)
++        {
++                printk("write_nic_dword TimeOut!addr:0x%x,val:0x%x, status:%x\n", indx,data, status);
++        }
++
++}
++ 
++u8 read_nic_byte(struct net_device *dev, int indx)
++{
++	u8 data = 0;
++	u8 buf[64];
++	int status;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
++			       RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 1, HZ / 2);
++	
++        if (status < 0)
++        {
++                printk("read_nic_byte TimeOut!addr:0x%x,status:%x\n", indx,status);
++        }
++
++
++	data = *(u8*)buf;
++	return data;
++}
++
++u16 read_nic_word(struct net_device *dev, int indx)
++{
++	u16 data = 0;
++	u8 buf[64];
++	int status;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
++			       RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 2, HZ / 2);
++	
++        if (status < 0)
++        {
++                printk("read_nic_word TimeOut!addr:0x%x,status:%x\n", indx,status);
++        }
++
++	data = *(u16*)buf;
++	return data;
++}
++
++u32 read_nic_dword(struct net_device *dev, int indx)
++{
++	u32 data = 0;
++	u8 buf[64];
++	int status;
++	
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct usb_device *udev = priv->udev;
++	
++	status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
++			       RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
++			       (indx&0xff)|0xff00, (indx>>8)&0x03, buf, 4, HZ / 2);
++	
++        if (status < 0)
++        {
++                printk("read_nic_dword TimeOut!addr:0x%x,status:%x\n", indx, status);
++        }
++
++
++	data = *(u32*)buf;
++	return data;
++}
++#endif
++
++
++u8 read_phy_cck(struct net_device *dev, u8 adr);
++u8 read_phy_ofdm(struct net_device *dev, u8 adr);
++/* this might still called in what was the PHY rtl8185/rtl8187 common code 
++ * plans are to possibilty turn it again in one common code...
++ */
++inline void force_pci_posting(struct net_device *dev)
++{
++}
++
++
++static struct net_device_stats *rtl8180_stats(struct net_device *dev);
++void rtl8180_commit(struct net_device *dev);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void rtl8180_restart(struct work_struct *work);
++#else
++void rtl8180_restart(struct net_device *dev);
++#endif
++/****************************************************************************
++   -----------------------------PROCFS STUFF-------------------------
++*****************************************************************************/
++
++static struct proc_dir_entry *rtl8180_proc = NULL;
++static int proc_get_stats_ap(char *page, char **start,
++			  off_t offset, int count,
++			  int *eof, void *data)
++{
++	struct net_device *dev = data;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++	struct ieee80211_network *target;
++	
++	int len = 0;
++
++        list_for_each_entry(target, &ieee->network_list, list) {
++
++		len += snprintf(page + len, count - len,
++                "%s ", target->ssid);
++                len += snprintf(page + len, count - len,
++                "%ld ", (jiffies-target->last_scanned)/HZ);
++
++		
++
++		if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
++	                len += snprintf(page + len, count - len,
++        	        "WPA\n");
++		}
++		else{
++                        len += snprintf(page + len, count - len,
++                        "non_WPA\n");
++                }
++		 
++        }
++	
++	*eof = 1;
++	return len;
++}
++
++static int proc_get_registers(char *page, char **start,
++			  off_t offset, int count,
++			  int *eof, void *data)
++{
++	struct net_device *dev = data;
++	
++	int len = 0;
++	int i,n;
++			
++	int max=0xff;
++	
++	/* This dump the current register page */
++len += snprintf(page + len, count - len,
++                        "\n####################page 0##################\n ");
++
++	for(n=0;n<=max;)
++	{
++		//printk( "\nD: %2x> ", n);
++		len += snprintf(page + len, count - len,
++			"\nD:  %2x > ",n);
++
++		for(i=0;i<16 && n<=max;i++,n++)
++		len += snprintf(page + len, count - len,
++			"%2x ",read_nic_byte(dev,n));
++
++		//	printk("%2x ",read_nic_byte(dev,n));
++	}
++	len += snprintf(page + len, count - len,"\n");
++len += snprintf(page + len, count - len,
++                        "\n####################page 1##################\n ");
++        for(n=0;n<=max;)
++        {
++                //printk( "\nD: %2x> ", n);
++                len += snprintf(page + len, count - len,
++                        "\nD:  %2x > ",n);
++
++                for(i=0;i<16 && n<=max;i++,n++)
++                len += snprintf(page + len, count - len,
++                        "%2x ",read_nic_byte(dev,0x100|n));
++
++                //      printk("%2x ",read_nic_byte(dev,n));
++        }
++len += snprintf(page + len, count - len,
++                        "\n####################page 2##################\n ");
++        for(n=0;n<=max;)
++        {
++                //printk( "\nD: %2x> ", n);
++                len += snprintf(page + len, count - len,
++                        "\nD:  %2x > ",n);
++
++                for(i=0;i<16 && n<=max;i++,n++)
++                len += snprintf(page + len, count - len,
++                        "%2x ",read_nic_byte(dev,0x200|n));
++
++                //      printk("%2x ",read_nic_byte(dev,n));
++        }
++
++
++		
++	*eof = 1;
++	return len;
++
++}
++
++
++static int proc_get_cck_reg(char *page, char **start,
++			  off_t offset, int count,
++			  int *eof, void *data)
++{
++	struct net_device *dev = data;
++	
++	int len = 0;
++	int i,n;
++			
++	int max = 0x5F;
++	
++	/* This dump the current register page */
++	for(n=0;n<=max;)
++	{
++		//printk( "\nD: %2x> ", n);
++		len += snprintf(page + len, count - len,
++			"\nD:  %2x > ",n);
++
++		for(i=0;i<16 && n<=max;i++,n++)
++		len += snprintf(page + len, count - len,
++			"%2x ",read_phy_cck(dev,n));
++
++		//	printk("%2x ",read_nic_byte(dev,n));
++	}
++	len += snprintf(page + len, count - len,"\n");
++
++		
++	*eof = 1;
++	return len;
++
++}
++
++
++static int proc_get_ofdm_reg(char *page, char **start,
++			  off_t offset, int count,
++			  int *eof, void *data)
++{
++	struct net_device *dev = data;
++	
++	int len = 0;
++	int i,n;
++			
++	//int max=0xff;
++	int max = 0x40;
++	
++	/* This dump the current register page */
++	for(n=0;n<=max;)
++	{
++		//printk( "\nD: %2x> ", n);
++		len += snprintf(page + len, count - len,
++			"\nD:  %2x > ",n);
++
++		for(i=0;i<16 && n<=max;i++,n++)
++		len += snprintf(page + len, count - len,
++			"%2x ",read_phy_ofdm(dev,n));
++
++		//	printk("%2x ",read_nic_byte(dev,n));
++	}
++	len += snprintf(page + len, count - len,"\n");
++
++
++		
++	*eof = 1;
++	return len;
++
++}
++
++
++#if 0
++static int proc_get_stats_hw(char *page, char **start,
++			  off_t offset, int count,
++			  int *eof, void *data)
++{
++	struct net_device *dev = data;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	
++	int len = 0;
++	
++	len += snprintf(page + len, count - len,
++		"NIC int: %lu\n"
++		"Total int: %lu\n",
++		priv->stats.ints,
++		priv->stats.shints);
++			
++	*eof = 1;
++	return len;
++}
++#endif
++
++static int proc_get_stats_tx(char *page, char **start,
++			  off_t offset, int count,
++			  int *eof, void *data)
++{
++	struct net_device *dev = data;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	
++	int len = 0;
++	
++	len += snprintf(page + len, count - len,
++		"TX VI priority ok int: %lu\n"
++		"TX VI priority error int: %lu\n"
++		"TX VO priority ok int: %lu\n"
++		"TX VO priority error int: %lu\n"
++		"TX BE priority ok int: %lu\n"
++		"TX BE priority error int: %lu\n"
++		"TX BK priority ok int: %lu\n"
++		"TX BK priority error int: %lu\n"
++		"TX MANAGE priority ok int: %lu\n"
++		"TX MANAGE priority error int: %lu\n"
++		"TX BEACON priority ok int: %lu\n"
++		"TX BEACON priority error int: %lu\n"
++//		"TX high priority ok int: %lu\n"
++//		"TX high priority failed error int: %lu\n"
++		"TX queue resume: %lu\n"
++		"TX queue stopped?: %d\n"
++		"TX fifo overflow: %lu\n"
++//		"TX beacon: %lu\n"
++		"TX VI queue: %d\n"
++		"TX VO queue: %d\n"
++		"TX BE queue: %d\n"
++		"TX BK queue: %d\n"
++		"TX BEACON queue: %d\n"
++		"TX MANAGE queue: %d\n"
++//		"TX HW queue: %d\n"
++		"TX VI dropped: %lu\n"
++		"TX VO dropped: %lu\n"
++		"TX BE dropped: %lu\n"
++		"TX BK dropped: %lu\n"
++		"TX total data packets %lu\n",		
++//		"TX beacon aborted: %lu\n",
++		priv->stats.txviokint,
++		priv->stats.txvierr,
++		priv->stats.txvookint,
++		priv->stats.txvoerr,
++		priv->stats.txbeokint,
++		priv->stats.txbeerr,
++		priv->stats.txbkokint,
++		priv->stats.txbkerr,
++		priv->stats.txmanageokint,
++		priv->stats.txmanageerr,
++		priv->stats.txbeaconokint,
++		priv->stats.txbeaconerr,
++//		priv->stats.txhpokint,
++//		priv->stats.txhperr,
++		priv->stats.txresumed,
++		netif_queue_stopped(dev),
++		priv->stats.txoverflow,
++//		priv->stats.txbeacon,
++		atomic_read(&(priv->tx_pending[VI_PRIORITY])),
++		atomic_read(&(priv->tx_pending[VO_PRIORITY])),
++		atomic_read(&(priv->tx_pending[BE_PRIORITY])),
++		atomic_read(&(priv->tx_pending[BK_PRIORITY])),
++		atomic_read(&(priv->tx_pending[BEACON_PRIORITY])),
++		atomic_read(&(priv->tx_pending[MANAGE_PRIORITY])),
++//		read_nic_byte(dev, TXFIFOCOUNT),
++		priv->stats.txvidrop,
++		priv->stats.txvodrop,
++		priv->stats.txbedrop,
++		priv->stats.txbkdrop,
++		priv->stats.txdatapkt
++//		priv->stats.txbeaconerr
++		);
++			
++	*eof = 1;
++	return len;
++}		
++
++
++
++static int proc_get_stats_rx(char *page, char **start,
++			  off_t offset, int count,
++			  int *eof, void *data)
++{
++	struct net_device *dev = data;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	
++	int len = 0;
++	
++	len += snprintf(page + len, count - len,
++		"RX packets: %lu\n"
++		"RX urb status error: %lu\n"
++		"RX invalid urb error: %lu\n",
++		priv->stats.rxok,
++		priv->stats.rxstaterr,
++		priv->stats.rxurberr);
++			
++	*eof = 1;
++	return len;
++}		
++
++#if WIRELESS_EXT < 17
++static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
++{
++       struct r8180_priv *priv = ieee80211_priv(dev);
++
++       return &priv->wstats;
++}
++#endif
++
++void rtl8180_proc_module_init(void)
++{	
++	DMESG("Initializing proc filesystem");
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
++	rtl8180_proc=create_proc_entry(RTL8187_MODULE_NAME, S_IFDIR, proc_net);
++#else
++	rtl8180_proc=create_proc_entry(RTL8187_MODULE_NAME, S_IFDIR, init_net.proc_net);
++#endif
++}
++
++
++void rtl8180_proc_module_remove(void)
++{
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
++	remove_proc_entry(RTL8187_MODULE_NAME, proc_net);
++#else
++	remove_proc_entry(RTL8187_MODULE_NAME, init_net.proc_net);
++#endif
++}
++
++
++void rtl8180_proc_remove_one(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	if (priv->dir_dev) {
++	//	remove_proc_entry("stats-hw", priv->dir_dev);
++		remove_proc_entry("stats-tx", priv->dir_dev);
++		remove_proc_entry("stats-rx", priv->dir_dev);
++	//	remove_proc_entry("stats-ieee", priv->dir_dev);
++		remove_proc_entry("stats-ap", priv->dir_dev);
++		remove_proc_entry("registers", priv->dir_dev);
++		remove_proc_entry("cck-registers",priv->dir_dev);
++		remove_proc_entry("ofdm-registers",priv->dir_dev);
++		remove_proc_entry(dev->name, rtl8180_proc);
++		priv->dir_dev = NULL;
++	}
++}
++
++
++void rtl8180_proc_init_one(struct net_device *dev)
++{
++	struct proc_dir_entry *e;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	priv->dir_dev = create_proc_entry(dev->name, 
++					  S_IFDIR | S_IRUGO | S_IXUGO, 
++					  rtl8180_proc);
++	if (!priv->dir_dev) {
++		DMESGE("Unable to initialize /proc/net/rtl8187/%s\n",
++		      dev->name);
++		return;
++	}
++	#if 0
++	e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
++				   priv->dir_dev, proc_get_stats_hw, dev);
++				   
++	if (!e) {
++		DMESGE("Unable to initialize "
++		      "/proc/net/rtl8187/%s/stats-hw\n",
++		      dev->name);
++	}
++	#endif
++	e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
++				   priv->dir_dev, proc_get_stats_rx, dev);
++				   
++	if (!e) {
++		DMESGE("Unable to initialize "
++		      "/proc/net/rtl8187/%s/stats-rx\n",
++		      dev->name);
++	}
++	
++	
++	e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
++				   priv->dir_dev, proc_get_stats_tx, dev);
++				   
++	if (!e) {
++		DMESGE("Unable to initialize "
++		      "/proc/net/rtl8187/%s/stats-tx\n",
++		      dev->name);
++	}
++	#if 0
++	e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
++				   priv->dir_dev, proc_get_stats_ieee, dev);
++				   
++	if (!e) {
++		DMESGE("Unable to initialize "
++		      "/proc/net/rtl8187/%s/stats-ieee\n",
++		      dev->name);
++	}
++	
++	#endif
++	
++	e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
++				   priv->dir_dev, proc_get_stats_ap, dev);
++				   
++	if (!e) {
++		DMESGE("Unable to initialize "
++		      "/proc/net/rtl8187/%s/stats-ap\n",
++		      dev->name);
++	}
++	
++	e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
++				   priv->dir_dev, proc_get_registers, dev);
++	if (!e) {
++		DMESGE("Unable to initialize "
++		      "/proc/net/rtl8187/%s/registers\n",
++		      dev->name);
++	}
++
++	e = create_proc_read_entry("cck-registers", S_IFREG | S_IRUGO,
++				   priv->dir_dev, proc_get_cck_reg, dev);
++	if (!e) {
++		DMESGE("Unable to initialize "
++		      "/proc/net/rtl8187/%s/cck-registers\n",
++		      dev->name);
++	}
++	
++	e = create_proc_read_entry("ofdm-registers", S_IFREG | S_IRUGO,
++				   priv->dir_dev, proc_get_ofdm_reg, dev);
++	if (!e) {
++		DMESGE("Unable to initialize "
++		      "/proc/net/rtl8187/%s/ofdm-registers\n",
++		      dev->name);
++	}
++
++#ifdef _RTL8187_EXT_PATCH_
++	if( priv->mshobj && priv->mshobj->ext_patch_create_proc )
++		priv->mshobj->ext_patch_create_proc(priv);
++#endif
++
++}
++/****************************************************************************
++   -----------------------------MISC STUFF-------------------------
++*****************************************************************************/
++
++/* this is only for debugging */
++void print_buffer(u32 *buffer, int len)
++{
++	int i;
++	u8 *buf =(u8*)buffer;
++	
++	printk("ASCII BUFFER DUMP (len: %x):\n",len);
++	
++	for(i=0;i<len;i++)
++		printk("%c",buf[i]);
++		
++	printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
++	
++	for(i=0;i<len;i++)
++		printk("%x",buf[i]);
++
++	printk("\n");
++}
++
++short check_nic_enought_desc(struct net_device *dev, priority_t priority)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//int used = atomic_read((priority == NORM_PRIORITY) ? 
++	//	&priv->tx_np_pending : &priv->tx_lp_pending);
++	int used = atomic_read(&priv->tx_pending[priority]); 
++	
++	return (used < MAX_TX_URB);
++}
++
++void tx_timeout(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//rtl8180_commit(dev);
++        printk("@@@@ Transmit timeout at %ld, latency %ld\n", jiffies,
++                        jiffies - dev->trans_start);
++
++	printk("@@@@ netif_queue_stopped = %d\n", netif_queue_stopped(dev));
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++	schedule_work(&priv->reset_wq);
++#else
++	schedule_task(&priv->reset_wq);
++#endif
++	//DMESG("TXTIMEOUT");
++}
++
++
++/* this is only for debug */
++void dump_eprom(struct net_device *dev)
++{
++	int i;
++	for(i=0; i<63; i++)
++		DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
++}
++
++/* this is only for debug */
++void rtl8180_dump_reg(struct net_device *dev)
++{
++	int i;
++	int n;
++	int max=0xff;
++	
++	DMESG("Dumping NIC register map");	
++	
++	for(n=0;n<=max;)
++	{
++		printk( "\nD: %2x> ", n);
++		for(i=0;i<16 && n<=max;i++,n++)
++			printk("%2x ",read_nic_byte(dev,n));
++	}
++	printk("\n");
++}
++
++/****************************************************************************
++      ------------------------------HW STUFF---------------------------
++*****************************************************************************/
++
++
++void rtl8180_irq_enable(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);	
++	//priv->irq_enabled = 1;
++
++	//write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW | 
++	//		     INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK | 
++	//		     INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |
++	//		     INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
++
++	write_nic_word(dev,INTA_MASK, priv->irq_mask);
++}
++
++
++void rtl8180_irq_disable(struct net_device *dev)
++{
++	write_nic_word(dev,INTA_MASK,0);
++	force_pci_posting(dev);
++//	priv->irq_enabled = 0;
++}
++
++
++void rtl8180_set_mode(struct net_device *dev,int mode)
++{
++	u8 ecmd;
++	ecmd=read_nic_byte(dev, EPROM_CMD);
++	ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
++	ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
++	ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
++	ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
++	write_nic_byte(dev, EPROM_CMD, ecmd);
++}
++
++
++void rtl8180_update_msr(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	u8 msr;
++	
++	msr  = read_nic_byte(dev, MSR);
++	msr &= ~ MSR_LINK_MASK;
++	
++	/* do not change in link_state != WLAN_LINK_ASSOCIATED.
++	 * msr must be updated if the state is ASSOCIATING. 
++	 * this is intentional and make sense for ad-hoc and
++	 * master (see the create BSS/IBSS func)
++	 */
++	if (priv->ieee80211->state == IEEE80211_LINKED){ 
++			
++		if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
++			msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
++		else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
++			msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
++		else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
++			msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
++		
++	}else
++		msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
++		
++	write_nic_byte(dev, MSR, msr);
++}
++
++void rtl8180_set_chan(struct net_device *dev,short ch)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	u32 tx;
++
++	priv->chan=ch;
++	#if 0
++	if(priv->ieee80211->iw_mode == IW_MODE_ADHOC || 
++		priv->ieee80211->iw_mode == IW_MODE_MASTER){
++	
++			priv->ieee80211->link_state = WLAN_LINK_ASSOCIATED;	
++			priv->ieee80211->master_chan = ch;
++			rtl8180_update_beacon_ch(dev); 
++		}
++	#endif
++	
++	/* this hack should avoid frame TX during channel setting*/
++	tx = read_nic_dword(dev,TX_CONF);
++	tx &= ~TX_LOOPBACK_MASK;
++
++#ifndef LOOP_TEST	
++	write_nic_dword(dev,TX_CONF, tx |( TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT));
++	priv->rf_set_chan(dev,priv->chan);
++	//mdelay(10); //CPU occupany is too high. LZM 31/10/2008  
++	write_nic_dword(dev,TX_CONF,tx | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT));
++#endif
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_rx_isr(struct urb *rx_urb, struct pt_regs *regs);
++#else
++void rtl8187_rx_isr(struct urb* rx_urb);
++#endif
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_rx_manage_isr(struct urb *rx_urb, struct pt_regs *regs);
++#else
++void rtl8187_rx_manage_isr(struct urb* rx_urb);
++#endif
++
++
++
++void rtl8187_rx_urbsubmit(struct net_device *dev, struct urb* rx_urb)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	int err;
++	
++	usb_fill_bulk_urb(rx_urb,priv->udev,
++			usb_rcvbulkpipe(priv->udev,(NIC_8187 == priv->card_8187)?0x81:0x83), 
++                	rx_urb->transfer_buffer,
++                	RX_URB_SIZE,
++                	rtl8187_rx_isr,
++                	dev);
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	err = usb_submit_urb(rx_urb, GFP_ATOMIC);	
++#else
++	err = usb_submit_urb(rx_urb);	
++#endif
++	if(err && err != -EPERM){
++		DMESGE("cannot submit RX command. URB_STATUS %x",rx_urb->status);
++	}
++}
++
++
++void rtl8187_rx_manage_urbsubmit(struct net_device *dev, struct urb* rx_urb)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	int err;
++#ifdef THOMAS_BEACON
++	usb_fill_bulk_urb(rx_urb,priv->udev,
++			  usb_rcvbulkpipe(priv->udev,0x09), 
++			  rx_urb->transfer_buffer,
++			  rx_urb->transfer_buffer_length,
++			  rtl8187_rx_manage_isr, dev);
++#endif
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	err = usb_submit_urb(rx_urb, GFP_ATOMIC);	
++#else
++	err = usb_submit_urb(rx_urb);	
++#endif
++	if(err && err != -EPERM){
++		DMESGE("cannot submit RX command. URB_STATUS %x",rx_urb->status);
++	}
++}
++
++
++
++void rtl8187_rx_initiate(struct net_device *dev)
++{
++	int i;
++	unsigned long flags;
++        struct urb *purb;
++
++        struct sk_buff *pskb;
++
++        struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++
++        priv->tx_urb_index = 0;
++
++        if ((!priv->rx_urb) || (!priv->pp_rxskb)) {
++
++                DMESGE("Cannot intiate RX urb mechanism");
++                return;
++
++        }
++
++        priv->rx_inx = 0;
++#ifdef THOMAS_TASKLET
++	atomic_set(&priv->irt_counter,0);
++#endif
++        for(i = 0;i < MAX_RX_URB; i++){
++
++                purb = priv->rx_urb[i] = usb_alloc_urb(0,GFP_KERNEL);
++
++                if(!priv->rx_urb[i])
++                        goto destroy;
++
++                pskb = priv->pp_rxskb[i] =  dev_alloc_skb (RX_URB_SIZE);
++
++                if (pskb == NULL)
++                        goto destroy;
++
++                purb->transfer_buffer_length = RX_URB_SIZE;
++                purb->transfer_buffer = pskb->data;
++        }
++
++	spin_lock_irqsave(&priv->irq_lock,flags);//added by thomas
++
++        for(i=0;i<MAX_RX_URB;i++)
++                rtl8187_rx_urbsubmit(dev,priv->rx_urb[i]);
++
++	spin_unlock_irqrestore(&priv->irq_lock,flags);//added by thomas
++        
++	return;
++
++destroy:
++
++        for(i = 0; i < MAX_RX_URB; i++) {
++
++                purb = priv->rx_urb[i];
++
++                if (purb)
++                        usb_free_urb(purb);
++
++                pskb = priv->pp_rxskb[i];
++
++                if (pskb)
++                        dev_kfree_skb_any(pskb);
++
++        }
++
++        return;
++}
++
++
++void rtl8187_rx_manage_initiate(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	if(!priv->rx_urb)
++		DMESGE("Cannot intiate RX urb mechanism");
++
++	rtl8187_rx_manage_urbsubmit(dev,priv->rx_urb[MAX_RX_URB]);
++		
++}
++
++
++void rtl8187_set_rxconf(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	u32 rxconf;
++	
++	rxconf=read_nic_dword(dev,RX_CONF);
++	rxconf = rxconf &~ MAC_FILTER_MASK;
++	rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
++	rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
++	rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
++	rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
++	//rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);	
++#ifdef SW_ANTE_DIVERSITY
++	rxconf = rxconf | priv->EEPROMCSMethod;//for antenna
++#endif
++
++	if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
++	
++	if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
++	   dev->flags & IFF_PROMISC){
++		rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
++	} /*else if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
++		rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
++		rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
++	}*/else{
++		rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
++		rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
++	}
++	
++	
++	if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
++		rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
++		rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
++	}
++	
++	if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
++		rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
++	
++	
++	rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
++	rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
++	rxconf = rxconf &~ MAX_RX_DMA_MASK;
++	rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
++
++	rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
++	rxconf = rxconf | RCR_ONLYERLPKT;
++	
++	//rxconf = rxconf &~ RCR_CS_MASK;
++	//rxconf = rxconf | (1<<RCR_CS_SHIFT);
++
++	write_nic_dword(dev, RX_CONF, rxconf);	
++	
++	#ifdef DEBUG_RX
++	DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
++	#endif
++}
++
++void rtl8180_rx_enable(struct net_device *dev)
++{
++	u8 cmd;
++
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++
++	rtl8187_rx_initiate(dev);
++	rtl8187_set_rxconf(dev);	
++
++	if(NIC_8187 == priv->card_8187) {
++		cmd=read_nic_byte(dev,CMD);
++		write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
++	} else {
++		//write_nic_dword(dev, RCR, priv->ReceiveConfig);
++	}
++}
++
++
++void rtl8180_tx_enable(struct net_device *dev)
++{
++	u8 cmd;
++	u8 byte;
++	u32 txconf = 0;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++
++	if(NIC_8187B == priv->card_8187){
++		write_nic_dword(dev, TCR, priv->TransmitConfig);	
++		byte = read_nic_byte(dev, MSR);
++		byte |= MSR_LINK_ENEDCA;
++		write_nic_byte(dev, MSR, byte);
++#ifdef LOOP_TEST
++		txconf= read_nic_dword(dev,TX_CONF);
++		txconf = txconf | (TX_LOOPBACK_MAC<<TX_LOOPBACK_SHIFT);
++		write_nic_dword(dev,TX_CONF,txconf);
++#endif
++	} else {
++		byte = read_nic_byte(dev,CW_CONF);
++		byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
++		byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
++		write_nic_byte(dev, CW_CONF, byte);
++
++		byte = read_nic_byte(dev, TX_AGC_CTL);
++		byte &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
++		byte &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
++		byte &= ~(1<<TX_AGC_CTL_FEEDBACK_ANT);
++		write_nic_byte(dev, TX_AGC_CTL, byte);
++
++		txconf= read_nic_dword(dev,TX_CONF);
++
++
++		txconf = txconf &~ TX_LOOPBACK_MASK;
++
++#ifndef LOOP_TEST
++		txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
++#else
++		txconf = txconf | (TX_LOOPBACK_BASEBAND<<TX_LOOPBACK_SHIFT);
++#endif
++		txconf = txconf &~ TCR_SRL_MASK;
++		txconf = txconf &~ TCR_LRL_MASK;
++
++		txconf = txconf | (priv->retry_data<<TX_LRLRETRY_SHIFT); // long
++		txconf = txconf | (priv->retry_rts<<TX_SRLRETRY_SHIFT); // short
++
++		txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
++
++		txconf = txconf &~ TCR_MXDMA_MASK;
++		txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
++
++		txconf = txconf | TCR_DISReqQsize;
++		txconf = txconf | TCR_DISCW;
++		txconf = txconf &~ TCR_SWPLCPLEN;
++
++		txconf=txconf | (1<<TX_NOICV_SHIFT);
++
++		write_nic_dword(dev,TX_CONF,txconf);
++
++#ifdef DEBUG_TX
++		DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
++#endif
++
++		cmd=read_nic_byte(dev,CMD);
++		write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));		
++	}
++}
++
++#if 0
++void rtl8180_beacon_tx_enable(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
++	rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
++	write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);	
++	rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
++}
++
++
++void rtl8180_
++_disable(struct net_device *dev) 
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
++	rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
++	write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
++	rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
++}
++
++#endif
++
++
++void rtl8180_rtx_disable(struct net_device *dev)
++{
++	u8 cmd;
++	int i;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	cmd=read_nic_byte(dev,CMD);
++	write_nic_byte(dev, CMD, cmd &~ \
++		       ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
++	force_pci_posting(dev);
++	mdelay(10);
++
++#ifdef THOMAS_BEACON
++	{
++		int index = priv->rx_inx;//0
++		i=0;
++		if(priv->rx_urb){
++			while(i<MAX_RX_URB){
++				if(priv->rx_urb[index]){
++					usb_kill_urb(priv->rx_urb[index]);
++				}
++				if( index == (MAX_RX_URB-1) )
++					index=0;
++				else
++					index=index+1;
++				i++;
++			}
++			if(priv->rx_urb[MAX_RX_URB])
++				usb_kill_urb(priv->rx_urb[MAX_RX_URB]);
++		}
++	}
++#endif
++}
++
++
++int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
++{
++	#if 0
++	int i;
++	u32 *tmp;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	
++	priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
++					  sizeof(u32)*8*count, 
++					  &priv->txbeaconringdma);
++	if (!priv->txbeaconring) return -1;
++	for (tmp=priv->txbeaconring,i=0;i<count;i++){
++		*tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv 
++		/*
++		*(tmp+2) = (u32)dma_tmp;
++		*(tmp+3) = bufsize;
++		*/
++		if(i+1<count)
++			*(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
++		else
++			*(tmp+4) = (u32)priv->txbeaconringdma;
++		
++		tmp=tmp+8;
++	}
++	#endif
++	return 0;
++}
++
++long NetgearSignalStrengthTranslate(long LastSS,long CurrSS)
++{
++    long RetSS;
++
++        // Step 1. Scale mapping. 
++        if(CurrSS >= 71 && CurrSS <= 100){
++                RetSS = 90 + ((CurrSS - 70) / 3);
++        }else if(CurrSS >= 41 && CurrSS <= 70){
++                RetSS = 78 + ((CurrSS - 40) / 3);
++        }else if(CurrSS >= 31 && CurrSS <= 40){
++                RetSS = 66 + (CurrSS - 30);
++        }else if(CurrSS >= 21 && CurrSS <= 30){
++                RetSS = 54 + (CurrSS - 20);
++        }else if(CurrSS >= 5 && CurrSS <= 20){
++                RetSS = 42 + (((CurrSS - 5) * 2) / 3);
++        }else if(CurrSS == 4){
++                RetSS = 36;
++        }else if(CurrSS == 3){
++                RetSS = 27;
++        }else if(CurrSS == 2){
++                RetSS = 18;
++        }else if(CurrSS == 1){
++                RetSS = 9;
++        }else{
++                RetSS = CurrSS;
++        }
++        //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
++
++        // Step 2. Smoothing.
++        if(LastSS > 0){
++                RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
++        }
++        //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
++
++        return RetSS;
++}
++long TranslateToDbm8187(u8 SignalStrengthIndex)  // 0-100 index.
++{
++        long    SignalPower; // in dBm.
++
++        // Translate to dBm (x=0.5y-95).
++        SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
++        SignalPower -= 95;
++
++        return SignalPower;
++}
++
++
++void rtl8180_reset(struct net_device *dev)
++{
++	
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	u8 cr;
++	int i;
++
++
++	/* make sure the analog power is on before
++	 * reset, otherwise reset may fail
++	 */
++	if(NIC_8187 == priv->card_8187) {
++		rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
++		rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
++		rtl8180_irq_disable(dev);
++		mdelay(200);
++		write_nic_byte_E(dev,0x18,0x10);
++		write_nic_byte_E(dev,0x18,0x11);
++		write_nic_byte_E(dev,0x18,0x00);
++		mdelay(200);
++	}
++
++	
++	cr=read_nic_byte(dev,CMD);
++	cr = cr & 2;
++	cr = cr | (1<<CMD_RST_SHIFT);
++	write_nic_byte(dev,CMD,cr);
++
++	//lzm mod for up take too long time 20081201
++	//force_pci_posting(dev);	
++	//mdelay(200);
++	udelay(20);
++	
++	if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT)) 
++		DMESGW("Card reset timeout!");
++	else 
++		DMESG("Card successfully reset");
++	
++	if(NIC_8187 == priv->card_8187) {
++
++		//printk("This is RTL8187 Reset procedure\n");
++		rtl8180_set_mode(dev,EPROM_CMD_LOAD);
++		force_pci_posting(dev);
++		mdelay(200);
++
++		/* after the eeprom load cycle, make sure we have
++		 * correct anaparams
++		 */
++		rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
++		rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
++	}
++	else {
++		//printk("This is RTL8187B Reset procedure\n");
++		//test pending bug, john 20070815 
++		//initialize tx_pending
++        	for(i=0;i<0x10;i++)  atomic_set(&(priv->tx_pending[i]), 0);
++ 		
++	}
++
++}
++
++inline u16 ieeerate2rtlrate(int rate)
++{
++	switch(rate){
++	case 10:	
++	return 0;
++	case 20:
++	return 1;
++	case 55:
++	return 2;
++	case 110:
++	return 3;
++	case 60:
++	return 4;
++	case 90:
++	return 5;
++	case 120:
++	return 6;
++	case 180:
++	return 7;
++	case 240:
++	return 8;
++	case 360:
++	return 9;
++	case 480:
++	return 10;
++	case 540:
++	return 11;
++	default:
++	return 3;
++	
++	}
++}
++static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
++inline u16 rtl8180_rate2rate(short rate)
++{
++	if (rate >12) return 10;
++	return rtl_rate[rate]; 
++}
++		
++void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_rx_isr(struct urb *rx_urb, struct pt_regs *regs)
++#else
++void rtl8187_rx_isr(struct urb* rx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)rx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	priv->rxurb_task = rx_urb;
++	
++	
++	//DMESGW("David: Rx tasklet start!");
++
++#ifdef THOMAS_TASKLET
++	atomic_inc( &priv->irt_counter );	
++
++	//if( likely(priv->irt_counter_head+1 != priv->irt_counter_tail) ){
++	//	priv->irt_counter_head = (priv->irt_counter_head+1)&0xffff ;
++		tasklet_schedule(&priv->irq_rx_tasklet);
++	//} else{
++		//DMESG("error: priv->irt_counter_head is going to pass through priv->irt_counter_tail\n");
++		/*
++		skb = priv->pp_rxskb[priv->rx_inx];
++		dev_kfree_skb_any(skb);
++
++		skb = dev_alloc_skb(RX_URB_SIZE);
++		if (skb == NULL)
++			panic("No Skb For RX!/n");
++
++		rx_urb->transfer_buffer = skb->data;
++
++		priv->pp_rxskb[priv->rx_inx] = skb;
++		if(status == 0)
++			rtl8187_rx_urbsubmit(dev,rx_urb);
++		else {
++			priv->pp_rxskb[priv->rx_inx] = NULL;
++			dev_kfree_skb_any(skb);
++			printk("RX process aborted due to explicit shutdown (%x) ", status);
++		}
++
++	       if (*prx_inx == (MAX_RX_URB -1))
++			*prx_inx = 0;
++	       else
++			*prx_inx = *prx_inx + 1;
++
++		*/
++	//}
++#endif
++
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_rx_manage_isr(struct urb *rx_urb, struct pt_regs *regs)
++#else
++void rtl8187_rx_manage_isr(struct urb* rx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)rx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int status,cmd;
++	struct sk_buff *skb;
++	u32 *desc;
++	int ret;
++	unsigned long flag;
++
++	//DMESG("RX %d ",rx_urb->status);
++	status = rx_urb->status;
++	if(status == 0){
++		
++		desc = (u32*)(rx_urb->transfer_buffer);
++		cmd = (desc[0] >> 30) & 0x03;
++		//printk(KERN_ALERT "buffersize = %d, length = %d, pipe = %p\n", 
++		//rx_urb->transfer_buffer_length, rx_urb->actual_length, rx_urb->pipe>>15);				
++
++		if(cmd == 0x00) {//beacon interrupt
++			//send beacon packet
++
++                        spin_lock_irqsave(&priv->ieee80211->beaconflag_lock,flag);
++                        if(priv->flag_beacon == true){
++	                //printk("rtl8187_rx_manage_isr(): CMD_TYPE0_BCN_INTR\n");
++
++			skb = ieee80211_get_beacon(priv->ieee80211);
++			if(!skb){ 
++				DMESG("not enought memory for allocating beacon");
++				return;
++			}
++			//printk(KERN_WARNING "to send beacon packet through beacon endpoint!\n");
++			ret = rtl8180_tx(dev, (u32*)skb->data, skb->len, BEACON_PRIORITY,
++					0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
++			
++			if( ret != 0 ){
++				printk(KERN_ALERT "tx beacon packet error : %d !\n", ret);
++			}	
++			dev_kfree_skb_any(skb);
++
++                 //} else {//0x00
++                        //{ log the device information
++                        // At present, It is not implemented just now.
++                        //}
++                //}
++
++                }
++                spin_unlock_irqrestore(&priv->ieee80211->beaconflag_lock,flag);
++                }
++                else if(cmd == 0x01){
++                        //printk("rtl8187_rx_manage_isr(): CMD_TYPE1_TX_CLOSE\n");
++                        priv->CurrRetryCnt += (u16)desc[0]&0x000000ff;
++                       //printk("priv->CurrRetryCnt is %d\n",priv->CurrRetryCnt);
++                }
++                else
++                        printk("HalUsbInCommandComplete8187B(): unknown Type(%#X) !!!\n", cmd);
++
++	}else{
++		priv->stats.rxstaterr++;
++		priv->ieee80211->stats.rx_errors++;
++	}
++
++	
++	if( status == 0 )
++	//if(status != -ENOENT)
++		rtl8187_rx_manage_urbsubmit(dev, rx_urb);
++	else 
++		;//DMESG("Mangement RX process aborted due to explicit shutdown");
++}
++
++#if 0
++void rtl8180_tx_queues_stop(struct net_device *dev)
++{
++	//struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
++	dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
++	dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
++	dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
++
++	rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
++	write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
++	rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
++}
++#endif
++
++void rtl8180_data_hard_stop(struct net_device *dev)
++{
++	//FIXME !!
++	#if 0
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
++	rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
++	write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
++	rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
++	#endif
++}
++
++
++void rtl8180_data_hard_resume(struct net_device *dev)
++{
++	// FIXME !!
++	#if 0
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
++	rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
++	write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
++	rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
++	#endif
++}
++
++unsigned int PRI2EP[4] = {0x06,0x07,0x05,0x04};
++// this function TX data frames when the ieee80211 stack requires this.
++// It checks also if we need to stop the ieee tx queue, eventually do it
++void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	
++	short morefrag = 0;	
++	unsigned long flags;
++	struct ieee80211_hdr *h = (struct ieee80211_hdr  *) skb->data;
++
++	unsigned char ep;
++	short ret;	//john
++
++	if (le16_to_cpu(h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS)
++		morefrag = 1;
++	//DMESG("%x %x", h->frame_ctl, h->seq_ctl);
++	/*
++	* This function doesn't require lock because we make
++	* sure it's called with the tx_lock already acquired.
++	* this come from the kernel's hard_xmit callback (trought
++	* the ieee stack, or from the try_wake_queue (again trought
++	* the ieee stack.
++	*/
++	spin_lock_irqsave(&priv->tx_lock,flags);	
++
++	//lzm mod 20081128 for sometimes wlan down but it still have some pkt to tx
++	if((priv->ieee80211->bHwRadioOff)||(!priv->up))
++	{
++		spin_unlock_irqrestore(&priv->tx_lock,flags);	
++	
++		return;	
++	}	
++
++	if(NIC_8187B == priv->card_8187){
++		ep = PRI2EP[skb->priority];
++	} else {
++		ep = LOW_PRIORITY;
++	}
++	//if (!check_nic_enought_desc(dev, PRI2EP[skb->priority])){
++	if (!check_nic_enought_desc(dev, ep)){
++		DMESG("Error: no TX slot ");
++		ieee80211_stop_queue(priv->ieee80211);
++	}
++
++#ifdef LED_SHIN
++	priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_TX); 
++#endif
++
++	ret =	rtl8180_tx(dev, (u32*)skb->data, skb->len, ep, morefrag,ieeerate2rtlrate(rate));
++	if(ret!=0) DMESG("Error: rtl8180_tx failed in rtl8180_hard_data_xmit\n");//john
++
++	priv->stats.txdatapkt++;
++	
++	//if (!check_nic_enought_desc(dev, PRI2EP[skb->priority])){
++	if (!check_nic_enought_desc(dev, ep)){
++		ieee80211_stop_queue(priv->ieee80211);
++	}
++		
++	spin_unlock_irqrestore(&priv->tx_lock,flags);	
++			
++}
++
++//This is a rough attempt to TX a frame
++//This is called by the ieee 80211 stack to TX management frames.
++//If the ring is full packet are dropped (for data frame the queue
++//is stopped before this can happen).
++
++int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct ieee80211_device *ieee = priv->ieee80211;
++	int ret;
++	unsigned long flags;
++	spin_lock_irqsave(&priv->tx_lock,flags);
++
++	//lzm mod 20081128 for sometimes wlan down but it still have some pkt to tx
++	if((priv->ieee80211->bHwRadioOff)||(!priv->up))
++	{
++		spin_unlock_irqrestore(&priv->tx_lock,flags);	
++		return 0;	
++	}
++	
++	ret = rtl8180_tx(dev, (u32*)skb->data, skb->len, MANAGE_PRIORITY, 0, ieeerate2rtlrate(ieee->basic_rate));
++
++	priv->ieee80211->stats.tx_bytes+=skb->len;
++	priv->ieee80211->stats.tx_packets++;
++	
++	spin_unlock_irqrestore(&priv->tx_lock,flags);	
++	
++	return ret;
++}
++
++
++#if 0
++// longpre 144+48 shortpre 72+24
++u16 rtl8180_len2duration(u32 len, short rate,short* ext)
++{
++	u16 duration;
++	u16 drift;
++	*ext=0;
++	
++	switch(rate){
++	case 0://1mbps
++		*ext=0;
++		duration = ((len+4)<<4) /0x2;
++		drift = ((len+4)<<4) % 0x2;
++		if(drift ==0 ) break;
++		duration++;
++		break;
++		
++	case 1://2mbps
++		*ext=0;
++		duration = ((len+4)<<4) /0x4;
++		drift = ((len+4)<<4) % 0x4;
++		if(drift ==0 ) break;
++		duration++;
++		break;
++		
++	case 2: //5.5mbps
++		*ext=0;
++		duration = ((len+4)<<4) /0xb;
++		drift = ((len+4)<<4) % 0xb;
++		if(drift ==0 ) 
++			break;
++		duration++;
++		break;
++		
++	default:
++	case 3://11mbps				
++		*ext=0;
++		duration = ((len+4)<<4) /0x16;
++		drift = ((len+4)<<4) % 0x16;
++		if(drift ==0 ) 
++			break;
++		duration++;
++		if(drift > 6) 
++			break;
++		*ext=1;
++		break;
++	}
++	
++	return duration;
++}
++#endif
++
++void rtl8180_try_wake_queue(struct net_device *dev, int pri);
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_lptx_isr(struct urb *tx_urb, struct pt_regs *regs)
++#else
++void rtl8187_lptx_isr(struct urb* tx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if(tx_urb->status == 0){
++		dev->trans_start = jiffies;	//john
++		priv->stats.txlpokint++;
++		priv->txokbytestotal+=tx_urb->actual_length;
++	}else{
++		priv->stats.txlperr++;
++	}
++
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++
++	if(atomic_read(&priv->tx_pending[LOW_PRIORITY]) >= 1)
++		atomic_dec(&priv->tx_pending[LOW_PRIORITY]);
++
++	rtl8180_try_wake_queue(dev,LOW_PRIORITY);
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_nptx_isr(struct urb *tx_urb, struct pt_regs *regs)
++#else
++void rtl8187_nptx_isr(struct urb* tx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if(tx_urb->status == 0){
++		dev->trans_start = jiffies;	     //john
++		priv->stats.txnpokint++;
++	}else{
++		priv->stats.txnperr++;
++	}
++
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++
++	if(atomic_read(&priv->tx_pending[NORM_PRIORITY]) >= 1)
++		atomic_dec(&priv->tx_pending[NORM_PRIORITY]);
++	//rtl8180_try_wake_queue(dev,NORM_PRIORITY);
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_votx_isr(struct urb *tx_urb, struct pt_regs *regs)
++#else
++void rtl8187_votx_isr(struct urb* tx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if(tx_urb->status == 0){
++		dev->trans_start = jiffies;	     //john
++		priv->stats.txvookint++;
++		priv->txokbytestotal+=tx_urb->actual_length;
++	}else{
++		priv->stats.txvoerr++;
++	}
++
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++
++	if(atomic_read(&priv->tx_pending[VO_PRIORITY]) >= 1)
++		atomic_dec(&priv->tx_pending[VO_PRIORITY]);
++	rtl8180_try_wake_queue(dev,VO_PRIORITY);
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_vitx_isr(struct urb *tx_urb, struct pt_regs *regs)
++#else
++void rtl8187_vitx_isr(struct urb* tx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if(tx_urb->status == 0){
++		dev->trans_start = jiffies;	     //john
++		priv->stats.txviokint++;
++		priv->txokbytestotal+=tx_urb->actual_length;
++	}else{
++		priv->stats.txvierr++;
++	}
++
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++
++	if(atomic_read(&priv->tx_pending[VI_PRIORITY]) >= 1)
++		atomic_dec(&priv->tx_pending[VI_PRIORITY]);
++	rtl8180_try_wake_queue(dev,VI_PRIORITY);
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_betx_isr(struct urb *tx_urb, struct pt_regs *regs)
++#else
++void rtl8187_betx_isr(struct urb* tx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if(tx_urb->status == 0){
++		dev->trans_start = jiffies;	     //john
++		priv->stats.txbeokint++;
++		priv->txokbytestotal+=tx_urb->actual_length;
++	}else{
++		priv->stats.txbeerr++;
++	}
++
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++
++	if(atomic_read(&priv->tx_pending[BE_PRIORITY]) >= 1)
++		atomic_dec(&priv->tx_pending[BE_PRIORITY]);
++	rtl8180_try_wake_queue(dev, BE_PRIORITY);
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_bktx_isr(struct urb *tx_urb, struct pt_regs *regs)
++#else
++void rtl8187_bktx_isr(struct urb* tx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if(tx_urb->status == 0){
++		dev->trans_start = jiffies;	     //john
++		priv->stats.txbkokint++;
++	}else{
++		priv->stats.txbkerr++;
++	}
++
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++
++	if(atomic_read(&priv->tx_pending[BK_PRIORITY]) >= 1)
++		atomic_dec(&priv->tx_pending[BK_PRIORITY]);
++	rtl8180_try_wake_queue(dev,BK_PRIORITY);
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_beacontx_isr(struct urb *tx_urb, struct pt_regs *regs)
++#else
++void rtl8187_beacontx_isr(struct urb* tx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	if(tx_urb->status == 0){
++		dev->trans_start = jiffies;	     //john
++		priv->stats.txbeaconokint++;
++		priv->txokbytestotal+=tx_urb->actual_length;
++	}else{
++		priv->stats.txbeaconerr++;
++	}
++
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++
++	if(atomic_read(&priv->tx_pending[BEACON_PRIORITY]) >= 1)
++		atomic_dec(&priv->tx_pending[BEACON_PRIORITY]);
++	//rtl8180_try_wake_queue(dev,BEACON_PRIORITY);
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++void rtl8187_managetx_isr(struct urb *tx_urb, struct pt_regs *regs)
++#else
++void rtl8187_managetx_isr(struct urb* tx_urb)
++#endif
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if(tx_urb->status == 0){
++		dev->trans_start = jiffies;	     //john
++		priv->stats.txmanageokint++;
++		priv->txokbytestotal+=tx_urb->actual_length;
++	}else{
++		priv->stats.txmanageerr++;
++	}
++
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++
++	if(atomic_read(&priv->tx_pending[MANAGE_PRIORITY]) >= 1)
++		atomic_dec(&priv->tx_pending[MANAGE_PRIORITY]);
++//	rtl8180_try_wake_queue(dev,MANAGE_PRIORITY);
++}
++
++void rtl8187_beacon_stop(struct net_device *dev)
++{
++	u8 msr, msrm, msr2;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	unsigned long flag;
++	msr  = read_nic_byte(dev, MSR);
++	msrm = msr & MSR_LINK_MASK;
++	msr2 = msr & ~MSR_LINK_MASK;
++	if(NIC_8187B == priv->card_8187) {
++		spin_lock_irqsave(&priv->ieee80211->beaconflag_lock,flag);
++        	priv->flag_beacon = false;
++        	spin_unlock_irqrestore(&priv->ieee80211->beaconflag_lock,flag);
++	}
++	if ((msrm == (MSR_LINK_ADHOC<<MSR_LINK_SHIFT) ||
++		(msrm == (MSR_LINK_MASTER<<MSR_LINK_SHIFT)))){
++		write_nic_byte(dev, MSR, msr2 | MSR_LINK_NONE);
++		write_nic_byte(dev, MSR, msr);	
++	}
++}
++
++
++void rtl8187_net_update(struct net_device *dev)
++{
++
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct ieee80211_network *net;
++	net = & priv->ieee80211->current_network;
++	
++	
++	write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
++	write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
++
++	rtl8180_update_msr(dev);
++		
++	//rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
++	write_nic_word(dev, AtimWnd, 2);
++	write_nic_word(dev, AtimtrItv, 100);	
++	write_nic_word(dev, BEACON_INTERVAL, net->beacon_interval);
++	//write_nic_word(dev, BcnIntTime, 100);
++	write_nic_word(dev, BcnIntTime, 0x3FF);
++	
++
++}
++
++void rtl8187_beacon_tx(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct sk_buff *skb;
++	int i = 0;
++	u8 cr;
++	unsigned long flag;
++	rtl8187_net_update(dev);
++
++	if(NIC_8187B == priv->card_8187) {
++		//Cause TSF timer of MAC reset to 0
++		cr=read_nic_byte(dev,CMD);
++		cr = cr | (1<<CMD_RST_SHIFT);
++		write_nic_byte(dev,CMD,cr);
++
++		//lzm mod 20081201
++		//mdelay(200);
++		mdelay(20);
++
++		if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT)) 
++			DMESGW("Card reset timeout for ad-hoc!");
++		else 
++			DMESG("Card successfully reset for ad-hoc");
++
++		write_nic_byte(dev,CMD, (read_nic_byte(dev,CMD)|CR_RE|CR_TE));
++		spin_lock_irqsave(&priv->ieee80211->beaconflag_lock,flag);
++                priv->flag_beacon = true;
++                spin_unlock_irqrestore(&priv->ieee80211->beaconflag_lock,flag);
++
++		//rtl8187_rx_manage_initiate(dev);		
++	} else {
++		printk(KERN_WARNING "get the beacon!\n");
++		skb = ieee80211_get_beacon(priv->ieee80211);
++		if(!skb){ 
++			DMESG("not enought memory for allocating beacon");
++			return;
++		}
++
++		write_nic_byte(dev, BQREQ, read_nic_byte(dev, BQREQ) | (1<<7));
++
++		i=0;
++		//while(!read_nic_byte(dev,BQREQ & (1<<7)))
++		while( (read_nic_byte(dev, BQREQ) & (1<<7)) == 0 )
++		{
++			msleep_interruptible_rtl(HZ/2);
++			if(i++ > 10){
++				DMESGW("get stuck to wait HW beacon to be ready");
++				return ;
++			}
++		}
++		//tx 	
++		rtl8180_tx(dev, (u32*)skb->data, skb->len, NORM_PRIORITY,
++				0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
++		if(skb)
++			dev_kfree_skb_any(skb);
++	}
++}
++
++#if 0
++void rtl8187_nptx_isr(struct urb *tx_urb, struct pt_regs *regs)
++{
++	struct net_device *dev = (struct net_device*)tx_urb->context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if(tx_urb->status == 0)
++		priv->stats.txnpokint++;
++	else
++		priv->stats.txnperr++;
++	kfree(tx_urb->transfer_buffer);
++	usb_free_urb(tx_urb);
++	atomic_dec(&priv->tx_np_pending);
++	//rtl8180_try_wake_queue(dev,NORM_PRIORITY);
++}
++#endif
++inline u8 rtl8180_IsWirelessBMode(u16 rate)
++{
++	if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
++		return 1;
++	else return 0;
++}
++
++u16 N_DBPSOfRate(u16 DataRate);
++
++u16 ComputeTxTime( 
++		u16		FrameLength,
++		u16		DataRate,
++		u8		bManagementFrame,
++		u8		bShortPreamble
++		)
++{
++	u16	FrameTime;
++	u16	N_DBPS;
++	u16	Ceiling;
++
++	if( rtl8180_IsWirelessBMode(DataRate) )
++	{
++		if( bManagementFrame || !bShortPreamble || DataRate == 10 ){	// long preamble
++			FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));		
++		}else{	// Short preamble
++			FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
++		}
++		if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
++				FrameTime ++;
++	} else {	//802.11g DSSS-OFDM PLCP length field calculation.
++		N_DBPS = N_DBPSOfRate(DataRate);
++		Ceiling = (16 + 8*FrameLength + 6) / N_DBPS 
++				+ (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
++		FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
++	}
++	return FrameTime;
++}
++
++u16 N_DBPSOfRate(u16 DataRate)
++{
++	 u16 N_DBPS = 24;
++	 
++	 switch(DataRate)
++	 {
++	 case 60:
++	  N_DBPS = 24;
++	  break;
++	 
++	 case 90:
++	  N_DBPS = 36;
++	  break;
++	 
++	 case 120:
++	  N_DBPS = 48;
++	  break;
++	 
++	 case 180:
++	  N_DBPS = 72;
++	  break;
++	 
++	 case 240:
++	  N_DBPS = 96;
++	  break;
++	 
++	 case 360:
++	  N_DBPS = 144;
++	  break;
++	 
++	 case 480:
++	  N_DBPS = 192;
++	  break;
++	 
++	 case 540:
++	  N_DBPS = 216;
++	  break;
++	 
++	 default:
++	  break;
++	 }
++	 
++	 return N_DBPS;
++}
++// NOte!!!
++// the rate filled in is the rtl_rate.
++// while the priv->ieee80211->basic_rate,used in the following code is ieee80211 rate.
++
++#ifdef JUST_FOR_87SEMESH
++#define ActionHeadLen 30
++#endif
++#define sCrcLng         4	
++#define sAckCtsLng	112		// bits in ACK and CTS frames
++short rtl8180_tx(struct net_device *dev, u32* txbuf, int len, priority_t priority,
++		 short morefrag, short rate)
++{
++	u32 	*tx;
++	int 	pend ;
++	int 	status;
++	struct 	urb *tx_urb;
++	int 	urb_len;	
++	struct 	r8180_priv *priv = ieee80211_priv(dev);
++	struct 	ieee80211_hdr_3addr_QOS *frag_hdr = (struct ieee80211_hdr_3addr_QOS *)txbuf;
++	struct 	ieee80211_device *ieee;//added for descriptor
++	u8 	dest[ETH_ALEN];
++
++	bool	bUseShortPreamble = false;
++	bool	bCTSEnable = false;
++	bool	bRTSEnable = false;
++	u16 	Duration = 0; 
++	u16	RtsDur = 0;
++	u16	ThisFrameTime = 0;	
++	u16	TxDescDuration = 0;
++
++	ieee = priv->ieee80211;
++#if 0
++//{added by david for filter the packet listed in the filter table
++#ifdef _RTL8187_EXT_PATCH_
++	if((ieee->iw_mode == ieee->iw_ext_mode) && (ieee->ext_patch_ieee80211_acl_query))
++	{
++		if(!ieee->ext_patch_ieee80211_acl_query(ieee, frag_hdr->addr1)) {
++			return 0;
++		}
++	}
++#endif
++//}
++#endif
++
++#ifdef JUST_FOR_87SEMESH
++//#ifdef Lawrence_Mesh
++	u8* meshtype = (u8*)txbuf;
++	if(*meshtype == 0xA8)
++	{
++		//overflow??
++		//memcpy(meshtype+ActionHeadLen+2,meshtype+ActionHeadLen,Len-ActionHeadLen);
++		//memcpy(meshtype+ActionHeadLen,0,2);
++		u8 actionframe[256];
++		memset(actionframe,0,256);
++		memcpy(actionframe,meshtype,ActionHeadLen);
++		memcpy(actionframe+ActionHeadLen+2,meshtype+ActionHeadLen,len-ActionHeadLen);
++		txbuf = (u32*)actionframe;
++		len=len+2;
++		frag_hdr = (struct ieee80211_hdr_3addr_QOS *)txbuf;			
++	}
++#endif
++
++	//pend = atomic_read((priority == NORM_PRIORITY)? &priv->tx_np_pending : &priv->tx_lp_pending);
++	pend = atomic_read(&priv->tx_pending[priority]);
++	/* we are locked here so the two atomic_read and inc are executed without interleaves */
++	if( pend > MAX_TX_URB){
++		if(NIC_8187 == priv->card_8187) {
++			if(priority == NORM_PRIORITY)
++				priv->stats.txnpdrop++;
++			else
++				priv->stats.txlpdrop++;
++
++		} else {
++			switch (priority) {
++				case VO_PRIORITY:
++					priv->stats.txvodrop++;
++					break;
++				case VI_PRIORITY:
++					priv->stats.txvidrop++;
++					break;
++				case BE_PRIORITY:
++					priv->stats.txbedrop++;
++					break;
++				case MANAGE_PRIORITY: //lzm for MANAGE_PRIORITY pending
++					if(priv->commit == 0)
++					{
++						priv->commit = 1;
++						printk(KERN_INFO "manage pkt pending will commit now....\n");
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++						schedule_work(&priv->reset_wq);
++#else
++						schedule_task(&priv->reset_wq);
++#endif
++					}	
++					break;
++				default://BK_PRIORITY
++					priv->stats.txbkdrop++;
++					break;	
++			}
++		}
++		//printk(KERN_INFO "tx_pending: %d > MAX_TX_URB\n", priority);
++		return -1;
++	}
++
++	urb_len = len + ((NIC_8187 == priv->card_8187)?(4*3):(4*8));
++	if((0 == (urb_len&63))||(0 == (urb_len&511))) {
++		urb_len += 1;	  
++	}
++
++	tx = kmalloc(urb_len, GFP_ATOMIC);
++	if(!tx) return -ENOMEM;
++	memset(tx, 0, sizeof(u32) * 8);
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
++#else
++	tx_urb = usb_alloc_urb(0);
++#endif
++
++	if(!tx_urb){
++		kfree(tx);
++		return -ENOMEM;
++	}
++
++	// Check multicast/broadcast
++	if (ieee->iw_mode == IW_MODE_INFRA) {
++		/* To DS: Addr1 = BSSID, Addr2 = SA,
++		   Addr3 = DA */
++		//memcpy(&dest, frag_hdr->addr3, ETH_ALEN);
++		memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
++	} else if (ieee->iw_mode == IW_MODE_ADHOC) {
++		/* not From/To DS: Addr1 = DA, Addr2 = SA,
++		   Addr3 = BSSID */
++		memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
++	}
++
++	if (is_multicast_ether_addr(dest) ||is_broadcast_ether_addr(dest)) 
++	{
++		Duration = 0;
++		RtsDur = 0;
++		bRTSEnable = false;
++		bCTSEnable = false;
++
++		ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), false, bUseShortPreamble);
++		TxDescDuration = ThisFrameTime;
++	} else {// Unicast packet
++		//u8 AckRate;
++		u16 AckTime;
++
++		// Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
++		//AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
++		// Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
++		//AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
++		//For simplicity, just use the 1M basic rate
++		AckTime = ComputeTxTime(14, 10,false, false);	// AckCTSLng = 14 use 1M bps send
++		//AckTime = ComputeTxTime(14, 2,false, false);	// AckCTSLng = 14 use 1M bps send
++
++		if ( ((len + sCrcLng) > priv->rts) && priv->rts ){ // RTS/CTS.
++			u16 RtsTime, CtsTime;
++			//u16 CtsRate;
++			bRTSEnable = true;
++			bCTSEnable = false;
++
++			// Rate and time required for RTS.
++			RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, false, false);
++			// Rate and time required for CTS.
++			CtsTime = ComputeTxTime(14, 10,false, false);	// AckCTSLng = 14 use 1M bps send
++
++			// Figure out time required to transmit this frame.
++			ThisFrameTime = ComputeTxTime(len + sCrcLng, 
++					rtl8180_rate2rate(rate), 
++					false, 
++					bUseShortPreamble);
++
++			// RTS-CTS-ThisFrame-ACK.
++			RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
++
++			TxDescDuration = RtsTime + RtsDur;
++		}else {// Normal case.
++			bCTSEnable = false;
++			bRTSEnable = false;
++			RtsDur = 0;
++
++			ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), false, bUseShortPreamble);
++			TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
++		}
++
++		if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
++			// ThisFrame-ACK.
++			Duration = aSifsTime + AckTime;
++		} else { // One or more fragments remained.
++			u16 NextFragTime;
++			NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
++					rtl8180_rate2rate(rate), 
++					false, bUseShortPreamble );
++
++			//ThisFrag-ACk-NextFrag-ACK.
++			Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
++		}
++
++	} // End of Unicast packet
++
++
++	//fill the tx desriptor
++	tx[0] |= len & 0xfff;
++#ifdef JOHN_HWSEC
++        if(frag_hdr->frame_ctl & IEEE80211_FCTL_WEP ){
++                tx[0] &= 0xffff7fff;
++		//group key may be different from pairwise key
++		if(	frag_hdr->addr1[0]==0xff &&
++			frag_hdr->addr1[0]==0xff &&
++ 			frag_hdr->addr1[0]==0xff &&
++			frag_hdr->addr1[0]==0xff &&
++			frag_hdr->addr1[0]==0xff &&
++			frag_hdr->addr1[0]==0xff ){
++			if(ieee->broadcast_key_type == KEY_TYPE_CCMP) tx[7] |= 0x2;//ccmp
++			else tx[7] |= 0x1;//wep and tkip
++		}
++		else {
++			if(ieee->pairwise_key_type == KEY_TYPE_CCMP) tx[7] |= 0x2;//CCMP
++			else tx[7] |= 0x1;//WEP and TKIP
++		}
++        }
++        else
++#endif /*JOHN_HWSEC*/
++
++	tx[0] |= (1<<15);
++
++	if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE){
++		if (priv->plcp_preamble_mode==1 && rate!=0) {	//  short mode now, not long!
++			tx[0] |= (1<<16);	
++		}			// enable short preamble mode.
++	}
++
++	if(morefrag) tx[0] |= (1<<17);
++	//printk(KERN_WARNING "rtl_rate = %d\n", rate);
++	tx[0] |= (rate << 24); //TX rate
++	frag_hdr->duration_id = Duration;
++
++	if(NIC_8187B == priv->card_8187) {
++		if(bCTSEnable) {
++			tx[0] |= (1<<18);
++		}
++
++		if(bRTSEnable) //rts enable
++		{
++			tx[0] |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
++			tx[0] |= (1<<23);//rts enable
++			tx[1] |= RtsDur;//RTS Duration
++		}	
++		tx[3] |= (TxDescDuration<<16); //DURATION
++		if( WLAN_FC_GET_STYPE(le16_to_cpu(frag_hdr->frame_ctl)) == IEEE80211_STYPE_PROBE_RESP )
++			tx[5] |= (1<<8);//(priv->retry_data<<8); //retry lim ;	
++		else
++			tx[5] |= (11<<8);//(priv->retry_data<<8); //retry lim ;	
++
++		//frag_hdr->duration_id = Duration;
++		memcpy(tx+8,txbuf,len);
++	} else {
++		if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
++			tx[0] |= (1<<23);	//enalbe RTS function
++			tx[1] |= RtsDur; 	//Need to edit here!  ----hikaru
++		}
++		else {
++			tx[1]=0;
++		}
++		tx[0] |= (ieeerate2rtlrate(priv->ieee80211->basic_rate) << 19); /* RTS RATE - should be basic rate */
++
++		tx[2] = 3;  // CW min
++		tx[2] |= (7<<4); //CW max
++		tx[2] |= (11<<8);//(priv->retry_data<<8); //retry lim
++
++		//	printk("%x\n%x\n",tx[0],tx[1]);
++
++#ifdef DUMP_TX
++		int i;
++		printk("<Tx pkt>--rate %x---",rate);
++		for (i = 0; i < (len + 3); i++)
++			printk("%2x", ((u8*)tx)[i]);
++		printk("---------------\n");
++#endif
++		memcpy(tx+3,txbuf,len);
++	}
++
++#ifdef JOHN_DUMP_TXDESC
++                int i;
++                printk("<Tx descriptor>--rate %x---",rate);
++                for (i = 0; i < 8; i++)
++                        printk("%8x ", tx[i]);
++                printk("\n");
++#endif
++#ifdef JOHN_DUMP_TXPKT
++		{
++                int j;
++                printk("\n---------------------------------------------------------------------\n");
++                printk("<Tx packet>--rate %x--urb_len in decimal %d",rate, urb_len);
++                for (j = 32; j < (urb_len); j++){
++                        if( ( (j-32)%24 )==0 ) printk("\n");
++                        printk("%2x ", ((u8*)tx)[j]);
++                }
++                printk("\n---------------------------------------------------------------------\n");
++
++		}
++#endif
++
++	if(NIC_8187 == priv->card_8187) {
++		usb_fill_bulk_urb(tx_urb,priv->udev,
++				usb_sndbulkpipe(priv->udev,priority), tx,
++				urb_len, (priority == LOW_PRIORITY)?rtl8187_lptx_isr:rtl8187_nptx_isr, dev);
++
++	} else {
++		//printk(KERN_WARNING "Tx packet use by submit urb!\n");
++		/* FIXME check what EP is for low/norm PRI */
++		usb_fill_bulk_urb(tx_urb,priv->udev,
++				usb_sndbulkpipe(priv->udev,priority), tx,
++				urb_len, TXISR_SELECT(priority), dev);
++	}
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	status = usb_submit_urb(tx_urb, GFP_ATOMIC);
++#else
++	status = usb_submit_urb(tx_urb);
++#endif
++
++	if (!status){
++		//atomic_inc((priority == NORM_PRIORITY)? &priv->tx_np_pending : &priv->tx_lp_pending);
++		atomic_inc(&priv->tx_pending[priority]);
++		dev->trans_start = jiffies;
++		//printk("=====> tx_pending[%d]=%d\n", priority, atomic_read(&priv->tx_pending[priority]));
++		return 0;
++	}else{
++		DMESGE("Error TX URB %d, error pending %d",
++				//atomic_read((priority == NORM_PRIORITY)? &priv->tx_np_pending : &priv->tx_lp_pending),
++				atomic_read(&priv->tx_pending[priority]),
++				status);
++		return -1;
++	}
++}
++
++ short rtl8187_usb_initendpoints(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	priv->rx_urb = (struct urb**) kmalloc (sizeof(struct urb*) * (MAX_RX_URB+1), GFP_KERNEL);
++
++        memset(priv->rx_urb, 0, sizeof(struct urb*) * MAX_RX_URB);
++
++#ifdef JACKSON_NEW_RX
++        priv->pp_rxskb = (struct sk_buff **)kmalloc(sizeof(struct sk_buff *) * MAX_RX_URB, GFP_KERNEL);
++        if (priv->pp_rxskb == NULL)
++                goto destroy;
++
++        memset(priv->pp_rxskb, 0, sizeof(struct sk_buff*) * MAX_RX_URB);
++#endif
++#ifdef THOMAS_BEACON
++	{
++		int align;	
++		unsigned long oldaddr,newaddr; //lzm mod for 64bit cpu crash 20081107
++		priv->rx_urb[MAX_RX_URB] = usb_alloc_urb(0, GFP_KERNEL);		
++		priv->oldaddr = kmalloc(16, GFP_KERNEL);
++		oldaddr = (unsigned long)priv->oldaddr;
++		align = oldaddr&3;
++		if(align != 0 ){
++			newaddr = oldaddr + 4 - align;
++			priv->rx_urb[MAX_RX_URB]->transfer_buffer_length = 16-4+align;
++		}	
++		else{
++			newaddr = oldaddr;
++			priv->rx_urb[MAX_RX_URB]->transfer_buffer_length = 16;
++		}
++		priv->rx_urb[MAX_RX_URB]->transfer_buffer = (u32*)newaddr;
++	}
++#endif
++       
++
++        goto _middle;
++
++
++destroy:
++
++#ifdef JACKSON_NEW_RX
++        if (priv->pp_rxskb) {
++                kfree(priv->pp_rxskb);
++		priv->pp_rxskb = NULL;
++
++        }
++#endif 
++        if (priv->rx_urb) {
++                kfree(priv->rx_urb);
++        }
++	priv->rx_urb = NULL;
++
++        DMESGE("Endpoint Alloc Failure");
++        return -ENOMEM;
++	
++
++_middle:
++
++	return 0;
++	
++}
++#ifdef THOMAS_BEACON
++void rtl8187_usb_deleteendpoints(struct net_device *dev)
++{	
++	int i;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++        if( in_interrupt() )
++		printk(KERN_ALERT " %ld in interrupt \n",in_interrupt() );
++	if(priv->rx_urb){
++		for(i=0;i<(MAX_RX_URB+1);i++){
++			if(priv->rx_urb[i]) {
++				usb_kill_urb(priv->rx_urb[i]);
++				usb_free_urb(priv->rx_urb[i]);
++			}
++		}
++		kfree(priv->rx_urb);
++		priv->rx_urb = NULL;	
++	}	
++	if(priv->oldaddr){
++		kfree(priv->oldaddr);
++		priv->oldaddr = NULL;
++	}	
++        if (priv->pp_rxskb) {
++                kfree(priv->pp_rxskb);
++                priv->pp_rxskb = 0;
++	}
++}
++#endif
++
++void rtl8187_set_rate(struct net_device *dev)
++{
++	int i;
++	u16 word;
++	int basic_rate,min_rr_rate,max_rr_rate;
++	
++	//if (ieee80211_is_54g(priv->ieee80211->current_network) && 
++	//	priv->ieee80211->state == IEEE80211_LINKED){
++	basic_rate = ieeerate2rtlrate(240);
++	min_rr_rate = ieeerate2rtlrate(60);
++	max_rr_rate = ieeerate2rtlrate(240);
++	
++	/*
++	}else{
++		basic_rate = ieeerate2rtlrate(20);
++		min_rr_rate = ieeerate2rtlrate(10);
++		max_rr_rate = ieeerate2rtlrate(110);
++	}
++	*/
++	
++	write_nic_byte(dev, RESP_RATE,
++			max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
++
++	//word  = read_nic_word(dev, BRSR);
++	word  = read_nic_word(dev, BRSR_8187);
++	word &= ~BRSR_MBR_8185;
++		
++
++	for(i=0;i<=basic_rate;i++)
++		word |= (1<<i);
++
++	//write_nic_word(dev, BRSR, word);
++	write_nic_word(dev, BRSR_8187, word);
++}
++
++
++void rtl8187_link_change(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//write_nic_word(dev, BintrItv, net->beacon_interval);
++	rtl8187_net_update(dev);
++	/*update timing params*/
++	rtl8180_set_chan(dev, priv->chan);
++	rtl8187_set_rxconf(dev);
++}
++
++#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
++void rtl8180_wmm_param_update(struct work_struct* work)
++{
++	struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
++	struct net_device *dev = ieee->dev;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++#else
++void rtl8180_wmm_param_update(struct ieee80211_device *ieee)
++{
++	struct net_device *dev = ieee->dev;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++#endif
++	u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
++	u8 mode = ieee->current_network.mode;
++	AC_CODING	eACI;
++	AC_PARAM	AcParam;
++	PAC_PARAM	pAcParam;
++	u8 i;
++
++	//8187 need not to update wmm param, added by David, 2006.9.8
++	if(NIC_8187 == priv->card_8187) {
++		return; 
++	}
++
++	if(!ieee->current_network.QoS_Enable) 
++	{
++		//legacy ac_xx_param update
++		
++		AcParam.longData = 0;
++		AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
++		AcParam.f.AciAifsn.f.ACM = 0;
++		AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
++		AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
++		AcParam.f.TXOPLimit = 0;
++		for(eACI = 0; eACI < AC_MAX; eACI++)
++		{
++			AcParam.f.AciAifsn.f.ACI = (u8)eACI;
++			{
++				u8		u1bAIFS;
++				u32		u4bAcParam;
++
++
++				pAcParam = (PAC_PARAM)(&AcParam);
++				// Retrive paramters to udpate.
++				u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20)  + aSifsTime; 
++				u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)	| 
++							  (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)	|  
++							  (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)	|  
++							  (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
++
++				switch(eACI)
++				{
++					case AC1_BK:
++						write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
++						break;
++
++					case AC0_BE:
++						write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
++						break;
++
++					case AC2_VI:
++						write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
++						break;
++
++					case AC3_VO:
++						write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
++						break;
++
++					default:
++						printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
++						break;
++				}
++			}
++		}
++
++		return;
++	}
++	//
++	for(i = 0; i < AC_MAX; i++){
++		pAcParam = (AC_PARAM * )ac_param;
++		{
++			AC_CODING	eACI;
++			u8		u1bAIFS;
++			u32		u4bAcParam;
++
++			// Retrive paramters to udpate.
++			eACI = pAcParam->f.AciAifsn.f.ACI; 
++			//Mode G/A: slotTimeTimer = 9; Mode B: 20
++			u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime; 
++			u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)	| 
++						  (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)	|  
++						  (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)	|  
++						  (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
++
++			switch(eACI)
++			{
++				case AC1_BK:
++					write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
++					//printk(KERN_WARNING "[%04x]:0x%08x\n",AC_BK_PARAM,read_nic_dword(dev, AC_BK_PARAM));
++					break;
++
++				case AC0_BE:
++					write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
++					//printk(KERN_WARNING "[%04x]:0x%08x\n",AC_BE_PARAM,read_nic_dword(dev, AC_BE_PARAM));
++					break;
++
++				case AC2_VI:
++					write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
++					//printk(KERN_WARNING "[%04x]:0x%08x\n",AC_VI_PARAM,read_nic_dword(dev, AC_VI_PARAM));
++					break;
++
++				case AC3_VO:
++					write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
++					//printk(KERN_WARNING "[%04x]:0x%08x\n",AC_VO_PARAM,read_nic_dword(dev, AC_VO_PARAM));
++					break;
++
++				default:
++					printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
++					break;
++			}
++		}
++		ac_param += (sizeof(AC_PARAM));
++	}
++}
++
++int IncludedInSupportedRates(struct r8180_priv *priv,  u8 TxRate  )
++{
++    	u8 rate_len;
++        u8 rate_ex_len;
++        u8                      RateMask = 0x7F;
++        u8                      idx;
++        unsigned short          Found = 0;
++        u8                      NaiveTxRate = TxRate&RateMask;
++
++    	rate_len = priv->ieee80211->current_network.rates_len;
++        rate_ex_len = priv->ieee80211->current_network.rates_ex_len;
++		
++        for( idx=0; idx< rate_len; idx++ ){
++                if( (priv->ieee80211->current_network.rates[idx] & RateMask) == NaiveTxRate ) {
++                        Found = 1;
++                        goto found_rate;
++                }
++        }
++		
++   	for( idx=0; idx< rate_ex_len; idx++ ) {
++                if( (priv->ieee80211->current_network.rates_ex[idx] & RateMask) == NaiveTxRate ) {
++                        Found = 1;
++                        goto found_rate;
++                }
++        }
++	
++        return Found;
++        found_rate:
++        return Found;
++}
++//
++//      Description:
++//              Get the Tx rate one degree up form the input rate in the supported rates.
++//              Return the upgrade rate if it is successed, otherwise return the input rate.
++//      By Bruce, 2007-06-05.
++// 
++u8 GetUpgradeTxRate(struct net_device *dev, u8 rate)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++        u8                      UpRate;
++
++        // Upgrade 1 degree.
++        switch(rate)
++        {
++        case 108: // Up to 54Mbps.
++                UpRate = 108;
++                break;
++
++        case 96: // Up to 54Mbps.
++                UpRate = 108;
++                break;
++
++        case 72: // Up to 48Mbps.
++                UpRate = 96;
++                break;
++
++        case 48: // Up to 36Mbps.
++                UpRate = 72;
++                break;
++
++        case 36: // Up to 24Mbps.
++                UpRate = 48;
++                break;
++
++        case 22: // Up to 18Mbps.
++                UpRate = 36;
++                break;
++
++        case 11: // Up to 11Mbps.
++                UpRate = 22;
++                break;
++
++        case 4: // Up to 5.5Mbps.
++                UpRate = 11;
++                break;
++
++        case 2: // Up to 2Mbps.
++                UpRate = 4;
++                break;
++
++        default:
++                printk("GetUpgradeTxRate(): Input Tx Rate(%d) is undefined!\n", rate);
++                return rate;
++        }
++        // Check if the rate is valid.
++        if(IncludedInSupportedRates(priv, UpRate))
++        {
++//              printk("GetUpgradeTxRate(): GetUpgrade Tx rate(%d) from %d !\n", UpRate, priv->CurrentOperaRate);
++                return UpRate;
++        }
++        else
++        {
++                printk("GetUpgradeTxRate(): Tx rate (%d) is not in supported rates\n", UpRate);
++                return rate;
++        }
++        return rate;
++}
++//
++//      Description:
++//              Get the Tx rate one degree down form the input rate in the supported rates.
++//              Return the degrade rate if it is successed, otherwise return the input rate.
++//      By Bruce, 2007-06-05.
++// 
++u8 GetDegradeTxRate( struct net_device *dev, u8 rate)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++        u8                      DownRate;
++
++        // Upgrade 1 degree.
++        switch(rate)
++        {
++        case 108: // Down to 48Mbps.
++                DownRate = 96;
++                break;
++
++        case 96: // Down to 36Mbps.
++                DownRate = 72;
++                break;
++
++        case 72: // Down to 24Mbps.
++                DownRate = 48;
++                break;
++
++        case 48: // Down to 18Mbps.
++                DownRate = 36;
++                break;
++
++        case 36: // Down to 11Mbps.
++                DownRate = 22;
++                break;
++
++        case 22: // Down to 5.5Mbps.
++                DownRate = 11;
++                break;
++
++        case 11: // Down to 2Mbps.
++                DownRate = 4;
++                break;
++
++        case 4: // Down to 1Mbps.
++                DownRate = 2;
++                break;
++
++        case 2: // Down to 1Mbps.
++                DownRate = 2;
++                break;
++
++        default:
++                printk("GetDegradeTxRate(): Input Tx Rate(%d) is undefined!\n", rate);
++                return rate;
++        }
++        // Check if the rate is valid.
++        if(IncludedInSupportedRates(priv, DownRate)){
++//              printk("GetDegradeTxRate(): GetDegrade Tx rate(%d) from %d!\n", DownRate, priv->CurrentOperaRate);
++                return DownRate;
++        }else{
++                printk("GetDegradeTxRate(): Tx rate (%d) is not in supported rates\n", DownRate);
++                return rate;
++        }
++        return rate;
++}
++
++//
++//      Helper function to determine if specified data rate is 
++//      CCK rate.
++//      2005.01.25, by rcnjko.
++//
++bool MgntIsCckRate(u16 rate )
++{
++        bool bReturn = false;
++
++        if((rate <= 22) && (rate != 12) && (rate != 18)){
++                bReturn = true;
++        }
++
++        return bReturn;
++}
++//by amy for rate adaptive
++//
++//      Description: 
++//              Core logic to adjust Tx data rate in STA mode according to 
++//              OFDM retry count ratio.
++//
++//      Note:
++//              RTL8187   : pHalData->CurrRetryCnt = TallyCnt
++//              RTL8187B : pHalData->CurrRetryCnt = PktRetryCnt in TxClosedCommand 
++//
++void sta_rateadaptive8187B(struct net_device *dev)
++{
++        struct r8180_priv *priv = ieee80211_priv(dev);
++        unsigned long   CurrTxokCnt;
++        u16             CurrRetryCnt;
++        u16             CurrRetryRate;
++        unsigned long   CurrRxokCnt;
++        bool            bTryUp = false;
++        bool            bTryDown = false;
++        u8              TryUpTh = 1;
++        u8              TryDownTh = 2;
++        u32             TxThroughput;
++        long            CurrSignalStrength;
++        bool            bUpdateInitialGain = false;
++        CurrRetryCnt	=  priv->CurrRetryCnt;
++        CurrTxokCnt     = (priv->stats.txbeaconokint + priv->stats.txmanageokint +
++                           priv->stats.txvookint + priv->stats.txviokint + priv->stats.txbeokint)- priv->LastTxokCnt;
++        CurrRxokCnt     =  priv->stats.rxok - priv->LastRxokCnt;
++        CurrSignalStrength = priv->RecvSignalPower;
++        TxThroughput 	   = (u32)(priv->txokbytestotal - priv->LastTxOKBytes);
++        priv->LastTxOKBytes = priv->txokbytestotal;
++        priv->CurrentOperaRate = priv->ieee80211->rate / 5;
++    	//printk("priv->CurrentOperaRate is %d\n",priv->CurrentOperaRate);
++    	
++#if 1 
++        //2 Compute retry ratio.
++        if (CurrTxokCnt>0)
++        {
++                CurrRetryRate = (u16)(CurrRetryCnt*100/CurrTxokCnt);
++        }
++        else
++        { // It may be serious retry. To distinguish serious retry or no packets modified by Bruce
++                CurrRetryRate = (u16)(CurrRetryCnt*100/1);
++        }
++#endif
++
++
++      	//printk("\n(1) priv->LastRetryRate: %d \n",priv->LastRetryRate);
++      	//printk("(2) CurrRetryCnt = %d  \n", CurrRetryCnt);      
++      	//printk("(3) TxokCnt = %d \n", CurrTxokCnt);
++      	//printk("(4) CurrRetryRate = %d \n", CurrRetryRate);     
++      	//printk("(5) SignalStrength = %d \n",priv->RecvSignalPower);
++
++        priv->LastRetryCnt = priv->CurrRetryCnt;
++        priv->LastTxokCnt  = (priv->stats.txbeaconokint + priv->stats.txmanageokint +
++                                        priv->stats.txvookint + priv->stats.txviokint + priv->stats.txbeokint);
++        priv->LastRxokCnt = priv->stats.rxok;
++        priv->CurrRetryCnt = 0;
++        //2No Tx packets, return to init_rate or not?
++        if (CurrRetryRate==0 && CurrTxokCnt == 0)
++        {
++                //
++                // 2007.04.09, by Roger. after 4.5 seconds in this condition, we try to raise rate.
++                //
++                priv->TryupingCountNoData++;
++
++             	//printk("No Tx packets, TryupingCountNoData(%d)\n", priv->TryupingCountNoData);
++              	//printk("(6) priv->CurrentOperaRate =%d\n", priv->CurrentOperaRate);
++
++                if (priv->TryupingCountNoData>15)
++                {
++                        priv->TryupingCountNoData = 0;
++                        priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
++                        // Reset Fail Record
++                        priv->LastFailTxRate = 0;
++                        priv->LastFailTxRateSS = -200;
++                        priv->FailTxRateCount = 0;
++                }
++                goto SetInitialGain;
++        }
++        else
++        {
++                priv->TryupingCountNoData=0; //Reset trying up times.
++        }
++
++        //
++        // For Netgear case, I comment out the following signal strength estimation,
++        // which can results in lower rate to transmit when sample is NOT enough (e.g. PING request).  
++        // 2007.04.09, by Roger.        
++        //      
++#if 1
++        // If sample is not enough, we use signalstrength.
++        if ( CurrTxokCnt<10|| CurrRetryCnt<10)
++        {
++                //printk("Sample is not enough, we use signalstrength for rate adaptive\n");
++                //After 3 sec, and trying up.
++                priv->TryupingCountNoData++;
++                if (priv->TryupingCountNoData>10)
++                {
++                        //printk("Sample is not enough and After 3 sec try up\n");
++                        priv->TryupingCountNoData=0;
++                        
++                        //
++                        // Added by Roger, 2007.01.04.
++                        // Signal strength plus 3 for air link.
++                        //
++                        
++                        if ( CurrSignalStrength>-68 )//&& IncludedInSupportedRates(Adapter, 108) )
++			{
++				priv->ieee80211->rate = 540;
++                                //pMgntInfo->CurrentOperaRate = 108;
++                        }
++			else if (CurrSignalStrength>-70)//  && IncludedInSupportedRates(Adapter, 96) )
++			{
++				priv->ieee80211->rate = 480;
++                                //pMgntInfo->CurrentOperaRate = 96;
++                        }
++			else if (CurrSignalStrength>-73)//  && IncludedInSupportedRates(Adapter, 72) )
++			{
++				priv->ieee80211->rate = 360;
++                                //pMgntInfo->CurrentOperaRate = 72;
++                        }
++			else if (CurrSignalStrength>-79)//  && IncludedInSupportedRates(Adapter, 48) )
++			{
++				priv->ieee80211->rate = 240;
++                                //pMgntInfo->CurrentOperaRate = 48;
++                        }
++			else if (CurrSignalStrength>-81)//  && IncludedInSupportedRates(Adapter, 36) )
++			{
++				priv->ieee80211->rate = 180;
++                                //pMgntInfo->CurrentOperaRate = 36;
++                        }
++			else if (CurrSignalStrength>-83)//  && IncludedInSupportedRates(Adapter, 22) )
++			{
++				priv->ieee80211->rate = 110;
++                                //pMgntInfo->CurrentOperaRate = 22;
++                        }
++			else if (CurrSignalStrength>-85)//  && IncludedInSupportedRates(Adapter, 11) )
++			{
++				priv->ieee80211->rate = 55;
++                                //pMgntInfo->CurrentOperaRate = 11;
++                        }
++			else if (CurrSignalStrength>-89)//  && IncludedInSupportedRates(Adapter, 4) )
++			{
++				priv->ieee80211->rate = 20;
++                                //pMgntInfo->CurrentOperaRate = 4;
++                        }
++                        
++                
++                }
++
++                //2004.12.23 skip record for 0
++                //pHalData->LastRetryRate = CurrRetryRate;
++                //printk("pMgntInfo->CurrentOperaRate =%d\n",priv->ieee80211->rate);
++                return;
++        }
++        else
++        {
++                priv->TryupingCountNoData=0;
++        }       
++#endif
++        //
++        // Restructure rate adaptive as the following main stages:
++        // (1) Add retry threshold in 54M upgrading condition with signal strength.
++        // (2) Add the mechanism to degrade to CCK rate according to signal strength 
++        //              and retry rate.
++        // (3) Remove all Initial Gain Updates over OFDM rate. To avoid the complicated 
++        //              situation, Initial Gain Update is upon on DIG mechanism except CCK rate.
++        // (4) Add the mehanism of trying to upgrade tx rate.
++        // (5) Record the information of upping tx rate to avoid trying upping tx rate constantly.
++        // By Bruce, 2007-06-05.
++        //      
++        //
++
++        // 11Mbps or 36Mbps
++        // Check more times in these rate(key rates).
++        //
++        if(priv->CurrentOperaRate == 22 || priv->CurrentOperaRate == 72)
++        {
++                TryUpTh += 9;
++        }
++        //
++        // Let these rates down more difficult.
++        //
++        if(MgntIsCckRate(priv->CurrentOperaRate) || priv->CurrentOperaRate == 36)
++        {
++                        TryDownTh += 1;
++        }
++
++        //1 Adjust Rate.
++        if (priv->bTryuping == true)
++        {
++                //2 For Test Upgrading mechanism
++                // Note:
++                //      Sometimes the throughput is upon on the capability bwtween the AP and NIC,
++                //      thus the low data rate does not improve the performance.
++                //      We randomly upgrade the data rate and check if the retry rate is improved.
++
++                // Upgrading rate did not improve the retry rate, fallback to the original rate.
++                if ( (CurrRetryRate > 25) && TxThroughput < priv->LastTxThroughput)
++                {
++                        //Not necessary raising rate, fall back rate.
++                        bTryDown = true;
++                    	//printk("Not necessary raising rate, fall back rate....\n");
++                    	//printk("(7) priv->CurrentOperaRate =%d, TxThroughput = %d, LastThroughput = %d\n",
++                         //             priv->CurrentOperaRate, TxThroughput, priv->LastTxThroughput);                  
++                }
++                else
++                {
++                        priv->bTryuping = false;
++                }
++        }
++        else if (CurrSignalStrength > -51 && (CurrRetryRate < 100))
++        {
++                //2For High Power
++                //
++                // Added by Roger, 2007.04.09.
++                // Return to highest data rate, if signal strength is good enough.
++                // SignalStrength threshold(-50dbm) is for RTL8186.
++                // Revise SignalStrength threshold to -51dbm.   
++                //
++                // Also need to check retry rate for safety, by Bruce, 2007-06-05.
++                if(priv->CurrentOperaRate != 108)
++                {
++                        bTryUp = true;
++                        // Upgrade Tx Rate directly.
++                        priv->TryupingCount += TryUpTh;
++                    	//printk("StaRateAdaptive87B: Power(%d) is high enough!!. \n", CurrSignalStrength);
++                }
++        }
++        // To avoid unstable rate jumping, comment out this condition, by Bruce, 2007-06-26.
++        /*
++        else if(CurrSignalStrength < -86 && CurrRetryRate >= 100)
++        {       
++                //2 For Low Power
++                //
++                // Low signal strength and high current tx rate may cause Tx rate to degrade too slowly.
++                // Update Tx rate to CCK rate directly.
++                // By Bruce, 2007-06-05.
++                //              
++                if(!MgntIsCckRate(pMgntInfo->CurrentOperaRate))
++                {
++                        if(CurrSignalStrength > -88 && IncludedInSupportedRates(Adapter, 22)) // 11M
++                                pMgntInfo->CurrentOperaRate = 22;
++                        else if(CurrSignalStrength > -90 && IncludedInSupportedRates(Adapter, 11)) // 5.5M
++                                pMgntInfo->CurrentOperaRate = 11;
++                        else if(CurrSignalStrength > -92 && IncludedInSupportedRates(Adapter, 4)) // 2M
++                                pMgntInfo->CurrentOperaRate = 4;
++                        else // 1M
++                                pMgntInfo->CurrentOperaRate = 2;
++                }
++                else if(CurrRetryRate >= 200)
++                {
++                        pMgntInfo->CurrentOperaRate = GetDegradeTxRate(Adapter, pMgntInfo->CurrentOperaRate);
++                }
++                RT_TRACE(COMP_RATE, DBG_LOUD, ("RA: Low Power(%d), or High Retry Rate(%d), set rate to CCK rate (%d). \n",
++                                        CurrSignalStrength, CurrRetryRate, pMgntInfo->CurrentOperaRate));
++                bUpdateInitialGain = TRUE;
++                // Reset Fail Record
++                pHalData->LastFailTxRate = 0;
++                pHalData->LastFailTxRateSS = -200;
++                pHalData->FailTxRateCount = 0;
++                goto SetInitialGain;
++        }
++        */
++        else if(CurrTxokCnt< 100 && CurrRetryRate >= 600)
++        {
++                //2 For Serious Retry
++                //
++                // Traffic is not busy but our Tx retry is serious. 
++                //
++                bTryDown = true;
++                // Let Rate Mechanism to degrade tx rate directly.
++                priv->TryDownCountLowData += TryDownTh;
++            	//printk("RA: Tx Retry is serious. Degrade Tx Rate to %d directly...\n", priv->CurrentOperaRate); 
++        }
++        else if ( priv->CurrentOperaRate == 108 )
++        {
++                //2For 54Mbps
++                // if ( (CurrRetryRate>38)&&(pHalData->LastRetryRate>35)) 
++                if ( (CurrRetryRate>33)&&(priv->LastRetryRate>32))
++                {
++                        //(30,25) for cable link threshold. (38,35) for air link.
++                        //Down to rate 48Mbps.
++                        bTryDown = true;
++                }
++        }
++        else if ( priv->CurrentOperaRate == 96 )
++        {
++                //2For 48Mbps
++                // if ( ((CurrRetryRate>73) && (pHalData->LastRetryRate>72)) && IncludedInSupportedRates(Adapter, 72) )
++                if ( ((CurrRetryRate>48) && (priv->LastRetryRate>47)))
++                {
++                        //(73, 72) for temp used.
++                        //(25, 23) for cable link, (60,59) for air link.
++                        //CurrRetryRate plus 25 and 26 respectively for air link.
++                        //Down to rate 36Mbps.
++                        bTryDown = true;
++                }
++                else if ( (CurrRetryRate<8) && (priv->LastRetryRate<8) ) //TO DO: need to consider (RSSI)
++                {
++                        bTryUp = true;
++                }
++        }
++        else if ( priv->CurrentOperaRate == 72 )
++        {
++                //2For 36Mbps
++                //if ( (CurrRetryRate>97) && (pHalData->LastRetryRate>97)) 
++                if ( (CurrRetryRate>55) && (priv->LastRetryRate>54))
++                {
++                        //(30,25) for cable link threshold respectively. (103,10) for air link respectively.
++                        //CurrRetryRate plus 65 and 69 respectively for air link threshold.
++                        //Down to rate 24Mbps.
++                        bTryDown = true;
++                }
++                // else if ( (CurrRetryRate<20) &&  (pHalData->LastRetryRate<20) && IncludedInSupportedRates(Adapter, 96) )//&& (device->LastRetryRate<15) ) //TO DO: need to consider (RSSI)
++                else if ( (CurrRetryRate<15) &&  (priv->LastRetryRate<16))//&& (device->LastRetryRate<15) ) //TO DO: need to consider (RSSI)
++                {
++                        bTryUp = true;
++                }
++        }
++        else if ( priv->CurrentOperaRate == 48 )
++        {
++                //2For 24Mbps
++                // if ( ((CurrRetryRate>119) && (pHalData->LastRetryRate>119) && IncludedInSupportedRates(Adapter, 36)))
++                if ( ((CurrRetryRate>63) && (priv->LastRetryRate>62)))
++                {
++                        //(15,15) for cable link threshold respectively. (119, 119) for air link threshold.
++                        //Plus 84 for air link threshold.
++                        //Down to rate 18Mbps.
++                        bTryDown = true;
++                }
++                // else if ( (CurrRetryRate<14) && (pHalData->LastRetryRate<15) && IncludedInSupportedRates(Adapter, 72)) //TO DO: need to consider (RSSI)
++                else if ( (CurrRetryRate<20) && (priv->LastRetryRate<21)) //TO DO: need to consider (RSSI)
++                {
++                        bTryUp = true;
++                }
++        }
++        else if ( priv->CurrentOperaRate == 36 )
++        {
++                //2For 18Mbps
++                if ( ((CurrRetryRate>109) && (priv->LastRetryRate>109)))
++                {
++                        //(99,99) for cable link, (109,109) for air link.
++                        //Down to rate 11Mbps.
++                        bTryDown = true;
++                }
++                // else if ( (CurrRetryRate<15) && (pHalData->LastRetryRate<16) && IncludedInSupportedRates(Adapter, 48)) //TO DO: need to consider (RSSI)      
++                else if ( (CurrRetryRate<25) && (priv->LastRetryRate<26)) //TO DO: need to consider (RSSI)
++                {
++                        bTryUp = true;
++                }
++        }
++        else if ( priv->CurrentOperaRate == 22 )
++        {
++                //2For 11Mbps
++                // if (CurrRetryRate>299 && IncludedInSupportedRates(Adapter, 11))
++                if (CurrRetryRate>95)
++                {
++                        bTryDown = true;
++                }
++                else if (CurrRetryRate<55)//&& (device->LastRetryRate<55) ) //TO DO: need to consider (RSSI)
++                        {
++                        bTryUp = true;
++                        }
++                }
++        else if ( priv->CurrentOperaRate == 11 )
++        {
++                //2For 5.5Mbps
++                // if (CurrRetryRate>159 && IncludedInSupportedRates(Adapter, 4) ) 
++                if (CurrRetryRate>149)
++                {
++                        bTryDown = true;
++                }
++                // else if ( (CurrRetryRate<30) && (pHalData->LastRetryRate<30) && IncludedInSupportedRates(Adapter, 22) )
++                else if ( (CurrRetryRate<60) && (priv->LastRetryRate < 65))
++                        {
++                        bTryUp = true;
++                        }
++                }
++        else if ( priv->CurrentOperaRate == 4 )
++        {
++                //2For 2 Mbps
++                if((CurrRetryRate>99) && (priv->LastRetryRate>99))
++                {
++                        bTryDown = true;
++        }
++                // else if ( (CurrRetryRate<50) && (pHalData->LastRetryRate<65) && IncludedInSupportedRates(Adapter, 11) )
++                else if ( (CurrRetryRate < 65) && (priv->LastRetryRate < 70))
++        {
++                        bTryUp = true;
++                }
++        }
++        else if ( priv->CurrentOperaRate == 2 )
++                {
++                //2For 1 Mbps
++                // if ( (CurrRetryRate<50) && (pHalData->LastRetryRate<65) && IncludedInSupportedRates(Adapter, 4))
++                if ( (CurrRetryRate<70) && (priv->LastRetryRate<75))
++                        {
++                        bTryUp = true;
++                }
++        }
++        if(bTryUp && bTryDown)
++                printk("StaRateAdaptive87B(): Tx Rate tried upping and downing simultaneously!\n");
++
++        //1 Test Upgrading Tx Rate
++        // Sometimes the cause of the low throughput (high retry rate) is the compatibility between the AP and NIC.
++        // To test if the upper rate may cause lower retry rate, this mechanism randomly occurs to test upgrading tx rate.
++        if(!bTryUp && !bTryDown && (priv->TryupingCount == 0) && (priv->TryDownCountLowData == 0)
++                && priv->CurrentOperaRate != 108 && priv->FailTxRateCount < 2)
++        {
++#if 1 
++                if(jiffies% (CurrRetryRate + 101) == 0)
++                {
++                        bTryUp = true;
++                        priv->bTryuping = true;
++                        printk("======================================================>StaRateAdaptive87B(): Randomly try upgrading...\n");
++                }
++#endif
++        }
++        //1 Rate Mechanism
++        if(bTryUp)
++        {
++                priv->TryupingCount++;
++                priv->TryDownCountLowData = 0;
++
++                //
++                // Check more times if we need to upgrade indeed.
++                // Because the largest value of pHalData->TryupingCount is 0xFFFF and 
++                // the largest value of pHalData->FailTxRateCount is 0x14,
++                // this condition will be satisfied at most every 2 min.
++                //
++                if((priv->TryupingCount > (TryUpTh + priv->FailTxRateCount * priv->FailTxRateCount)) ||
++                        (CurrSignalStrength > priv->LastFailTxRateSS) || priv->bTryuping)
++                {
++                        priv->TryupingCount = 0;
++                        // 
++                        // When transfering from CCK to OFDM, DIG is an important issue.
++                        //
++                        if(priv->CurrentOperaRate == 22)
++                                bUpdateInitialGain = true;
++                        // (1)To avoid upgrade frequently to the fail tx rate, add the FailTxRateCount into the threshold.
++                        // (2)If the signal strength is increased, it may be able to upgrade.
++                        priv->CurrentOperaRate = GetUpgradeTxRate(dev, priv->CurrentOperaRate);
++                    	//printk("StaRateAdaptive87B(): Upgrade Tx Rate to %d\n", priv->CurrentOperaRate);
++
++                        // Update Fail Tx rate and count.
++                        if(priv->LastFailTxRate != priv->CurrentOperaRate)
++                        {
++                                priv->LastFailTxRate = priv->CurrentOperaRate;
++                                priv->FailTxRateCount = 0;
++                                priv->LastFailTxRateSS = -200; // Set lowest power.
++                        }
++                }
++        }
++        else
++        {
++                if(priv->TryupingCount > 0)
++                        priv->TryupingCount --;
++        }
++
++        if(bTryDown)
++        {
++                priv->TryDownCountLowData++;
++                priv->TryupingCount = 0;
++
++
++                //Check if Tx rate can be degraded or Test trying upgrading should fallback.
++                if(priv->TryDownCountLowData > TryDownTh || priv->bTryuping)
++                {
++                        priv->TryDownCountLowData = 0;
++                        priv->bTryuping = false;
++                        // Update fail information.
++                        if(priv->LastFailTxRate == priv->CurrentOperaRate)
++                        {
++                                priv->FailTxRateCount ++;
++                                // Record the Tx fail rate signal strength.
++                                if(CurrSignalStrength > priv->LastFailTxRateSS)
++                                {
++                                        priv->LastFailTxRateSS = CurrSignalStrength;
++                                }
++                        }
++                        else
++                        {
++                                priv->LastFailTxRate = priv->CurrentOperaRate;
++                                priv->FailTxRateCount = 1;
++                                priv->LastFailTxRateSS = CurrSignalStrength;
++                        }
++                        priv->CurrentOperaRate = GetDegradeTxRate(dev, priv->CurrentOperaRate);
++                        //
++                        // When it is CCK rate, it may need to update initial gain to receive lower power packets.
++                        //
++                        if(MgntIsCckRate(priv->CurrentOperaRate))
++                        {
++                                bUpdateInitialGain = true;
++                        }
++                     	//printk("StaRateAdaptive87B(): Degrade Tx Rate to %d\n", priv->CurrentOperaRate);
++                }
++        }
++        else
++        {
++                if(priv->TryDownCountLowData > 0)
++                        priv->TryDownCountLowData --;
++        }
++        // Keep the Tx fail rate count to equal to 0x15 at most.
++        // Reduce the fail count at least to 10 sec if tx rate is tending stable.
++        if(priv->FailTxRateCount >= 0x15 ||
++                (!bTryUp && !bTryDown && priv->TryDownCountLowData == 0 && priv->TryupingCount && priv->FailTxRateCount > 0x6))
++        {
++                priv->FailTxRateCount --;
++        }
++
++        //
++        // We need update initial gain when we set tx rate "from OFDM to CCK" or
++        // "from CCK to OFDM". 
++        //
++SetInitialGain:
++#if 1    //to be done
++        if(bUpdateInitialGain)
++        {
++                if(MgntIsCckRate(priv->CurrentOperaRate)) // CCK
++                {
++                        if(priv->InitialGain > priv->RegBModeGainStage)
++                        {
++                                if(CurrSignalStrength < -85) // Low power, OFDM [0x17] = 26.
++                                {
++                                        priv->InitialGain = priv->RegBModeGainStage;
++                                }
++                                else if(priv->InitialGain > priv->RegBModeGainStage + 1)
++                                {
++                                        priv->InitialGain -= 2;
++                                }
++                                else
++                                {
++                                        priv->InitialGain --;
++                                }
++                                UpdateInitialGain(dev);
++                        }
++                }
++                else // OFDM
++                {                       
++                        if(priv->InitialGain < 4)
++                        {
++                                priv->InitialGain ++;
++                                UpdateInitialGain(dev);
++                        }                                       
++                }
++        }
++#endif
++        //Record the related info
++        priv->LastRetryRate = CurrRetryRate;
++        priv->LastTxThroughput = TxThroughput;
++        priv->ieee80211->rate = priv->CurrentOperaRate * 5;
++}
++
++#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
++void rtl8180_rate_adapter(struct work_struct * work)
++{
++    struct delayed_work *dwork = container_of(work,struct delayed_work,work);
++        struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,rate_adapter_wq);
++        struct net_device *dev = ieee->dev;
++#else
++void rtl8180_rate_adapter(struct net_device *dev)
++{
++
++#endif
++        sta_rateadaptive8187B(dev);
++}
++
++void timer_rate_adaptive(unsigned long data)
++{
++    struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
++   	 //DMESG("---->timer_rate_adaptive()\n");
++        if(!priv->up)
++        {
++                //DMESG("<----timer_rate_adaptive():driver is not up!\n");
++                return;
++        }
++        if(     (priv->ieee80211->mode != IEEE_B) &&
++                (priv->ieee80211->iw_mode != IW_MODE_MASTER)
++                && ((priv->ieee80211->state == IEEE80211_LINKED)||(priv->ieee80211->state == IEEE80211_MESH_LINKED)))
++        {
++        //DMESG("timer_rate_adaptive():schedule rate_adapter_wq\n");
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++        queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->rate_adapter_wq, 0);
++#else	
++        queue_work(priv->ieee80211->wq,&priv->ieee80211->rate_adapter_wq);
++#endif
++        }
++
++        mod_timer(&priv->rateadapter_timer, jiffies + MSECS(DEFAULT_RATE_ADAPTIVE_TIMER_PERIOD));
++	//DMESG("<----timer_rate_adaptive()\n");
++}
++//by amy for rate adaptive
++
++
++void rtl8180_irq_rx_tasklet_new(struct r8180_priv *priv);
++void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
++
++//YJ,add,080828,for KeepAlive
++#if 0
++static void MgntLinkKeepAlive(struct r8180_priv *priv )
++{
++	if (priv->keepAliveLevel == 0)
++		return;
++
++	if(priv->ieee80211->state == IEEE80211_LINKED)
++	{
++		//
++		// Keep-Alive.  
++		//
++		//printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
++		
++		if ( (priv->keepAliveLevel== 2) ||
++			(priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast && 
++			priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
++			)
++		{
++			priv->link_detect.IdleCount++;	
++
++			//
++			// Send a Keep-Alive packet packet to AP if we had been idle for a while.
++			//
++			if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
++			{
++				priv->link_detect.IdleCount = 0;
++				ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
++			}
++		}
++		else
++		{
++			priv->link_detect.IdleCount = 0;
++		}
++		priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast; 
++		priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
++	}
++}
++//YJ,add,080828,for KeepAlive,end
++#endif
++void InactivePowerSave(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++
++	//
++	// This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
++	// is really scheduled.
++	// The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
++	// previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
++	// blocks the IPS procedure of switching RF.
++	// By Bruce, 2007-12-25.
++	//
++	priv->bSwRfProcessing = true;
++	MgntActSet_RF_State(dev, priv->eInactivePowerState, RF_CHANGE_BY_IPS);
++
++	//
++	// To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
++	//
++#if 0
++	while( index < 4 )
++	{
++		if( ( pMgntInfo->SecurityInfo.PairwiseEncAlgorithm == WEP104_Encryption ) ||
++			(pMgntInfo->SecurityInfo.PairwiseEncAlgorithm == WEP40_Encryption) )
++		{
++			if( pMgntInfo->SecurityInfo.KeyLen[index] != 0)
++			pAdapter->HalFunc.SetKeyHandler(pAdapter, index, 0, FALSE, pMgntInfo->SecurityInfo.PairwiseEncAlgorithm, TRUE, FALSE);
++
++		}
++		index++;
++	}
++#endif
++	priv->bSwRfProcessing = false;	
++}
++
++//
++//	Description:
++//		Enter the inactive power save mode. RF will be off
++//	2007.08.17, by shien chang.
++//
++void IPSEnter(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	RT_RF_POWER_STATE rtState;
++
++	if (priv->bInactivePs)
++	{
++		rtState = priv->eRFPowerState;
++
++		//
++		// Added by Bruce, 2007-12-25.
++		// Do not enter IPS in the following conditions:
++		// (1) RF is already OFF or Sleep
++		// (2) bSwRfProcessing (indicates the IPS is still under going)
++		// (3) Connectted (only disconnected can trigger IPS)
++		// (4) IBSS (send Beacon)
++		// (5) AP mode (send Beacon)
++		//
++		if (rtState == eRfOn && !priv->bSwRfProcessing && (priv->ieee80211->iw_mode != IW_MODE_ADHOC) 
++			&& (priv->ieee80211->state != IEEE80211_LINKED ))
++		{
++#ifdef CONFIG_RADIO_DEBUG
++			DMESG("IPSEnter(): Turn off RF.");
++#endif
++			priv->eInactivePowerState = eRfOff;
++			InactivePowerSave(dev);
++			//SetRFPowerState(dev, priv->eInactivePowerState);
++			//MgntActSet_RF_State(dev, priv->eInactivePowerState, RF_CHANGE_BY_IPS);
++		}
++	}
++	//printk("priv->eRFPowerState is %d\n",priv->eRFPowerState);	
++}
++
++void IPSLeave(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	RT_RF_POWER_STATE rtState;
++	if (priv->bInactivePs)
++	{	
++		rtState = priv->eRFPowerState;	
++		if (rtState == eRfOff  && (!priv->bSwRfProcessing) && priv->RfOffReason <= RF_CHANGE_BY_IPS)
++		{
++#ifdef CONFIG_RADIO_DEBUG
++			DMESG("ISLeave(): Turn on RF.");
++#endif
++			priv->eInactivePowerState = eRfOn;
++			InactivePowerSave(dev);
++		}
++	}
++//	printk("priv->eRFPowerState is %d\n",priv->eRFPowerState);
++}
++//by amy for power save
++
++//YJ,add,081230
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void IPSLeave_wq (struct work_struct *work)
++{
++        struct ieee80211_device *ieee = container_of(work,struct ieee80211_device,ips_leave_wq);
++        struct net_device *dev = ieee->dev;
++#else
++void IPSLeave_wq(struct net_device *dev)
++{
++#endif
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	down(&priv->ieee80211->ips_sem);
++	IPSLeave(dev);	
++	up(&priv->ieee80211->ips_sem);	
++}
++
++void ieee80211_ips_leave(struct net_device *dev)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	if(priv->bInactivePs){
++		if(priv->eRFPowerState == eRfOff)
++		{
++			//DMESG("%s", __FUNCTION__);
++		        queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
++		}
++	}
++}
++//YJ,add,081230,end
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void rtl8180_watch_dog_wq (struct work_struct *work)
++{
++        struct delayed_work *dwork = container_of(work,struct delayed_work,work);
++        struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,watch_dog_wq);
++        struct net_device *dev = ieee->dev;
++#else
++void rtl8180_watch_dog_wq(struct net_device *dev)
++{
++#endif
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//bool bEnterPS = false;
++	//bool bBusyTraffic = false;
++	u32 TotalRxNum = 0;
++	u16 SlotIndex = 0, i=0;
++	//YJ,add,080828,for link state check
++	if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
++		SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
++		priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
++		for( i=0; i<priv->link_detect.SlotNum; i++ )	
++			TotalRxNum+= priv->link_detect.RxFrameNum[i];
++#if 0	//for roaming temp del		
++		if(TotalRxNum == 0){
++			priv->ieee80211->state = IEEE80211_ASSOCIATING;
++			printk("=========>turn to another AP\n");
++			queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
++		}
++#endif
++	}
++	priv->link_detect.NumRxOkInPeriod = 0;
++	priv->link_detect.NumTxOkInPeriod = 0;	
++	priv->ieee80211->NumRxDataInPeriod = 0;
++	priv->ieee80211->NumRxBcnInPeriod = 0;
++	
++#ifdef CONFIG_IPS 
++	if(priv->ieee80211->actscanning == false){
++		if((priv->ieee80211->iw_mode == IW_MODE_INFRA) && 
++		   (priv->ieee80211->state == IEEE80211_NOLINK) && 
++		   (priv->eRFPowerState == eRfOn)) 
++		{
++			//printk("actscanning:%d, state:%d, eRFPowerState:%d\n",
++			//	priv->ieee80211->actscanning, 
++			//	priv->ieee80211->state, 
++			//	priv->eRFPowerState);
++
++			down(&priv->ieee80211->ips_sem);
++			IPSEnter(dev);	
++			up(&priv->ieee80211->ips_sem);
++		}
++	}
++	//queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq,IEEE80211_WATCH_DOG_TIME);
++#endif
++
++	//printk("========================>leave rtl8180_watch_dog_wq()\n");
++}
++
++void watch_dog_adaptive(unsigned long data)
++{
++	struct net_device* dev = (struct net_device*)data;
++    struct r8180_priv* priv = ieee80211_priv(dev);
++	//DMESG("---->watch_dog_adaptive()\n");
++	if(!priv->up){
++		//DMESG("<----watch_dog_adaptive():driver is not up!\n");
++		return;
++	}
++	// Tx and Rx High Power Mechanism.
++	if(CheckHighPower(dev)){
++		//printk("===============================> high power!\n");
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++		queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->tx_pw_wq, 0);
++#else
++		queue_work(priv->ieee80211->wq,&priv->ieee80211->tx_pw_wq);
++#endif
++	}
++
++	// Schedule an workitem to perform DIG
++	if(CheckDig(dev) == true){
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++		queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_dig_wq,0);
++#else
++		queue_work(priv->ieee80211->wq,&priv->ieee80211->hw_dig_wq);
++#endif
++	}
++	
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++        queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq,0);
++#else
++        queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
++#endif
++
++ 	mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
++        //DMESG("<----watch_dog_adaptive()\n");
++}
++
++#ifdef ENABLE_DOT11D
++
++CHANNEL_LIST Current_tbl;
++
++static CHANNEL_LIST ChannelPlan[] = {
++	{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},  		//FCC
++	{{1,2,3,4,5,6,7,8,9,10,11},11},                    				//IC
++	{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},  	//ETSI
++	{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},    //Spain. Change to ETSI. 
++	{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},  	//France. Change to ETSI.
++	{{14,36,40,44,48,52,56,60,64},9},						//MKK
++	{{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
++	{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},	//Israel.
++	{{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},			// For 11a , TELEC
++	{{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
++	{{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 081205
++};
++
++static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
++{
++	int i;
++
++	//lzm add 081205
++	ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
++	ieee->IbssStartChnl=0;
++	
++	switch (channel_plan)
++	{
++		case COUNTRY_CODE_FCC:
++		case COUNTRY_CODE_IC:
++		case COUNTRY_CODE_ETSI:
++		case COUNTRY_CODE_SPAIN:
++		case COUNTRY_CODE_FRANCE:
++		case COUNTRY_CODE_MKK:
++		case COUNTRY_CODE_MKK1:
++		case COUNTRY_CODE_ISRAEL:
++		case COUNTRY_CODE_TELEC:
++		{
++			Dot11d_Init(ieee);
++			ieee->bGlobalDomain = false;
++			ieee->bWorldWide13 = false;
++			if (ChannelPlan[channel_plan].Len != 0){
++				// Clear old channel map
++				memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
++				// Set new channel map
++				for (i=0;i<ChannelPlan[channel_plan].Len;i++) 
++				{
++					if(ChannelPlan[channel_plan].Channel[i] <= 14)
++						GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
++				}
++			}
++			break;
++		}
++		case COUNTRY_CODE_GLOBAL_DOMAIN:
++		{
++			GET_DOT11D_INFO(ieee)->bEnabled = 0;
++			Dot11d_Reset(ieee);
++			ieee->bGlobalDomain = true;	
++			ieee->bWorldWide13 = false;
++			
++			//lzm add 081205
++			ieee->MinPassiveChnlNum=12;
++			ieee->IbssStartChnl= 10;
++			
++			break;
++		}
++		case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 081205
++		{
++			Dot11d_Init(ieee);
++			ieee->bGlobalDomain = false;
++			ieee->bWorldWide13 = true;
++			
++			//lzm add 081205
++			ieee->MinPassiveChnlNum=12;
++			ieee->IbssStartChnl= 10;
++			
++			if (ChannelPlan[channel_plan].Len != 0){
++				// Clear old channel map
++				memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
++				// Set new channel map
++				for (i=0;i<ChannelPlan[channel_plan].Len;i++) 
++				{
++					if(ChannelPlan[channel_plan].Channel[i] <= 11)//ch1~ch11 active scan
++						GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
++					else//ch12~13 passive scan
++						GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 2;
++				}
++			}
++			
++		break;
++		}
++		default:
++		{
++			Dot11d_Init(ieee);
++			ieee->bGlobalDomain = false;
++			ieee->bWorldWide13 = false;
++			memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
++			for (i=1;i<=14;i++) 
++			{
++				GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
++			}
++			break;
++		}
++	}
++}
++#endif
++
++
++//Add for RF power on power off by lizhaoming 080512
++#ifdef POLLING_METHOD_FOR_RADIO
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
++#else
++void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee);
++#endif
++void gpio_change_polling(unsigned long data);
++#endif
++
++
++static void rtl8180_link_detect_init(plink_detect_t plink_detect)
++{
++	memset(plink_detect, 0, sizeof(link_detect_t));
++	plink_detect->SlotNum = DEFAULT_SLOT_NUM;
++}
++
++#ifdef SW_ANTE_DIVERSITY
++static void rtl8187_antenna_diversity_read(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	u16 usValue;
++	
++	//2 Read CustomerID
++	usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET>>1);
++	priv->EEPROMCustomerID = (u8)( usValue & EEPROM_CID_MASK );
++	//DMESG("EEPROM Customer ID: %02X\n", priv->EEPROMCustomerID);
++
++	//2 Read AntennaDiversity
++	// SW Antenna Diversity.
++	if(	(usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE ){
++		priv->EEPROMSwAntennaDiversity = false;
++		DMESG("EEPROM Disable SW Antenna Diversity");
++	}else{
++		priv->EEPROMSwAntennaDiversity = true;
++		DMESG("EEPROM Enable SW Antenna Diversity");
++	}
++	// Default Antenna to use.
++	if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 ) {
++		priv->EEPROMDefaultAntenna1 = false;
++		DMESG("EEPROM Default Main Antenna 0");
++	}else{
++		priv->EEPROMDefaultAntenna1 = false;
++		DMESG( "EEPROM Default Aux Antenna 1");
++	}
++
++	//
++	// Antenna diversity mechanism. Added by Roger, 2007.11.05.
++	//
++	if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto //set it to 0 when init
++	{// 0: default from EEPROM.
++		priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
++	}else{// 1:disable antenna diversity, 2: enable antenna diversity.
++		priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
++	}
++	//DMESG("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
++
++
++	//
++	// Default antenna settings. Added by Roger, 2007.11.05.
++	//
++	if( priv->RegDefaultAntenna == 0)//set it to 0 when init
++	{	// 0: default from EEPROM.
++		priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
++	}else{// 1: main, 2: aux.
++		priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
++	}
++	//DMESG("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);	
++
++//by amy for antenna
++}
++#endif
++
++short rtl8180_init(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int i, j;
++	u16 word;
++	//int ch;
++	//u16 version;
++	u8 hw_version;
++	//u8 config3;
++	struct usb_device *udev;
++	u16 idProduct;
++	u16 bcdDevice;
++	//u8 chan_plan_index;
++	
++	
++	//FIXME: these constants are placed in a bad pleace.
++
++	//priv->txbuffsize = 1024;
++	//priv->txringcount = 32;
++	//priv->rxbuffersize = 1024;
++	//priv->rxringcount = 32; 
++	//priv->txbeaconcount = 3;
++	//priv->rx_skb_complete = 1;
++	//priv->txnp_pending.ispending=0; 
++	/* ^^ the SKB does not containt a partial RXed packet (is empty) */
++
++	//memcpy(priv->stats,0,sizeof(struct Stats));
++	
++	//priv->irq_enabled=0;
++        priv->driver_upping = 0;
++	priv->commit = 0;
++	
++	//priv->stats.rxdmafail=0;
++	priv->stats.txrdu=0;
++	//priv->stats.rxrdu=0;
++	//priv->stats.rxnolast=0;
++	//priv->stats.rxnodata=0;
++	//priv->stats.rxreset=0;
++	//priv->stats.rxwrkaround=0;
++	//priv->stats.rxnopointer=0;
++	priv->stats.txbeerr=0;
++	priv->stats.txbkerr=0;
++	priv->stats.txvierr=0;
++	priv->stats.txvoerr=0;
++	priv->stats.txmanageerr=0;
++	priv->stats.txbeaconerr=0;
++	priv->stats.txresumed=0;
++	//priv->stats.rxerr=0;
++	//priv->stats.rxoverflow=0;
++	//priv->stats.rxint=0;
++	priv->stats.txbeokint=0;
++	priv->stats.txbkokint=0;
++	priv->stats.txviokint=0;
++	priv->stats.txvookint=0;
++	priv->stats.txmanageokint=0;
++	priv->stats.txbeaconokint=0;
++	/*priv->stats.txhpokint=0;
++	priv->stats.txhperr=0;*/
++	priv->stats.rxurberr=0;
++	priv->stats.rxstaterr=0;
++	priv->stats.txoverflow=0;
++	priv->stats.rxok=0;
++	//priv->stats.txbeaconerr=0;
++	//priv->stats.txlperr=0;
++	//priv->stats.txlpokint=0;
++//john
++	priv->stats.txnpdrop=0;
++	priv->stats.txlpdrop =0;
++	priv->stats.txbedrop =0;
++	priv->stats.txbkdrop =0;
++	priv->stats.txvidrop =0;
++	priv->stats.txvodrop =0;
++	priv->stats.txbeacondrop =0;
++	priv->stats.txmanagedrop =0;
++	
++    	// priv->stats.txokbytestotal =0;
++//by amy
++        priv->LastSignalStrengthInPercent=0;
++        priv->SignalStrength=0;
++        priv->SignalQuality=0;
++        priv->antenna_flag=0;
++        priv->flag_beacon = false;
++//by amy
++//david
++	//radion on defaultly 
++	priv->radion = 1;
++//david
++//by amy for rate adaptive
++	priv->CurrRetryCnt=0;
++	priv->LastRetryCnt=0;
++        priv->LastTxokCnt=0;
++        priv->LastRxokCnt=0;
++        priv->LastRetryRate=0;
++        priv->bTryuping=0;
++        priv->CurrTxRate=0;
++        priv->CurrRetryRate=0;
++        priv->TryupingCount=0;
++        priv->TryupingCountNoData=0;
++        priv->TryDownCountLowData=0;
++        priv->RecvSignalPower=0;
++        priv->LastTxOKBytes=0;
++        priv->LastFailTxRate=0;
++        priv->LastFailTxRateSS=0;
++        priv->FailTxRateCount=0;
++        priv->LastTxThroughput=0;
++        priv->txokbytestotal=0;
++//by amy for rate adaptive
++//by amy for ps
++	priv->RFChangeInProgress = false;
++	priv->SetRFPowerStateInProgress = false;
++	priv->RFProgType = 0;
++	priv->bInHctTest = false;
++	priv->bInactivePs = true;//false;
++	priv->ieee80211->bInactivePs = priv->bInactivePs;
++	priv->eInactivePowerState = eRfOn;//lzm add for IPS and Polling methord
++	priv->bSwRfProcessing = false;
++	priv->eRFPowerState = eRfOff;
++	priv->RfOffReason = 0;
++	priv->NumRxOkInPeriod = 0;
++	priv->NumTxOkInPeriod = 0;
++	priv->bLeisurePs = true;
++	priv->dot11PowerSaveMode = eActive;
++	priv->RegThreeWireMode=HW_THREE_WIRE_BY_8051;
++	priv->ps_mode = false;
++//by amy for ps
++//by amy for DIG
++	priv->bDigMechanism = 1;
++	priv->bCCKThMechanism = 0;
++	priv->InitialGain = 0;
++	priv->StageCCKTh = 0;
++	priv->RegBModeGainStage = 2;
++//by amy for DIG
++// {by david for DIG, 2008.3.6
++	priv->RegDigOfdmFaUpTh = 0x0c;
++	priv->RegBModeGainStage = 0x02;
++	priv->DIG_NumberFallbackVote = 0;
++	priv->DIG_NumberUpgradeVote = 0;
++	priv->CCKUpperTh = 0x100;
++	priv->CCKLowerTh = 0x20;
++//}
++//{added by david for High tx power, 2008.3.11
++	priv->bRegHighPowerMechanism = true;
++	priv->bToUpdateTxPwr = false;
++
++	priv->Z2HiPwrUpperTh = 77;
++	priv->Z2HiPwrLowerTh = 75;
++	priv->Z2RSSIHiPwrUpperTh = 70;
++	priv->Z2RSSIHiPwrLowerTh = 20;
++	//specify for rtl8187B
++	priv->wMacRegRfPinsOutput = 0x0480;
++	priv->wMacRegRfPinsSelect = 0x2488;
++	//
++	// Note that, we just set TrSwState to TR_HW_CONTROLLED here instead of changing 
++	// HW setting because we assume it should be inialized as HW controlled. 061010, by rcnjko.
++	//
++	priv->TrSwitchState = TR_HW_CONTROLLED;
++//}
++	priv->ieee80211->iw_mode = IW_MODE_INFRA;
++//test pending bug, john 20070815
++	for(i=0;i<0x10;i++)  atomic_set(&(priv->tx_pending[i]), 0);
++//by lizhaoming
++#ifdef POLLING_METHOD_FOR_RADIO
++	priv->wlan_first_up_flag1 = 0;
++	priv->polling_timer_on = 0;//add for S3/S4
++#endif	
++//by lizhaoming for LED
++#ifdef LED
++	priv->ieee80211->ieee80211_led_contorl = LedControl8187;
++#endif
++#ifdef CONFIG_IPS
++	priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;//IPSLeave;
++#endif
++
++#ifdef SW_ANTE_DIVERSITY
++	priv->antb=0;
++	priv->diversity=1;
++        priv->LastRxPktAntenna = 0;
++	priv->AdMinCheckPeriod = 5;
++	priv->AdMaxCheckPeriod = 10;
++	// Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
++	priv->AdMaxRxSsThreshold = 30;//60->30
++	priv->AdRxSsThreshold = 20;//50->20
++	priv->AdCheckPeriod = priv->AdMinCheckPeriod;
++	priv->AdTickCount = 0;
++	priv->AdRxSignalStrength = -1;
++	priv->RegSwAntennaDiversityMechanism = 0;
++	priv->RegDefaultAntenna = 0;
++	priv->SignalStrength = 0;
++	priv->AdRxOkCnt = 0;
++	priv->CurrAntennaIndex = 0;
++	priv->AdRxSsBeforeSwitched = 0;
++	init_timer(&priv->SwAntennaDiversityTimer);
++	priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
++	priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
++#endif
++
++	priv->retry_rts = DEFAULT_RETRY_RTS;
++	priv->retry_data = DEFAULT_RETRY_DATA;
++	priv->ieee80211->rate = 110; //11 mbps
++	priv->CurrentOperaRate=priv->ieee80211->rate/5;
++	priv->ieee80211->short_slot = 1;
++	priv->ieee80211->mode = IEEE_G;
++	priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
++
++	rtl8180_link_detect_init(&priv->link_detect);
++	
++	spin_lock_init(&priv->tx_lock);
++	spin_lock_init(&priv->irq_lock);//added by thomas
++	spin_lock_init(&priv->rf_ps_lock);
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++	INIT_WORK(&priv->reset_wq, (void*)rtl8180_restart);
++	INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq);  //YJ,add,081230,for IPS
++	INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);
++	INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);
++	INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*)rtl8180_watch_dog_wq);
++	INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);
++
++//add for RF power on power off by lizhaoming 080512
++#ifdef POLLING_METHOD_FOR_RADIO
++	INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem, (void*)GPIOChangeRFWorkItemCallBack);
++#endif
++
++#ifdef SW_ANTE_DIVERSITY
++	INIT_DELAYED_WORK(&priv->ieee80211->SwAntennaWorkItem,(void*) SwAntennaWorkItemCallback);
++#endif
++
++#else
++	INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart,dev);
++	INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq,dev);  //YJ,add,081230,for IPS
++	INIT_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter,dev);	
++	INIT_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq,dev);
++	INIT_WORK(&priv->ieee80211->watch_dog_wq,(void*)rtl8180_watch_dog_wq,dev);
++	INIT_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq,dev);
++
++//add for RF power on power off by lizhaoming 080512
++#ifdef POLLING_METHOD_FOR_RADIO
++	INIT_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack, priv->ieee80211);
++#endif
++
++#ifdef SW_ANTE_DIVERSITY
++	INIT_WORK(&priv->ieee80211->SwAntennaWorkItem,(void*) SwAntennaWorkItemCallback, dev);
++#endif
++
++#endif
++#else
++	tq_init(&priv->reset_wq,(void*) rtl8180_restart,dev);
++#endif
++	sema_init(&priv->wx_sem,1);
++	sema_init(&priv->set_chan_sem,1);
++#ifdef THOMAS_TASKLET
++	tasklet_init(&priv->irq_rx_tasklet,
++		     (void(*)(unsigned long))rtl8180_irq_rx_tasklet_new,
++		     (unsigned long)priv);
++#else
++	tasklet_init(&priv->irq_rx_tasklet,
++		     (void(*)(unsigned long))rtl8180_irq_rx_tasklet,
++		     (unsigned long)priv);
++#endif
++//by lizhaoming for Radio on/off
++#ifdef POLLING_METHOD_FOR_RADIO
++	init_timer(&priv->gpio_polling_timer);
++	priv->gpio_polling_timer.data = (unsigned long)dev;
++	priv->gpio_polling_timer.function = gpio_change_polling;
++#endif
++//by amy for rate adaptive
++	init_timer(&priv->rateadapter_timer);
++        priv->rateadapter_timer.data = (unsigned long)dev;
++        priv->rateadapter_timer.function = timer_rate_adaptive;
++//by amy for rate adaptive
++//by amy for ps
++	init_timer(&priv->watch_dog_timer);
++	priv->watch_dog_timer.data = (unsigned long)dev;
++	priv->watch_dog_timer.function = watch_dog_adaptive;
++//by amy
++//by amy for ps
++	priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;	
++	priv->ieee80211->iw_mode = IW_MODE_INFRA;
++	priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN | 
++		IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ | 
++#ifdef CONFIG_SOFT_BEACON
++		IEEE_SOFTMAC_BEACONS |  //IEEE_SOFTMAC_SINGLE_QUEUE;
++#endif
++		IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
++	
++	priv->ieee80211->active_scan = 1;
++	//priv->ieee80211->ch_lock = 0;
++	priv->ieee80211->rate = 110; //11 mbps
++	priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
++	priv->ieee80211->host_encrypt = 1;
++	priv->ieee80211->host_decrypt = 1;
++#ifdef CONFIG_SOFT_BEACON
++	priv->ieee80211->start_send_beacons = NULL;
++	priv->ieee80211->stop_send_beacons = NULL;
++#else
++	priv->ieee80211->start_send_beacons = rtl8187_beacon_tx;
++	priv->ieee80211->stop_send_beacons = rtl8187_beacon_stop;
++#endif
++	priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
++	priv->ieee80211->set_chan = rtl8180_set_chan;
++	priv->ieee80211->link_change = rtl8187_link_change;
++	priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
++	priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
++	priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
++
++#ifdef _RTL8187_EXT_PATCH_
++	priv->ieee80211->meshScanMode = 0;
++	priv->mshobj = alloc_mshobj(priv);
++	if(priv->mshobj)
++	{
++		priv->ieee80211->ext_patch_ieee80211_start_protocol = priv->mshobj->ext_patch_ieee80211_start_protocol;
++		priv->ieee80211->ext_patch_ieee80211_stop_protocol = priv->mshobj->ext_patch_ieee80211_stop_protocol;
++//by amy for mesh
++		priv->ieee80211->ext_patch_ieee80211_start_mesh = priv->mshobj->ext_patch_ieee80211_start_mesh;
++//by amy for mesh
++		priv->ieee80211->ext_patch_ieee80211_probe_req_1 = priv->mshobj->ext_patch_ieee80211_probe_req_1;
++		priv->ieee80211->ext_patch_ieee80211_probe_req_2 = priv->mshobj->ext_patch_ieee80211_probe_req_2;
++		priv->ieee80211->ext_patch_ieee80211_association_req_1 = priv->mshobj->ext_patch_ieee80211_association_req_1;
++		priv->ieee80211->ext_patch_ieee80211_association_req_2 = priv->mshobj->ext_patch_ieee80211_association_req_2;
++		priv->ieee80211->ext_patch_ieee80211_assoc_resp_by_net_1 = priv->mshobj->ext_patch_ieee80211_assoc_resp_by_net_1;
++		priv->ieee80211->ext_patch_ieee80211_assoc_resp_by_net_2 = priv->mshobj->ext_patch_ieee80211_assoc_resp_by_net_2;
++		priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_auth = priv->mshobj->ext_patch_ieee80211_rx_frame_softmac_on_auth;
++		priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_deauth = priv->mshobj->ext_patch_ieee80211_rx_frame_softmac_on_deauth;
++		priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req = priv->mshobj->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req;
++		priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp = priv->mshobj->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp;
++		priv->ieee80211->ext_patch_ieee80211_ext_stop_scan_wq_set_channel = priv->mshobj->ext_patch_ieee80211_ext_stop_scan_wq_set_channel;
++		priv->ieee80211->ext_patch_ieee80211_process_probe_response_1 = priv->mshobj->ext_patch_ieee80211_process_probe_response_1;
++		priv->ieee80211->ext_patch_ieee80211_rx_mgt_on_probe_req = priv->mshobj->ext_patch_ieee80211_rx_mgt_on_probe_req;
++		priv->ieee80211->ext_patch_ieee80211_rx_mgt_update_expire = priv->mshobj->ext_patch_ieee80211_rx_mgt_update_expire;
++		priv->ieee80211->ext_patch_get_beacon_get_probersp = priv->mshobj->ext_patch_get_beacon_get_probersp;
++		priv->ieee80211->ext_patch_ieee80211_rx_on_rx = priv->mshobj->ext_patch_ieee80211_rx_on_rx;		
++		priv->ieee80211->ext_patch_ieee80211_xmit = priv->mshobj->ext_patch_ieee80211_xmit;
++		priv->ieee80211->ext_patch_ieee80211_rx_frame_get_hdrlen = priv->mshobj->ext_patch_ieee80211_rx_frame_get_hdrlen;
++		priv->ieee80211->ext_patch_ieee80211_rx_is_valid_framectl = priv->mshobj->ext_patch_ieee80211_rx_is_valid_framectl;
++		priv->ieee80211->ext_patch_ieee80211_rx_process_dataframe = priv->mshobj->ext_patch_ieee80211_rx_process_dataframe;
++		// priv->ieee80211->ext_patch_is_duplicate_packet = priv->mshobj->ext_patch_is_duplicate_packet;
++		priv->ieee80211->ext_patch_ieee80211_softmac_xmit_get_rate = priv->mshobj->ext_patch_ieee80211_softmac_xmit_get_rate;
++		/* added by david for setting acl dynamically */
++		priv->ieee80211->ext_patch_ieee80211_acl_query = priv->mshobj->ext_patch_ieee80211_acl_query;
++	}
++
++#endif // _RTL8187_EXT_PATCH_
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)	
++	INIT_WORK(&priv->ieee80211->wmm_param_update_wq,\
++                  (void(*)(void*)) rtl8180_wmm_param_update,\
++                  priv->ieee80211);
++#else
++	INIT_WORK(&priv->ieee80211->wmm_param_update_wq,\
++                   rtl8180_wmm_param_update);
++#endif
++#else
++	tq_init(&priv->ieee80211->wmm_param_update_wq,\
++                (void(*)(void*)) rtl8180_wmm_param_update,\
++                priv->ieee80211);
++#endif
++	priv->ieee80211->init_wmmparam_flag = 0;
++	priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
++	
++	//priv->card_8185 = 2;
++	priv->phy_ver = 2;
++	priv->card_type = USB;
++//{add for 87B	
++	priv->ShortRetryLimit = 7;
++	priv->LongRetryLimit = 7;
++	priv->EarlyRxThreshold = 7;
++	
++	priv->TransmitConfig = 
++		TCR_DurProcMode |	//for RTL8185B, duration setting by HW
++		TCR_DISReqQsize |
++                (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT)|  // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
++		(priv->ShortRetryLimit<<TX_SRLRETRY_SHIFT)|	// Short retry limit
++		(priv->LongRetryLimit<<TX_LRLRETRY_SHIFT) |	// Long retry limit
++		(false ? TCR_SWPLCPLEN : 0);	// FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
++
++	priv->ReceiveConfig	=
++		RCR_AMF | RCR_ADF |		//accept management/data
++		RCR_ACF |			//accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
++		RCR_AB | RCR_AM | RCR_APM |	//accept BC/MC/UC
++		//RCR_AICV | RCR_ACRC32 | 	//accept ICV/CRC error packet
++		RCR_MXDMA | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
++		(priv->EarlyRxThreshold<<RX_FIFO_THRESHOLD_SHIFT) | // Rx FIFO Threshold, 7: No Rx threshold.
++		(priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
++
++	priv->AcmControl = 0;
++//}	
++	priv->rf_chip = 0xff & eprom_read(dev,EPROM_RFCHIPID);
++	//DMESG("rf_chip:%x\n", priv->rf_chip);
++	if (!priv->rf_chip)
++	{
++		DMESG("Can't get rf chip ID from EEPROM");
++		DMESGW("So set rf chip ID to defalut EPROM_RFCHIPID_RTL8225U");
++		DMESGW("use it with care and at your own risk and");
++		DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO Realtek");
++		priv->rf_chip = EPROM_RFCHIPID_RTL8225U;
++
++	}
++	dev->get_stats = rtl8180_stats;
++
++
++//{put the card to detect different card here, mainly I/O processing
++	udev = priv->udev;
++	idProduct = le16_to_cpu(udev->descriptor.idProduct);
++	//idProduct = 0x8197;
++	bcdDevice = le16_to_cpu(udev->descriptor.bcdDevice);
++	DMESG("idProduct:0x%x, bcdDevice:0x%x", idProduct,bcdDevice);
++	switch (idProduct) {
++		case 0x8189:
++		case 0x8197:
++		case 0x8198:
++			/* check RF frontend chipset */
++			priv->card_8187 = NIC_8187B;
++			priv->rf_init = rtl8225z2_rf_init;
++			priv->rf_set_chan = rtl8225z2_rf_set_chan;
++			priv->rf_set_sens = NULL;
++			break;
++
++		case 0x8187:
++			if(bcdDevice == 0x0200){
++			priv->card_8187 = NIC_8187B;
++			priv->rf_init = rtl8225z2_rf_init;
++			priv->rf_set_chan = rtl8225z2_rf_set_chan;
++			priv->rf_set_sens = NULL;
++			break;
++			}else{
++			//0x0100 is for 8187
++			//legacy 8187 NIC
++			//delet
++			;
++			}
++		default:
++			/* check RF frontend chipset */
++			priv->ieee80211->softmac_features |= IEEE_SOFTMAC_SINGLE_QUEUE;
++			priv->card_8187 = NIC_8187;
++			switch (priv->rf_chip) {
++				case EPROM_RFCHIPID_RTL8225U:
++					DMESG("Card reports RF frontend Realtek 8225");
++					DMESGW("This driver has EXPERIMENTAL support for this chipset.");
++					DMESGW("use it with care and at your own risk and");
++					DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO Realtek");
++					if(rtl8225_is_V_z2(dev)){
++						priv->rf_init = rtl8225z2_rf_init;
++						priv->rf_set_chan = rtl8225z2_rf_set_chan;
++						priv->rf_set_sens = NULL;
++						DMESG("This seems a new V2 radio");
++					}else{
++						priv->rf_init = rtl8225_rf_init;
++						priv->rf_set_chan = rtl8225_rf_set_chan;
++						priv->rf_set_sens = rtl8225_rf_set_sens;
++						DMESG("This seems a legacy 1st version radio");
++					}
++					break;
++
++				case EPROM_RFCHIPID_RTL8225U_VF:
++					priv->rf_init = rtl8225z2_rf_init;
++					priv->rf_set_chan = rtl8225z2_rf_set_chan;
++					priv->rf_set_sens = NULL;
++					DMESG("This seems a new V2 radio");
++					break;
++
++				default:
++					DMESGW("Unknown RF module %x",priv->rf_chip);
++					DMESGW("Exiting...");
++					return -1;
++			}
++			break;
++	}
++
++	priv->rf_close = rtl8225_rf_close;
++	priv->max_sens = RTL8225_RF_MAX_SENS;
++	priv->sens = RTL8225_RF_DEF_SENS;
++
++#ifdef ENABLE_DOT11D
++#if 0	
++	for(i=0;i<0xFF;i++) {
++		if(i%16 == 0)
++			printk("\n[%x]: ", i/16);
++		printk("\t%4.4x", eprom_read(dev,i));
++	}	
++#endif
++	priv->channel_plan = eprom_read(dev,EPROM_CHANNEL_PLAN) & 0xFF;
++	//DMESG("EPROM_CHANNEL_PLAN is %x", priv->channel_plan);
++
++	// lzm add 081205 for Toshiba:
++	// For Toshiba,reading the value from EEPROM 0x6h bit[7] to determine the priority of 
++	// channel plan to be defined.
++	//   -If bit[7] is true, then the channel plan is defined by EEPROM but no user defined.
++	//   -If bit[7] is false, then the channel plan is defined by user first. 
++	//	
++	if(priv->channel_plan & 0x80)	{
++		DMESG("Toshiba channel plan is defined by EEPROM");
++		priv->channel_plan &= 0xf;
++	}
++	else
++		priv->channel_plan = 0;
++	
++	//if(priv->channel_plan > COUNTRY_CODE_WORLD_WIDE_13_INDEX){
++	if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
++		DMESG("rtl8180_init:Error channel plan! Set to default.\n");
++		priv->channel_plan = 0;
++	}
++
++	//priv->channel_plan = 9;  //Global Domain
++	//priv->channel_plan = 2;    //ETSI
++
++
++	DMESG("Channel plan is %d ",priv->channel_plan);
++
++	//for Toshiba card we read channel plan from ChanPlanBin
++	if((idProduct != 0x8197) && (idProduct != 0x8198))
++		rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
++#else
++	int ch;
++	priv->channel_plan = eprom_read(dev,EPROM_CHANNEL_PLAN) & 0xff;
++	if(priv->channel_plan & 0x80) {
++		priv->channel_plan &= 0x7f;
++		if (ChannelPlan[priv->channel_plan].Len != 0){
++			// force channel plan map
++			for (i=0;i<ChannelPlan[priv->channel_plan].Len;i++) 
++				priv->ieee80211->channel_map[ChannelPlan[priv->channel_plan].Channel[i]] = 1;
++		} else {
++			DMESG("No channels, aborting");
++			return -1;
++		}
++	} else {
++		//default channel plan setting
++		if(!channels){
++			DMESG("No channels, aborting");
++			return -1;
++		}
++		ch=channels;
++		// set channels 1..14 allowed in given locale
++		for (i=1; i<=14; i++) {
++			(priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
++			ch >>= 1;
++		}
++	}
++#endif
++
++	if((idProduct == 0x8197) || (idProduct == 0x8198))	{
++		// lzm add 081205 for Toshiba:
++		// 0x77h bit[0]=1: use GPIO bit[2], bit[0]=0: use GPIO bit[1]
++		priv->EEPROMSelectNewGPIO =((u8)((eprom_read(dev,EPROM_SELECT_GPIO) & 0xff00) >> 8)) ? true : false;     
++		DMESG("EPROM_SELECT_GPIO:%d", priv->EEPROMSelectNewGPIO);
++	} else {
++		priv->EEPROMSelectNewGPIO = false;
++	}
++
++
++	if (NIC_8187 == priv->card_8187){
++		hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
++		switch (hw_version) {
++			case 0x06:
++				//priv->card_8187_Bversion = VERSION_8187B_B;
++				break;
++			case 0x05:
++				priv->card_8187_Bversion = VERSION_8187_D;
++				break;
++			default:
++				priv->card_8187_Bversion = VERSION_8187_B;
++				break;
++		}
++	}else{
++		hw_version = read_nic_byte(dev, 0xe1); //87B hw version reg
++		switch (hw_version){
++			case 0x00:
++				priv->card_8187_Bversion = VERSION_8187B_B;
++				break;
++			case 0x01:
++				priv->card_8187_Bversion = VERSION_8187B_D;
++				break;
++			case 0x02:
++				priv->card_8187_Bversion = VERSION_8187B_E;
++				break;
++			default:
++				priv->card_8187_Bversion = VERSION_8187B_B; //defalt
++				break;
++		}
++	}
++	
++	//printk("=====hw_version:%x\n", priv->card_8187_Bversion);
++	priv->enable_gpio0 = 0;
++
++	/*the eeprom type is stored in RCR register bit #6 */ 
++	if (RCR_9356SEL & read_nic_dword(dev, RCR)){
++		priv->epromtype=EPROM_93c56;
++		DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
++	}else{
++		priv->epromtype=EPROM_93c46;
++		DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
++	}
++
++	dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
++	dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
++	dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
++	dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
++	dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
++	dev->dev_addr[5]=((eprom_read(dev,MAC_ADR+2) & 0xff00)>>8)+1;
++	
++	DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
++	
++	for(i=1,j=0; i<6; i+=2,j++){
++		
++		word = eprom_read(dev,EPROM_TXPW0 + j);
++		priv->chtxpwr[i]=word & 0xf;
++		priv->chtxpwr_ofdm[i]=(word & 0xf0)>>4;
++		priv->chtxpwr[i+1]=(word & 0xf00)>>8;
++		priv->chtxpwr_ofdm[i+1]=(word & 0xf000)>>12;
++	}
++	
++	for(i=1,j=0; i<4; i+=2,j++){
++			
++		word = eprom_read(dev,EPROM_TXPW1 + j);
++		priv->chtxpwr[i+6]=word & 0xf;
++		priv->chtxpwr_ofdm[i+6]=(word & 0xf0)>>4;
++		priv->chtxpwr[i+6+1]=(word & 0xf00)>>8;
++		priv->chtxpwr_ofdm[i+6+1]=(word & 0xf000)>>12;
++	}
++	if (priv->card_8187 == NIC_8187){
++		for(i=1,j=0; i<4; i+=2,j++){
++			word = eprom_read(dev,EPROM_TXPW2 + j);
++			priv->chtxpwr[i+6+4]=word & 0xf;
++			priv->chtxpwr_ofdm[i+6+4]=(word & 0xf0)>>4;
++			priv->chtxpwr[i+6+4+1]=(word & 0xf00)>>8;
++			priv->chtxpwr_ofdm[i+6+4+1]=(word & 0xf000)>>12;
++		}
++	} else{
++		word = eprom_read(dev, 0x1B) & 0xff; //channel 11;
++		priv->chtxpwr[11]=word & 0xf;
++		priv->chtxpwr_ofdm[11] = (word & 0xf0)>>4;
++
++		word = eprom_read(dev, 0xA) & 0xff; //channel 12;
++		priv->chtxpwr[12]=word & 0xf;
++		priv->chtxpwr_ofdm[12] = (word & 0xf0)>>4;
++
++		word = eprom_read(dev, 0x1c) ; //channel 13 ,14;
++		priv->chtxpwr[13]=word & 0xf;
++		priv->chtxpwr_ofdm[13] = (word & 0xf0)>>4;
++		priv->chtxpwr[14]=(word & 0xf00)>>8;
++		priv->chtxpwr_ofdm[14] = (word & 0xf000)>>12;
++	}
++	
++	word = eprom_read(dev,EPROM_TXPW_BASE);
++	priv->cck_txpwr_base = word & 0xf;
++	priv->ofdm_txpwr_base = (word>>4) & 0xf;
++	
++	//DMESG("PAPE from CONFIG2: %x",read_nic_byte(dev,CONFIG2)&0x7);
++	
++#ifdef SW_ANTE_DIVERSITY
++	rtl8187_antenna_diversity_read(dev);
++#endif
++
++	if(rtl8187_usb_initendpoints(dev)!=0){ 
++		DMESG("Endopoints initialization failed");
++		return -ENOMEM;
++	}
++#ifdef LED
++	InitSwLeds(dev);
++#endif	
++#ifdef DEBUG_EPROM
++	dump_eprom(dev);
++#endif 
++	return 0;
++
++}
++
++void rtl8185_rf_pins_enable(struct net_device *dev)
++{
++/*	u16 tmp;
++	tmp = read_nic_word(dev, RFPinsEnable);*/
++	write_nic_word(dev, RFPinsEnable, 0x1ff7);// | tmp);
++}
++
++
++void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
++{
++	u8 conf3;
++
++	rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
++
++	conf3 = read_nic_byte(dev, CONFIG3);
++	write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));	
++
++	write_nic_dword(dev, ANAPARAM2, a);
++
++	conf3 = read_nic_byte(dev, CONFIG3);
++	write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
++
++	rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
++
++}
++
++
++void rtl8180_set_anaparam(struct net_device *dev, u32 a)
++{
++	u8 conf3;
++
++	rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
++
++	conf3 = read_nic_byte(dev, CONFIG3);
++	write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
++	
++	write_nic_dword(dev, ANAPARAM, a);
++
++	conf3 = read_nic_byte(dev, CONFIG3);
++	write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
++
++	rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
++	
++}
++
++
++void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
++{
++	write_nic_byte(dev, ANTSEL, ant); 
++	//lzm mod for up take too long time 20081201
++	//mdelay(1);
++}	
++
++
++void rtl8187_write_phy(struct net_device *dev, u8 adr, u32 data)
++{
++	u32 phyw;
++	
++	adr |= 0x80;
++	 
++	phyw= ((data<<8) | adr);
++	
++	
++	
++	// Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. 
++	write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
++	write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
++	write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
++	write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
++
++	//read_nic_dword(dev, PHY_ADR);
++#if 0	
++	for(i=0;i<10;i++){
++		write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
++		phyr = read_nic_byte(dev, PHY_READ);
++		if(phyr == (data&0xff)) break;
++			
++	}
++#endif
++	/* this is ok to fail when we write AGC table. check for AGC table might be
++	 * done by masking with 0x7f instead of 0xff */
++	//if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr);
++	//msdelay(1);//CPU occupany is too high. LZM 31/10/2008  
++}
++
++u8 rtl8187_read_phy(struct net_device *dev,u8 adr, u32 data)
++{
++	u32 phyw;
++
++	adr &= ~0x80;
++	phyw= ((data<<8) | adr);
++	
++	
++	// Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. 
++	write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
++	write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
++	write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
++	write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
++	
++	return(read_nic_byte(dev,0x7e));
++
++}
++
++u8 read_phy_ofdm(struct net_device *dev, u8 adr)
++{
++	return(rtl8187_read_phy(dev, adr, 0x000000));
++}
++
++u8 read_phy_cck(struct net_device *dev, u8 adr)
++{
++	return(rtl8187_read_phy(dev, adr, 0x10000));
++}
++
++inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
++{
++	data = data & 0xff;
++	rtl8187_write_phy(dev, adr, data);
++}
++
++
++void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
++{
++	data = data & 0xff;
++	rtl8187_write_phy(dev, adr, data | 0x10000);
++}
++//
++//	Description:	Change ZEBRA's power state.
++//
++//	Assumption:	This function must be executed in PASSIVE_LEVEL.
++//
++//	061214, by rcnjko.
++//
++//#define MAX_DOZE_WAITING_TIMES_87B 1000//500
++#define MAX_DOZE_WAITING_TIMES_87B_MOD 500
++
++bool SetZebraRFPowerState8187B(struct net_device *dev,RT_RF_POWER_STATE	eRFPowerState)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	u8			btCR9346, btConfig3;
++	bool			bResult = true;
++	int				i;
++	u16			u2bTFPC = 0;
++	u8			u1bTmp;
++
++	// Set EEM0 and EEM1 in 9346CR.
++	btCR9346 = read_nic_byte(dev, CR9346);
++	write_nic_byte(dev, CR9346, (btCR9346|0xC0) );
++	// Set PARM_En in Config3.
++	btConfig3 = read_nic_byte(dev, CONFIG3);
++	write_nic_byte(dev, CONFIG3, (btConfig3|CONFIG3_PARM_En) );
++	// BB and RF related operations:
++	switch(eRFPowerState)
++	{
++	case eRfOn:
++//#ifdef CONFIG_RADIO_DEBUG
++		DMESG("Now Radio ON!");
++//#endif
++		write_nic_dword(dev, ANAPARAM, ANAPARM_ON);
++		write_nic_dword(dev, ANAPARAM2, ANAPARM2_ON);
++		//write_nic_byte(dev, CONFIG4, (priv->RFProgType));
++		
++		write_nic_byte(dev, 0x085, 0x24); // 061219, SD3 ED: for minicard CCK power leakage issue.
++		write_rtl8225(dev, 0x4, 0x9FF);
++		mdelay(1);
++		//
++		// <Roger_Notes> We reset PLL to reduce power consumption about 30 mA. 2008.01.16.
++		//
++		{
++			u8 Reg62;
++
++			write_nic_byte(dev, 0x61, 0x10);
++			Reg62 = read_nic_byte(dev, 0x62);
++			write_nic_byte(dev, 0x62, (Reg62 & (~BIT5)) );
++			write_nic_byte(dev, 0x62, (Reg62 | BIT5) ); // Enable PLL.
++		}
++
++		u1bTmp = read_nic_byte(dev, 0x24E);
++		write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5|BIT6))) );// 070124 SD1 Alex: turn on CCK and OFDM.
++		break;
++
++	case eRfSleep:
++#ifdef CONFIG_RADIO_DEBUG
++		DMESG("Now Radio Sleep!");
++#endif
++		for(i = 0; i < MAX_DOZE_WAITING_TIMES_87B_MOD; i++)
++		{ // Make sure TX FIFO is empty befor turn off RFE pwoer.
++			u2bTFPC = read_nic_word(dev, TFPC);
++			if(u2bTFPC == 0){
++				printk("%d times TFPC: %d == 0 before doze...\n", (i+1), u2bTFPC);
++				break;
++			}else{
++				printk("%d times TFPC: %d != 0 before doze!\n", (i+1), u2bTFPC);
++				udelay(10);
++			}
++		}
++		
++		if( i == MAX_DOZE_WAITING_TIMES_87B_MOD ){
++			printk("\n\n\n SetZebraRFPowerState8187B(): %d times TFPC: %d != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_87B_MOD, u2bTFPC);
++		}
++
++		u1bTmp = read_nic_byte(dev, 0x24E);
++		write_nic_byte(dev, 0x24E, (u1bTmp|BIT5|BIT6));// 070124 SD1 Alex: turn off CCK and OFDM.
++		
++		write_rtl8225(dev, 0x4, 0xDFF); // Turn off RF first to prevent BB lock up, suggested by PJ, 2006.03.03.
++		write_nic_byte(dev, 0x085, 0x04); // 061219, SD3 ED: for minicard CCK power leakage issue.
++
++		//write_nic_byte(dev, CONFIG4, (priv->RFProgType|Config4_PowerOff));
++
++		write_nic_dword(dev, ANAPARAM, ANAPARM_OFF);
++		write_nic_dword(dev, ANAPARAM2, 0x72303f70); // 070126, by SD1 William.
++		break;
++
++	case eRfOff:
++//#ifdef CONFIG_RADIO_DEBUG
++		DMESG("Now Radio OFF!");
++//#endif
++		for(i = 0; i < MAX_DOZE_WAITING_TIMES_87B_MOD; i++)
++		{ // Make sure TX FIFO is empty befor turn off RFE pwoer.
++			u2bTFPC = read_nic_word(dev, TFPC);
++			if(u2bTFPC == 0)			{
++				//printk("%d times TFPC: %d == 0 before doze...\n", (i+1), u2bTFPC);
++				break;
++			}else{
++				//printk("%d times TFPC: 0x%x != 0 before doze!\n", (i+1), u2bTFPC);
++				udelay(10);
++			}
++		}
++
++		if( i == MAX_DOZE_WAITING_TIMES_87B_MOD){
++			printk("\n\n\nSetZebraRFPowerState8187B(): %d times TFPC: 0x%x != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_87B_MOD, u2bTFPC);
++		}
++
++		u1bTmp = read_nic_byte(dev, 0x24E);
++		write_nic_byte(dev, 0x24E, (u1bTmp|BIT5|BIT6));// 070124 SD1 Alex: turn off CCK and OFDM.
++		
++		write_rtl8225(dev, 0x4,0x1FF); // Turn off RF first to prevent BB lock up, suggested by PJ, 2006.03.03.
++		write_nic_byte(dev, 0x085, 0x04); // 061219, SD3 ED: for minicard CCK power leakage issue.
++
++		//write_nic_byte(dev, CONFIG4, (priv->RFProgType|Config4_PowerOff));
++
++		write_nic_dword(dev, ANAPARAM, ANAPARM_OFF);
++		write_nic_dword(dev, ANAPARAM2, ANAPARM2_OFF); // 070301, SD1 William: to reduce RF off power consumption to 80 mA.
++		break;
++
++	default:
++		bResult = false;
++		printk("SetZebraRFPowerState8187B(): unknow state to set: 0x%X!!!\n", eRFPowerState);
++		break;
++	}
++
++	// Clear PARM_En in Config3.
++	btConfig3 &= ~(CONFIG3_PARM_En);
++	write_nic_byte(dev, CONFIG3, btConfig3);
++	// Clear EEM0 and EEM1 in 9346CR.
++	btCR9346 &= ~(0xC0);
++	write_nic_byte(dev, CR9346, btCR9346);
++
++	if(bResult){
++		// Update current RF state variable.
++		priv->eRFPowerState = eRFPowerState;
++	}
++
++	return bResult;
++}
++//by amy for ps
++//
++//	Description: Chang RF Power State.
++//	Note that, only MgntActSet_RF_State() is allowed to set HW_VAR_RF_STATE.
++//
++//	Assumption:PASSIVE LEVEL.
++//
++bool SetRFPowerState(struct net_device *dev,RT_RF_POWER_STATE eRFPowerState)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	bool			bResult = false;
++
++	//printk("---------> SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState);
++	if(eRFPowerState == priv->eRFPowerState)
++	{
++		//printk("<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState);
++		return bResult;
++	}
++
++	switch(priv->rf_chip)
++	{
++		case RF_ZEBRA2:
++			 bResult = SetZebraRFPowerState8187B(dev, eRFPowerState);
++			break;
++
++		default:
++			printk("SetRFPowerState8185(): unknown RFChipID: 0x%X!!!\n", priv->rf_chip);
++			break;;
++	}
++	//printk("<--------- SetRFPowerState(): bResult(%d)\n", bResult);
++
++	return bResult;
++}
++
++bool
++MgntActSet_RF_State(struct net_device *dev,RT_RF_POWER_STATE StateToSet,u32 ChangeSource)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	bool				bActionAllowed = false; 
++	bool				bConnectBySSID = false;
++	RT_RF_POWER_STATE 	rtState;
++	u16				RFWaitCounter = 0;
++	unsigned long flag;
++	// printk("===>MgntActSet_RF_State(): StateToSet(%d), ChangeSource(0x%x)\n",StateToSet, ChangeSource);
++	//
++	// Prevent the race condition of RF state change. By Bruce, 2007-11-28.
++	// Only one thread can change the RF state at one time, and others should wait to be executed.
++	//
++#if 1 
++	while(true)
++	{
++		//down(&priv->rf_state);
++		spin_lock_irqsave(&priv->rf_ps_lock,flag);
++		if(priv->RFChangeInProgress)
++		{
++			//up(&priv->rf_state);
++			//RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet));
++			spin_unlock_irqrestore(&priv->rf_ps_lock,flag);			
++			// Set RF after the previous action is done. 
++			while(priv->RFChangeInProgress)
++			{
++				RFWaitCounter ++;
++				//RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter));
++				udelay(1000); // 1 ms
++
++				// Wait too long, return FALSE to avoid to be stuck here.
++				if(RFWaitCounter > 1000) // 1sec
++				{
++					DMESG("MgntActSet_RF_State(): Wait too long to set RF");
++					// TODO: Reset RF state?
++					return false;
++				}
++			}
++		}
++		else
++		{
++			priv->RFChangeInProgress = true;
++//			up(&priv->rf_state);
++			spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
++			break;
++		}
++	}
++#endif
++	rtState = priv->eRFPowerState;	
++
++	switch(StateToSet) 
++	{
++	case eRfOn:
++		//
++		// Turn On RF no matter the IPS setting because we need to update the RF state to Ndis under Vista, or
++		// the Windows does not allow the driver to perform site survey any more. By Bruce, 2007-10-02. 
++		//
++		// leave last reasons and kick this reason till priv->RfOffReason = 0;
++		// if one reason turn radio off check if off->on reason is the same.if so turn, or reject it.
++		// if more than 1 reasons turn radio off we only turn on radio when all reasons turn on radio, 
++		// so first turn on trys will reject till priv->RfOffReason = 0;
++		priv->RfOffReason &= (~ChangeSource);
++
++		if(! priv->RfOffReason)
++		{
++			priv->RfOffReason = 0;
++			bActionAllowed = true;
++
++			if(rtState == eRfOff && ChangeSource >=RF_CHANGE_BY_HW && !priv->bInHctTest)
++			{
++				bConnectBySSID = true;
++			}
++		} else {
++			;//lzm must or TX_PENDING 12>MAX_TX_URB
++			//printk("Turn Radio On Reject because RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->RfOffReason, ChangeSource);
++		}
++		break;
++
++	case eRfOff:
++		 // 070125, rcnjko: we always keep connected in AP mode.
++			if (priv->RfOffReason > RF_CHANGE_BY_IPS)
++			{
++				//
++				// 060808, Annie: 
++				// Disconnect to current BSS when radio off. Asked by QuanTa.
++				// 
++
++				//
++				// Calling MgntDisconnect() instead of MgntActSet_802_11_DISASSOCIATE(),
++				// because we do NOT need to set ssid to dummy ones.
++				// Revised by Roger, 2007.12.04.
++				//
++//by amy not supported
++				//MgntDisconnect( dev, disas_lv_ss );	
++				
++				// Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI. 
++				// 2007.05.28, by shien chang.
++				//PlatformZeroMemory( pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC );
++				//pMgntInfo->NumBssDesc = 0;
++				//PlatformZeroMemory( pMgntInfo->bssDesc4Query, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC );
++				//pMgntInfo->NumBssDesc4Query = 0;
++			}
++		
++		
++
++		priv->RfOffReason |= ChangeSource;
++		bActionAllowed = true;
++		//printk("Turn Radio Off RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->RfOffReason, ChangeSource);
++		break;
++
++	case eRfSleep:
++		priv->RfOffReason |= ChangeSource;
++		bActionAllowed = true;
++		break;
++
++	default:
++		break;
++	}
++
++	if(bActionAllowed)
++	{
++                // Config HW to the specified mode.
++		//printk("MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->RfOffReason);
++		SetRFPowerState(dev, StateToSet);
++		// Turn on RF.
++		if(StateToSet == eRfOn) 
++		{				
++			//HalEnableRx8185Dummy(dev);
++			if(bConnectBySSID)
++			{	
++			// by amy not supported
++				//MgntActSet_802_11_SSID(Adapter, Adapter->MgntInfo.Ssid.Octet, Adapter->MgntInfo.Ssid.Length, TRUE );
++			}
++		}
++		// Turn off RF.
++		else if(StateToSet == eRfOff)
++		{		
++			//HalDisableRx8185Dummy(dev);
++		}		
++	}
++	else
++	{
++		//printk("Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", 
++		//	StateToSet, ChangeSource, priv->RfOffReason);
++	}
++
++	// Release RF spinlock
++	//down(&priv->rf_state);
++	spin_lock_irqsave(&priv->rf_ps_lock,flag);
++	priv->RFChangeInProgress = false;
++	//up(&priv->rf_state);
++	spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
++	return bActionAllowed;
++}
++//by amy for ps
++
++void rtl8180_adapter_start(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++//	struct ieee80211_device *ieee = priv->ieee80211;
++//	u8			InitWirelessMode;
++//	u8			SupportedWirelessMode;
++//	bool			bInvalidWirelessMode = false;	
++
++
++	if(NIC_8187 == priv->card_8187) {
++		//rtl8180_rtx_disable(dev);
++		rtl8180_reset(dev);
++
++		write_nic_byte(dev,0x85,0);
++		write_nic_byte(dev,0x91,0);
++
++		/* light blink! */
++		write_nic_byte(dev,0x85,4);
++		write_nic_byte(dev,0x91,1);
++		write_nic_byte(dev,0x90,0);
++
++		//by lizhaoming for LED POWR ON
++		//LedControl8187(dev, LED_CTL_POWER_ON);
++		
++		/*	
++			write_nic_byte(dev, CR9346, 0xC0);
++		//LED TYPE
++		write_nic_byte(dev, CONFIG1,((read_nic_byte(dev, CONFIG1)&0x3f)|0x80));	//turn on bit 5:Clkrun_mode
++		write_nic_byte(dev, CR9346, 0x0);	// disable config register write
++		*/	
++		priv->irq_mask = 0xffff;
++		/*
++		   priv->dma_poll_mask = 0;
++		   priv->dma_poll_mask|= (1<<TX_DMA_STOP_BEACON_SHIFT);
++		   */	
++		//	rtl8180_beacon_tx_disable(dev);
++
++		rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
++		write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
++		write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
++
++		rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
++		rtl8180_update_msr(dev);
++
++		rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
++
++		write_nic_word(dev,0xf4,0xffff);
++		write_nic_byte(dev,
++				CONFIG1, (read_nic_byte(dev,CONFIG1) & 0x3f) | 0x80);	
++
++		rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
++
++		write_nic_dword(dev,INT_TIMEOUT,0);	
++
++#ifdef DEBUG_REGISTERS
++		rtl8180_dump_reg(dev);	
++#endif
++
++
++		write_nic_byte(dev, WPA_CONFIG, 0);	
++
++		write_nic_byte(dev, RATE_FALLBACK, 0x81);
++		rtl8187_set_rate(dev);
++
++		priv->rf_init(dev);	
++
++		if(priv->rf_set_sens != NULL) {
++			priv->rf_set_sens(dev,priv->sens);	
++		}
++
++		write_nic_word(dev,0x5e,1);
++		//mdelay(1);
++		write_nic_word(dev,0xfe,0x10);
++		//	mdelay(1);
++		write_nic_byte(dev, TALLY_SEL, 0x80);//Set NQ retry count
++		write_nic_byte(dev, 0xff, 0x60);
++		write_nic_word(dev,0x5e,0);
++
++		rtl8180_irq_enable(dev);
++	} else {
++		/**
++		 *  IO part migrated from Windows Driver.
++		 */
++		priv->irq_mask = 0xffff;
++		// Enable Config3.PARAM_En.
++		write_nic_byte(dev, CR9346, 0xC0);
++
++		write_nic_byte(dev, CONFIG3, (read_nic_byte(dev, CONFIG3)| CONFIG3_PARM_En|CONFIG3_GNTSel));
++		// Turn on Analog power.
++		// setup A/D D/A parameter for 8185 b2 
++		// Asked for by William, otherwise, MAC 3-wire can't work, 2006.06.27, by rcnjko.
++		write_nic_dword(dev, ANA_PARAM2, ANAPARM2_ASIC_ON);
++		write_nic_dword(dev, ANA_PARAM, ANAPARM_ASIC_ON);
++		write_nic_byte(dev, ANA_PARAM3, 0x00);
++
++		//by lizhaoming for LED POWR ON
++		//LedControl8187(dev, LED_CTL_POWER_ON);
++
++		{//added for reset PLL 
++			u8 bReg62;
++			write_nic_byte(dev, 0x61, 0x10);
++			bReg62 = read_nic_byte(dev, 0x62);
++			write_nic_byte(dev, 0x62, bReg62&(~(0x1<<5)));
++			write_nic_byte(dev, 0x62, bReg62|(0x1<<5));
++		}
++		write_nic_byte(dev, CONFIG3, (read_nic_byte(dev, CONFIG3)&(~CONFIG3_PARM_En)));
++		write_nic_byte(dev, CR9346, 0x00);
++
++		//rtl8180_rtx_disable(dev);
++		rtl8180_reset(dev);
++		write_nic_byte(dev, CR9346, 0xc0);	// enable config register write
++                priv->rf_init(dev);                
++		// Enable tx/rx
++
++		write_nic_byte(dev, CMD, (CR_RE|CR_TE));// Using HW_VAR_COMMAND instead of writing CMDR directly. Rewrited by Annie, 2006-04-07.
++
++		//add this is for 8187B Rx stall problem
++
++		rtl8180_irq_enable(dev);
++
++		write_nic_byte_E(dev, 0x41, 0xF4);
++		write_nic_byte_E(dev, 0x40, 0x00);
++		write_nic_byte_E(dev, 0x42, 0x00);
++		write_nic_byte_E(dev, 0x42, 0x01);
++		write_nic_byte_E(dev, 0x40, 0x0F);
++		write_nic_byte_E(dev, 0x42, 0x00);
++		write_nic_byte_E(dev, 0x42, 0x01);
++	
++		// 8187B demo board MAC and AFE power saving parameters from SD1 William, 2006.07.20.
++                // Parameter revised by SD1 William, 2006.08.21: 
++                //      373h -> 0x4F // Original: 0x0F 
++                //      377h -> 0x59 // Original: 0x4F 
++                // Victor 2006/8/21: ¬Ù¹q°Ñ¼Æ«Øijµ¥SD3 °ª§C·Å and cable link test OK¤~¥¿¦¡ release,¤£«Øij¤Ó§Ö
++                // 2006/9/5, Victor & ED: it is OK to use.
++                //if(pHalData->RegBoardType == BT_DEMO_BOARD)
++                //{
++                        // AFE.
++                        //
++                        // Revise the content of Reg0x372, 0x374, 0x378 and 0x37a to fix unusual electronic current 
++                        // while CTS-To-Self occurs, by DZ's request.
++                        // Modified by Roger, 2007.06.22.
++                        //
++                        write_nic_byte(dev, 0x0DB, (read_nic_byte(dev, 0x0DB)|(BIT2)));
++                        write_nic_word(dev, 0x372, 0x59FA); // 0x4FFA-> 0x59FA.
++                        write_nic_word(dev, 0x374, 0x59D2); // 0x4FD2-> 0x59D2.
++                        write_nic_word(dev, 0x376, 0x59D2);
++                        write_nic_word(dev, 0x378, 0x19FA); // 0x0FFA-> 0x19FA.
++                        write_nic_word(dev, 0x37A, 0x19FA); // 0x0FFA-> 0x19FA.
++                        write_nic_word(dev, 0x37C, 0x00D0);
++
++                        write_nic_byte(dev, 0x061, 0x00);
++
++                        // MAC.
++                        write_nic_byte(dev, 0x180, 0x0F);
++                        write_nic_byte(dev, 0x183, 0x03);
++                        // 061218, lanhsin: for victorh request
++                        write_nic_byte(dev, 0x0DA, 0x10);
++                //}
++
++                //
++                // 061213, rcnjko: 
++                // Set MAC.0x24D to 0x00 to prevent cts-to-self Tx/Rx stall symptom.
++                // If we set MAC 0x24D to 0x08, OFDM and CCK will turn off 
++                // if not in use, and there is a bug about this action when 
++                // we try to send CCK CTS and OFDM data together.
++                //
++                //PlatformEFIOWrite1Byte(Adapter, 0x24D, 0x00);
++                // 061218, lanhsin: for victorh request
++                write_nic_byte(dev, 0x24D, 0x08);
++
++                //
++                // 061215, rcnjko:
++                // Follow SD3 RTL8185B_87B_MacPhy_Register.doc v0.4.
++                //
++                write_nic_dword(dev, HSSI_PARA, 0x0600321B);
++		//
++                // 061226, rcnjko:
++                // Babble found in HCT 2c_simultaneous test, server with 87B might 
++                // receive a packet size about 2xxx bytes.
++                // So, we restrict RMS to 2048 (0x800), while as IC default value is 0xC00.
++                //
++                write_nic_word(dev, RMS, 0x0800);
++
++                /*****20070321 Resolve HW page bug on system logo test
++                u8 faketemp=read_nic_byte(dev, 0x50);*/
++	}
++}
++
++/* this configures registers for beacon tx and enables it via
++ * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
++ * be used to stop beacon transmission
++ */
++#if 0
++void rtl8180_start_tx_beacon(struct net_device *dev)
++{
++	int i;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	u16 word;	
++	DMESG("Enabling beacon TX");
++	//write_nic_byte(dev, 0x42,0xe6);// TCR
++	//rtl8180_init_beacon(dev);
++	//set_nic_txring(dev);
++//	rtl8180_prepare_beacon(dev);
++	rtl8180_irq_disable(dev);
++//	rtl8180_beacon_tx_enable(dev);
++	rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
++	//write_nic_byte(dev,0x9d,0x20); //DMA Poll
++	//write_nic_word(dev,0x7a,0);
++	//write_nic_word(dev,0x7a,0x8000);
++
++	
++	word  = read_nic_word(dev, BcnItv);
++	word &= ~BcnItv_BcnItv; // clear Bcn_Itv
++	write_nic_word(dev, BcnItv, word);
++
++	write_nic_word(dev, AtimWnd, 
++		       read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd);
++	
++	word  = read_nic_word(dev, BintrItv);
++	word &= ~BintrItv_BintrItv;
++	
++	//word |= priv->ieee80211->beacon_interval * 
++	//	((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
++	// FIXME:FIXME check if correct ^^ worked with 0x3e8;
++	
++	write_nic_word(dev, BintrItv, word);
++	
++	//write_nic_word(dev,0x2e,0xe002);
++	//write_nic_dword(dev,0x30,0xb8c7832e);
++	for(i=0; i<ETH_ALEN; i++)
++		write_nic_byte(dev, BSSID+i, priv->ieee80211->beacon_cell_ssid[i]);
++	
++//	rtl8180_update_msr(dev);
++
++	
++	//write_nic_byte(dev,CONFIG4,3); /* !!!!!!!!!! */
++	
++	rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
++	
++	rtl8180_irq_enable(dev);
++	
++	/* VV !!!!!!!!!! VV*/
++	/*
++	rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
++	write_nic_byte(dev,0x9d,0x00); 	
++	rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
++*/
++}
++#endif
++/***************************************************************************
++    -------------------------------NET STUFF---------------------------
++***************************************************************************/
++static struct net_device_stats *rtl8180_stats(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	
++	return &priv->ieee80211->stats;
++}
++
++int _rtl8180_up(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//int i;
++
++        priv->driver_upping = 1;
++	priv->up=1;
++	
++#ifdef LED
++	if(priv->ieee80211->bHwRadioOff == false)
++		priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_POWER_ON); 
++#endif
++	MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_SW);
++
++	rtl8180_adapter_start(dev);
++	rtl8180_rx_enable(dev);
++	rtl8180_tx_enable(dev);
++//by amy for rate adaptive
++        timer_rate_adaptive((unsigned long)dev);
++//by amy for rate adaptive
++
++#ifdef SW_ANTE_DIVERSITY
++        if(priv->bSwAntennaDiverity){
++            	//DMESG("SW Antenna Diversity Enable!");
++            	SwAntennaDiversityTimerCallback(dev);
++        	}
++#endif
++#ifdef POLLING_METHOD_FOR_RADIO
++	if(priv->polling_timer_on == 0){//add for S3/S4
++		gpio_change_polling((unsigned long)dev);
++	}
++#endif
++
++	ieee80211_softmac_start_protocol(priv->ieee80211);
++
++//by amy for ps
++	watch_dog_adaptive((unsigned long)dev);
++//by amy for ps
++
++	ieee80211_reset_queue(priv->ieee80211);
++	if(!netif_queue_stopped(dev))
++		netif_start_queue(dev);
++	else
++		netif_wake_queue(dev);
++
++#ifndef CONFIG_SOFT_BEACON
++	if(NIC_8187B == priv->card_8187)
++                rtl8187_rx_manage_initiate(dev);
++#endif
++
++#ifdef _RTL8187_EXT_PATCH_
++	if(priv->mshobj && priv->mshobj->ext_patch_rtl8180_up )
++		priv->mshobj->ext_patch_rtl8180_up(priv->mshobj);
++#endif
++
++
++        priv->driver_upping = 0;
++	DMESG("rtl8187_open process complete");
++	return 0;
++}
++
++
++int rtl8180_open(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int ret;
++//changed by lizhaoming for power on/off
++	if(priv->ieee80211->bHwRadioOff == false){
++		DMESG("rtl8187_open process ");
++		down(&priv->wx_sem);
++		ret = rtl8180_up(dev);
++		up(&priv->wx_sem);
++		return ret;
++	}else{
++		DMESG("rtl8187_open process failed because radio off");
++		return -1;
++	}
++	
++}
++
++
++int rtl8180_up(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if (priv->up == 1) return -1;
++	
++	return _rtl8180_up(dev);
++}
++
++
++int rtl8180_close(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int ret;
++	
++	if (priv->up == 0) return -1;
++
++	down(&priv->wx_sem);
++
++	//DMESG("rtl8187_close process");
++	ret = rtl8180_down(dev);
++#ifdef LED
++	priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_POWER_OFF); 
++#endif	
++	up(&priv->wx_sem);
++	
++	return ret;
++
++}
++
++int rtl8180_down(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++	if (priv->up == 0) return -1;
++	
++	priv->up=0;
++
++/* FIXME */
++	if (!netif_queue_stopped(dev))
++		netif_stop_queue(dev);
++	
++	DMESG("rtl8180_down process");
++	rtl8180_rtx_disable(dev);
++	rtl8180_irq_disable(dev);
++//by amy for rate adaptive
++        del_timer_sync(&priv->rateadapter_timer);
++        cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
++//by amy for rate adaptive
++	del_timer_sync(&priv->watch_dog_timer);
++	cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
++	cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
++	cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
++
++#ifdef SW_ANTE_DIVERSITY
++	del_timer_sync(&priv->SwAntennaDiversityTimer);
++	cancel_delayed_work(&priv->ieee80211->SwAntennaWorkItem);
++#endif
++
++	ieee80211_softmac_stop_protocol(priv->ieee80211);
++	MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
++	//amy,081212
++	memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
++	return 0;
++}
++
++bool SetZebraRFPowerState8187B(struct net_device *dev,RT_RF_POWER_STATE  eRFPowerState);
++
++void rtl8180_commit(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	int i;
++
++	if (priv->up == 0) return ;
++	printk("==========>%s()\n", __FUNCTION__);
++
++	/* FIXME */
++	if (!netif_queue_stopped(dev))
++		netif_stop_queue(dev);
++
++//by amy for rate adaptive
++        del_timer_sync(&priv->rateadapter_timer);
++        cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
++//by amy for rate adaptive
++        del_timer_sync(&priv->watch_dog_timer);
++        cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
++        cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
++        cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
++
++#ifdef SW_ANTE_DIVERSITY
++	del_timer_sync(&priv->SwAntennaDiversityTimer);
++	cancel_delayed_work(&priv->ieee80211->SwAntennaWorkItem);
++#endif
++	ieee80211_softmac_stop_protocol(priv->ieee80211);
++	
++#if 0
++	if(priv->ieee80211->bHwRadioOff == false){
++		MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_HW);
++		mdelay(10);
++		MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_HW);
++	}
++#endif
++
++	rtl8180_irq_disable(dev);
++	rtl8180_rtx_disable(dev);
++
++	//test pending bug, john 20070815 
++	//initialize tx_pending
++	for(i=0;i<0x10;i++)  atomic_set(&(priv->tx_pending[i]), 0);
++
++	_rtl8180_up(dev);
++	priv->commit = 0;
++}
++
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void rtl8180_restart(struct work_struct *work)
++{
++	struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
++	struct ieee80211_device* ieee = priv->ieee80211;//for commit crash
++	struct net_device *dev = ieee->dev;//for commit crash
++#else
++void rtl8180_restart(struct net_device *dev)
++{
++
++	struct r8180_priv *priv = ieee80211_priv(dev);
++#endif
++
++	down(&priv->wx_sem);
++	
++	rtl8180_commit(dev);
++	
++	up(&priv->wx_sem);
++}
++
++static void r8180_set_multicast(struct net_device *dev)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	short promisc;
++
++	//down(&priv->wx_sem);
++	
++	/* FIXME FIXME */
++	
++	promisc = (dev->flags & IFF_PROMISC) ? 1:0;
++	
++	if (promisc != priv->promisc)
++	//	rtl8180_commit(dev);
++	
++	priv->promisc = promisc;
++	
++	//schedule_work(&priv->reset_wq);
++	//up(&priv->wx_sem);
++}
++
++
++int r8180_set_mac_adr(struct net_device *dev, void *mac)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	struct sockaddr *addr = mac;
++	
++	down(&priv->wx_sem);
++	
++	memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
++		
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++	schedule_work(&priv->reset_wq);
++#else
++	schedule_task(&priv->reset_wq);
++#endif	
++	up(&priv->wx_sem);
++	
++	return 0;
++}
++
++struct ipw_param {
++        u32 cmd;
++        u8 sta_addr[ETH_ALEN];
++        union {
++                struct {
++                        u8 name;
++                        u32 value;
++                } wpa_param;
++                struct {
++                        u32 len;
++                        u8 reserved[32];
++                        u8 data[0];
++                } wpa_ie;
++                struct{
++                        u32 command;
++                        u32 reason_code;
++                } mlme;
++                struct {
++                        u8 alg[16];
++                        u8 set_tx;
++                        u32 err;
++                        u8 idx;
++                        u8 seq[8];
++                        u16 key_len;
++                        u8 key[0];
++                } crypt;
++
++        } u;
++};
++
++
++/* based on ipw2200 driver */
++int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	struct iwreq *wrq = (struct iwreq *)rq;
++	int ret=-1;
++
++#ifdef JOHN_TKIP
++        u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
++
++        struct ieee80211_device *ieee = priv->ieee80211;
++        struct ipw_param *ipw = (struct ipw_param *)wrq->u.data.pointer;
++        u32 key[4];
++
++#endif
++
++#ifdef _RTL8187_EXT_PATCH_
++	if(priv->mshobj && (priv->ieee80211->iw_mode == priv->ieee80211->iw_ext_mode) && priv->mshobj->ext_patch_rtl8180_ioctl)
++	{
++		// DO NOT put the belowing function in critical section, due to it uses "spin lock"
++		if((ret = priv->mshobj->ext_patch_rtl8180_ioctl(dev, rq, cmd)) != -EOPNOTSUPP)
++			return ret;
++	}
++#endif
++
++	down(&priv->wx_sem);
++
++	switch (cmd) {
++	    case RTL_IOCTL_WPA_SUPPLICANT:
++#ifdef JOHN_TKIP
++
++//the following code is specified for ipw driver in wpa_supplicant
++	    if(  ((u32*)wrq->u.data.pointer)[0]==3 ){
++
++							
++		if(    ((u32*)wrq->u.data.pointer)[7] &&		
++                  (    ((u32*)wrq->u.data.pointer)[3]==0x504d4343 ||
++                       ((u32*)wrq->u.data.pointer)[3]==0x50494b54 )) {//50494b54 tkip and 504d4343 ccmp
++
++                        //enable HW security of TKIP and CCMP
++                        write_nic_byte(dev, WPA_CONFIG, SCR_TxSecEnable | SCR_RxSecEnable );
++
++			//copy key from wpa_supplicant ioctl info
++			key[0] = ((u32*)wrq->u.data.pointer)[12];
++			key[1] = ((u32*)wrq->u.data.pointer)[13];
++			key[2] = ((u32*)wrq->u.data.pointer)[14];
++			key[3] = ((u32*)wrq->u.data.pointer)[15];
++			switch (ieee->pairwise_key_type){
++				case KEY_TYPE_TKIP:
++					setKey(	dev, 
++						0,			//EntryNo
++						ipw->u.crypt.idx,	//KeyIndex 
++				     		KEY_TYPE_TKIP,		//KeyType
++  			    			(u8*)ieee->ap_mac_addr,	//MacAddr
++						0,			//DefaultKey
++					      	key);			//KeyContent
++					break;
++
++				case KEY_TYPE_CCMP:
++					setKey(	dev, 
++						0,			//EntryNo
++						ipw->u.crypt.idx,	//KeyIndex 
++				     		KEY_TYPE_CCMP,		//KeyType
++  			    			(u8*)ieee->ap_mac_addr,	//MacAddr
++						0,			//DefaultKey
++					      	key);			//KeyContent
++					break
++;
++				default: 
++					printk("error on key_type: %d\n", ieee->pairwise_key_type); 
++					break;
++			}
++		}
++
++		//group key for broadcast
++ 		if( ((u32*)wrq->u.data.pointer)[9] ) {
++
++			key[0] = ((u32*)wrq->u.data.pointer)[12];
++			key[1] = ((u32*)wrq->u.data.pointer)[13];
++			key[2] = ((u32*)wrq->u.data.pointer)[14];
++			key[3] = ((u32*)wrq->u.data.pointer)[15];
++
++			if( ((u32*)wrq->u.data.pointer)[3]==0x50494b54 ){//50494b54 is the ASCII code of TKIP in reversed order
++				setKey(	dev, 
++					1,		//EntryNo
++					ipw->u.crypt.idx,//KeyIndex 
++			     		KEY_TYPE_TKIP,	//KeyType
++			            	broadcast_addr,	//MacAddr
++					0,		//DefaultKey
++				      	key);		//KeyContent
++			}
++			else if( ((u32*)wrq->u.data.pointer)[3]==0x504d4343 ){//CCMP
++				setKey(	dev, 
++					1,		//EntryNo
++					ipw->u.crypt.idx,//KeyIndex 
++			     		KEY_TYPE_CCMP,	//KeyType
++			            	broadcast_addr,	//MacAddr
++					0,		//DefaultKey
++				      	key);		//KeyContent
++			}
++			else if( ((u32*)wrq->u.data.pointer)[3]==0x656e6f6e ){//none
++				//do nothing
++			}
++			else if( ((u32*)wrq->u.data.pointer)[3]==0x504557 ){//WEP
++                                setKey( dev,
++                                        1,              //EntryNo
++                                        ipw->u.crypt.idx,//KeyIndex 
++                                        KEY_TYPE_WEP40,  //KeyType
++                                        broadcast_addr, //MacAddr
++                                        0,              //DefaultKey
++                                        key);           //KeyContent
++			}	
++			else printk("undefine group key type: %8x\n", ((u32*)wrq->u.data.pointer)[3]);
++	    	}
++
++	    }
++#endif /*JOHN_TKIP*/
++
++
++#ifdef JOHN_HWSEC_DEBUG
++	{
++		int i;
++		//john's test 0711
++		printk("@@ wrq->u pointer = ");
++		for(i=0;i<wrq->u.data.length;i++){
++			if(i%10==0) printk("\n");
++			printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
++		}
++		printk("\n");
++	}
++#endif /*JOHN_HWSEC_DEBUG*/
++		ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
++		break; 
++
++	    default:
++		ret = -EOPNOTSUPP;
++		break;
++	}
++
++	up(&priv->wx_sem);
++	
++	return ret;
++}
++
++
++struct tx_desc {
++
++#ifdef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
++
++
++//dword 0
++unsigned int    tpktsize:12;
++unsigned int    rsvd0:3;
++unsigned int    no_encrypt:1;
++unsigned int    splcp:1;
++unsigned int    morefrag:1;
++unsigned int    ctsen:1;
++unsigned int    rtsrate:4;
++unsigned int    rtsen:1;
++unsigned int    txrate:4;
++unsigned int	last:1;
++unsigned int	first:1;
++unsigned int	dmaok:1;
++unsigned int	own:1;
++
++//dword 1
++unsigned short  rtsdur;
++unsigned short  length:15;
++unsigned short  l_ext:1;
++
++//dword 2
++unsigned int	bufaddr;
++
++
++//dword 3
++unsigned short	rxlen:12;
++unsigned short  rsvd1:3;
++unsigned short  miccal:1;
++unsigned short	dur;
++
++//dword 4
++unsigned int	nextdescaddr;
++
++//dword 5
++unsigned char	rtsagc;
++unsigned char	retrylimit;
++unsigned short	rtdb:1;
++unsigned short	noacm:1;
++unsigned short	pifs:1;
++unsigned short	rsvd2:4;
++unsigned short	rtsratefallback:4;
++unsigned short	ratefallback:5;
++
++//dword 6
++unsigned short	delaybound;
++unsigned short	rsvd3:4;
++unsigned short	agc:8;
++unsigned short	antenna:1;
++unsigned short	spc:2;
++unsigned short	rsvd4:1;
++
++//dword 7
++unsigned char	len_adjust:2;
++unsigned char	rsvd5:1;
++unsigned char	tpcdesen:1;
++unsigned char	tpcpolarity:2;
++unsigned char	tpcen:1;
++unsigned char	pten:1;
++
++unsigned char	bckey:6;
++unsigned char	enbckey:1;
++unsigned char	enpmpd:1;
++unsigned short	fragqsz;
++
++
++#else
++
++#error "please modify tx_desc to your own\n"
++
++#endif
++
++
++} __attribute__((packed));
++
++struct rx_desc_rtl8187b {
++
++#ifdef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
++
++//dword 0
++unsigned int	rxlen:12;
++unsigned int	icv:1;
++unsigned int	crc32:1;
++unsigned int	pwrmgt:1;
++unsigned int	res:1;
++unsigned int	bar:1;
++unsigned int	pam:1;
++unsigned int	mar:1;
++unsigned int	qos:1;
++unsigned int	rxrate:4;
++unsigned int	trsw:1;
++unsigned int	splcp:1;
++unsigned int	fovf:1;
++unsigned int	dmafail:1;
++unsigned int	last:1;
++unsigned int	first:1;
++unsigned int	eor:1;
++unsigned int	own:1;
++
++
++//dword 1
++unsigned int	tsftl;
++
++
++//dword 2
++unsigned int	tsfth;
++
++
++//dword 3
++unsigned char	sq;
++unsigned char	rssi:7;
++unsigned char	antenna:1;
++
++unsigned char	agc;
++unsigned char 	decrypted:1;
++unsigned char	wakeup:1;
++unsigned char	shift:1;
++unsigned char	rsvd0:5;
++
++//dword 4
++unsigned int	num_mcsi:4;
++unsigned int	snr_long2end:6;
++unsigned int	cfo_bias:6;
++
++int	pwdb_g12:8;
++unsigned int	fot:8;
++
++
++
++
++#else
++
++#error "please modify tx_desc to your own\n"
++
++#endif
++
++}__attribute__((packed));
++
++
++
++struct rx_desc_rtl8187 {
++
++#ifdef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
++
++//dword 0
++unsigned int    rxlen:12;
++unsigned int    icv:1;
++unsigned int    crc32:1;
++unsigned int    pwrmgt:1;
++unsigned int    res:1;
++unsigned int    bar:1;
++unsigned int    pam:1;
++unsigned int    mar:1;
++unsigned int    qos:1;
++unsigned int    rxrate:4;
++unsigned int    trsw:1;
++unsigned int    splcp:1;
++unsigned int    fovf:1;
++unsigned int    dmafail:1;
++unsigned int    last:1;
++unsigned int    first:1;
++unsigned int    eor:1;
++unsigned int    own:1;
++
++//dword 1
++unsigned char   sq;
++unsigned char   rssi:7;
++unsigned char   antenna:1;
++
++unsigned char   agc;
++unsigned char   decrypted:1;
++unsigned char   wakeup:1;
++unsigned char   shift:1;
++unsigned char   rsvd0:5;
++
++//dword 2
++unsigned int tsftl;
++
++//dword 3
++unsigned int tsfth;
++
++
++
++#else
++
++#error "please modify tx_desc to your own\n"
++
++#endif
++
++
++}__attribute__((packed));
++
++
++
++union rx_desc {
++
++struct	rx_desc_rtl8187b desc_87b;
++struct	rx_desc_rtl8187	 desc_87;
++
++}__attribute__((packed));
++
++//
++//	Description:
++//	Perform signal smoothing for dynamic mechanism.
++//	This is different with PerformSignalSmoothing8187 in smoothing fomula.
++//	No dramatic adjustion is apply because dynamic mechanism need some degree
++//	of correctness. 
++//	2007.01.23, by shien chang.
++//
++void PerformUndecoratedSignalSmoothing8187(struct net_device *dev, struct ieee80211_rx_stats *stats)
++{
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	bool bCckRate = rtl8180_IsWirelessBMode(rtl8180_rate2rate(stats->rate));
++
++	if(NIC_8187 == priv->card_8187) {
++		if(priv->UndecoratedSmoothedSS >= 0)	{
++			priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 50) + (stats->signalstrength * 11)) / 60;
++		}else{
++			priv->UndecoratedSmoothedSS = stats->signalstrength;
++		}
++	} else {
++		// Determin the current packet is CCK rate, by Bruce, 2007-04-12.
++		priv->bCurCCKPkt = bCckRate;
++
++		// Tesing for SD3 DZ, by Bruce, 2007-04-11.
++		if(priv->UndecoratedSmoothedSS >= 0) {	
++			priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) + (stats->signalstrength * 10)) / 6;
++		}else{
++			priv->UndecoratedSmoothedSS = stats->signalstrength * 10;
++		}
++
++		//
++		// Bacause the AGC parameter is not exactly correct under high power (AGC saturation), we need to record the RSSI value to be
++		// referenced by DoRxHighPower. It is not necessary to record this value when this packet is sent by OFDM rate.
++		// Advised by SD3 DZ, by Bruce, 2007-04-12.
++		// 
++		if(bCckRate){
++			priv->CurCCKRSSI = stats->signal;
++		}else{
++			priv->CurCCKRSSI = 0;
++		}
++	}
++	//printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", stats->signalstrength, priv->UndecoratedSmoothedSS);
++}
++
++#ifdef THOMAS_SKB
++void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
++{
++	int status,len,flen;
++
++#ifdef SW_ANTE_DIVERSITY
++	u8 	Antenna = 0;
++#endif
++	u32 SignalStrength = 0;
++	u32 quality = 0;
++	bool bCckRate = false;
++	char RX_PWDB = 0;
++	long RecvSignalPower=0;
++	struct sk_buff *skb;	
++	struct sk_buff *skb2;//skb for check out of memory
++	union   rx_desc *desc;
++	//struct urb *rx_urb = priv->rxurb_task;
++	struct ieee80211_hdr *hdr;//by amy
++	u16 fc,type;
++	u8 bHwError=0,bCRC=0,bICV=0;
++	long SignalStrengthIndex = 0;
++	struct ieee80211_rx_stats stats = {
++		.signal = 0,
++		.noise = -98,
++		.rate = 0,
++		//.mac_time = jiffies,
++		.freq = IEEE80211_24GHZ_BAND,
++	};
++
++	int *prx_inx=&priv->rx_inx;
++	struct urb *rx_urb=priv->rx_urb[*prx_inx]; //changed by jackson
++	struct net_device *dev = (struct net_device*)rx_urb->context;
++	//DMESG("=====>RX %x ",rx_urb->status);
++
++	skb = priv->pp_rxskb[*prx_inx];
++	status = rx_urb->status;
++	skb2 = dev_alloc_skb(RX_URB_SIZE);
++
++	if (skb2 == NULL){
++		printk(KERN_ALERT "No Skb For RX!/n");
++		//rx_urb->transfer_buffer = skb->data;
++		//priv->pp_rxskb[*prx_inx] = skb;
++	} else {
++
++		if(status == 0)
++		{
++			if(NIC_8187B == priv->card_8187)
++			{
++				stats.nic_type = NIC_8187B;
++				len = rx_urb->actual_length;
++				len -= sizeof (struct rx_desc_rtl8187b);
++				desc = (union rx_desc *)(rx_urb->transfer_buffer + len);
++				flen = desc->desc_87b.rxlen ;
++
++				if( flen <= rx_urb->actual_length){
++#if 1
++#ifdef SW_ANTE_DIVERSITY
++					Antenna = desc->desc_87b.antenna;
++#endif
++					stats.mac_time[0] = desc->desc_87b.tsftl;
++					stats.mac_time[1] = desc->desc_87b.tsfth;
++
++					stats.signal = desc->desc_87b.rssi;
++					//stats.noise = desc->desc_87b.sq;
++					quality = desc->desc_87b.sq;
++					stats.rate = desc->desc_87b.rxrate;
++					bCckRate = rtl8180_IsWirelessBMode(rtl8180_rate2rate(stats.rate));
++
++					if(!bCckRate) { // OFDM rate.
++						if(desc->desc_87b.pwdb_g12 < -106)
++							SignalStrength = 0;
++						else
++							SignalStrength = desc->desc_87b.pwdb_g12 + 106;
++						RX_PWDB = (desc->desc_87b.pwdb_g12)/2 -42;
++					} else { // CCK rate.
++						if(desc->desc_87b.agc> 174)
++							SignalStrength = 0;
++						else
++							SignalStrength = 174 - desc->desc_87b.agc;
++						RX_PWDB = ((desc->desc_87b.agc)/2)*(-1) - 8;
++					}
++
++					//lzm mod 081028 based on windows driver
++					//compensate SignalStrength when switch TR to SW controled
++					if(priv->TrSwitchState == TR_SW_TX) {
++						SignalStrength = SignalStrength + 54;
++						RX_PWDB = RX_PWDB + 27;
++					}
++
++					if(SignalStrength > 100)
++						SignalStrength = 100;
++					SignalStrength = (SignalStrength * 70) / 100 + 30;
++
++					if(SignalStrength > 50)
++						SignalStrength = SignalStrength + 10;
++					if(SignalStrength > 100)
++						SignalStrength = 100;
++
++					RecvSignalPower = RX_PWDB;
++					//printk("SignalStrength = %d \n",SignalStrength);
++					bHwError = (desc->desc_87b.fovf | desc->desc_87b.icv | desc->desc_87b.crc32);
++					bCRC = desc->desc_87b.crc32;
++					bICV = desc->desc_87b.icv;
++					priv->wstats.qual.level = (u8)SignalStrength;
++
++					if(!bCckRate){
++						if (quality > 127)
++							quality = 0;
++						else if (quality <27)
++							quality = 100;
++						else
++							quality = 127 - quality;
++					} else {
++						if(quality > 64)
++							quality = 0;
++						else
++							quality = ((64-quality)*100)/64;
++					}
++
++
++					priv ->wstats.qual.qual = quality;
++					priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
++
++					stats.signalstrength = (u8)SignalStrength;
++					stats.signal = (u8)quality;
++					stats.noise = desc->desc_87b.snr_long2end;
++
++					skb_put(skb,flen-4);
++
++					priv->stats.rxok++;
++					//by amy
++					hdr = (struct ieee80211_hdr *)skb->data;
++					fc = le16_to_cpu(hdr->frame_ctl);
++					type = WLAN_FC_GET_TYPE(fc);
++
++					if((IEEE80211_FTYPE_CTL != type) &&
++					   (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3)) && (!bHwError) && (!bCRC)&& (!bICV))
++					{
++						// Perform signal smoothing for dynamic mechanism on demand.
++						// This is different with PerformSignalSmoothing8187 in smoothing fomula.
++						// No dramatic adjustion is apply because dynamic mechanism need some degree
++						// of correctness. 2007.01.23, by shien chang.
++						PerformUndecoratedSignalSmoothing8187(dev, &stats);
++
++						//Update signal strength and realted into private RxStats for UI query.
++						SignalStrengthIndex = NetgearSignalStrengthTranslate(priv->LastSignalStrengthInPercent,	priv->wstats.qual.level);
++						priv->LastSignalStrengthInPercent = SignalStrengthIndex;
++						priv->SignalStrength = TranslateToDbm8187((u8)SignalStrengthIndex);
++						priv->SignalQuality = (priv->SignalQuality*5+quality+5)/6;
++						priv->RecvSignalPower = (priv->RecvSignalPower * 5 + RecvSignalPower - 1) / 6;
++#ifdef SW_ANTE_DIVERSITY
++						priv->LastRxPktAntenna = Antenna ? 1:0;
++						SwAntennaDiversityRxOk8185(dev, SignalStrength);
++#endif
++					}
++					//by amy
++#endif
++					if(!ieee80211_rx(priv->ieee80211,skb, &stats)) {
++						dev_kfree_skb_any(skb);
++					}
++				}else {
++					priv->stats.rxurberr++;
++					printk("URB Error  flen:%d actual_length:%d\n",  flen , rx_urb->actual_length);
++					dev_kfree_skb_any(skb);
++				}
++			} else {
++				stats.nic_type = NIC_8187;
++				len = rx_urb->actual_length;
++				len -= sizeof (struct rx_desc_rtl8187);
++				desc = (union rx_desc *)(rx_urb->transfer_buffer + len);
++				flen = desc->desc_87.rxlen ;
++
++				if(flen <= rx_urb->actual_length){
++					stats.signal = desc->desc_87.rssi;
++					stats.noise = desc->desc_87.sq;
++					stats.rate = desc->desc_87.rxrate;
++					stats.mac_time[0] = desc->desc_87.tsftl;
++					stats.mac_time[1] = desc->desc_87.tsfth;
++					SignalStrength = (desc->desc_87.agc&0xfe) >> 1;
++					if( ((stats.rate <= 22) && (stats.rate != 12) && (stats.rate != 18)) || (stats.rate == 44) )//need to translate to real rate here
++						bCckRate= TRUE;
++					if (!bCckRate)
++					{
++						if (SignalStrength > 90) SignalStrength = 90;
++						else if (SignalStrength < 25) SignalStrength = 25;
++						SignalStrength = ((90 - SignalStrength)*100)/65;
++					}
++					else
++					{
++						if (SignalStrength >95) SignalStrength = 95;
++						else if (SignalStrength < 30) SignalStrength = 30;
++						SignalStrength = ((95 - SignalStrength)*100)/65;
++					}
++					stats.signalstrength = (u8)SignalStrength;
++
++					skb_put(skb,flen-4);
++
++					priv->stats.rxok++;
++
++					if(!ieee80211_rx(priv->ieee80211,skb, &stats))
++						dev_kfree_skb_any(skb);
++
++
++				}else {
++					priv->stats.rxurberr++;
++					printk("URB Error  flen:%d actual_length:%d\n",  flen , rx_urb->actual_length);
++					dev_kfree_skb_any(skb);
++				} 
++			}
++		}else{
++
++			//printk("RX Status Error!\n");
++			priv->stats.rxstaterr++;
++			priv->ieee80211->stats.rx_errors++;
++			dev_kfree_skb_any(skb);
++
++		}	
++
++		rx_urb->transfer_buffer = skb2->data;
++
++		priv->pp_rxskb[*prx_inx] = skb2;
++	}
++
++	if(status != -ENOENT ){
++		rtl8187_rx_urbsubmit(dev,rx_urb);
++	}  else {
++		priv->pp_rxskb[*prx_inx] = NULL;
++		dev_kfree_skb_any(skb2);
++		//printk("RX process %d aborted due to explicit shutdown (%x)(%d)\n ", *prx_inx, status, status);
++	}
++
++	if (*prx_inx == (MAX_RX_URB -1))
++		*prx_inx = 0;
++	else
++		*prx_inx = *prx_inx + 1;
++}
++#endif
++
++#ifdef THOMAS_TASKLET
++void rtl8180_irq_rx_tasklet_new(struct r8180_priv *priv){
++	unsigned long flags;
++	while( atomic_read( &priv->irt_counter ) ){
++		spin_lock_irqsave(&priv->irq_lock,flags);//added by thomas
++		rtl8180_irq_rx_tasklet(priv);
++		spin_unlock_irqrestore(&priv->irq_lock,flags);//added by thomas
++		if(atomic_read(&priv->irt_counter) >= 1)
++			atomic_dec( &priv->irt_counter );
++	}
++}
++#endif
++/****************************************************************************
++     ---------------------------- USB_STUFF---------------------------
++*****************************************************************************/
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++static int __devinit rtl8187_usb_probe(struct usb_interface *intf,
++			 const struct usb_device_id *id)
++#else
++static void * __devinit rtl8187_usb_probe(struct usb_device *udev,
++			                unsigned int ifnum,
++			          const struct usb_device_id *id)
++#endif
++{
++	struct net_device *dev = NULL;
++	struct r8180_priv *priv= NULL;
++
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	struct usb_device *udev = interface_to_usbdev(intf);
++#endif
++
++	dev = alloc_ieee80211(sizeof(struct r8180_priv));
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)	
++	SET_MODULE_OWNER(dev);
++#endif
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	usb_set_intfdata(intf, dev);	
++	SET_NETDEV_DEV(dev, &intf->dev);
++#endif
++	priv = ieee80211_priv(dev);
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	priv->ieee80211 = netdev_priv(dev);
++#else
++	priv->ieee80211 = (struct net_device *)dev->priv;
++#endif
++	priv->udev=udev;
++#ifdef CPU_64BIT	
++	priv->usb_buf = kmalloc(0x200, GFP_KERNEL);
++	priv->usb_pool = dma_pool_create("rtl8187b", NULL, 64, 64, 0);
++#endif
++//lzm add for write time out test
++#ifdef DEBUG_RW_REGISTER
++	{
++		int reg_index = 0;
++		for(reg_index = 0; reg_index <= 199; reg_index++)
++		{
++			priv->write_read_registers[reg_index].address = 0;
++			priv->write_read_registers[reg_index].content = 0;
++			priv->write_read_registers[reg_index].flag = 0;
++		}
++		priv->write_read_register_index = 0;
++	}
++#endif
++
++	dev->open = rtl8180_open;
++	dev->stop = rtl8180_close;
++	dev->tx_timeout = tx_timeout;
++	dev->wireless_handlers = &r8180_wx_handlers_def;
++	dev->do_ioctl = rtl8180_ioctl;
++	dev->set_multicast_list = r8180_set_multicast;
++	dev->set_mac_address = r8180_set_mac_adr;
++#if WIRELESS_EXT >= 12
++#if WIRELESS_EXT < 17
++	dev->get_wireless_stats = r8180_get_wireless_stats;
++#endif
++	dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def;
++#endif
++	
++	dev->type=ARPHRD_ETHER;
++	dev->watchdog_timeo = HZ*3;	//modified by john, 0805
++
++	if (dev_alloc_name(dev, ifname) < 0){
++                DMESG("Oops: devname already taken! Trying wlan%%d...\n");
++		ifname = "wlan%d";
++		dev_alloc_name(dev, ifname);
++        }
++	
++	if(rtl8180_init(dev)!=0){ 
++		DMESG("Initialization failed");
++		goto fail;
++	}
++	
++	netif_carrier_off(dev);
++	netif_stop_queue(dev);
++	
++	register_netdev(dev);
++	
++	rtl8180_proc_init_one(dev);
++	
++//by lizhaoming for Radio power on/off
++#ifdef POLLING_METHOD_FOR_RADIO
++	if(priv->polling_timer_on == 0){//add for S3/S4
++		gpio_change_polling((unsigned long)dev);
++	}
++#endif
++	
++	DMESG("Driver probe completed");
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
++	return dev;
++#else
++	return 0;	
++#endif
++
++	
++fail:
++	free_ieee80211(dev);
++		
++	DMESG("wlan driver load failed\n");
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)	
++	return NULL;
++#else
++	return -ENODEV;
++#endif
++	
++}
++
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 
++static void __devexit rtl8187_usb_disconnect(struct usb_interface *intf)
++#else 
++static void __devexit rtl8187_usb_disconnect(struct usb_device *udev, void *ptr)
++#endif
++{
++	struct r8180_priv *priv = NULL;
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
++	struct net_device *dev = usb_get_intfdata(intf);
++#else
++	struct net_device *dev = (struct net_device *)ptr;
++#endif
++ 	if(dev){
++		unregister_netdev(dev);
++		
++		priv=ieee80211_priv(dev);
++		
++//add for RF power on power off by lizhaoming 080512
++#ifdef POLLING_METHOD_FOR_RADIO
++		del_timer_sync(&priv->gpio_polling_timer);
++		cancel_delayed_work(&priv->ieee80211->GPIOChangeRFWorkItem);
++		priv->polling_timer_on = 0;//add for S3/S4
++#endif
++		MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
++
++#ifdef _RTL8187_EXT_PATCH_
++		if(priv && priv->mshobj)
++		{
++			if(priv->mshobj->ext_patch_remove_proc)
++				priv->mshobj->ext_patch_remove_proc(priv);
++			priv->ieee80211->ext_patch_ieee80211_start_protocol = 0;
++			priv->ieee80211->ext_patch_ieee80211_stop_protocol = 0;
++			priv->ieee80211->ext_patch_ieee80211_probe_req_1 = 0;
++			priv->ieee80211->ext_patch_ieee80211_probe_req_2 = 0;
++			priv->ieee80211->ext_patch_ieee80211_association_req_1 = 0;
++			priv->ieee80211->ext_patch_ieee80211_association_req_2 = 0;
++			priv->ieee80211->ext_patch_ieee80211_assoc_resp_by_net_1 = 0;
++			priv->ieee80211->ext_patch_ieee80211_assoc_resp_by_net_2 = 0;
++			priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_auth =0;
++			priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_deauth =0;
++			priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_assoc_req = 0;
++			priv->ieee80211->ext_patch_ieee80211_rx_frame_softmac_on_assoc_rsp = 0;
++			priv->ieee80211->ext_patch_ieee80211_ext_stop_scan_wq_set_channel = 0;
++			priv->ieee80211->ext_patch_ieee80211_process_probe_response_1 = 0;
++			priv->ieee80211->ext_patch_ieee80211_rx_mgt_on_probe_req = 0;
++			priv->ieee80211->ext_patch_ieee80211_rx_mgt_update_expire = 0;
++			priv->ieee80211->ext_patch_ieee80211_rx_on_rx = 0;
++			priv->ieee80211->ext_patch_get_beacon_get_probersp = 0;
++			priv->ieee80211->ext_patch_ieee80211_xmit = 0;
++			priv->ieee80211->ext_patch_ieee80211_rx_frame_get_hdrlen = 0;
++			priv->ieee80211->ext_patch_ieee80211_rx_is_valid_framectl = 0;
++			priv->ieee80211->ext_patch_ieee80211_rx_process_dataframe = 0;
++			// priv->ieee80211->ext_patch_is_duplicate_packet = 0;
++			priv->ieee80211->ext_patch_ieee80211_softmac_xmit_get_rate = 0;
++			free_mshobj(&priv->mshobj);
++		}
++#endif // _RTL8187_EXT_PATCH_
++
++		rtl8180_proc_remove_one(dev);
++		
++		rtl8180_down(dev);
++		priv->rf_close(dev);
++
++		//rtl8180_rtx_disable(dev);
++		rtl8187_usb_deleteendpoints(dev);
++#ifdef LED
++		DeInitSwLeds(dev);
++#endif
++		rtl8180_irq_disable(dev);
++		rtl8180_reset(dev);
++		mdelay(10);
++
++	}
++
++#ifdef CPU_64BIT	
++	if(priv->usb_buf)
++		kfree(priv->usb_buf);
++	if(priv->usb_pool) {
++		dma_pool_destroy(priv->usb_pool);
++		priv->usb_pool = NULL;
++	}
++#endif
++	free_ieee80211(dev);
++	DMESG("wlan driver removed");
++}
++
++
++static int __init rtl8187_usb_module_init(void)
++{
++	printk("\nLinux kernel driver for RTL8187/RTL8187B based WLAN cards\n");
++	printk("Copyright (c) 2004-2008, Realsil Wlan\n");
++	DMESG("Initializing module");
++	DMESG("Wireless extensions version %d", WIRELESS_EXT);
++	rtl8180_proc_module_init();
++	return usb_register(&rtl8187_usb_driver);
++}
++
++
++static void __exit rtl8187_usb_module_exit(void)
++{
++	usb_deregister(&rtl8187_usb_driver);
++
++	rtl8180_proc_module_remove();
++	DMESG("Exiting\n");
++}
++
++
++void rtl8180_try_wake_queue(struct net_device *dev, int pri)
++{
++	unsigned long flags;
++	short enough_desc;
++	struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
++	
++	spin_lock_irqsave(&priv->tx_lock,flags);
++	enough_desc = check_nic_enought_desc(dev,pri);
++        spin_unlock_irqrestore(&priv->tx_lock,flags);	
++	
++	if(enough_desc)
++		ieee80211_wake_queue(priv->ieee80211);
++}
++
++#ifdef JOHN_HWSEC
++void EnableHWSecurityConfig8187(struct net_device *dev)
++{
++        u8 SECR_value = 0x0;
++	SECR_value = SCR_TxSecEnable | SCR_RxSecEnable;
++        {
++                write_nic_byte(dev, WPA_CONFIG,  0x7);//SECR_value |  SCR_UseDK ); 
++        }
++}
++
++void setKey(struct net_device *dev, 
++		u8 EntryNo,
++		u8 KeyIndex, 
++		u16 KeyType, 
++		u8 *MacAddr, 
++		u8 DefaultKey, 
++		u32 *KeyContent )
++{
++	u32 TargetCommand = 0;
++	u32 TargetContent = 0;
++	u16 usConfig = 0;
++	int i;
++	usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
++
++
++	for(i=0 ; i<6 ; i++){
++		TargetCommand  = i+6*EntryNo;
++		TargetCommand |= BIT31|BIT16;
++
++		if(i==0){//MAC|Config
++			TargetContent = (u32)(*(MacAddr+0)) << 16|
++						   (u32)(*(MacAddr+1)) << 24|
++						   (u32)usConfig;
++
++			write_nic_dword(dev, WCAMI, TargetContent); 
++			write_nic_dword(dev, RWCAM, TargetCommand);
++			//printk("setkey cam =%8x\n", read_cam(dev, i+6*EntryNo));
++		} else if(i==1){//MAC
++                        TargetContent = (u32)(*(MacAddr+2)) 	 |
++                                        	   (u32)(*(MacAddr+3)) <<  8|
++                                        	   (u32)(*(MacAddr+4)) << 16|
++                                        	   (u32)(*(MacAddr+5)) << 24;
++			write_nic_dword(dev, WCAMI, TargetContent); 
++			write_nic_dword(dev, RWCAM, TargetCommand);
++		} else {	//Key Material
++			write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) ); 
++			write_nic_dword(dev, RWCAM, TargetCommand);
++		}
++	}
++
++}
++#endif
++
++/****************************************************************************
++            --------------------------- RF power on/power off -----------------
++*****************************************************************************/
++
++#ifdef POLLING_METHOD_FOR_RADIO
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
++void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
++{
++	//struct delayed_work *dwork = container_of(work, struct delayed_work, work);
++	struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
++	struct net_device *dev = ieee->dev;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++#else
++void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee)
++{
++	struct net_device *dev = ieee->dev;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++#endif
++
++	//u16 tmp2byte;
++	u8 tmp1byte;
++	//u8 btPSR;
++	//u8 btConfig0;
++	RT_RF_POWER_STATE	eRfPowerStateToSet;
++	bool 	bActuallySet=false;
++
++	char *argv[3];
++        static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
++        static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
++
++#if 0	
++	if(priv->up == 0)//driver stopped
++		{
++			printk("\nDo nothing...");
++			goto out;
++		}
++	else
++#endif
++		{
++			// We should turn off LED before polling FF51[4].
++			
++			//Turn off LED.
++			//btPSR = read_nic_byte(dev, PSR);
++			//write_nic_byte(dev, PSR, (btPSR & ~BIT3));	
++
++			//It need to delay 4us suggested by Jong, 2008-01-16
++			//udelay(4);
++
++			//HW radio On/Off according to the value of FF51[4](config0)
++			//btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
++
++			//Turn on LED.
++			//write_nic_byte(dev, PSR, btPSR| BIT3);
++					
++			//eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
++			
++			// Get RF power state to set.
++			//if Driver isn't stopped, we poll GPIO1
++
++			//set 0x91 B1= 0	// 1: for output enable; 0: otherwise.
++			// (William says) Note that, it will cause unstable if we set output enable 1 but not to write it. Annie, 2005-12-12.
++			tmp1byte = read_nic_byte(dev,GPE);			
++			if(priv->EEPROMSelectNewGPIO == true)
++				tmp1byte &= ~BIT2;//for toshiba new GPIO use bit2
++			else
++				tmp1byte &= ~BIT1;
++
++			write_nic_byte(dev,GPE,tmp1byte);
++
++			//read  0x92 B1(read GPIO1)
++			tmp1byte = read_nic_byte(dev,GPI);
++
++			//turn on or trun off RF according to the value of GPIO1 	
++			if(priv->EEPROMSelectNewGPIO == true)
++				eRfPowerStateToSet = (tmp1byte&BIT2) ?  eRfOn : eRfOff;
++			else
++				eRfPowerStateToSet = (tmp1byte&BIT1) ?  eRfOn : eRfOff;			
++
++			if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn)){
++				priv->ieee80211->bHwRadioOff = false;
++				bActuallySet = true;
++			}else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff)){
++				priv->ieee80211->bHwRadioOff = true;
++				bActuallySet = true;
++			}
++			
++			//if(priv->wlan_first_up_flag1 == 0){
++			//	bActuallySet = true;
++			//	priv->wlan_first_up_flag1 = 1;
++			//}			
++
++			if(bActuallySet)
++			{
++				//printk("GPIO1:%x,eRfPowerStateToSet: %x, bHwRadioOff:%x\n",
++				//	  tmp1byte,eRfPowerStateToSet,priv->ieee80211->bHwRadioOff);
++
++				//GPIO Polling Methord Made Radio On/Off
++				DMESG("GPIO Polling Methord Will Turn Radio %s", 
++				      (priv->ieee80211->bHwRadioOff == true) ? "Off" : "On");
++
++#ifdef LED //by lizhaoming
++				if(priv->ieee80211->bHwRadioOff == true){
++					priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_POWER_OFF); 
++				}else{
++					if(priv->up == 1){
++						priv->ieee80211->ieee80211_led_contorl(dev,LED_CTL_POWER_ON); 
++					}
++				}
++#endif
++
++				MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
++
++				/* To update the UI status for Power status changed */
++                                if(priv->ieee80211->bHwRadioOff == true)
++                                        argv[1] = "RFOFF";
++                                else{
++					//if(priv->eInactivePowerState != eRfOff)
++						argv[1] = "RFON";
++					//else
++					//	argv[1] = "RFOFF";
++                                }
++                                argv[0] = RadioPowerPath;
++                                argv[2] = NULL;
++
++                                call_usermodehelper(RadioPowerPath,argv,envp,1);
++			}
++			
++		}
++}
++void gpio_change_polling(unsigned long data)
++{
++	struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
++	//struct net_device* dev = (struct net_device*)data;
++
++	priv->polling_timer_on = 1;//add for S3/S4
++
++	if(priv->driver_upping == 0){
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++		queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,0);
++#else
++		queue_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem);
++#endif
++	}
++
++	mod_timer(&priv->gpio_polling_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
++}
++#endif
++
++/***************************************************************************
++     ------------------- module init / exit stubs ----------------
++****************************************************************************/
++module_init(rtl8187_usb_module_init);
++module_exit(rtl8187_usb_module_exit);
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8187.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8187.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,816 @@
++/* 
++   This is part of rtl8187 OpenSource driver.
++   Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it> 
++   Released under the terms of GPL (General Public Licence)
++   
++   Parts of this driver are based on the GPL part of the 
++   official realtek driver
++   
++   Parts of this driver are based on the rtl8180 driver skeleton 
++   from Patric Schenke & Andres Salomon
++   
++   Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
++   
++   We want to tanks the Authors of those projects and the Ndiswrapper 
++   project Authors.
++*/
++
++#ifndef R8180H
++#define R8180H
++
++
++#define RTL8187_MODULE_NAME "rtl8187"
++#define DMESG(x,a...) printk(KERN_INFO RTL8187_MODULE_NAME ": " x "\n", ## a)
++#define DMESGW(x,a...) printk(KERN_WARNING RTL8187_MODULE_NAME ": WW:" x "\n", ## a)
++#define DMESGE(x,a...) printk(KERN_WARNING RTL8187_MODULE_NAME ": EE:" x "\n", ## a)
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++//#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/ioport.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++#include <linux/slab.h>
++#include <linux/netdevice.h>
++//#include <linux/pci.h>
++#include <linux/usb.h>
++#include <linux/etherdevice.h>
++#include <linux/delay.h>
++#include <linux/rtnetlink.h>	//for rtnl_lock()
++#include <linux/wireless.h>
++#include <linux/timer.h>
++#include <linux/proc_fs.h>	// Necessary because we use the proc fs
++#include <linux/if_arp.h>
++#include <linux/random.h>
++#include <linux/version.h>
++#include <asm/io.h>
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
++#include <asm/semaphore.h>
++#endif
++#include "ieee80211.h"
++#ifdef _RTL8187_EXT_PATCH_
++#include "msh_class.h"
++#endif
++#ifdef LED
++#include "r8187_led.h"
++#endif
++
++//added for HW security, john.0629
++#define FALSE 0
++#define TRUE 1
++#define MAX_KEY_LEN     61
++#define KEY_BUF_SIZE    5
++
++#define BIT0    0x00000001
++#define BIT1    0x00000002
++#define BIT2    0x00000004
++#define BIT3    0x00000008
++#define BIT4    0x00000010
++#define BIT5    0x00000020
++#define BIT6    0x00000040
++#define BIT7    0x00000080
++#define BIT8    0x00000100
++#define BIT9    0x00000200
++#define BIT10   0x00000400
++#define BIT11   0x00000800
++#define BIT12   0x00001000
++#define BIT13   0x00002000
++#define BIT14   0x00004000
++#define BIT15   0x00008000
++#define BIT16   0x00010000
++#define BIT17   0x00020000
++#define BIT18   0x00040000
++#define BIT19   0x00080000
++#define BIT20   0x00100000
++#define BIT21   0x00200000
++#define BIT22   0x00400000
++#define BIT23   0x00800000
++#define BIT24   0x01000000
++#define BIT25   0x02000000
++#define BIT26   0x04000000
++#define BIT27   0x08000000
++#define BIT28   0x10000000
++#define BIT29   0x20000000
++#define BIT30   0x40000000
++#define BIT31   0x80000000
++
++//8187B Security
++#define RWCAM                   0xA0                    // Software read/write CAM config
++#define WCAMI                   0xA4                    // Software write CAM input content
++#define RCAMO                   0xA8                    // Output value from CAM according to 0xa0 setting
++#define DCAM                    0xAC                    // Debug CAM Interface
++#define SECR                    0xB0                    // Security configuration register
++#define AESMSK_FC               0xB2    		// AES Mask register for frame control (0xB2~0xB3). Added by Annie, 2006-03-06.
++#define AESMSK_SC               0x1FC   		// AES Mask for Sequence Control (0x1FC~0X1FD). Added by Annie, 2006-03-06.
++#define AESMSK_QC               0x1CE                   // AES Mask register for QoS Control when computing AES MIC, default = 0x000F. (2 bytes)
++
++#define AESMSK_FC_DEFAULT                       0xC78F  // default value of AES MASK for Frame Control Field. (2 bytes)
++#define AESMSK_SC_DEFAULT                       0x000F  // default value of AES MASK for Sequence Control Field. (2 bytes)
++#define AESMSK_QC_DEFAULT                       0x000F  // default value of AES MASK for QoS Control Field. (2 bytes)
++
++#define CAM_CONTENT_COUNT       6
++#define CFG_DEFAULT_KEY         BIT5
++#define CFG_VALID               BIT15
++
++//----------------------------------------------------------------------------
++//       8187B WPA Config Register (offset 0xb0, 1 byte)
++//----------------------------------------------------------------------------
++#define SCR_UseDK                       0x01
++#define SCR_TxSecEnable                 0x02
++#define SCR_RxSecEnable                 0x04
++
++//----------------------------------------------------------------------------
++//       8187B CAM Config Setting (offset 0xb0, 1 byte)
++//----------------------------------------------------------------------------
++#define CAM_VALID                               0x8000
++#define CAM_NOTVALID                    0x0000
++#define CAM_USEDK                               0x0020
++
++
++#define CAM_NONE                                0x0
++#define CAM_WEP40                               0x01
++#define CAM_TKIP                                0x02
++#define CAM_AES                                 0x04
++#define CAM_WEP104                              0x05
++
++
++//#define CAM_SIZE                              16
++#define TOTAL_CAM_ENTRY         16
++#define CAM_ENTRY_LEN_IN_DW     6                                                                       // 6, unit: in u4byte. Added by Annie, 2006-05-25.
++#define CAM_ENTRY_LEN_IN_BYTE   (CAM_ENTRY_LEN_IN_DW*sizeof(u4Byte))    // 24, unit: in u1byte. Added by Annie, 2006-05-25.
++
++#define CAM_CONFIG_USEDK                1
++#define CAM_CONFIG_NO_USEDK             0
++
++#define CAM_WRITE                               0x00010000
++#define CAM_READ                                0x00000000
++#define CAM_POLLINIG                    0x80000000
++
++//=================================================================
++//=================================================================
++
++#define EPROM_93c46 0
++#define EPROM_93c56 1
++
++#define DEFAULT_FRAG_THRESHOLD 2342U
++#define MIN_FRAG_THRESHOLD     256U
++#define DEFAULT_BEACONINTERVAL 0x64U
++#define DEFAULT_BEACON_ESSID "Rtl8187"
++
++#define DEFAULT_SSID ""
++#define DEFAULT_RETRY_RTS 7
++#define DEFAULT_RETRY_DATA 7
++#define PRISM_HDR_SIZE 64
++
++typedef enum _WIRELESS_MODE {
++	WIRELESS_MODE_UNKNOWN = 0x00,
++	WIRELESS_MODE_A = 0x01,
++	WIRELESS_MODE_B = 0x02,
++	WIRELESS_MODE_G = 0x04,
++	WIRELESS_MODE_AUTO = 0x08,
++} WIRELESS_MODE;
++
++typedef enum _TR_SWITCH_STATE{
++	TR_HW_CONTROLLED = 0,
++	TR_SW_TX = 1,
++}TR_SWITCH_STATE, *PTR_SWITCH_STATE;
++
++
++#define RTL_IOCTL_WPA_SUPPLICANT		SIOCIWFIRSTPRIV+30
++
++typedef struct buffer
++{
++	struct buffer *next;
++	u32 *buf;
++	
++} buffer;
++
++typedef struct rtl_reg_debug{
++        unsigned int  cmd;
++        struct {
++                unsigned char type;
++                unsigned char addr;
++                unsigned char page;
++                unsigned char length;
++        } head;
++        unsigned char buf[0xff];
++}rtl_reg_debug;
++typedef struct _CHANNEL_LIST{
++	u8	Channel[MAX_CHANNEL_NUMBER + 1];
++	u8	Len;
++}CHANNEL_LIST, *PCHANNEL_LIST;
++
++#define MAX_LD_SLOT_NUM 					10
++#define DEFAULT_SLOT_NUM					2
++#define KEEP_ALIVE_INTERVAL 				20 // in seconds. 
++#define CHECK_FOR_HANG_PERIOD			2 //be equal to watchdog check time
++#define DEFAULT_KEEP_ALIVE_LEVEL			1
++
++typedef struct _link_detect_t
++{
++	u32				RxFrameNum[MAX_LD_SLOT_NUM];	// number of Rx Frame / CheckForHang_period  to determine link status
++	u16				SlotNum;	// number of CheckForHang period to determine link status, default is 2
++	u16				SlotIndex;
++
++	u32				NumTxOkInPeriod;  //number of packet transmitted during CheckForHang
++	u32				NumRxOkInPeriod;  //number of packet received during CheckForHang
++
++	u8				IdleCount;     // (KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)
++	u32				LastNumTxUnicast;
++	u32				LastNumRxUnicast;
++		
++	bool				bBusyTraffic;    //when it is set to 1, UI cann't scan at will.
++}link_detect_t, *plink_detect_t;
++
++#if 0
++
++typedef struct tx_pendingbuf
++{
++	struct ieee80211_txb *txb;
++	short ispending;
++	short descfrag;
++} tx_pendigbuf;
++
++#endif
++
++typedef struct Stats
++{
++	unsigned long txrdu;
++//	unsigned long rxrdu;
++	//unsigned long rxnolast;
++	//unsigned long rxnodata;
++//	unsigned long rxreset;
++//	unsigned long rxwrkaround;
++//	unsigned long rxnopointer;
++	unsigned long rxok;
++	unsigned long rxurberr;
++	unsigned long rxstaterr;
++	unsigned long txnperr;
++	unsigned long txnpdrop;
++	unsigned long txresumed;
++//	unsigned long rxerr;
++//	unsigned long rxoverflow;
++//	unsigned long rxint;
++	unsigned long txnpokint;
++//	unsigned long txhpokint;
++//	unsigned long txhperr;
++//	unsigned long ints;
++//	unsigned long shints;
++	unsigned long txoverflow;
++//	unsigned long rxdmafail;
++//	unsigned long txbeacon;
++//	unsigned long txbeaconerr;
++	unsigned long txlpokint;
++	unsigned long txlpdrop;
++	unsigned long txlperr;
++	unsigned long txbeokint;
++	unsigned long txbedrop;
++	unsigned long txbeerr;
++	unsigned long txbkokint;
++	unsigned long txbkdrop;
++	unsigned long txbkerr;
++	unsigned long txviokint;
++	unsigned long txvidrop;
++	unsigned long txvierr;
++	unsigned long txvookint;
++	unsigned long txvodrop;
++	unsigned long txvoerr;
++	unsigned long txbeaconokint;
++	unsigned long txbeacondrop;
++	unsigned long txbeaconerr;
++	unsigned long txmanageokint;
++	unsigned long txmanagedrop;
++	unsigned long txmanageerr;
++	unsigned long txdatapkt;
++} Stats;
++
++typedef struct 	ChnlAccessSetting {
++	u16 SIFS_Timer;
++	u16 DIFS_Timer; 
++	u16 SlotTimeTimer;
++	u16 EIFS_Timer;
++	u16 CWminIndex;
++	u16 CWmaxIndex;
++}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;
++
++
++typedef	enum _RT_RF_POWER_STATE
++{
++	eRfOn,
++	eRfSleep,
++	eRfOff
++}RT_RF_POWER_STATE;
++typedef	enum _RT_PS_MODE	
++{
++	eActive,	// Active/Continuous access.
++	eMaxPs,		// Max power save mode.
++	eFastPs		// Fast power save mode.
++}RT_PS_MODE;
++//
++// Three wire mode.
++//
++#define IC_DEFAULT_THREE_WIRE	 0
++#define SW_THREE_WIRE			 1
++//RTL818xB
++#define SW_THREE_WIRE_BY_8051	 2
++#define HW_THREE_WIRE			 3
++#define HW_THREE_WIRE_BY_8051 4
++//lzm add for write time out test
++typedef struct write_read_register
++{
++	u32 address;
++	u32 content;
++	u32  flag;
++} write_read_register;
++//lzm add for write time out test
++typedef struct r8180_priv
++{
++//lzm add for write time out test
++	struct write_read_register write_read_registers[200];
++	u8 write_read_register_index;
++//lzm add for write time out test
++
++	struct usb_device *udev;
++	short epromtype;
++	int irq;
++	struct ieee80211_device *ieee80211;
++	
++	short card_8187; /* O: rtl8180, 1:rtl8185 V B/C, 2:rtl8185 V D */
++	short card_8187_Bversion; /* if TCR reports card V B/C this discriminates */
++	short phy_ver; /* meaningful for rtl8225 1:A 2:B 3:C */
++	short enable_gpio0;
++	enum card_type {PCI,MINIPCI,CARDBUS,USB/*rtl8187*/}card_type;
++	short hw_plcp_len;
++	short plcp_preamble_mode;
++		
++	spinlock_t irq_lock;
++//	spinlock_t irq_th_lock;
++	spinlock_t tx_lock;
++//by amy for ps
++	spinlock_t rf_ps_lock;
++//by amy for ps
++	
++	u16 irq_mask;
++//	short irq_enabled;
++	struct net_device *dev;
++	short chan;
++	short sens;
++	short max_sens;
++	u8 chtxpwr[15]; //channels from 1 to 14, 0 not used
++	u8 chtxpwr_ofdm[15]; //channels from 1 to 14, 0 not used
++	u8 cck_txpwr_base;
++	u8 ofdm_txpwr_base;
++	u8 challow[15]; //channels from 1 to 14, 0 not used
++	short up;
++	short crcmon; //if 1 allow bad crc frame reception in monitor mode
++//	short prism_hdr;
++	
++//	struct timer_list scan_timer;
++	/*short scanpending;
++	short stopscan;*/
++//	spinlock_t scan_lock;
++//	u8 active_probe;
++	//u8 active_scan_num;
++	struct semaphore wx_sem;
++	struct semaphore set_chan_sem;
++//	short hw_wep;
++		
++//	short digphy;
++//	short antb;
++//	short diversity;
++//	u8 cs_treshold;
++//	short rcr_csense;
++	short rf_chip;
++//	u32 key0[4];
++	short (*rf_set_sens)(struct net_device *dev,short sens);
++	void (*rf_set_chan)(struct net_device *dev,short ch);
++	void (*rf_close)(struct net_device *dev);
++	void (*rf_init)(struct net_device *dev);
++	//short rate;
++	short promisc;	
++	/*stats*/
++	struct Stats stats;
++	struct _link_detect_t link_detect;  //added on 1016.2008
++	struct iw_statistics wstats;
++	struct proc_dir_entry *dir_dev;
++	
++	/*RX stuff*/
++//	u32 *rxring;
++//	u32 *rxringtail;
++//	dma_addr_t rxringdma;
++	struct urb **rx_urb;
++#ifdef THOMAS_BEACON
++	unsigned long *oldaddr; //lzm for 64bit CPU crash
++#endif
++
++#ifdef THOMAS_TASKLET
++	atomic_t irt_counter;//count for irq_rx_tasklet
++#endif
++#ifdef JACKSON_NEW_RX
++        struct sk_buff **pp_rxskb;
++        int     rx_inx;
++#endif
++
++	short  tx_urb_index;
++	
++	//struct buffer *rxbuffer;
++	//struct buffer *rxbufferhead;
++	//int rxringcount;
++	//u16 rxbuffersize;
++	
++	//struct sk_buff *rx_skb; 
++
++	//short rx_skb_complete;
++
++	//u32 rx_prevlen;
++	//atomic_t tx_lp_pending;
++	//atomic_t tx_np_pending;
++	atomic_t tx_pending[0x10];//UART_PRIORITY+1
++
++#if 0	
++	/*TX stuff*/
++	u32 *txlpring;
++	u32 *txhpring;
++	u32 *txnpring;
++	dma_addr_t txlpringdma;
++	dma_addr_t txhpringdma;
++	dma_addr_t txnpringdma;
++	u32 *txlpringtail;
++	u32 *txhpringtail;
++	u32 *txnpringtail;
++	u32 *txlpringhead;
++	u32 *txhpringhead;
++	u32 *txnpringhead;
++	struct buffer *txlpbufs;
++	struct buffer *txhpbufs;
++	struct buffer *txnpbufs;
++	struct buffer *txlpbufstail;
++	struct buffer *txhpbufstail;
++	struct buffer *txnpbufstail;
++	int txringcount;
++	int txbuffsize;
++
++	//struct tx_pendingbuf txnp_pending;
++	struct tasklet_struct irq_tx_tasklet;
++#endif
++	struct tasklet_struct irq_rx_tasklet;
++	struct urb *rxurb_task;
++//	u8 dma_poll_mask;
++	//short tx_suspend;
++	
++	/* adhoc/master mode stuff */
++#if 0
++	u32 *txbeacontail;
++	dma_addr_t txbeaconringdma;
++	u32 *txbeaconring;
++	int txbeaconcount;
++#endif
++//	struct ieee_tx_beacon *beacon_buf;
++	//char *master_essid;
++//	dma_addr_t beacondmabuf;
++	//u16 master_beaconinterval;
++//	u32 master_beaconsize;
++	//u16 beacon_interval;
++
++	//2 Tx Related variables
++	u16	ShortRetryLimit;
++	u16	LongRetryLimit;
++	u32	TransmitConfig;
++	u8	RegCWinMin;		// For turbo mode CW adaptive. Added by Annie, 2005-10-27.
++
++	//2 Rx Related variables
++	u16	EarlyRxThreshold;
++	u32	ReceiveConfig;
++	u8	AcmControl;
++
++	u8	RFProgType;
++	
++	u8 retry_data;
++	u8 retry_rts;
++	u16 rts;
++
++//by amy
++        long            LastSignalStrengthInPercent;
++        long            SignalStrength;
++        long                SignalQuality;
++        u8                      antenna_flag;
++        bool                    flag_beacon;
++//by amy
++//by amy for rate adaptive
++    struct timer_list rateadapter_timer;
++    u16                                 LastRetryCnt;
++        u16                                     LastRetryRate;
++        unsigned long           LastTxokCnt;
++        unsigned long           LastRxokCnt;
++        u16                                     CurrRetryCnt;
++        long                            RecvSignalPower;
++        unsigned long           LastTxOKBytes;
++        u8                                      LastFailTxRate;
++        long                            LastFailTxRateSS;
++        u8                                      FailTxRateCount;
++        u32                             LastTxThroughput;
++        unsigned long txokbytestotal;
++        //for up rate
++        unsigned short          bTryuping;
++        u8                                      CurrTxRate;     //the rate before up
++        u16                                     CurrRetryRate;
++        u16                                     TryupingCount;
++        u8                                      TryDownCountLowData;
++        u8                                      TryupingCountNoData;
++
++        u8                  CurrentOperaRate;
++// by lizhaoming used for Radio on/off
++#ifdef POLLING_METHOD_FOR_RADIO
++	struct timer_list gpio_polling_timer;
++	u8 polling_timer_on;
++	u8 wlan_first_up_flag1;
++#endif
++//by amy for rate adaptive
++//by amy for power save
++	struct timer_list watch_dog_timer;
++	bool bInactivePs;
++	bool bSwRfProcessing;
++	RT_RF_POWER_STATE	eInactivePowerState;
++	RT_RF_POWER_STATE eRFPowerState;
++	u32 RfOffReason;
++	bool RFChangeInProgress;
++	bool bInHctTest;
++	bool SetRFPowerStateInProgress;
++	//u8   RFProgType;
++	bool bLeisurePs;
++	RT_PS_MODE dot11PowerSaveMode;
++	u32 NumRxOkInPeriod;
++	u32 NumTxOkInPeriod;
++	u8 RegThreeWireMode;
++	bool ps_mode;
++//by amy for power save
++//by amy for DIG
++	bool bDigMechanism;
++	bool bCCKThMechanism;
++	u8   InitialGain;
++	u8   StageCCKTh;
++	u8   RegBModeGainStage;
++	u8   RegDigOfdmFaUpTh;	 //added by david, 2008.3.6
++	u8   DIG_NumberFallbackVote;
++	u8   DIG_NumberUpgradeVote;
++	u16  CCKUpperTh;
++	u16  CCKLowerTh;
++	u32  FalseAlarmRegValue; //added by david, 2008.3.6	
++//by amy for DIG
++//{ added by david for high power, 2008.3.11
++	int  UndecoratedSmoothedSS;
++	bool bRegHighPowerMechanism;
++	bool bToUpdateTxPwr;
++	u8   Z2HiPwrUpperTh;
++	u8   Z2HiPwrLowerTh;
++	u8   Z2RSSIHiPwrUpperTh;
++	u8   Z2RSSIHiPwrLowerTh;
++	// Current CCK RSSI value to determine CCK high power, asked by SD3 DZ, by Bruce, 2007-04-12.
++	u8   CurCCKRSSI;
++	bool bCurCCKPkt;
++	u32  wMacRegRfPinsOutput;
++	u32  wMacRegRfPinsSelect;
++	TR_SWITCH_STATE TrSwitchState;
++//}
++//{added by david for radio on/off
++	u8			radion;
++//}
++	struct 	ChnlAccessSetting  ChannelAccessSetting;
++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
++	struct work_struct reset_wq;
++#else
++	struct tq_struct reset_wq;
++#endif
++
++#ifdef _RTL8187_EXT_PATCH_
++	struct mshclass			*mshobj;
++#endif
++	
++#ifdef LED
++  /* add for led controll */
++        u8                      EEPROMCustomerID;
++        RT_CID_TYPE     CustomerID;
++        LED_8187        Gpio0Led;
++        LED_8187        SwLed0;
++        LED_8187        SwLed1;
++        u8                      bEnableLedCtrl;
++        LED_STRATEGY_8187       LedStrategy;
++        u8                      PsrValue;
++        struct work_struct              Gpio0LedWorkItem;
++        struct work_struct              SwLed0WorkItem;
++        struct work_struct              SwLed1WorkItem;
++#endif 
++        u8      driver_upping;
++#ifdef CPU_64BIT	
++	u8      *usb_buf;
++	struct dma_pool *usb_pool;
++#endif
++
++
++#ifdef SW_ANTE_DIVERSITY
++
++//#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)	
++//	struct delayed_work SwAntennaWorkItem;
++//#else
++//	struct work_struct SwAntennaWorkItem;
++//#endif	
++	
++	bool	bAntennaDiversityTimerIssued;
++	short antb;
++	short diversity;
++	bool	AutoloadFailFlag;
++	u16	EEPROMVersion;
++	u8	EEPROMAntennaDiversity;
++	u16	EEPROMCSThreshold;
++	u8	EEPROMDefaultAntennaB;
++	u8	EEPROMDigitalPhy;
++	u32	EEPROMCSMethod;
++	u8	EEPROMGEPRFOffState;
++	// For HW antenna diversity, added by Roger, 2008.01.30.
++	u32	AdMainAntennaRxOkCnt;		// Main antenna Rx OK count. 
++	u32	AdAuxAntennaRxOkCnt;		// Aux antenna Rx OK count. 
++	bool	bHWAdSwitched;				// TRUE if we has switched default antenna by HW evaluation.
++	u8 EEPROMSwAntennaDiversity;
++	bool EEPROMDefaultAntenna1;
++	u8 RegSwAntennaDiversityMechanism;// 0:default from EEPROM, 1: disable, 2: enable.
++	bool bSwAntennaDiverity;
++	u8 RegDefaultAntenna;// 0: default from EEPROM, 1: main, 2: aux. Added by Roger, 2007.11.05.
++	bool bDefaultAntenna1;
++	//long SignalStrength;
++	long Stats_SignalStrength;
++	//long LastSignalStrengthInPercent; // In percentange, used for smoothing, e.g. Moving Average.
++	//long	 SignalQuality; // in 0-100 index. 
++	long Stats_SignalQuality;
++	//long RecvSignalPower; // in dBm.
++	long Stats_RecvSignalPower;
++	u8	 LastRxPktAntenna;	// +by amy 080312 Antenn which received the lasted packet. 0: Aux, 1:Main. Added by Roger, 2008.01.25.
++	u32 AdRxOkCnt;
++	long AdRxSignalStrength; // Rx signal strength for Antenna Diversity, which had been smoothing, its valid range is [0,100].	
++	u8 CurrAntennaIndex;			// Index to current Antenna (both Tx and Rx).
++	u8 AdTickCount;				// Times of SwAntennaDiversityTimer happened.
++	u8 AdCheckPeriod;				// # of period SwAntennaDiversityTimer to check Rx signal strength for SW Antenna Diversity. 
++	u8 AdMinCheckPeriod;			// Min value of AdCheckPeriod. 
++	u8 AdMaxCheckPeriod;			// Max value of AdCheckPeriod.  
++	long AdRxSsThreshold;			// Signal strength threshold to switch antenna.
++	long AdMaxRxSsThreshold;			// Max value of AdRxSsThreshold.
++	bool bAdSwitchedChecking;		// TRUE if we shall shall check Rx signal strength for last time switching antenna.
++	long AdRxSsBeforeSwitched;		// Rx signal strength before we swithed antenna.
++	struct timer_list SwAntennaDiversityTimer;
++#endif
++	u8	commit;
++
++//#ifdef ENABLE_DOT11D
++	u8	channel_plan;
++//#endif	
++	u8	EEPROMSelectNewGPIO;
++}r8180_priv;
++
++// for rtl8187
++// now mirging to rtl8187B
++/*
++typedef enum{ 
++	LOW_PRIORITY = 0x02,
++	NORM_PRIORITY 
++	} priority_t;
++*/
++//for rtl8187B
++typedef enum{
++	BULK_PRIORITY = 0x01,
++	//RSVD0,
++	//RSVD1,
++	LOW_PRIORITY,
++	NORM_PRIORITY, 
++	VO_PRIORITY,
++	VI_PRIORITY, //0x05
++	BE_PRIORITY,
++	BK_PRIORITY,
++	RSVD2,
++	RSVD3,
++	BEACON_PRIORITY, //0x0A
++	HIGH_PRIORITY,
++	MANAGE_PRIORITY,
++	RSVD4,
++	RSVD5,
++	UART_PRIORITY //0x0F
++} priority_t;
++
++typedef enum{
++	NIC_8187 = 1,
++	NIC_8187B
++	} nic_t;
++
++
++typedef u32 AC_CODING;
++#define AC0_BE	0		// ACI: 0x00	// Best Effort
++#define AC1_BK	1		// ACI: 0x01	// Background
++#define AC2_VI	2		// ACI: 0x10	// Video
++#define AC3_VO	3		// ACI: 0x11	// Voice
++#define AC_MAX	4		// Max: define total number; Should not to be used as a real enum.
++
++//
++// ECWmin/ECWmax field.
++// Ref: WMM spec 2.2.2: WME Parameter Element, p.13.
++//
++typedef	union _ECW{
++	u8	charData;
++	struct
++	{
++		u8	ECWmin:4;
++		u8	ECWmax:4;
++	}f;	// Field
++}ECW, *PECW;
++
++//
++// ACI/AIFSN Field.
++// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
++//
++typedef	union _ACI_AIFSN{
++	u8	charData;
++	
++	struct
++	{
++		u8	AIFSN:4;
++		u8	ACM:1;
++		u8	ACI:2;
++		u8	Reserved:1;
++	}f;	// Field
++}ACI_AIFSN, *PACI_AIFSN;
++
++//
++// AC Parameters Record Format.
++// Ref: WMM spec 2.2.2: WME Parameter Element, p.12.
++//
++typedef	union _AC_PARAM{
++	u32	longData;
++	u8	charData[4];
++
++	struct
++	{
++		ACI_AIFSN	AciAifsn;
++		ECW		Ecw;
++		u16		TXOPLimit;
++	}f;	// Field
++}AC_PARAM, *PAC_PARAM;
++
++#ifdef JOHN_HWSEC
++struct ssid_thread {
++	struct net_device *dev;
++       	u8 name[IW_ESSID_MAX_SIZE + 1];
++};
++#endif
++
++short rtl8180_tx(struct net_device *dev,u32* skbuf, int len,priority_t priority,short morefrag,short rate);
++
++#ifdef JOHN_TKIP
++u32 read_cam(struct net_device *dev, u8 addr);
++void write_cam(struct net_device *dev, u8 addr, u32 data);
++#endif
++u8 read_nic_byte(struct net_device *dev, int x);
++u8 read_nic_byte_E(struct net_device *dev, int x);
++u32 read_nic_dword(struct net_device *dev, int x);
++u16 read_nic_word(struct net_device *dev, int x) ;
++void write_nic_byte(struct net_device *dev, int x,u8 y);
++void write_nic_byte_E(struct net_device *dev, int x,u8 y);
++void write_nic_word(struct net_device *dev, int x,u16 y);
++void write_nic_dword(struct net_device *dev, int x,u32 y);
++void force_pci_posting(struct net_device *dev);
++
++void rtl8180_rtx_disable(struct net_device *);
++void rtl8180_rx_enable(struct net_device *);
++void rtl8180_tx_enable(struct net_device *);
++
++void rtl8180_disassociate(struct net_device *dev);
++//void fix_rx_fifo(struct net_device *dev);
++void rtl8185_set_rf_pins_enable(struct net_device *dev,u32 a);
++
++void rtl8180_set_anaparam(struct net_device *dev,u32 a);
++void rtl8185_set_anaparam2(struct net_device *dev,u32 a);
++void rtl8180_update_msr(struct net_device *dev);
++int rtl8180_down(struct net_device *dev);
++int rtl8180_up(struct net_device *dev);
++void rtl8180_commit(struct net_device *dev);
++void rtl8180_set_chan(struct net_device *dev,short ch);
++void write_phy(struct net_device *dev, u8 adr, u8 data);
++void write_phy_cck(struct net_device *dev, u8 adr, u32 data);
++void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data);
++void rtl8185_tx_antenna(struct net_device *dev, u8 ant);
++void rtl8187_set_rxconf(struct net_device *dev);
++bool MgntActSet_RF_State(struct net_device *dev,RT_RF_POWER_STATE StateToSet,u32 ChangeSource);
++void IPSEnter(struct net_device *dev);
++void IPSLeave(struct net_device *dev);
++#ifdef POLLING_METHOD_FOR_RADIO
++void gpio_change_polling(unsigned long data);
++#endif
++bool SetRFPowerState(struct net_device *dev,RT_RF_POWER_STATE eRFPowerState);
++void rtl8180_patch_ieee80211_wx_sync_scan_wq(struct ieee80211_device *ieee);
++#ifdef _RTL8187_EXT_PATCH_
++extern int r8180_wx_set_channel(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
++#endif
++#ifdef JOHN_TKIP
++void EnableHWSecurityConfig8187(struct net_device *dev);
++void setKey(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, u8 *MacAddr, u8 DefaultKey, u32 *KeyContent );
++
++#endif 
++
++#endif
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8187_led.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8187_led.c	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,1629 @@
++/*++
++Copyright (c) Realtek Semiconductor Corp. All rights reserved.
++
++Module Name:
++ 	r8187_led.c
++	
++Abstract:
++ 	RTL8187 LED control functions
++ 	    
++Major Change History:
++	When        Who      What
++	----------    ---------------   -------------------------------
++	2006-09-07    Xiong		Created
++    
++Notes:	
++ 	
++--*/
++
++/*--------------------------Include File------------------------------------*/
++#include "ieee80211.h"
++#include "r8180_hw.h"
++#include "r8187.h"
++#include "r8180_93cx6.h" 
++#include "r8187_led.h"
++
++/**
++*
++* Initialization function for Sw Leds controll. 
++* 
++* \param dev      The net device for this driver.
++* \return void.
++*
++* Note: 
++* 
++*/
++
++void
++InitSwLeds(
++	struct net_device *dev
++	)
++{
++
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	u16	usValue;
++//	printk("========>%s()\n", __FUNCTION__);
++
++//	priv->CustomerID = RT_CID_87B_DELL; //by lizhaoming for DELL 2008.6.3
++	priv->CustomerID = RT_CID_DEFAULT; //just set to default now
++	priv->bEnableLedCtrl = 1;
++	priv->PsrValue = read_nic_byte(dev, PSR);
++	usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET >> 1);
++	priv->EEPROMCustomerID = (u8)( usValue & EEPROM_CID_MASK );
++	DMESG("EEPROM Customer ID: %02X", priv->EEPROMCustomerID);
++
++	if(priv->CustomerID == RT_CID_DEFAULT)
++	{ // If we have not yet change priv->CustomerID in register, 
++	  // we initialzie it from that of EEPROM with proper translation, 2006.07.03, by rcnjko.
++		switch(priv->EEPROMCustomerID)
++		{
++		case EEPROM_CID_RSVD0:
++		case EEPROM_CID_RSVD1:
++			priv->CustomerID = RT_CID_DEFAULT;
++			break;
++	
++		case EEPROM_CID_ALPHA0:
++			priv->CustomerID = RT_CID_8187_ALPHA0;
++			break;
++	
++		case EEPROM_CID_SERCOMM_PS:
++			priv->CustomerID = RT_CID_8187_SERCOMM_PS;
++			break;
++	
++		case EEPROM_CID_HW_LED:
++			priv->CustomerID = RT_CID_8187_HW_LED;
++			break;
++			
++		case EEPROM_CID_QMI:
++			priv->CustomerID = RT_CID_87B_QMI;			
++			break;		
++
++		case EEPROM_CID_DELL:
++			priv->CustomerID = RT_CID_87B_DELL;			
++			break;	
++			
++		default:
++			// Invalid value, so, we use default value instead.
++			priv->CustomerID = RT_CID_DEFAULT;
++			break;
++		}
++	}
++	switch(priv->CustomerID)
++	{
++	case RT_CID_DEFAULT: 
++		priv->LedStrategy = SW_LED_MODE0;
++		break;
++	
++	case RT_CID_8187_ALPHA0:
++		priv->LedStrategy = SW_LED_MODE1;
++		break;	
++
++	case RT_CID_8187_SERCOMM_PS:
++		priv->LedStrategy = SW_LED_MODE3;
++		break;
++
++	case RT_CID_87B_QMI:
++		priv->LedStrategy = SW_LED_MODE4;
++		break;		
++
++	case RT_CID_87B_DELL:
++		priv->LedStrategy = SW_LED_MODE5;
++		break;	
++
++	case RT_CID_8187_HW_LED:
++		priv->LedStrategy = HW_LED;
++		break;
++
++	default:
++		priv->LedStrategy = SW_LED_MODE0;
++		break;
++	}
++	
++	InitLed8187(dev, 
++				&(priv->Gpio0Led), 
++				LED_PIN_GPIO0, 
++				Gpio0LedBlinkTimerCallback);
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
++	INIT_WORK(&priv->Gpio0LedWorkItem, 
++				(void(*)(void*))Gpio0LedWorkItemCallback, dev);
++
++	InitLed8187(dev,
++				&(priv->SwLed0), 
++				LED_PIN_LED0, 
++				SwLed0BlinkTimerCallback);
++	INIT_WORK(&priv->SwLed0WorkItem, 
++				(void(*)(void*))SwLed0WorkItemCallback, dev);
++
++	InitLed8187(dev,
++				&(priv->SwLed1), 
++				LED_PIN_LED1, 
++				SwLed1BlinkTimerCallback);
++	INIT_WORK(&priv->SwLed1WorkItem, 
++				(void(*)(void*))SwLed1WorkItemCallback, dev);
++#else
++INIT_WORK(&priv->Gpio0LedWorkItem, 
++				Gpio0LedWorkItemCallback);
++
++	InitLed8187(dev,
++				&(priv->SwLed0), 
++				LED_PIN_LED0, 
++				SwLed0BlinkTimerCallback);
++	INIT_WORK(&priv->SwLed0WorkItem, 
++				SwLed0WorkItemCallback);
++
++	InitLed8187(dev,
++				&(priv->SwLed1), 
++				LED_PIN_LED1, 
++				SwLed1BlinkTimerCallback);
++	INIT_WORK(&priv->SwLed1WorkItem, 
++				SwLed1WorkItemCallback);
++#endif
++}
++
++void
++DeInitSwLeds(
++	struct net_device *dev
++	)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++//	printk("=========>%s In\n", __FUNCTION__);
++	DeInitLed8187(dev, &(priv->Gpio0Led));
++	DeInitLed8187(dev, &(priv->SwLed0));
++	DeInitLed8187(dev, &(priv->SwLed1));
++}
++
++void
++InitLed8187(
++	struct net_device *dev, 
++	PLED_8187		pLed,
++	LED_PIN_8187		LedPin,
++	void	* 		BlinkCallBackFunc)
++{
++//	printk("=========>%s In\n", __FUNCTION__);
++	pLed->LedPin = LedPin;
++
++	pLed->bLedOn = 0;
++	pLed->CurrLedState = LED_OFF;
++
++	pLed->bLedBlinkInProgress = 0;
++	pLed->BlinkTimes = 0;
++	pLed->BlinkingLedState = LED_OFF;
++
++	init_timer(&(pLed->BlinkTimer));
++	pLed->BlinkTimer.data = (unsigned long)dev;
++	pLed->BlinkTimer.function = BlinkCallBackFunc;
++	//PlatformInitializeTimer(dev, &(pLed->BlinkTimer), BlinkCallBackFunc);
++}
++
++void
++DeInitLed8187(
++	struct net_device *dev, 
++	PLED_8187			pLed)
++{
++	//printk("=========>%s In\n", __FUNCTION__);
++	//PlatformCancelTimer(dev, &(pLed->BlinkTimer));
++	del_timer_sync(&(pLed->BlinkTimer));
++	// We should reset bLedBlinkInProgress if we cancel the LedControlTimer, 2005.03.10, by rcnjko.
++	pLed->bLedBlinkInProgress = 0;
++}
++
++void
++LedControl8187(
++	struct net_device *dev,
++	LED_CTL_MODE		LedAction
++)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++//	printk("=========>%s In\n", __FUNCTION__);
++	if( priv->bEnableLedCtrl == 0)
++		return;
++
++
++	if(	priv->eRFPowerState != eRfOn && 
++		(LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || 
++		 LedAction == LED_CTL_SITE_SURVEY || 
++		 LedAction == LED_CTL_LINK || 
++		 LedAction == LED_CTL_NO_LINK) )
++	{
++		return;
++	}
++
++
++	switch(priv->LedStrategy)
++	{
++	case SW_LED_MODE0:
++		SwLedControlMode0(dev, LedAction);
++		break;
++
++	case SW_LED_MODE1:
++		SwLedControlMode1(dev, LedAction);
++		break;
++
++	case SW_LED_MODE2:
++		SwLedControlMode2(dev, LedAction);
++		break;
++
++	case SW_LED_MODE3:
++		SwLedControlMode3(dev, LedAction);
++		break;
++	case SW_LED_MODE4:
++		SwLedControlMode4(dev, LedAction);		
++		break;
++
++	case SW_LED_MODE5:
++		SwLedControlMode5(dev, LedAction);		
++		break;
++
++	default:
++		break;
++	}
++}
++
++
++//
++//	Description:	
++//		Implement each led action for SW_LED_MODE0.
++//		This is default strategy.
++//
++void
++SwLedControlMode0(
++	struct net_device *dev,
++	LED_CTL_MODE		LedAction
++)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	PLED_8187 pLed = &(priv->Gpio0Led);
++
++//	printk("===+++++++++++++++======>%s In\n", __FUNCTION__);
++	// Decide led state
++	switch(LedAction)
++	{
++	case LED_CTL_TX:
++	case LED_CTL_RX:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->CurrLedState = LED_BLINK_NORMAL;
++			pLed->BlinkTimes = 2;
++	//		printk("===========>LED_CTL_TX/RX \n");
++		}
++		else
++		{
++			return;
++		}
++		break;
++
++	case LED_CTL_SITE_SURVEY:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->CurrLedState = LED_BLINK_SLOWLY;
++		//	pLed->BlinkTimes = 10;
++			//printk("===========>LED_CTL_SURVEY \n");
++		}
++		else
++		{
++			return;
++		}
++		break;
++
++	case LED_CTL_LINK:
++	//	printk("===========>associate commplite LED_CTL_LINK\n");
++		pLed->CurrLedState = LED_ON;
++		break;
++
++	case LED_CTL_NO_LINK:
++		pLed->CurrLedState = LED_OFF;
++		break;
++	
++	case LED_CTL_POWER_ON:
++	//	printk("===========>LED_CTL_POWER_ON\n");
++		pLed->CurrLedState = LED_POWER_ON_BLINK;
++		break;
++
++	case LED_CTL_POWER_OFF:
++		pLed->CurrLedState = LED_OFF;
++		break;
++
++	default:
++		return;
++		break;
++	}
++
++	// Change led state.
++	switch(pLed->CurrLedState)
++	{
++	case LED_ON:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			SwLedOn(dev, pLed);
++		}
++		break;
++
++	case LED_OFF://modified by lizhaoming 2008.6.23
++	//	if( pLed->bLedBlinkInProgress == 0 )
++	//	{
++	//		SwLedOff(dev, pLed);
++	//	}
++	
++	if(pLed->bLedBlinkInProgress )/////////lizhaoming
++		{
++			del_timer_sync(&(pLed->BlinkTimer));
++			pLed->bLedBlinkInProgress = FALSE;
++		}
++		SwLedOff(dev, pLed);
++		break;
++
++	case LED_BLINK_NORMAL:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->bLedBlinkInProgress = 1;
++			if( pLed->bLedOn )
++				pLed->BlinkingLedState = LED_OFF; 
++			else
++				pLed->BlinkingLedState = LED_ON; 
++			
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
++		}
++		break;
++
++	case LED_BLINK_SLOWLY:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			//printk("=======>%s SLOWLY\n", __func__);
++			pLed->bLedBlinkInProgress = 1;
++		//	if( pLed->bLedOn )
++				pLed->BlinkingLedState = LED_OFF;//for LED_SHIN is LED on 
++		//	else
++		//		pLed->BlinkingLedState = LED_ON;
++			
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
++		}
++		break;
++
++	case LED_POWER_ON_BLINK:
++		SwLedOn(dev, pLed);
++#ifdef LED_SHIN
++		mdelay(100);
++		SwLedOff(dev, pLed);
++#endif
++		break;
++
++	default:
++		break;
++	}
++}
++
++//
++//	Description:	
++//		Implement each led action for SW_LED_MODE1.
++//		For example, this is applied by ALPHA.
++//
++void
++SwLedControlMode1(
++	struct net_device *dev,
++	LED_CTL_MODE		LedAction
++)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	PLED_8187 pLed0 = &(priv->SwLed0);
++	PLED_8187 pLed1 = &(priv->SwLed1);
++//	printk("=====++++++++++++++++++++++====>%s In\n", __FUNCTION__);
++
++	switch(LedAction)
++	{
++	case LED_CTL_TX:
++		if( pLed0->bLedBlinkInProgress == 0 )
++		{
++			pLed0->CurrLedState = LED_BLINK_NORMAL;
++			pLed0->BlinkTimes = 2;
++			pLed0->bLedBlinkInProgress = 1;
++			if( pLed0->bLedOn )
++				pLed0->BlinkingLedState = LED_OFF; 
++			else
++				pLed0->BlinkingLedState = LED_ON; 
++
++			//pLed0->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed0->BlinkTimer));
++			mod_timer(&pLed0->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed0->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
++		}
++		break;
++
++	case LED_CTL_LINK:
++		pLed0->CurrLedState = LED_ON;
++		if( pLed0->bLedBlinkInProgress == 0 )
++		{
++			SwLedOn(dev, pLed0);
++		}
++		break;
++
++	case LED_CTL_NO_LINK:
++		pLed0->CurrLedState = LED_OFF;
++		if( pLed0->bLedBlinkInProgress == 0 )
++		{
++			SwLedOff(dev, pLed0);
++		}
++		break;
++	
++	case LED_CTL_POWER_ON:
++		pLed0->CurrLedState = LED_OFF;
++		SwLedOff(dev, pLed0);
++
++		pLed1->CurrLedState = LED_ON;
++		SwLedOn(dev, pLed1);
++
++		break;
++
++	case LED_CTL_POWER_OFF:
++		pLed0->CurrLedState = LED_OFF;
++		SwLedOff(dev, pLed0);
++
++		pLed1->CurrLedState = LED_OFF;
++		SwLedOff(dev, pLed1);
++		break;
++
++	case LED_CTL_SITE_SURVEY:
++		if( pLed0->bLedBlinkInProgress == 0 )
++		{
++			pLed0->CurrLedState = LED_BLINK_SLOWLY;;
++			pLed0->BlinkTimes = 10;
++			pLed0->bLedBlinkInProgress = 1;
++			if( pLed0->bLedOn )
++				pLed0->BlinkingLedState = LED_OFF; 
++			else
++				pLed0->BlinkingLedState = LED_ON;
++
++			//pLed0->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
++			//add_timer(&(pLed0->BlinkTimer));
++			mod_timer(&pLed0->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed0->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
++		}
++		break;
++
++	default:
++		break;
++	}
++}
++
++//
++//	Description:	
++//		Implement each led action for SW_LED_MODE2, 
++//		which is customized for AzWave 8187 minicard.  
++//		2006.04.03, by rcnjko.
++//
++void
++SwLedControlMode2(
++	struct net_device *dev,
++	LED_CTL_MODE		LedAction
++)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	PLED_8187 pLed = &(priv->Gpio0Led);
++
++//	printk("====+++++++++++++++++++++=====>%s In\n", __FUNCTION__);
++	// Decide led state
++	switch(LedAction)
++	{
++	case LED_CTL_TX:
++	case LED_CTL_RX:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->bLedBlinkInProgress = 1;
++
++			pLed->CurrLedState = LED_BLINK_NORMAL;
++			pLed->BlinkTimes = 2;
++
++			if( pLed->bLedOn )
++				pLed->BlinkingLedState = LED_OFF; 
++			else
++				pLed->BlinkingLedState = LED_ON; 
++
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
++		}
++		break;
++
++	case LED_CTL_SITE_SURVEY:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->bLedBlinkInProgress = 1;
++
++			//if(	dev->MgntInfo.mAssoc || 
++			//	dev->MgntInfo.mIbss )
++			//{
++				pLed->CurrLedState = LED_SCAN_BLINK;
++				pLed->BlinkTimes = 4;
++			//}
++			//else
++			//{
++			//	pLed->CurrLedState = LED_NO_LINK_BLINK;
++			//	pLed->BlinkTimes = 24;
++			//}
++
++			if( pLed->bLedOn )
++			{
++				pLed->BlinkingLedState = LED_OFF;
++				//pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_ON_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
++				//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_ON_INTERVAL);
++			}
++			else
++			{
++				pLed->BlinkingLedState = LED_ON; 
++				//pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_OFF_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
++				//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_OFF_INTERVAL);
++			}
++		}
++		else
++		{
++			if(pLed->CurrLedState != LED_NO_LINK_BLINK)
++			{
++				pLed->CurrLedState = LED_SCAN_BLINK;
++				/*
++				if(	dev->MgntInfo.mAssoc || 
++					dev->MgntInfo.mIbss )
++				{
++					pLed->CurrLedState = LED_SCAN_BLINK;
++				}
++				else
++				{
++					pLed->CurrLedState = LED_NO_LINK_BLINK;
++				}
++				*/
++			}
++		}
++		break;
++
++	case LED_CTL_NO_LINK:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->bLedBlinkInProgress = 1;
++
++			pLed->CurrLedState = LED_NO_LINK_BLINK;
++			pLed->BlinkTimes = 24;
++
++			if( pLed->bLedOn )
++			{
++				pLed->BlinkingLedState = LED_OFF; 
++				//pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_ON_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
++				//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_ON_INTERVAL);
++			}
++			else
++			{
++				pLed->BlinkingLedState = LED_ON; 
++				//pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_OFF_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
++				//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_OFF_INTERVAL);
++			}
++		}
++		else
++		{
++			pLed->CurrLedState = LED_NO_LINK_BLINK;
++		}
++		break;
++
++	case LED_CTL_LINK:
++		pLed->CurrLedState = LED_ON;
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			SwLedOn(dev, pLed);
++		}
++		break;
++
++	case LED_CTL_POWER_OFF:
++		pLed->CurrLedState = LED_OFF;
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			SwLedOff(dev, pLed);
++		}
++		break;
++
++	default:
++		break;
++	}
++}
++
++
++//
++//	Description:	
++//		Implement each led action for SW_LED_MODE3, 
++//		which is customized for Sercomm Printer Server case. 
++//		2006.04.21, by rcnjko.
++//
++void
++SwLedControlMode3(
++	struct net_device *dev,
++	LED_CTL_MODE		LedAction
++)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	PLED_8187 pLed = &(priv->Gpio0Led);
++
++//	printk("=====+++++++++++++++++++====>%s In\n", __FUNCTION__);
++	// Decide led state
++	switch(LedAction)
++	{
++	case LED_CTL_TX:
++	case LED_CTL_RX:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->bLedBlinkInProgress = 1;
++
++			pLed->CurrLedState = LED_BLINK_CM3;
++			pLed->BlinkTimes = 2;
++
++			if( pLed->bLedOn )
++				pLed->BlinkingLedState = LED_OFF; 
++			else
++				pLed->BlinkingLedState = LED_ON; 
++
++			//pLed->BlinkTimer.expires = jiffies + LED_CM3_BLINK_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM3_BLINK_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM3_BLINK_INTERVAL);
++		}
++		break;
++
++	case LED_CTL_SITE_SURVEY:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->bLedBlinkInProgress = 1;
++
++			pLed->CurrLedState = LED_BLINK_CM3;
++			pLed->BlinkTimes = 10;
++
++			if( pLed->bLedOn )
++				pLed->BlinkingLedState = LED_OFF; 
++			else
++				pLed->BlinkingLedState = LED_ON; 
++
++			//pLed->BlinkTimer.expires = jiffies + LED_CM3_BLINK_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM3_BLINK_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM3_BLINK_INTERVAL);
++		}
++		break;
++
++	case LED_CTL_LINK:
++		pLed->CurrLedState = LED_ON;
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			SwLedOn(dev, pLed);
++		}
++		break;
++
++	case LED_CTL_NO_LINK:
++		pLed->CurrLedState = LED_OFF;
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			SwLedOff(dev, pLed);
++		}
++		break;
++
++	case LED_CTL_POWER_ON:
++		pLed->CurrLedState = LED_POWER_ON_BLINK;
++		SwLedOn(dev, pLed);
++		mdelay(100);
++		SwLedOff(dev, pLed);
++		break;
++
++	case LED_CTL_POWER_OFF:
++		pLed->CurrLedState = LED_OFF;
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			SwLedOff(dev, pLed);
++		}
++		break;
++
++	default:
++		break;
++	}
++}
++
++// added by lizhaoming 2008.6.2
++//
++//	Description:	
++//		Implement each led action for SW_LED_MODE4, 
++//		which is customized for QMI 8187B minicard. 
++//		2008.04.21, by chiyokolin.
++//
++void
++SwLedControlMode4(
++	struct net_device *dev,
++	LED_CTL_MODE		LedAction
++	)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	PLED_8187 pLed = &(priv->Gpio0Led);
++
++	//printk("=====+++++++++++++++++++++====>%s In\n", __FUNCTION__);
++	// Decide led state
++	switch(LedAction)
++	{
++	case LED_CTL_TX:
++	case LED_CTL_RX:
++		//if( pLed->bLedBlinkInProgress == false && !priv->bScanInProgress)//?????
++		if( pLed->bLedBlinkInProgress == 0)
++		{
++			pLed->bLedBlinkInProgress = 1;
++
++			pLed->CurrLedState = LED_BLINK_NORMAL;
++			pLed->BlinkTimes = 2;
++
++			if( pLed->bLedOn )
++				pLed->BlinkingLedState = LED_OFF; 
++			else
++				pLed->BlinkingLedState = LED_ON; 
++
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++			//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
++		}
++		else
++			//printk("----->LED_CTL_RX/TX bLedBlinkInProgress\n");
++			
++		break;
++
++	case LED_CTL_SITE_SURVEY:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++
++			pLed->bLedBlinkInProgress = 1;			
++			//if(	priv->MgntInfo.mAssoc || priv->MgntInfo.mIbss )//////////??????
++			//{				
++				pLed->CurrLedState = LED_SCAN_BLINK;	
++				pLed->BlinkTimes = 10;	
++
++				pLed->BlinkingLedState = LED_ON; 	
++
++				//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++				//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);				
++			//}
++			//else
++			//{
++			//	pLed->CurrLedState = LED_NO_LINK_BLINK;
++			//	pLed->BlinkTimes = 24;
++			//
++			//	if( pLed->bLedOn )
++			//	{
++			//		pLed->BlinkingLedState = LED_OFF; 
++			//		
++			//		pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_ON_INTERVAL;
++			//		add_timer(&(pLed->BlinkTimer));
++			//		//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_ON_INTERVAL);
++			//	}
++			//	else
++			//	{
++			//		pLed->BlinkingLedState = LED_ON; 
++
++			//		pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_OFF_INTERVAL;
++			//		add_timer(&(pLed->BlinkTimer));
++			//		//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_OFF_INTERVAL);
++			//	}				
++			//}
++		}
++		else
++		{
++			if(pLed->CurrLedState != LED_NO_LINK_BLINK)
++			{
++				//if(	priv->MgntInfo.mAssoc || priv->MgntInfo.mIbss )//???????????
++				//{
++				//}
++				//else
++				//{
++				//	pLed->CurrLedState = LED_NO_LINK_BLINK;
++				//}
++			}
++
++			//printk("----->LED_CTL_SITE_SURVEY bLedBlinkInProgress\n");			
++		}
++		break;
++
++	case LED_CTL_NO_LINK:
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->bLedBlinkInProgress = 1;
++
++			pLed->CurrLedState = LED_NO_LINK_BLINK;
++			pLed->BlinkTimes = 24;
++
++			if( pLed->bLedOn )
++			{
++				pLed->BlinkingLedState = LED_OFF; 
++
++				//pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_ON_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_ON_INTERVAL));
++				//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_ON_INTERVAL);
++			}
++			else
++			{
++				pLed->BlinkingLedState = LED_ON; 
++
++				//pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_OFF_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_OFF_INTERVAL));
++				//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_OFF_INTERVAL);
++			}
++		}
++		else
++		{
++			pLed->CurrLedState = LED_NO_LINK_BLINK;
++			//printk("----->LED_CTL_NO_LINK bLedBlinkInProgress\n");						
++		}
++		break;
++
++	case LED_CTL_LINK:
++		pLed->CurrLedState = LED_ON;
++		if( pLed->bLedBlinkInProgress == 0)
++		{
++			SwLedOn(dev, pLed);
++		}
++		else
++			;//printk("----->LED_CTL_LINK bLedBlinkInProgress\n");						
++			
++		break;
++
++	case LED_CTL_POWER_OFF:
++		pLed->CurrLedState = LED_OFF;
++		if(pLed->bLedBlinkInProgress)
++		{
++			printk("----->LED_CTL_POWER_OFF bLedBlinkInProgress\n");						
++		
++			//PlatformCancelTimer(Adapter, &(pLed->BlinkTimer));
++			del_timer_sync(&(pLed->BlinkTimer));
++			pLed->bLedBlinkInProgress = 0;
++		}
++		SwLedOff(dev, pLed);
++		break;
++
++	default:
++		break;
++	}
++}
++
++
++
++//added by lizhaoming 2008.6.3
++//
++//	Description:	
++//		Implement each led action for SW_LED_MODE5, 
++//		which is customized for DELL 8187B minicard. 
++//		2008.04.24, by chiyokolin.
++//
++void
++SwLedControlMode5(	
++	struct net_device *dev,
++	LED_CTL_MODE		LedAction
++	)
++{	
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	PLED_8187 pLed = &(priv->Gpio0Led);
++	
++	// Decide led state
++	//printk("====++++++++++++++++++++++=====>%s In\n", __FUNCTION__);
++	switch(LedAction)
++	{
++	case LED_CTL_TX:
++	case LED_CTL_RX:
++	case LED_CTL_SITE_SURVEY:
++	case LED_CTL_POWER_ON:		
++	case LED_CTL_NO_LINK:
++	case LED_CTL_LINK:
++		pLed->CurrLedState = LED_ON;
++		if( pLed->bLedBlinkInProgress == 0 )
++		{
++			pLed->bLedBlinkInProgress = 1;
++			if(! pLed->bLedOn )
++				pLed->BlinkingLedState = LED_ON; 
++			else
++				break; 
++			
++			//printk("====++++++++++++++++++++++=====>%s In LED:%d\n", __FUNCTION__, pLed->bLedOn);
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++		//	SwLedOn(dev, pLed);
++		}
++		else
++			;//printk("----->LED_CTL_LINK bLedBlinkInProgress\n");						
++			
++		break;
++
++	case LED_CTL_POWER_OFF:
++		pLed->CurrLedState = LED_OFF;
++	//	printk("<====++++++++++++++++++++++=====%s In LED:%d\n", __FUNCTION__, pLed->bLedOn);
++		if(pLed->bLedBlinkInProgress)
++		{
++		//	printk("----->LED_CTL_POWER_OFF bLedBlinkInProgress\n");						
++
++			//PlatformCancelTimer(Adapter, &(pLed->BlinkTimer));
++			del_timer_sync(&(pLed->BlinkTimer));
++			pLed->bLedBlinkInProgress = 0;
++		}
++		SwLedOff(dev, pLed);
++		break;
++
++	default:
++		break;
++	}
++}
++
++//
++// Callback fuction of the timer, Gpio0Led.BlinkTimer.
++//
++void
++Gpio0LedBlinkTimerCallback(
++	unsigned long		data
++	)
++{
++	struct net_device *dev = (struct net_device *)data;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++//	printk("=========>%s In\n", __FUNCTION__);
++	PlatformSwLedBlink(dev, &(priv->Gpio0Led));
++}
++
++
++
++//
++// Callback fuction of the timer, SwLed0.BlinkTimer.
++//
++void
++SwLed0BlinkTimerCallback(
++	unsigned long		data
++	)
++{
++	struct net_device *dev = (struct net_device *)data;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++//	printk("=========>%s In\n", __FUNCTION__);
++	PlatformSwLedBlink(dev, &(priv->SwLed0));
++}
++
++
++
++//
++// Callback fuction of the timer, SwLed1.BlinkTimer.
++//
++void
++SwLed1BlinkTimerCallback(
++	unsigned long		data
++	)
++{
++	struct net_device *dev = (struct net_device *)data;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++//	printk("=========>%s In\n", __FUNCTION__);
++	PlatformSwLedBlink(dev, &(priv->SwLed1));
++}
++
++void
++PlatformSwLedBlink(
++	struct net_device *dev,
++	PLED_8187		pLed
++	)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++//	printk("=========>%s In\n", __FUNCTION__);
++	switch(pLed->LedPin)
++	{
++	case LED_PIN_GPIO0:
++		schedule_work(&(priv->Gpio0LedWorkItem));
++		break;
++
++	case LED_PIN_LED0:
++		schedule_work(&(priv->SwLed0WorkItem));
++		break;
++
++	case LED_PIN_LED1:
++		schedule_work(&(priv->SwLed1WorkItem));
++		break;
++
++	default:
++		break;
++	}
++}
++
++// 
++// Callback fucntion of the workitem for SW LEDs.
++// 2006.03.01, by rcnjko.
++//
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++void Gpio0LedWorkItemCallback(struct work_struct *work)
++{
++	struct r8180_priv *priv = container_of(work, struct r8180_priv,Gpio0LedWorkItem);
++	struct net_device *dev = priv->ieee80211->dev;
++#else
++void
++Gpio0LedWorkItemCallback(
++	void *			Context
++	)
++{
++	struct net_device *dev = (struct net_device *)Context;
++	struct r8180_priv *priv = ieee80211_priv(dev);
++#endif
++	PLED_8187	pLed = &(priv->Gpio0Led); 
++	if (priv == NULL || dev == NULL){
++//	printk("=========>%s In\n", __FUNCTION__);
++	//printk("ft=====================>%s()\n", __FUNCTION__);
++	}
++	
++#if 0 // by lizahoming 2008.6.3
++	if(priv->LedStrategy == SW_LED_MODE2)
++		SwLedCm2Blink(dev, pLed);	
++	else
++		SwLedBlink(dev, pLed);
++#endif
++
++#if 1 // by lizahoming 2008.6.3
++	switch(priv->LedStrategy)
++	{
++	case SW_LED_MODE2:
++		SwLedCm2Blink(dev, pLed);
++		break;
++	case SW_LED_MODE4:
++		SwLedCm4Blink(dev, pLed);
++		break;		
++	default:
++		SwLedBlink(dev, pLed);
++		break;
++	}
++#endif
++
++	//LeaveCallbackOfRtWorkItem( &(usbdevice->Gpio0LedWorkItem) );
++}
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++void SwLed0WorkItemCallback(struct work_struct *work)
++{
++	//struct r8180_priv *priv = container_of(work, struct r8180_priv, SwLed0WorkItem);
++	//struct net_device *dev = priv->dev;
++#else
++void  SwLed0WorkItemCallback(void *	Context)
++{
++	//struct net_device *dev = (struct net_device *)Context;
++	//struct r8180_priv *priv = ieee80211_priv(dev);
++#endif
++	//SwLedBlink(dev, &(priv->SwLed0));
++//	printk("=========>%s In\n", __FUNCTION__);
++
++	//LeaveCallbackOfRtWorkItem( &(usbdevice->SwLed0WorkItem) );
++}
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
++void SwLed1WorkItemCallback(struct work_struct *work)
++{
++	//struct r8180_priv *priv = container_of(work, struct r8180_priv, SwLed1WorkItem);
++//	struct net_device *dev = priv->dev;
++#else
++void
++SwLed1WorkItemCallback(
++	void *			Context
++	)
++{
++	//struct net_device *dev = (struct net_device *)Context;
++	//struct r8180_priv *priv = ieee80211_priv(dev);
++#endif
++//	printk("=========>%s In\n", __FUNCTION__);
++	//SwLedBlink(dev, &(priv->SwLed1));
++
++	//LeaveCallbackOfRtWorkItem( &(usbdevice->SwLed1WorkItem) );
++}
++
++//
++//	Implementation of LED blinking behavior.
++//	It toggle off LED and schedule corresponding timer if necessary.
++//
++void
++SwLedBlink(
++	struct net_device *dev, 
++	PLED_8187			pLed
++	)
++{
++	u8 bStopBlinking = 0;
++
++	//printk("=========>%s In state:%d\n", __FUNCTION__, pLed->CurrLedState);
++	// Change LED according to BlinkingLedState specified.
++	if( pLed->BlinkingLedState == LED_ON ) 
++	{
++		SwLedOn(dev, pLed);
++//		printk("Blinktimes (%d): turn on\n", pLed->BlinkTimes);
++	}	
++	else 
++	{
++		SwLedOff(dev, pLed);
++//		printk("Blinktimes (%d): turn off\n", pLed->BlinkTimes);
++	}
++
++	// Determine if we shall change LED state again.
++//by lizhaoming for LED BLINK SLOWLY
++	if(pLed->CurrLedState == LED_BLINK_SLOWLY)
++	{
++		bStopBlinking = 0;
++	} else {
++		pLed->BlinkTimes--;
++		if(	pLed->BlinkTimes == 0 )
++		{
++			bStopBlinking = 1;
++		}
++		else
++		{
++			if(	pLed->CurrLedState != LED_BLINK_NORMAL &&
++					pLed->CurrLedState != LED_BLINK_SLOWLY &&
++					pLed->CurrLedState != LED_BLINK_CM3	)
++			{
++				bStopBlinking = 1;
++			}
++		}
++	}
++
++	if(bStopBlinking)
++	{
++		if(	pLed->CurrLedState == LED_ON && pLed->bLedOn == 0)
++		{
++			SwLedOn(dev, pLed);
++		}
++		else if(pLed->CurrLedState == LED_OFF && pLed->bLedOn == 1)
++		{
++			SwLedOff(dev, pLed);
++		}
++
++		pLed->BlinkTimes = 0;
++		pLed->bLedBlinkInProgress = 0;	
++	}
++	else
++	{
++		// Assign LED state to toggle.
++		if( pLed->BlinkingLedState == LED_ON ) 
++			pLed->BlinkingLedState = LED_OFF;
++		else 
++			pLed->BlinkingLedState = LED_ON;
++
++		// Schedule a timer to toggle LED state. 
++		switch( pLed->CurrLedState )
++		{
++		case LED_BLINK_NORMAL:
++			//printk("LED_BLINK_NORMAL:Blinktimes (%d): turn off\n", pLed->BlinkTimes+1);
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));		
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
++			break;
++
++		case LED_BLINK_SLOWLY:
++			if( pLed->bLedOn == 1 ) 
++			{
++			//printk("LED_BLINK_SLOWLY:turn off\n");
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL+50;//for pcie mini card spec page 33, 250ms
++			//add_timer(&(pLed->BlinkTimer));			
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL+50));
++			pLed->BlinkingLedState = LED_OFF;			
++			} else {
++			//printk("LED_BLINK_SLOWLY:turn on\n");
++			//pLed->BlinkTimer.expires = jiffies + 5000;//for pcie mini card spec page 33, 5s
++			//add_timer(&(pLed->BlinkTimer));
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(5000));
++			pLed->BlinkingLedState = LED_ON;			
++			}	
++			break;
++
++		case LED_BLINK_CM3:
++			//printk("LED_BLINK_CM3:Blinktimes (%d): turn off\n", pLed->BlinkTimes+1);
++			//pLed->BlinkTimer.expires = jiffies + LED_CM3_BLINK_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));			
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM3_BLINK_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM3_BLINK_INTERVAL);
++			break;
++
++		default:
++			//printk("LED_BLINK_default:Blinktimes (%d): turn off\n", pLed->BlinkTimes+1);
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));			
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
++			break;
++		}
++	}
++}
++
++
++
++//
++//	Implementation of LED blinking behavior for SwLedControlMode2. 
++//
++void
++SwLedCm2Blink(
++	struct net_device *dev, 
++	PLED_8187			pLed
++	)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++	//PMGNT_INFO priv = &(dev->MgntInfo);
++	u8 bStopBlinking = 0;
++	
++	//printk("========+++++++++++++=>%s In\n", __FUNCTION__);
++	//To avoid LED blinking when rf is off, add by lizhaoming 2008.6.2
++	if((priv->eRFPowerState == eRfOff) && (priv->RfOffReason>RF_CHANGE_BY_IPS))
++	{
++		SwLedOff(dev, pLed);
++
++		//pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_ON_INTERVAL;
++		//add_timer(&(pLed->BlinkTimer));
++		mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
++		//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM2_BLINK_ON_INTERVAL);
++		//printk(" Hw/Soft Radio Off, turn off Led\n");
++		return;
++	}
++	
++	// Change LED according to BlinkingLedState specified.
++	if( pLed->BlinkingLedState == LED_ON ) 
++	{
++		SwLedOn(dev, pLed);
++		//DMESG("Blinktimes (%d): turn on\n", pLed->BlinkTimes);
++	}	
++	else 
++	{
++		SwLedOff(dev, pLed);
++		//DMESG("Blinktimes (%d): turn off\n", pLed->BlinkTimes);
++	}
++
++	//Add by lizhaoming for avoid BlinkTimers <0, 2008.6.2
++	if(pLed->BlinkTimes > 0)
++	{//by lizhaoming 2008.6.2		
++	// Determine if we shall change LED state again.
++	pLed->BlinkTimes--;	
++	}//by lizhaoming 2008.6.2	
++		
++	switch(pLed->CurrLedState)
++	{
++	case LED_BLINK_NORMAL: 
++		if(pLed->BlinkTimes == 0)
++		{
++			bStopBlinking = 1;
++		}
++		break;
++/* CM2 scan blink and no link blind now not be supported 
++	case LED_SCAN_BLINK:
++		if( (priv->mAssoc || priv->mIbss) &&  // Linked.
++			(!priv->bScanInProgress) && // Not in scan stage.
++			(pLed->BlinkTimes % 2 == 0)) // Even
++		{
++			bStopBlinking = 1;
++		}
++		break;
++
++	case LED_NO_LINK_BLINK:
++		//Revised miniCard Ad-hoc mode "Slow Blink" by Isaiah 2006-08-03	
++		//if( (priv->mAssoc || priv->mIbss) ) // Linked.
++		if( priv->mAssoc) 
++		{
++			bStopBlinking = 1;
++		}
++		else if(priv->mIbss && priv->bMediaConnect )
++		{
++			bStopBlinking = 1;
++		}
++		break;
++*/
++	default:
++		bStopBlinking = 1;
++		break;
++	}
++
++	if(bStopBlinking)
++	{
++/*
++		if( priv->eRFPowerState != eRfOn )
++		{
++			SwLedOff(dev, pLed);
++		}
++		else if( priv->bMediaConnect == 1 && pLed->bLedOn == 0)
++		{
++			SwLedOn(dev, pLed);
++		}
++		else if( priv->bMediaConnect == 0 &&  pLed->bLedOn == 1)
++		{
++			SwLedOff(dev, pLed);
++		}
++*/
++		pLed->BlinkTimes = 0;
++		pLed->bLedBlinkInProgress = 0;	
++	}
++	else
++	{
++		// Assign LED state to toggle.
++		if( pLed->BlinkingLedState == LED_ON ) 
++			pLed->BlinkingLedState = LED_OFF;
++		else 
++			pLed->BlinkingLedState = LED_ON;
++
++		// Schedule a timer to toggle LED state. 
++		switch( pLed->CurrLedState )
++		{
++		case LED_BLINK_NORMAL:
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));			
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
++			break;
++
++		case LED_BLINK_SLOWLY:
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));			
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
++			break;
++
++		case LED_SCAN_BLINK:
++		case LED_NO_LINK_BLINK:
++			if( pLed->bLedOn ) {
++				//pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_ON_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));				
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
++				//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_ON_INTERVAL);
++			} else {
++				//pLed->BlinkTimer.expires = jiffies + LED_CM2_BLINK_OFF_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));		
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
++				//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_CM2_BLINK_OFF_INTERVAL);
++			}
++			break;
++
++		default:
++			//RT_ASSERT(0, ("SwLedCm2Blink(): unexpected state!\n"));
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
++			//PlatformSetTimer(dev, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
++			break;
++		}
++	}
++}
++
++// added by lizhaoming 2008.6.2
++//
++//	Description:
++//		Implement LED blinking behavior for SW_LED_MODE4. 
++//
++void
++SwLedCm4Blink(
++	struct net_device *dev, 
++	PLED_8187			pLed
++	)
++{	
++	struct r8180_priv *priv = ieee80211_priv(dev);	
++	u8 bStopBlinking = 0;
++
++	printk("======++++++++++++++++++======>%s In\n", __FUNCTION__);
++	//To avoid LED blinking when rf is off, add by Maddest 20080307
++	if((priv->eRFPowerState == eRfOff) && (priv->RfOffReason>RF_CHANGE_BY_IPS))
++	{
++		SwLedOff(dev, pLed);
++
++		//pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_ON_INTERVAL;
++		//add_timer(&(pLed->BlinkTimer));		
++		mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_ON_INTERVAL));
++		//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_ON_INTERVAL);
++		printk(" Hw/Soft Radio Off, turn off Led\n");
++		return;
++	}
++	// Change LED according to BlinkingLedState specified.
++	if( pLed->BlinkingLedState == LED_ON ) 
++	{
++		if(!pLed->bLedOn)
++		{
++		SwLedOn(dev, pLed);
++		}
++		printk("Blinktimes (%d): turn on\n", pLed->BlinkTimes);
++	}	
++	else 
++	{
++		SwLedOff(dev, pLed);
++		printk("Blinktimes (%d): turn off\n", pLed->BlinkTimes);
++	}
++
++	//Add by Maddest for avoid BlinkTimers <0, 20080307;
++	if(pLed->BlinkTimes > 0)
++	{
++		// Determine if we shall change LED state again.
++		pLed->BlinkTimes--;
++	}
++	printk("pLed->CurrLedState   %d  pLed->BlinkTimes  %d\n", pLed->CurrLedState,pLed->BlinkTimes);
++	switch(pLed->CurrLedState)
++	{
++	case LED_BLINK_NORMAL: 
++		if(pLed->BlinkTimes == 0)
++		{
++			bStopBlinking = 1;
++		}
++		break;
++
++/* CM2 scan blink and no link blind now not be supported 
++	case LED_SCAN_BLINK:
++		if( (priv->mAssoc || priv->mIbss) &&  // Linked.//????????????
++			(!priv->bScanInProgress) && // Not in scan stage.//????????????
++			(pLed->BlinkTimes % 2 == 0)) // Even
++		{
++			bStopBlinking = 1;
++		}
++		break;
++
++	case LED_NO_LINK_BLINK:
++		//Revised miniCard Ad-hoc mode "Slow Blink" by Isaiah 2006-08-03	
++		//if( (pMgntInfo->mAssoc || pMgntInfo->mIbss) ) // Linked.
++		if( priv->mAssoc) //????????????
++		{
++			bStopBlinking = 1;
++		}
++		else if(priv->mIbss && priv->bMediaConnect )//????????????
++		{
++			bStopBlinking = 1;
++		}
++		break;
++*/
++
++	default:
++		bStopBlinking = 1;
++		break;
++	}
++
++	if(bStopBlinking)
++	{
++	/*
++		if( priv->eRFPowerState != eRfOn )
++		{
++			SwLedOff(dev, pLed);
++		}
++		else if( priv->bMediaConnect == true && pLed->bLedOn == false)//????????????
++		{
++			SwLedOn(dev, pLed);
++		}
++		else if( priv->bMediaConnect == false &&  pLed->bLedOn == true)//????????????
++		{
++			SwLedOff(dev, pLed);
++		}
++	*/
++
++		pLed->BlinkTimes = 0;
++		pLed->bLedBlinkInProgress = 0;	
++	}
++	else
++	{
++		// Assign LED state to toggle.
++		if( pLed->BlinkingLedState == LED_ON ) 
++			pLed->BlinkingLedState = LED_OFF;
++		else 
++			pLed->BlinkingLedState = LED_ON;
++
++		// Schedule a timer to toggle LED state. 
++		switch( pLed->CurrLedState )
++		{
++		case LED_BLINK_NORMAL:
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));	
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++			//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
++			break;
++
++		case LED_BLINK_SLOWLY:
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));	
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
++			//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
++			break;
++
++		case LED_SCAN_BLINK:
++			pLed->BlinkingLedState = LED_ON;
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_NORMAL_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));	
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
++			//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
++			
++		case LED_NO_LINK_BLINK:
++			if( pLed->bLedOn ){
++				//pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_ON_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));	
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_ON_INTERVAL));
++			//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_ON_INTERVAL);
++			}else{
++				//pLed->BlinkTimer.expires = jiffies + LED_CM4_BLINK_OFF_INTERVAL;
++				//add_timer(&(pLed->BlinkTimer));	
++				mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_CM4_BLINK_OFF_INTERVAL));
++				//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_CM4_BLINK_OFF_INTERVAL);
++			}
++			break;
++
++		default:
++			printk("SwLedCm2Blink(): unexpected state!\n");
++			//pLed->BlinkTimer.expires = jiffies + LED_BLINK_SLOWLY_INTERVAL;
++			//add_timer(&(pLed->BlinkTimer));	
++			mod_timer(&pLed->BlinkTimer, jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
++			//PlatformSetTimer(Adapter, &(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL);
++			break;
++		}		
++	}
++}
++
++void
++SwLedOn(
++	struct net_device *dev, 
++	PLED_8187			pLed
++)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++//	printk("=========>%s(), pin:%d\n", __FUNCTION__, pLed->LedPin);
++	switch(pLed->LedPin)
++	{
++	case LED_PIN_GPIO0:
++		write_nic_byte(dev,0x0091,0x01);
++		write_nic_byte(dev,0x0090,0x00);	// write 0 : LED on
++		break;
++
++	case LED_PIN_LED0:
++		priv->PsrValue &= ~(0x01 << 4);
++		write_nic_byte(dev, PSR, priv->PsrValue);
++		break;
++
++	case LED_PIN_LED1:
++		priv->PsrValue &= ~(0x01 << 5);
++		write_nic_byte(dev, PSR, priv->PsrValue);
++		break;
++
++	default:
++		break;
++	}
++
++	pLed->bLedOn = 1;
++}
++
++void
++SwLedOff(
++	struct net_device *dev, 
++	PLED_8187			pLed
++)
++{
++	struct r8180_priv *priv = ieee80211_priv(dev);
++
++
++	//printk("=========>%s(), pin:%d\n", __FUNCTION__, pLed->LedPin);
++	switch(pLed->LedPin)
++	{
++	case LED_PIN_GPIO0:
++		write_nic_byte(dev,0x0091,0x01);
++		write_nic_byte(dev,0x0090,0x01);	// write 1 : LED off
++		break;
++
++	case LED_PIN_LED0:
++		priv->PsrValue |= (0x01 << 4);
++		write_nic_byte(dev, PSR, priv->PsrValue);
++		break;
++
++	case LED_PIN_LED1:
++		priv->PsrValue |= (0x01 << 5);
++		write_nic_byte(dev, PSR, priv->PsrValue);
++		break;
++
++	default:
++		break;
++	}
++
++	pLed->bLedOn = 0;
++}	
++
+Index: drivers/net/wireless/rtl8187B/rtl8187/r8187_led.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/r8187_led.h	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,276 @@
++/*++

++

++Copyright (c) Microsoft Corporation. All rights reserved.

++

++Module Name:

++    r8187_led.h

++

++Abstract:

++    definitions and stuctures for rtl8187 led control.

++    

++Major Change History:

++      When        Who	What

++    ----------	------	----------------------------------------------

++    2006-09-07	Xiong	Created

++

++Notes:

++

++--*/

++

++#ifndef R8187_LED_H

++#define R8187_LED_H

++

++#include <linux/types.h>

++#include <linux/timer.h>

++

++

++/*--------------------------Define -------------------------------------------*/

++//

++// 0x7E-0x7F is reserved for SW customization. 2006.04.21, by rcnjko.

++//

++// BIT[0-7] is for CustomerID where value 0x00 and 0xFF is reserved for Realtek.

++#define EEPROM_SW_REVD_OFFSET		0x7E

++

++#define EEPROM_CID_MASK			0x00FF

++#define EEPROM_CID_RSVD0			0x00

++#define EEPROM_CID_RSVD1			0xFF

++#define EEPROM_CID_ALPHA0			0x01

++#define EEPROM_CID_SERCOMM_PS	0x02

++#define EEPROM_CID_HW_LED			0x03

++

++#define EEPROM_CID_QMI				0x07 	//Added by lizhaoming 2008.6.3

++#define EEPROM_CID_DELL				0x08	        //Added by lizhaoming 2008.6.3

++

++#define LED_BLINK_NORMAL_INTERVAL	100	//by lizhaoming 50 -> 100

++#define LED_BLINK_SLOWLY_INTERVAL	200

++

++// Customized for AzWave, 2006.04.03, by rcnjko.

++#define LED_CM2_BLINK_ON_INTERVAL		250

++#define LED_CM2_BLINK_OFF_INTERVAL	4750

++//

++

++// Customized for Sercomm Printer Server case, 2006.04.21, by rcnjko.

++#define LED_CM3_BLINK_INTERVAL			1500

++

++// by lizhaoming 2008.6.3: Customized for QMI.

++//

++#define LED_CM4_BLINK_ON_INTERVAL		500

++#define LED_CM4_BLINK_OFF_INTERVAL		4500

++

++

++/*--------------------------Define MACRO--------------------------------------*/

++

++

++/*------------------------------Define Struct---------------------------------*/

++typedef	enum _LED_STATE_8187{

++	LED_UNKNOWN = 0,

++	LED_ON = 1,

++	LED_OFF = 2,

++	LED_BLINK_NORMAL = 3,

++	LED_BLINK_SLOWLY = 4,

++	LED_POWER_ON_BLINK = 5,

++	LED_SCAN_BLINK = 6, 	// LED is blinking during scanning period, the # of times to blink is depend on time for scanning.

++	LED_NO_LINK_BLINK = 7,	// LED is blinking during no link state.

++	LED_BLINK_CM3 = 8, 		// Customzied for Sercomm Printer Server case

++}LED_STATE_8187;

++

++typedef enum _RT_CID_TYPE {

++	RT_CID_DEFAULT,

++	RT_CID_8187_ALPHA0,

++	RT_CID_8187_SERCOMM_PS,

++	RT_CID_8187_HW_LED,

++

++	RT_CID_87B_QMI ,	//Added by lizhaoming 2008.6.3

++	RT_CID_87B_DELL,	//Added by lizhaoming 2008.6.3

++	

++} RT_CID_TYPE;

++

++typedef	enum _LED_STRATEGY_8187{

++	SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option.

++	SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA.

++	SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard.

++	SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case.

++	SW_LED_MODE4, //added by lizhaoming for bluetooth 2008.6.3

++	SW_LED_MODE5, //added by lizhaoming for bluetooth 2008.6.3			

++	HW_LED, 		// HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.)

++}LED_STRATEGY_8187, *PLED_STRATEGY_8187;

++

++typedef enum _LED_PIN_8187{

++	LED_PIN_GPIO0,

++	LED_PIN_LED0,

++	LED_PIN_LED1

++}LED_PIN_8187;

++

++//by lizhaoming for LED 2008.6.23 into ieee80211.h

++//typedef enum _LED_CTL_MODE {

++//	LED_CTL_POWER_ON,

++//	LED_CTL_POWER_OFF,

++//	LED_CTL_LINK,

++//	LED_CTL_NO_LINK,

++//	LED_CTL_TX,

++//	LED_CTL_RX,

++//	LED_CTL_SITE_SURVEY,

++//} LED_CTL_MODE;

++

++typedef struct _LED_8187{

++	LED_PIN_8187		LedPin;	// Identify how to implement this SW led.

++

++	LED_STATE_8187		CurrLedState; // Current LED state.

++	u8				bLedOn; // TRUE if LED is ON, FALSE if LED is OFF.

++

++	u8				bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w..

++	u32				BlinkTimes; // Number of times to toggle led state for blinking.

++	LED_STATE_8187		BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are.

++	struct timer_list		BlinkTimer;  // Timer object for led blinking.

++} LED_8187, *PLED_8187;

++

++

++

++/*------------------------Export global variable------------------------------*/

++

++

++/*------------------------------Funciton declaration--------------------------*/

++void

++InitSwLeds(

++	struct net_device *dev

++	);

++

++void

++DeInitSwLeds(

++	struct net_device *dev

++	);

++

++void

++InitLed8187(

++	struct net_device *dev, 

++	PLED_8187		pLed,

++	LED_PIN_8187		LedPin,

++	void	* 		BlinkCallBackFunc);

++

++void

++DeInitLed8187(

++	struct net_device *dev, 

++	PLED_8187			pLed);

++

++void

++LedControl8187(

++	struct net_device *dev,

++	LED_CTL_MODE		LedAction

++);

++

++void

++SwLedControlMode0(

++	struct net_device *dev,

++	LED_CTL_MODE		LedAction

++);

++

++void

++SwLedControlMode1(

++	struct net_device *dev,

++	LED_CTL_MODE		LedAction

++);

++

++void

++SwLedControlMode2(

++	struct net_device *dev,

++	LED_CTL_MODE		LedAction

++);

++

++void

++SwLedControlMode3(

++	struct net_device *dev,

++	LED_CTL_MODE		LedAction

++);

++

++

++void

++SwLedControlMode4(

++	struct net_device *dev,

++	LED_CTL_MODE		LedAction

++);

++

++

++void

++SwLedControlMode5(

++	struct net_device *dev,

++	LED_CTL_MODE		LedAction

++);

++

++void

++Gpio0LedBlinkTimerCallback(

++	unsigned long		data

++	);

++

++void

++SwLed0BlinkTimerCallback(

++	unsigned long		data

++	);

++

++void

++SwLed1BlinkTimerCallback(

++	unsigned long		data

++	);

++

++void

++PlatformSwLedBlink(

++	struct net_device *dev,

++	PLED_8187		pLed

++	);

++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)

++void

++Gpio0LedWorkItemCallback(

++	void *			Context

++	);

++

++void

++SwLed0WorkItemCallback(

++	void *			Context

++	);

++

++void

++SwLed1WorkItemCallback(

++	void *			Context

++	);

++#else

++void

++Gpio0LedWorkItemCallback(struct work_struct *work);

++

++void

++SwLed0WorkItemCallback(struct work_struct *work);

++

++void

++SwLed1WorkItemCallback(struct work_struct *work);

++

++#endif

++void

++SwLedBlink(

++	struct net_device *dev, 

++	PLED_8187			pLed

++	);

++

++void

++SwLedCm2Blink(

++	struct net_device *dev, 

++	PLED_8187			pLed

++	);

++

++void

++SwLedCm4Blink(

++	struct net_device *dev, 

++	PLED_8187			pLed

++	);

++

++void

++SwLedOn(

++	struct net_device *dev, 

++	PLED_8187			pLed

++);

++

++void

++SwLedOff(

++	struct net_device *dev, 

++	PLED_8187			pLed

++);

++

++

++#endif

+Index: drivers/net/wireless/rtl8187B/rtl8187/readme
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/rtl8187/readme	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,124 @@
++rtl8187 Linux kernel driver
++Released under the terms of GNU General Public Licence (GPL)
++Copyright(c) Andrea Merello - 2004,2005
++
++Portions of this driver are based on other projects, please see the notes
++in the source files for detail.
++A special thanks go to Realtek corp for their support and to David Young
++------------------------------------------------------------------------------
++
++This is an attempt to write somethig that can make rtl8187 usb dongle wifi card
++on Linux using only opensource stuff. 
++The rtl8225 radio is supported.
++
++It's in early development stage so don't expect too much from it 
++(also use it at your own risk!)
++This should be considered just a fragment of code.. using it on your(any) 
++system is at your own risk! Please note that I never supported the idea to 
++use it in any way, so i cannot be considered responsible in any way for 
++anything deriving by it usage.
++
++Anyway for now we have monitor mode and managed mode
++basically working! This isn't necessary stable, but seems to work.. 
++
++This driver is still under development and very far from perfect. It should work on x86,
++Other archs are untested..
++
++To compile the driver simply run make.
++
++The driver contains also the ieee80211.h and ieee80211_crypt.h from the ieee stack.
++Note that for some reasons this stack is NOT the same that will be included in newer
++2.6 kernel. I will try to port to this stack as soon as it will have enought features
++to support 8187 cards. 
++Please note that you will have to make sure the two .h files are the same of the ieee
++stack.
++In other words when you download from the CVS this driver and the ieee80211 stack a good
++idea is to copy the ieee80211.h and ieee80211_crypt.h from the ieee directory to the drv
++directory
++
++Warning during compile are OK
++
++To wake up the nic run:
++
++   ifconfig <ifacename> up 
++
++(where <ifacename> is your network device for wlan card).
++
++Please note that the default interface name is wlanX.
++
++Please note thet this will take several seconds.. 
++
++If you would like to set the interface name to something else you may use the 
++'devname=' module parameter. For example:
++
++   insmod r8187.ko ifname=eth%d 
++
++will set the interface name of this device to something like eth0.
++
++Once the nic is up it can be put in a monitor mode by running:
++
++   iwconfig <ifacename> mode monitor
++
++and channel number may be changed by running:
++
++   iwconfig <ifacename> channel XX
++
++
++In monitor mode a choice may be made via iwpriv if the nic should pass packets 
++with bad crc or drop them.
++
++To put the nic in managed mode run:
++
++   iwconfig <ifacename> mode managed
++
++In managed mode there is support for
++
++   iwlist scan
++
++that should report the currently available networks.
++Please note that in managed mode channels cannot be changed manually.
++
++To associate with a network
++   
++   iwconfig <ifacename> essid XXXXX
++
++where XXXXX is the network essid (name) reported by 'iwlist scan'. Please
++note that essid is case sensitive.
++
++If your network is not broadcasting the ESSID, then you need to specify *also*
++the AP MAC address 
++
++   iwconfig <ifacename> ap XX:XX:XX:XX:XX:XX
++
++The driver accepts another boolean parameter: hwseqnum
++If set to 1 it lets the card HW take care of the sequence number of the TXed 
++frames. Altought in managed mode I can't see an important reason to use HW to 
++do that, when we'll start to TX beacons in master (AP) and ad-hoc modes most 
++probably it will be extremely useful (since most probably we will use two HW 
++queues).
++
++I'm unsure if it will work correctly on all NICs.. reports are *VERY, VERY* apreciated.. 
++
++ 
++ WEP
++ ===
++
++WEP encryption should work. For now it's done by host, not by the nic. Key can be set with:
++Key can be set with
++   
++   iwconfig <ifacename> key 12345...
++
++WEP is supported via software thanks to the ipw stack.
++
++Shared and open authentication are supported
++
++ IWPRIV
++ ======
++
++This driver supports some private handlers:
++-badcrc: let you choose to kill or to pass to the upper layer frames with bad crc in monitor mode
++-activescan: if 0 the driver will avoid to send probe requests, sanning will be only on beacon basis
++
++
++If you have some question/comments please feel free to write me.
++
+Index: drivers/net/wireless/rtl8187B/test
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/test	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,15 @@
++#!/bin/bash
++
++./wlan0down
++sleep 1
++./wlan0up
++sleep 6
++while [ 1 ]
++do
++	ifconfig wlan0 essid amyhello
++	ifconfig wlan0 192.168.1.100
++	sleep 30
++	ifconfig wlan0 essid linksys-150N
++	ifconfig wlan0 192.168.1.100
++	sleep 30
++done
+Index: drivers/net/wireless/rtl8187B/wlan0dhcp
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/wlan0dhcp	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,16 @@
++#!/bin/bash
++
++var0=`ps aux|awk '/dhclient wlan0/'|awk '$11!="awk"{print $2}'`
++
++kill $var0
++cp ifcfg-wlan0 /etc/sysconfig/network-scripts/
++
++dhclient wlan0
++
++var1=`ifconfig wlan0 |awk '/inet/{print $2}'|awk -F: '{print $2}'`
++
++
++rm -f /etc/sysconfig/network-scripts/ifcfg-wlan0
++
++echo "get ip: $var1"
++
+Index: drivers/net/wireless/rtl8187B/wlan0down
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/wlan0down	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,25 @@
++#!/bin/bash
++
++ifconfig wlan0 down
++SYSTEM=`uname -r|cut -d. -f1,2`
++
++if [ $SYSTEM = 2.4 ]
++then
++rmmod r8187
++rmmod ieee80211-rtl
++rmmod ieee80211_crypt_ccmp-rtl
++rmmod ieee80211_crypt_tkip-rtl
++rmmod ieee80211_crypt_wep-rtl
++rmmod aes-rtl
++rmmod michael_mic-rtl
++rmmod crypto-rtl
++rmmod ieee80211_crypt-rtl
++else
++rmmod r8187.ko
++rmmod ieee80211-rtl.ko
++rmmod ieee80211_crypt_ccmp-rtl.ko
++rmmod ieee80211_crypt_tkip-rtl.ko
++rmmod ieee80211_crypt_wep-rtl.ko
++rmmod ieee80211_crypt-rtl.ko
++fi
++
+Index: drivers/net/wireless/rtl8187B/wlan0up
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/wlan0up	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,38 @@
++#!/bin/bash
++
++
++SYSTEM=`uname -r|cut -d. -f1,2`
++
++#./ChanPlanBin &
++if [ $SYSTEM = 2.4 ]
++then
++cd ieee80211
++insmod ieee80211_crypt-rtl.o
++insmod crypto-rtl.o
++insmod michael_mic-rtl.o
++insmod aes-rtl.o
++insmod ieee80211_crypt_wep-rtl.o
++insmod ieee80211_crypt_tkip-rtl.o
++insmod ieee80211_crypt_ccmp-rtl.o
++insmod ieee80211-rtl.o
++
++cd ../rtl8187
++insmod r8187.o
++
++else
++cd ieee80211/
++insmod ieee80211_crypt-rtl.ko
++insmod ieee80211_crypt_wep-rtl.ko
++insmod ieee80211_crypt_tkip-rtl.ko
++insmod ieee80211_crypt_ccmp-rtl.ko
++insmod ieee80211-rtl.ko
++
++cd ../rtl8187/
++insmod r8187.ko
++fi
++
++cd ../
++
++cp RadioPower.sh /etc/acpi/events 
++ifconfig wlan0 up > /dev/null
++ 
+Index: drivers/net/wireless/rtl8187B/wpa1.conf
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ drivers/net/wireless/rtl8187B/wpa1.conf	2010-01-09 03:57:45.000000000 +0000
+@@ -0,0 +1,13 @@
++#ctrl_interface=/var/run/wpa_supplicant
++ap_scan=2
++network={
++        ssid="adhoc_lzm"
++	mode=1
++	proto=WPA 
++        key_mgmt=WPA-NONE
++        pairwise=NONE 
++        group=TKIP
++        psk="12345678"
++        priority=2
++       }
++
diff --git a/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/series b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/series
new file mode 100644
index 000000000..638aaa559
--- /dev/null
+++ b/lemote/gnewsense/tags/2.6.27.62-libre5-lemote_0lxo/series
@@ -0,0 +1,8 @@
+2.6.27-mips-fixes.patch -p1
+2.6.27.7-be75987188-loongson.patch -p1 # Lemote's patches
+2.6.27-loongson-fixes.patch -p1
+gnewsense-binutils-flag.patch -p1
+rtl8187B_linux_26.1051.0116.2009_release.patch -p0 # as released by Lemote, modified from Realtek's release
+rtl8187B-build-in.patch -p1 # modified to build within Linux
+100gnu+freedo.patch -p1 # 100% Freedo[m] GNU+Freedo logo
+lxo-config.patch -p0 # config file