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authorAlexandre Oliva <lxoliva@fsfla.org>2011-12-23 07:12:24 +0000
committerAlexandre Oliva <lxoliva@fsfla.org>2011-12-23 07:12:24 +0000
commit6b53d2b6fc080962949122ee843ac4c61c9c66d4 (patch)
tree09153f994b68aec751abd695e2e5f1d7668b4156 /lemote/gnewsense/branches/3.0
parent9b625250d997c2ad12941c27fa06f70ae32e90a6 (diff)
downloadlinux-libre-raptor-6b53d2b6fc080962949122ee843ac4c61c9c66d4.tar.gz
linux-libre-raptor-6b53d2b6fc080962949122ee843ac4c61c9c66d4.zip
3.0.14-libre-lemote_0lxo
Diffstat (limited to 'lemote/gnewsense/branches/3.0')
-rw-r--r--lemote/gnewsense/branches/3.0/3.0.14-d0c1b11d-loongson-community.patch (renamed from lemote/gnewsense/branches/3.0/3.0.11-400389d-loongson-community.patch)480
-rw-r--r--lemote/gnewsense/branches/3.0/lxo-config.patch10
-rw-r--r--lemote/gnewsense/branches/3.0/series2
3 files changed, 475 insertions, 17 deletions
diff --git a/lemote/gnewsense/branches/3.0/3.0.11-400389d-loongson-community.patch b/lemote/gnewsense/branches/3.0/3.0.14-d0c1b11d-loongson-community.patch
index d68773dea..9cd39b575 100644
--- a/lemote/gnewsense/branches/3.0/3.0.11-400389d-loongson-community.patch
+++ b/lemote/gnewsense/branches/3.0/3.0.14-d0c1b11d-loongson-community.patch
@@ -1,5 +1,5 @@
diff --git a/Makefile b/Makefile
-index 11c4249..8ae1bdb 100644
+index f4f577b..ae63338 100644
--- a/Makefile
+++ b/Makefile
@@ -245,8 +245,8 @@ CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
@@ -2280,6 +2280,57 @@ index ce35c9a..4c02d4c 100644
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_FUNCTION_TRACER */
#endif /* _ASM_MIPS_FTRACE_H */
+diff --git a/arch/mips/include/asm/inst.h b/arch/mips/include/asm/inst.h
+index 7ebfc39..0e8ba7c 100644
+--- a/arch/mips/include/asm/inst.h
++++ b/arch/mips/include/asm/inst.h
+@@ -61,6 +61,8 @@ enum spec_op {
+ enum spec2_op {
+ madd_op, maddu_op, mul_op, spec2_3_unused_op,
+ msub_op, msubu_op, /* more unused ops */
++ loongson_madd_op = 0x18, loongson_msub_op,
++ loongson_nmadd_op, loongson_nmsub_op,
+ clz_op = 0x20, clo_op,
+ dclz_op = 0x24, dclo_op,
+ sdbpp_op = 0x3f
+@@ -133,7 +135,7 @@ enum cop0_com_func {
+ */
+ enum cop1_fmt {
+ s_fmt, d_fmt, e_fmt, q_fmt,
+- w_fmt, l_fmt
++ w_fmt, l_fmt, ps_fmt
+ };
+
+ /*
+@@ -161,8 +163,8 @@ enum cop1_sdw_func {
+ */
+ enum cop1x_func {
+ lwxc1_op = 0x00, ldxc1_op = 0x01,
+- pfetch_op = 0x07, swxc1_op = 0x08,
+- sdxc1_op = 0x09, madd_s_op = 0x20,
++ swxc1_op = 0x08, sdxc1_op = 0x09,
++ prefx_op = 0x17, madd_s_op = 0x20,
+ madd_d_op = 0x21, madd_e_op = 0x22,
+ msub_s_op = 0x28, msub_d_op = 0x29,
+ msub_e_op = 0x2a, nmadd_s_op = 0x30,
+@@ -251,7 +253,7 @@ struct f_format { /* FPU register format */
+ unsigned int func : 6;
+ };
+
+-struct ma_format { /* FPU multipy and add format (MIPS IV) */
++struct ma_format { /* FPU multiply and add format (MIPS IV) */
+ unsigned int opcode : 6;
+ unsigned int fr : 5;
+ unsigned int ft : 5;
+@@ -324,7 +326,7 @@ struct f_format { /* FPU register format */
+ unsigned int opcode : 6;
+ };
+
+-struct ma_format { /* FPU multipy and add format (MIPS IV) */
++struct ma_format { /* FPU multiply and add format (MIPS IV) */
+ unsigned int fmt : 2;
+ unsigned int func : 4;
+ unsigned int fd : 5;
diff --git a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
index be8fb42..60be49b 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
@@ -7586,6 +7637,413 @@ index 36020a0..039c2ce 100644
}
#define yl2f89_reboot ml2f_reboot
+diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
+index d32cb05..db167fd 100644
+--- a/arch/mips/math-emu/cp1emu.c
++++ b/arch/mips/math-emu/cp1emu.c
+@@ -7,6 +7,9 @@
+ * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc.
+ *
++ * Loongson instruction support
++ * Copyright (C) 2011 Mark H Weaver <mhw@netris.org>
++ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+@@ -57,6 +60,14 @@
+ #endif
+ #define __mips 4
+
++#ifdef __loongson_fp
++#undef __loongson_fp
++#endif
++#if __mips >= 4 && __mips != 32
++/* Include support for Loongson floating point instructions */
++#define __loongson_fp 1
++#endif
++
+ /* Function which emulates a floating point instruction. */
+
+ static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
+@@ -66,6 +77,10 @@ static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
+ static int fpux_emu(struct pt_regs *,
+ struct mips_fpu_struct *, mips_instruction, void *__user *);
+ #endif
++#ifdef __loongson_fp
++static int loongson_spec2_emu(struct pt_regs *,
++ struct mips_fpu_struct *, mips_instruction, void *__user *);
++#endif
+
+ /* Further private data for which no space exists in mips_fpu_struct */
+
+@@ -203,6 +218,14 @@ static inline int cop1_64bit(struct pt_regs *xcp)
+ #define DPFROMREG(dp, x) DIFROMREG((dp).bits, x)
+ #define DPTOREG(dp, x) DITOREG((dp).bits, x)
+
++/* Support for Loongson paired single floating-point format */
++#define PSIFROMREG(si1, si2, x) ({ u64 di; DIFROMREG(di, x); \
++ (si1) = (u32)di; (si2) = (u32)(di >> 32); })
++#define PSITOREG(si1, si2, x) DITOREG((si1) | ((u64)(si2) << 32), x)
++
++#define PSPFROMREG(sp1, sp2, x) PSIFROMREG((sp1).bits, (sp2).bits, x)
++#define PSPTOREG(sp1, sp2, x) PSITOREG((sp1).bits, (sp2).bits, x)
++
+ /*
+ * Emulate the single floating point instruction pointed at by EPC.
+ * Two instructions if the instruction is in a branch delay slot.
+@@ -569,6 +592,15 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ break;
+ #endif
+
++#ifdef __loongson_fp
++ case spec2_op:{
++ int sig = loongson_spec2_emu(xcp, ctx, ir, fault_addr);
++ if (sig)
++ return sig;
++ break;
++ }
++#endif
++
+ default:
+ return SIGILL;
+ }
+@@ -647,6 +679,172 @@ DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub, );
+ DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
+ DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
+
++#ifdef __loongson_fp
++static int loongson_spec2_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
++ mips_instruction ir, void *__user *fault_addr)
++{
++ int rfmt; /* resulting format */
++ unsigned rcsr = 0; /* resulting csr */
++ union {
++ ieee754dp d;
++ struct {
++ ieee754sp s;
++ ieee754sp s2;
++ };
++ } rv; /* resulting value */
++
++ /* XXX maybe add a counter for loongson spec2 fp instructions? */
++ /* MIPS_FPU_EMU_INC_STATS(cp1xops); */
++
++ switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
++ case s_fmt:{
++ ieee754sp(*handler) (ieee754sp, ieee754sp, ieee754sp);
++ ieee754sp fd, fs, ft;
++
++ switch (MIPSInst_FUNC(ir)) {
++ case loongson_madd_op:
++ handler = fpemu_sp_madd;
++ goto scoptop;
++ case loongson_msub_op:
++ handler = fpemu_sp_msub;
++ goto scoptop;
++ case loongson_nmadd_op:
++ handler = fpemu_sp_nmadd;
++ goto scoptop;
++ case loongson_nmsub_op:
++ handler = fpemu_sp_nmsub;
++ goto scoptop;
++
++ scoptop:
++ SPFROMREG(fd, MIPSInst_FD(ir));
++ SPFROMREG(fs, MIPSInst_FS(ir));
++ SPFROMREG(ft, MIPSInst_FT(ir));
++ rv.s = (*handler) (fd, fs, ft);
++
++ copcsr:
++ if (ieee754_cxtest(IEEE754_INEXACT))
++ rcsr |= FPU_CSR_INE_X | FPU_CSR_INE_S;
++ if (ieee754_cxtest(IEEE754_UNDERFLOW))
++ rcsr |= FPU_CSR_UDF_X | FPU_CSR_UDF_S;
++ if (ieee754_cxtest(IEEE754_OVERFLOW))
++ rcsr |= FPU_CSR_OVF_X | FPU_CSR_OVF_S;
++ if (ieee754_cxtest(IEEE754_INVALID_OPERATION))
++ rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
++
++ break;
++
++ default:
++ return SIGILL;
++ }
++ break;
++ }
++
++ case d_fmt:{
++ ieee754dp(*handler) (ieee754dp, ieee754dp, ieee754dp);
++ ieee754dp fd, fs, ft;
++
++ switch (MIPSInst_FUNC(ir)) {
++ case loongson_madd_op:
++ handler = fpemu_dp_madd;
++ goto dcoptop;
++ case loongson_msub_op:
++ handler = fpemu_dp_msub;
++ goto dcoptop;
++ case loongson_nmadd_op:
++ handler = fpemu_dp_nmadd;
++ goto dcoptop;
++ case loongson_nmsub_op:
++ handler = fpemu_dp_nmsub;
++ goto dcoptop;
++
++ dcoptop:
++ DPFROMREG(fd, MIPSInst_FD(ir));
++ DPFROMREG(fs, MIPSInst_FS(ir));
++ DPFROMREG(ft, MIPSInst_FT(ir));
++ rv.d = (*handler) (fd, fs, ft);
++ goto copcsr;
++
++ default:
++ return SIGILL;
++ }
++ break;
++ }
++
++ case ps_fmt:{
++ ieee754sp(*handler) (ieee754sp, ieee754sp, ieee754sp);
++ struct _ieee754_csr ieee754_csr_save;
++ ieee754sp fd1, fs1, ft1;
++ ieee754sp fd2, fs2, ft2;
++
++ switch (MIPSInst_FUNC(ir)) {
++ case loongson_madd_op:
++ handler = fpemu_sp_madd;
++ goto pscoptop;
++ case loongson_msub_op:
++ handler = fpemu_sp_msub;
++ goto pscoptop;
++ case loongson_nmadd_op:
++ handler = fpemu_sp_nmadd;
++ goto pscoptop;
++ case loongson_nmsub_op:
++ handler = fpemu_sp_nmsub;
++ goto pscoptop;
++
++ pscoptop:
++ PSPFROMREG(fd1, fd2, MIPSInst_FD(ir));
++ PSPFROMREG(fs1, fs2, MIPSInst_FS(ir));
++ PSPFROMREG(ft1, ft2, MIPSInst_FT(ir));
++ rv.s = (*handler) (fd1, fs1, ft1);
++ ieee754_csr_save = ieee754_csr;
++ rv.s2 = (*handler) (fd2, fs2, ft2);
++ ieee754_csr.cx |= ieee754_csr_save.cx;
++ ieee754_csr.sx |= ieee754_csr_save.sx;
++ goto copcsr;
++
++ default:
++ return SIGILL;
++ }
++ break;
++ }
++
++ default:
++ return SIGILL;
++ }
++
++ /*
++ * Update the fpu CSR register for this operation.
++ * If an exception is required, generate a tidy SIGFPE exception,
++ * without updating the result register.
++ * Note: cause exception bits do not accumulate, they are rewritten
++ * for each op; only the flag/sticky bits accumulate.
++ */
++ ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
++ if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
++ /*printk ("SIGFPE: fpu csr = %08x\n",ctx->fcr31); */
++ return SIGFPE;
++ }
++
++ /*
++ * Now we can safely write the result back to the register file.
++ */
++ switch (rfmt) {
++ case d_fmt:
++ DPTOREG(rv.d, MIPSInst_FD(ir));
++ break;
++ case s_fmt:
++ SPTOREG(rv.s, MIPSInst_FD(ir));
++ break;
++ case ps_fmt:
++ PSPTOREG(rv.s, rv.s2, MIPSInst_FD(ir));
++ break;
++ default:
++ return SIGILL;
++ }
++
++ return 0;
++}
++#endif
++
+ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ mips_instruction ir, void *__user *fault_addr)
+ {
+@@ -740,7 +938,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ break;
+
+ default:
+- return SIGILL;
++ goto SIGILL_unless_prefx_op;
+ }
+ break;
+ }
+@@ -810,19 +1008,17 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ goto copcsr;
+
+ default:
+- return SIGILL;
++ goto SIGILL_unless_prefx_op;
+ }
+ break;
+ }
+
+- case 0x7: /* 7 */
+- if (MIPSInst_FUNC(ir) != pfetch_op) {
+- return SIGILL;
+- }
+- /* ignore prefx operation */
+- break;
+-
+ default:
++ SIGILL_unless_prefx_op:
++ if (MIPSInst_FUNC(ir) == prefx_op) {
++ /* ignore prefx operation */
++ break;
++ }
+ return SIGILL;
+ }
+
+@@ -843,7 +1039,12 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ unsigned cond;
+ union {
+ ieee754dp d;
+- ieee754sp s;
++ struct {
++ ieee754sp s;
++#ifdef __loongson_fp
++ ieee754sp s2; /* for Loongson paired singles */
++#endif
++ };
+ int w;
+ #ifdef __mips64
+ s64 l;
+@@ -915,7 +1116,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ case fmov_op:
+ /* an easy one */
+ SPFROMREG(rv.s, MIPSInst_FS(ir));
+- goto copcsr;
++ break;
+
+ /* binary op on handler */
+ scopbop:
+@@ -1102,7 +1303,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ case fmov_op:
+ /* an easy one */
+ DPFROMREG(rv.d, MIPSInst_FS(ir));
+- goto copcsr;
++ break;
+
+ /* binary op on handler */
+ dcopbop:{
+@@ -1213,6 +1414,83 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ break;
+ }
+
++#ifdef __loongson_fp
++ case ps_fmt:{ /* 6 */
++ /* Support for Loongson paired single fp instructions */
++ union {
++ ieee754sp(*b) (ieee754sp, ieee754sp);
++ ieee754sp(*u) (ieee754sp);
++ } handler;
++
++ switch (MIPSInst_FUNC(ir)) {
++ /* binary ops */
++ case fadd_op:
++ handler.b = ieee754sp_add;
++ goto pscopbop;
++ case fsub_op:
++ handler.b = ieee754sp_sub;
++ goto pscopbop;
++ case fmul_op:
++ handler.b = ieee754sp_mul;
++ goto pscopbop;
++
++ /* unary ops */
++ case fabs_op:
++ handler.u = ieee754sp_abs;
++ goto pscopuop;
++ case fneg_op:
++ handler.u = ieee754sp_neg;
++ goto pscopuop;
++ case fmov_op:
++ /* an easy one */
++ PSPFROMREG(rv.s, rv.s2, MIPSInst_FS(ir));
++ break;
++
++ pscopbop: /* paired binary op handler */
++ {
++ struct _ieee754_csr ieee754_csr_save;
++ ieee754sp fs1, ft1;
++ ieee754sp fs2, ft2;
++
++ PSPFROMREG(fs1, fs2, MIPSInst_FS(ir));
++ PSPFROMREG(ft1, ft2, MIPSInst_FT(ir));
++ rv.s = (*handler.b) (fs1, ft1);
++ ieee754_csr_save = ieee754_csr;
++ rv.s2 = (*handler.b) (fs2, ft2);
++ ieee754_csr.cx |= ieee754_csr_save.cx;
++ ieee754_csr.sx |= ieee754_csr_save.sx;
++ goto copcsr;
++ }
++ pscopuop: /* paired unary op handler */
++ {
++ struct _ieee754_csr ieee754_csr_save;
++ ieee754sp fs1;
++ ieee754sp fs2;
++
++ PSPFROMREG(fs1, fs2, MIPSInst_FS(ir));
++ rv.s = (*handler.u) (fs1);
++ ieee754_csr_save = ieee754_csr;
++ rv.s2 = (*handler.u) (fs2);
++ ieee754_csr.cx |= ieee754_csr_save.cx;
++ ieee754_csr.sx |= ieee754_csr_save.sx;
++ goto copcsr;
++ }
++ break;
++
++ default:
++ if (MIPSInst_FUNC(ir) >= fcmp_op) {
++ /* Loongson fp hardware handles all
++ cases of fp compare insns, so we
++ shouldn't have to */
++ printk ("Loongson paired-single fp compare"
++ " unimplemented in cp1emu.c\n");
++ }
++ return SIGILL;
++ }
++ break;
++ }
++#endif
++
+ case w_fmt:{
+ ieee754sp fs;
+
+@@ -1302,6 +1580,11 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ DITOREG(rv.l, MIPSInst_FD(ir));
+ break;
+ #endif
++#ifdef __loongson_fp
++ case ps_fmt:
++ PSPTOREG(rv.s, rv.s2, MIPSInst_FD(ir));
++ break;
++#endif
+ default:
+ return SIGILL;
+ }
diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c
index 16c4d25..8182758 100644
--- a/arch/mips/mm/c-octeon.c
@@ -8163,10 +8621,10 @@ index 628c8fa..a6e6c96 100644
#define wrmsr(x, y, z) do { } while (0)
#define use_msr 0
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
-index 36ca465..5cde46c 100644
+index 7e0acf4..c8121d3 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
-@@ -588,6 +588,13 @@ config HID_ZYDACRON
+@@ -589,6 +589,13 @@ config HID_ZYDACRON
---help---
Support for Zydacron remote control.
@@ -8409,10 +8867,10 @@ index 0000000..67cc095
+MODULE_LICENSE("GPL");
+
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
-index a756ee6..476a53d 100644
+index 206f750..c3b0720 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
-@@ -671,4 +671,6 @@
+@@ -691,4 +691,6 @@
#define USB_VENDOR_ID_ZYDACRON 0x13EC
#define USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL 0x0006
@@ -47941,7 +48399,7 @@ index f9cf3f0..5fc952d 100644
if (quirk_zfmicro(ohci) && (ints & OHCI_INTR_SF)) {
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
-index 629a968..dc80087 100644
+index a495d48..33d3f2fe 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -55,6 +55,16 @@
@@ -48019,7 +48477,7 @@ index 629a968..dc80087 100644
static const struct dmi_system_id __devinitconst ehci_dmi_nohandoff_table[] = {
{
/* Pegatron Lucid (ExoPC) */
-@@ -688,6 +698,9 @@ static void __devinit quirk_usb_disable_ehci(struct pci_dev *pdev)
+@@ -687,6 +697,9 @@ static void __devinit quirk_usb_disable_ehci(struct pci_dev *pdev)
iounmap(base);
}
@@ -48029,7 +48487,7 @@ index 629a968..dc80087 100644
/*
* handshake - spin reading a register until handshake completes
-@@ -776,6 +789,7 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
+@@ -775,6 +788,7 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
}
EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);
@@ -48037,7 +48495,7 @@ index 629a968..dc80087 100644
/**
* PCI Quirks for xHCI.
*
-@@ -870,6 +884,9 @@ hc_init:
+@@ -869,6 +883,9 @@ hc_init:
iounmap(base);
}
@@ -48048,7 +48506,7 @@ index 629a968..dc80087 100644
static void __devinit quirk_usb_early_handoff(struct pci_dev *pdev)
{
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
-index fe22e90..5534ed6 100644
+index d2becb9..abcf8d7 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -78,6 +78,9 @@ static void option_instat_callback(struct urb *urb);
@@ -48061,7 +48519,7 @@ index fe22e90..5534ed6 100644
#define HUAWEI_VENDOR_ID 0x12D1
#define HUAWEI_PRODUCT_E600 0x1001
#define HUAWEI_PRODUCT_E220 0x1003
-@@ -533,6 +536,7 @@ static const struct usb_device_id option_ids[] = {
+@@ -572,6 +575,7 @@ static const struct usb_device_id option_ids[] = {
{ USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_GLX) },
{ USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_GKE) },
{ USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_GLE) },
diff --git a/lemote/gnewsense/branches/3.0/lxo-config.patch b/lemote/gnewsense/branches/3.0/lxo-config.patch
index 619acb087..3262dc3fc 100644
--- a/lemote/gnewsense/branches/3.0/lxo-config.patch
+++ b/lemote/gnewsense/branches/3.0/lxo-config.patch
@@ -1,11 +1,11 @@
Index: Makefile
===================================================================
---- Makefile.orig 2011-12-11 05:21:21.000000000 +0000
-+++ Makefile 2011-12-11 05:21:27.000000000 +0000
+--- Makefile.orig 2011-12-22 06:37:01.000000000 +0000
++++ Makefile 2011-12-22 06:37:06.000000000 +0000
@@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 0
- SUBLEVEL = 13
+ SUBLEVEL = 14
-EXTRAVERSION =-libre
+EXTRAVERSION =-libre-lemote
NAME = Sneaky Weasel
@@ -14,11 +14,11 @@ Index: Makefile
Index: .config
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ .config 2011-12-11 05:27:34.000000000 +0000
++++ .config 2011-12-22 06:43:09.000000000 +0000
@@ -0,0 +1,4596 @@
+#
+# Automatically generated make config: don't edit
-+# Linux/mips 3.0.13-libre-lemote Kernel Configuration
++# Linux/mips 3.0.14-libre-lemote Kernel Configuration
+#
+CONFIG_MIPS=y
+
diff --git a/lemote/gnewsense/branches/3.0/series b/lemote/gnewsense/branches/3.0/series
index e6c37ace5..685a498a8 100644
--- a/lemote/gnewsense/branches/3.0/series
+++ b/lemote/gnewsense/branches/3.0/series
@@ -1,4 +1,4 @@
-3.0.11-400389d-loongson-community.patch -p1 # loongson-community patches
+3.0.14-d0c1b11d-loongson-community.patch -p1 # loongson-community patches
gnewsense-binutils-flag.patch -p0
100gnu+freedo.patch -p1 # 100% Freedo[m] GNU+Freedo logo
lxo-config.patch -p0 # config file
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