4.5.0-0.rc7.git0.1.fc25.gnu

67 files changed, 7290 insertions, 14603 deletions

diff --git a/freed-ora/current/f24/0001-device-property-always-check-for-fwnode-type.patch b/freed-ora/current/f24/0001-device-property-always-check-for-fwnode-type.patch
deleted file mode 100644
index c62956b73..000000000
--- a/freed-ora/current/f24/0001-device-property-always-check-for-fwnode-type.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From e3f9e299bf94298ddd8beb63c0786a4d7766dc86 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:29 +0200
-Subject: [PATCH 01/16] device property: always check for fwnode type
-
-Currently the property accessors unconditionally fall back to built-in property
-set as a last resort. Make this strict and return an error in case the type of
-fwnode is unknown.
-
-This is actually a follow up to the commit 4fa7508e9f1c (device property:
-Return -ENXIO if there is no suitable FW interface).
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/property.c | 12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/base/property.c b/drivers/base/property.c
-index 1325ff2..09e488d 100644
---- a/drivers/base/property.c
-+++ b/drivers/base/property.c
-@@ -135,8 +135,9 @@ bool fwnode_property_present(struct fwnode_handle *fwnode, const char *propname)
- 		return of_property_read_bool(to_of_node(fwnode), propname);
- 	else if (is_acpi_node(fwnode))
- 		return !acpi_node_prop_get(fwnode, propname, NULL);
--
--	return !!pset_prop_get(to_pset(fwnode), propname);
-+	else if (is_pset(fwnode))
-+		return !!pset_prop_get(to_pset(fwnode), propname);
-+	return false;
- }
- EXPORT_SYMBOL_GPL(fwnode_property_present);
- 
-@@ -494,9 +495,10 @@ int fwnode_property_read_string(struct fwnode_handle *fwnode,
- 	else if (is_acpi_node(fwnode))
- 		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
- 					   val, 1);
--
--	return pset_prop_read_array(to_pset(fwnode), propname,
--				    DEV_PROP_STRING, val, 1);
-+	else if (is_pset(fwnode))
-+		return pset_prop_read_array(to_pset(fwnode), propname,
-+					    DEV_PROP_STRING, val, 1);
-+	return -ENXIO;
- }
- EXPORT_SYMBOL_GPL(fwnode_property_read_string);
- 
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch b/freed-ora/current/f24/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch
new file mode 100644
index 000000000..44ef3662b
--- /dev/null
+++ b/freed-ora/current/f24/0001-mm-CONFIG_NR_ZONES_EXTENDED.patch
@@ -0,0 +1,173 @@
+From 8b368e8e961944105945fbe36f3f264252bfd19a Mon Sep 17 00:00:00 2001
+From: Dan Williams <dan.j.williams@intel.com>
+Date: Thu, 25 Feb 2016 01:02:30 +0000
+Subject: [PATCH] mm: CONFIG_NR_ZONES_EXTENDED
+
+ZONE_DEVICE (merged in 4.3) and ZONE_CMA (proposed) are examples of new mm
+zones that are bumping up against the current maximum limit of 4 zones,
+i.e.  2 bits in page->flags.  When adding a zone this equation still needs
+to be satisified:
+
+    SECTIONS_WIDTH + ZONES_WIDTH + NODES_SHIFT + LAST_CPUPID_SHIFT
+	  <= BITS_PER_LONG - NR_PAGEFLAGS
+
+ZONE_DEVICE currently tries to satisfy this equation by requiring that
+ZONE_DMA be disabled, but this is untenable given generic kernels want to
+support ZONE_DEVICE and ZONE_DMA simultaneously.  ZONE_CMA would like to
+increase the amount of memory covered per section, but that limits the
+minimum granularity at which consecutive memory ranges can be added via
+devm_memremap_pages().
+
+The trade-off of what is acceptable to sacrifice depends heavily on the
+platform.  For example, ZONE_CMA is targeted for 32-bit platforms where
+page->flags is constrained, but those platforms likely do not care about
+the minimum granularity of memory hotplug.  A big iron machine with 1024
+numa nodes can likely sacrifice ZONE_DMA where a general purpose
+distribution kernel can not.
+
+CONFIG_NR_ZONES_EXTENDED is a configuration symbol that gets selected when
+the number of configured zones exceeds 4.  It documents the configuration
+symbols and definitions that get modified when ZONES_WIDTH is greater than
+2.
+
+For now, it steals a bit from NODES_SHIFT.  Later on it can be used to
+document the definitions that get modified when a 32-bit configuration
+wants more zone bits.
+
+Note that GFP_ZONE_TABLE poses an interesting constraint since
+include/linux/gfp.h gets included by the 32-bit portion of a 64-bit build.
+We need to be careful to only build the table for zones that have a
+corresponding gfp_t flag.  GFP_ZONES_SHIFT is introduced for this purpose.
+This patch does not attempt to solve the problem of adding a new zone
+that also has a corresponding GFP_ flag.
+
+Link: https://bugzilla.kernel.org/show_bug.cgi?id=110931
+Fixes: 033fbae988fc ("mm: ZONE_DEVICE for "device memory"")
+Signed-off-by: Dan Williams <dan.j.williams@intel.com>
+Reported-by: Mark <markk@clara.co.uk>
+Cc: Mel Gorman <mgorman@suse.de>
+Cc: Rik van Riel <riel@redhat.com>
+Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
+Cc: Dave Hansen <dave.hansen@linux.intel.com>
+Cc: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+---
+ arch/x86/Kconfig                  |  6 ++++--
+ include/linux/gfp.h               | 33 ++++++++++++++++++++-------------
+ include/linux/page-flags-layout.h |  2 ++
+ mm/Kconfig                        |  7 +++++--
+ 4 files changed, 31 insertions(+), 17 deletions(-)
+
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
+index 3fef519..b94704a 100644
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -1409,8 +1409,10 @@ config NUMA_EMU
+ 
+ config NODES_SHIFT
+ 	int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
+-	range 1 10
+-	default "10" if MAXSMP
++	range 1 10 if !NR_ZONES_EXTENDED
++	range 1 9 if NR_ZONES_EXTENDED
++	default "10" if MAXSMP && !NR_ZONES_EXTENDED
++	default "9" if MAXSMP && NR_ZONES_EXTENDED
+ 	default "6" if X86_64
+ 	default "3"
+ 	depends on NEED_MULTIPLE_NODES
+diff --git a/include/linux/gfp.h b/include/linux/gfp.h
+index af1f2b2..d201d8a 100644
+--- a/include/linux/gfp.h
++++ b/include/linux/gfp.h
+@@ -329,22 +329,29 @@ static inline bool gfpflags_allow_blocking(const gfp_t gfp_flags)
+  *       0xe    => BAD (MOVABLE+DMA32+HIGHMEM)
+  *       0xf    => BAD (MOVABLE+DMA32+HIGHMEM+DMA)
+  *
+- * ZONES_SHIFT must be <= 2 on 32 bit platforms.
++ * GFP_ZONES_SHIFT must be <= 2 on 32 bit platforms.
+  */
+ 
+-#if 16 * ZONES_SHIFT > BITS_PER_LONG
+-#error ZONES_SHIFT too large to create GFP_ZONE_TABLE integer
++#if defined(CONFIG_ZONE_DEVICE) && (MAX_NR_ZONES-1) <= 4
++/* ZONE_DEVICE is not a valid GFP zone specifier */
++#define GFP_ZONES_SHIFT 2
++#else
++#define GFP_ZONES_SHIFT ZONES_SHIFT
++#endif
++
++#if 16 * GFP_ZONES_SHIFT > BITS_PER_LONG
++#error GFP_ZONES_SHIFT too large to create GFP_ZONE_TABLE integer
+ #endif
+ 
+ #define GFP_ZONE_TABLE ( \
+-	(ZONE_NORMAL << 0 * ZONES_SHIFT)				      \
+-	| (OPT_ZONE_DMA << ___GFP_DMA * ZONES_SHIFT)			      \
+-	| (OPT_ZONE_HIGHMEM << ___GFP_HIGHMEM * ZONES_SHIFT)		      \
+-	| (OPT_ZONE_DMA32 << ___GFP_DMA32 * ZONES_SHIFT)		      \
+-	| (ZONE_NORMAL << ___GFP_MOVABLE * ZONES_SHIFT)			      \
+-	| (OPT_ZONE_DMA << (___GFP_MOVABLE | ___GFP_DMA) * ZONES_SHIFT)	      \
+-	| (ZONE_MOVABLE << (___GFP_MOVABLE | ___GFP_HIGHMEM) * ZONES_SHIFT)   \
+-	| (OPT_ZONE_DMA32 << (___GFP_MOVABLE | ___GFP_DMA32) * ZONES_SHIFT)   \
++	(ZONE_NORMAL << 0 * GFP_ZONES_SHIFT)					\
++	| (OPT_ZONE_DMA << ___GFP_DMA * GFP_ZONES_SHIFT)			\
++	| (OPT_ZONE_HIGHMEM << ___GFP_HIGHMEM * GFP_ZONES_SHIFT)		\
++	| (OPT_ZONE_DMA32 << ___GFP_DMA32 * GFP_ZONES_SHIFT)		      	\
++	| (ZONE_NORMAL << ___GFP_MOVABLE * GFP_ZONES_SHIFT)			\
++	| (OPT_ZONE_DMA << (___GFP_MOVABLE | ___GFP_DMA) * GFP_ZONES_SHIFT)	\
++	| (ZONE_MOVABLE << (___GFP_MOVABLE | ___GFP_HIGHMEM) * GFP_ZONES_SHIFT)	\
++	| (OPT_ZONE_DMA32 << (___GFP_MOVABLE | ___GFP_DMA32) * GFP_ZONES_SHIFT)	\
+ )
+ 
+ /*
+@@ -369,8 +376,8 @@ static inline enum zone_type gfp_zone(gfp_t flags)
+ 	enum zone_type z;
+ 	int bit = (__force int) (flags & GFP_ZONEMASK);
+ 
+-	z = (GFP_ZONE_TABLE >> (bit * ZONES_SHIFT)) &
+-					 ((1 << ZONES_SHIFT) - 1);
++	z = (GFP_ZONE_TABLE >> (bit * GFP_ZONES_SHIFT)) &
++					 ((1 << GFP_ZONES_SHIFT) - 1);
+ 	VM_BUG_ON((GFP_ZONE_BAD >> bit) & 1);
+ 	return z;
+ }
+diff --git a/include/linux/page-flags-layout.h b/include/linux/page-flags-layout.h
+index da52366..77b078c 100644
+--- a/include/linux/page-flags-layout.h
++++ b/include/linux/page-flags-layout.h
+@@ -17,6 +17,8 @@
+ #define ZONES_SHIFT 1
+ #elif MAX_NR_ZONES <= 4
+ #define ZONES_SHIFT 2
++#elif MAX_NR_ZONES <= 8
++#define ZONES_SHIFT 3
+ #else
+ #error ZONES_SHIFT -- too many zones configured adjust calculation
+ #endif
+diff --git a/mm/Kconfig b/mm/Kconfig
+index 031a329..7826216 100644
+--- a/mm/Kconfig
++++ b/mm/Kconfig
+@@ -652,8 +652,6 @@ config IDLE_PAGE_TRACKING
+ 
+ config ZONE_DEVICE
+ 	bool "Device memory (pmem, etc...) hotplug support"
+-	default !ZONE_DMA
+-	depends on !ZONE_DMA
+ 	depends on MEMORY_HOTPLUG
+ 	depends on MEMORY_HOTREMOVE
+ 	depends on X86_64 #arch_add_memory() comprehends device memory
+@@ -667,5 +665,10 @@ config ZONE_DEVICE
+ 
+ 	  If FS_DAX is enabled, then say Y.
+ 
++config NR_ZONES_EXTENDED
++	bool
++	default n if !64BIT
++	default y if ZONE_DEVICE && ZONE_DMA && ZONE_DMA32
++
+ config FRAME_VECTOR
+ 	bool
+-- 
+2.5.0
+
diff --git a/freed-ora/current/f24/0002-device-property-rename-helper-functions.patch b/freed-ora/current/f24/0002-device-property-rename-helper-functions.patch
deleted file mode 100644
index 08045e518..000000000
--- a/freed-ora/current/f24/0002-device-property-rename-helper-functions.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 61f5e294b89a90e8520c9eaf9a4af787db8911ea Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:30 +0200
-Subject: [PATCH 02/16] device property: rename helper functions
-
-To be in align with the rest of fwnode types we rename the built-in property
-set ones, i.e.
-	is_pset() -> is_pset_node()
-	to_pset() -> to_pset_node()
-
-There is no functional change.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/property.c | 22 +++++++++++-----------
- 1 file changed, 11 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/base/property.c b/drivers/base/property.c
-index 09e488d..2e01f3f 100644
---- a/drivers/base/property.c
-+++ b/drivers/base/property.c
-@@ -37,14 +37,14 @@ void device_add_property_set(struct device *dev, struct property_set *pset)
- }
- EXPORT_SYMBOL_GPL(device_add_property_set);
- 
--static inline bool is_pset(struct fwnode_handle *fwnode)
-+static inline bool is_pset_node(struct fwnode_handle *fwnode)
- {
- 	return fwnode && fwnode->type == FWNODE_PDATA;
- }
- 
--static inline struct property_set *to_pset(struct fwnode_handle *fwnode)
-+static inline struct property_set *to_pset_node(struct fwnode_handle *fwnode)
- {
--	return is_pset(fwnode) ?
-+	return is_pset_node(fwnode) ?
- 		container_of(fwnode, struct property_set, fwnode) : NULL;
- }
- 
-@@ -135,8 +135,8 @@ bool fwnode_property_present(struct fwnode_handle *fwnode, const char *propname)
- 		return of_property_read_bool(to_of_node(fwnode), propname);
- 	else if (is_acpi_node(fwnode))
- 		return !acpi_node_prop_get(fwnode, propname, NULL);
--	else if (is_pset(fwnode))
--		return !!pset_prop_get(to_pset(fwnode), propname);
-+	else if (is_pset_node(fwnode))
-+		return !!pset_prop_get(to_pset_node(fwnode), propname);
- 	return false;
- }
- EXPORT_SYMBOL_GPL(fwnode_property_present);
-@@ -323,8 +323,8 @@ EXPORT_SYMBOL_GPL(device_property_match_string);
- 	else if (is_acpi_node(_fwnode_)) \
- 		_ret_ = acpi_node_prop_read(_fwnode_, _propname_, _proptype_, \
- 					    _val_, _nval_); \
--	else if (is_pset(_fwnode_)) \
--		_ret_ = pset_prop_read_array(to_pset(_fwnode_), _propname_, \
-+	else if (is_pset_node(_fwnode_)) 						\
-+		_ret_ = pset_prop_read_array(to_pset_node(_fwnode_), _propname_,	\
- 					     _proptype_, _val_, _nval_); \
- 	else \
- 		_ret_ = -ENXIO; \
-@@ -465,8 +465,8 @@ int fwnode_property_read_string_array(struct fwnode_handle *fwnode,
- 	else if (is_acpi_node(fwnode))
- 		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
- 					   val, nval);
--	else if (is_pset(fwnode))
--		return pset_prop_read_array(to_pset(fwnode), propname,
-+	else if (is_pset_node(fwnode))
-+		return pset_prop_read_array(to_pset_node(fwnode), propname,
- 					    DEV_PROP_STRING, val, nval);
- 	return -ENXIO;
- }
-@@ -495,8 +495,8 @@ int fwnode_property_read_string(struct fwnode_handle *fwnode,
- 	else if (is_acpi_node(fwnode))
- 		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
- 					   val, 1);
--	else if (is_pset(fwnode))
--		return pset_prop_read_array(to_pset(fwnode), propname,
-+	else if (is_pset_node(fwnode))
-+		return pset_prop_read_array(to_pset_node(fwnode), propname,
- 					    DEV_PROP_STRING, val, 1);
- 	return -ENXIO;
- }
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0003-device-property-refactor-built-in-properties-support.patch b/freed-ora/current/f24/0003-device-property-refactor-built-in-properties-support.patch
deleted file mode 100644
index 459a74e49..000000000
--- a/freed-ora/current/f24/0003-device-property-refactor-built-in-properties-support.patch
+++ /dev/null
@@ -1,236 +0,0 @@
-From 318a1971826103ecf560875b17236dd4a93e8c88 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:31 +0200
-Subject: [PATCH 03/16] device property: refactor built-in properties support
-
-Instead of using the type and nval fields we will use length (in bytes) of the
-value. The sanity check is done in the accessors.
-
-The built-in property accessors are split in the same way such as device tree.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/property.c  | 150 ++++++++++++++++++++++++++++++++++-------------
- include/linux/property.h |   8 +--
- 2 files changed, 113 insertions(+), 45 deletions(-)
-
-diff --git a/drivers/base/property.c b/drivers/base/property.c
-index 2e01f3f..86834bd 100644
---- a/drivers/base/property.c
-+++ b/drivers/base/property.c
-@@ -63,45 +63,107 @@ static struct property_entry *pset_prop_get(struct property_set *pset,
- 	return NULL;
- }
- 
--static int pset_prop_read_array(struct property_set *pset, const char *name,
--				enum dev_prop_type type, void *val, size_t nval)
-+static void *pset_prop_find(struct property_set *pset, const char *propname,
-+			    size_t length)
- {
- 	struct property_entry *prop;
--	unsigned int item_size;
-+	void *pointer;
- 
--	prop = pset_prop_get(pset, name);
-+	prop = pset_prop_get(pset, propname);
-+	if (!prop)
-+		return ERR_PTR(-EINVAL);
-+	pointer = prop->value.raw_data;
-+	if (!pointer)
-+		return ERR_PTR(-ENODATA);
-+	if (length > prop->length)
-+		return ERR_PTR(-EOVERFLOW);
-+	return pointer;
-+}
-+
-+static int pset_prop_read_u8_array(struct property_set *pset,
-+				   const char *propname,
-+				   u8 *values, size_t nval)
-+{
-+	void *pointer;
-+	size_t length = nval * sizeof(*values);
-+
-+	pointer = pset_prop_find(pset, propname, length);
-+	if (IS_ERR(pointer))
-+		return PTR_ERR(pointer);
-+
-+	memcpy(values, pointer, length);
-+	return 0;
-+}
-+
-+static int pset_prop_read_u16_array(struct property_set *pset,
-+				    const char *propname,
-+				    u16 *values, size_t nval)
-+{
-+	void *pointer;
-+	size_t length = nval * sizeof(*values);
-+
-+	pointer = pset_prop_find(pset, propname, length);
-+	if (IS_ERR(pointer))
-+		return PTR_ERR(pointer);
-+
-+	memcpy(values, pointer, length);
-+	return 0;
-+}
-+
-+static int pset_prop_read_u32_array(struct property_set *pset,
-+				    const char *propname,
-+				    u32 *values, size_t nval)
-+{
-+	void *pointer;
-+	size_t length = nval * sizeof(*values);
-+
-+	pointer = pset_prop_find(pset, propname, length);
-+	if (IS_ERR(pointer))
-+		return PTR_ERR(pointer);
-+
-+	memcpy(values, pointer, length);
-+	return 0;
-+}
-+
-+static int pset_prop_read_u64_array(struct property_set *pset,
-+				    const char *propname,
-+				    u64 *values, size_t nval)
-+{
-+	void *pointer;
-+	size_t length = nval * sizeof(*values);
-+
-+	pointer = pset_prop_find(pset, propname, length);
-+	if (IS_ERR(pointer))
-+		return PTR_ERR(pointer);
-+
-+	memcpy(values, pointer, length);
-+	return 0;
-+}
-+
-+static int pset_prop_count_elems_of_size(struct property_set *pset,
-+					 const char *propname, size_t length)
-+{
-+	struct property_entry *prop;
-+
-+	prop = pset_prop_get(pset, propname);
- 	if (!prop)
--		return -ENODATA;
--
--	if (prop->type != type)
--		return -EPROTO;
--
--	if (!val)
--		return prop->nval;
--
--	if (prop->nval < nval)
--		return -EOVERFLOW;
--
--	switch (type) {
--	case DEV_PROP_U8:
--		item_size = sizeof(u8);
--		break;
--	case DEV_PROP_U16:
--		item_size = sizeof(u16);
--		break;
--	case DEV_PROP_U32:
--		item_size = sizeof(u32);
--		break;
--	case DEV_PROP_U64:
--		item_size = sizeof(u64);
--		break;
--	case DEV_PROP_STRING:
--		item_size = sizeof(const char *);
--		break;
--	default:
- 		return -EINVAL;
--	}
--	memcpy(val, prop->value.raw_data, nval * item_size);
-+
-+	return prop->length / length;
-+}
-+
-+static int pset_prop_read_string_array(struct property_set *pset,
-+				       const char *propname,
-+				       const char **strings, size_t nval)
-+{
-+	void *pointer;
-+	size_t length = nval * sizeof(*strings);
-+
-+	pointer = pset_prop_find(pset, propname, length);
-+	if (IS_ERR(pointer))
-+		return PTR_ERR(pointer);
-+
-+	memcpy(strings, pointer, length);
- 	return 0;
- }
- 
-@@ -314,6 +376,10 @@ EXPORT_SYMBOL_GPL(device_property_match_string);
- 	(val) ? of_property_read_##type##_array((node), (propname), (val), (nval)) \
- 	      : of_property_count_elems_of_size((node), (propname), sizeof(type))
- 
-+#define PSET_PROP_READ_ARRAY(node, propname, type, val, nval)				\
-+	(val) ? pset_prop_read_##type##_array((node), (propname), (val), (nval))	\
-+	      : pset_prop_count_elems_of_size((node), (propname), sizeof(type))
-+
- #define FWNODE_PROP_READ_ARRAY(_fwnode_, _propname_, _type_, _proptype_, _val_, _nval_) \
- ({ \
- 	int _ret_; \
-@@ -324,8 +390,8 @@ EXPORT_SYMBOL_GPL(device_property_match_string);
- 		_ret_ = acpi_node_prop_read(_fwnode_, _propname_, _proptype_, \
- 					    _val_, _nval_); \
- 	else if (is_pset_node(_fwnode_)) 						\
--		_ret_ = pset_prop_read_array(to_pset_node(_fwnode_), _propname_,	\
--					     _proptype_, _val_, _nval_); \
-+		_ret_ = PSET_PROP_READ_ARRAY(to_pset_node(_fwnode_), _propname_,	\
-+					     _type_, _val_, _nval_);			\
- 	else \
- 		_ret_ = -ENXIO; \
- 	_ret_; \
-@@ -466,8 +532,12 @@ int fwnode_property_read_string_array(struct fwnode_handle *fwnode,
- 		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
- 					   val, nval);
- 	else if (is_pset_node(fwnode))
--		return pset_prop_read_array(to_pset_node(fwnode), propname,
--					    DEV_PROP_STRING, val, nval);
-+		return val ?
-+			pset_prop_read_string_array(to_pset_node(fwnode),
-+						    propname, val, nval) :
-+			pset_prop_count_elems_of_size(to_pset_node(fwnode),
-+						      propname,
-+						      sizeof(const char *));
- 	return -ENXIO;
- }
- EXPORT_SYMBOL_GPL(fwnode_property_read_string_array);
-@@ -496,8 +566,8 @@ int fwnode_property_read_string(struct fwnode_handle *fwnode,
- 		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
- 					   val, 1);
- 	else if (is_pset_node(fwnode))
--		return pset_prop_read_array(to_pset_node(fwnode), propname,
--					    DEV_PROP_STRING, val, 1);
-+		return pset_prop_read_string_array(to_pset_node(fwnode),
-+						   propname, val, 1);
- 	return -ENXIO;
- }
- EXPORT_SYMBOL_GPL(fwnode_property_read_string);
-diff --git a/include/linux/property.h b/include/linux/property.h
-index 0a3705a..c29460a 100644
---- a/include/linux/property.h
-+++ b/include/linux/property.h
-@@ -144,14 +144,12 @@ static inline int fwnode_property_read_u64(struct fwnode_handle *fwnode,
- /**
-  * struct property_entry - "Built-in" device property representation.
-  * @name: Name of the property.
-- * @type: Type of the property.
-- * @nval: Number of items of type @type making up the value.
-- * @value: Value of the property (an array of @nval items of type @type).
-+ * @length: Length of data making up the value.
-+ * @value: Value of the property (an array of items of the given type).
-  */
- struct property_entry {
- 	const char *name;
--	enum dev_prop_type type;
--	size_t nval;
-+	size_t length;
- 	union {
- 		void *raw_data;
- 		u8 *u8_data;
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0004-device-property-keep-single-value-inplace.patch b/freed-ora/current/f24/0004-device-property-keep-single-value-inplace.patch
deleted file mode 100644
index 39f07cac2..000000000
--- a/freed-ora/current/f24/0004-device-property-keep-single-value-inplace.patch
+++ /dev/null
@@ -1,123 +0,0 @@
-From 66586baba56679baa2da1a10a96ccf15b1e96b95 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:32 +0200
-Subject: [PATCH 04/16] device property: keep single value inplace
-
-We may save a lot of lines of code and space by keeping single values inside
-the struct property_entry. Refactor the implementation to do so.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/property.c  | 33 ++++++++++++++++++++++++++++++---
- include/linux/property.h | 31 +++++++++++++++++++++++--------
- 2 files changed, 53 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/base/property.c b/drivers/base/property.c
-index 86834bd..ad3cb09 100644
---- a/drivers/base/property.c
-+++ b/drivers/base/property.c
-@@ -72,7 +72,10 @@ static void *pset_prop_find(struct property_set *pset, const char *propname,
- 	prop = pset_prop_get(pset, propname);
- 	if (!prop)
- 		return ERR_PTR(-EINVAL);
--	pointer = prop->value.raw_data;
-+	if (prop->is_array)
-+		pointer = prop->pointer.raw_data;
-+	else
-+		pointer = &prop->value.raw_data;
- 	if (!pointer)
- 		return ERR_PTR(-ENODATA);
- 	if (length > prop->length)
-@@ -167,6 +170,31 @@ static int pset_prop_read_string_array(struct property_set *pset,
- 	return 0;
- }
- 
-+static int pset_prop_read_string(struct property_set *pset,
-+				 const char *propname, const char **strings)
-+{
-+	struct property_entry *prop;
-+	const char **pointer;
-+
-+	prop = pset_prop_get(pset, propname);
-+	if (!prop)
-+		return -EINVAL;
-+	if (!prop->is_string)
-+		return -EILSEQ;
-+	if (prop->is_array) {
-+		pointer = prop->pointer.str;
-+		if (!pointer)
-+			return -ENODATA;
-+	} else {
-+		pointer = &prop->value.str;
-+		if (*pointer && strnlen(*pointer, prop->length) >= prop->length)
-+			return -EILSEQ;
-+	}
-+
-+	*strings = *pointer;
-+	return 0;
-+}
-+
- static inline struct fwnode_handle *dev_fwnode(struct device *dev)
- {
- 	return IS_ENABLED(CONFIG_OF) && dev->of_node ?
-@@ -566,8 +594,7 @@ int fwnode_property_read_string(struct fwnode_handle *fwnode,
- 		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
- 					   val, 1);
- 	else if (is_pset_node(fwnode))
--		return pset_prop_read_string_array(to_pset_node(fwnode),
--						   propname, val, 1);
-+		return pset_prop_read_string(to_pset_node(fwnode), propname, val);
- 	return -ENXIO;
- }
- EXPORT_SYMBOL_GPL(fwnode_property_read_string);
-diff --git a/include/linux/property.h b/include/linux/property.h
-index c29460a..69a8a08 100644
---- a/include/linux/property.h
-+++ b/include/linux/property.h
-@@ -145,19 +145,34 @@ static inline int fwnode_property_read_u64(struct fwnode_handle *fwnode,
-  * struct property_entry - "Built-in" device property representation.
-  * @name: Name of the property.
-  * @length: Length of data making up the value.
-- * @value: Value of the property (an array of items of the given type).
-+ * @is_array: True when the property is an array.
-+ * @is_string: True when property is a string.
-+ * @pointer: Pointer to the property (an array of items of the given type).
-+ * @value: Value of the property (when it is a single item of the given type).
-  */
- struct property_entry {
- 	const char *name;
- 	size_t length;
-+	bool is_array;
-+	bool is_string;
- 	union {
--		void *raw_data;
--		u8 *u8_data;
--		u16 *u16_data;
--		u32 *u32_data;
--		u64 *u64_data;
--		const char **str;
--	} value;
-+		union {
-+			void *raw_data;
-+			u8 *u8_data;
-+			u16 *u16_data;
-+			u32 *u32_data;
-+			u64 *u64_data;
-+			const char **str;
-+		} pointer;
-+		union {
-+			unsigned long long raw_data;
-+			u8 u8_data;
-+			u16 u16_data;
-+			u32 u32_data;
-+			u64 u64_data;
-+			const char *str;
-+		} value;
-+	};
- };
- 
- /**
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0005-device-property-helper-macros-for-property-entry-cre.patch b/freed-ora/current/f24/0005-device-property-helper-macros-for-property-entry-cre.patch
deleted file mode 100644
index 877f95ef5..000000000
--- a/freed-ora/current/f24/0005-device-property-helper-macros-for-property-entry-cre.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From a85f420475334caed12b057ddcaa0b58e0b1ebb7 Mon Sep 17 00:00:00 2001
-From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:33 +0200
-Subject: [PATCH 05/16] device property: helper macros for property entry
- creation
-
-Marcos for easier creation of build-in property entries.
-
-Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- include/linux/property.h | 55 ++++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 55 insertions(+)
-
-diff --git a/include/linux/property.h b/include/linux/property.h
-index 69a8a08..e4f29d8 100644
---- a/include/linux/property.h
-+++ b/include/linux/property.h
-@@ -175,6 +175,61 @@ struct property_entry {
- 	};
- };
- 
-+#define PROPERTY_ENTRY_INTEGER_ARRAY(_name_, _type_, _val_)	\
-+{								\
-+	.name = _name_,						\
-+	.length = ARRAY_SIZE(_val_) * sizeof(_type_),		\
-+	.is_array = true,					\
-+	.pointer._type_##_data = _val_,				\
-+}
-+
-+#define PROPERTY_ENTRY_U8_ARRAY(_name_, _val_)			\
-+	PROPERTY_ENTRY_INTEGER_ARRAY(_name_, u8, _val_)
-+#define PROPERTY_ENTRY_U16_ARRAY(_name_, _val_)			\
-+	PROPERTY_ENTRY_INTEGER_ARRAY(_name_, u16, _val_)
-+#define PROPERTY_ENTRY_U32_ARRAY(_name_, _val_)			\
-+	PROPERTY_ENTRY_INTEGER_ARRAY(_name_, u32, _val_)
-+#define PROPERTY_ENTRY_U64_ARRAY(_name_, _val_)			\
-+	PROPERTY_ENTRY_INTEGER_ARRAY(_name_, u64, _val_)
-+
-+#define PROPERTY_ENTRY_STRING_ARRAY(_name_, _val_)		\
-+{								\
-+	.name = _name_,						\
-+	.length = ARRAY_SIZE(_val_) * sizeof(const char *),	\
-+	.is_array = true,					\
-+	.is_string = true,					\
-+	.pointer.str = _val_,					\
-+}
-+
-+#define PROPERTY_ENTRY_INTEGER(_name_, _type_, _val_)	\
-+{							\
-+	.name = _name_,					\
-+	.length = sizeof(_type_),			\
-+	.value._type_##_data = _val_,			\
-+}
-+
-+#define PROPERTY_ENTRY_U8(_name_, _val_)		\
-+	PROPERTY_ENTRY_INTEGER(_name_, u8, _val_)
-+#define PROPERTY_ENTRY_U16(_name_, _val_)		\
-+	PROPERTY_ENTRY_INTEGER(_name_, u16, _val_)
-+#define PROPERTY_ENTRY_U32(_name_, _val_)		\
-+	PROPERTY_ENTRY_INTEGER(_name_, u32, _val_)
-+#define PROPERTY_ENTRY_U64(_name_, _val_)		\
-+	PROPERTY_ENTRY_INTEGER(_name_, u64, _val_)
-+
-+#define PROPERTY_ENTRY_STRING(_name_, _val_)		\
-+{							\
-+	.name = _name_,					\
-+	.length = sizeof(_val_),			\
-+	.is_string = true,				\
-+	.value.str = _val_,				\
-+}
-+
-+#define PROPERTY_ENTRY_BOOL(_name_)		\
-+{						\
-+	.name = _name_,				\
-+}
-+
- /**
-  * struct property_set - Collection of "built-in" device properties.
-  * @fwnode: Handle to be pointed to by the fwnode field of struct device.
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0006-device-property-improve-readability-of-macros.patch b/freed-ora/current/f24/0006-device-property-improve-readability-of-macros.patch
deleted file mode 100644
index 9792798a2..000000000
--- a/freed-ora/current/f24/0006-device-property-improve-readability-of-macros.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 1d656fb757c17e48a8a01bd576d14918701ba55c Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:34 +0200
-Subject: [PATCH 06/16] device property: improve readability of macros
-
-There is no functional change.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/property.c  | 28 ++++++++++++++--------------
- include/linux/property.h |  4 ++--
- 2 files changed, 16 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/base/property.c b/drivers/base/property.c
-index ad3cb09..a3538cb 100644
---- a/drivers/base/property.c
-+++ b/drivers/base/property.c
-@@ -400,29 +400,29 @@ int device_property_match_string(struct device *dev, const char *propname,
- }
- EXPORT_SYMBOL_GPL(device_property_match_string);
- 
--#define OF_DEV_PROP_READ_ARRAY(node, propname, type, val, nval) \
--	(val) ? of_property_read_##type##_array((node), (propname), (val), (nval)) \
-+#define OF_DEV_PROP_READ_ARRAY(node, propname, type, val, nval)				\
-+	(val) ? of_property_read_##type##_array((node), (propname), (val), (nval))	\
- 	      : of_property_count_elems_of_size((node), (propname), sizeof(type))
- 
- #define PSET_PROP_READ_ARRAY(node, propname, type, val, nval)				\
- 	(val) ? pset_prop_read_##type##_array((node), (propname), (val), (nval))	\
- 	      : pset_prop_count_elems_of_size((node), (propname), sizeof(type))
- 
--#define FWNODE_PROP_READ_ARRAY(_fwnode_, _propname_, _type_, _proptype_, _val_, _nval_) \
--({ \
--	int _ret_; \
--	if (is_of_node(_fwnode_)) \
--		_ret_ = OF_DEV_PROP_READ_ARRAY(to_of_node(_fwnode_), _propname_, \
--					       _type_, _val_, _nval_); \
--	else if (is_acpi_node(_fwnode_)) \
--		_ret_ = acpi_node_prop_read(_fwnode_, _propname_, _proptype_, \
--					    _val_, _nval_); \
-+#define FWNODE_PROP_READ_ARRAY(_fwnode_, _propname_, _type_, _proptype_, _val_, _nval_)	\
-+({											\
-+	int _ret_;									\
-+	if (is_of_node(_fwnode_))							\
-+		_ret_ = OF_DEV_PROP_READ_ARRAY(to_of_node(_fwnode_), _propname_,	\
-+					       _type_, _val_, _nval_);			\
-+	else if (is_acpi_node(_fwnode_))						\
-+		_ret_ = acpi_node_prop_read(_fwnode_, _propname_, _proptype_,		\
-+					    _val_, _nval_);				\
- 	else if (is_pset_node(_fwnode_)) 						\
- 		_ret_ = PSET_PROP_READ_ARRAY(to_pset_node(_fwnode_), _propname_,	\
- 					     _type_, _val_, _nval_);			\
--	else \
--		_ret_ = -ENXIO; \
--	_ret_; \
-+	else										\
-+		_ret_ = -ENXIO;								\
-+	_ret_;										\
- })
- 
- /**
-diff --git a/include/linux/property.h b/include/linux/property.h
-index e4f29d8..d1cf208 100644
---- a/include/linux/property.h
-+++ b/include/linux/property.h
-@@ -73,8 +73,8 @@ int fwnode_property_match_string(struct fwnode_handle *fwnode,
- struct fwnode_handle *device_get_next_child_node(struct device *dev,
- 						 struct fwnode_handle *child);
- 
--#define device_for_each_child_node(dev, child) \
--	for (child = device_get_next_child_node(dev, NULL); child; \
-+#define device_for_each_child_node(dev, child)				\
-+	for (child = device_get_next_child_node(dev, NULL); child;	\
- 	     child = device_get_next_child_node(dev, child))
- 
- void fwnode_handle_put(struct fwnode_handle *fwnode);
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0007-device-property-return-EINVAL-when-property-isn-t-fo.patch b/freed-ora/current/f24/0007-device-property-return-EINVAL-when-property-isn-t-fo.patch
deleted file mode 100644
index 1cff9c141..000000000
--- a/freed-ora/current/f24/0007-device-property-return-EINVAL-when-property-isn-t-fo.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 3c60f1149a2fee9ac4ef3cc27bd830e3bd8d2654 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:35 +0200
-Subject: [PATCH 07/16] device property: return -EINVAL when property isn't
- found in ACPI
-
-Change return code to be in align with OF and built-in device properties error
-codes. In particular -EINVAL means property is not found.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/acpi/property.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/acpi/property.c b/drivers/acpi/property.c
-index 88f4306..2aee416 100644
---- a/drivers/acpi/property.c
-+++ b/drivers/acpi/property.c
-@@ -346,7 +346,7 @@ void acpi_free_properties(struct acpi_device *adev)
-  *
-  * Return: %0 if property with @name has been found (success),
-  *         %-EINVAL if the arguments are invalid,
-- *         %-ENODATA if the property doesn't exist,
-+ *         %-EINVAL if the property doesn't exist,
-  *         %-EPROTO if the property value type doesn't match @type.
-  */
- static int acpi_data_get_property(struct acpi_device_data *data,
-@@ -360,7 +360,7 @@ static int acpi_data_get_property(struct acpi_device_data *data,
- 		return -EINVAL;
- 
- 	if (!data->pointer || !data->properties)
--		return -ENODATA;
-+		return -EINVAL;
- 
- 	properties = data->properties;
- 	for (i = 0; i < properties->package.count; i++) {
-@@ -375,13 +375,13 @@ static int acpi_data_get_property(struct acpi_device_data *data,
- 		if (!strcmp(name, propname->string.pointer)) {
- 			if (type != ACPI_TYPE_ANY && propvalue->type != type)
- 				return -EPROTO;
--			else if (obj)
-+			if (obj)
- 				*obj = propvalue;
- 
- 			return 0;
- 		}
- 	}
--	return -ENODATA;
-+	return -EINVAL;
- }
- 
- /**
-@@ -439,7 +439,7 @@ int acpi_node_prop_get(struct fwnode_handle *fwnode, const char *propname,
-  *
-  * Return: %0 if array property (package) with @name has been found (success),
-  *         %-EINVAL if the arguments are invalid,
-- *         %-ENODATA if the property doesn't exist,
-+ *         %-EINVAL if the property doesn't exist,
-  *         %-EPROTO if the property is not a package or the type of its elements
-  *           doesn't match @type.
-  */
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0008-device-property-Fallback-to-secondary-fwnode-if-prim.patch b/freed-ora/current/f24/0008-device-property-Fallback-to-secondary-fwnode-if-prim.patch
deleted file mode 100644
index 8e317d07d..000000000
--- a/freed-ora/current/f24/0008-device-property-Fallback-to-secondary-fwnode-if-prim.patch
+++ /dev/null
@@ -1,188 +0,0 @@
-From 362c0b30249e8639489b428ff5acc4a9d81c087f Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:36 +0200
-Subject: [PATCH 08/16] device property: Fallback to secondary fwnode if
- primary misses the property
-
-The struct fwnode has notion of secondary fwnode. This is supposed to used
-as fallback if the primary firmware interface (DT, ACPI) does not have the
-property in question.
-
-However, the current implementation never checks the secondary node which
-prevents one to add default "built-in" properties to devices.
-
-This patch adds fallback to the secondary fwnode if the primary fwnode
-returns that the property does not exists.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/property.c | 109 ++++++++++++++++++++++++++++++++++--------------
- 1 file changed, 78 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/base/property.c b/drivers/base/property.c
-index a3538cb..ebcbe34 100644
---- a/drivers/base/property.c
-+++ b/drivers/base/property.c
-@@ -214,12 +214,8 @@ bool device_property_present(struct device *dev, const char *propname)
- }
- EXPORT_SYMBOL_GPL(device_property_present);
- 
--/**
-- * fwnode_property_present - check if a property of a firmware node is present
-- * @fwnode: Firmware node whose property to check
-- * @propname: Name of the property
-- */
--bool fwnode_property_present(struct fwnode_handle *fwnode, const char *propname)
-+static bool __fwnode_property_present(struct fwnode_handle *fwnode,
-+				      const char *propname)
- {
- 	if (is_of_node(fwnode))
- 		return of_property_read_bool(to_of_node(fwnode), propname);
-@@ -229,6 +225,21 @@ bool fwnode_property_present(struct fwnode_handle *fwnode, const char *propname)
- 		return !!pset_prop_get(to_pset_node(fwnode), propname);
- 	return false;
- }
-+
-+/**
-+ * fwnode_property_present - check if a property of a firmware node is present
-+ * @fwnode: Firmware node whose property to check
-+ * @propname: Name of the property
-+ */
-+bool fwnode_property_present(struct fwnode_handle *fwnode, const char *propname)
-+{
-+	bool ret;
-+
-+	ret = __fwnode_property_present(fwnode, propname);
-+	if (ret == false && fwnode->secondary)
-+		ret = __fwnode_property_present(fwnode->secondary, propname);
-+	return ret;
-+}
- EXPORT_SYMBOL_GPL(fwnode_property_present);
- 
- /**
-@@ -408,7 +419,7 @@ EXPORT_SYMBOL_GPL(device_property_match_string);
- 	(val) ? pset_prop_read_##type##_array((node), (propname), (val), (nval))	\
- 	      : pset_prop_count_elems_of_size((node), (propname), sizeof(type))
- 
--#define FWNODE_PROP_READ_ARRAY(_fwnode_, _propname_, _type_, _proptype_, _val_, _nval_)	\
-+#define FWNODE_PROP_READ(_fwnode_, _propname_, _type_, _proptype_, _val_, _nval_)	\
- ({											\
- 	int _ret_;									\
- 	if (is_of_node(_fwnode_))							\
-@@ -425,6 +436,17 @@ EXPORT_SYMBOL_GPL(device_property_match_string);
- 	_ret_;										\
- })
- 
-+#define FWNODE_PROP_READ_ARRAY(_fwnode_, _propname_, _type_, _proptype_, _val_, _nval_)	\
-+({											\
-+	int _ret_;									\
-+	_ret_ = FWNODE_PROP_READ(_fwnode_, _propname_, _type_, _proptype_,		\
-+				 _val_, _nval_);					\
-+	if (_ret_ == -EINVAL && _fwnode_->secondary)					\
-+		_ret_ = FWNODE_PROP_READ(_fwnode_->secondary, _propname_, _type_,	\
-+				_proptype_, _val_, _nval_);				\
-+	_ret_;										\
-+})
-+
- /**
-  * fwnode_property_read_u8_array - return a u8 array property of firmware node
-  * @fwnode: Firmware node to get the property of
-@@ -529,6 +551,41 @@ int fwnode_property_read_u64_array(struct fwnode_handle *fwnode,
- }
- EXPORT_SYMBOL_GPL(fwnode_property_read_u64_array);
- 
-+static int __fwnode_property_read_string_array(struct fwnode_handle *fwnode,
-+					       const char *propname,
-+					       const char **val, size_t nval)
-+{
-+	if (is_of_node(fwnode))
-+		return val ?
-+			of_property_read_string_array(to_of_node(fwnode),
-+						      propname, val, nval) :
-+			of_property_count_strings(to_of_node(fwnode), propname);
-+	else if (is_acpi_node(fwnode))
-+		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
-+					   val, nval);
-+	else if (is_pset_node(fwnode))
-+		return val ?
-+			pset_prop_read_string_array(to_pset_node(fwnode),
-+						    propname, val, nval) :
-+			pset_prop_count_elems_of_size(to_pset_node(fwnode),
-+						      propname,
-+						      sizeof(const char *));
-+	return -ENXIO;
-+}
-+
-+static int __fwnode_property_read_string(struct fwnode_handle *fwnode,
-+					 const char *propname, const char **val)
-+{
-+	if (is_of_node(fwnode))
-+		return of_property_read_string(to_of_node(fwnode), propname, val);
-+	else if (is_acpi_node(fwnode))
-+		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
-+					   val, 1);
-+	else if (is_pset_node(fwnode))
-+		return pset_prop_read_string(to_pset_node(fwnode), propname, val);
-+	return -ENXIO;
-+}
-+
- /**
-  * fwnode_property_read_string_array - return string array property of a node
-  * @fwnode: Firmware node to get the property of
-@@ -551,22 +608,13 @@ int fwnode_property_read_string_array(struct fwnode_handle *fwnode,
- 				      const char *propname, const char **val,
- 				      size_t nval)
- {
--	if (is_of_node(fwnode))
--		return val ?
--			of_property_read_string_array(to_of_node(fwnode),
--						      propname, val, nval) :
--			of_property_count_strings(to_of_node(fwnode), propname);
--	else if (is_acpi_node(fwnode))
--		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
--					   val, nval);
--	else if (is_pset_node(fwnode))
--		return val ?
--			pset_prop_read_string_array(to_pset_node(fwnode),
--						    propname, val, nval) :
--			pset_prop_count_elems_of_size(to_pset_node(fwnode),
--						      propname,
--						      sizeof(const char *));
--	return -ENXIO;
-+	int ret;
-+
-+	ret = __fwnode_property_read_string_array(fwnode, propname, val, nval);
-+	if (ret == -EINVAL && fwnode->secondary)
-+		ret = __fwnode_property_read_string_array(fwnode->secondary,
-+							  propname, val, nval);
-+	return ret;
- }
- EXPORT_SYMBOL_GPL(fwnode_property_read_string_array);
- 
-@@ -588,14 +636,13 @@ EXPORT_SYMBOL_GPL(fwnode_property_read_string_array);
- int fwnode_property_read_string(struct fwnode_handle *fwnode,
- 				const char *propname, const char **val)
- {
--	if (is_of_node(fwnode))
--		return of_property_read_string(to_of_node(fwnode), propname, val);
--	else if (is_acpi_node(fwnode))
--		return acpi_node_prop_read(fwnode, propname, DEV_PROP_STRING,
--					   val, 1);
--	else if (is_pset_node(fwnode))
--		return pset_prop_read_string(to_pset_node(fwnode), propname, val);
--	return -ENXIO;
-+	int ret;
-+
-+	ret = __fwnode_property_read_string(fwnode, propname, val);
-+	if (ret == -EINVAL && fwnode->secondary)
-+		ret = __fwnode_property_read_string(fwnode->secondary,
-+						    propname, val);
-+	return ret;
- }
- EXPORT_SYMBOL_GPL(fwnode_property_read_string);
- 
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0009-device-property-Take-a-copy-of-the-property-set.patch b/freed-ora/current/f24/0009-device-property-Take-a-copy-of-the-property-set.patch
deleted file mode 100644
index de24e9f4d..000000000
--- a/freed-ora/current/f24/0009-device-property-Take-a-copy-of-the-property-set.patch
+++ /dev/null
@@ -1,247 +0,0 @@
-From 13141e1cb842ad6286c1cfa9a6b7c1577478d03b Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:37 +0200
-Subject: [PATCH 09/16] device property: Take a copy of the property set
-
-It is convenient if the property set associated with the device secondary
-firmware node is a copy of the original. This allows passing property set
-from a stack for example for devices created dynamically. This also ties
-the property set lifetime to the associated device.
-
-Because of that we provide new function device_remove_property_set() that
-is used to disassociate and release memory allocated for the property set.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/property.c  | 191 ++++++++++++++++++++++++++++++++++++++++++-----
- include/linux/property.h |   3 +-
- 2 files changed, 175 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/base/property.c b/drivers/base/property.c
-index ebcbe34..0b22c8a 100644
---- a/drivers/base/property.c
-+++ b/drivers/base/property.c
-@@ -19,24 +19,6 @@
- #include <linux/etherdevice.h>
- #include <linux/phy.h>
- 
--/**
-- * device_add_property_set - Add a collection of properties to a device object.
-- * @dev: Device to add properties to.
-- * @pset: Collection of properties to add.
-- *
-- * Associate a collection of device properties represented by @pset with @dev
-- * as its secondary firmware node.
-- */
--void device_add_property_set(struct device *dev, struct property_set *pset)
--{
--	if (!pset)
--		return;
--
--	pset->fwnode.type = FWNODE_PDATA;
--	set_secondary_fwnode(dev, &pset->fwnode);
--}
--EXPORT_SYMBOL_GPL(device_add_property_set);
--
- static inline bool is_pset_node(struct fwnode_handle *fwnode)
- {
- 	return fwnode && fwnode->type == FWNODE_PDATA;
-@@ -693,6 +675,179 @@ out:
- EXPORT_SYMBOL_GPL(fwnode_property_match_string);
- 
- /**
-+ * pset_free_set - releases memory allocated for copied property set
-+ * @pset: Property set to release
-+ *
-+ * Function takes previously copied property set and releases all the
-+ * memory allocated to it.
-+ */
-+static void pset_free_set(struct property_set *pset)
-+{
-+	const struct property_entry *prop;
-+	size_t i, nval;
-+
-+	if (!pset)
-+		return;
-+
-+	for (prop = pset->properties; prop->name; prop++) {
-+		if (prop->is_array) {
-+			if (prop->is_string && prop->pointer.str) {
-+				nval = prop->length / sizeof(const char *);
-+				for (i = 0; i < nval; i++)
-+					kfree(prop->pointer.str[i]);
-+			}
-+			kfree(prop->pointer.raw_data);
-+		} else if (prop->is_string) {
-+			kfree(prop->value.str);
-+		}
-+		kfree(prop->name);
-+	}
-+
-+	kfree(pset->properties);
-+	kfree(pset);
-+}
-+
-+static int pset_copy_entry(struct property_entry *dst,
-+			   const struct property_entry *src)
-+{
-+	const char **d, **s;
-+	size_t i, nval;
-+
-+	dst->name = kstrdup(src->name, GFP_KERNEL);
-+	if (!dst->name)
-+		return -ENOMEM;
-+
-+	if (src->is_array) {
-+		if (src->is_string) {
-+			nval = src->length / sizeof(const char *);
-+			dst->pointer.str = kcalloc(nval, sizeof(const char *),
-+						   GFP_KERNEL);
-+			if (!dst->pointer.str)
-+				return -ENOMEM;
-+
-+			d = dst->pointer.str;
-+			s = src->pointer.str;
-+			for (i = 0; i < nval; i++) {
-+				d[i] = kstrdup(s[i], GFP_KERNEL);
-+				if (!d[i] && s[i])
-+					return -ENOMEM;
-+			}
-+		} else {
-+			dst->pointer.raw_data = kmemdup(src->pointer.raw_data,
-+							src->length, GFP_KERNEL);
-+			if (!dst->pointer.raw_data)
-+				return -ENOMEM;
-+		}
-+	} else if (src->is_string) {
-+		dst->value.str = kstrdup(src->value.str, GFP_KERNEL);
-+		if (!dst->value.str && src->value.str)
-+			return -ENOMEM;
-+	} else {
-+		dst->value.raw_data = src->value.raw_data;
-+	}
-+
-+	dst->length = src->length;
-+	dst->is_array = src->is_array;
-+	dst->is_string = src->is_string;
-+
-+	return 0;
-+}
-+
-+/**
-+ * pset_copy_set - copies property set
-+ * @pset: Property set to copy
-+ *
-+ * This function takes a deep copy of the given property set and returns
-+ * pointer to the copy. Call device_free_property_set() to free resources
-+ * allocated in this function.
-+ *
-+ * Return: Pointer to the new property set or error pointer.
-+ */
-+static struct property_set *pset_copy_set(const struct property_set *pset)
-+{
-+	const struct property_entry *entry;
-+	struct property_set *p;
-+	size_t i, n = 0;
-+
-+	p = kzalloc(sizeof(*p), GFP_KERNEL);
-+	if (!p)
-+		return ERR_PTR(-ENOMEM);
-+
-+	while (pset->properties[n].name)
-+		n++;
-+
-+	p->properties = kcalloc(n + 1, sizeof(*entry), GFP_KERNEL);
-+	if (!p->properties) {
-+		kfree(p);
-+		return ERR_PTR(-ENOMEM);
-+	}
-+
-+	for (i = 0; i < n; i++) {
-+		int ret = pset_copy_entry(&p->properties[i],
-+					  &pset->properties[i]);
-+		if (ret) {
-+			pset_free_set(p);
-+			return ERR_PTR(ret);
-+		}
-+	}
-+
-+	return p;
-+}
-+
-+/**
-+ * device_remove_property_set - Remove properties from a device object.
-+ * @dev: Device whose properties to remove.
-+ *
-+ * The function removes properties previously associated to the device
-+ * secondary firmware node with device_add_property_set(). Memory allocated
-+ * to the properties will also be released.
-+ */
-+void device_remove_property_set(struct device *dev)
-+{
-+	struct fwnode_handle *fwnode;
-+
-+	fwnode = dev_fwnode(dev);
-+	if (!fwnode)
-+		return;
-+	/*
-+	 * Pick either primary or secondary node depending which one holds
-+	 * the pset. If there is no real firmware node (ACPI/DT) primary
-+	 * will hold the pset.
-+	 */
-+	if (!is_pset_node(fwnode))
-+		fwnode = fwnode->secondary;
-+	if (!IS_ERR(fwnode) && is_pset_node(fwnode))
-+		pset_free_set(to_pset_node(fwnode));
-+	set_secondary_fwnode(dev, NULL);
-+}
-+EXPORT_SYMBOL_GPL(device_remove_property_set);
-+
-+/**
-+ * device_add_property_set - Add a collection of properties to a device object.
-+ * @dev: Device to add properties to.
-+ * @pset: Collection of properties to add.
-+ *
-+ * Associate a collection of device properties represented by @pset with @dev
-+ * as its secondary firmware node. The function takes a copy of @pset.
-+ */
-+int device_add_property_set(struct device *dev, const struct property_set *pset)
-+{
-+	struct property_set *p;
-+
-+	if (!pset)
-+		return -EINVAL;
-+
-+	p = pset_copy_set(pset);
-+	if (IS_ERR(p))
-+		return PTR_ERR(p);
-+
-+	p->fwnode.type = FWNODE_PDATA;
-+	set_secondary_fwnode(dev, &p->fwnode);
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(device_add_property_set);
-+
-+/**
-  * device_get_next_child_node - Return the next child node handle for a device
-  * @dev: Device to find the next child node for.
-  * @child: Handle to one of the device's child nodes or a null handle.
-diff --git a/include/linux/property.h b/include/linux/property.h
-index d1cf208..3a8c7d7 100644
---- a/include/linux/property.h
-+++ b/include/linux/property.h
-@@ -240,7 +240,8 @@ struct property_set {
- 	struct property_entry *properties;
- };
- 
--void device_add_property_set(struct device *dev, struct property_set *pset);
-+int device_add_property_set(struct device *dev, const struct property_set *pset);
-+void device_remove_property_set(struct device *dev);
- 
- bool device_dma_supported(struct device *dev);
- 
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0010-driver-core-platform-Add-support-for-built-in-device.patch b/freed-ora/current/f24/0010-driver-core-platform-Add-support-for-built-in-device.patch
deleted file mode 100644
index 823198ef4..000000000
--- a/freed-ora/current/f24/0010-driver-core-platform-Add-support-for-built-in-device.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 00bbc1d8e46a92ce7bd80622cf4b09c3b727a741 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:38 +0200
-Subject: [PATCH 10/16] driver core: platform: Add support for built-in device
- properties
-
-Make it possible to pass built-in device properties to platform device
-drivers. This is useful if the system does not have any firmware interface
-like Device Tree or ACPI which provides these.
-
-Properties associated with the platform device will be automatically
-released when the corresponding device is removed.
-
-Suggested-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/platform.c         | 25 +++++++++++++++++++++++++
- include/linux/platform_device.h |  5 +++++
- 2 files changed, 30 insertions(+)
-
-diff --git a/drivers/base/platform.c b/drivers/base/platform.c
-index 1dd6d3b..d77ed0c 100644
---- a/drivers/base/platform.c
-+++ b/drivers/base/platform.c
-@@ -26,6 +26,7 @@
- #include <linux/acpi.h>
- #include <linux/clk/clk-conf.h>
- #include <linux/limits.h>
-+#include <linux/property.h>
- 
- #include "base.h"
- #include "power/power.h"
-@@ -299,6 +300,22 @@ int platform_device_add_data(struct platform_device *pdev, const void *data,
- EXPORT_SYMBOL_GPL(platform_device_add_data);
- 
- /**
-+ * platform_device_add_properties - add built-in properties to a platform device
-+ * @pdev: platform device to add properties to
-+ * @pset: properties to add
-+ *
-+ * The function will take deep copy of the properties in @pset and attach
-+ * the copy to the platform device. The memory associated with properties
-+ * will be freed when the platform device is released.
-+ */
-+int platform_device_add_properties(struct platform_device *pdev,
-+				   const struct property_set *pset)
-+{
-+	return device_add_property_set(&pdev->dev, pset);
-+}
-+EXPORT_SYMBOL_GPL(platform_device_add_properties);
-+
-+/**
-  * platform_device_add - add a platform device to device hierarchy
-  * @pdev: platform device we're adding
-  *
-@@ -409,6 +426,8 @@ void platform_device_del(struct platform_device *pdev)
- 			if (r->parent)
- 				release_resource(r);
- 		}
-+
-+		device_remove_property_set(&pdev->dev);
- 	}
- }
- EXPORT_SYMBOL_GPL(platform_device_del);
-@@ -487,6 +506,12 @@ struct platform_device *platform_device_register_full(
- 	if (ret)
- 		goto err;
- 
-+	if (pdevinfo->pset) {
-+		ret = platform_device_add_properties(pdev, pdevinfo->pset);
-+		if (ret)
-+			goto err;
-+	}
-+
- 	ret = platform_device_add(pdev);
- 	if (ret) {
- err:
-diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
-index dc777be..dba40b1 100644
---- a/include/linux/platform_device.h
-+++ b/include/linux/platform_device.h
-@@ -18,6 +18,7 @@
- #define PLATFORM_DEVID_AUTO	(-2)
- 
- struct mfd_cell;
-+struct property_set;
- 
- struct platform_device {
- 	const char	*name;
-@@ -70,6 +71,8 @@ struct platform_device_info {
- 		const void *data;
- 		size_t size_data;
- 		u64 dma_mask;
-+
-+		const struct property_set *pset;
- };
- extern struct platform_device *platform_device_register_full(
- 		const struct platform_device_info *pdevinfo);
-@@ -167,6 +170,8 @@ extern int platform_device_add_resources(struct platform_device *pdev,
- 					 unsigned int num);
- extern int platform_device_add_data(struct platform_device *pdev,
- 				    const void *data, size_t size);
-+extern int platform_device_add_properties(struct platform_device *pdev,
-+					  const struct property_set *pset);
- extern int platform_device_add(struct platform_device *pdev);
- extern void platform_device_del(struct platform_device *pdev);
- extern void platform_device_put(struct platform_device *pdev);
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0011-driver-core-Do-not-overwrite-secondary-fwnode-with-N.patch b/freed-ora/current/f24/0011-driver-core-Do-not-overwrite-secondary-fwnode-with-N.patch
deleted file mode 100644
index 4d090acd9..000000000
--- a/freed-ora/current/f24/0011-driver-core-Do-not-overwrite-secondary-fwnode-with-N.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 55f89a8a4538803195395bdf347cbba51dcb1906 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:39 +0200
-Subject: [PATCH 11/16] driver core: Do not overwrite secondary fwnode with
- NULL if it is set
-
-If multiple devices share single firmware node like it is case with MFD
-devices, the same firmware node (ACPI) is assigned to all of them. The
-function also modifies the shared firmware node in order to preserve
-secondary firmware node of the device in question.
-
-If the new device which is sharing the firmware node does not have
-secondary node it will be NULL which will be assigned to the secondary node
-of the shared firmware node losing all built-in properties.
-
-Prevent this by setting the secondary firmware node only if the replacement
-is non-NULL.
-
-Print also warning if someone tries to overwrite secondary node that has
-already been assigned.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/base/core.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/base/core.c b/drivers/base/core.c
-index b7d56c5..0a8bdad 100644
---- a/drivers/base/core.c
-+++ b/drivers/base/core.c
-@@ -2261,7 +2261,10 @@ void set_primary_fwnode(struct device *dev, struct fwnode_handle *fwnode)
- 		if (fwnode_is_primary(fn))
- 			fn = fn->secondary;
- 
--		fwnode->secondary = fn;
-+		if (fn) {
-+			WARN_ON(fwnode->secondary);
-+			fwnode->secondary = fn;
-+		}
- 		dev->fwnode = fwnode;
- 	} else {
- 		dev->fwnode = fwnode_is_primary(dev->fwnode) ?
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0012-mfd-core-propagate-device-properties-to-sub-devices-.patch b/freed-ora/current/f24/0012-mfd-core-propagate-device-properties-to-sub-devices-.patch
deleted file mode 100644
index d9e52e06c..000000000
--- a/freed-ora/current/f24/0012-mfd-core-propagate-device-properties-to-sub-devices-.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 4d215cabc784990df11fbcca7af70adf53c9ff17 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:40 +0200
-Subject: [PATCH 12/16] mfd: core: propagate device properties to sub devices
- drivers
-
-In the similar way like we do for the platform data we propagate the device
-properties. For example, in case of Intel LPSS drivers we may provide a
-specific property to tell the actual device driver an additional information
-such as platform name.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/mfd/mfd-core.c   | 7 +++++++
- include/linux/mfd/core.h | 5 +++++
- 2 files changed, 12 insertions(+)
-
-diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c
-index 60b60dc..88bd1b1 100644
---- a/drivers/mfd/mfd-core.c
-+++ b/drivers/mfd/mfd-core.c
-@@ -14,6 +14,7 @@
- #include <linux/kernel.h>
- #include <linux/platform_device.h>
- #include <linux/acpi.h>
-+#include <linux/property.h>
- #include <linux/mfd/core.h>
- #include <linux/pm_runtime.h>
- #include <linux/slab.h>
-@@ -192,6 +193,12 @@ static int mfd_add_device(struct device *parent, int id,
- 			goto fail_alias;
- 	}
- 
-+	if (cell->pset) {
-+		ret = platform_device_add_properties(pdev, cell->pset);
-+		if (ret)
-+			goto fail_alias;
-+	}
-+
- 	ret = mfd_platform_add_cell(pdev, cell, usage_count);
- 	if (ret)
- 		goto fail_alias;
-diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
-index 27dac3f..bc6f7e0 100644
---- a/include/linux/mfd/core.h
-+++ b/include/linux/mfd/core.h
-@@ -17,6 +17,7 @@
- #include <linux/platform_device.h>
- 
- struct irq_domain;
-+struct property_set;
- 
- /* Matches ACPI PNP id, either _HID or _CID, or ACPI _ADR */
- struct mfd_cell_acpi_match {
-@@ -44,6 +45,10 @@ struct mfd_cell {
- 	/* platform data passed to the sub devices drivers */
- 	void			*platform_data;
- 	size_t			pdata_size;
-+
-+	/* device properties passed to the sub devices drivers */
-+	const struct property_set *pset;
-+
- 	/*
- 	 * Device Tree compatible string
- 	 * See: Documentation/devicetree/usage-model.txt Chapter 2.2 for details
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0013-mfd-intel-lpss-Add-support-for-passing-device-proper.patch b/freed-ora/current/f24/0013-mfd-intel-lpss-Add-support-for-passing-device-proper.patch
deleted file mode 100644
index 5160053b9..000000000
--- a/freed-ora/current/f24/0013-mfd-intel-lpss-Add-support-for-passing-device-proper.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From e15ad2154b6166804fc04487e0398c9aef9e7c97 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:41 +0200
-Subject: [PATCH 13/16] mfd: intel-lpss: Add support for passing device
- properties
-
-If the boot firmware does not support ACPI we need a way to pass device
-configuration information to the drivers. The unified device properties API
-already supports passing platform data via properties so let's take
-advantage of that and allow probe drivers to pass set of properties to the
-host controller driver.
-
-In order to do that we need to be able to modify the MFD cell corresponding
-the host controller, so make the core driver to take copy of the cell
-instead of using it directly. Then we can assign info->pset to the
-resulting copy of a cell and let the MFD core to assign that to the
-resulting device.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/mfd/intel-lpss.c | 16 ++++++++++++----
- drivers/mfd/intel-lpss.h |  2 ++
- 2 files changed, 14 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c
-index 6255513..1743788 100644
---- a/drivers/mfd/intel-lpss.c
-+++ b/drivers/mfd/intel-lpss.c
-@@ -24,6 +24,7 @@
- #include <linux/mfd/core.h>
- #include <linux/pm_qos.h>
- #include <linux/pm_runtime.h>
-+#include <linux/property.h>
- #include <linux/seq_file.h>
- #include <linux/io-64-nonatomic-lo-hi.h>
- 
-@@ -72,7 +73,7 @@ struct intel_lpss {
- 	enum intel_lpss_dev_type type;
- 	struct clk *clk;
- 	struct clk_lookup *clock;
--	const struct mfd_cell *cell;
-+	struct mfd_cell *cell;
- 	struct device *dev;
- 	void __iomem *priv;
- 	int devid;
-@@ -217,6 +218,7 @@ static void intel_lpss_ltr_hide(struct intel_lpss *lpss)
- 
- static int intel_lpss_assign_devs(struct intel_lpss *lpss)
- {
-+	const struct mfd_cell *cell;
- 	unsigned int type;
- 
- 	type = lpss->caps & LPSS_PRIV_CAPS_TYPE_MASK;
-@@ -224,18 +226,22 @@ static int intel_lpss_assign_devs(struct intel_lpss *lpss)
- 
- 	switch (type) {
- 	case LPSS_DEV_I2C:
--		lpss->cell = &intel_lpss_i2c_cell;
-+		cell = &intel_lpss_i2c_cell;
- 		break;
- 	case LPSS_DEV_UART:
--		lpss->cell = &intel_lpss_uart_cell;
-+		cell = &intel_lpss_uart_cell;
- 		break;
- 	case LPSS_DEV_SPI:
--		lpss->cell = &intel_lpss_spi_cell;
-+		cell = &intel_lpss_spi_cell;
- 		break;
- 	default:
- 		return -ENODEV;
- 	}
- 
-+	lpss->cell = devm_kmemdup(lpss->dev, cell, sizeof(*cell), GFP_KERNEL);
-+	if (!lpss->cell)
-+		return -ENOMEM;
-+
- 	lpss->type = type;
- 
- 	return 0;
-@@ -401,6 +407,8 @@ int intel_lpss_probe(struct device *dev,
- 	if (ret)
- 		return ret;
- 
-+	lpss->cell->pset = info->pset;
-+
- 	intel_lpss_init_dev(lpss);
- 
- 	lpss->devid = ida_simple_get(&intel_lpss_devid_ida, 0, 0, GFP_KERNEL);
-diff --git a/drivers/mfd/intel-lpss.h b/drivers/mfd/intel-lpss.h
-index 2c7f8d7..0dcea9e 100644
---- a/drivers/mfd/intel-lpss.h
-+++ b/drivers/mfd/intel-lpss.h
-@@ -16,12 +16,14 @@
- 
- struct device;
- struct resource;
-+struct property_set;
- 
- struct intel_lpss_platform_info {
- 	struct resource *mem;
- 	int irq;
- 	unsigned long clk_rate;
- 	const char *clk_con_id;
-+	struct property_set *pset;
- };
- 
- int intel_lpss_probe(struct device *dev,
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0014-mfd-intel-lpss-Pass-SDA-hold-time-to-I2C-host-contro.patch b/freed-ora/current/f24/0014-mfd-intel-lpss-Pass-SDA-hold-time-to-I2C-host-contro.patch
deleted file mode 100644
index c06105162..000000000
--- a/freed-ora/current/f24/0014-mfd-intel-lpss-Pass-SDA-hold-time-to-I2C-host-contro.patch
+++ /dev/null
@@ -1,138 +0,0 @@
-From 028af5941dd870afd5eb6a95c39f25564dcca79a Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:42 +0200
-Subject: [PATCH 14/16] mfd: intel-lpss: Pass SDA hold time to I2C host
- controller driver
-
-Intel Skylake the LPSS I2C pad circuit has internal delays that require
-programming non-zero SDA hold time for the I2C host controller. If this is
-not done communication to slave devices may fail with arbitration lost
-errors like the one seen below taken from Lenovo Yoga 900:
-
-  i2c_hid i2c-SYNA2B29:00: Fetching the HID descriptor
-  i2c_hid i2c-SYNA2B29:00: __i2c_hid_command: cmd=20 00
-  i2c_designware i2c_designware.1: i2c_dw_handle_tx_abort: lost arbitration
-
-To fix this we follow what the Windows driver is doing and pass the default
-SDA hold time of 230 ns to all Intel Skylake host controllers. This still
-allows the platform to override these values by passing special ACPI
-methods SSCN and FMCN.
-
-Reported-by: Kevin Fenzi <kevin@scrye.com>
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/mfd/intel-lpss-acpi.c | 19 +++++++++++++++++--
- drivers/mfd/intel-lpss-pci.c  | 31 +++++++++++++++++++++++--------
- 2 files changed, 40 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/mfd/intel-lpss-acpi.c b/drivers/mfd/intel-lpss-acpi.c
-index b6fd904..06f00d6 100644
---- a/drivers/mfd/intel-lpss-acpi.c
-+++ b/drivers/mfd/intel-lpss-acpi.c
-@@ -18,6 +18,7 @@
- #include <linux/pm.h>
- #include <linux/pm_runtime.h>
- #include <linux/platform_device.h>
-+#include <linux/property.h>
- 
- #include "intel-lpss.h"
- 
-@@ -25,6 +26,20 @@ static const struct intel_lpss_platform_info spt_info = {
- 	.clk_rate = 120000000,
- };
- 
-+static struct property_entry spt_i2c_properties[] = {
-+	PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
-+	{ },
-+};
-+
-+static struct property_set spt_i2c_pset = {
-+	.properties = spt_i2c_properties,
-+};
-+
-+static const struct intel_lpss_platform_info spt_i2c_info = {
-+	.clk_rate = 120000000,
-+	.pset = &spt_i2c_pset,
-+};
-+
- static const struct intel_lpss_platform_info bxt_info = {
- 	.clk_rate = 100000000,
- };
-@@ -35,8 +50,8 @@ static const struct intel_lpss_platform_info bxt_i2c_info = {
- 
- static const struct acpi_device_id intel_lpss_acpi_ids[] = {
- 	/* SPT */
--	{ "INT3446", (kernel_ulong_t)&spt_info },
--	{ "INT3447", (kernel_ulong_t)&spt_info },
-+	{ "INT3446", (kernel_ulong_t)&spt_i2c_info },
-+	{ "INT3447", (kernel_ulong_t)&spt_i2c_info },
- 	/* BXT */
- 	{ "80860AAC", (kernel_ulong_t)&bxt_i2c_info },
- 	{ "80860ABC", (kernel_ulong_t)&bxt_info },
-diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
-index 5bfdfcc..a677480 100644
---- a/drivers/mfd/intel-lpss-pci.c
-+++ b/drivers/mfd/intel-lpss-pci.c
-@@ -17,6 +17,7 @@
- #include <linux/pci.h>
- #include <linux/pm.h>
- #include <linux/pm_runtime.h>
-+#include <linux/property.h>
- 
- #include "intel-lpss.h"
- 
-@@ -65,6 +66,20 @@ static const struct intel_lpss_platform_info spt_info = {
- 	.clk_rate = 120000000,
- };
- 
-+static struct property_entry spt_i2c_properties[] = {
-+	PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
-+	{ },
-+};
-+
-+static struct property_set spt_i2c_pset = {
-+	.properties = spt_i2c_properties,
-+};
-+
-+static const struct intel_lpss_platform_info spt_i2c_info = {
-+	.clk_rate = 120000000,
-+	.pset = &spt_i2c_pset,
-+};
-+
- static const struct intel_lpss_platform_info spt_uart_info = {
- 	.clk_rate = 120000000,
- 	.clk_con_id = "baudclk",
-@@ -121,20 +136,20 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
- 	{ PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
- 	{ PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info },
- 	{ PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info },
--	{ PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_info },
--	{ PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_info },
--	{ PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_info },
--	{ PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_info },
--	{ PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_info },
--	{ PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_info },
-+	{ PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info },
-+	{ PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info },
-+	{ PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info },
-+	{ PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info },
-+	{ PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info },
-+	{ PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info },
- 	{ PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info },
- 	/* SPT-H */
- 	{ PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
- 	{ PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
- 	{ PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info },
- 	{ PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info },
--	{ PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_info },
--	{ PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_info },
-+	{ PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info },
-+	{ PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info },
- 	{ PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
- 	{ }
- };
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0015-mfd-intel-lpss-Pass-HSUART-configuration-via-propert.patch b/freed-ora/current/f24/0015-mfd-intel-lpss-Pass-HSUART-configuration-via-propert.patch
deleted file mode 100644
index 5b3c2753e..000000000
--- a/freed-ora/current/f24/0015-mfd-intel-lpss-Pass-HSUART-configuration-via-propert.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From ec14c5395dfbc1d40a49c9f19d2bfde6739d89d5 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:43 +0200
-Subject: [PATCH 15/16] mfd: intel-lpss: Pass HSUART configuration via
- properties
-
-The HS-UART host controller driver needs to know certain properties like
-width of the register set if it cannot get that information from ACPI or
-DT. In order to support non-ACPI systems we pass this information to the
-driver via device properties.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/mfd/intel-lpss-pci.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
-index a677480..a7136c7 100644
---- a/drivers/mfd/intel-lpss-pci.c
-+++ b/drivers/mfd/intel-lpss-pci.c
-@@ -80,9 +80,21 @@ static const struct intel_lpss_platform_info spt_i2c_info = {
- 	.pset = &spt_i2c_pset,
- };
- 
-+static struct property_entry uart_properties[] = {
-+	PROPERTY_ENTRY_U32("reg-io-width", 4),
-+	PROPERTY_ENTRY_U32("reg-shift", 2),
-+	PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
-+	{ },
-+};
-+
-+static struct property_set uart_pset = {
-+	.properties = uart_properties,
-+};
-+
- static const struct intel_lpss_platform_info spt_uart_info = {
- 	.clk_rate = 120000000,
- 	.clk_con_id = "baudclk",
-+	.pset = &uart_pset,
- };
- 
- static const struct intel_lpss_platform_info bxt_info = {
-@@ -92,6 +104,7 @@ static const struct intel_lpss_platform_info bxt_info = {
- static const struct intel_lpss_platform_info bxt_uart_info = {
- 	.clk_rate = 100000000,
- 	.clk_con_id = "baudclk",
-+	.pset = &uart_pset,
- };
- 
- static const struct intel_lpss_platform_info bxt_i2c_info = {
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/0016-i2c-designware-Convert-to-use-unified-device-propert.patch b/freed-ora/current/f24/0016-i2c-designware-Convert-to-use-unified-device-propert.patch
deleted file mode 100644
index f3039a1bd..000000000
--- a/freed-ora/current/f24/0016-i2c-designware-Convert-to-use-unified-device-propert.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 4c5301abbf81f4351416cec1e8a02647d96e6fd1 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 30 Nov 2015 17:11:44 +0200
-Subject: [PATCH 16/16] i2c: designware: Convert to use unified device property
- API
-
-With ACPI _DSD (introduced in ACPI v5.1) it is now possible to pass device
-configuration information from ACPI in addition to DT. In order to support
-this, convert the driver to use the unified device property accessors
-instead of DT specific.
-
-Change to ordering a bit so that we first try platform data and if that's
-not available look from device properties. ACPI *CNT methods are then used
-as last resort to override everything else.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
-Acked-by: Wolfram Sang <wsa@the-dreams.de>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
----
- drivers/i2c/busses/i2c-designware-platdrv.c | 50 +++++++++++++----------------
- 1 file changed, 23 insertions(+), 27 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
-index 809579e..06061b5 100644
---- a/drivers/i2c/busses/i2c-designware-platdrv.c
-+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
-@@ -36,6 +36,7 @@
- #include <linux/platform_device.h>
- #include <linux/pm.h>
- #include <linux/pm_runtime.h>
-+#include <linux/property.h>
- #include <linux/io.h>
- #include <linux/slab.h>
- #include <linux/acpi.h>
-@@ -129,10 +130,10 @@ static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
- 
- static int dw_i2c_plat_probe(struct platform_device *pdev)
- {
-+	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
- 	struct dw_i2c_dev *dev;
- 	struct i2c_adapter *adap;
- 	struct resource *mem;
--	struct dw_i2c_platform_data *pdata;
- 	int irq, r;
- 	u32 clk_freq, ht = 0;
- 
-@@ -156,33 +157,28 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
- 	/* fast mode by default because of legacy reasons */
- 	clk_freq = 400000;
- 
--	if (has_acpi_companion(&pdev->dev)) {
--		dw_i2c_acpi_configure(pdev);
--	} else if (pdev->dev.of_node) {
--		of_property_read_u32(pdev->dev.of_node,
--					"i2c-sda-hold-time-ns", &ht);
--
--		of_property_read_u32(pdev->dev.of_node,
--				     "i2c-sda-falling-time-ns",
--				     &dev->sda_falling_time);
--		of_property_read_u32(pdev->dev.of_node,
--				     "i2c-scl-falling-time-ns",
--				     &dev->scl_falling_time);
--
--		of_property_read_u32(pdev->dev.of_node, "clock-frequency",
--				     &clk_freq);
--
--		/* Only standard mode at 100kHz and fast mode at 400kHz
--		 * are supported.
--		 */
--		if (clk_freq != 100000 && clk_freq != 400000) {
--			dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
--			return -EINVAL;
--		}
-+	if (pdata) {
-+		clk_freq = pdata->i2c_scl_freq;
- 	} else {
--		pdata = dev_get_platdata(&pdev->dev);
--		if (pdata)
--			clk_freq = pdata->i2c_scl_freq;
-+		device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
-+					 &ht);
-+		device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
-+					 &dev->sda_falling_time);
-+		device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
-+					 &dev->scl_falling_time);
-+		device_property_read_u32(&pdev->dev, "clock-frequency",
-+					 &clk_freq);
-+	}
-+
-+	if (has_acpi_companion(&pdev->dev))
-+		dw_i2c_acpi_configure(pdev);
-+
-+	/*
-+	 * Only standard mode at 100kHz and fast mode at 400kHz are supported.
-+	 */
-+	if (clk_freq != 100000 && clk_freq != 400000) {
-+		dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
-+		return -EINVAL;
- 	}
- 
- 	r = i2c_dw_eval_lock_support(dev);
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch b/freed-ora/current/f24/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch
new file mode 100644
index 000000000..cff3d3339
--- /dev/null
+++ b/freed-ora/current/f24/ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch
@@ -0,0 +1,101 @@
+From patchwork Wed Jan 27 15:08:19 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [1/2] ARM: mvebu: change order of ethernet DT nodes on Armada 38x
+From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+X-Patchwork-Id: 8134751
+Message-Id: <1453907300-28283-2-git-send-email-thomas.petazzoni@free-electrons.com>
+To: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
+	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
+	Gregory Clement <gregory.clement@free-electrons.com>
+Cc: Nadav Haklai <nadavh@marvell.com>, Lior Amsalem <alior@marvell.com>,
+	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
+	linux-arm-kernel@lists.infradead.org
+Date: Wed, 27 Jan 2016 16:08:19 +0100
+
+On Armada 38x, the available network interfaces are:
+
+ - port 0, at 0x70000
+ - port 1, at 0x30000
+ - port 2, at 0x34000
+
+Due to the rule saying that DT nodes should be ordered by register
+addresses, the network interfaces are probed in this order:
+
+ - port 1, at 0x30000, which gets named eth0
+ - port 2, at 0x34000, which gets named eth1
+ - port 0, at 0x70000, which gets named eth2
+
+(if all three ports are enabled at the board level)
+
+Unfortunately, the network subsystem doesn't provide any way to rename
+network interfaces from the kernel (it can only be done from
+userspace). So, the default naming of the network interfaces is very
+confusing as it doesn't match the datasheet, nor the naming of the
+interfaces in the bootloader, nor the naming of the interfaces on
+labels printed on the board.
+
+For example, on the Armada 388 GP, the board has two ports, labelled
+GE0 and GE1. One has to know that GE0 is eth1 and GE1 is eth0, which
+isn't really obvious.
+
+In order to solve this, this patch proposes to exceptionaly violate
+the rule of "order DT nodes by register address", and put the 0x70000
+node before the 0x30000 node, so that network interfaces get named in
+a more natural way.
+
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+
+---
+arch/arm/boot/dts/armada-38x.dtsi | 30 +++++++++++++++++++++---------
+ 1 file changed, 21 insertions(+), 9 deletions(-)
+
+diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
+index e8b7f67..b50784d 100644
+--- a/arch/arm/boot/dts/armada-38x.dtsi
++++ b/arch/arm/boot/dts/armada-38x.dtsi
+@@ -429,6 +429,27 @@
+ 				reg = <0x22000 0x1000>;
+ 			};
+ 
++			/*
++			 * As a special exception to the "order by
++			 * register address" rule, the eth0 node is
++			 * placed here to ensure that it gets
++			 * registered as the first interface, since
++			 * the network subsystem doesn't allow naming
++			 * interfaces using DT aliases. Without this,
++			 * the ordering of interfaces is different
++			 * from the one used in U-Boot and the
++			 * labeling of interfaces on the boards, which
++			 * is very confusing for users.
++			 */
++			eth0: ethernet@70000 {
++				compatible = "marvell,armada-370-neta";
++				reg = <0x70000 0x4000>;
++				interrupts-extended = <&mpic 8>;
++				clocks = <&gateclk 4>;
++				tx-csum-limit = <9800>;
++				status = "disabled";
++			};
++
+ 			eth1: ethernet@30000 {
+ 				compatible = "marvell,armada-370-neta";
+ 				reg = <0x30000 0x4000>;
+@@ -493,15 +514,6 @@
+ 				};
+ 			};
+ 
+-			eth0: ethernet@70000 {
+-				compatible = "marvell,armada-370-neta";
+-				reg = <0x70000 0x4000>;
+-				interrupts-extended = <&mpic 8>;
+-				clocks = <&gateclk 4>;
+-				tx-csum-limit = <9800>;
+-				status = "disabled";
+-			};
+-
+ 			mdio: mdio@72004 {
+ 				#address-cells = <1>;
+ 				#size-cells = <0>;
diff --git a/freed-ora/current/f24/Fix-tegra-to-use-stdout-path-for-serial-console.patch b/freed-ora/current/f24/Fix-tegra-to-use-stdout-path-for-serial-console.patch
new file mode 100644
index 000000000..80a2d1b95
--- /dev/null
+++ b/freed-ora/current/f24/Fix-tegra-to-use-stdout-path-for-serial-console.patch
@@ -0,0 +1,318 @@
+From 15b8caef5f380d9465876478ff5e365bc6afa5b6 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Sun, 6 Mar 2016 10:59:13 +0000
+Subject: [PATCH] Fix tegra to use stdout-path for serial console
+
+---
+ arch/arm/boot/dts/tegra114-dalmore.dts         | 4 ++++
+ arch/arm/boot/dts/tegra124-jetson-tk1.dts      | 4 ++++
+ arch/arm/boot/dts/tegra124-nyan.dtsi           | 4 ++++
+ arch/arm/boot/dts/tegra124-venice2.dts         | 4 ++++
+ arch/arm/boot/dts/tegra20-harmony.dts          | 4 ++++
+ arch/arm/boot/dts/tegra20-iris-512.dts         | 4 ++++
+ arch/arm/boot/dts/tegra20-medcom-wide.dts      | 4 ++++
+ arch/arm/boot/dts/tegra20-paz00.dts            | 4 ++++
+ arch/arm/boot/dts/tegra20-seaboard.dts         | 4 ++++
+ arch/arm/boot/dts/tegra20-tamonten.dtsi        | 4 ++++
+ arch/arm/boot/dts/tegra20-trimslice.dts        | 4 ++++
+ arch/arm/boot/dts/tegra20-ventana.dts          | 4 ++++
+ arch/arm/boot/dts/tegra20-whistler.dts         | 4 ++++
+ arch/arm/boot/dts/tegra30-apalis-eval.dts      | 4 ++++
+ arch/arm/boot/dts/tegra30-beaver.dts           | 4 ++++
+ arch/arm/boot/dts/tegra30-cardhu.dtsi          | 4 ++++
+ arch/arm/boot/dts/tegra30-colibri-eval-v3.dts  | 4 ++++
+ arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 5 ++++-
+ arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi | 4 ++++
+ 19 files changed, 76 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
+index 8b7aa0d..b5748ee 100644
+--- a/arch/arm/boot/dts/tegra114-dalmore.dts
++++ b/arch/arm/boot/dts/tegra114-dalmore.dts
+@@ -18,6 +18,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x80000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+index 66b4451..abf046a 100644
+--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
++++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+@@ -15,6 +15,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x0 0x80000000 0x0 0x80000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
+index ec1aa64..e2cd39e 100644
+--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
++++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
+@@ -8,6 +8,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x0 0x80000000 0x0 0x80000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
+index cfbdf42..604f4b7 100644
+--- a/arch/arm/boot/dts/tegra124-venice2.dts
++++ b/arch/arm/boot/dts/tegra124-venice2.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x0 0x80000000 0x0 0x80000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
+index b926a07..4b73c76 100644
+--- a/arch/arm/boot/dts/tegra20-harmony.dts
++++ b/arch/arm/boot/dts/tegra20-harmony.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts
+index 1dd7d7b..bb56dfe 100644
+--- a/arch/arm/boot/dts/tegra20-iris-512.dts
++++ b/arch/arm/boot/dts/tegra20-iris-512.dts
+@@ -11,6 +11,10 @@
+ 		serial1 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	host1x@50000000 {
+ 		hdmi@54280000 {
+ 			status = "okay";
+diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts
+index 9b87526..34c6588 100644
+--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
++++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
+@@ -10,6 +10,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	pwm@7000a000 {
+ 		status = "okay";
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
+index ed7e100..81a10a9 100644
+--- a/arch/arm/boot/dts/tegra20-paz00.dts
++++ b/arch/arm/boot/dts/tegra20-paz00.dts
+@@ -14,6 +14,10 @@
+ 		serial1 = &uartc;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x20000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
+index aea8994..0aed748 100644
+--- a/arch/arm/boot/dts/tegra20-seaboard.dts
++++ b/arch/arm/boot/dts/tegra20-seaboard.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
+index 13d4e61..025e9e8 100644
+--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
++++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
+@@ -10,6 +10,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x20000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
+index d99af4e..69d25ca 100644
+--- a/arch/arm/boot/dts/tegra20-trimslice.dts
++++ b/arch/arm/boot/dts/tegra20-trimslice.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
+index 04c58e9..c61533a 100644
+--- a/arch/arm/boot/dts/tegra20-ventana.dts
++++ b/arch/arm/boot/dts/tegra20-ventana.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
+index 340d811..bd76585 100644
+--- a/arch/arm/boot/dts/tegra20-whistler.dts
++++ b/arch/arm/boot/dts/tegra20-whistler.dts
+@@ -13,6 +13,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x00000000 0x20000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts
+index f2879cf..b914bcb 100644
+--- a/arch/arm/boot/dts/tegra30-apalis-eval.dts
++++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts
+@@ -17,6 +17,10 @@
+ 		serial3 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	pcie-controller@00003000 {
+ 		status = "okay";
+ 
+diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
+index 3dede39..1eca3b2 100644
+--- a/arch/arm/boot/dts/tegra30-beaver.dts
++++ b/arch/arm/boot/dts/tegra30-beaver.dts
+@@ -12,6 +12,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x80000000 0x7ff00000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
+index bb1ca15..de9d6cc 100644
+--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
++++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
+@@ -35,6 +35,10 @@
+ 		serial1 = &uartc;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		reg = <0x80000000 0x40000000>;
+ 	};
+diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+index 3ff019f..93e1ffd 100644
+--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
++++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+@@ -15,6 +15,10 @@
+ 		serial2 = &uartd;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	host1x@50000000 {
+ 		dc@54200000 {
+ 			rgb {
+diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+index 62f33fc..3c0b4d7 100644
+--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
++++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+@@ -10,9 +10,12 @@
+ 	aliases {
+ 		rtc0 = "/i2c@0,7000d000/as3722@40";
+ 		rtc1 = "/rtc@0,7000e000";
++		serial0 = &uarta;
+ 	};
+ 
+-	chosen { };
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
+ 
+ 	memory {
+ 		device_type = "memory";
+diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
+index ece0dec..73ba582 100644
+--- a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
+@@ -9,6 +9,10 @@
+ 		serial0 = &uarta;
+ 	};
+ 
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
+ 	memory {
+ 		device_type = "memory";
+ 		reg = <0x0 0x80000000 0x0 0xc0000000>;
+-- 
+2.5.0
+
diff --git a/freed-ora/current/f24/Geekbox-device-tree-support.patch b/freed-ora/current/f24/Geekbox-device-tree-support.patch
new file mode 100644
index 000000000..51caf8aaf
--- /dev/null
+++ b/freed-ora/current/f24/Geekbox-device-tree-support.patch
@@ -0,0 +1,437 @@
+From a516bbf04744817e49e173b2a217a2a6366b5f9c Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Wed, 2 Mar 2016 18:12:09 +0000
+Subject: [PATCH] Geekbox device tree support
+
+---
+ Documentation/devicetree/bindings/arm/rockchip.txt |   9 +
+ arch/arm64/boot/dts/rockchip/Makefile              |   2 +
+ .../dts/rockchip/rk3368-geekbox-landingship.dts    |  56 ++++
+ arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts    | 321 +++++++++++++++++++++
+ 4 files changed, 388 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+
+diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
+index 078c14f..c6d95f2 100644
+--- a/Documentation/devicetree/bindings/arm/rockchip.txt
++++ b/Documentation/devicetree/bindings/arm/rockchip.txt
+@@ -87,6 +87,15 @@ Rockchip platforms device tree bindings
+ 		     "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
+ 		     "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
+ 
++- GeekBuying GeekBox:
++    Required root node properties:
++      - compatible = "geekbuying,geekbox", "rockchip,rk3368";
++
++- GeekBuying Landingship:
++    Required root node properties:
++      - compatible = "geekbuying,landingship",
++		     "geekbuying,geekbox", "rockchip,rk3368";
++
+ - Rockchip RK3368 evb:
+     Required root node properties:
+       - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
+diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
+index e3f0b5f..201bcd9 100644
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -1,4 +1,6 @@
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox-landingship.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
+ 
+ always		:= $(dtb-y)
+diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
+new file mode 100644
+index 0000000..e4a1175
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
+@@ -0,0 +1,56 @@
++/*
++ * Copyright (c) 2016 Andreas Färber
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include "rk3368-geekbox.dts"
++
++/ {
++	model = "GeekBox on Landingship";
++	compatible = "geekbuying,landingship", "geekbuying,geekbox", "rockchip,rk3368";
++};
++
++&i2c1 {
++	status = "okay";
++};
++
++&i2c2 {
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+new file mode 100644
+index 0000000..7e51876
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+@@ -0,0 +1,321 @@
++/*
++ * Copyright (c) 2016 Andreas Färber
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "rk3368.dtsi"
++
++/ {
++	model = "GeekBox";
++	compatible = "geekbuying,geekbox", "rockchip,rk3368";
++
++	chosen {
++		stdout-path = "serial2:115200n8";
++	};
++
++	memory {
++		device_type = "memory";
++		reg = <0x0 0x0 0x0 0x80000000>;
++	};
++
++	ext_gmac: gmac-clk {
++		compatible = "fixed-clock";
++		clock-frequency = <125000000>;
++		clock-output-names = "ext_gmac";
++		#clock-cells = <0>;
++	};
++
++	ir: ir-receiver {
++		compatible = "gpio-ir-receiver";
++		gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&ir_int>;
++	};
++
++	keys: gpio-keys {
++		compatible = "gpio-keys";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pwr_key>;
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		button@0 {
++			reg = <0>;
++			gpio-key,wakeup = <1>;
++			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
++			label = "GPIO Power";
++			linux,code = <116>;
++		};
++	};
++
++	leds: gpio-leds {
++		compatible = "gpio-leds";
++
++		blue {
++			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
++			label = "geekbox:blue:led";
++			default-state = "on";
++		};
++
++		red {
++			gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
++			label = "geekbox:red:led";
++			default-state = "off";
++		};
++	};
++
++	vcc_sys: vcc-sys-regulator {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc_sys";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		regulator-always-on;
++		regulator-boot-on;
++	};
++};
++
++&emmc {
++	status = "okay";
++	bus-width = <8>;
++	cap-mmc-highspeed;
++	clock-frequency = <150000000>;
++	disable-wp;
++	keep-power-in-suspend;
++	non-removable;
++	num-slots = <1>;
++	vmmc-supply = <&vcc_io>;
++	vqmmc-supply = <&vcc18_flash>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
++};
++
++&gmac {
++	status = "okay";
++	phy-supply = <&vcc_lan>;
++	phy-mode = "rgmii";
++	clock_in_out = "input";
++	assigned-clocks = <&cru SCLK_MAC>;
++	assigned-clock-parents = <&ext_gmac>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	tx_delay = <0x30>;
++	rx_delay = <0x10>;
++};
++
++&i2c0 {
++	status = "okay";
++
++	rk808: pmic@1b {
++		compatible = "rockchip,rk808";
++		reg = <0x1b>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
++		interrupt-parent = <&gpio0>;
++		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
++		rockchip,system-power-controller;
++		vcc1-supply = <&vcc_sys>;
++		vcc2-supply = <&vcc_sys>;
++		vcc3-supply = <&vcc_sys>;
++		vcc4-supply = <&vcc_sys>;
++		vcc6-supply = <&vcc_sys>;
++		vcc7-supply = <&vcc_sys>;
++		vcc8-supply = <&vcc_io>;
++		vcc9-supply = <&vcc_sys>;
++		vcc10-supply = <&vcc_sys>;
++		vcc11-supply = <&vcc_sys>;
++		vcc12-supply = <&vcc_io>;
++		clock-output-names = "xin32k", "rk808-clkout2";
++		#clock-cells = <1>;
++
++		regulators {
++			vdd_cpu: DCDC_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <700000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-name = "vdd_cpu";
++			};
++
++			vdd_log: DCDC_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <700000>;
++				regulator-max-microvolt = <1500000>;
++				regulator-name = "vdd_log";
++			};
++
++			vcc_ddr: DCDC_REG3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc_ddr";
++			};
++
++			vcc_io: DCDC_REG4 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc_io";
++			};
++
++			vcc18_flash: LDO_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc18_flash";
++			};
++
++			vcc33_lcd: LDO_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <3300000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vcc33_lcd";
++			};
++
++			vdd_10: LDO_REG3 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1000000>;
++				regulator-max-microvolt = <1000000>;
++				regulator-name = "vdd_10";
++			};
++
++			vcca_18: LDO_REG4 {
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcca_18";
++			};
++
++			vccio_sd: LDO_REG5 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <3300000>;
++				regulator-name = "vccio_sd";
++			};
++
++			vdd10_lcd: LDO_REG6 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1000000>;
++				regulator-max-microvolt = <1000000>;
++				regulator-name = "vdd10_lcd";
++			};
++
++			vcc_18: LDO_REG7 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc_18";
++			};
++
++			vcc18_lcd: LDO_REG8 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-name = "vcc18_lcd";
++			};
++
++			vcc_sd: SWITCH_REG1 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc_sd";
++			};
++
++			vcc_lan: SWITCH_REG2 {
++				regulator-always-on;
++				regulator-boot-on;
++				regulator-name = "vcc_lan";
++			};
++		};
++	};
++};
++
++&pinctrl {
++	ir {
++		ir_int: ir-int {
++			rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	keys {
++		pwr_key: pwr-key {
++			rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	pmic {
++		pmic_sleep: pmic-sleep {
++			rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
++		};
++
++		pmic_int: pmic-int {
++			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++};
++
++&tsadc {
++	status = "okay";
++	rockchip,hw-tshut-mode = <0>; /* CRU */
++	rockchip,hw-tshut-polarity = <0>; /* low */
++};
++
++&uart2 {
++	status = "okay";
++};
++
++&usb_host0_ehci {
++	status = "okay";
++};
++
++&usb_otg {
++	status = "okay";
++};
++
++&wdt {
++	status = "okay";
++};
+-- 
+2.5.0
+
diff --git a/freed-ora/current/f24/HID-multitouch-enable-palm-rejection-if-device-imple.patch b/freed-ora/current/f24/HID-multitouch-enable-palm-rejection-if-device-imple.patch
deleted file mode 100644
index b9753fce7..000000000
--- a/freed-ora/current/f24/HID-multitouch-enable-palm-rejection-if-device-imple.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 37e81f1a82ba4f214c05c4cc3807378753c7a867 Mon Sep 17 00:00:00 2001
-From: Allen Hung <allen_hung@dell.com>
-Date: Fri, 20 Nov 2015 18:21:06 +0800
-Subject: [PATCH] HID: multitouch: enable palm rejection if device implements
- confidence usage
-
-The usage Confidence is mandary to Windows Precision Touchpad devices. The
-appearance of this usage is checked in hidinput_connect but the quirk
-MT_QUIRK_VALID_IS_CONFIDENCE is not applied to device accordingly.
-Apply this quirk and also remove quirk MT_QUIRK_ALWAYS_VALID to enable palm
-rejection for the WIN 8 touchpad devices which have implemented usage
-Confidence in its input reports.
-
-Tested on Dell XPS 13 laptop.
-
-Signed-off-by: Allen Hung <allen_hung@dell.com>
-Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
-Signed-off-by: Jiri Kosina <jkosina@suse.cz>
----
- drivers/hid/hid-multitouch.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
-index 7c811252c1ce..0c94348a168d 100644
---- a/drivers/hid/hid-multitouch.c
-+++ b/drivers/hid/hid-multitouch.c
-@@ -448,6 +448,11 @@ static int mt_touch_input_mapping(struct hid_device *hdev, struct hid_input *hi,
- 			mt_store_field(usage, td, hi);
- 			return 1;
- 		case HID_DG_CONFIDENCE:
-+			if (cls->name == MT_CLS_WIN_8 &&
-+				field->application == HID_DG_TOUCHPAD) {
-+				cls->quirks &= ~MT_QUIRK_ALWAYS_VALID;
-+				cls->quirks |= MT_QUIRK_VALID_IS_CONFIDENCE;
-+			}
- 			mt_store_field(usage, td, hi);
- 			return 1;
- 		case HID_DG_TIPSWITCH:
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch b/freed-ora/current/f24/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch
new file mode 100644
index 000000000..b1a789e84
--- /dev/null
+++ b/freed-ora/current/f24/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch
@@ -0,0 +1,49 @@
+From 954d6154959c8c196fa4b89fc98a4fb377c6a38d Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Fri, 8 Jan 2016 17:58:49 +0100
+Subject: [PATCH] HID: sony: do not bail out when the sixaxis refuses the
+ output report
+
+When setting the operational mode, some third party (Speedlink Strike-FX)
+gamepads refuse the output report. Failing here means we refuse to
+initialize the gamepad while this should be harmless.
+
+The weird part is that the initial commit that added this: a7de9b8
+("HID: sony: Enable Gasia third-party PS3 controllers") mentions this
+very same controller as one requiring this output report.
+Anyway, it's broken for one user at least, so let's change it.
+We will report an error, but at least the controller should work.
+
+And no, these devices present themselves as legacy Sony controllers
+(VID:PID of 054C:0268, as in the official ones) so there are no ways
+of discriminating them from the official ones.
+
+https://bugzilla.redhat.com/show_bug.cgi?id=1255325
+
+Reported-and-tested-by: Max Fedotov <thesourcehim@gmail.com>
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Signed-off-by: Jiri Kosina <jkosina@suse.cz>
+---
+ drivers/hid/hid-sony.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/hid/hid-sony.c b/drivers/hid/hid-sony.c
+index 661f94f8ab8b..11f91c0c2458 100644
+--- a/drivers/hid/hid-sony.c
++++ b/drivers/hid/hid-sony.c
+@@ -1411,8 +1411,10 @@ static int sixaxis_set_operational_usb(struct hid_device *hdev)
+ 	}
+ 
+ 	ret = hid_hw_output_report(hdev, buf, 1);
+-	if (ret < 0)
+-		hid_err(hdev, "can't set operational mode: step 3\n");
++	if (ret < 0) {
++		hid_info(hdev, "can't set operational mode: step 3, ignoring\n");
++		ret = 0;
++	}
+ 
+ out:
+ 	kfree(buf);
+-- 
+2.5.0
+
diff --git a/freed-ora/current/f24/Initial-AllWinner-A64-and-PINE64-support.patch b/freed-ora/current/f24/Initial-AllWinner-A64-and-PINE64-support.patch
new file mode 100644
index 000000000..d21cbc1ca
--- /dev/null
+++ b/freed-ora/current/f24/Initial-AllWinner-A64-and-PINE64-support.patch
@@ -0,0 +1,1882 @@
+From 97f002d28e975991226ab70599731bd2ccc8c060 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Sun, 6 Mar 2016 12:06:41 +0000
+Subject: [PATCH] Initial AllWinner A64 and PINE64 support
+
+---
+ Documentation/devicetree/bindings/arm/sunxi.txt    |   1 +
+ Documentation/devicetree/bindings/clock/sunxi.txt  |   7 +
+ .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt   |   1 +
+ .../devicetree/bindings/vendor-prefixes.txt        |   1 +
+ arch/arm/boot/dts/sun8i-h3.dtsi                    |  18 +-
+ arch/arm/mach-sunxi/Kconfig                        |   7 +
+ arch/arm64/Kconfig.platforms                       |   6 +
+ arch/arm64/boot/dts/Makefile                       |   1 +
+ arch/arm64/boot/dts/allwinner/Makefile             |   5 +
+ .../dts/allwinner/sun50i-a64-pine64-common.dtsi    |  80 +++
+ .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  |  59 ++
+ .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |  58 ++
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 624 +++++++++++++++++++++
+ drivers/clk/sunxi/Makefile                         |   1 +
+ drivers/clk/sunxi/clk-factors.c                    |   3 +-
+ drivers/clk/sunxi/clk-factors.h                    |   1 +
+ drivers/clk/sunxi/clk-multi-gates.c                | 105 ++++
+ drivers/clk/sunxi/clk-sunxi.c                      |   4 +-
+ drivers/crypto/Kconfig                             |   2 +-
+ drivers/pinctrl/sunxi/Kconfig                      |   4 +
+ drivers/pinctrl/sunxi/Makefile                     |   1 +
+ drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c         | 602 ++++++++++++++++++++
+ drivers/rtc/Kconfig                                |   7 +-
+ 23 files changed, 1582 insertions(+), 16 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/allwinner/Makefile
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+ create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+ create mode 100644 drivers/clk/sunxi/clk-multi-gates.c
+ create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+
+diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt
+index bb9b0faa..8b39d2b 100644
+--- a/Documentation/devicetree/bindings/arm/sunxi.txt
++++ b/Documentation/devicetree/bindings/arm/sunxi.txt
+@@ -13,3 +13,4 @@ using one of the following compatible strings:
+   allwinner,sun8i-a33
+   allwinner,sun8i-h3
+   allwinner,sun9i-a80
++  allwinner,sun50i-a64
+diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
+index e59f57b..8af12b5 100644
+--- a/Documentation/devicetree/bindings/clock/sunxi.txt
++++ b/Documentation/devicetree/bindings/clock/sunxi.txt
+@@ -77,6 +77,8 @@ Required properties:
+ 	"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
+ 	"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
+ 	"allwinner,sun4i-a10-ve-clk" - for the Video Engine clock
++	"allwinner,sunxi-multi-bus-gates-clk" - for the multi-parent bus gates
++	"allwinner,sun50i-a64-bus-gates-clk" - for the bus gates on A64
+ 
+ Required properties for all clocks:
+ - reg : shall be the control register address for the clock.
+@@ -117,6 +119,11 @@ For "allwinner,sun6i-a31-pll6-clk", there are 2 outputs. The first output
+ is the normal PLL6 output, or "pll6". The second output is rate doubled
+ PLL6, or "pll6x2".
+ 
++The "allwinner,sunxi-multi-bus-gates-clk" holds the actual clocks in
++child nodes, where each one specifies the parent clock that the particular
++gates are depending from. The child nodes each follow the common clock
++binding as described in this document.
++
+ The "allwinner,*-mmc-clk" clocks have three different outputs: the
+ main clock, with the ID 0, and the output and sample clocks, with the
+ IDs 1 and 2, respectively.
+diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+index 9213b27..08b2361 100644
+--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
++++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+@@ -21,6 +21,7 @@ Required properties:
+   "allwinner,sun9i-a80-r-pinctrl"
+   "allwinner,sun8i-a83t-pinctrl"
+   "allwinner,sun8i-h3-pinctrl"
++  "allwinner,sun50i-a64-pinctrl"
+ 
+ - reg: Should contain the register physical address and length for the
+   pin controller.
+diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
+index 72e2c5a..0c22fa9 100644
+--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
++++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
+@@ -175,6 +175,7 @@ parade	Parade Technologies Inc.
+ pericom	Pericom Technology Inc.
+ phytec	PHYTEC Messtechnik GmbH
+ picochip	Picochip Ltd
++pine64	Pine64
+ plathome	Plat'Home Co., Ltd.
+ plda	PLDA
+ pixcir  PIXCIR MICROELECTRONICS Co., Ltd
+diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
+index 1524130e..7c50fa0 100644
+--- a/arch/arm/boot/dts/sun8i-h3.dtsi
++++ b/arch/arm/boot/dts/sun8i-h3.dtsi
+@@ -137,12 +137,12 @@
+ 			clock-output-names = "pll6d2";
+ 		};
+ 
+-		/* dummy clock until pll6 can be reused */
+-		pll8: pll8_clk {
+-			#clock-cells = <0>;
+-			compatible = "fixed-clock";
+-			clock-frequency = <1>;
+-			clock-output-names = "pll8";
++		pll8: clk@c01c20044 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun6i-a31-pll6-clk";
++			reg = <0x01c20044 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll8", "pll8x2";
+ 		};
+ 
+ 		cpu: cpu_clk@01c20050 {
+@@ -243,7 +243,7 @@
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c20088 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
+ 			clock-output-names = "mmc0",
+ 					     "mmc0_output",
+ 					     "mmc0_sample";
+@@ -253,7 +253,7 @@
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c2008c 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
+ 			clock-output-names = "mmc1",
+ 					     "mmc1_output",
+ 					     "mmc1_sample";
+@@ -263,7 +263,7 @@
+ 			#clock-cells = <1>;
+ 			compatible = "allwinner,sun4i-a10-mmc-clk";
+ 			reg = <0x01c20090 0x4>;
+-			clocks = <&osc24M>, <&pll6 0>, <&pll8>;
++			clocks = <&osc24M>, <&pll6 0>, <&pll8 0>;
+ 			clock-output-names = "mmc2",
+ 					     "mmc2_output",
+ 					     "mmc2_sample";
+diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
+index c124d65..b305f5b 100644
+--- a/arch/arm/mach-sunxi/Kconfig
++++ b/arch/arm/mach-sunxi/Kconfig
+@@ -46,4 +46,11 @@ config MACH_SUN9I
+ 	default ARCH_SUNXI
+ 	select ARM_GIC
+ 
++config MACH_SUN50I
++	bool "Allwinner A64 (sun50i) SoCs support"
++	default ARCH_SUNXI
++	select ARM_GIC
++	select HAVE_ARM_ARCH_TIMER
++	select PINCTRL_SUN50I_A64
++
+ endif
+diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
+index 21074f6..63a690d 100644
+--- a/arch/arm64/Kconfig.platforms
++++ b/arch/arm64/Kconfig.platforms
+@@ -72,6 +72,12 @@ config ARCH_SEATTLE
+ config ARCH_SHMOBILE
+ 	bool
+ 
++config ARCH_SUNXI
++	bool "Allwinner sunxi 64-bit SoC Family"
++	select PINCTRL_SUN50I_A64
++	help
++	  This enables support for Allwinner sunxi based SoCs like the A64.
++
+ config ARCH_RENESAS
+ 	bool "Renesas SoC Platforms"
+ 	select ARCH_SHMOBILE
+diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
+index f832b8a..3b7428a 100644
+--- a/arch/arm64/boot/dts/Makefile
++++ b/arch/arm64/boot/dts/Makefile
+@@ -1,3 +1,4 @@
++dts-dirs += allwinner
+ dts-dirs += altera
+ dts-dirs += amd
+ dts-dirs += apm
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
+new file mode 100644
+index 0000000..1e29a5a
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -0,0 +1,5 @@
++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
++
++always		:= $(dtb-y)
++subdir-y	:= $(dts-dirs)
++clean-files	:= *.dtb
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
+new file mode 100644
+index 0000000..d5a7249
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi
+@@ -0,0 +1,80 @@
++/*
++ * Copyright (c) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This library is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This library is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include "sun50i-a64.dtsi"
++
++/ {
++
++	aliases {
++		serial0 = &uart0;
++	};
++
++	soc {
++		reg_vcc3v3: vcc3v3 {
++			compatible = "regulator-fixed";
++			regulator-name = "vcc3v3";
++			regulator-min-microvolt = <3300000>;
++			regulator-max-microvolt = <3300000>;
++		};
++	};
++};
++
++&mmc0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>;
++	vmmc-supply = <&reg_vcc3v3>;
++	cd-gpios = <&pio 5 6 0>;
++	cd-inverted;
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&i2c1_pins>;
++	status = "okay";
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+new file mode 100644
+index 0000000..549dc15
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+@@ -0,0 +1,59 @@
++/*
++ * Copyright (c) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This library is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This library is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "sun50i-a64-pine64-common.dtsi"
++
++/ {
++	model = "Pine64+";
++	compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	/* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */
++	memory {
++		reg = <0x40000000 0x40000000>;
++	};
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+new file mode 100644
+index 0000000..ebe029e
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+@@ -0,0 +1,58 @@
++/*
++ * Copyright (c) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This library is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This library is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "sun50i-a64-pine64-common.dtsi"
++
++/ {
++	model = "Pine64";
++	compatible = "pine64,pine64", "allwinner,sun50i-a64";
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	memory {
++		reg = <0x40000000 0x20000000>;
++	};
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+new file mode 100644
+index 0000000..1bd436f
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -0,0 +1,624 @@
++/*
++ * Copyright (C) 2016 ARM Ltd.
++ * based on the Allwinner H3 dtsi:
++ *    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
++
++/ {
++	interrupt-parent = <&gic>;
++	#address-cells = <1>;
++	#size-cells = <1>;
++
++	cpus {
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		cpu@0 {
++			compatible = "arm,cortex-a53", "arm,armv8";
++			device_type = "cpu";
++			reg = <0>;
++			enable-method = "psci";
++		};
++
++		cpu@1 {
++			compatible = "arm,cortex-a53", "arm,armv8";
++			device_type = "cpu";
++			reg = <1>;
++			enable-method = "psci";
++		};
++
++		cpu@2 {
++			compatible = "arm,cortex-a53", "arm,armv8";
++			device_type = "cpu";
++			reg = <2>;
++			enable-method = "psci";
++		};
++
++		cpu@3 {
++			compatible = "arm,cortex-a53", "arm,armv8";
++			device_type = "cpu";
++			reg = <3>;
++			enable-method = "psci";
++		};
++	};
++
++	psci {
++		compatible = "arm,psci-0.2";
++		method = "smc";
++	};
++
++	memory {
++		device_type = "memory";
++		reg = <0x40000000 0>;
++	};
++
++	gic: interrupt-controller@1c81000 {
++		compatible = "arm,gic-400";
++		interrupt-controller;
++		#interrupt-cells = <3>;
++		#address-cells = <0>;
++
++		reg = <0x01c81000 0x1000>,
++		      <0x01c82000 0x2000>,
++		      <0x01c84000 0x2000>,
++		      <0x01c86000 0x2000>;
++		interrupts = <GIC_PPI 9
++		      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
++	};
++
++	timer {
++		compatible = "arm,armv8-timer";
++		interrupts = <GIC_PPI 13
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 14
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 11
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
++			     <GIC_PPI 10
++			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
++	};
++
++	clocks {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++
++		osc24M: osc24M_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <24000000>;
++			clock-output-names = "osc24M";
++		};
++
++		osc32k: osc32k_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <32768>;
++			clock-output-names = "osc32k";
++		};
++
++		pll1: pll1_clk@1c20000 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun8i-a23-pll1-clk";
++			reg = <0x01c20000 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll1";
++		};
++
++		pll6: pll6_clk@1c20028 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun6i-a31-pll6-clk";
++			reg = <0x01c20028 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll6", "pll6x2";
++		};
++
++		pll6d2: pll6d2_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-factor-clock";
++			clock-div = <2>;
++			clock-mult = <1>;
++			clocks = <&pll6 0>;
++			clock-output-names = "pll6d2";
++		};
++
++		pll7: pll7_clk@1c2002c {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun6i-a31-pll6-clk";
++			reg = <0x01c2002c 0x4>;
++			clocks = <&osc24M>;
++			clock-output-names = "pll7", "pll7x2";
++		};
++
++		cpu: cpu_clk@1c20050 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-cpu-clk";
++			reg = <0x01c20050 0x4>;
++			clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
++			clock-output-names = "cpu";
++			critical-clocks = <0>;
++		};
++
++		axi: axi_clk@1c20050 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-axi-clk";
++			reg = <0x01c20050 0x4>;
++			clocks = <&cpu>;
++			clock-output-names = "axi";
++		};
++
++		ahb1: ahb1_clk@1c20054 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun6i-a31-ahb1-clk";
++			reg = <0x01c20054 0x4>;
++			clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
++			clock-output-names = "ahb1";
++		};
++
++		ahb2: ahb2_clk@1c2005c {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun8i-h3-ahb2-clk";
++			reg = <0x01c2005c 0x4>;
++			clocks = <&ahb1>, <&pll6d2>;
++			clock-output-names = "ahb2";
++		};
++
++		apb1: apb1_clk@1c20054 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-apb0-clk";
++			reg = <0x01c20054 0x4>;
++			clocks = <&ahb1>;
++			clock-output-names = "apb1";
++		};
++
++		apb2: apb2_clk@1c20058 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-apb1-clk";
++			reg = <0x01c20058 0x4>;
++			clocks = <&osc32k>, <&osc24M>, <&pll6 1>, <&pll6 1>;
++			clock-output-names = "apb2";
++		};
++
++		bus_gates: bus_gates_clk@1c20060 {
++			#clock-cells = <1>;
++			compatible = "allwinner,sun50i-a64-bus-gates-clk",
++				     "allwinner,sunxi-multi-bus-gates-clk";
++			reg = <0x01c20060 0x14>;
++			ahb1_parent {
++				clocks = <&ahb1>;
++				clock-indices = <1>, <5>,
++						<6>, <8>,
++						<9>, <10>,
++						<13>, <14>,
++						<18>, <19>,
++						<20>, <21>,
++						<23>, <24>,
++						<25>, <28>,
++						<32>, <35>,
++						<36>, <37>,
++						<40>, <43>,
++						<44>, <52>,
++						<53>, <54>,
++						<135>;
++				clock-output-names = "bus_mipidsi", "bus_ce",
++						"bus_dma", "bus_mmc0",
++						"bus_mmc1", "bus_mmc2",
++						"bus_nand", "bus_sdram",
++						"bus_ts", "bus_hstimer",
++						"bus_spi0", "bus_spi1",
++						"bus_otg", "bus_otg_ehci0",
++						"bus_ehci0", "bus_otg_ohci0",
++						"bus_ve", "bus_lcd0",
++						"bus_lcd1", "bus_deint",
++						"bus_csi", "bus_hdmi",
++						"bus_de", "bus_gpu",
++						"bus_msgbox", "bus_spinlock",
++						"bus_dbg";
++			};
++			ahb2_parent {
++				clocks = <&ahb2>;
++				clock-indices = <17>, <29>;
++				clock-output-names = "bus_gmac", "bus_ohci0";
++			};
++			apb1_parent {
++				clocks = <&apb1>;
++				clock-indices = <64>, <65>,
++						<69>, <72>,
++						<76>, <77>,
++						<78>;
++				clock-output-names = "bus_codec", "bus_spdif",
++						"bus_pio", "bus_ths",
++						"bus_i2s0", "bus_i2s1",
++						"bus_i2s2";
++			};
++			abp2_parent {
++				clocks = <&apb2>;
++				clock-indices = <96>, <97>,
++						<98>, <101>,
++						<112>, <113>,
++						<114>, <115>,
++						<116>;
++				clock-output-names = "bus_i2c0", "bus_i2c1",
++						"bus_i2c2", "bus_scr",
++						"bus_uart0", "bus_uart1",
++						"bus_uart2", "bus_uart3",
++						"bus_uart4";
++			};
++		};
++
++		mmc0_clk: mmc0_clk@1c20088 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c20088 0x4>;
++			clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
++			clock-output-names = "mmc0";
++                };
++
++		mmc1_clk: mmc1_clk@1c2008c {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c2008c 0x4>;
++			clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
++			clock-output-names = "mmc1";
++		};
++
++		mmc2_clk: mmc2_clk@1c20090 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun4i-a10-mod0-clk";
++			reg = <0x01c20090 0x4>;
++			clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
++			clock-output-names = "mmc2";
++		};
++	};
++
++	soc {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++
++		mmc0: mmc@1c0f000 {
++			compatible = "allwinner,sun50i-a64-mmc",
++				     "allwinner,sun5i-a13-mmc";
++			reg = <0x01c0f000 0x1000>;
++			clocks = <&bus_gates 8>, <&mmc0_clk>,
++				 <&mmc0_clk>, <&mmc0_clk>;
++			clock-names = "ahb", "mmc",
++				      "output", "sample";
++			resets = <&ahb_rst 8>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		mmc1: mmc@1c10000 {
++			compatible = "allwinner,sun50i-a64-mmc",
++				     "allwinner,sun5i-a13-mmc";
++			reg = <0x01c10000 0x1000>;
++			clocks = <&bus_gates 9>, <&mmc1_clk>,
++				 <&mmc1_clk>, <&mmc1_clk>;
++			clock-names = "ahb", "mmc",
++				      "output", "sample";
++			resets = <&ahb_rst 9>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		mmc2: mmc@1c11000 {
++			compatible = "allwinner,sun50i-a64-mmc",
++				     "allwinner,sun5i-a13-mmc";
++			reg = <0x01c11000 0x1000>;
++			clocks = <&bus_gates 10>, <&mmc2_clk>,
++				 <&mmc2_clk>, <&mmc2_clk>;
++			clock-names = "ahb", "mmc",
++				      "output", "sample";
++			resets = <&ahb_rst 10>;
++			reset-names = "ahb";
++			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		pio: pinctrl@1c20800 {
++			compatible = "allwinner,sun50i-a64-pinctrl";
++			reg = <0x01c20800 0x400>;
++			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&bus_gates 69>;
++			gpio-controller;
++			#gpio-cells = <3>;
++			interrupt-controller;
++			#interrupt-cells = <2>;
++
++			uart0_pins_a: uart0@0 {
++				allwinner,pins = "PB8", "PB9";
++				allwinner,function = "uart0";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart0_pins_b: uart0@1 {
++				allwinner,pins = "PF2", "PF3";
++				allwinner,function = "uart0";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart1_2pins: uart1_2@0 {
++				allwinner,pins = "PG6", "PG7";
++				allwinner,function = "uart1";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart1_4pins: uart1_4@0 {
++				allwinner,pins = "PG6", "PG7", "PG8", "PG9";
++				allwinner,function = "uart1";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart2_2pins: uart2_2@0 {
++				allwinner,pins = "PB0", "PB1";
++				allwinner,function = "uart2";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart2_4pins: uart2_4@0 {
++				allwinner,pins = "PB0", "PB1", "PB2", "PB3";
++				allwinner,function = "uart2";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart3_pins_a: uart3@0 {
++				allwinner,pins = "PD0", "PD1";
++				allwinner,function = "uart3";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart3_2pins_b: uart3_2@1 {
++				allwinner,pins = "PH4", "PH5";
++				allwinner,function = "uart3";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart3_4pins_b: uart3_4@1 {
++				allwinner,pins = "PH4", "PH5", "PH6", "PH7";
++				allwinner,function = "uart3";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart4_2pins: uart4_2@0 {
++				allwinner,pins = "PD2", "PD3";
++				allwinner,function = "uart4";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			uart4_4pins: uart4_4@0 {
++				allwinner,pins = "PD2", "PD3", "PD4", "PD5";
++				allwinner,function = "uart4";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			mmc0_pins: mmc0@0 {
++				allwinner,pins = "PF0", "PF1", "PF2", "PF3",
++						 "PF4", "PF5";
++				allwinner,function = "mmc0";
++				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			mmc0_default_cd_pin: mmc0_cd_pin@0 {
++				allwinner,pins = "PF6";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
++			};
++
++			mmc1_pins: mmc1@0 {
++				allwinner,pins = "PG0", "PG1", "PG2", "PG3",
++						 "PG4", "PG5";
++				allwinner,function = "mmc1";
++				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			mmc2_pins: mmc2@0 {
++				allwinner,pins = "PC1", "PC5", "PC6", "PC8",
++						 "PC9", "PC10";
++				allwinner,function = "mmc2";
++				allwinner,drive = <SUN4I_PINCTRL_30_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			i2c0_pins: i2c0_pins {
++				allwinner,pins = "PH0", "PH1";
++				allwinner,function = "i2c0";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			i2c1_pins: i2c1_pins {
++				allwinner,pins = "PH2", "PH3";
++				allwinner,function = "i2c1";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++
++			i2c2_pins: i2c2_pins {
++				allwinner,pins = "PE14", "PE15";
++				allwinner,function = "i2c2";
++				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
++				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
++			};
++		};
++
++		ahb_rst: reset@1c202c0 {
++			#reset-cells = <1>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			reg = <0x01c202c0 0xc>;
++		};
++
++		apb1_rst: reset@1c202d0 {
++			#reset-cells = <1>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			reg = <0x01c202d0 0x4>;
++		};
++
++		apb2_rst: reset@1c202d8 {
++			#reset-cells = <1>;
++			compatible = "allwinner,sun6i-a31-clock-reset";
++			reg = <0x01c202d8 0x4>;
++		};
++
++		uart0: serial@1c28000 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c28000 0x400>;
++			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 112>;
++			resets = <&apb2_rst 16>;
++			status = "disabled";
++		};
++
++		uart1: serial@1c28400 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c28400 0x400>;
++			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 113>;
++			resets = <&apb2_rst 17>;
++			status = "disabled";
++		};
++
++		uart2: serial@1c28800 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c28800 0x400>;
++			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 114>;
++			resets = <&apb2_rst 18>;
++			status = "disabled";
++		};
++
++		uart3: serial@1c28c00 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c28c00 0x400>;
++			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 115>;
++			resets = <&apb2_rst 19>;
++			status = "disabled";
++		};
++
++		uart4: serial@1c29000 {
++			compatible = "snps,dw-apb-uart";
++			reg = <0x01c29000 0x400>;
++			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
++			reg-shift = <2>;
++			reg-io-width = <4>;
++			clocks = <&bus_gates 116>;
++			resets = <&apb2_rst 20>;
++			status = "disabled";
++		};
++
++		rtc: rtc@1f00000 {
++			compatible = "allwinner,sun6i-a31-rtc";
++			reg = <0x01f00000 0x54>;
++			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
++				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
++		};
++
++		i2c0: i2c@1c2ac00 {
++			compatible = "allwinner,sun6i-a31-i2c";
++			reg = <0x01c2ac00 0x400>;
++			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&bus_gates 96>;
++			resets = <&apb2_rst 0>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		i2c1: i2c@1c2b000 {
++			compatible = "allwinner,sun6i-a31-i2c";
++			reg = <0x01c2b000 0x400>;
++			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&bus_gates 97>;
++			resets = <&apb2_rst 1>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++
++		i2c2: i2c@1c2b400 {
++			compatible = "allwinner,sun6i-a31-i2c";
++			reg = <0x01c2b400 0x400>;
++			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&bus_gates 98>;
++			resets = <&apb2_rst 2>;
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++	};
++};
+diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
+index 3fd7901..3a9dc31 100644
+--- a/drivers/clk/sunxi/Makefile
++++ b/drivers/clk/sunxi/Makefile
+@@ -11,6 +11,7 @@ obj-y += clk-a10-ve.o
+ obj-y += clk-a20-gmac.o
+ obj-y += clk-mod0.o
+ obj-y += clk-simple-gates.o
++obj-y += clk-multi-gates.o
+ obj-y += clk-sun8i-bus-gates.o
+ obj-y += clk-sun8i-mbus.o
+ obj-y += clk-sun9i-core.o
+diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
+index 59428db..607ba53 100644
+--- a/drivers/clk/sunxi/clk-factors.c
++++ b/drivers/clk/sunxi/clk-factors.c
+@@ -184,7 +184,8 @@ struct clk *sunxi_factors_register(struct device_node *node,
+ 	if (data->name)
+ 		clk_name = data->name;
+ 	else
+-		of_property_read_string(node, "clock-output-names", &clk_name);
++		of_property_read_string_index(node, "clock-output-names",
++					      data->name_idx, &clk_name);
+ 
+ 	factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
+ 	if (!factors)
+diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
+index 171085a..cc89d1f 100644
+--- a/drivers/clk/sunxi/clk-factors.h
++++ b/drivers/clk/sunxi/clk-factors.h
+@@ -26,6 +26,7 @@ struct factors_data {
+ 	struct clk_factors_config *table;
+ 	void (*getter) (u32 *rate, u32 parent_rate, u8 *n, u8 *k, u8 *m, u8 *p);
+ 	const char *name;
++	int name_idx;
+ };
+ 
+ struct clk_factors {
+diff --git a/drivers/clk/sunxi/clk-multi-gates.c b/drivers/clk/sunxi/clk-multi-gates.c
+new file mode 100644
+index 0000000..76e715a
+--- /dev/null
++++ b/drivers/clk/sunxi/clk-multi-gates.c
+@@ -0,0 +1,105 @@
++/*
++ * Copyright (C) 2016 ARM Ltd.
++ *
++ * Based on clk-sun8i-bus-gates.c, which is:
++ *  Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
++ * Based on clk-simple-gates.c, which is:
++ *  Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/clk-provider.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++static DEFINE_SPINLOCK(gates_lock);
++
++static void __init sunxi_parse_parent(struct device_node *node,
++				      struct clk_onecell_data *clk_data,
++				      void __iomem *reg)
++{
++	const char *parent = of_clk_get_parent_name(node, 0);
++	const char *clk_name;
++	struct property *prop;
++	struct clk *clk;
++	const __be32 *p;
++	int index, i = 0;
++
++	of_property_for_each_u32(node, "clock-indices", prop, p, index) {
++		of_property_read_string_index(node, "clock-output-names",
++					      i, &clk_name);
++
++		clk = clk_register_gate(NULL, clk_name, parent, 0,
++					reg + 4 * (index / 32), index % 32,
++					0, &gates_lock);
++		i++;
++		if (IS_ERR(clk)) {
++			pr_warn("could not register gate clock \"%s\"\n",
++				clk_name);
++			continue;
++		}
++		if (clk_data->clks[index])
++			pr_warn("bus-gate clock %s: index #%d already registered as %s\n",
++				clk_name, index, "?");
++		else
++			clk_data->clks[index] = clk;
++	}
++}
++
++static void __init sunxi_multi_bus_gates_init(struct device_node *node)
++{
++	struct clk_onecell_data *clk_data;
++	struct device_node *child;
++	struct property *prop;
++	struct resource res;
++	void __iomem *reg;
++	const __be32 *p;
++	int number = 0;
++	int index;
++
++	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
++	if (IS_ERR(reg))
++		return;
++
++	clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
++	if (!clk_data)
++		goto err_unmap;
++
++	for_each_child_of_node(node, child)
++		of_property_for_each_u32(child, "clock-indices", prop, p, index)
++			number = max(number, index);
++
++	clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
++	if (!clk_data->clks)
++		goto err_free_data;
++
++	for_each_child_of_node(node, child)
++		sunxi_parse_parent(child, clk_data, reg);
++
++	clk_data->clk_num = number + 1;
++	if (of_clk_add_provider(node, of_clk_src_onecell_get, clk_data))
++		pr_err("registering bus-gate clock %s failed\n", node->name);
++
++	return;
++
++err_free_data:
++	kfree(clk_data);
++err_unmap:
++	iounmap(reg);
++	of_address_to_resource(node, 0, &res);
++	release_mem_region(res.start, resource_size(&res));
++}
++
++CLK_OF_DECLARE(sunxi_multi_bus_gates, "allwinner,sunxi-multi-bus-gates-clk",
++	       sunxi_multi_bus_gates_init);
+diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
+index 5ba2188..ca59458 100644
+--- a/drivers/clk/sunxi/clk-sunxi.c
++++ b/drivers/clk/sunxi/clk-sunxi.c
+@@ -711,14 +711,14 @@ static const struct factors_data sun4i_pll6_data __initconst = {
+ 	.enable = 31,
+ 	.table = &sun4i_pll5_config,
+ 	.getter = sun4i_get_pll5_factors,
+-	.name = "pll6",
++	.name_idx = 2,
+ };
+ 
+ static const struct factors_data sun6i_a31_pll6_data __initconst = {
+ 	.enable = 31,
+ 	.table = &sun6i_a31_pll6_config,
+ 	.getter = sun6i_a31_get_pll6_factors,
+-	.name = "pll6x2",
++	.name_idx = 1,
+ };
+ 
+ static const struct factors_data sun5i_a13_ahb_data __initconst = {
+diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
+index 07d4942..737200f 100644
+--- a/drivers/crypto/Kconfig
++++ b/drivers/crypto/Kconfig
+@@ -487,7 +487,7 @@ config CRYPTO_DEV_IMGTEC_HASH
+ 
+ config CRYPTO_DEV_SUN4I_SS
+ 	tristate "Support for Allwinner Security System cryptographic accelerator"
+-	depends on ARCH_SUNXI
++	depends on ARCH_SUNXI && !64BIT
+ 	select CRYPTO_MD5
+ 	select CRYPTO_SHA1
+ 	select CRYPTO_AES
+diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
+index f8dbc8b..c1f970f 100644
+--- a/drivers/pinctrl/sunxi/Kconfig
++++ b/drivers/pinctrl/sunxi/Kconfig
+@@ -64,4 +64,8 @@ config PINCTRL_SUN9I_A80_R
+ 	depends on RESET_CONTROLLER
+ 	select PINCTRL_SUNXI_COMMON
+ 
++config PINCTRL_SUN50I_A64
++	bool
++	select PINCTRL_SUNXI_COMMON
++
+ endif
+diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
+index ef82f22..0ca7681 100644
+--- a/drivers/pinctrl/sunxi/Makefile
++++ b/drivers/pinctrl/sunxi/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_SUN7I_A20)		+= pinctrl-sun7i-a20.o
+ obj-$(CONFIG_PINCTRL_SUN8I_A23)		+= pinctrl-sun8i-a23.o
+ obj-$(CONFIG_PINCTRL_SUN8I_A23_R)	+= pinctrl-sun8i-a23-r.o
+ obj-$(CONFIG_PINCTRL_SUN8I_A33)		+= pinctrl-sun8i-a33.o
++obj-$(CONFIG_PINCTRL_SUN50I_A64)	+= pinctrl-sun50i-a64.o
+ obj-$(CONFIG_PINCTRL_SUN8I_A83T)	+= pinctrl-sun8i-a83t.o
+ obj-$(CONFIG_PINCTRL_SUN8I_H3)		+= pinctrl-sun8i-h3.o
+ obj-$(CONFIG_PINCTRL_SUN9I_A80)		+= pinctrl-sun9i-a80.o
+diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+new file mode 100644
+index 0000000..a53cc23
+--- /dev/null
++++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+@@ -0,0 +1,602 @@
++/*
++ * Allwinner A64 SoCs pinctrl driver.
++ *
++ * Copyright (C) 2016 - ARM Ltd.
++ * Author: Andre Przywara <andre.przywara@arm.com>
++ *
++ * Based on pinctrl-sun7i-a20.c, which is:
++ * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2.  This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/pinctrl/pinctrl.h>
++
++#include "pinctrl-sunxi.h"
++
++static const struct sunxi_desc_pin a64_pins[] = {
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart2"),		/* TX */
++		  SUNXI_FUNCTION(0x4, "jtag"),		/* MS0 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* EINT0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart2"),		/* RX */
++		  SUNXI_FUNCTION(0x4, "jtag"),		/* CK0 */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* VCCEN */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),		/* EINT1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart2"),		/* RTS */
++		  SUNXI_FUNCTION(0x4, "jtag"),		/* DO0 */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* VPPEN */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),		/* EINT2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart2"),		/* CTS */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* MCLK */
++		  SUNXI_FUNCTION(0x4, "jtag"),		/* DI0 */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* VPPPP */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),		/* EINT3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif2"),		/* SYNC */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* SYNC */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* CLK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),		/* EINT4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif2"),		/* BCLK */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* BCLK */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* DATA */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),		/* EINT5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif2"),		/* DOUT */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* DOUT */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* RST */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),		/* EINT6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif2"),		/* DIN */
++		  SUNXI_FUNCTION(0x3, "i2s0"),		/* DIN */
++		  SUNXI_FUNCTION(0x5, "sim"),		/* DET */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),		/* EINT7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x4, "uart0"),		/* TX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),		/* EINT8 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x4, "uart0"),		/* RX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),		/* EINT9 */
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NWE */
++		  SUNXI_FUNCTION(0x4, "spi0")),		/* MOSI */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NALE */
++		  SUNXI_FUNCTION(0x3, "mmc2"),		/* DS */
++		  SUNXI_FUNCTION(0x4, "spi0")),		/* MISO */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NCLE */
++		  SUNXI_FUNCTION(0x4, "spi0")),		/* SCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NCE1 */
++		  SUNXI_FUNCTION(0x4, "spi0")),		/* CS */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0")),	/* NCE0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NRE# */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* CLK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NRB0 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* CMD */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0")),	/* NRB1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ0 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ1 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ2 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ3 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ4 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ5 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ6 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQ7 */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* D7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "nand0"),		/* NDQS */
++		  SUNXI_FUNCTION(0x3, "mmc2")),		/* RST */
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D2 */
++		  SUNXI_FUNCTION(0x3, "uart3"),		/* TX */
++		  SUNXI_FUNCTION(0x4, "spi1"),		/* CS */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* CLK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D3 */
++		  SUNXI_FUNCTION(0x3, "uart3"),		/* RX */
++		  SUNXI_FUNCTION(0x4, "spi1"),		/* CLK */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* DE */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D4 */
++		  SUNXI_FUNCTION(0x3, "uart4"),		/* TX */
++		  SUNXI_FUNCTION(0x4, "spi1"),		/* MOSI */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* HSYNC */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D5 */
++		  SUNXI_FUNCTION(0x3, "uart4"),		/* RX */
++		  SUNXI_FUNCTION(0x4, "spi1"),		/* MISO */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* VSYNC */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D6 */
++		  SUNXI_FUNCTION(0x3, "uart4"),		/* RTS */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D7 */
++		  SUNXI_FUNCTION(0x3, "uart4"),		/* CTS */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D10 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D11 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D12 */
++		  SUNXI_FUNCTION(0x4, "emac"),		/* ERXD3 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D13 */
++		  SUNXI_FUNCTION(0x4, "emac"),		/* ERXD2 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D14 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ERXD1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D15 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ERXD0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D18 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP0 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ERXCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D19 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN0 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ERXCTL */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D20 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP1 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ENULL */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D21 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN1 */
++		  SUNXI_FUNCTION(0x4, "emac"),		/* ETXD3 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D22 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP2 */
++		  SUNXI_FUNCTION(0x4, "emac"),		/* ETXD2 */
++		  SUNXI_FUNCTION(0x5, "ccir")),		/* D7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D23 */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN2 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ETXD1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* CLK */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VPC */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ETXD0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* DE */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VNC */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ETXCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* HSYNC */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP3 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ETXCTL */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "lcd0"),		/* VSYNC */
++		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN3 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* ECLKIN */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "pwm"),		/* PWM0 */
++		  SUNXI_FUNCTION(0x4, "emac")),		/* EMDC */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x4, "emac")),		/* EMDIO */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out")),
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* PCK */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* CLK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* CK */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* ERR */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* HSYNC */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* SYNC */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* VSYNC */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* DVLD */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D0 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D1 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D2 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D3 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D4 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D5 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D6 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0"),		/* D7 */
++		  SUNXI_FUNCTION(0x4, "ts0")),		/* D7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0")),		/* SCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "csi0")),		/* SDA */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "pll"),		/* LOCK_DBG */
++		  SUNXI_FUNCTION(0x3, "i2c2")),		/* SCK */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x3, "i2c2")),		/* SDA */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out")),
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out")),
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D1 */
++		  SUNXI_FUNCTION(0x3, "jtag")),		/* MSI */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D0 */
++		  SUNXI_FUNCTION(0x3, "jtag")),		/* DI1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* CLK */
++		  SUNXI_FUNCTION(0x3, "uart0")),	/* TX */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* CMD */
++		  SUNXI_FUNCTION(0x3, "jtag")),		/* DO1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D3 */
++		  SUNXI_FUNCTION(0x4, "uart0")),	/* RX */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc0"),		/* D2 */
++		  SUNXI_FUNCTION(0x3, "jtag")),		/* CK1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out")),
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* CLK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),	/* EINT0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* CMD */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),	/* EINT1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* D0 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),	/* EINT2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* D1 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),	/* EINT3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* D2 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),	/* EINT4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mmc1"),		/* D3 */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),	/* EINT5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart1"),		/* TX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),	/* EINT6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart1"),		/* RX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),	/* EINT7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart1"),		/* RTS */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),	/* EINT8 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart1"),		/* CTS */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),	/* EINT9 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif3"),		/* SYNC */
++		  SUNXI_FUNCTION(0x3, "i2s1"),		/* SYNC */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)),	/* EINT10 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif3"),		/* BCLK */
++		  SUNXI_FUNCTION(0x3, "i2s1"),		/* BCLK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)),	/* EINT11 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif3"),		/* DOUT */
++		  SUNXI_FUNCTION(0x3, "i2s1"),		/* DOUT */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)),	/* EINT12 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "aif3"),		/* DIN */
++		  SUNXI_FUNCTION(0x3, "i2s1"),		/* DIN */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)),	/* EINT13 */
++	/* Hole */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "i2c0"),		/* SCK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),	/* EINT0 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "i2c0"),		/* SDA */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),	/* EINT1 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "i2c1"),		/* SCK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),	/* EINT2 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "i2c1"),		/* SDA */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),	/* EINT3 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart3"),		/* TX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),	/* EINT4 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart3"),		/* RX */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),	/* EINT5 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart3"),		/* RTS */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),	/* EINT6 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "uart3"),		/* CTS */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),	/* EINT7 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "spdif"),		/* OUT */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),	/* EINT8 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),	/* EINT9 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mic"),		/* CLK */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)),	/* EINT10 */
++	SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
++		  SUNXI_FUNCTION(0x0, "gpio_in"),
++		  SUNXI_FUNCTION(0x1, "gpio_out"),
++		  SUNXI_FUNCTION(0x2, "mic"),		/* DATA */
++		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)),	/* EINT11 */
++};
++
++static const struct sunxi_pinctrl_desc a64_pinctrl_data = {
++	.pins = a64_pins,
++	.npins = ARRAY_SIZE(a64_pins),
++	.irq_banks = 3,
++};
++
++static int a64_pinctrl_probe(struct platform_device *pdev)
++{
++	return sunxi_pinctrl_init(pdev,
++				  &a64_pinctrl_data);
++}
++
++static const struct of_device_id a64_pinctrl_match[] = {
++	{ .compatible = "allwinner,sun50i-a64-pinctrl", },
++	{}
++};
++MODULE_DEVICE_TABLE(of, a64_pinctrl_match);
++
++static struct platform_driver a64_pinctrl_driver = {
++	.probe	= a64_pinctrl_probe,
++	.driver	= {
++		.name		= "sun50i-a64-pinctrl",
++		.of_match_table	= a64_pinctrl_match,
++	},
++};
++builtin_platform_driver(a64_pinctrl_driver);
+diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
+index 376322f..526eaf4 100644
+--- a/drivers/rtc/Kconfig
++++ b/drivers/rtc/Kconfig
+@@ -1360,10 +1360,11 @@ config RTC_DRV_SUN4V
+ 
+ config RTC_DRV_SUN6I
+ 	tristate "Allwinner A31 RTC"
+-	depends on MACH_SUN6I || MACH_SUN8I
++	default MACH_SUN6I || MACH_SUN8I
++	depends on ARCH_SUNXI
+ 	help
+-	  If you say Y here you will get support for the RTC found on
+-	  Allwinner A31.
++	  If you say Y here you will get support for the RTC found in
++	  some Allwinner SoCs like the A31 or the A64.
+ 
+ config RTC_DRV_SUNXI
+ 	tristate "Allwinner sun4i/sun7i RTC"
+-- 
+2.5.0
+
diff --git a/freed-ora/current/f24/KEYS-Add-a-system-blacklist-keyring.patch b/freed-ora/current/f24/KEYS-Add-a-system-blacklist-keyring.patch
index be35564a6..469ac35ab 100644
--- a/freed-ora/current/f24/KEYS-Add-a-system-blacklist-keyring.patch
+++ b/freed-ora/current/f24/KEYS-Add-a-system-blacklist-keyring.patch
@@ -71,7 +71,7 @@ diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h
 index b20cd885c1fd..51d8ddc60e0f 100644
 --- a/include/keys/system_keyring.h
 +++ b/include/keys/system_keyring.h
-@@ -35,4 +35,8 @@ extern int system_verify_data(const void *data, unsigned long len,
+@@ -35,6 +35,10 @@ extern int system_verify_data(const void *data, unsigned long len,
  			      enum key_being_used_for usage);
  #endif
  
@@ -79,7 +79,9 @@ index b20cd885c1fd..51d8ddc60e0f 100644
 +extern struct key *system_blacklist_keyring;
 +#endif
 +
- #endif /* _KEYS_SYSTEM_KEYRING_H */
+ #ifdef CONFIG_IMA_MOK_KEYRING
+ extern struct key *ima_mok_keyring;
+ extern struct key *ima_blacklist_keyring;
 diff --git a/init/Kconfig b/init/Kconfig
 index 02da9f1fd9df..782d26f02885 100644
 --- a/init/Kconfig
diff --git a/freed-ora/current/f24/Makefile b/freed-ora/current/f24/Makefile
index 9f97a1d06..694ac55af 100644
--- a/freed-ora/current/f24/Makefile
+++ b/freed-ora/current/f24/Makefile
@@ -19,7 +19,7 @@ noarch:
 	fedpkg -v local --arch=noarch
 
 # 'make local' also needs to build the noarch firmware package
-local: noarch
+local:
 	fedpkg -v local
 
 extremedebug:
@@ -88,6 +88,7 @@ debug:
 	@perl -pi -e 's/# CONFIG_TEST_LIST_SORT is not set/CONFIG_TEST_LIST_SORT=y/' config-nodebug
 	@perl -pi -e 's/# CONFIG_DEBUG_ATOMIC_SLEEP is not set/CONFIG_DEBUG_ATOMIC_SLEEP=y/' config-nodebug
 	@perl -pi -e 's/# CONFIG_DETECT_HUNG_TASK is not set/CONFIG_DETECT_HUNG_TASK=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_WQ_WATCHDOG is not set/CONFIG_WQ_WATCHDOG=y/' config-nodebug
 	@perl -pi -e 's/# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set/CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y/' config-nodebug
 	@perl -pi -e 's/# CONFIG_DEBUG_KMEMLEAK is not set/CONFIG_DEBUG_KMEMLEAK=y/' config-nodebug
 	@perl -pi -e 's/# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set/CONFIG_X86_DEBUG_STATIC_CPU_HAS=y/' config-nodebug
diff --git a/freed-ora/current/f24/Makefile.release b/freed-ora/current/f24/Makefile.release
index d7e8844b7..6fa0645b8 100644
--- a/freed-ora/current/f24/Makefile.release
+++ b/freed-ora/current/f24/Makefile.release
@@ -67,6 +67,7 @@ config-release:
 	@perl -pi -e 's/CONFIG_TEST_STRING_HELPERS=m/# CONFIG_TEST_STRING_HELPERS is not set/' config-nodebug
 	@perl -pi -e 's/CONFIG_DEBUG_ATOMIC_SLEEP=y/# CONFIG_DEBUG_ATOMIC_SLEEP is not set/' config-nodebug
 	@perl -pi -e 's/CONFIG_DETECT_HUNG_TASK=y/# CONFIG_DETECT_HUNG_TASK is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_WQ_WATCHDOG=y/# CONFIG_WQ_WATCHDOG is not set/' config-nodebug
 	@perl -pi -e 's/CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y/# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set/' config-nodebug
 	@perl -pi -e 's/CONFIG_DEBUG_KMEMLEAK=y/# CONFIG_DEBUG_KMEMLEAK is not set/' config-nodebug
 	@perl -pi -e 's/CONFIG_MAC80211_MESSAGE_TRACING=y/# CONFIG_MAC80211_MESSAGE_TRACING is not set/' config-nodebug
diff --git a/freed-ora/current/f24/alua_fix.patch b/freed-ora/current/f24/alua_fix.patch
deleted file mode 100644
index eb278fabb..000000000
--- a/freed-ora/current/f24/alua_fix.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 221255aee67ec1c752001080aafec0c4e9390d95 Mon Sep 17 00:00:00 2001
-From: Hannes Reinecke <hare@suse.de>
-Date: Tue, 1 Dec 2015 10:16:42 +0100
-Subject: scsi: ignore errors from scsi_dh_add_device()
-
-device handler initialisation might fail due to a number of
-reasons. But as device_handlers are optional this shouldn't
-cause us to disable the device entirely.
-So just ignore errors from scsi_dh_add_device().
-
-Reviewed-by: Johannes Thumshirn <jthumshirn@suse.com>
-Reviewed-by: Christoph Hellwig <hch@lst.de>
-Signed-off-by: Hannes Reinecke <hare@suse.de>
-Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
----
- drivers/scsi/scsi_sysfs.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
-index fc3cd26..d015374 100644
---- a/drivers/scsi/scsi_sysfs.c
-+++ b/drivers/scsi/scsi_sysfs.c
-@@ -1120,11 +1120,12 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
- 	}
- 
- 	error = scsi_dh_add_device(sdev);
--	if (error) {
-+	if (error)
-+		/*
-+		 * device_handler is optional, so any error can be ignored
-+		 */
- 		sdev_printk(KERN_INFO, sdev,
- 				"failed to add device handler: %d\n", error);
--		return error;
--	}
- 
- 	device_enable_async_suspend(&sdev->sdev_dev);
- 	error = device_add(&sdev->sdev_dev);
--- 
-cgit v0.11.2
-
diff --git a/freed-ora/current/f24/amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch b/freed-ora/current/f24/amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch
deleted file mode 100644
index dad98026a..000000000
--- a/freed-ora/current/f24/amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch
+++ /dev/null
@@ -1,10362 +0,0 @@
-From a57bb48be552eb00f420266769723ab7a287a2d9 Mon Sep 17 00:00:00 2001
-From: Tom Lendacky <thomas.lendacky@amd.com>
-Date: Tue, 17 Mar 2015 15:58:32 +0000
-Subject: amd-xgbe-a0: Add support for XGBE on A0
-
-Add XGBE driver support for A0 hardware.
-
-Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
----
-diff --git a/drivers/net/ethernet/amd/Makefile b/drivers/net/ethernet/amd/Makefile
-index a38a2dc..bf0cf2f 100644
---- a/drivers/net/ethernet/amd/Makefile
-+++ b/drivers/net/ethernet/amd/Makefile
-@@ -18,3 +18,4 @@ obj-$(CONFIG_PCNET32) += pcnet32.o
- obj-$(CONFIG_SUN3LANCE) += sun3lance.o
- obj-$(CONFIG_SUNLANCE) += sunlance.o
- obj-$(CONFIG_AMD_XGBE) += xgbe/
-+obj-$(CONFIG_AMD_XGBE) += xgbe-a0/
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/Makefile b/drivers/net/ethernet/amd/xgbe-a0/Makefile
-new file mode 100644
-index 0000000..561116f
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/Makefile
-@@ -0,0 +1,8 @@
-+obj-$(CONFIG_AMD_XGBE) += amd-xgbe-a0.o
-+
-+amd-xgbe-a0-objs := xgbe-main.o xgbe-drv.o xgbe-dev.o \
-+		 xgbe-desc.o xgbe-ethtool.o xgbe-mdio.o \
-+		 xgbe-ptp.o
-+
-+amd-xgbe-a0-$(CONFIG_AMD_XGBE_DCB) += xgbe-dcb.o
-+amd-xgbe-a0-$(CONFIG_DEBUG_FS) += xgbe-debugfs.o
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-common.h b/drivers/net/ethernet/amd/xgbe-a0/xgbe-common.h
-new file mode 100644
-index 0000000..75b08c6
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-common.h
-@@ -0,0 +1,1142 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#ifndef __XGBE_COMMON_H__
-+#define __XGBE_COMMON_H__
-+
-+/* DMA register offsets */
-+#define DMA_MR				0x3000
-+#define DMA_SBMR			0x3004
-+#define DMA_ISR				0x3008
-+#define DMA_AXIARCR			0x3010
-+#define DMA_AXIAWCR			0x3018
-+#define DMA_DSR0			0x3020
-+#define DMA_DSR1			0x3024
-+
-+/* DMA register entry bit positions and sizes */
-+#define DMA_AXIARCR_DRC_INDEX		0
-+#define DMA_AXIARCR_DRC_WIDTH		4
-+#define DMA_AXIARCR_DRD_INDEX		4
-+#define DMA_AXIARCR_DRD_WIDTH		2
-+#define DMA_AXIARCR_TEC_INDEX		8
-+#define DMA_AXIARCR_TEC_WIDTH		4
-+#define DMA_AXIARCR_TED_INDEX		12
-+#define DMA_AXIARCR_TED_WIDTH		2
-+#define DMA_AXIARCR_THC_INDEX		16
-+#define DMA_AXIARCR_THC_WIDTH		4
-+#define DMA_AXIARCR_THD_INDEX		20
-+#define DMA_AXIARCR_THD_WIDTH		2
-+#define DMA_AXIAWCR_DWC_INDEX		0
-+#define DMA_AXIAWCR_DWC_WIDTH		4
-+#define DMA_AXIAWCR_DWD_INDEX		4
-+#define DMA_AXIAWCR_DWD_WIDTH		2
-+#define DMA_AXIAWCR_RPC_INDEX		8
-+#define DMA_AXIAWCR_RPC_WIDTH		4
-+#define DMA_AXIAWCR_RPD_INDEX		12
-+#define DMA_AXIAWCR_RPD_WIDTH		2
-+#define DMA_AXIAWCR_RHC_INDEX		16
-+#define DMA_AXIAWCR_RHC_WIDTH		4
-+#define DMA_AXIAWCR_RHD_INDEX		20
-+#define DMA_AXIAWCR_RHD_WIDTH		2
-+#define DMA_AXIAWCR_TDC_INDEX		24
-+#define DMA_AXIAWCR_TDC_WIDTH		4
-+#define DMA_AXIAWCR_TDD_INDEX		28
-+#define DMA_AXIAWCR_TDD_WIDTH		2
-+#define DMA_ISR_MACIS_INDEX		17
-+#define DMA_ISR_MACIS_WIDTH		1
-+#define DMA_ISR_MTLIS_INDEX		16
-+#define DMA_ISR_MTLIS_WIDTH		1
-+#define DMA_MR_SWR_INDEX		0
-+#define DMA_MR_SWR_WIDTH		1
-+#define DMA_SBMR_EAME_INDEX		11
-+#define DMA_SBMR_EAME_WIDTH		1
-+#define DMA_SBMR_BLEN_256_INDEX		7
-+#define DMA_SBMR_BLEN_256_WIDTH		1
-+#define DMA_SBMR_UNDEF_INDEX		0
-+#define DMA_SBMR_UNDEF_WIDTH		1
-+
-+/* DMA register values */
-+#define DMA_DSR_RPS_WIDTH		4
-+#define DMA_DSR_TPS_WIDTH		4
-+#define DMA_DSR_Q_WIDTH			(DMA_DSR_RPS_WIDTH + DMA_DSR_TPS_WIDTH)
-+#define DMA_DSR0_RPS_START		8
-+#define DMA_DSR0_TPS_START		12
-+#define DMA_DSRX_FIRST_QUEUE		3
-+#define DMA_DSRX_INC			4
-+#define DMA_DSRX_QPR			4
-+#define DMA_DSRX_RPS_START		0
-+#define DMA_DSRX_TPS_START		4
-+#define DMA_TPS_STOPPED			0x00
-+#define DMA_TPS_SUSPENDED		0x06
-+
-+/* DMA channel register offsets
-+ *   Multiple channels can be active.  The first channel has registers
-+ *   that begin at 0x3100.  Each subsequent channel has registers that
-+ *   are accessed using an offset of 0x80 from the previous channel.
-+ */
-+#define DMA_CH_BASE			0x3100
-+#define DMA_CH_INC			0x80
-+
-+#define DMA_CH_CR			0x00
-+#define DMA_CH_TCR			0x04
-+#define DMA_CH_RCR			0x08
-+#define DMA_CH_TDLR_HI			0x10
-+#define DMA_CH_TDLR_LO			0x14
-+#define DMA_CH_RDLR_HI			0x18
-+#define DMA_CH_RDLR_LO			0x1c
-+#define DMA_CH_TDTR_LO			0x24
-+#define DMA_CH_RDTR_LO			0x2c
-+#define DMA_CH_TDRLR			0x30
-+#define DMA_CH_RDRLR			0x34
-+#define DMA_CH_IER			0x38
-+#define DMA_CH_RIWT			0x3c
-+#define DMA_CH_CATDR_LO			0x44
-+#define DMA_CH_CARDR_LO			0x4c
-+#define DMA_CH_CATBR_HI			0x50
-+#define DMA_CH_CATBR_LO			0x54
-+#define DMA_CH_CARBR_HI			0x58
-+#define DMA_CH_CARBR_LO			0x5c
-+#define DMA_CH_SR			0x60
-+
-+/* DMA channel register entry bit positions and sizes */
-+#define DMA_CH_CR_PBLX8_INDEX		16
-+#define DMA_CH_CR_PBLX8_WIDTH		1
-+#define DMA_CH_CR_SPH_INDEX		24
-+#define DMA_CH_CR_SPH_WIDTH		1
-+#define DMA_CH_IER_AIE_INDEX		15
-+#define DMA_CH_IER_AIE_WIDTH		1
-+#define DMA_CH_IER_FBEE_INDEX		12
-+#define DMA_CH_IER_FBEE_WIDTH		1
-+#define DMA_CH_IER_NIE_INDEX		16
-+#define DMA_CH_IER_NIE_WIDTH		1
-+#define DMA_CH_IER_RBUE_INDEX		7
-+#define DMA_CH_IER_RBUE_WIDTH		1
-+#define DMA_CH_IER_RIE_INDEX		6
-+#define DMA_CH_IER_RIE_WIDTH		1
-+#define DMA_CH_IER_RSE_INDEX		8
-+#define DMA_CH_IER_RSE_WIDTH		1
-+#define DMA_CH_IER_TBUE_INDEX		2
-+#define DMA_CH_IER_TBUE_WIDTH		1
-+#define DMA_CH_IER_TIE_INDEX		0
-+#define DMA_CH_IER_TIE_WIDTH		1
-+#define DMA_CH_IER_TXSE_INDEX		1
-+#define DMA_CH_IER_TXSE_WIDTH		1
-+#define DMA_CH_RCR_PBL_INDEX		16
-+#define DMA_CH_RCR_PBL_WIDTH		6
-+#define DMA_CH_RCR_RBSZ_INDEX		1
-+#define DMA_CH_RCR_RBSZ_WIDTH		14
-+#define DMA_CH_RCR_SR_INDEX		0
-+#define DMA_CH_RCR_SR_WIDTH		1
-+#define DMA_CH_RIWT_RWT_INDEX		0
-+#define DMA_CH_RIWT_RWT_WIDTH		8
-+#define DMA_CH_SR_FBE_INDEX		12
-+#define DMA_CH_SR_FBE_WIDTH		1
-+#define DMA_CH_SR_RBU_INDEX		7
-+#define DMA_CH_SR_RBU_WIDTH		1
-+#define DMA_CH_SR_RI_INDEX		6
-+#define DMA_CH_SR_RI_WIDTH		1
-+#define DMA_CH_SR_RPS_INDEX		8
-+#define DMA_CH_SR_RPS_WIDTH		1
-+#define DMA_CH_SR_TBU_INDEX		2
-+#define DMA_CH_SR_TBU_WIDTH		1
-+#define DMA_CH_SR_TI_INDEX		0
-+#define DMA_CH_SR_TI_WIDTH		1
-+#define DMA_CH_SR_TPS_INDEX		1
-+#define DMA_CH_SR_TPS_WIDTH		1
-+#define DMA_CH_TCR_OSP_INDEX		4
-+#define DMA_CH_TCR_OSP_WIDTH		1
-+#define DMA_CH_TCR_PBL_INDEX		16
-+#define DMA_CH_TCR_PBL_WIDTH		6
-+#define DMA_CH_TCR_ST_INDEX		0
-+#define DMA_CH_TCR_ST_WIDTH		1
-+#define DMA_CH_TCR_TSE_INDEX		12
-+#define DMA_CH_TCR_TSE_WIDTH		1
-+
-+/* DMA channel register values */
-+#define DMA_OSP_DISABLE			0x00
-+#define DMA_OSP_ENABLE			0x01
-+#define DMA_PBL_1			1
-+#define DMA_PBL_2			2
-+#define DMA_PBL_4			4
-+#define DMA_PBL_8			8
-+#define DMA_PBL_16			16
-+#define DMA_PBL_32			32
-+#define DMA_PBL_64			64      /* 8 x 8 */
-+#define DMA_PBL_128			128     /* 8 x 16 */
-+#define DMA_PBL_256			256     /* 8 x 32 */
-+#define DMA_PBL_X8_DISABLE		0x00
-+#define DMA_PBL_X8_ENABLE		0x01
-+
-+/* MAC register offsets */
-+#define MAC_TCR				0x0000
-+#define MAC_RCR				0x0004
-+#define MAC_PFR				0x0008
-+#define MAC_WTR				0x000c
-+#define MAC_HTR0			0x0010
-+#define MAC_VLANTR			0x0050
-+#define MAC_VLANHTR			0x0058
-+#define MAC_VLANIR			0x0060
-+#define MAC_IVLANIR			0x0064
-+#define MAC_RETMR			0x006c
-+#define MAC_Q0TFCR			0x0070
-+#define MAC_RFCR			0x0090
-+#define MAC_RQC0R			0x00a0
-+#define MAC_RQC1R			0x00a4
-+#define MAC_RQC2R			0x00a8
-+#define MAC_RQC3R			0x00ac
-+#define MAC_ISR				0x00b0
-+#define MAC_IER				0x00b4
-+#define MAC_RTSR			0x00b8
-+#define MAC_PMTCSR			0x00c0
-+#define MAC_RWKPFR			0x00c4
-+#define MAC_LPICSR			0x00d0
-+#define MAC_LPITCR			0x00d4
-+#define MAC_VR				0x0110
-+#define MAC_DR				0x0114
-+#define MAC_HWF0R			0x011c
-+#define MAC_HWF1R			0x0120
-+#define MAC_HWF2R			0x0124
-+#define MAC_GPIOCR			0x0278
-+#define MAC_GPIOSR			0x027c
-+#define MAC_MACA0HR			0x0300
-+#define MAC_MACA0LR			0x0304
-+#define MAC_MACA1HR			0x0308
-+#define MAC_MACA1LR			0x030c
-+#define MAC_RSSCR			0x0c80
-+#define MAC_RSSAR			0x0c88
-+#define MAC_RSSDR			0x0c8c
-+#define MAC_TSCR			0x0d00
-+#define MAC_SSIR			0x0d04
-+#define MAC_STSR			0x0d08
-+#define MAC_STNR			0x0d0c
-+#define MAC_STSUR			0x0d10
-+#define MAC_STNUR			0x0d14
-+#define MAC_TSAR			0x0d18
-+#define MAC_TSSR			0x0d20
-+#define MAC_TXSNR			0x0d30
-+#define MAC_TXSSR			0x0d34
-+
-+#define MAC_QTFCR_INC			4
-+#define MAC_MACA_INC			4
-+#define MAC_HTR_INC			4
-+
-+#define MAC_RQC2_INC			4
-+#define MAC_RQC2_Q_PER_REG		4
-+
-+/* MAC register entry bit positions and sizes */
-+#define MAC_HWF0R_ADDMACADRSEL_INDEX	18
-+#define MAC_HWF0R_ADDMACADRSEL_WIDTH	5
-+#define MAC_HWF0R_ARPOFFSEL_INDEX	9
-+#define MAC_HWF0R_ARPOFFSEL_WIDTH	1
-+#define MAC_HWF0R_EEESEL_INDEX		13
-+#define MAC_HWF0R_EEESEL_WIDTH		1
-+#define MAC_HWF0R_GMIISEL_INDEX		1
-+#define MAC_HWF0R_GMIISEL_WIDTH		1
-+#define MAC_HWF0R_MGKSEL_INDEX		7
-+#define MAC_HWF0R_MGKSEL_WIDTH		1
-+#define MAC_HWF0R_MMCSEL_INDEX		8
-+#define MAC_HWF0R_MMCSEL_WIDTH		1
-+#define MAC_HWF0R_RWKSEL_INDEX		6
-+#define MAC_HWF0R_RWKSEL_WIDTH		1
-+#define MAC_HWF0R_RXCOESEL_INDEX	16
-+#define MAC_HWF0R_RXCOESEL_WIDTH	1
-+#define MAC_HWF0R_SAVLANINS_INDEX	27
-+#define MAC_HWF0R_SAVLANINS_WIDTH	1
-+#define MAC_HWF0R_SMASEL_INDEX		5
-+#define MAC_HWF0R_SMASEL_WIDTH		1
-+#define MAC_HWF0R_TSSEL_INDEX		12
-+#define MAC_HWF0R_TSSEL_WIDTH		1
-+#define MAC_HWF0R_TSSTSSEL_INDEX	25
-+#define MAC_HWF0R_TSSTSSEL_WIDTH	2
-+#define MAC_HWF0R_TXCOESEL_INDEX	14
-+#define MAC_HWF0R_TXCOESEL_WIDTH	1
-+#define MAC_HWF0R_VLHASH_INDEX		4
-+#define MAC_HWF0R_VLHASH_WIDTH		1
-+#define MAC_HWF1R_ADVTHWORD_INDEX	13
-+#define MAC_HWF1R_ADVTHWORD_WIDTH	1
-+#define MAC_HWF1R_DBGMEMA_INDEX		19
-+#define MAC_HWF1R_DBGMEMA_WIDTH		1
-+#define MAC_HWF1R_DCBEN_INDEX		16
-+#define MAC_HWF1R_DCBEN_WIDTH		1
-+#define MAC_HWF1R_HASHTBLSZ_INDEX	24
-+#define MAC_HWF1R_HASHTBLSZ_WIDTH	3
-+#define MAC_HWF1R_L3L4FNUM_INDEX	27
-+#define MAC_HWF1R_L3L4FNUM_WIDTH	4
-+#define MAC_HWF1R_NUMTC_INDEX		21
-+#define MAC_HWF1R_NUMTC_WIDTH		3
-+#define MAC_HWF1R_RSSEN_INDEX		20
-+#define MAC_HWF1R_RSSEN_WIDTH		1
-+#define MAC_HWF1R_RXFIFOSIZE_INDEX	0
-+#define MAC_HWF1R_RXFIFOSIZE_WIDTH	5
-+#define MAC_HWF1R_SPHEN_INDEX		17
-+#define MAC_HWF1R_SPHEN_WIDTH		1
-+#define MAC_HWF1R_TSOEN_INDEX		18
-+#define MAC_HWF1R_TSOEN_WIDTH		1
-+#define MAC_HWF1R_TXFIFOSIZE_INDEX	6
-+#define MAC_HWF1R_TXFIFOSIZE_WIDTH	5
-+#define MAC_HWF2R_AUXSNAPNUM_INDEX	28
-+#define MAC_HWF2R_AUXSNAPNUM_WIDTH	3
-+#define MAC_HWF2R_PPSOUTNUM_INDEX	24
-+#define MAC_HWF2R_PPSOUTNUM_WIDTH	3
-+#define MAC_HWF2R_RXCHCNT_INDEX		12
-+#define MAC_HWF2R_RXCHCNT_WIDTH		4
-+#define MAC_HWF2R_RXQCNT_INDEX		0
-+#define MAC_HWF2R_RXQCNT_WIDTH		4
-+#define MAC_HWF2R_TXCHCNT_INDEX		18
-+#define MAC_HWF2R_TXCHCNT_WIDTH		4
-+#define MAC_HWF2R_TXQCNT_INDEX		6
-+#define MAC_HWF2R_TXQCNT_WIDTH		4
-+#define MAC_IER_TSIE_INDEX		12
-+#define MAC_IER_TSIE_WIDTH		1
-+#define MAC_ISR_MMCRXIS_INDEX		9
-+#define MAC_ISR_MMCRXIS_WIDTH		1
-+#define MAC_ISR_MMCTXIS_INDEX		10
-+#define MAC_ISR_MMCTXIS_WIDTH		1
-+#define MAC_ISR_PMTIS_INDEX		4
-+#define MAC_ISR_PMTIS_WIDTH		1
-+#define MAC_ISR_TSIS_INDEX		12
-+#define MAC_ISR_TSIS_WIDTH		1
-+#define MAC_MACA1HR_AE_INDEX		31
-+#define MAC_MACA1HR_AE_WIDTH		1
-+#define MAC_PFR_HMC_INDEX		2
-+#define MAC_PFR_HMC_WIDTH		1
-+#define MAC_PFR_HPF_INDEX		10
-+#define MAC_PFR_HPF_WIDTH		1
-+#define MAC_PFR_HUC_INDEX		1
-+#define MAC_PFR_HUC_WIDTH		1
-+#define MAC_PFR_PM_INDEX		4
-+#define MAC_PFR_PM_WIDTH		1
-+#define MAC_PFR_PR_INDEX		0
-+#define MAC_PFR_PR_WIDTH		1
-+#define MAC_PFR_VTFE_INDEX		16
-+#define MAC_PFR_VTFE_WIDTH		1
-+#define MAC_PMTCSR_MGKPKTEN_INDEX	1
-+#define MAC_PMTCSR_MGKPKTEN_WIDTH	1
-+#define MAC_PMTCSR_PWRDWN_INDEX		0
-+#define MAC_PMTCSR_PWRDWN_WIDTH		1
-+#define MAC_PMTCSR_RWKFILTRST_INDEX	31
-+#define MAC_PMTCSR_RWKFILTRST_WIDTH	1
-+#define MAC_PMTCSR_RWKPKTEN_INDEX	2
-+#define MAC_PMTCSR_RWKPKTEN_WIDTH	1
-+#define MAC_Q0TFCR_PT_INDEX		16
-+#define MAC_Q0TFCR_PT_WIDTH		16
-+#define MAC_Q0TFCR_TFE_INDEX		1
-+#define MAC_Q0TFCR_TFE_WIDTH		1
-+#define MAC_RCR_ACS_INDEX		1
-+#define MAC_RCR_ACS_WIDTH		1
-+#define MAC_RCR_CST_INDEX		2
-+#define MAC_RCR_CST_WIDTH		1
-+#define MAC_RCR_DCRCC_INDEX		3
-+#define MAC_RCR_DCRCC_WIDTH		1
-+#define MAC_RCR_HDSMS_INDEX		12
-+#define MAC_RCR_HDSMS_WIDTH		3
-+#define MAC_RCR_IPC_INDEX		9
-+#define MAC_RCR_IPC_WIDTH		1
-+#define MAC_RCR_JE_INDEX		8
-+#define MAC_RCR_JE_WIDTH		1
-+#define MAC_RCR_LM_INDEX		10
-+#define MAC_RCR_LM_WIDTH		1
-+#define MAC_RCR_RE_INDEX		0
-+#define MAC_RCR_RE_WIDTH		1
-+#define MAC_RFCR_PFCE_INDEX		8
-+#define MAC_RFCR_PFCE_WIDTH		1
-+#define MAC_RFCR_RFE_INDEX		0
-+#define MAC_RFCR_RFE_WIDTH		1
-+#define MAC_RFCR_UP_INDEX		1
-+#define MAC_RFCR_UP_WIDTH		1
-+#define MAC_RQC0R_RXQ0EN_INDEX		0
-+#define MAC_RQC0R_RXQ0EN_WIDTH		2
-+#define MAC_RSSAR_ADDRT_INDEX		2
-+#define MAC_RSSAR_ADDRT_WIDTH		1
-+#define MAC_RSSAR_CT_INDEX		1
-+#define MAC_RSSAR_CT_WIDTH		1
-+#define MAC_RSSAR_OB_INDEX		0
-+#define MAC_RSSAR_OB_WIDTH		1
-+#define MAC_RSSAR_RSSIA_INDEX		8
-+#define MAC_RSSAR_RSSIA_WIDTH		8
-+#define MAC_RSSCR_IP2TE_INDEX		1
-+#define MAC_RSSCR_IP2TE_WIDTH		1
-+#define MAC_RSSCR_RSSE_INDEX		0
-+#define MAC_RSSCR_RSSE_WIDTH		1
-+#define MAC_RSSCR_TCP4TE_INDEX		2
-+#define MAC_RSSCR_TCP4TE_WIDTH		1
-+#define MAC_RSSCR_UDP4TE_INDEX		3
-+#define MAC_RSSCR_UDP4TE_WIDTH		1
-+#define MAC_RSSDR_DMCH_INDEX		0
-+#define MAC_RSSDR_DMCH_WIDTH		4
-+#define MAC_SSIR_SNSINC_INDEX		8
-+#define MAC_SSIR_SNSINC_WIDTH		8
-+#define MAC_SSIR_SSINC_INDEX		16
-+#define MAC_SSIR_SSINC_WIDTH		8
-+#define MAC_TCR_SS_INDEX		29
-+#define MAC_TCR_SS_WIDTH		2
-+#define MAC_TCR_TE_INDEX		0
-+#define MAC_TCR_TE_WIDTH		1
-+#define MAC_TSCR_AV8021ASMEN_INDEX	28
-+#define MAC_TSCR_AV8021ASMEN_WIDTH	1
-+#define MAC_TSCR_SNAPTYPSEL_INDEX	16
-+#define MAC_TSCR_SNAPTYPSEL_WIDTH	2
-+#define MAC_TSCR_TSADDREG_INDEX		5
-+#define MAC_TSCR_TSADDREG_WIDTH		1
-+#define MAC_TSCR_TSCFUPDT_INDEX		1
-+#define MAC_TSCR_TSCFUPDT_WIDTH		1
-+#define MAC_TSCR_TSCTRLSSR_INDEX	9
-+#define MAC_TSCR_TSCTRLSSR_WIDTH	1
-+#define MAC_TSCR_TSENA_INDEX		0
-+#define MAC_TSCR_TSENA_WIDTH		1
-+#define MAC_TSCR_TSENALL_INDEX		8
-+#define MAC_TSCR_TSENALL_WIDTH		1
-+#define MAC_TSCR_TSEVNTENA_INDEX	14
-+#define MAC_TSCR_TSEVNTENA_WIDTH	1
-+#define MAC_TSCR_TSINIT_INDEX		2
-+#define MAC_TSCR_TSINIT_WIDTH		1
-+#define MAC_TSCR_TSIPENA_INDEX		11
-+#define MAC_TSCR_TSIPENA_WIDTH		1
-+#define MAC_TSCR_TSIPV4ENA_INDEX	13
-+#define MAC_TSCR_TSIPV4ENA_WIDTH	1
-+#define MAC_TSCR_TSIPV6ENA_INDEX	12
-+#define MAC_TSCR_TSIPV6ENA_WIDTH	1
-+#define MAC_TSCR_TSMSTRENA_INDEX	15
-+#define MAC_TSCR_TSMSTRENA_WIDTH	1
-+#define MAC_TSCR_TSVER2ENA_INDEX	10
-+#define MAC_TSCR_TSVER2ENA_WIDTH	1
-+#define MAC_TSCR_TXTSSTSM_INDEX		24
-+#define MAC_TSCR_TXTSSTSM_WIDTH		1
-+#define MAC_TSSR_TXTSC_INDEX		15
-+#define MAC_TSSR_TXTSC_WIDTH		1
-+#define MAC_TXSNR_TXTSSTSMIS_INDEX	31
-+#define MAC_TXSNR_TXTSSTSMIS_WIDTH	1
-+#define MAC_VLANHTR_VLHT_INDEX		0
-+#define MAC_VLANHTR_VLHT_WIDTH		16
-+#define MAC_VLANIR_VLTI_INDEX		20
-+#define MAC_VLANIR_VLTI_WIDTH		1
-+#define MAC_VLANIR_CSVL_INDEX		19
-+#define MAC_VLANIR_CSVL_WIDTH		1
-+#define MAC_VLANTR_DOVLTC_INDEX		20
-+#define MAC_VLANTR_DOVLTC_WIDTH		1
-+#define MAC_VLANTR_ERSVLM_INDEX		19
-+#define MAC_VLANTR_ERSVLM_WIDTH		1
-+#define MAC_VLANTR_ESVL_INDEX		18
-+#define MAC_VLANTR_ESVL_WIDTH		1
-+#define MAC_VLANTR_ETV_INDEX		16
-+#define MAC_VLANTR_ETV_WIDTH		1
-+#define MAC_VLANTR_EVLS_INDEX		21
-+#define MAC_VLANTR_EVLS_WIDTH		2
-+#define MAC_VLANTR_EVLRXS_INDEX		24
-+#define MAC_VLANTR_EVLRXS_WIDTH		1
-+#define MAC_VLANTR_VL_INDEX		0
-+#define MAC_VLANTR_VL_WIDTH		16
-+#define MAC_VLANTR_VTHM_INDEX		25
-+#define MAC_VLANTR_VTHM_WIDTH		1
-+#define MAC_VLANTR_VTIM_INDEX		17
-+#define MAC_VLANTR_VTIM_WIDTH		1
-+#define MAC_VR_DEVID_INDEX		8
-+#define MAC_VR_DEVID_WIDTH		8
-+#define MAC_VR_SNPSVER_INDEX		0
-+#define MAC_VR_SNPSVER_WIDTH		8
-+#define MAC_VR_USERVER_INDEX		16
-+#define MAC_VR_USERVER_WIDTH		8
-+
-+/* MMC register offsets */
-+#define MMC_CR				0x0800
-+#define MMC_RISR			0x0804
-+#define MMC_TISR			0x0808
-+#define MMC_RIER			0x080c
-+#define MMC_TIER			0x0810
-+#define MMC_TXOCTETCOUNT_GB_LO		0x0814
-+#define MMC_TXOCTETCOUNT_GB_HI		0x0818
-+#define MMC_TXFRAMECOUNT_GB_LO		0x081c
-+#define MMC_TXFRAMECOUNT_GB_HI		0x0820
-+#define MMC_TXBROADCASTFRAMES_G_LO	0x0824
-+#define MMC_TXBROADCASTFRAMES_G_HI	0x0828
-+#define MMC_TXMULTICASTFRAMES_G_LO	0x082c
-+#define MMC_TXMULTICASTFRAMES_G_HI	0x0830
-+#define MMC_TX64OCTETS_GB_LO		0x0834
-+#define MMC_TX64OCTETS_GB_HI		0x0838
-+#define MMC_TX65TO127OCTETS_GB_LO	0x083c
-+#define MMC_TX65TO127OCTETS_GB_HI	0x0840
-+#define MMC_TX128TO255OCTETS_GB_LO	0x0844
-+#define MMC_TX128TO255OCTETS_GB_HI	0x0848
-+#define MMC_TX256TO511OCTETS_GB_LO	0x084c
-+#define MMC_TX256TO511OCTETS_GB_HI	0x0850
-+#define MMC_TX512TO1023OCTETS_GB_LO	0x0854
-+#define MMC_TX512TO1023OCTETS_GB_HI	0x0858
-+#define MMC_TX1024TOMAXOCTETS_GB_LO	0x085c
-+#define MMC_TX1024TOMAXOCTETS_GB_HI	0x0860
-+#define MMC_TXUNICASTFRAMES_GB_LO	0x0864
-+#define MMC_TXUNICASTFRAMES_GB_HI	0x0868
-+#define MMC_TXMULTICASTFRAMES_GB_LO	0x086c
-+#define MMC_TXMULTICASTFRAMES_GB_HI	0x0870
-+#define MMC_TXBROADCASTFRAMES_GB_LO	0x0874
-+#define MMC_TXBROADCASTFRAMES_GB_HI	0x0878
-+#define MMC_TXUNDERFLOWERROR_LO		0x087c
-+#define MMC_TXUNDERFLOWERROR_HI		0x0880
-+#define MMC_TXOCTETCOUNT_G_LO		0x0884
-+#define MMC_TXOCTETCOUNT_G_HI		0x0888
-+#define MMC_TXFRAMECOUNT_G_LO		0x088c
-+#define MMC_TXFRAMECOUNT_G_HI		0x0890
-+#define MMC_TXPAUSEFRAMES_LO		0x0894
-+#define MMC_TXPAUSEFRAMES_HI		0x0898
-+#define MMC_TXVLANFRAMES_G_LO		0x089c
-+#define MMC_TXVLANFRAMES_G_HI		0x08a0
-+#define MMC_RXFRAMECOUNT_GB_LO		0x0900
-+#define MMC_RXFRAMECOUNT_GB_HI		0x0904
-+#define MMC_RXOCTETCOUNT_GB_LO		0x0908
-+#define MMC_RXOCTETCOUNT_GB_HI		0x090c
-+#define MMC_RXOCTETCOUNT_G_LO		0x0910
-+#define MMC_RXOCTETCOUNT_G_HI		0x0914
-+#define MMC_RXBROADCASTFRAMES_G_LO	0x0918
-+#define MMC_RXBROADCASTFRAMES_G_HI	0x091c
-+#define MMC_RXMULTICASTFRAMES_G_LO	0x0920
-+#define MMC_RXMULTICASTFRAMES_G_HI	0x0924
-+#define MMC_RXCRCERROR_LO		0x0928
-+#define MMC_RXCRCERROR_HI		0x092c
-+#define MMC_RXRUNTERROR			0x0930
-+#define MMC_RXJABBERERROR		0x0934
-+#define MMC_RXUNDERSIZE_G		0x0938
-+#define MMC_RXOVERSIZE_G		0x093c
-+#define MMC_RX64OCTETS_GB_LO		0x0940
-+#define MMC_RX64OCTETS_GB_HI		0x0944
-+#define MMC_RX65TO127OCTETS_GB_LO	0x0948
-+#define MMC_RX65TO127OCTETS_GB_HI	0x094c
-+#define MMC_RX128TO255OCTETS_GB_LO	0x0950
-+#define MMC_RX128TO255OCTETS_GB_HI	0x0954
-+#define MMC_RX256TO511OCTETS_GB_LO	0x0958
-+#define MMC_RX256TO511OCTETS_GB_HI	0x095c
-+#define MMC_RX512TO1023OCTETS_GB_LO	0x0960
-+#define MMC_RX512TO1023OCTETS_GB_HI	0x0964
-+#define MMC_RX1024TOMAXOCTETS_GB_LO	0x0968
-+#define MMC_RX1024TOMAXOCTETS_GB_HI	0x096c
-+#define MMC_RXUNICASTFRAMES_G_LO	0x0970
-+#define MMC_RXUNICASTFRAMES_G_HI	0x0974
-+#define MMC_RXLENGTHERROR_LO		0x0978
-+#define MMC_RXLENGTHERROR_HI		0x097c
-+#define MMC_RXOUTOFRANGETYPE_LO		0x0980
-+#define MMC_RXOUTOFRANGETYPE_HI		0x0984
-+#define MMC_RXPAUSEFRAMES_LO		0x0988
-+#define MMC_RXPAUSEFRAMES_HI		0x098c
-+#define MMC_RXFIFOOVERFLOW_LO		0x0990
-+#define MMC_RXFIFOOVERFLOW_HI		0x0994
-+#define MMC_RXVLANFRAMES_GB_LO		0x0998
-+#define MMC_RXVLANFRAMES_GB_HI		0x099c
-+#define MMC_RXWATCHDOGERROR		0x09a0
-+
-+/* MMC register entry bit positions and sizes */
-+#define MMC_CR_CR_INDEX				0
-+#define MMC_CR_CR_WIDTH				1
-+#define MMC_CR_CSR_INDEX			1
-+#define MMC_CR_CSR_WIDTH			1
-+#define MMC_CR_ROR_INDEX			2
-+#define MMC_CR_ROR_WIDTH			1
-+#define MMC_CR_MCF_INDEX			3
-+#define MMC_CR_MCF_WIDTH			1
-+#define MMC_CR_MCT_INDEX			4
-+#define MMC_CR_MCT_WIDTH			2
-+#define MMC_RIER_ALL_INTERRUPTS_INDEX		0
-+#define MMC_RIER_ALL_INTERRUPTS_WIDTH		23
-+#define MMC_RISR_RXFRAMECOUNT_GB_INDEX		0
-+#define MMC_RISR_RXFRAMECOUNT_GB_WIDTH		1
-+#define MMC_RISR_RXOCTETCOUNT_GB_INDEX		1
-+#define MMC_RISR_RXOCTETCOUNT_GB_WIDTH		1
-+#define MMC_RISR_RXOCTETCOUNT_G_INDEX		2
-+#define MMC_RISR_RXOCTETCOUNT_G_WIDTH		1
-+#define MMC_RISR_RXBROADCASTFRAMES_G_INDEX	3
-+#define MMC_RISR_RXBROADCASTFRAMES_G_WIDTH	1
-+#define MMC_RISR_RXMULTICASTFRAMES_G_INDEX	4
-+#define MMC_RISR_RXMULTICASTFRAMES_G_WIDTH	1
-+#define MMC_RISR_RXCRCERROR_INDEX		5
-+#define MMC_RISR_RXCRCERROR_WIDTH		1
-+#define MMC_RISR_RXRUNTERROR_INDEX		6
-+#define MMC_RISR_RXRUNTERROR_WIDTH		1
-+#define MMC_RISR_RXJABBERERROR_INDEX		7
-+#define MMC_RISR_RXJABBERERROR_WIDTH		1
-+#define MMC_RISR_RXUNDERSIZE_G_INDEX		8
-+#define MMC_RISR_RXUNDERSIZE_G_WIDTH		1
-+#define MMC_RISR_RXOVERSIZE_G_INDEX		9
-+#define MMC_RISR_RXOVERSIZE_G_WIDTH		1
-+#define MMC_RISR_RX64OCTETS_GB_INDEX		10
-+#define MMC_RISR_RX64OCTETS_GB_WIDTH		1
-+#define MMC_RISR_RX65TO127OCTETS_GB_INDEX	11
-+#define MMC_RISR_RX65TO127OCTETS_GB_WIDTH	1
-+#define MMC_RISR_RX128TO255OCTETS_GB_INDEX	12
-+#define MMC_RISR_RX128TO255OCTETS_GB_WIDTH	1
-+#define MMC_RISR_RX256TO511OCTETS_GB_INDEX	13
-+#define MMC_RISR_RX256TO511OCTETS_GB_WIDTH	1
-+#define MMC_RISR_RX512TO1023OCTETS_GB_INDEX	14
-+#define MMC_RISR_RX512TO1023OCTETS_GB_WIDTH	1
-+#define MMC_RISR_RX1024TOMAXOCTETS_GB_INDEX	15
-+#define MMC_RISR_RX1024TOMAXOCTETS_GB_WIDTH	1
-+#define MMC_RISR_RXUNICASTFRAMES_G_INDEX	16
-+#define MMC_RISR_RXUNICASTFRAMES_G_WIDTH	1
-+#define MMC_RISR_RXLENGTHERROR_INDEX		17
-+#define MMC_RISR_RXLENGTHERROR_WIDTH		1
-+#define MMC_RISR_RXOUTOFRANGETYPE_INDEX		18
-+#define MMC_RISR_RXOUTOFRANGETYPE_WIDTH		1
-+#define MMC_RISR_RXPAUSEFRAMES_INDEX		19
-+#define MMC_RISR_RXPAUSEFRAMES_WIDTH		1
-+#define MMC_RISR_RXFIFOOVERFLOW_INDEX		20
-+#define MMC_RISR_RXFIFOOVERFLOW_WIDTH		1
-+#define MMC_RISR_RXVLANFRAMES_GB_INDEX		21
-+#define MMC_RISR_RXVLANFRAMES_GB_WIDTH		1
-+#define MMC_RISR_RXWATCHDOGERROR_INDEX		22
-+#define MMC_RISR_RXWATCHDOGERROR_WIDTH		1
-+#define MMC_TIER_ALL_INTERRUPTS_INDEX		0
-+#define MMC_TIER_ALL_INTERRUPTS_WIDTH		18
-+#define MMC_TISR_TXOCTETCOUNT_GB_INDEX		0
-+#define MMC_TISR_TXOCTETCOUNT_GB_WIDTH		1
-+#define MMC_TISR_TXFRAMECOUNT_GB_INDEX		1
-+#define MMC_TISR_TXFRAMECOUNT_GB_WIDTH		1
-+#define MMC_TISR_TXBROADCASTFRAMES_G_INDEX	2
-+#define MMC_TISR_TXBROADCASTFRAMES_G_WIDTH	1
-+#define MMC_TISR_TXMULTICASTFRAMES_G_INDEX	3
-+#define MMC_TISR_TXMULTICASTFRAMES_G_WIDTH	1
-+#define MMC_TISR_TX64OCTETS_GB_INDEX		4
-+#define MMC_TISR_TX64OCTETS_GB_WIDTH		1
-+#define MMC_TISR_TX65TO127OCTETS_GB_INDEX	5
-+#define MMC_TISR_TX65TO127OCTETS_GB_WIDTH	1
-+#define MMC_TISR_TX128TO255OCTETS_GB_INDEX	6
-+#define MMC_TISR_TX128TO255OCTETS_GB_WIDTH	1
-+#define MMC_TISR_TX256TO511OCTETS_GB_INDEX	7
-+#define MMC_TISR_TX256TO511OCTETS_GB_WIDTH	1
-+#define MMC_TISR_TX512TO1023OCTETS_GB_INDEX	8
-+#define MMC_TISR_TX512TO1023OCTETS_GB_WIDTH	1
-+#define MMC_TISR_TX1024TOMAXOCTETS_GB_INDEX	9
-+#define MMC_TISR_TX1024TOMAXOCTETS_GB_WIDTH	1
-+#define MMC_TISR_TXUNICASTFRAMES_GB_INDEX	10
-+#define MMC_TISR_TXUNICASTFRAMES_GB_WIDTH	1
-+#define MMC_TISR_TXMULTICASTFRAMES_GB_INDEX	11
-+#define MMC_TISR_TXMULTICASTFRAMES_GB_WIDTH	1
-+#define MMC_TISR_TXBROADCASTFRAMES_GB_INDEX	12
-+#define MMC_TISR_TXBROADCASTFRAMES_GB_WIDTH	1
-+#define MMC_TISR_TXUNDERFLOWERROR_INDEX		13
-+#define MMC_TISR_TXUNDERFLOWERROR_WIDTH		1
-+#define MMC_TISR_TXOCTETCOUNT_G_INDEX		14
-+#define MMC_TISR_TXOCTETCOUNT_G_WIDTH		1
-+#define MMC_TISR_TXFRAMECOUNT_G_INDEX		15
-+#define MMC_TISR_TXFRAMECOUNT_G_WIDTH		1
-+#define MMC_TISR_TXPAUSEFRAMES_INDEX		16
-+#define MMC_TISR_TXPAUSEFRAMES_WIDTH		1
-+#define MMC_TISR_TXVLANFRAMES_G_INDEX		17
-+#define MMC_TISR_TXVLANFRAMES_G_WIDTH		1
-+
-+/* MTL register offsets */
-+#define MTL_OMR				0x1000
-+#define MTL_FDCR			0x1008
-+#define MTL_FDSR			0x100c
-+#define MTL_FDDR			0x1010
-+#define MTL_ISR				0x1020
-+#define MTL_RQDCM0R			0x1030
-+#define MTL_TCPM0R			0x1040
-+#define MTL_TCPM1R			0x1044
-+
-+#define MTL_RQDCM_INC			4
-+#define MTL_RQDCM_Q_PER_REG		4
-+#define MTL_TCPM_INC			4
-+#define MTL_TCPM_TC_PER_REG		4
-+
-+/* MTL register entry bit positions and sizes */
-+#define MTL_OMR_ETSALG_INDEX		5
-+#define MTL_OMR_ETSALG_WIDTH		2
-+#define MTL_OMR_RAA_INDEX		2
-+#define MTL_OMR_RAA_WIDTH		1
-+
-+/* MTL queue register offsets
-+ *   Multiple queues can be active.  The first queue has registers
-+ *   that begin at 0x1100.  Each subsequent queue has registers that
-+ *   are accessed using an offset of 0x80 from the previous queue.
-+ */
-+#define MTL_Q_BASE			0x1100
-+#define MTL_Q_INC			0x80
-+
-+#define MTL_Q_TQOMR			0x00
-+#define MTL_Q_TQUR			0x04
-+#define MTL_Q_TQDR			0x08
-+#define MTL_Q_RQOMR			0x40
-+#define MTL_Q_RQMPOCR			0x44
-+#define MTL_Q_RQDR			0x4c
-+#define MTL_Q_IER			0x70
-+#define MTL_Q_ISR			0x74
-+
-+/* MTL queue register entry bit positions and sizes */
-+#define MTL_Q_RQOMR_EHFC_INDEX		7
-+#define MTL_Q_RQOMR_EHFC_WIDTH		1
-+#define MTL_Q_RQOMR_RFA_INDEX		8
-+#define MTL_Q_RQOMR_RFA_WIDTH		3
-+#define MTL_Q_RQOMR_RFD_INDEX		13
-+#define MTL_Q_RQOMR_RFD_WIDTH		3
-+#define MTL_Q_RQOMR_RQS_INDEX		16
-+#define MTL_Q_RQOMR_RQS_WIDTH		9
-+#define MTL_Q_RQOMR_RSF_INDEX		5
-+#define MTL_Q_RQOMR_RSF_WIDTH		1
-+#define MTL_Q_RQOMR_RTC_INDEX		0
-+#define MTL_Q_RQOMR_RTC_WIDTH		2
-+#define MTL_Q_TQOMR_FTQ_INDEX		0
-+#define MTL_Q_TQOMR_FTQ_WIDTH		1
-+#define MTL_Q_TQOMR_Q2TCMAP_INDEX	8
-+#define MTL_Q_TQOMR_Q2TCMAP_WIDTH	3
-+#define MTL_Q_TQOMR_TQS_INDEX		16
-+#define MTL_Q_TQOMR_TQS_WIDTH		10
-+#define MTL_Q_TQOMR_TSF_INDEX		1
-+#define MTL_Q_TQOMR_TSF_WIDTH		1
-+#define MTL_Q_TQOMR_TTC_INDEX		4
-+#define MTL_Q_TQOMR_TTC_WIDTH		3
-+#define MTL_Q_TQOMR_TXQEN_INDEX		2
-+#define MTL_Q_TQOMR_TXQEN_WIDTH		2
-+
-+/* MTL queue register value */
-+#define MTL_RSF_DISABLE			0x00
-+#define MTL_RSF_ENABLE			0x01
-+#define MTL_TSF_DISABLE			0x00
-+#define MTL_TSF_ENABLE			0x01
-+
-+#define MTL_RX_THRESHOLD_64		0x00
-+#define MTL_RX_THRESHOLD_96		0x02
-+#define MTL_RX_THRESHOLD_128		0x03
-+#define MTL_TX_THRESHOLD_32		0x01
-+#define MTL_TX_THRESHOLD_64		0x00
-+#define MTL_TX_THRESHOLD_96		0x02
-+#define MTL_TX_THRESHOLD_128		0x03
-+#define MTL_TX_THRESHOLD_192		0x04
-+#define MTL_TX_THRESHOLD_256		0x05
-+#define MTL_TX_THRESHOLD_384		0x06
-+#define MTL_TX_THRESHOLD_512		0x07
-+
-+#define MTL_ETSALG_WRR			0x00
-+#define MTL_ETSALG_WFQ			0x01
-+#define MTL_ETSALG_DWRR			0x02
-+#define MTL_RAA_SP			0x00
-+#define MTL_RAA_WSP			0x01
-+
-+#define MTL_Q_DISABLED			0x00
-+#define MTL_Q_ENABLED			0x02
-+
-+/* MTL traffic class register offsets
-+ *   Multiple traffic classes can be active.  The first class has registers
-+ *   that begin at 0x1100.  Each subsequent queue has registers that
-+ *   are accessed using an offset of 0x80 from the previous queue.
-+ */
-+#define MTL_TC_BASE			MTL_Q_BASE
-+#define MTL_TC_INC			MTL_Q_INC
-+
-+#define MTL_TC_ETSCR			0x10
-+#define MTL_TC_ETSSR			0x14
-+#define MTL_TC_QWR			0x18
-+
-+/* MTL traffic class register entry bit positions and sizes */
-+#define MTL_TC_ETSCR_TSA_INDEX		0
-+#define MTL_TC_ETSCR_TSA_WIDTH		2
-+#define MTL_TC_QWR_QW_INDEX		0
-+#define MTL_TC_QWR_QW_WIDTH		21
-+
-+/* MTL traffic class register value */
-+#define MTL_TSA_SP			0x00
-+#define MTL_TSA_ETS			0x02
-+
-+/* PCS MMD select register offset
-+ *  The MMD select register is used for accessing PCS registers
-+ *  when the underlying APB3 interface is using indirect addressing.
-+ *  Indirect addressing requires accessing registers in two phases,
-+ *  an address phase and a data phase.  The address phases requires
-+ *  writing an address selection value to the MMD select regiesters.
-+ */
-+#define PCS_MMD_SELECT			0xff
-+
-+/* Descriptor/Packet entry bit positions and sizes */
-+#define RX_PACKET_ERRORS_CRC_INDEX		2
-+#define RX_PACKET_ERRORS_CRC_WIDTH		1
-+#define RX_PACKET_ERRORS_FRAME_INDEX		3
-+#define RX_PACKET_ERRORS_FRAME_WIDTH		1
-+#define RX_PACKET_ERRORS_LENGTH_INDEX		0
-+#define RX_PACKET_ERRORS_LENGTH_WIDTH		1
-+#define RX_PACKET_ERRORS_OVERRUN_INDEX		1
-+#define RX_PACKET_ERRORS_OVERRUN_WIDTH		1
-+
-+#define RX_PACKET_ATTRIBUTES_CSUM_DONE_INDEX	0
-+#define RX_PACKET_ATTRIBUTES_CSUM_DONE_WIDTH	1
-+#define RX_PACKET_ATTRIBUTES_VLAN_CTAG_INDEX	1
-+#define RX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH	1
-+#define RX_PACKET_ATTRIBUTES_INCOMPLETE_INDEX	2
-+#define RX_PACKET_ATTRIBUTES_INCOMPLETE_WIDTH	1
-+#define RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_INDEX	3
-+#define RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_WIDTH	1
-+#define RX_PACKET_ATTRIBUTES_CONTEXT_INDEX	4
-+#define RX_PACKET_ATTRIBUTES_CONTEXT_WIDTH	1
-+#define RX_PACKET_ATTRIBUTES_RX_TSTAMP_INDEX	5
-+#define RX_PACKET_ATTRIBUTES_RX_TSTAMP_WIDTH	1
-+#define RX_PACKET_ATTRIBUTES_RSS_HASH_INDEX	6
-+#define RX_PACKET_ATTRIBUTES_RSS_HASH_WIDTH	1
-+
-+#define RX_NORMAL_DESC0_OVT_INDEX		0
-+#define RX_NORMAL_DESC0_OVT_WIDTH		16
-+#define RX_NORMAL_DESC2_HL_INDEX		0
-+#define RX_NORMAL_DESC2_HL_WIDTH		10
-+#define RX_NORMAL_DESC3_CDA_INDEX		27
-+#define RX_NORMAL_DESC3_CDA_WIDTH		1
-+#define RX_NORMAL_DESC3_CTXT_INDEX		30
-+#define RX_NORMAL_DESC3_CTXT_WIDTH		1
-+#define RX_NORMAL_DESC3_ES_INDEX		15
-+#define RX_NORMAL_DESC3_ES_WIDTH		1
-+#define RX_NORMAL_DESC3_ETLT_INDEX		16
-+#define RX_NORMAL_DESC3_ETLT_WIDTH		4
-+#define RX_NORMAL_DESC3_FD_INDEX		29
-+#define RX_NORMAL_DESC3_FD_WIDTH		1
-+#define RX_NORMAL_DESC3_INTE_INDEX		30
-+#define RX_NORMAL_DESC3_INTE_WIDTH		1
-+#define RX_NORMAL_DESC3_L34T_INDEX		20
-+#define RX_NORMAL_DESC3_L34T_WIDTH		4
-+#define RX_NORMAL_DESC3_LD_INDEX		28
-+#define RX_NORMAL_DESC3_LD_WIDTH		1
-+#define RX_NORMAL_DESC3_OWN_INDEX		31
-+#define RX_NORMAL_DESC3_OWN_WIDTH		1
-+#define RX_NORMAL_DESC3_PL_INDEX		0
-+#define RX_NORMAL_DESC3_PL_WIDTH		14
-+#define RX_NORMAL_DESC3_RSV_INDEX		26
-+#define RX_NORMAL_DESC3_RSV_WIDTH		1
-+
-+#define RX_DESC3_L34T_IPV4_TCP			1
-+#define RX_DESC3_L34T_IPV4_UDP			2
-+#define RX_DESC3_L34T_IPV4_ICMP			3
-+#define RX_DESC3_L34T_IPV6_TCP			9
-+#define RX_DESC3_L34T_IPV6_UDP			10
-+#define RX_DESC3_L34T_IPV6_ICMP			11
-+
-+#define RX_CONTEXT_DESC3_TSA_INDEX		4
-+#define RX_CONTEXT_DESC3_TSA_WIDTH		1
-+#define RX_CONTEXT_DESC3_TSD_INDEX		6
-+#define RX_CONTEXT_DESC3_TSD_WIDTH		1
-+
-+#define TX_PACKET_ATTRIBUTES_CSUM_ENABLE_INDEX	0
-+#define TX_PACKET_ATTRIBUTES_CSUM_ENABLE_WIDTH	1
-+#define TX_PACKET_ATTRIBUTES_TSO_ENABLE_INDEX	1
-+#define TX_PACKET_ATTRIBUTES_TSO_ENABLE_WIDTH	1
-+#define TX_PACKET_ATTRIBUTES_VLAN_CTAG_INDEX	2
-+#define TX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH	1
-+#define TX_PACKET_ATTRIBUTES_PTP_INDEX		3
-+#define TX_PACKET_ATTRIBUTES_PTP_WIDTH		1
-+
-+#define TX_CONTEXT_DESC2_MSS_INDEX		0
-+#define TX_CONTEXT_DESC2_MSS_WIDTH		15
-+#define TX_CONTEXT_DESC3_CTXT_INDEX		30
-+#define TX_CONTEXT_DESC3_CTXT_WIDTH		1
-+#define TX_CONTEXT_DESC3_TCMSSV_INDEX		26
-+#define TX_CONTEXT_DESC3_TCMSSV_WIDTH		1
-+#define TX_CONTEXT_DESC3_VLTV_INDEX		16
-+#define TX_CONTEXT_DESC3_VLTV_WIDTH		1
-+#define TX_CONTEXT_DESC3_VT_INDEX		0
-+#define TX_CONTEXT_DESC3_VT_WIDTH		16
-+
-+#define TX_NORMAL_DESC2_HL_B1L_INDEX		0
-+#define TX_NORMAL_DESC2_HL_B1L_WIDTH		14
-+#define TX_NORMAL_DESC2_IC_INDEX		31
-+#define TX_NORMAL_DESC2_IC_WIDTH		1
-+#define TX_NORMAL_DESC2_TTSE_INDEX		30
-+#define TX_NORMAL_DESC2_TTSE_WIDTH		1
-+#define TX_NORMAL_DESC2_VTIR_INDEX		14
-+#define TX_NORMAL_DESC2_VTIR_WIDTH		2
-+#define TX_NORMAL_DESC3_CIC_INDEX		16
-+#define TX_NORMAL_DESC3_CIC_WIDTH		2
-+#define TX_NORMAL_DESC3_CPC_INDEX		26
-+#define TX_NORMAL_DESC3_CPC_WIDTH		2
-+#define TX_NORMAL_DESC3_CTXT_INDEX		30
-+#define TX_NORMAL_DESC3_CTXT_WIDTH		1
-+#define TX_NORMAL_DESC3_FD_INDEX		29
-+#define TX_NORMAL_DESC3_FD_WIDTH		1
-+#define TX_NORMAL_DESC3_FL_INDEX		0
-+#define TX_NORMAL_DESC3_FL_WIDTH		15
-+#define TX_NORMAL_DESC3_LD_INDEX		28
-+#define TX_NORMAL_DESC3_LD_WIDTH		1
-+#define TX_NORMAL_DESC3_OWN_INDEX		31
-+#define TX_NORMAL_DESC3_OWN_WIDTH		1
-+#define TX_NORMAL_DESC3_TCPHDRLEN_INDEX		19
-+#define TX_NORMAL_DESC3_TCPHDRLEN_WIDTH		4
-+#define TX_NORMAL_DESC3_TCPPL_INDEX		0
-+#define TX_NORMAL_DESC3_TCPPL_WIDTH		18
-+#define TX_NORMAL_DESC3_TSE_INDEX		18
-+#define TX_NORMAL_DESC3_TSE_WIDTH		1
-+
-+#define TX_NORMAL_DESC2_VLAN_INSERT		0x2
-+
-+/* MDIO undefined or vendor specific registers */
-+#ifndef MDIO_AN_COMP_STAT
-+#define MDIO_AN_COMP_STAT		0x0030
-+#endif
-+
-+/* Bit setting and getting macros
-+ *  The get macro will extract the current bit field value from within
-+ *  the variable
-+ *
-+ *  The set macro will clear the current bit field value within the
-+ *  variable and then set the bit field of the variable to the
-+ *  specified value
-+ */
-+#define GET_BITS(_var, _index, _width)					\
-+	(((_var) >> (_index)) & ((0x1 << (_width)) - 1))
-+
-+#define SET_BITS(_var, _index, _width, _val)				\
-+do {									\
-+	(_var) &= ~(((0x1 << (_width)) - 1) << (_index));		\
-+	(_var) |= (((_val) & ((0x1 << (_width)) - 1)) << (_index));	\
-+} while (0)
-+
-+#define GET_BITS_LE(_var, _index, _width)				\
-+	((le32_to_cpu((_var)) >> (_index)) & ((0x1 << (_width)) - 1))
-+
-+#define SET_BITS_LE(_var, _index, _width, _val)				\
-+do {									\
-+	(_var) &= cpu_to_le32(~(((0x1 << (_width)) - 1) << (_index)));	\
-+	(_var) |= cpu_to_le32((((_val) &				\
-+			      ((0x1 << (_width)) - 1)) << (_index)));	\
-+} while (0)
-+
-+/* Bit setting and getting macros based on register fields
-+ *  The get macro uses the bit field definitions formed using the input
-+ *  names to extract the current bit field value from within the
-+ *  variable
-+ *
-+ *  The set macro uses the bit field definitions formed using the input
-+ *  names to set the bit field of the variable to the specified value
-+ */
-+#define XGMAC_GET_BITS(_var, _prefix, _field)				\
-+	GET_BITS((_var),						\
-+		 _prefix##_##_field##_INDEX,				\
-+		 _prefix##_##_field##_WIDTH)
-+
-+#define XGMAC_SET_BITS(_var, _prefix, _field, _val)			\
-+	SET_BITS((_var),						\
-+		 _prefix##_##_field##_INDEX,				\
-+		 _prefix##_##_field##_WIDTH, (_val))
-+
-+#define XGMAC_GET_BITS_LE(_var, _prefix, _field)			\
-+	GET_BITS_LE((_var),						\
-+		 _prefix##_##_field##_INDEX,				\
-+		 _prefix##_##_field##_WIDTH)
-+
-+#define XGMAC_SET_BITS_LE(_var, _prefix, _field, _val)			\
-+	SET_BITS_LE((_var),						\
-+		 _prefix##_##_field##_INDEX,				\
-+		 _prefix##_##_field##_WIDTH, (_val))
-+
-+/* Macros for reading or writing registers
-+ *  The ioread macros will get bit fields or full values using the
-+ *  register definitions formed using the input names
-+ *
-+ *  The iowrite macros will set bit fields or full values using the
-+ *  register definitions formed using the input names
-+ */
-+#define XGMAC_IOREAD(_pdata, _reg)					\
-+	ioread32((_pdata)->xgmac_regs + _reg)
-+
-+#define XGMAC_IOREAD_BITS(_pdata, _reg, _field)				\
-+	GET_BITS(XGMAC_IOREAD((_pdata), _reg),				\
-+		 _reg##_##_field##_INDEX,				\
-+		 _reg##_##_field##_WIDTH)
-+
-+#define XGMAC_IOWRITE(_pdata, _reg, _val)				\
-+	iowrite32((_val), (_pdata)->xgmac_regs + _reg)
-+
-+#define XGMAC_IOWRITE_BITS(_pdata, _reg, _field, _val)			\
-+do {									\
-+	u32 reg_val = XGMAC_IOREAD((_pdata), _reg);			\
-+	SET_BITS(reg_val,						\
-+		 _reg##_##_field##_INDEX,				\
-+		 _reg##_##_field##_WIDTH, (_val));			\
-+	XGMAC_IOWRITE((_pdata), _reg, reg_val);				\
-+} while (0)
-+
-+/* Macros for reading or writing MTL queue or traffic class registers
-+ *  Similar to the standard read and write macros except that the
-+ *  base register value is calculated by the queue or traffic class number
-+ */
-+#define XGMAC_MTL_IOREAD(_pdata, _n, _reg)				\
-+	ioread32((_pdata)->xgmac_regs +					\
-+		 MTL_Q_BASE + ((_n) * MTL_Q_INC) + _reg)
-+
-+#define XGMAC_MTL_IOREAD_BITS(_pdata, _n, _reg, _field)			\
-+	GET_BITS(XGMAC_MTL_IOREAD((_pdata), (_n), _reg),		\
-+		 _reg##_##_field##_INDEX,				\
-+		 _reg##_##_field##_WIDTH)
-+
-+#define XGMAC_MTL_IOWRITE(_pdata, _n, _reg, _val)			\
-+	iowrite32((_val), (_pdata)->xgmac_regs +			\
-+		  MTL_Q_BASE + ((_n) * MTL_Q_INC) + _reg)
-+
-+#define XGMAC_MTL_IOWRITE_BITS(_pdata, _n, _reg, _field, _val)		\
-+do {									\
-+	u32 reg_val = XGMAC_MTL_IOREAD((_pdata), (_n), _reg);		\
-+	SET_BITS(reg_val,						\
-+		 _reg##_##_field##_INDEX,				\
-+		 _reg##_##_field##_WIDTH, (_val));			\
-+	XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val);		\
-+} while (0)
-+
-+/* Macros for reading or writing DMA channel registers
-+ *  Similar to the standard read and write macros except that the
-+ *  base register value is obtained from the ring
-+ */
-+#define XGMAC_DMA_IOREAD(_channel, _reg)				\
-+	ioread32((_channel)->dma_regs + _reg)
-+
-+#define XGMAC_DMA_IOREAD_BITS(_channel, _reg, _field)			\
-+	GET_BITS(XGMAC_DMA_IOREAD((_channel), _reg),			\
-+		 _reg##_##_field##_INDEX,				\
-+		 _reg##_##_field##_WIDTH)
-+
-+#define XGMAC_DMA_IOWRITE(_channel, _reg, _val)				\
-+	iowrite32((_val), (_channel)->dma_regs + _reg)
-+
-+#define XGMAC_DMA_IOWRITE_BITS(_channel, _reg, _field, _val)		\
-+do {									\
-+	u32 reg_val = XGMAC_DMA_IOREAD((_channel), _reg);		\
-+	SET_BITS(reg_val,						\
-+		 _reg##_##_field##_INDEX,				\
-+		 _reg##_##_field##_WIDTH, (_val));			\
-+	XGMAC_DMA_IOWRITE((_channel), _reg, reg_val);			\
-+} while (0)
-+
-+/* Macros for building, reading or writing register values or bits
-+ * within the register values of XPCS registers.
-+ */
-+#define XPCS_IOWRITE(_pdata, _off, _val)				\
-+	iowrite32(_val, (_pdata)->xpcs_regs + (_off))
-+
-+#define XPCS_IOREAD(_pdata, _off)					\
-+	ioread32((_pdata)->xpcs_regs + (_off))
-+
-+/* Macros for building, reading or writing register values or bits
-+ * using MDIO.  Different from above because of the use of standardized
-+ * Linux include values.  No shifting is performed with the bit
-+ * operations, everything works on mask values.
-+ */
-+#define XMDIO_READ(_pdata, _mmd, _reg)					\
-+	((_pdata)->hw_if.read_mmd_regs((_pdata), 0,			\
-+		MII_ADDR_C45 | (_mmd << 16) | ((_reg) & 0xffff)))
-+
-+#define XMDIO_READ_BITS(_pdata, _mmd, _reg, _mask)			\
-+	(XMDIO_READ((_pdata), _mmd, _reg) & _mask)
-+
-+#define XMDIO_WRITE(_pdata, _mmd, _reg, _val)				\
-+	((_pdata)->hw_if.write_mmd_regs((_pdata), 0,			\
-+		MII_ADDR_C45 | (_mmd << 16) | ((_reg) & 0xffff), (_val)))
-+
-+#define XMDIO_WRITE_BITS(_pdata, _mmd, _reg, _mask, _val)		\
-+do {									\
-+	u32 mmd_val = XMDIO_READ((_pdata), _mmd, _reg);			\
-+	mmd_val &= ~_mask;						\
-+	mmd_val |= (_val);						\
-+	XMDIO_WRITE((_pdata), _mmd, _reg, mmd_val);			\
-+} while (0)
-+
-+#endif
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-dcb.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-dcb.c
-new file mode 100644
-index 0000000..343301c
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-dcb.c
-@@ -0,0 +1,269 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/netdevice.h>
-+#include <net/dcbnl.h>
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+static int xgbe_dcb_ieee_getets(struct net_device *netdev,
-+				struct ieee_ets *ets)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	/* Set number of supported traffic classes */
-+	ets->ets_cap = pdata->hw_feat.tc_cnt;
-+
-+	if (pdata->ets) {
-+		ets->cbs = pdata->ets->cbs;
-+		memcpy(ets->tc_tx_bw, pdata->ets->tc_tx_bw,
-+		       sizeof(ets->tc_tx_bw));
-+		memcpy(ets->tc_tsa, pdata->ets->tc_tsa,
-+		       sizeof(ets->tc_tsa));
-+		memcpy(ets->prio_tc, pdata->ets->prio_tc,
-+		       sizeof(ets->prio_tc));
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_dcb_ieee_setets(struct net_device *netdev,
-+				struct ieee_ets *ets)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	unsigned int i, tc_ets, tc_ets_weight;
-+
-+	tc_ets = 0;
-+	tc_ets_weight = 0;
-+	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
-+		DBGPR("  TC%u: tx_bw=%hhu, rx_bw=%hhu, tsa=%hhu\n", i,
-+		      ets->tc_tx_bw[i], ets->tc_rx_bw[i], ets->tc_tsa[i]);
-+		DBGPR("  PRIO%u: TC=%hhu\n", i, ets->prio_tc[i]);
-+
-+		if ((ets->tc_tx_bw[i] || ets->tc_tsa[i]) &&
-+		    (i >= pdata->hw_feat.tc_cnt))
-+				return -EINVAL;
-+
-+		if (ets->prio_tc[i] >= pdata->hw_feat.tc_cnt)
-+			return -EINVAL;
-+
-+		switch (ets->tc_tsa[i]) {
-+		case IEEE_8021QAZ_TSA_STRICT:
-+			break;
-+		case IEEE_8021QAZ_TSA_ETS:
-+			tc_ets = 1;
-+			tc_ets_weight += ets->tc_tx_bw[i];
-+			break;
-+
-+		default:
-+			return -EINVAL;
-+		}
-+	}
-+
-+	/* Weights must add up to 100% */
-+	if (tc_ets && (tc_ets_weight != 100))
-+		return -EINVAL;
-+
-+	if (!pdata->ets) {
-+		pdata->ets = devm_kzalloc(pdata->dev, sizeof(*pdata->ets),
-+					  GFP_KERNEL);
-+		if (!pdata->ets)
-+			return -ENOMEM;
-+	}
-+
-+	memcpy(pdata->ets, ets, sizeof(*pdata->ets));
-+
-+	pdata->hw_if.config_dcb_tc(pdata);
-+
-+	return 0;
-+}
-+
-+static int xgbe_dcb_ieee_getpfc(struct net_device *netdev,
-+				struct ieee_pfc *pfc)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	/* Set number of supported PFC traffic classes */
-+	pfc->pfc_cap = pdata->hw_feat.tc_cnt;
-+
-+	if (pdata->pfc) {
-+		pfc->pfc_en = pdata->pfc->pfc_en;
-+		pfc->mbc = pdata->pfc->mbc;
-+		pfc->delay = pdata->pfc->delay;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_dcb_ieee_setpfc(struct net_device *netdev,
-+				struct ieee_pfc *pfc)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	DBGPR("  cap=%hhu, en=%hhx, mbc=%hhu, delay=%hhu\n",
-+	      pfc->pfc_cap, pfc->pfc_en, pfc->mbc, pfc->delay);
-+
-+	if (!pdata->pfc) {
-+		pdata->pfc = devm_kzalloc(pdata->dev, sizeof(*pdata->pfc),
-+					  GFP_KERNEL);
-+		if (!pdata->pfc)
-+			return -ENOMEM;
-+	}
-+
-+	memcpy(pdata->pfc, pfc, sizeof(*pdata->pfc));
-+
-+	pdata->hw_if.config_dcb_pfc(pdata);
-+
-+	return 0;
-+}
-+
-+static u8 xgbe_dcb_getdcbx(struct net_device *netdev)
-+{
-+	return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
-+}
-+
-+static u8 xgbe_dcb_setdcbx(struct net_device *netdev, u8 dcbx)
-+{
-+	u8 support = xgbe_dcb_getdcbx(netdev);
-+
-+	DBGPR("  DCBX=%#hhx\n", dcbx);
-+
-+	if (dcbx & ~support)
-+		return 1;
-+
-+	if ((dcbx & support) != support)
-+		return 1;
-+
-+	return 0;
-+}
-+
-+static const struct dcbnl_rtnl_ops xgbe_dcbnl_ops = {
-+	/* IEEE 802.1Qaz std */
-+	.ieee_getets = xgbe_dcb_ieee_getets,
-+	.ieee_setets = xgbe_dcb_ieee_setets,
-+	.ieee_getpfc = xgbe_dcb_ieee_getpfc,
-+	.ieee_setpfc = xgbe_dcb_ieee_setpfc,
-+
-+	/* DCBX configuration */
-+	.getdcbx     = xgbe_dcb_getdcbx,
-+	.setdcbx     = xgbe_dcb_setdcbx,
-+};
-+
-+const struct dcbnl_rtnl_ops *xgbe_a0_get_dcbnl_ops(void)
-+{
-+	return &xgbe_dcbnl_ops;
-+}
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-debugfs.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-debugfs.c
-new file mode 100644
-index 0000000..ecfa6f9
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-debugfs.c
-@@ -0,0 +1,373 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/debugfs.h>
-+#include <linux/module.h>
-+#include <linux/slab.h>
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+static ssize_t xgbe_common_read(char __user *buffer, size_t count,
-+				loff_t *ppos, unsigned int value)
-+{
-+	char *buf;
-+	ssize_t len;
-+
-+	if (*ppos != 0)
-+		return 0;
-+
-+	buf = kasprintf(GFP_KERNEL, "0x%08x\n", value);
-+	if (!buf)
-+		return -ENOMEM;
-+
-+	if (count < strlen(buf)) {
-+		kfree(buf);
-+		return -ENOSPC;
-+	}
-+
-+	len = simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf));
-+	kfree(buf);
-+
-+	return len;
-+}
-+
-+static ssize_t xgbe_common_write(const char __user *buffer, size_t count,
-+				 loff_t *ppos, unsigned int *value)
-+{
-+	char workarea[32];
-+	ssize_t len;
-+	int ret;
-+
-+	if (*ppos != 0)
-+		return 0;
-+
-+	if (count >= sizeof(workarea))
-+		return -ENOSPC;
-+
-+	len = simple_write_to_buffer(workarea, sizeof(workarea) - 1, ppos,
-+				     buffer, count);
-+	if (len < 0)
-+		return len;
-+
-+	workarea[len] = '\0';
-+	ret = kstrtouint(workarea, 16, value);
-+	if (ret)
-+		return -EIO;
-+
-+	return len;
-+}
-+
-+static ssize_t xgmac_reg_addr_read(struct file *filp, char __user *buffer,
-+				   size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+
-+	return xgbe_common_read(buffer, count, ppos, pdata->debugfs_xgmac_reg);
-+}
-+
-+static ssize_t xgmac_reg_addr_write(struct file *filp,
-+				    const char __user *buffer,
-+				    size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+
-+	return xgbe_common_write(buffer, count, ppos,
-+				 &pdata->debugfs_xgmac_reg);
-+}
-+
-+static ssize_t xgmac_reg_value_read(struct file *filp, char __user *buffer,
-+				    size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+	unsigned int value;
-+
-+	value = XGMAC_IOREAD(pdata, pdata->debugfs_xgmac_reg);
-+
-+	return xgbe_common_read(buffer, count, ppos, value);
-+}
-+
-+static ssize_t xgmac_reg_value_write(struct file *filp,
-+				     const char __user *buffer,
-+				     size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+	unsigned int value;
-+	ssize_t len;
-+
-+	len = xgbe_common_write(buffer, count, ppos, &value);
-+	if (len < 0)
-+		return len;
-+
-+	XGMAC_IOWRITE(pdata, pdata->debugfs_xgmac_reg, value);
-+
-+	return len;
-+}
-+
-+static const struct file_operations xgmac_reg_addr_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read =  xgmac_reg_addr_read,
-+	.write = xgmac_reg_addr_write,
-+};
-+
-+static const struct file_operations xgmac_reg_value_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read =  xgmac_reg_value_read,
-+	.write = xgmac_reg_value_write,
-+};
-+
-+static ssize_t xpcs_mmd_read(struct file *filp, char __user *buffer,
-+			     size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+
-+	return xgbe_common_read(buffer, count, ppos, pdata->debugfs_xpcs_mmd);
-+}
-+
-+static ssize_t xpcs_mmd_write(struct file *filp, const char __user *buffer,
-+			      size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+
-+	return xgbe_common_write(buffer, count, ppos,
-+				 &pdata->debugfs_xpcs_mmd);
-+}
-+
-+static ssize_t xpcs_reg_addr_read(struct file *filp, char __user *buffer,
-+				  size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+
-+	return xgbe_common_read(buffer, count, ppos, pdata->debugfs_xpcs_reg);
-+}
-+
-+static ssize_t xpcs_reg_addr_write(struct file *filp, const char __user *buffer,
-+				   size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+
-+	return xgbe_common_write(buffer, count, ppos,
-+				 &pdata->debugfs_xpcs_reg);
-+}
-+
-+static ssize_t xpcs_reg_value_read(struct file *filp, char __user *buffer,
-+				   size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+	unsigned int value;
-+
-+	value = XMDIO_READ(pdata, pdata->debugfs_xpcs_mmd,
-+			   pdata->debugfs_xpcs_reg);
-+
-+	return xgbe_common_read(buffer, count, ppos, value);
-+}
-+
-+static ssize_t xpcs_reg_value_write(struct file *filp,
-+				    const char __user *buffer,
-+				    size_t count, loff_t *ppos)
-+{
-+	struct xgbe_prv_data *pdata = filp->private_data;
-+	unsigned int value;
-+	ssize_t len;
-+
-+	len = xgbe_common_write(buffer, count, ppos, &value);
-+	if (len < 0)
-+		return len;
-+
-+	XMDIO_WRITE(pdata, pdata->debugfs_xpcs_mmd, pdata->debugfs_xpcs_reg,
-+		    value);
-+
-+	return len;
-+}
-+
-+static const struct file_operations xpcs_mmd_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read =  xpcs_mmd_read,
-+	.write = xpcs_mmd_write,
-+};
-+
-+static const struct file_operations xpcs_reg_addr_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read =  xpcs_reg_addr_read,
-+	.write = xpcs_reg_addr_write,
-+};
-+
-+static const struct file_operations xpcs_reg_value_fops = {
-+	.owner = THIS_MODULE,
-+	.open = simple_open,
-+	.read =  xpcs_reg_value_read,
-+	.write = xpcs_reg_value_write,
-+};
-+
-+void xgbe_a0_debugfs_init(struct xgbe_prv_data *pdata)
-+{
-+	struct dentry *pfile;
-+	char *buf;
-+
-+	/* Set defaults */
-+	pdata->debugfs_xgmac_reg = 0;
-+	pdata->debugfs_xpcs_mmd = 1;
-+	pdata->debugfs_xpcs_reg = 0;
-+
-+	buf = kasprintf(GFP_KERNEL, "amd-xgbe-a0-%s", pdata->netdev->name);
-+	pdata->xgbe_debugfs = debugfs_create_dir(buf, NULL);
-+	if (!pdata->xgbe_debugfs) {
-+		netdev_err(pdata->netdev, "debugfs_create_dir failed\n");
-+		return;
-+	}
-+
-+	pfile = debugfs_create_file("xgmac_register", 0600,
-+				    pdata->xgbe_debugfs, pdata,
-+				    &xgmac_reg_addr_fops);
-+	if (!pfile)
-+		netdev_err(pdata->netdev, "debugfs_create_file failed\n");
-+
-+	pfile = debugfs_create_file("xgmac_register_value", 0600,
-+				    pdata->xgbe_debugfs, pdata,
-+				    &xgmac_reg_value_fops);
-+	if (!pfile)
-+		netdev_err(pdata->netdev, "debugfs_create_file failed\n");
-+
-+	pfile = debugfs_create_file("xpcs_mmd", 0600,
-+				    pdata->xgbe_debugfs, pdata,
-+				    &xpcs_mmd_fops);
-+	if (!pfile)
-+		netdev_err(pdata->netdev, "debugfs_create_file failed\n");
-+
-+	pfile = debugfs_create_file("xpcs_register", 0600,
-+				    pdata->xgbe_debugfs, pdata,
-+				    &xpcs_reg_addr_fops);
-+	if (!pfile)
-+		netdev_err(pdata->netdev, "debugfs_create_file failed\n");
-+
-+	pfile = debugfs_create_file("xpcs_register_value", 0600,
-+				    pdata->xgbe_debugfs, pdata,
-+				    &xpcs_reg_value_fops);
-+	if (!pfile)
-+		netdev_err(pdata->netdev, "debugfs_create_file failed\n");
-+
-+	kfree(buf);
-+}
-+
-+void xgbe_a0_debugfs_exit(struct xgbe_prv_data *pdata)
-+{
-+	debugfs_remove_recursive(pdata->xgbe_debugfs);
-+	pdata->xgbe_debugfs = NULL;
-+}
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-desc.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-desc.c
-new file mode 100644
-index 0000000..5dd5777
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-desc.c
-@@ -0,0 +1,636 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+static void xgbe_unmap_rdata(struct xgbe_prv_data *, struct xgbe_ring_data *);
-+
-+static void xgbe_free_ring(struct xgbe_prv_data *pdata,
-+			   struct xgbe_ring *ring)
-+{
-+	struct xgbe_ring_data *rdata;
-+	unsigned int i;
-+
-+	if (!ring)
-+		return;
-+
-+	if (ring->rdata) {
-+		for (i = 0; i < ring->rdesc_count; i++) {
-+			rdata = XGBE_GET_DESC_DATA(ring, i);
-+			xgbe_unmap_rdata(pdata, rdata);
-+		}
-+
-+		kfree(ring->rdata);
-+		ring->rdata = NULL;
-+	}
-+
-+	if (ring->rx_hdr_pa.pages) {
-+		dma_unmap_page(pdata->dev, ring->rx_hdr_pa.pages_dma,
-+			       ring->rx_hdr_pa.pages_len, DMA_FROM_DEVICE);
-+		put_page(ring->rx_hdr_pa.pages);
-+
-+		ring->rx_hdr_pa.pages = NULL;
-+		ring->rx_hdr_pa.pages_len = 0;
-+		ring->rx_hdr_pa.pages_offset = 0;
-+		ring->rx_hdr_pa.pages_dma = 0;
-+	}
-+
-+	if (ring->rx_buf_pa.pages) {
-+		dma_unmap_page(pdata->dev, ring->rx_buf_pa.pages_dma,
-+			       ring->rx_buf_pa.pages_len, DMA_FROM_DEVICE);
-+		put_page(ring->rx_buf_pa.pages);
-+
-+		ring->rx_buf_pa.pages = NULL;
-+		ring->rx_buf_pa.pages_len = 0;
-+		ring->rx_buf_pa.pages_offset = 0;
-+		ring->rx_buf_pa.pages_dma = 0;
-+	}
-+
-+	if (ring->rdesc) {
-+		dma_free_coherent(pdata->dev,
-+				  (sizeof(struct xgbe_ring_desc) *
-+				   ring->rdesc_count),
-+				  ring->rdesc, ring->rdesc_dma);
-+		ring->rdesc = NULL;
-+	}
-+}
-+
-+static void xgbe_free_ring_resources(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	DBGPR("-->xgbe_free_ring_resources\n");
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		xgbe_free_ring(pdata, channel->tx_ring);
-+		xgbe_free_ring(pdata, channel->rx_ring);
-+	}
-+
-+	DBGPR("<--xgbe_free_ring_resources\n");
-+}
-+
-+static int xgbe_init_ring(struct xgbe_prv_data *pdata,
-+			  struct xgbe_ring *ring, unsigned int rdesc_count)
-+{
-+	DBGPR("-->xgbe_init_ring\n");
-+
-+	if (!ring)
-+		return 0;
-+
-+	/* Descriptors */
-+	ring->rdesc_count = rdesc_count;
-+	ring->rdesc = dma_alloc_coherent(pdata->dev,
-+					 (sizeof(struct xgbe_ring_desc) *
-+					  rdesc_count), &ring->rdesc_dma,
-+					 GFP_KERNEL);
-+	if (!ring->rdesc)
-+		return -ENOMEM;
-+
-+	/* Descriptor information */
-+	ring->rdata = kcalloc(rdesc_count, sizeof(struct xgbe_ring_data),
-+			      GFP_KERNEL);
-+	if (!ring->rdata)
-+		return -ENOMEM;
-+
-+	DBGPR("    rdesc=0x%p, rdesc_dma=0x%llx, rdata=0x%p\n",
-+	      ring->rdesc, ring->rdesc_dma, ring->rdata);
-+
-+	DBGPR("<--xgbe_init_ring\n");
-+
-+	return 0;
-+}
-+
-+static int xgbe_alloc_ring_resources(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+	int ret;
-+
-+	DBGPR("-->xgbe_alloc_ring_resources\n");
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		DBGPR("  %s - tx_ring:\n", channel->name);
-+		ret = xgbe_init_ring(pdata, channel->tx_ring,
-+				     pdata->tx_desc_count);
-+		if (ret) {
-+			netdev_alert(pdata->netdev,
-+				     "error initializing Tx ring\n");
-+			goto err_ring;
-+		}
-+
-+		DBGPR("  %s - rx_ring:\n", channel->name);
-+		ret = xgbe_init_ring(pdata, channel->rx_ring,
-+				     pdata->rx_desc_count);
-+		if (ret) {
-+			netdev_alert(pdata->netdev,
-+				     "error initializing Tx ring\n");
-+			goto err_ring;
-+		}
-+	}
-+
-+	DBGPR("<--xgbe_alloc_ring_resources\n");
-+
-+	return 0;
-+
-+err_ring:
-+	xgbe_free_ring_resources(pdata);
-+
-+	return ret;
-+}
-+
-+static int xgbe_alloc_pages(struct xgbe_prv_data *pdata,
-+			    struct xgbe_page_alloc *pa, gfp_t gfp, int order)
-+{
-+	struct page *pages = NULL;
-+	dma_addr_t pages_dma;
-+	int ret;
-+
-+	/* Try to obtain pages, decreasing order if necessary */
-+	gfp |= __GFP_COLD | __GFP_COMP;
-+	while (order >= 0) {
-+		pages = alloc_pages(gfp, order);
-+		if (pages)
-+			break;
-+
-+		order--;
-+	}
-+	if (!pages)
-+		return -ENOMEM;
-+
-+	/* Map the pages */
-+	pages_dma = dma_map_page(pdata->dev, pages, 0,
-+				 PAGE_SIZE << order, DMA_FROM_DEVICE);
-+	ret = dma_mapping_error(pdata->dev, pages_dma);
-+	if (ret) {
-+		put_page(pages);
-+		return ret;
-+	}
-+
-+	pa->pages = pages;
-+	pa->pages_len = PAGE_SIZE << order;
-+	pa->pages_offset = 0;
-+	pa->pages_dma = pages_dma;
-+
-+	return 0;
-+}
-+
-+static void xgbe_set_buffer_data(struct xgbe_buffer_data *bd,
-+				 struct xgbe_page_alloc *pa,
-+				 unsigned int len)
-+{
-+	get_page(pa->pages);
-+	bd->pa = *pa;
-+
-+	bd->dma = pa->pages_dma + pa->pages_offset;
-+	bd->dma_len = len;
-+
-+	pa->pages_offset += len;
-+	if ((pa->pages_offset + len) > pa->pages_len) {
-+		/* This data descriptor is responsible for unmapping page(s) */
-+		bd->pa_unmap = *pa;
-+
-+		/* Get a new allocation next time */
-+		pa->pages = NULL;
-+		pa->pages_len = 0;
-+		pa->pages_offset = 0;
-+		pa->pages_dma = 0;
-+	}
-+}
-+
-+static int xgbe_map_rx_buffer(struct xgbe_prv_data *pdata,
-+			      struct xgbe_ring *ring,
-+			      struct xgbe_ring_data *rdata)
-+{
-+	int order, ret;
-+
-+	if (!ring->rx_hdr_pa.pages) {
-+		ret = xgbe_alloc_pages(pdata, &ring->rx_hdr_pa, GFP_ATOMIC, 0);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	if (!ring->rx_buf_pa.pages) {
-+		order = max_t(int, PAGE_ALLOC_COSTLY_ORDER - 1, 0);
-+		ret = xgbe_alloc_pages(pdata, &ring->rx_buf_pa, GFP_ATOMIC,
-+				       order);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	/* Set up the header page info */
-+	xgbe_set_buffer_data(&rdata->rx.hdr, &ring->rx_hdr_pa,
-+			     XGBE_SKB_ALLOC_SIZE);
-+
-+	/* Set up the buffer page info */
-+	xgbe_set_buffer_data(&rdata->rx.buf, &ring->rx_buf_pa,
-+			     pdata->rx_buf_size);
-+
-+	return 0;
-+}
-+
-+static void xgbe_wrapper_tx_descriptor_init(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_channel *channel;
-+	struct xgbe_ring *ring;
-+	struct xgbe_ring_data *rdata;
-+	struct xgbe_ring_desc *rdesc;
-+	dma_addr_t rdesc_dma;
-+	unsigned int i, j;
-+
-+	DBGPR("-->xgbe_wrapper_tx_descriptor_init\n");
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		ring = channel->tx_ring;
-+		if (!ring)
-+			break;
-+
-+		rdesc = ring->rdesc;
-+		rdesc_dma = ring->rdesc_dma;
-+
-+		for (j = 0; j < ring->rdesc_count; j++) {
-+			rdata = XGBE_GET_DESC_DATA(ring, j);
-+
-+			rdata->rdesc = rdesc;
-+			rdata->rdesc_dma = rdesc_dma;
-+
-+			rdesc++;
-+			rdesc_dma += sizeof(struct xgbe_ring_desc);
-+		}
-+
-+		ring->cur = 0;
-+		ring->dirty = 0;
-+		memset(&ring->tx, 0, sizeof(ring->tx));
-+
-+		hw_if->tx_desc_init(channel);
-+	}
-+
-+	DBGPR("<--xgbe_wrapper_tx_descriptor_init\n");
-+}
-+
-+static void xgbe_wrapper_rx_descriptor_init(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_channel *channel;
-+	struct xgbe_ring *ring;
-+	struct xgbe_ring_desc *rdesc;
-+	struct xgbe_ring_data *rdata;
-+	dma_addr_t rdesc_dma;
-+	unsigned int i, j;
-+
-+	DBGPR("-->xgbe_wrapper_rx_descriptor_init\n");
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		ring = channel->rx_ring;
-+		if (!ring)
-+			break;
-+
-+		rdesc = ring->rdesc;
-+		rdesc_dma = ring->rdesc_dma;
-+
-+		for (j = 0; j < ring->rdesc_count; j++) {
-+			rdata = XGBE_GET_DESC_DATA(ring, j);
-+
-+			rdata->rdesc = rdesc;
-+			rdata->rdesc_dma = rdesc_dma;
-+
-+			if (xgbe_map_rx_buffer(pdata, ring, rdata))
-+				break;
-+
-+			rdesc++;
-+			rdesc_dma += sizeof(struct xgbe_ring_desc);
-+		}
-+
-+		ring->cur = 0;
-+		ring->dirty = 0;
-+
-+		hw_if->rx_desc_init(channel);
-+	}
-+
-+	DBGPR("<--xgbe_wrapper_rx_descriptor_init\n");
-+}
-+
-+static void xgbe_unmap_rdata(struct xgbe_prv_data *pdata,
-+			     struct xgbe_ring_data *rdata)
-+{
-+	if (rdata->skb_dma) {
-+		if (rdata->mapped_as_page) {
-+			dma_unmap_page(pdata->dev, rdata->skb_dma,
-+				       rdata->skb_dma_len, DMA_TO_DEVICE);
-+		} else {
-+			dma_unmap_single(pdata->dev, rdata->skb_dma,
-+					 rdata->skb_dma_len, DMA_TO_DEVICE);
-+		}
-+		rdata->skb_dma = 0;
-+		rdata->skb_dma_len = 0;
-+	}
-+
-+	if (rdata->skb) {
-+		dev_kfree_skb_any(rdata->skb);
-+		rdata->skb = NULL;
-+	}
-+
-+	if (rdata->rx.hdr.pa.pages)
-+		put_page(rdata->rx.hdr.pa.pages);
-+
-+	if (rdata->rx.hdr.pa_unmap.pages) {
-+		dma_unmap_page(pdata->dev, rdata->rx.hdr.pa_unmap.pages_dma,
-+			       rdata->rx.hdr.pa_unmap.pages_len,
-+			       DMA_FROM_DEVICE);
-+		put_page(rdata->rx.hdr.pa_unmap.pages);
-+	}
-+
-+	if (rdata->rx.buf.pa.pages)
-+		put_page(rdata->rx.buf.pa.pages);
-+
-+	if (rdata->rx.buf.pa_unmap.pages) {
-+		dma_unmap_page(pdata->dev, rdata->rx.buf.pa_unmap.pages_dma,
-+			       rdata->rx.buf.pa_unmap.pages_len,
-+			       DMA_FROM_DEVICE);
-+		put_page(rdata->rx.buf.pa_unmap.pages);
-+	}
-+
-+	memset(&rdata->tx, 0, sizeof(rdata->tx));
-+	memset(&rdata->rx, 0, sizeof(rdata->rx));
-+
-+	rdata->mapped_as_page = 0;
-+
-+	if (rdata->state_saved) {
-+		rdata->state_saved = 0;
-+		rdata->state.incomplete = 0;
-+		rdata->state.context_next = 0;
-+		rdata->state.skb = NULL;
-+		rdata->state.len = 0;
-+		rdata->state.error = 0;
-+	}
-+}
-+
-+static int xgbe_map_tx_skb(struct xgbe_channel *channel, struct sk_buff *skb)
-+{
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+	struct xgbe_ring *ring = channel->tx_ring;
-+	struct xgbe_ring_data *rdata;
-+	struct xgbe_packet_data *packet;
-+	struct skb_frag_struct *frag;
-+	dma_addr_t skb_dma;
-+	unsigned int start_index, cur_index;
-+	unsigned int offset, tso, vlan, datalen, len;
-+	unsigned int i;
-+
-+	DBGPR("-->xgbe_map_tx_skb: cur = %d\n", ring->cur);
-+
-+	offset = 0;
-+	start_index = ring->cur;
-+	cur_index = ring->cur;
-+
-+	packet = &ring->packet_data;
-+	packet->rdesc_count = 0;
-+	packet->length = 0;
-+
-+	tso = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			     TSO_ENABLE);
-+	vlan = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			      VLAN_CTAG);
-+
-+	/* Save space for a context descriptor if needed */
-+	if ((tso && (packet->mss != ring->tx.cur_mss)) ||
-+	    (vlan && (packet->vlan_ctag != ring->tx.cur_vlan_ctag)))
-+		cur_index++;
-+	rdata = XGBE_GET_DESC_DATA(ring, cur_index);
-+
-+	if (tso) {
-+		DBGPR("  TSO packet\n");
-+
-+		/* Map the TSO header */
-+		skb_dma = dma_map_single(pdata->dev, skb->data,
-+					 packet->header_len, DMA_TO_DEVICE);
-+		if (dma_mapping_error(pdata->dev, skb_dma)) {
-+			netdev_alert(pdata->netdev, "dma_map_single failed\n");
-+			goto err_out;
-+		}
-+		rdata->skb_dma = skb_dma;
-+		rdata->skb_dma_len = packet->header_len;
-+
-+		offset = packet->header_len;
-+
-+		packet->length += packet->header_len;
-+
-+		cur_index++;
-+		rdata = XGBE_GET_DESC_DATA(ring, cur_index);
-+	}
-+
-+	/* Map the (remainder of the) packet */
-+	for (datalen = skb_headlen(skb) - offset; datalen; ) {
-+		len = min_t(unsigned int, datalen, XGBE_TX_MAX_BUF_SIZE);
-+
-+		skb_dma = dma_map_single(pdata->dev, skb->data + offset, len,
-+					 DMA_TO_DEVICE);
-+		if (dma_mapping_error(pdata->dev, skb_dma)) {
-+			netdev_alert(pdata->netdev, "dma_map_single failed\n");
-+			goto err_out;
-+		}
-+		rdata->skb_dma = skb_dma;
-+		rdata->skb_dma_len = len;
-+		DBGPR("  skb data: index=%u, dma=0x%llx, len=%u\n",
-+		      cur_index, skb_dma, len);
-+
-+		datalen -= len;
-+		offset += len;
-+
-+		packet->length += len;
-+
-+		cur_index++;
-+		rdata = XGBE_GET_DESC_DATA(ring, cur_index);
-+	}
-+
-+	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
-+		DBGPR("  mapping frag %u\n", i);
-+
-+		frag = &skb_shinfo(skb)->frags[i];
-+		offset = 0;
-+
-+		for (datalen = skb_frag_size(frag); datalen; ) {
-+			len = min_t(unsigned int, datalen,
-+				    XGBE_TX_MAX_BUF_SIZE);
-+
-+			skb_dma = skb_frag_dma_map(pdata->dev, frag, offset,
-+						   len, DMA_TO_DEVICE);
-+			if (dma_mapping_error(pdata->dev, skb_dma)) {
-+				netdev_alert(pdata->netdev,
-+					     "skb_frag_dma_map failed\n");
-+				goto err_out;
-+			}
-+			rdata->skb_dma = skb_dma;
-+			rdata->skb_dma_len = len;
-+			rdata->mapped_as_page = 1;
-+			DBGPR("  skb data: index=%u, dma=0x%llx, len=%u\n",
-+			      cur_index, skb_dma, len);
-+
-+			datalen -= len;
-+			offset += len;
-+
-+			packet->length += len;
-+
-+			cur_index++;
-+			rdata = XGBE_GET_DESC_DATA(ring, cur_index);
-+		}
-+	}
-+
-+	/* Save the skb address in the last entry. We always have some data
-+	 * that has been mapped so rdata is always advanced past the last
-+	 * piece of mapped data - use the entry pointed to by cur_index - 1.
-+	 */
-+	rdata = XGBE_GET_DESC_DATA(ring, cur_index - 1);
-+	rdata->skb = skb;
-+
-+	/* Save the number of descriptor entries used */
-+	packet->rdesc_count = cur_index - start_index;
-+
-+	DBGPR("<--xgbe_map_tx_skb: count=%u\n", packet->rdesc_count);
-+
-+	return packet->rdesc_count;
-+
-+err_out:
-+	while (start_index < cur_index) {
-+		rdata = XGBE_GET_DESC_DATA(ring, start_index++);
-+		xgbe_unmap_rdata(pdata, rdata);
-+	}
-+
-+	DBGPR("<--xgbe_map_tx_skb: count=0\n");
-+
-+	return 0;
-+}
-+
-+void xgbe_a0_init_function_ptrs_desc(struct xgbe_desc_if *desc_if)
-+{
-+	DBGPR("-->xgbe_a0_init_function_ptrs_desc\n");
-+
-+	desc_if->alloc_ring_resources = xgbe_alloc_ring_resources;
-+	desc_if->free_ring_resources = xgbe_free_ring_resources;
-+	desc_if->map_tx_skb = xgbe_map_tx_skb;
-+	desc_if->map_rx_buffer = xgbe_map_rx_buffer;
-+	desc_if->unmap_rdata = xgbe_unmap_rdata;
-+	desc_if->wrapper_tx_desc_init = xgbe_wrapper_tx_descriptor_init;
-+	desc_if->wrapper_rx_desc_init = xgbe_wrapper_rx_descriptor_init;
-+
-+	DBGPR("<--xgbe_a0_init_function_ptrs_desc\n");
-+}
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-dev.c
-new file mode 100644
-index 0000000..2d88739
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-dev.c
-@@ -0,0 +1,2930 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/phy.h>
-+#include <linux/mdio.h>
-+#include <linux/clk.h>
-+#include <linux/bitrev.h>
-+#include <linux/crc32.h>
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata,
-+				      unsigned int usec)
-+{
-+	unsigned long rate;
-+	unsigned int ret;
-+
-+	DBGPR("-->xgbe_usec_to_riwt\n");
-+
-+	rate = pdata->sysclk_rate;
-+
-+	/*
-+	 * Convert the input usec value to the watchdog timer value. Each
-+	 * watchdog timer value is equivalent to 256 clock cycles.
-+	 * Calculate the required value as:
-+	 *   ( usec * ( system_clock_mhz / 10^6 ) / 256
-+	 */
-+	ret = (usec * (rate / 1000000)) / 256;
-+
-+	DBGPR("<--xgbe_usec_to_riwt\n");
-+
-+	return ret;
-+}
-+
-+static unsigned int xgbe_riwt_to_usec(struct xgbe_prv_data *pdata,
-+				      unsigned int riwt)
-+{
-+	unsigned long rate;
-+	unsigned int ret;
-+
-+	DBGPR("-->xgbe_riwt_to_usec\n");
-+
-+	rate = pdata->sysclk_rate;
-+
-+	/*
-+	 * Convert the input watchdog timer value to the usec value. Each
-+	 * watchdog timer value is equivalent to 256 clock cycles.
-+	 * Calculate the required value as:
-+	 *   ( riwt * 256 ) / ( system_clock_mhz / 10^6 )
-+	 */
-+	ret = (riwt * 256) / (rate / 1000000);
-+
-+	DBGPR("<--xgbe_riwt_to_usec\n");
-+
-+	return ret;
-+}
-+
-+static int xgbe_config_pblx8(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++)
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_CR, PBLX8,
-+				       pdata->pblx8);
-+
-+	return 0;
-+}
-+
-+static int xgbe_get_tx_pbl_val(struct xgbe_prv_data *pdata)
-+{
-+	return XGMAC_DMA_IOREAD_BITS(pdata->channel, DMA_CH_TCR, PBL);
-+}
-+
-+static int xgbe_config_tx_pbl_val(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, PBL,
-+				       pdata->tx_pbl);
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_get_rx_pbl_val(struct xgbe_prv_data *pdata)
-+{
-+	return XGMAC_DMA_IOREAD_BITS(pdata->channel, DMA_CH_RCR, PBL);
-+}
-+
-+static int xgbe_config_rx_pbl_val(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->rx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, PBL,
-+				       pdata->rx_pbl);
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_osp_mode(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, OSP,
-+				       pdata->tx_osp_mode);
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_rsf_mode(struct xgbe_prv_data *pdata, unsigned int val)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < pdata->rx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RSF, val);
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_tsf_mode(struct xgbe_prv_data *pdata, unsigned int val)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < pdata->tx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TSF, val);
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_rx_threshold(struct xgbe_prv_data *pdata,
-+				    unsigned int val)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < pdata->rx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RTC, val);
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_tx_threshold(struct xgbe_prv_data *pdata,
-+				    unsigned int val)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < pdata->tx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TTC, val);
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_rx_coalesce(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->rx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RIWT, RWT,
-+				       pdata->rx_riwt);
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_tx_coalesce(struct xgbe_prv_data *pdata)
-+{
-+	return 0;
-+}
-+
-+static void xgbe_config_rx_buffer_size(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->rx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, RBSZ,
-+				       pdata->rx_buf_size);
-+	}
-+}
-+
-+static void xgbe_config_tso_mode(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, TSE, 1);
-+	}
-+}
-+
-+static void xgbe_config_sph_mode(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->rx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_CR, SPH, 1);
-+	}
-+
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, HDSMS, XGBE_SPH_HDSMS_SIZE);
-+}
-+
-+static int xgbe_write_rss_reg(struct xgbe_prv_data *pdata, unsigned int type,
-+			      unsigned int index, unsigned int val)
-+{
-+	unsigned int wait;
-+	int ret = 0;
-+
-+	mutex_lock(&pdata->rss_mutex);
-+
-+	if (XGMAC_IOREAD_BITS(pdata, MAC_RSSAR, OB)) {
-+		ret = -EBUSY;
-+		goto unlock;
-+	}
-+
-+	XGMAC_IOWRITE(pdata, MAC_RSSDR, val);
-+
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, RSSIA, index);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, ADDRT, type);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, CT, 0);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, OB, 1);
-+
-+	wait = 1000;
-+	while (wait--) {
-+		if (!XGMAC_IOREAD_BITS(pdata, MAC_RSSAR, OB))
-+			goto unlock;
-+
-+		usleep_range(1000, 1500);
-+	}
-+
-+	ret = -EBUSY;
-+
-+unlock:
-+	mutex_unlock(&pdata->rss_mutex);
-+
-+	return ret;
-+}
-+
-+static int xgbe_write_rss_hash_key(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int key_regs = sizeof(pdata->rss_key) / sizeof(u32);
-+	unsigned int *key = (unsigned int *)&pdata->rss_key;
-+	int ret;
-+
-+	while (key_regs--) {
-+		ret = xgbe_write_rss_reg(pdata, XGBE_RSS_HASH_KEY_TYPE,
-+					 key_regs, *key++);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_write_rss_lookup_table(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int i;
-+	int ret;
-+
-+	for (i = 0; i < ARRAY_SIZE(pdata->rss_table); i++) {
-+		ret = xgbe_write_rss_reg(pdata,
-+					 XGBE_RSS_LOOKUP_TABLE_TYPE, i,
-+					 pdata->rss_table[i]);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_rss_hash_key(struct xgbe_prv_data *pdata, const u8 *key)
-+{
-+	memcpy(pdata->rss_key, key, sizeof(pdata->rss_key));
-+
-+	return xgbe_write_rss_hash_key(pdata);
-+}
-+
-+static int xgbe_set_rss_lookup_table(struct xgbe_prv_data *pdata,
-+				     const u32 *table)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(pdata->rss_table); i++)
-+		XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH, table[i]);
-+
-+	return xgbe_write_rss_lookup_table(pdata);
-+}
-+
-+static int xgbe_enable_rss(struct xgbe_prv_data *pdata)
-+{
-+	int ret;
-+
-+	if (!pdata->hw_feat.rss)
-+		return -EOPNOTSUPP;
-+
-+	/* Program the hash key */
-+	ret = xgbe_write_rss_hash_key(pdata);
-+	if (ret)
-+		return ret;
-+
-+	/* Program the lookup table */
-+	ret = xgbe_write_rss_lookup_table(pdata);
-+	if (ret)
-+		return ret;
-+
-+	/* Set the RSS options */
-+	XGMAC_IOWRITE(pdata, MAC_RSSCR, pdata->rss_options);
-+
-+	/* Enable RSS */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RSSCR, RSSE, 1);
-+
-+	return 0;
-+}
-+
-+static int xgbe_disable_rss(struct xgbe_prv_data *pdata)
-+{
-+	if (!pdata->hw_feat.rss)
-+		return -EOPNOTSUPP;
-+
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RSSCR, RSSE, 0);
-+
-+	return 0;
-+}
-+
-+static void xgbe_config_rss(struct xgbe_prv_data *pdata)
-+{
-+	int ret;
-+
-+	if (!pdata->hw_feat.rss)
-+		return;
-+
-+	if (pdata->netdev->features & NETIF_F_RXHASH)
-+		ret = xgbe_enable_rss(pdata);
-+	else
-+		ret = xgbe_disable_rss(pdata);
-+
-+	if (ret)
-+		netdev_err(pdata->netdev,
-+			   "error configuring RSS, RSS disabled\n");
-+}
-+
-+static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int max_q_count, q_count;
-+	unsigned int reg, reg_val;
-+	unsigned int i;
-+
-+	/* Clear MTL flow control */
-+	for (i = 0; i < pdata->rx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 0);
-+
-+	/* Clear MAC flow control */
-+	max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES;
-+	q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count);
-+	reg = MAC_Q0TFCR;
-+	for (i = 0; i < q_count; i++) {
-+		reg_val = XGMAC_IOREAD(pdata, reg);
-+		XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 0);
-+		XGMAC_IOWRITE(pdata, reg, reg_val);
-+
-+		reg += MAC_QTFCR_INC;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_enable_tx_flow_control(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int max_q_count, q_count;
-+	unsigned int reg, reg_val;
-+	unsigned int i;
-+
-+	/* Set MTL flow control */
-+	for (i = 0; i < pdata->rx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 1);
-+
-+	/* Set MAC flow control */
-+	max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES;
-+	q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count);
-+	reg = MAC_Q0TFCR;
-+	for (i = 0; i < q_count; i++) {
-+		reg_val = XGMAC_IOREAD(pdata, reg);
-+
-+		/* Enable transmit flow control */
-+		XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 1);
-+		/* Set pause time */
-+		XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, PT, 0xffff);
-+
-+		XGMAC_IOWRITE(pdata, reg, reg_val);
-+
-+		reg += MAC_QTFCR_INC;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_disable_rx_flow_control(struct xgbe_prv_data *pdata)
-+{
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, RFE, 0);
-+
-+	return 0;
-+}
-+
-+static int xgbe_enable_rx_flow_control(struct xgbe_prv_data *pdata)
-+{
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, RFE, 1);
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_tx_flow_control(struct xgbe_prv_data *pdata)
-+{
-+	struct ieee_pfc *pfc = pdata->pfc;
-+
-+	if (pdata->tx_pause || (pfc && pfc->pfc_en))
-+		xgbe_enable_tx_flow_control(pdata);
-+	else
-+		xgbe_disable_tx_flow_control(pdata);
-+
-+	return 0;
-+}
-+
-+static int xgbe_config_rx_flow_control(struct xgbe_prv_data *pdata)
-+{
-+	struct ieee_pfc *pfc = pdata->pfc;
-+
-+	if (pdata->rx_pause || (pfc && pfc->pfc_en))
-+		xgbe_enable_rx_flow_control(pdata);
-+	else
-+		xgbe_disable_rx_flow_control(pdata);
-+
-+	return 0;
-+}
-+
-+static void xgbe_config_flow_control(struct xgbe_prv_data *pdata)
-+{
-+	struct ieee_pfc *pfc = pdata->pfc;
-+
-+	xgbe_config_tx_flow_control(pdata);
-+	xgbe_config_rx_flow_control(pdata);
-+
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE,
-+			   (pfc && pfc->pfc_en) ? 1 : 0);
-+}
-+
-+static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int dma_ch_isr, dma_ch_ier;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		/* Clear all the interrupts which are set */
-+		dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);
-+		XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);
-+
-+		/* Clear all interrupt enable bits */
-+		dma_ch_ier = 0;
-+
-+		/* Enable following interrupts
-+		 *   NIE  - Normal Interrupt Summary Enable
-+		 *   AIE  - Abnormal Interrupt Summary Enable
-+		 *   FBEE - Fatal Bus Error Enable
-+		 */
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, NIE, 1);
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, AIE, 1);
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1);
-+
-+		if (channel->tx_ring) {
-+			/* Enable the following Tx interrupts
-+			 *   TIE  - Transmit Interrupt Enable (unless using
-+			 *          per channel interrupts)
-+			 */
-+			if (!pdata->per_channel_irq)
-+				XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);
-+		}
-+		if (channel->rx_ring) {
-+			/* Enable following Rx interrupts
-+			 *   RBUE - Receive Buffer Unavailable Enable
-+			 *   RIE  - Receive Interrupt Enable (unless using
-+			 *          per channel interrupts)
-+			 */
-+			XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);
-+			if (!pdata->per_channel_irq)
-+				XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);
-+		}
-+
-+		XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);
-+	}
-+}
-+
-+static void xgbe_enable_mtl_interrupts(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int mtl_q_isr;
-+	unsigned int q_count, i;
-+
-+	q_count = max(pdata->hw_feat.tx_q_cnt, pdata->hw_feat.rx_q_cnt);
-+	for (i = 0; i < q_count; i++) {
-+		/* Clear all the interrupts which are set */
-+		mtl_q_isr = XGMAC_MTL_IOREAD(pdata, i, MTL_Q_ISR);
-+		XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_ISR, mtl_q_isr);
-+
-+		/* No MTL interrupts to be enabled */
-+		XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_IER, 0);
-+	}
-+}
-+
-+static void xgbe_enable_mac_interrupts(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int mac_ier = 0;
-+
-+	/* Enable Timestamp interrupt */
-+	XGMAC_SET_BITS(mac_ier, MAC_IER, TSIE, 1);
-+
-+	XGMAC_IOWRITE(pdata, MAC_IER, mac_ier);
-+
-+	/* Enable all counter interrupts */
-+	XGMAC_IOWRITE_BITS(pdata, MMC_RIER, ALL_INTERRUPTS, 0xffffffff);
-+	XGMAC_IOWRITE_BITS(pdata, MMC_TIER, ALL_INTERRUPTS, 0xffffffff);
-+}
-+
-+static int xgbe_set_gmii_speed(struct xgbe_prv_data *pdata)
-+{
-+	if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x3)
-+		return 0;
-+
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x3);
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_gmii_2500_speed(struct xgbe_prv_data *pdata)
-+{
-+	if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x2)
-+		return 0;
-+
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x2);
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_xgmii_speed(struct xgbe_prv_data *pdata)
-+{
-+	if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0)
-+		return 0;
-+
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0);
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_promiscuous_mode(struct xgbe_prv_data *pdata,
-+				     unsigned int enable)
-+{
-+	unsigned int val = enable ? 1 : 0;
-+
-+	if (XGMAC_IOREAD_BITS(pdata, MAC_PFR, PR) == val)
-+		return 0;
-+
-+	DBGPR("  %s promiscuous mode\n", enable ? "entering" : "leaving");
-+	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, val);
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_all_multicast_mode(struct xgbe_prv_data *pdata,
-+				       unsigned int enable)
-+{
-+	unsigned int val = enable ? 1 : 0;
-+
-+	if (XGMAC_IOREAD_BITS(pdata, MAC_PFR, PM) == val)
-+		return 0;
-+
-+	DBGPR("  %s allmulti mode\n", enable ? "entering" : "leaving");
-+	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, val);
-+
-+	return 0;
-+}
-+
-+static void xgbe_set_mac_reg(struct xgbe_prv_data *pdata,
-+			     struct netdev_hw_addr *ha, unsigned int *mac_reg)
-+{
-+	unsigned int mac_addr_hi, mac_addr_lo;
-+	u8 *mac_addr;
-+
-+	mac_addr_lo = 0;
-+	mac_addr_hi = 0;
-+
-+	if (ha) {
-+		mac_addr = (u8 *)&mac_addr_lo;
-+		mac_addr[0] = ha->addr[0];
-+		mac_addr[1] = ha->addr[1];
-+		mac_addr[2] = ha->addr[2];
-+		mac_addr[3] = ha->addr[3];
-+		mac_addr = (u8 *)&mac_addr_hi;
-+		mac_addr[0] = ha->addr[4];
-+		mac_addr[1] = ha->addr[5];
-+
-+		DBGPR("  adding mac address %pM at 0x%04x\n", ha->addr,
-+		      *mac_reg);
-+
-+		XGMAC_SET_BITS(mac_addr_hi, MAC_MACA1HR, AE, 1);
-+	}
-+
-+	XGMAC_IOWRITE(pdata, *mac_reg, mac_addr_hi);
-+	*mac_reg += MAC_MACA_INC;
-+	XGMAC_IOWRITE(pdata, *mac_reg, mac_addr_lo);
-+	*mac_reg += MAC_MACA_INC;
-+}
-+
-+static void xgbe_set_mac_addn_addrs(struct xgbe_prv_data *pdata)
-+{
-+	struct net_device *netdev = pdata->netdev;
-+	struct netdev_hw_addr *ha;
-+	unsigned int mac_reg;
-+	unsigned int addn_macs;
-+
-+	mac_reg = MAC_MACA1HR;
-+	addn_macs = pdata->hw_feat.addn_mac;
-+
-+	if (netdev_uc_count(netdev) > addn_macs) {
-+		xgbe_set_promiscuous_mode(pdata, 1);
-+	} else {
-+		netdev_for_each_uc_addr(ha, netdev) {
-+			xgbe_set_mac_reg(pdata, ha, &mac_reg);
-+			addn_macs--;
-+		}
-+
-+		if (netdev_mc_count(netdev) > addn_macs) {
-+			xgbe_set_all_multicast_mode(pdata, 1);
-+		} else {
-+			netdev_for_each_mc_addr(ha, netdev) {
-+				xgbe_set_mac_reg(pdata, ha, &mac_reg);
-+				addn_macs--;
-+			}
-+		}
-+	}
-+
-+	/* Clear remaining additional MAC address entries */
-+	while (addn_macs--)
-+		xgbe_set_mac_reg(pdata, NULL, &mac_reg);
-+}
-+
-+static void xgbe_set_mac_hash_table(struct xgbe_prv_data *pdata)
-+{
-+	struct net_device *netdev = pdata->netdev;
-+	struct netdev_hw_addr *ha;
-+	unsigned int hash_reg;
-+	unsigned int hash_table_shift, hash_table_count;
-+	u32 hash_table[XGBE_MAC_HASH_TABLE_SIZE];
-+	u32 crc;
-+	unsigned int i;
-+
-+	hash_table_shift = 26 - (pdata->hw_feat.hash_table_size >> 7);
-+	hash_table_count = pdata->hw_feat.hash_table_size / 32;
-+	memset(hash_table, 0, sizeof(hash_table));
-+
-+	/* Build the MAC Hash Table register values */
-+	netdev_for_each_uc_addr(ha, netdev) {
-+		crc = bitrev32(~crc32_le(~0, ha->addr, ETH_ALEN));
-+		crc >>= hash_table_shift;
-+		hash_table[crc >> 5] |= (1 << (crc & 0x1f));
-+	}
-+
-+	netdev_for_each_mc_addr(ha, netdev) {
-+		crc = bitrev32(~crc32_le(~0, ha->addr, ETH_ALEN));
-+		crc >>= hash_table_shift;
-+		hash_table[crc >> 5] |= (1 << (crc & 0x1f));
-+	}
-+
-+	/* Set the MAC Hash Table registers */
-+	hash_reg = MAC_HTR0;
-+	for (i = 0; i < hash_table_count; i++) {
-+		XGMAC_IOWRITE(pdata, hash_reg, hash_table[i]);
-+		hash_reg += MAC_HTR_INC;
-+	}
-+}
-+
-+static int xgbe_add_mac_addresses(struct xgbe_prv_data *pdata)
-+{
-+	if (pdata->hw_feat.hash_table_size)
-+		xgbe_set_mac_hash_table(pdata);
-+	else
-+		xgbe_set_mac_addn_addrs(pdata);
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_mac_address(struct xgbe_prv_data *pdata, u8 *addr)
-+{
-+	unsigned int mac_addr_hi, mac_addr_lo;
-+
-+	mac_addr_hi = (addr[5] <<  8) | (addr[4] <<  0);
-+	mac_addr_lo = (addr[3] << 24) | (addr[2] << 16) |
-+		      (addr[1] <<  8) | (addr[0] <<  0);
-+
-+	XGMAC_IOWRITE(pdata, MAC_MACA0HR, mac_addr_hi);
-+	XGMAC_IOWRITE(pdata, MAC_MACA0LR, mac_addr_lo);
-+
-+	return 0;
-+}
-+
-+static int xgbe_read_mmd_regs(struct xgbe_prv_data *pdata, int prtad,
-+			      int mmd_reg)
-+{
-+	unsigned int mmd_address;
-+	int mmd_data;
-+
-+	if (mmd_reg & MII_ADDR_C45)
-+		mmd_address = mmd_reg & ~MII_ADDR_C45;
-+	else
-+		mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff);
-+
-+	/* The PCS implementation has reversed the devices in
-+	 * package registers so we need to change 05 to 06 and
-+	 * 06 to 05 if being read (these registers are readonly
-+	 * so no need to do this in the write function)
-+	 */
-+	if ((mmd_address & 0xffff) == 0x05)
-+		mmd_address = (mmd_address & ~0xffff) | 0x06;
-+	else if ((mmd_address & 0xffff) == 0x06)
-+		mmd_address = (mmd_address & ~0xffff) | 0x05;
-+
-+	/* The PCS registers are accessed using mmio. The underlying APB3
-+	 * management interface uses indirect addressing to access the MMD
-+	 * register sets. This requires accessing of the PCS register in two
-+	 * phases, an address phase and a data phase.
-+	 *
-+	 * The mmio interface is based on 32-bit offsets and values. All
-+	 * register offsets must therefore be adjusted by left shifting the
-+	 * offset 2 bits and reading 32 bits of data.
-+	 */
-+	mutex_lock(&pdata->xpcs_mutex);
-+	XPCS_IOWRITE(pdata, PCS_MMD_SELECT << 2, mmd_address >> 8);
-+	mmd_data = XPCS_IOREAD(pdata, (mmd_address & 0xff) << 2);
-+	mutex_unlock(&pdata->xpcs_mutex);
-+
-+	return mmd_data;
-+}
-+
-+static void xgbe_write_mmd_regs(struct xgbe_prv_data *pdata, int prtad,
-+				int mmd_reg, int mmd_data)
-+{
-+	unsigned int mmd_address;
-+
-+	if (mmd_reg & MII_ADDR_C45)
-+		mmd_address = mmd_reg & ~MII_ADDR_C45;
-+	else
-+		mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff);
-+
-+	/* If the PCS is changing modes, match the MAC speed to it */
-+	if (((mmd_address >> 16) == MDIO_MMD_PCS) &&
-+	    ((mmd_address & 0xffff) == MDIO_CTRL2)) {
-+		struct phy_device *phydev = pdata->phydev;
-+
-+		if (mmd_data & MDIO_PCS_CTRL2_TYPE) {
-+			/* KX mode */
-+			if (phydev->supported & SUPPORTED_1000baseKX_Full)
-+				xgbe_set_gmii_speed(pdata);
-+			else
-+				xgbe_set_gmii_2500_speed(pdata);
-+		} else {
-+			/* KR mode */
-+			xgbe_set_xgmii_speed(pdata);
-+		}
-+	}
-+
-+	/* The PCS registers are accessed using mmio. The underlying APB3
-+	 * management interface uses indirect addressing to access the MMD
-+	 * register sets. This requires accessing of the PCS register in two
-+	 * phases, an address phase and a data phase.
-+	 *
-+	 * The mmio interface is based on 32-bit offsets and values. All
-+	 * register offsets must therefore be adjusted by left shifting the
-+	 * offset 2 bits and reading 32 bits of data.
-+	 */
-+	mutex_lock(&pdata->xpcs_mutex);
-+	XPCS_IOWRITE(pdata, PCS_MMD_SELECT << 2, mmd_address >> 8);
-+	XPCS_IOWRITE(pdata, (mmd_address & 0xff) << 2, mmd_data);
-+	mutex_unlock(&pdata->xpcs_mutex);
-+}
-+
-+static int xgbe_tx_complete(struct xgbe_ring_desc *rdesc)
-+{
-+	return !XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN);
-+}
-+
-+static int xgbe_disable_rx_csum(struct xgbe_prv_data *pdata)
-+{
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 0);
-+
-+	return 0;
-+}
-+
-+static int xgbe_enable_rx_csum(struct xgbe_prv_data *pdata)
-+{
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 1);
-+
-+	return 0;
-+}
-+
-+static int xgbe_enable_rx_vlan_stripping(struct xgbe_prv_data *pdata)
-+{
-+	/* Put the VLAN tag in the Rx descriptor */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLRXS, 1);
-+
-+	/* Don't check the VLAN type */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, DOVLTC, 1);
-+
-+	/* Check only C-TAG (0x8100) packets */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERSVLM, 0);
-+
-+	/* Don't consider an S-TAG (0x88A8) packet as a VLAN packet */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ESVL, 0);
-+
-+	/* Enable VLAN tag stripping */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0x3);
-+
-+	return 0;
-+}
-+
-+static int xgbe_disable_rx_vlan_stripping(struct xgbe_prv_data *pdata)
-+{
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0);
-+
-+	return 0;
-+}
-+
-+static int xgbe_enable_rx_vlan_filtering(struct xgbe_prv_data *pdata)
-+{
-+	/* Enable VLAN filtering */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 1);
-+
-+	/* Enable VLAN Hash Table filtering */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTHM, 1);
-+
-+	/* Disable VLAN tag inverse matching */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTIM, 0);
-+
-+	/* Only filter on the lower 12-bits of the VLAN tag */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ETV, 1);
-+
-+	/* In order for the VLAN Hash Table filtering to be effective,
-+	 * the VLAN tag identifier in the VLAN Tag Register must not
-+	 * be zero.  Set the VLAN tag identifier to "1" to enable the
-+	 * VLAN Hash Table filtering.  This implies that a VLAN tag of
-+	 * 1 will always pass filtering.
-+	 */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VL, 1);
-+
-+	return 0;
-+}
-+
-+static int xgbe_disable_rx_vlan_filtering(struct xgbe_prv_data *pdata)
-+{
-+	/* Disable VLAN filtering */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 0);
-+
-+	return 0;
-+}
-+
-+#ifndef CRCPOLY_LE
-+#define CRCPOLY_LE 0xedb88320
-+#endif
-+static u32 xgbe_vid_crc32_le(__le16 vid_le)
-+{
-+	u32 poly = CRCPOLY_LE;
-+	u32 crc = ~0;
-+	u32 temp = 0;
-+	unsigned char *data = (unsigned char *)&vid_le;
-+	unsigned char data_byte = 0;
-+	int i, bits;
-+
-+	bits = get_bitmask_order(VLAN_VID_MASK);
-+	for (i = 0; i < bits; i++) {
-+		if ((i % 8) == 0)
-+			data_byte = data[i / 8];
-+
-+		temp = ((crc & 1) ^ data_byte) & 1;
-+		crc >>= 1;
-+		data_byte >>= 1;
-+
-+		if (temp)
-+			crc ^= poly;
-+	}
-+
-+	return crc;
-+}
-+
-+static int xgbe_update_vlan_hash_table(struct xgbe_prv_data *pdata)
-+{
-+	u32 crc;
-+	u16 vid;
-+	__le16 vid_le;
-+	u16 vlan_hash_table = 0;
-+
-+	/* Generate the VLAN Hash Table value */
-+	for_each_set_bit(vid, pdata->active_vlans, VLAN_N_VID) {
-+		/* Get the CRC32 value of the VLAN ID */
-+		vid_le = cpu_to_le16(vid);
-+		crc = bitrev32(~xgbe_vid_crc32_le(vid_le)) >> 28;
-+
-+		vlan_hash_table |= (1 << crc);
-+	}
-+
-+	/* Set the VLAN Hash Table filtering register */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANHTR, VLHT, vlan_hash_table);
-+
-+	return 0;
-+}
-+
-+static void xgbe_tx_desc_reset(struct xgbe_ring_data *rdata)
-+{
-+	struct xgbe_ring_desc *rdesc = rdata->rdesc;
-+
-+	/* Reset the Tx descriptor
-+	 *   Set buffer 1 (lo) address to zero
-+	 *   Set buffer 1 (hi) address to zero
-+	 *   Reset all other control bits (IC, TTSE, B2L & B1L)
-+	 *   Reset all other control bits (OWN, CTXT, FD, LD, CPC, CIC, etc)
-+	 */
-+	rdesc->desc0 = 0;
-+	rdesc->desc1 = 0;
-+	rdesc->desc2 = 0;
-+	rdesc->desc3 = 0;
-+
-+	/* Make sure ownership is written to the descriptor */
-+	wmb();
-+}
-+
-+static void xgbe_tx_desc_init(struct xgbe_channel *channel)
-+{
-+	struct xgbe_ring *ring = channel->tx_ring;
-+	struct xgbe_ring_data *rdata;
-+	int i;
-+	int start_index = ring->cur;
-+
-+	DBGPR("-->tx_desc_init\n");
-+
-+	/* Initialze all descriptors */
-+	for (i = 0; i < ring->rdesc_count; i++) {
-+		rdata = XGBE_GET_DESC_DATA(ring, i);
-+
-+		/* Initialize Tx descriptor */
-+		xgbe_tx_desc_reset(rdata);
-+	}
-+
-+	/* Update the total number of Tx descriptors */
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_TDRLR, ring->rdesc_count - 1);
-+
-+	/* Update the starting address of descriptor ring */
-+	rdata = XGBE_GET_DESC_DATA(ring, start_index);
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_HI,
-+			  upper_32_bits(rdata->rdesc_dma));
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_LO,
-+			  lower_32_bits(rdata->rdesc_dma));
-+
-+	DBGPR("<--tx_desc_init\n");
-+}
-+
-+static void xgbe_rx_desc_reset(struct xgbe_ring_data *rdata)
-+{
-+	struct xgbe_ring_desc *rdesc = rdata->rdesc;
-+
-+	/* Reset the Rx descriptor
-+	 *   Set buffer 1 (lo) address to header dma address (lo)
-+	 *   Set buffer 1 (hi) address to header dma address (hi)
-+	 *   Set buffer 2 (lo) address to buffer dma address (lo)
-+	 *   Set buffer 2 (hi) address to buffer dma address (hi) and
-+	 *     set control bits OWN and INTE
-+	 */
-+	rdesc->desc0 = cpu_to_le32(lower_32_bits(rdata->rx.hdr.dma));
-+	rdesc->desc1 = cpu_to_le32(upper_32_bits(rdata->rx.hdr.dma));
-+	rdesc->desc2 = cpu_to_le32(lower_32_bits(rdata->rx.buf.dma));
-+	rdesc->desc3 = cpu_to_le32(upper_32_bits(rdata->rx.buf.dma));
-+
-+	XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, INTE,
-+			  rdata->interrupt ? 1 : 0);
-+
-+	/* Since the Rx DMA engine is likely running, make sure everything
-+	 * is written to the descriptor(s) before setting the OWN bit
-+	 * for the descriptor
-+	 */
-+	wmb();
-+
-+	XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN, 1);
-+
-+	/* Make sure ownership is written to the descriptor */
-+	wmb();
-+}
-+
-+static void xgbe_rx_desc_init(struct xgbe_channel *channel)
-+{
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+	struct xgbe_ring *ring = channel->rx_ring;
-+	struct xgbe_ring_data *rdata;
-+	unsigned int start_index = ring->cur;
-+	unsigned int rx_coalesce, rx_frames;
-+	unsigned int i;
-+
-+	DBGPR("-->rx_desc_init\n");
-+
-+	rx_coalesce = (pdata->rx_riwt || pdata->rx_frames) ? 1 : 0;
-+	rx_frames = pdata->rx_frames;
-+
-+	/* Initialize all descriptors */
-+	for (i = 0; i < ring->rdesc_count; i++) {
-+		rdata = XGBE_GET_DESC_DATA(ring, i);
-+
-+		/* Set interrupt on completion bit as appropriate */
-+		if (rx_coalesce && (!rx_frames || ((i + 1) % rx_frames)))
-+			rdata->interrupt = 0;
-+		else
-+			rdata->interrupt = 1;
-+
-+		/* Initialize Rx descriptor */
-+		xgbe_rx_desc_reset(rdata);
-+	}
-+
-+	/* Update the total number of Rx descriptors */
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_RDRLR, ring->rdesc_count - 1);
-+
-+	/* Update the starting address of descriptor ring */
-+	rdata = XGBE_GET_DESC_DATA(ring, start_index);
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_HI,
-+			  upper_32_bits(rdata->rdesc_dma));
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_LO,
-+			  lower_32_bits(rdata->rdesc_dma));
-+
-+	/* Update the Rx Descriptor Tail Pointer */
-+	rdata = XGBE_GET_DESC_DATA(ring, start_index + ring->rdesc_count - 1);
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO,
-+			  lower_32_bits(rdata->rdesc_dma));
-+
-+	DBGPR("<--rx_desc_init\n");
-+}
-+
-+static void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata,
-+				      unsigned int addend)
-+{
-+	/* Set the addend register value and tell the device */
-+	XGMAC_IOWRITE(pdata, MAC_TSAR, addend);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1);
-+
-+	/* Wait for addend update to complete */
-+	while (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG))
-+		udelay(5);
-+}
-+
-+static void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,
-+				 unsigned int nsec)
-+{
-+	/* Set the time values and tell the device */
-+	XGMAC_IOWRITE(pdata, MAC_STSUR, sec);
-+	XGMAC_IOWRITE(pdata, MAC_STNUR, nsec);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1);
-+
-+	/* Wait for time update to complete */
-+	while (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT))
-+		udelay(5);
-+}
-+
-+static u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata)
-+{
-+	u64 nsec;
-+
-+	nsec = XGMAC_IOREAD(pdata, MAC_STSR);
-+	nsec *= NSEC_PER_SEC;
-+	nsec += XGMAC_IOREAD(pdata, MAC_STNR);
-+
-+	return nsec;
-+}
-+
-+static u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int tx_snr;
-+	u64 nsec;
-+
-+	tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR);
-+	if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS))
-+		return 0;
-+
-+	nsec = XGMAC_IOREAD(pdata, MAC_TXSSR);
-+	nsec *= NSEC_PER_SEC;
-+	nsec += tx_snr;
-+
-+	return nsec;
-+}
-+
-+static void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,
-+			       struct xgbe_ring_desc *rdesc)
-+{
-+	u64 nsec;
-+
-+	if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_CONTEXT_DESC3, TSA) &&
-+	    !XGMAC_GET_BITS_LE(rdesc->desc3, RX_CONTEXT_DESC3, TSD)) {
-+		nsec = le32_to_cpu(rdesc->desc1);
-+		nsec <<= 32;
-+		nsec |= le32_to_cpu(rdesc->desc0);
-+		if (nsec != 0xffffffffffffffffULL) {
-+			packet->rx_tstamp = nsec;
-+			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+				       RX_TSTAMP, 1);
-+		}
-+	}
-+}
-+
-+static int xgbe_config_tstamp(struct xgbe_prv_data *pdata,
-+			      unsigned int mac_tscr)
-+{
-+	/* Set one nano-second accuracy */
-+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1);
-+
-+	/* Set fine timestamp update */
-+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1);
-+
-+	/* Overwrite earlier timestamps */
-+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1);
-+
-+	XGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr);
-+
-+	/* Exit if timestamping is not enabled */
-+	if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA))
-+		return 0;
-+
-+	/* Initialize time registers */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC);
-+	xgbe_update_tstamp_addend(pdata, pdata->tstamp_addend);
-+	xgbe_set_tstamp_time(pdata, 0, 0);
-+
-+	/* Initialize the timecounter */
-+	timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc,
-+			 ktime_to_ns(ktime_get_real()));
-+
-+	return 0;
-+}
-+
-+static void xgbe_config_dcb_tc(struct xgbe_prv_data *pdata)
-+{
-+	struct ieee_ets *ets = pdata->ets;
-+	unsigned int total_weight, min_weight, weight;
-+	unsigned int i;
-+
-+	if (!ets)
-+		return;
-+
-+	/* Set Tx to deficit weighted round robin scheduling algorithm (when
-+	 * traffic class is using ETS algorithm)
-+	 */
-+	XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_DWRR);
-+
-+	/* Set Traffic Class algorithms */
-+	total_weight = pdata->netdev->mtu * pdata->hw_feat.tc_cnt;
-+	min_weight = total_weight / 100;
-+	if (!min_weight)
-+		min_weight = 1;
-+
-+	for (i = 0; i < pdata->hw_feat.tc_cnt; i++) {
-+		switch (ets->tc_tsa[i]) {
-+		case IEEE_8021QAZ_TSA_STRICT:
-+			DBGPR("  TC%u using SP\n", i);
-+			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA,
-+					       MTL_TSA_SP);
-+			break;
-+		case IEEE_8021QAZ_TSA_ETS:
-+			weight = total_weight * ets->tc_tx_bw[i] / 100;
-+			weight = clamp(weight, min_weight, total_weight);
-+
-+			DBGPR("  TC%u using DWRR (weight %u)\n", i, weight);
-+			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA,
-+					       MTL_TSA_ETS);
-+			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW,
-+					       weight);
-+			break;
-+		}
-+	}
-+}
-+
-+static void xgbe_config_dcb_pfc(struct xgbe_prv_data *pdata)
-+{
-+	struct ieee_pfc *pfc = pdata->pfc;
-+	struct ieee_ets *ets = pdata->ets;
-+	unsigned int mask, reg, reg_val;
-+	unsigned int tc, prio;
-+
-+	if (!pfc || !ets)
-+		return;
-+
-+	for (tc = 0; tc < pdata->hw_feat.tc_cnt; tc++) {
-+		mask = 0;
-+		for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; prio++) {
-+			if ((pfc->pfc_en & (1 << prio)) &&
-+			    (ets->prio_tc[prio] == tc))
-+				mask |= (1 << prio);
-+		}
-+		mask &= 0xff;
-+
-+		DBGPR("  TC%u PFC mask=%#x\n", tc, mask);
-+		reg = MTL_TCPM0R + (MTL_TCPM_INC * (tc / MTL_TCPM_TC_PER_REG));
-+		reg_val = XGMAC_IOREAD(pdata, reg);
-+
-+		reg_val &= ~(0xff << ((tc % MTL_TCPM_TC_PER_REG) << 3));
-+		reg_val |= (mask << ((tc % MTL_TCPM_TC_PER_REG) << 3));
-+
-+		XGMAC_IOWRITE(pdata, reg, reg_val);
-+	}
-+
-+	xgbe_config_flow_control(pdata);
-+}
-+
-+static void xgbe_tx_start_xmit(struct xgbe_channel *channel,
-+			       struct xgbe_ring *ring)
-+{
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+	struct xgbe_ring_data *rdata;
-+
-+	/* Issue a poll command to Tx DMA by writing address
-+	 * of next immediate free descriptor */
-+	rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_TDTR_LO,
-+			  lower_32_bits(rdata->rdesc_dma));
-+
-+	/* Start the Tx coalescing timer */
-+	if (pdata->tx_usecs && !channel->tx_timer_active) {
-+		channel->tx_timer_active = 1;
-+		hrtimer_start(&channel->tx_timer,
-+			      ktime_set(0, pdata->tx_usecs * NSEC_PER_USEC),
-+			      HRTIMER_MODE_REL);
-+	}
-+
-+	ring->tx.xmit_more = 0;
-+}
-+
-+static void xgbe_dev_xmit(struct xgbe_channel *channel)
-+{
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+	struct xgbe_ring *ring = channel->tx_ring;
-+	struct xgbe_ring_data *rdata;
-+	struct xgbe_ring_desc *rdesc;
-+	struct xgbe_packet_data *packet = &ring->packet_data;
-+	unsigned int csum, tso, vlan;
-+	unsigned int tso_context, vlan_context;
-+	unsigned int tx_set_ic;
-+	int start_index = ring->cur;
-+	int cur_index = ring->cur;
-+	int i;
-+
-+	DBGPR("-->xgbe_dev_xmit\n");
-+
-+	csum = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			      CSUM_ENABLE);
-+	tso = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			     TSO_ENABLE);
-+	vlan = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			      VLAN_CTAG);
-+
-+	if (tso && (packet->mss != ring->tx.cur_mss))
-+		tso_context = 1;
-+	else
-+		tso_context = 0;
-+
-+	if (vlan && (packet->vlan_ctag != ring->tx.cur_vlan_ctag))
-+		vlan_context = 1;
-+	else
-+		vlan_context = 0;
-+
-+	/* Determine if an interrupt should be generated for this Tx:
-+	 *   Interrupt:
-+	 *     - Tx frame count exceeds the frame count setting
-+	 *     - Addition of Tx frame count to the frame count since the
-+	 *       last interrupt was set exceeds the frame count setting
-+	 *   No interrupt:
-+	 *     - No frame count setting specified (ethtool -C ethX tx-frames 0)
-+	 *     - Addition of Tx frame count to the frame count since the
-+	 *       last interrupt was set does not exceed the frame count setting
-+	 */
-+	ring->coalesce_count += packet->tx_packets;
-+	if (!pdata->tx_frames)
-+		tx_set_ic = 0;
-+	else if (packet->tx_packets > pdata->tx_frames)
-+		tx_set_ic = 1;
-+	else if ((ring->coalesce_count % pdata->tx_frames) <
-+		 packet->tx_packets)
-+		tx_set_ic = 1;
-+	else
-+		tx_set_ic = 0;
-+
-+	rdata = XGBE_GET_DESC_DATA(ring, cur_index);
-+	rdesc = rdata->rdesc;
-+
-+	/* Create a context descriptor if this is a TSO packet */
-+	if (tso_context || vlan_context) {
-+		if (tso_context) {
-+			DBGPR("  TSO context descriptor, mss=%u\n",
-+			      packet->mss);
-+
-+			/* Set the MSS size */
-+			XGMAC_SET_BITS_LE(rdesc->desc2, TX_CONTEXT_DESC2,
-+					  MSS, packet->mss);
-+
-+			/* Mark it as a CONTEXT descriptor */
-+			XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3,
-+					  CTXT, 1);
-+
-+			/* Indicate this descriptor contains the MSS */
-+			XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3,
-+					  TCMSSV, 1);
-+
-+			ring->tx.cur_mss = packet->mss;
-+		}
-+
-+		if (vlan_context) {
-+			DBGPR("  VLAN context descriptor, ctag=%u\n",
-+			      packet->vlan_ctag);
-+
-+			/* Mark it as a CONTEXT descriptor */
-+			XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3,
-+					  CTXT, 1);
-+
-+			/* Set the VLAN tag */
-+			XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3,
-+					  VT, packet->vlan_ctag);
-+
-+			/* Indicate this descriptor contains the VLAN tag */
-+			XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3,
-+					  VLTV, 1);
-+
-+			ring->tx.cur_vlan_ctag = packet->vlan_ctag;
-+		}
-+
-+		cur_index++;
-+		rdata = XGBE_GET_DESC_DATA(ring, cur_index);
-+		rdesc = rdata->rdesc;
-+	}
-+
-+	/* Update buffer address (for TSO this is the header) */
-+	rdesc->desc0 =  cpu_to_le32(lower_32_bits(rdata->skb_dma));
-+	rdesc->desc1 =  cpu_to_le32(upper_32_bits(rdata->skb_dma));
-+
-+	/* Update the buffer length */
-+	XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, HL_B1L,
-+			  rdata->skb_dma_len);
-+
-+	/* VLAN tag insertion check */
-+	if (vlan)
-+		XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, VTIR,
-+				  TX_NORMAL_DESC2_VLAN_INSERT);
-+
-+	/* Timestamp enablement check */
-+	if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP))
-+		XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, TTSE, 1);
-+
-+	/* Mark it as First Descriptor */
-+	XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, FD, 1);
-+
-+	/* Mark it as a NORMAL descriptor */
-+	XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CTXT, 0);
-+
-+	/* Set OWN bit if not the first descriptor */
-+	if (cur_index != start_index)
-+		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1);
-+
-+	if (tso) {
-+		/* Enable TSO */
-+		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, TSE, 1);
-+		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, TCPPL,
-+				  packet->tcp_payload_len);
-+		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, TCPHDRLEN,
-+				  packet->tcp_header_len / 4);
-+	} else {
-+		/* Enable CRC and Pad Insertion */
-+		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CPC, 0);
-+
-+		/* Enable HW CSUM */
-+		if (csum)
-+			XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3,
-+					  CIC, 0x3);
-+
-+		/* Set the total length to be transmitted */
-+		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, FL,
-+				  packet->length);
-+	}
-+
-+	for (i = cur_index - start_index + 1; i < packet->rdesc_count; i++) {
-+		cur_index++;
-+		rdata = XGBE_GET_DESC_DATA(ring, cur_index);
-+		rdesc = rdata->rdesc;
-+
-+		/* Update buffer address */
-+		rdesc->desc0 = cpu_to_le32(lower_32_bits(rdata->skb_dma));
-+		rdesc->desc1 = cpu_to_le32(upper_32_bits(rdata->skb_dma));
-+
-+		/* Update the buffer length */
-+		XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, HL_B1L,
-+				  rdata->skb_dma_len);
-+
-+		/* Set OWN bit */
-+		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1);
-+
-+		/* Mark it as NORMAL descriptor */
-+		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CTXT, 0);
-+
-+		/* Enable HW CSUM */
-+		if (csum)
-+			XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3,
-+					  CIC, 0x3);
-+	}
-+
-+	/* Set LAST bit for the last descriptor */
-+	XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, LD, 1);
-+
-+	/* Set IC bit based on Tx coalescing settings */
-+	if (tx_set_ic)
-+		XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, IC, 1);
-+
-+	/* Save the Tx info to report back during cleanup */
-+	rdata->tx.packets = packet->tx_packets;
-+	rdata->tx.bytes = packet->tx_bytes;
-+
-+	/* In case the Tx DMA engine is running, make sure everything
-+	 * is written to the descriptor(s) before setting the OWN bit
-+	 * for the first descriptor
-+	 */
-+	wmb();
-+
-+	/* Set OWN bit for the first descriptor */
-+	rdata = XGBE_GET_DESC_DATA(ring, start_index);
-+	rdesc = rdata->rdesc;
-+	XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1);
-+
-+#ifdef XGMAC_ENABLE_TX_DESC_DUMP
-+	xgbe_a0_dump_tx_desc(ring, start_index, packet->rdesc_count, 1);
-+#endif
-+
-+	/* Make sure ownership is written to the descriptor */
-+	wmb();
-+
-+	ring->cur = cur_index + 1;
-+	if (!packet->skb->xmit_more ||
-+	    netif_xmit_stopped(netdev_get_tx_queue(pdata->netdev,
-+						   channel->queue_index)))
-+		xgbe_tx_start_xmit(channel, ring);
-+	else
-+		ring->tx.xmit_more = 1;
-+
-+	DBGPR("  %s: descriptors %u to %u written\n",
-+	      channel->name, start_index & (ring->rdesc_count - 1),
-+	      (ring->cur - 1) & (ring->rdesc_count - 1));
-+
-+	DBGPR("<--xgbe_dev_xmit\n");
-+}
-+
-+static int xgbe_dev_read(struct xgbe_channel *channel)
-+{
-+	struct xgbe_ring *ring = channel->rx_ring;
-+	struct xgbe_ring_data *rdata;
-+	struct xgbe_ring_desc *rdesc;
-+	struct xgbe_packet_data *packet = &ring->packet_data;
-+	struct net_device *netdev = channel->pdata->netdev;
-+	unsigned int err, etlt, l34t;
-+
-+	DBGPR("-->xgbe_dev_read: cur = %d\n", ring->cur);
-+
-+	rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
-+	rdesc = rdata->rdesc;
-+
-+	/* Check for data availability */
-+	if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN))
-+		return 1;
-+
-+	/* Make sure descriptor fields are read after reading the OWN bit */
-+	rmb();
-+
-+#ifdef XGMAC_ENABLE_RX_DESC_DUMP
-+	xgbe_a0_dump_rx_desc(ring, rdesc, ring->cur);
-+#endif
-+
-+	if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, CTXT)) {
-+		/* Timestamp Context Descriptor */
-+		xgbe_get_rx_tstamp(packet, rdesc);
-+
-+		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+			       CONTEXT, 1);
-+		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+			       CONTEXT_NEXT, 0);
-+		return 0;
-+	}
-+
-+	/* Normal Descriptor, be sure Context Descriptor bit is off */
-+	XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, CONTEXT, 0);
-+
-+	/* Indicate if a Context Descriptor is next */
-+	if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, CDA))
-+		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+			       CONTEXT_NEXT, 1);
-+
-+	/* Get the header length */
-+	if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, FD))
-+		rdata->rx.hdr_len = XGMAC_GET_BITS_LE(rdesc->desc2,
-+						      RX_NORMAL_DESC2, HL);
-+
-+	/* Get the RSS hash */
-+	if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, RSV)) {
-+		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+			       RSS_HASH, 1);
-+
-+		packet->rss_hash = le32_to_cpu(rdesc->desc1);
-+
-+		l34t = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, L34T);
-+		switch (l34t) {
-+		case RX_DESC3_L34T_IPV4_TCP:
-+		case RX_DESC3_L34T_IPV4_UDP:
-+		case RX_DESC3_L34T_IPV6_TCP:
-+		case RX_DESC3_L34T_IPV6_UDP:
-+			packet->rss_hash_type = PKT_HASH_TYPE_L4;
-+			break;
-+		default:
-+			packet->rss_hash_type = PKT_HASH_TYPE_L3;
-+		}
-+	}
-+
-+	/* Get the packet length */
-+	rdata->rx.len = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, PL);
-+
-+	if (!XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, LD)) {
-+		/* Not all the data has been transferred for this packet */
-+		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+			       INCOMPLETE, 1);
-+		return 0;
-+	}
-+
-+	/* This is the last of the data for this packet */
-+	XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+		       INCOMPLETE, 0);
-+
-+	/* Set checksum done indicator as appropriate */
-+	if (channel->pdata->netdev->features & NETIF_F_RXCSUM)
-+		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+			       CSUM_DONE, 1);
-+
-+	/* Check for errors (only valid in last descriptor) */
-+	err = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, ES);
-+	etlt = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, ETLT);
-+	DBGPR("  err=%u, etlt=%#x\n", err, etlt);
-+
-+	if (!err || !etlt) {
-+		/* No error if err is 0 or etlt is 0 */
-+		if ((etlt == 0x09) &&
-+		    (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
-+			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+				       VLAN_CTAG, 1);
-+			packet->vlan_ctag = XGMAC_GET_BITS_LE(rdesc->desc0,
-+							      RX_NORMAL_DESC0,
-+							      OVT);
-+			DBGPR("  vlan-ctag=0x%04x\n", packet->vlan_ctag);
-+		}
-+	} else {
-+		if ((etlt == 0x05) || (etlt == 0x06))
-+			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,
-+				       CSUM_DONE, 0);
-+		else
-+			XGMAC_SET_BITS(packet->errors, RX_PACKET_ERRORS,
-+				       FRAME, 1);
-+	}
-+
-+	DBGPR("<--xgbe_dev_read: %s - descriptor=%u (cur=%d)\n", channel->name,
-+	      ring->cur & (ring->rdesc_count - 1), ring->cur);
-+
-+	return 0;
-+}
-+
-+static int xgbe_is_context_desc(struct xgbe_ring_desc *rdesc)
-+{
-+	/* Rx and Tx share CTXT bit, so check TDES3.CTXT bit */
-+	return XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CTXT);
-+}
-+
-+static int xgbe_is_last_desc(struct xgbe_ring_desc *rdesc)
-+{
-+	/* Rx and Tx share LD bit, so check TDES3.LD bit */
-+	return XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, LD);
-+}
-+
-+static int xgbe_enable_int(struct xgbe_channel *channel,
-+			   enum xgbe_int int_id)
-+{
-+	unsigned int dma_ch_ier;
-+
-+	dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER);
-+
-+	switch (int_id) {
-+	case XGMAC_INT_DMA_CH_SR_TI:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_TPS:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 1);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_TBU:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 1);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_RI:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_RBU:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_RPS:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 1);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_TI_RI:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_FBE:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1);
-+		break;
-+	case XGMAC_INT_DMA_ALL:
-+		dma_ch_ier |= channel->saved_ier;
-+		break;
-+	default:
-+		return -1;
-+	}
-+
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);
-+
-+	return 0;
-+}
-+
-+static int xgbe_disable_int(struct xgbe_channel *channel,
-+			    enum xgbe_int int_id)
-+{
-+	unsigned int dma_ch_ier;
-+
-+	dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER);
-+
-+	switch (int_id) {
-+	case XGMAC_INT_DMA_CH_SR_TI:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_TPS:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 0);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_TBU:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 0);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_RI:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_RBU:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 0);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_RPS:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 0);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_TI_RI:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0);
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0);
-+		break;
-+	case XGMAC_INT_DMA_CH_SR_FBE:
-+		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 0);
-+		break;
-+	case XGMAC_INT_DMA_ALL:
-+		channel->saved_ier = dma_ch_ier & XGBE_DMA_INTERRUPT_MASK;
-+		dma_ch_ier &= ~XGBE_DMA_INTERRUPT_MASK;
-+		break;
-+	default:
-+		return -1;
-+	}
-+
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);
-+
-+	return 0;
-+}
-+
-+static int xgbe_exit(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int count = 2000;
-+
-+	DBGPR("-->xgbe_exit\n");
-+
-+	/* Issue a software reset */
-+	XGMAC_IOWRITE_BITS(pdata, DMA_MR, SWR, 1);
-+	usleep_range(10, 15);
-+
-+	/* Poll Until Poll Condition */
-+	while (count-- && XGMAC_IOREAD_BITS(pdata, DMA_MR, SWR))
-+		usleep_range(500, 600);
-+
-+	if (!count)
-+		return -EBUSY;
-+
-+	DBGPR("<--xgbe_exit\n");
-+
-+	return 0;
-+}
-+
-+static int xgbe_flush_tx_queues(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int i, count;
-+
-+	if (XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER) < 0x21)
-+		return 0;
-+
-+	for (i = 0; i < pdata->tx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, FTQ, 1);
-+
-+	/* Poll Until Poll Condition */
-+	for (i = 0; i < pdata->tx_q_count; i++) {
-+		count = 2000;
-+		while (count-- && XGMAC_MTL_IOREAD_BITS(pdata, i,
-+							MTL_Q_TQOMR, FTQ))
-+			usleep_range(500, 600);
-+
-+		if (!count)
-+			return -EBUSY;
-+	}
-+
-+	return 0;
-+}
-+
-+static void xgbe_config_dma_bus(struct xgbe_prv_data *pdata)
-+{
-+	/* Set enhanced addressing mode */
-+	XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, EAME, 1);
-+
-+	/* Set the System Bus mode */
-+	XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, UNDEF, 1);
-+	XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, BLEN_256, 1);
-+}
-+
-+static void xgbe_config_dma_cache(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int arcache, awcache;
-+
-+	arcache = 0;
-+	XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRC, pdata->arcache);
-+	XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRD, pdata->axdomain);
-+	XGMAC_SET_BITS(arcache, DMA_AXIARCR, TEC, pdata->arcache);
-+	XGMAC_SET_BITS(arcache, DMA_AXIARCR, TED, pdata->axdomain);
-+	XGMAC_SET_BITS(arcache, DMA_AXIARCR, THC, pdata->arcache);
-+	XGMAC_SET_BITS(arcache, DMA_AXIARCR, THD, pdata->axdomain);
-+	XGMAC_IOWRITE(pdata, DMA_AXIARCR, arcache);
-+
-+	awcache = 0;
-+	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWC, pdata->awcache);
-+	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWD, pdata->axdomain);
-+	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPC, pdata->awcache);
-+	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPD, pdata->axdomain);
-+	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHC, pdata->awcache);
-+	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHD, pdata->axdomain);
-+	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDC, pdata->awcache);
-+	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDD, pdata->axdomain);
-+	XGMAC_IOWRITE(pdata, DMA_AXIAWCR, awcache);
-+}
-+
-+static void xgbe_config_mtl_mode(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int i;
-+
-+	/* Set Tx to weighted round robin scheduling algorithm */
-+	XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_WRR);
-+
-+	/* Set Tx traffic classes to use WRR algorithm with equal weights */
-+	for (i = 0; i < pdata->hw_feat.tc_cnt; i++) {
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA,
-+				       MTL_TSA_ETS);
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW, 1);
-+	}
-+
-+	/* Set Rx to strict priority algorithm */
-+	XGMAC_IOWRITE_BITS(pdata, MTL_OMR, RAA, MTL_RAA_SP);
-+}
-+
-+static unsigned int xgbe_calculate_per_queue_fifo(unsigned int fifo_size,
-+						  unsigned int queue_count)
-+{
-+	unsigned int q_fifo_size = 0;
-+	enum xgbe_mtl_fifo_size p_fifo = XGMAC_MTL_FIFO_SIZE_256;
-+
-+	/* Calculate Tx/Rx fifo share per queue */
-+	switch (fifo_size) {
-+	case 0:
-+		q_fifo_size = XGBE_FIFO_SIZE_B(128);
-+		break;
-+	case 1:
-+		q_fifo_size = XGBE_FIFO_SIZE_B(256);
-+		break;
-+	case 2:
-+		q_fifo_size = XGBE_FIFO_SIZE_B(512);
-+		break;
-+	case 3:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(1);
-+		break;
-+	case 4:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(2);
-+		break;
-+	case 5:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(4);
-+		break;
-+	case 6:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(8);
-+		break;
-+	case 7:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(16);
-+		break;
-+	case 8:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(32);
-+		break;
-+	case 9:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(64);
-+		break;
-+	case 10:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(128);
-+		break;
-+	case 11:
-+		q_fifo_size = XGBE_FIFO_SIZE_KB(256);
-+		break;
-+	}
-+
-+	/* The configured value is not the actual amount of fifo RAM */
-+	q_fifo_size = min_t(unsigned int, XGBE_FIFO_MAX, q_fifo_size);
-+
-+	q_fifo_size = q_fifo_size / queue_count;
-+
-+	/* Set the queue fifo size programmable value */
-+	if (q_fifo_size >= XGBE_FIFO_SIZE_KB(256))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_256K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(128))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_128K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(64))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_64K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(32))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_32K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(16))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_16K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(8))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_8K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(4))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_4K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(2))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_2K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(1))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_1K;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_B(512))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_512;
-+	else if (q_fifo_size >= XGBE_FIFO_SIZE_B(256))
-+		p_fifo = XGMAC_MTL_FIFO_SIZE_256;
-+
-+	return p_fifo;
-+}
-+
-+static void xgbe_config_tx_fifo_size(struct xgbe_prv_data *pdata)
-+{
-+	enum xgbe_mtl_fifo_size fifo_size;
-+	unsigned int i;
-+
-+	fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.tx_fifo_size,
-+						  pdata->tx_q_count);
-+
-+	for (i = 0; i < pdata->tx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, fifo_size);
-+
-+	netdev_notice(pdata->netdev, "%d Tx queues, %d byte fifo per queue\n",
-+		      pdata->tx_q_count, ((fifo_size + 1) * 256));
-+}
-+
-+static void xgbe_config_rx_fifo_size(struct xgbe_prv_data *pdata)
-+{
-+	enum xgbe_mtl_fifo_size fifo_size;
-+	unsigned int i;
-+
-+	fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.rx_fifo_size,
-+						  pdata->rx_q_count);
-+
-+	for (i = 0; i < pdata->rx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RQS, fifo_size);
-+
-+	netdev_notice(pdata->netdev, "%d Rx queues, %d byte fifo per queue\n",
-+		      pdata->rx_q_count, ((fifo_size + 1) * 256));
-+}
-+
-+static void xgbe_config_queue_mapping(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int qptc, qptc_extra, queue;
-+	unsigned int prio_queues;
-+	unsigned int ppq, ppq_extra, prio;
-+	unsigned int mask;
-+	unsigned int i, j, reg, reg_val;
-+
-+	/* Map the MTL Tx Queues to Traffic Classes
-+	 *   Note: Tx Queues >= Traffic Classes
-+	 */
-+	qptc = pdata->tx_q_count / pdata->hw_feat.tc_cnt;
-+	qptc_extra = pdata->tx_q_count % pdata->hw_feat.tc_cnt;
-+
-+	for (i = 0, queue = 0; i < pdata->hw_feat.tc_cnt; i++) {
-+		for (j = 0; j < qptc; j++) {
-+			DBGPR("  TXq%u mapped to TC%u\n", queue, i);
-+			XGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR,
-+					       Q2TCMAP, i);
-+			pdata->q2tc_map[queue++] = i;
-+		}
-+
-+		if (i < qptc_extra) {
-+			DBGPR("  TXq%u mapped to TC%u\n", queue, i);
-+			XGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR,
-+					       Q2TCMAP, i);
-+			pdata->q2tc_map[queue++] = i;
-+		}
-+	}
-+
-+	/* Map the 8 VLAN priority values to available MTL Rx queues */
-+	prio_queues = min_t(unsigned int, IEEE_8021QAZ_MAX_TCS,
-+			    pdata->rx_q_count);
-+	ppq = IEEE_8021QAZ_MAX_TCS / prio_queues;
-+	ppq_extra = IEEE_8021QAZ_MAX_TCS % prio_queues;
-+
-+	reg = MAC_RQC2R;
-+	reg_val = 0;
-+	for (i = 0, prio = 0; i < prio_queues;) {
-+		mask = 0;
-+		for (j = 0; j < ppq; j++) {
-+			DBGPR("  PRIO%u mapped to RXq%u\n", prio, i);
-+			mask |= (1 << prio);
-+			pdata->prio2q_map[prio++] = i;
-+		}
-+
-+		if (i < ppq_extra) {
-+			DBGPR("  PRIO%u mapped to RXq%u\n", prio, i);
-+			mask |= (1 << prio);
-+			pdata->prio2q_map[prio++] = i;
-+		}
-+
-+		reg_val |= (mask << ((i++ % MAC_RQC2_Q_PER_REG) << 3));
-+
-+		if ((i % MAC_RQC2_Q_PER_REG) && (i != prio_queues))
-+			continue;
-+
-+		XGMAC_IOWRITE(pdata, reg, reg_val);
-+		reg += MAC_RQC2_INC;
-+		reg_val = 0;
-+	}
-+
-+	/* Select dynamic mapping of MTL Rx queue to DMA Rx channel */
-+	reg = MTL_RQDCM0R;
-+	reg_val = 0;
-+	for (i = 0; i < pdata->rx_q_count;) {
-+		reg_val |= (0x80 << ((i++ % MTL_RQDCM_Q_PER_REG) << 3));
-+
-+		if ((i % MTL_RQDCM_Q_PER_REG) && (i != pdata->rx_q_count))
-+			continue;
-+
-+		XGMAC_IOWRITE(pdata, reg, reg_val);
-+
-+		reg += MTL_RQDCM_INC;
-+		reg_val = 0;
-+	}
-+}
-+
-+static void xgbe_config_flow_control_threshold(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < pdata->rx_q_count; i++) {
-+		/* Activate flow control when less than 4k left in fifo */
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RFA, 2);
-+
-+		/* De-activate flow control when more than 6k left in fifo */
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RFD, 4);
-+	}
-+}
-+
-+static void xgbe_config_mac_address(struct xgbe_prv_data *pdata)
-+{
-+	xgbe_set_mac_address(pdata, pdata->netdev->dev_addr);
-+
-+	/* Filtering is done using perfect filtering and hash filtering */
-+	if (pdata->hw_feat.hash_table_size) {
-+		XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 1);
-+		XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 1);
-+		XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HMC, 1);
-+	}
-+}
-+
-+static void xgbe_config_jumbo_enable(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int val;
-+
-+	val = (pdata->netdev->mtu > XGMAC_STD_PACKET_MTU) ? 1 : 0;
-+
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val);
-+}
-+
-+static void xgbe_config_mac_speed(struct xgbe_prv_data *pdata)
-+{
-+	switch (pdata->phy_speed) {
-+	case SPEED_10000:
-+		xgbe_set_xgmii_speed(pdata);
-+		break;
-+
-+	case SPEED_2500:
-+		xgbe_set_gmii_2500_speed(pdata);
-+		break;
-+
-+	case SPEED_1000:
-+		xgbe_set_gmii_speed(pdata);
-+		break;
-+	}
-+}
-+
-+static void xgbe_config_checksum_offload(struct xgbe_prv_data *pdata)
-+{
-+	if (pdata->netdev->features & NETIF_F_RXCSUM)
-+		xgbe_enable_rx_csum(pdata);
-+	else
-+		xgbe_disable_rx_csum(pdata);
-+}
-+
-+static void xgbe_config_vlan_support(struct xgbe_prv_data *pdata)
-+{
-+	/* Indicate that VLAN Tx CTAGs come from context descriptors */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, CSVL, 0);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, VLTI, 1);
-+
-+	/* Set the current VLAN Hash Table register value */
-+	xgbe_update_vlan_hash_table(pdata);
-+
-+	if (pdata->netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)
-+		xgbe_enable_rx_vlan_filtering(pdata);
-+	else
-+		xgbe_disable_rx_vlan_filtering(pdata);
-+
-+	if (pdata->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
-+		xgbe_enable_rx_vlan_stripping(pdata);
-+	else
-+		xgbe_disable_rx_vlan_stripping(pdata);
-+}
-+
-+static u64 xgbe_mmc_read(struct xgbe_prv_data *pdata, unsigned int reg_lo)
-+{
-+	bool read_hi;
-+	u64 val;
-+
-+	switch (reg_lo) {
-+	/* These registers are always 64 bit */
-+	case MMC_TXOCTETCOUNT_GB_LO:
-+	case MMC_TXOCTETCOUNT_G_LO:
-+	case MMC_RXOCTETCOUNT_GB_LO:
-+	case MMC_RXOCTETCOUNT_G_LO:
-+		read_hi = true;
-+		break;
-+
-+	default:
-+		read_hi = false;
-+	};
-+
-+	val = XGMAC_IOREAD(pdata, reg_lo);
-+
-+	if (read_hi)
-+		val |= ((u64)XGMAC_IOREAD(pdata, reg_lo + 4) << 32);
-+
-+	return val;
-+}
-+
-+static void xgbe_tx_mmc_int(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_mmc_stats *stats = &pdata->mmc_stats;
-+	unsigned int mmc_isr = XGMAC_IOREAD(pdata, MMC_TISR);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXOCTETCOUNT_GB))
-+		stats->txoctetcount_gb +=
-+			xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXFRAMECOUNT_GB))
-+		stats->txframecount_gb +=
-+			xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXBROADCASTFRAMES_G))
-+		stats->txbroadcastframes_g +=
-+			xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_G_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXMULTICASTFRAMES_G))
-+		stats->txmulticastframes_g +=
-+			xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_G_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX64OCTETS_GB))
-+		stats->tx64octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_TX64OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX65TO127OCTETS_GB))
-+		stats->tx65to127octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_TX65TO127OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX128TO255OCTETS_GB))
-+		stats->tx128to255octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_TX128TO255OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX256TO511OCTETS_GB))
-+		stats->tx256to511octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_TX256TO511OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX512TO1023OCTETS_GB))
-+		stats->tx512to1023octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_TX512TO1023OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX1024TOMAXOCTETS_GB))
-+		stats->tx1024tomaxoctets_gb +=
-+			xgbe_mmc_read(pdata, MMC_TX1024TOMAXOCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXUNICASTFRAMES_GB))
-+		stats->txunicastframes_gb +=
-+			xgbe_mmc_read(pdata, MMC_TXUNICASTFRAMES_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXMULTICASTFRAMES_GB))
-+		stats->txmulticastframes_gb +=
-+			xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXBROADCASTFRAMES_GB))
-+		stats->txbroadcastframes_g +=
-+			xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXUNDERFLOWERROR))
-+		stats->txunderflowerror +=
-+			xgbe_mmc_read(pdata, MMC_TXUNDERFLOWERROR_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXOCTETCOUNT_G))
-+		stats->txoctetcount_g +=
-+			xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_G_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXFRAMECOUNT_G))
-+		stats->txframecount_g +=
-+			xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_G_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXPAUSEFRAMES))
-+		stats->txpauseframes +=
-+			xgbe_mmc_read(pdata, MMC_TXPAUSEFRAMES_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXVLANFRAMES_G))
-+		stats->txvlanframes_g +=
-+			xgbe_mmc_read(pdata, MMC_TXVLANFRAMES_G_LO);
-+}
-+
-+static void xgbe_rx_mmc_int(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_mmc_stats *stats = &pdata->mmc_stats;
-+	unsigned int mmc_isr = XGMAC_IOREAD(pdata, MMC_RISR);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXFRAMECOUNT_GB))
-+		stats->rxframecount_gb +=
-+			xgbe_mmc_read(pdata, MMC_RXFRAMECOUNT_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOCTETCOUNT_GB))
-+		stats->rxoctetcount_gb +=
-+			xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOCTETCOUNT_G))
-+		stats->rxoctetcount_g +=
-+			xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_G_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXBROADCASTFRAMES_G))
-+		stats->rxbroadcastframes_g +=
-+			xgbe_mmc_read(pdata, MMC_RXBROADCASTFRAMES_G_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXMULTICASTFRAMES_G))
-+		stats->rxmulticastframes_g +=
-+			xgbe_mmc_read(pdata, MMC_RXMULTICASTFRAMES_G_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXCRCERROR))
-+		stats->rxcrcerror +=
-+			xgbe_mmc_read(pdata, MMC_RXCRCERROR_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXRUNTERROR))
-+		stats->rxrunterror +=
-+			xgbe_mmc_read(pdata, MMC_RXRUNTERROR);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXJABBERERROR))
-+		stats->rxjabbererror +=
-+			xgbe_mmc_read(pdata, MMC_RXJABBERERROR);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXUNDERSIZE_G))
-+		stats->rxundersize_g +=
-+			xgbe_mmc_read(pdata, MMC_RXUNDERSIZE_G);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOVERSIZE_G))
-+		stats->rxoversize_g +=
-+			xgbe_mmc_read(pdata, MMC_RXOVERSIZE_G);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX64OCTETS_GB))
-+		stats->rx64octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_RX64OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX65TO127OCTETS_GB))
-+		stats->rx65to127octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_RX65TO127OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX128TO255OCTETS_GB))
-+		stats->rx128to255octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_RX128TO255OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX256TO511OCTETS_GB))
-+		stats->rx256to511octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_RX256TO511OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX512TO1023OCTETS_GB))
-+		stats->rx512to1023octets_gb +=
-+			xgbe_mmc_read(pdata, MMC_RX512TO1023OCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX1024TOMAXOCTETS_GB))
-+		stats->rx1024tomaxoctets_gb +=
-+			xgbe_mmc_read(pdata, MMC_RX1024TOMAXOCTETS_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXUNICASTFRAMES_G))
-+		stats->rxunicastframes_g +=
-+			xgbe_mmc_read(pdata, MMC_RXUNICASTFRAMES_G_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXLENGTHERROR))
-+		stats->rxlengtherror +=
-+			xgbe_mmc_read(pdata, MMC_RXLENGTHERROR_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOUTOFRANGETYPE))
-+		stats->rxoutofrangetype +=
-+			xgbe_mmc_read(pdata, MMC_RXOUTOFRANGETYPE_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXPAUSEFRAMES))
-+		stats->rxpauseframes +=
-+			xgbe_mmc_read(pdata, MMC_RXPAUSEFRAMES_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXFIFOOVERFLOW))
-+		stats->rxfifooverflow +=
-+			xgbe_mmc_read(pdata, MMC_RXFIFOOVERFLOW_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXVLANFRAMES_GB))
-+		stats->rxvlanframes_gb +=
-+			xgbe_mmc_read(pdata, MMC_RXVLANFRAMES_GB_LO);
-+
-+	if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXWATCHDOGERROR))
-+		stats->rxwatchdogerror +=
-+			xgbe_mmc_read(pdata, MMC_RXWATCHDOGERROR);
-+}
-+
-+static void xgbe_read_mmc_stats(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_mmc_stats *stats = &pdata->mmc_stats;
-+
-+	/* Freeze counters */
-+	XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 1);
-+
-+	stats->txoctetcount_gb +=
-+		xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_GB_LO);
-+
-+	stats->txframecount_gb +=
-+		xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_GB_LO);
-+
-+	stats->txbroadcastframes_g +=
-+		xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_G_LO);
-+
-+	stats->txmulticastframes_g +=
-+		xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_G_LO);
-+
-+	stats->tx64octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_TX64OCTETS_GB_LO);
-+
-+	stats->tx65to127octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_TX65TO127OCTETS_GB_LO);
-+
-+	stats->tx128to255octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_TX128TO255OCTETS_GB_LO);
-+
-+	stats->tx256to511octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_TX256TO511OCTETS_GB_LO);
-+
-+	stats->tx512to1023octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_TX512TO1023OCTETS_GB_LO);
-+
-+	stats->tx1024tomaxoctets_gb +=
-+		xgbe_mmc_read(pdata, MMC_TX1024TOMAXOCTETS_GB_LO);
-+
-+	stats->txunicastframes_gb +=
-+		xgbe_mmc_read(pdata, MMC_TXUNICASTFRAMES_GB_LO);
-+
-+	stats->txmulticastframes_gb +=
-+		xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_GB_LO);
-+
-+	stats->txbroadcastframes_g +=
-+		xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_GB_LO);
-+
-+	stats->txunderflowerror +=
-+		xgbe_mmc_read(pdata, MMC_TXUNDERFLOWERROR_LO);
-+
-+	stats->txoctetcount_g +=
-+		xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_G_LO);
-+
-+	stats->txframecount_g +=
-+		xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_G_LO);
-+
-+	stats->txpauseframes +=
-+		xgbe_mmc_read(pdata, MMC_TXPAUSEFRAMES_LO);
-+
-+	stats->txvlanframes_g +=
-+		xgbe_mmc_read(pdata, MMC_TXVLANFRAMES_G_LO);
-+
-+	stats->rxframecount_gb +=
-+		xgbe_mmc_read(pdata, MMC_RXFRAMECOUNT_GB_LO);
-+
-+	stats->rxoctetcount_gb +=
-+		xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_GB_LO);
-+
-+	stats->rxoctetcount_g +=
-+		xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_G_LO);
-+
-+	stats->rxbroadcastframes_g +=
-+		xgbe_mmc_read(pdata, MMC_RXBROADCASTFRAMES_G_LO);
-+
-+	stats->rxmulticastframes_g +=
-+		xgbe_mmc_read(pdata, MMC_RXMULTICASTFRAMES_G_LO);
-+
-+	stats->rxcrcerror +=
-+		xgbe_mmc_read(pdata, MMC_RXCRCERROR_LO);
-+
-+	stats->rxrunterror +=
-+		xgbe_mmc_read(pdata, MMC_RXRUNTERROR);
-+
-+	stats->rxjabbererror +=
-+		xgbe_mmc_read(pdata, MMC_RXJABBERERROR);
-+
-+	stats->rxundersize_g +=
-+		xgbe_mmc_read(pdata, MMC_RXUNDERSIZE_G);
-+
-+	stats->rxoversize_g +=
-+		xgbe_mmc_read(pdata, MMC_RXOVERSIZE_G);
-+
-+	stats->rx64octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_RX64OCTETS_GB_LO);
-+
-+	stats->rx65to127octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_RX65TO127OCTETS_GB_LO);
-+
-+	stats->rx128to255octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_RX128TO255OCTETS_GB_LO);
-+
-+	stats->rx256to511octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_RX256TO511OCTETS_GB_LO);
-+
-+	stats->rx512to1023octets_gb +=
-+		xgbe_mmc_read(pdata, MMC_RX512TO1023OCTETS_GB_LO);
-+
-+	stats->rx1024tomaxoctets_gb +=
-+		xgbe_mmc_read(pdata, MMC_RX1024TOMAXOCTETS_GB_LO);
-+
-+	stats->rxunicastframes_g +=
-+		xgbe_mmc_read(pdata, MMC_RXUNICASTFRAMES_G_LO);
-+
-+	stats->rxlengtherror +=
-+		xgbe_mmc_read(pdata, MMC_RXLENGTHERROR_LO);
-+
-+	stats->rxoutofrangetype +=
-+		xgbe_mmc_read(pdata, MMC_RXOUTOFRANGETYPE_LO);
-+
-+	stats->rxpauseframes +=
-+		xgbe_mmc_read(pdata, MMC_RXPAUSEFRAMES_LO);
-+
-+	stats->rxfifooverflow +=
-+		xgbe_mmc_read(pdata, MMC_RXFIFOOVERFLOW_LO);
-+
-+	stats->rxvlanframes_gb +=
-+		xgbe_mmc_read(pdata, MMC_RXVLANFRAMES_GB_LO);
-+
-+	stats->rxwatchdogerror +=
-+		xgbe_mmc_read(pdata, MMC_RXWATCHDOGERROR);
-+
-+	/* Un-freeze counters */
-+	XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 0);
-+}
-+
-+static void xgbe_config_mmc(struct xgbe_prv_data *pdata)
-+{
-+	/* Set counters to reset on read */
-+	XGMAC_IOWRITE_BITS(pdata, MMC_CR, ROR, 1);
-+
-+	/* Reset the counters */
-+	XGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1);
-+}
-+
-+static void xgbe_prepare_tx_stop(struct xgbe_prv_data *pdata,
-+				 struct xgbe_channel *channel)
-+{
-+	unsigned int tx_dsr, tx_pos, tx_qidx;
-+	unsigned int tx_status;
-+	unsigned long tx_timeout;
-+
-+	/* Calculate the status register to read and the position within */
-+	if (channel->queue_index < DMA_DSRX_FIRST_QUEUE) {
-+		tx_dsr = DMA_DSR0;
-+		tx_pos = (channel->queue_index * DMA_DSR_Q_WIDTH) +
-+			 DMA_DSR0_TPS_START;
-+	} else {
-+		tx_qidx = channel->queue_index - DMA_DSRX_FIRST_QUEUE;
-+
-+		tx_dsr = DMA_DSR1 + ((tx_qidx / DMA_DSRX_QPR) * DMA_DSRX_INC);
-+		tx_pos = ((tx_qidx % DMA_DSRX_QPR) * DMA_DSR_Q_WIDTH) +
-+			 DMA_DSRX_TPS_START;
-+	}
-+
-+	/* The Tx engine cannot be stopped if it is actively processing
-+	 * descriptors. Wait for the Tx engine to enter the stopped or
-+	 * suspended state.  Don't wait forever though...
-+	 */
-+	tx_timeout = jiffies + (XGBE_DMA_STOP_TIMEOUT * HZ);
-+	while (time_before(jiffies, tx_timeout)) {
-+		tx_status = XGMAC_IOREAD(pdata, tx_dsr);
-+		tx_status = GET_BITS(tx_status, tx_pos, DMA_DSR_TPS_WIDTH);
-+		if ((tx_status == DMA_TPS_STOPPED) ||
-+		    (tx_status == DMA_TPS_SUSPENDED))
-+			break;
-+
-+		usleep_range(500, 1000);
-+	}
-+
-+	if (!time_before(jiffies, tx_timeout))
-+		netdev_info(pdata->netdev,
-+			    "timed out waiting for Tx DMA channel %u to stop\n",
-+			    channel->queue_index);
-+}
-+
-+static void xgbe_enable_tx(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	/* Enable each Tx DMA channel */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 1);
-+	}
-+
-+	/* Enable each Tx queue */
-+	for (i = 0; i < pdata->tx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN,
-+				       MTL_Q_ENABLED);
-+
-+	/* Enable MAC Tx */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 1);
-+}
-+
-+static void xgbe_disable_tx(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	/* Prepare for Tx DMA channel stop */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		xgbe_prepare_tx_stop(pdata, channel);
-+	}
-+
-+	/* Disable MAC Tx */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0);
-+
-+	/* Disable each Tx queue */
-+	for (i = 0; i < pdata->tx_q_count; i++)
-+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN, 0);
-+
-+	/* Disable each Tx DMA channel */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 0);
-+	}
-+}
-+
-+static void xgbe_enable_rx(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int reg_val, i;
-+
-+	/* Enable each Rx DMA channel */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->rx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1);
-+	}
-+
-+	/* Enable each Rx queue */
-+	reg_val = 0;
-+	for (i = 0; i < pdata->rx_q_count; i++)
-+		reg_val |= (0x02 << (i << 1));
-+	XGMAC_IOWRITE(pdata, MAC_RQC0R, reg_val);
-+
-+	/* Enable MAC Rx */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, DCRCC, 1);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, CST, 1);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 1);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 1);
-+}
-+
-+static void xgbe_disable_rx(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	/* Disable MAC Rx */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, DCRCC, 0);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, CST, 0);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 0);
-+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 0);
-+
-+	/* Disable each Rx queue */
-+	XGMAC_IOWRITE(pdata, MAC_RQC0R, 0);
-+
-+	/* Disable each Rx DMA channel */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->rx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0);
-+	}
-+}
-+
-+static void xgbe_powerup_tx(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	/* Enable each Tx DMA channel */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 1);
-+	}
-+
-+	/* Enable MAC Tx */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 1);
-+}
-+
-+static void xgbe_powerdown_tx(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	/* Prepare for Tx DMA channel stop */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		xgbe_prepare_tx_stop(pdata, channel);
-+	}
-+
-+	/* Disable MAC Tx */
-+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0);
-+
-+	/* Disable each Tx DMA channel */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 0);
-+	}
-+}
-+
-+static void xgbe_powerup_rx(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	/* Enable each Rx DMA channel */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->rx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1);
-+	}
-+}
-+
-+static void xgbe_powerdown_rx(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	/* Disable each Rx DMA channel */
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->rx_ring)
-+			break;
-+
-+		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0);
-+	}
-+}
-+
-+static int xgbe_init(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_desc_if *desc_if = &pdata->desc_if;
-+	int ret;
-+
-+	DBGPR("-->xgbe_init\n");
-+
-+	/* Flush Tx queues */
-+	ret = xgbe_flush_tx_queues(pdata);
-+	if (ret)
-+		return ret;
-+
-+	/*
-+	 * Initialize DMA related features
-+	 */
-+	xgbe_config_dma_bus(pdata);
-+	xgbe_config_dma_cache(pdata);
-+	xgbe_config_osp_mode(pdata);
-+	xgbe_config_pblx8(pdata);
-+	xgbe_config_tx_pbl_val(pdata);
-+	xgbe_config_rx_pbl_val(pdata);
-+	xgbe_config_rx_coalesce(pdata);
-+	xgbe_config_tx_coalesce(pdata);
-+	xgbe_config_rx_buffer_size(pdata);
-+	xgbe_config_tso_mode(pdata);
-+	xgbe_config_sph_mode(pdata);
-+	xgbe_config_rss(pdata);
-+	desc_if->wrapper_tx_desc_init(pdata);
-+	desc_if->wrapper_rx_desc_init(pdata);
-+	xgbe_enable_dma_interrupts(pdata);
-+
-+	/*
-+	 * Initialize MTL related features
-+	 */
-+	xgbe_config_mtl_mode(pdata);
-+	xgbe_config_queue_mapping(pdata);
-+	xgbe_config_tsf_mode(pdata, pdata->tx_sf_mode);
-+	xgbe_config_rsf_mode(pdata, pdata->rx_sf_mode);
-+	xgbe_config_tx_threshold(pdata, pdata->tx_threshold);
-+	xgbe_config_rx_threshold(pdata, pdata->rx_threshold);
-+	xgbe_config_tx_fifo_size(pdata);
-+	xgbe_config_rx_fifo_size(pdata);
-+	xgbe_config_flow_control_threshold(pdata);
-+	/*TODO: Error Packet and undersized good Packet forwarding enable
-+		(FEP and FUP)
-+	 */
-+	xgbe_config_dcb_tc(pdata);
-+	xgbe_config_dcb_pfc(pdata);
-+	xgbe_enable_mtl_interrupts(pdata);
-+
-+	/*
-+	 * Initialize MAC related features
-+	 */
-+	xgbe_config_mac_address(pdata);
-+	xgbe_config_jumbo_enable(pdata);
-+	xgbe_config_flow_control(pdata);
-+	xgbe_config_mac_speed(pdata);
-+	xgbe_config_checksum_offload(pdata);
-+	xgbe_config_vlan_support(pdata);
-+	xgbe_config_mmc(pdata);
-+	xgbe_enable_mac_interrupts(pdata);
-+
-+	DBGPR("<--xgbe_init\n");
-+
-+	return 0;
-+}
-+
-+void xgbe_a0_init_function_ptrs_dev(struct xgbe_hw_if *hw_if)
-+{
-+	DBGPR("-->xgbe_a0_init_function_ptrs\n");
-+
-+	hw_if->tx_complete = xgbe_tx_complete;
-+
-+	hw_if->set_promiscuous_mode = xgbe_set_promiscuous_mode;
-+	hw_if->set_all_multicast_mode = xgbe_set_all_multicast_mode;
-+	hw_if->add_mac_addresses = xgbe_add_mac_addresses;
-+	hw_if->set_mac_address = xgbe_set_mac_address;
-+
-+	hw_if->enable_rx_csum = xgbe_enable_rx_csum;
-+	hw_if->disable_rx_csum = xgbe_disable_rx_csum;
-+
-+	hw_if->enable_rx_vlan_stripping = xgbe_enable_rx_vlan_stripping;
-+	hw_if->disable_rx_vlan_stripping = xgbe_disable_rx_vlan_stripping;
-+	hw_if->enable_rx_vlan_filtering = xgbe_enable_rx_vlan_filtering;
-+	hw_if->disable_rx_vlan_filtering = xgbe_disable_rx_vlan_filtering;
-+	hw_if->update_vlan_hash_table = xgbe_update_vlan_hash_table;
-+
-+	hw_if->read_mmd_regs = xgbe_read_mmd_regs;
-+	hw_if->write_mmd_regs = xgbe_write_mmd_regs;
-+
-+	hw_if->set_gmii_speed = xgbe_set_gmii_speed;
-+	hw_if->set_gmii_2500_speed = xgbe_set_gmii_2500_speed;
-+	hw_if->set_xgmii_speed = xgbe_set_xgmii_speed;
-+
-+	hw_if->enable_tx = xgbe_enable_tx;
-+	hw_if->disable_tx = xgbe_disable_tx;
-+	hw_if->enable_rx = xgbe_enable_rx;
-+	hw_if->disable_rx = xgbe_disable_rx;
-+
-+	hw_if->powerup_tx = xgbe_powerup_tx;
-+	hw_if->powerdown_tx = xgbe_powerdown_tx;
-+	hw_if->powerup_rx = xgbe_powerup_rx;
-+	hw_if->powerdown_rx = xgbe_powerdown_rx;
-+
-+	hw_if->dev_xmit = xgbe_dev_xmit;
-+	hw_if->dev_read = xgbe_dev_read;
-+	hw_if->enable_int = xgbe_enable_int;
-+	hw_if->disable_int = xgbe_disable_int;
-+	hw_if->init = xgbe_init;
-+	hw_if->exit = xgbe_exit;
-+
-+	/* Descriptor related Sequences have to be initialized here */
-+	hw_if->tx_desc_init = xgbe_tx_desc_init;
-+	hw_if->rx_desc_init = xgbe_rx_desc_init;
-+	hw_if->tx_desc_reset = xgbe_tx_desc_reset;
-+	hw_if->rx_desc_reset = xgbe_rx_desc_reset;
-+	hw_if->is_last_desc = xgbe_is_last_desc;
-+	hw_if->is_context_desc = xgbe_is_context_desc;
-+	hw_if->tx_start_xmit = xgbe_tx_start_xmit;
-+
-+	/* For FLOW ctrl */
-+	hw_if->config_tx_flow_control = xgbe_config_tx_flow_control;
-+	hw_if->config_rx_flow_control = xgbe_config_rx_flow_control;
-+
-+	/* For RX coalescing */
-+	hw_if->config_rx_coalesce = xgbe_config_rx_coalesce;
-+	hw_if->config_tx_coalesce = xgbe_config_tx_coalesce;
-+	hw_if->usec_to_riwt = xgbe_usec_to_riwt;
-+	hw_if->riwt_to_usec = xgbe_riwt_to_usec;
-+
-+	/* For RX and TX threshold config */
-+	hw_if->config_rx_threshold = xgbe_config_rx_threshold;
-+	hw_if->config_tx_threshold = xgbe_config_tx_threshold;
-+
-+	/* For RX and TX Store and Forward Mode config */
-+	hw_if->config_rsf_mode = xgbe_config_rsf_mode;
-+	hw_if->config_tsf_mode = xgbe_config_tsf_mode;
-+
-+	/* For TX DMA Operating on Second Frame config */
-+	hw_if->config_osp_mode = xgbe_config_osp_mode;
-+
-+	/* For RX and TX PBL config */
-+	hw_if->config_rx_pbl_val = xgbe_config_rx_pbl_val;
-+	hw_if->get_rx_pbl_val = xgbe_get_rx_pbl_val;
-+	hw_if->config_tx_pbl_val = xgbe_config_tx_pbl_val;
-+	hw_if->get_tx_pbl_val = xgbe_get_tx_pbl_val;
-+	hw_if->config_pblx8 = xgbe_config_pblx8;
-+
-+	/* For MMC statistics support */
-+	hw_if->tx_mmc_int = xgbe_tx_mmc_int;
-+	hw_if->rx_mmc_int = xgbe_rx_mmc_int;
-+	hw_if->read_mmc_stats = xgbe_read_mmc_stats;
-+
-+	/* For PTP config */
-+	hw_if->config_tstamp = xgbe_config_tstamp;
-+	hw_if->update_tstamp_addend = xgbe_update_tstamp_addend;
-+	hw_if->set_tstamp_time = xgbe_set_tstamp_time;
-+	hw_if->get_tstamp_time = xgbe_get_tstamp_time;
-+	hw_if->get_tx_tstamp = xgbe_get_tx_tstamp;
-+
-+	/* For Data Center Bridging config */
-+	hw_if->config_dcb_tc = xgbe_config_dcb_tc;
-+	hw_if->config_dcb_pfc = xgbe_config_dcb_pfc;
-+
-+	/* For Receive Side Scaling */
-+	hw_if->enable_rss = xgbe_enable_rss;
-+	hw_if->disable_rss = xgbe_disable_rss;
-+	hw_if->set_rss_hash_key = xgbe_set_rss_hash_key;
-+	hw_if->set_rss_lookup_table = xgbe_set_rss_lookup_table;
-+
-+	DBGPR("<--xgbe_a0_init_function_ptrs\n");
-+}
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-drv.c
-new file mode 100644
-index 0000000..ca4af9e
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-drv.c
-@@ -0,0 +1,2218 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/platform_device.h>
-+#include <linux/spinlock.h>
-+#include <linux/tcp.h>
-+#include <linux/if_vlan.h>
-+#include <net/busy_poll.h>
-+#include <linux/clk.h>
-+#include <linux/if_ether.h>
-+#include <linux/net_tstamp.h>
-+#include <linux/phy.h>
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+static int xgbe_one_poll(struct napi_struct *, int);
-+static int xgbe_all_poll(struct napi_struct *, int);
-+static void xgbe_set_rx_mode(struct net_device *);
-+
-+static int xgbe_alloc_channels(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel_mem, *channel;
-+	struct xgbe_ring *tx_ring, *rx_ring;
-+	unsigned int count, i;
-+	int ret = -ENOMEM;
-+
-+	count = max_t(unsigned int, pdata->tx_ring_count, pdata->rx_ring_count);
-+
-+	channel_mem = kcalloc(count, sizeof(struct xgbe_channel), GFP_KERNEL);
-+	if (!channel_mem)
-+		goto err_channel;
-+
-+	tx_ring = kcalloc(pdata->tx_ring_count, sizeof(struct xgbe_ring),
-+			  GFP_KERNEL);
-+	if (!tx_ring)
-+		goto err_tx_ring;
-+
-+	rx_ring = kcalloc(pdata->rx_ring_count, sizeof(struct xgbe_ring),
-+			  GFP_KERNEL);
-+	if (!rx_ring)
-+		goto err_rx_ring;
-+
-+	for (i = 0, channel = channel_mem; i < count; i++, channel++) {
-+		snprintf(channel->name, sizeof(channel->name), "channel-%d", i);
-+		channel->pdata = pdata;
-+		channel->queue_index = i;
-+		channel->dma_regs = pdata->xgmac_regs + DMA_CH_BASE +
-+				    (DMA_CH_INC * i);
-+
-+		if (pdata->per_channel_irq) {
-+			/* Get the DMA interrupt (offset 1) */
-+			ret = platform_get_irq(pdata->pdev, i + 1);
-+			if (ret < 0) {
-+				netdev_err(pdata->netdev,
-+					   "platform_get_irq %u failed\n",
-+					   i + 1);
-+				goto err_irq;
-+			}
-+
-+			channel->dma_irq = ret;
-+		}
-+
-+		if (i < pdata->tx_ring_count) {
-+			spin_lock_init(&tx_ring->lock);
-+			channel->tx_ring = tx_ring++;
-+		}
-+
-+		if (i < pdata->rx_ring_count) {
-+			spin_lock_init(&rx_ring->lock);
-+			channel->rx_ring = rx_ring++;
-+		}
-+
-+		DBGPR("  %s: queue=%u, dma_regs=%p, dma_irq=%d, tx=%p, rx=%p\n",
-+		      channel->name, channel->queue_index, channel->dma_regs,
-+		      channel->dma_irq, channel->tx_ring, channel->rx_ring);
-+	}
-+
-+	pdata->channel = channel_mem;
-+	pdata->channel_count = count;
-+
-+	return 0;
-+
-+err_irq:
-+	kfree(rx_ring);
-+
-+err_rx_ring:
-+	kfree(tx_ring);
-+
-+err_tx_ring:
-+	kfree(channel_mem);
-+
-+err_channel:
-+	return ret;
-+}
-+
-+static void xgbe_free_channels(struct xgbe_prv_data *pdata)
-+{
-+	if (!pdata->channel)
-+		return;
-+
-+	kfree(pdata->channel->rx_ring);
-+	kfree(pdata->channel->tx_ring);
-+	kfree(pdata->channel);
-+
-+	pdata->channel = NULL;
-+	pdata->channel_count = 0;
-+}
-+
-+static inline unsigned int xgbe_tx_avail_desc(struct xgbe_ring *ring)
-+{
-+	return (ring->rdesc_count - (ring->cur - ring->dirty));
-+}
-+
-+static inline unsigned int xgbe_rx_dirty_desc(struct xgbe_ring *ring)
-+{
-+	return (ring->cur - ring->dirty);
-+}
-+
-+static int xgbe_maybe_stop_tx_queue(struct xgbe_channel *channel,
-+				    struct xgbe_ring *ring, unsigned int count)
-+{
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+
-+	if (count > xgbe_tx_avail_desc(ring)) {
-+		DBGPR("  Tx queue stopped, not enough descriptors available\n");
-+		netif_stop_subqueue(pdata->netdev, channel->queue_index);
-+		ring->tx.queue_stopped = 1;
-+
-+		/* If we haven't notified the hardware because of xmit_more
-+		 * support, tell it now
-+		 */
-+		if (ring->tx.xmit_more)
-+			pdata->hw_if.tx_start_xmit(channel, ring);
-+
-+		return NETDEV_TX_BUSY;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu)
-+{
-+	unsigned int rx_buf_size;
-+
-+	if (mtu > XGMAC_JUMBO_PACKET_MTU) {
-+		netdev_alert(netdev, "MTU exceeds maximum supported value\n");
-+		return -EINVAL;
-+	}
-+
-+	rx_buf_size = mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
-+	rx_buf_size = clamp_val(rx_buf_size, XGBE_RX_MIN_BUF_SIZE, PAGE_SIZE);
-+
-+	rx_buf_size = (rx_buf_size + XGBE_RX_BUF_ALIGN - 1) &
-+		      ~(XGBE_RX_BUF_ALIGN - 1);
-+
-+	return rx_buf_size;
-+}
-+
-+static void xgbe_enable_rx_tx_ints(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_channel *channel;
-+	enum xgbe_int int_id;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (channel->tx_ring && channel->rx_ring)
-+			int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
-+		else if (channel->tx_ring)
-+			int_id = XGMAC_INT_DMA_CH_SR_TI;
-+		else if (channel->rx_ring)
-+			int_id = XGMAC_INT_DMA_CH_SR_RI;
-+		else
-+			continue;
-+
-+		hw_if->enable_int(channel, int_id);
-+	}
-+}
-+
-+static void xgbe_disable_rx_tx_ints(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_channel *channel;
-+	enum xgbe_int int_id;
-+	unsigned int i;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (channel->tx_ring && channel->rx_ring)
-+			int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
-+		else if (channel->tx_ring)
-+			int_id = XGMAC_INT_DMA_CH_SR_TI;
-+		else if (channel->rx_ring)
-+			int_id = XGMAC_INT_DMA_CH_SR_RI;
-+		else
-+			continue;
-+
-+		hw_if->disable_int(channel, int_id);
-+	}
-+}
-+
-+static irqreturn_t xgbe_isr(int irq, void *data)
-+{
-+	struct xgbe_prv_data *pdata = data;
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_channel *channel;
-+	unsigned int dma_isr, dma_ch_isr;
-+	unsigned int mac_isr, mac_tssr;
-+	unsigned int i;
-+
-+	/* The DMA interrupt status register also reports MAC and MTL
-+	 * interrupts. So for polling mode, we just need to check for
-+	 * this register to be non-zero
-+	 */
-+	dma_isr = XGMAC_IOREAD(pdata, DMA_ISR);
-+	if (!dma_isr)
-+		goto isr_done;
-+
-+	DBGPR("  DMA_ISR = %08x\n", dma_isr);
-+
-+	for (i = 0; i < pdata->channel_count; i++) {
-+		if (!(dma_isr & (1 << i)))
-+			continue;
-+
-+		channel = pdata->channel + i;
-+
-+		dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);
-+		DBGPR("  DMA_CH%u_ISR = %08x\n", i, dma_ch_isr);
-+
-+		/* The TI or RI interrupt bits may still be set even if using
-+		 * per channel DMA interrupts. Check to be sure those are not
-+		 * enabled before using the private data napi structure.
-+		 */
-+		if (!pdata->per_channel_irq &&
-+		    (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||
-+		     XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) {
-+			if (napi_schedule_prep(&pdata->napi)) {
-+				/* Disable Tx and Rx interrupts */
-+				xgbe_disable_rx_tx_ints(pdata);
-+
-+				/* Turn on polling */
-+				__napi_schedule(&pdata->napi);
-+			}
-+		}
-+
-+		/* Restart the device on a Fatal Bus Error */
-+		if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE))
-+			schedule_work(&pdata->restart_work);
-+
-+		/* Clear all interrupt signals */
-+		XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);
-+	}
-+
-+	if (XGMAC_GET_BITS(dma_isr, DMA_ISR, MACIS)) {
-+		mac_isr = XGMAC_IOREAD(pdata, MAC_ISR);
-+
-+		if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCTXIS))
-+			hw_if->tx_mmc_int(pdata);
-+
-+		if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCRXIS))
-+			hw_if->rx_mmc_int(pdata);
-+
-+		if (XGMAC_GET_BITS(mac_isr, MAC_ISR, TSIS)) {
-+			mac_tssr = XGMAC_IOREAD(pdata, MAC_TSSR);
-+
-+			if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) {
-+				/* Read Tx Timestamp to clear interrupt */
-+				pdata->tx_tstamp =
-+					hw_if->get_tx_tstamp(pdata);
-+				schedule_work(&pdata->tx_tstamp_work);
-+			}
-+		}
-+	}
-+
-+	DBGPR("  DMA_ISR = %08x\n", XGMAC_IOREAD(pdata, DMA_ISR));
-+
-+isr_done:
-+	return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t xgbe_dma_isr(int irq, void *data)
-+{
-+	struct xgbe_channel *channel = data;
-+
-+	/* Per channel DMA interrupts are enabled, so we use the per
-+	 * channel napi structure and not the private data napi structure
-+	 */
-+	if (napi_schedule_prep(&channel->napi)) {
-+		/* Disable Tx and Rx interrupts */
-+		disable_irq_nosync(channel->dma_irq);
-+
-+		/* Turn on polling */
-+		__napi_schedule(&channel->napi);
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static enum hrtimer_restart xgbe_tx_timer(struct hrtimer *timer)
-+{
-+	struct xgbe_channel *channel = container_of(timer,
-+						    struct xgbe_channel,
-+						    tx_timer);
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+	struct napi_struct *napi;
-+
-+	DBGPR("-->xgbe_tx_timer\n");
-+
-+	napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
-+
-+	if (napi_schedule_prep(napi)) {
-+		/* Disable Tx and Rx interrupts */
-+		if (pdata->per_channel_irq)
-+			disable_irq(channel->dma_irq);
-+		else
-+			xgbe_disable_rx_tx_ints(pdata);
-+
-+		/* Turn on polling */
-+		__napi_schedule(napi);
-+	}
-+
-+	channel->tx_timer_active = 0;
-+
-+	DBGPR("<--xgbe_tx_timer\n");
-+
-+	return HRTIMER_NORESTART;
-+}
-+
-+static void xgbe_init_tx_timers(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	DBGPR("-->xgbe_init_tx_timers\n");
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		DBGPR("  %s adding tx timer\n", channel->name);
-+		hrtimer_init(&channel->tx_timer, CLOCK_MONOTONIC,
-+			     HRTIMER_MODE_REL);
-+		channel->tx_timer.function = xgbe_tx_timer;
-+	}
-+
-+	DBGPR("<--xgbe_init_tx_timers\n");
-+}
-+
-+static void xgbe_stop_tx_timers(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	DBGPR("-->xgbe_stop_tx_timers\n");
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			break;
-+
-+		DBGPR("  %s deleting tx timer\n", channel->name);
-+		channel->tx_timer_active = 0;
-+		hrtimer_cancel(&channel->tx_timer);
-+	}
-+
-+	DBGPR("<--xgbe_stop_tx_timers\n");
-+}
-+
-+void xgbe_a0_get_all_hw_features(struct xgbe_prv_data *pdata)
-+{
-+	unsigned int mac_hfr0, mac_hfr1, mac_hfr2;
-+	struct xgbe_hw_features *hw_feat = &pdata->hw_feat;
-+
-+	DBGPR("-->xgbe_a0_get_all_hw_features\n");
-+
-+	mac_hfr0 = XGMAC_IOREAD(pdata, MAC_HWF0R);
-+	mac_hfr1 = XGMAC_IOREAD(pdata, MAC_HWF1R);
-+	mac_hfr2 = XGMAC_IOREAD(pdata, MAC_HWF2R);
-+
-+	memset(hw_feat, 0, sizeof(*hw_feat));
-+
-+	hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR);
-+
-+	/* Hardware feature register 0 */
-+	hw_feat->gmii        = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL);
-+	hw_feat->vlhash      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH);
-+	hw_feat->sma         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SMASEL);
-+	hw_feat->rwk         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RWKSEL);
-+	hw_feat->mgk         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MGKSEL);
-+	hw_feat->mmc         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MMCSEL);
-+	hw_feat->aoe         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, ARPOFFSEL);
-+	hw_feat->ts          = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSEL);
-+	hw_feat->eee         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, EEESEL);
-+	hw_feat->tx_coe      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TXCOESEL);
-+	hw_feat->rx_coe      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RXCOESEL);
-+	hw_feat->addn_mac    = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R,
-+					      ADDMACADRSEL);
-+	hw_feat->ts_src      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSTSSEL);
-+	hw_feat->sa_vlan_ins = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SAVLANINS);
-+
-+	/* Hardware feature register 1 */
-+	hw_feat->rx_fifo_size  = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
-+						RXFIFOSIZE);
-+	hw_feat->tx_fifo_size  = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
-+						TXFIFOSIZE);
-+	hw_feat->dcb           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DCBEN);
-+	hw_feat->sph           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, SPHEN);
-+	hw_feat->tso           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, TSOEN);
-+	hw_feat->dma_debug     = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DBGMEMA);
-+	hw_feat->rss           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, RSSEN);
-+	hw_feat->tc_cnt	       = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, NUMTC);
-+	hw_feat->hash_table_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
-+						  HASHTBLSZ);
-+	hw_feat->l3l4_filter_num = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
-+						  L3L4FNUM);
-+
-+	/* Hardware feature register 2 */
-+	hw_feat->rx_q_cnt     = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXQCNT);
-+	hw_feat->tx_q_cnt     = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXQCNT);
-+	hw_feat->rx_ch_cnt    = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXCHCNT);
-+	hw_feat->tx_ch_cnt    = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXCHCNT);
-+	hw_feat->pps_out_num  = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM);
-+	hw_feat->aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM);
-+
-+	/* Translate the Hash Table size into actual number */
-+	switch (hw_feat->hash_table_size) {
-+	case 0:
-+		break;
-+	case 1:
-+		hw_feat->hash_table_size = 64;
-+		break;
-+	case 2:
-+		hw_feat->hash_table_size = 128;
-+		break;
-+	case 3:
-+		hw_feat->hash_table_size = 256;
-+		break;
-+	}
-+
-+	/* The Queue, Channel and TC counts are zero based so increment them
-+	 * to get the actual number
-+	 */
-+	hw_feat->rx_q_cnt++;
-+	hw_feat->tx_q_cnt++;
-+	hw_feat->rx_ch_cnt++;
-+	hw_feat->tx_ch_cnt++;
-+	hw_feat->tc_cnt++;
-+
-+#define XGBE_TC_CNT		2
-+	hw_feat->tc_cnt = XGBE_TC_CNT;
-+
-+	DBGPR("<--xgbe_a0_get_all_hw_features\n");
-+}
-+
-+static void xgbe_napi_enable(struct xgbe_prv_data *pdata, unsigned int add)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	if (pdata->per_channel_irq) {
-+		channel = pdata->channel;
-+		for (i = 0; i < pdata->channel_count; i++, channel++) {
-+			if (add)
-+				netif_napi_add(pdata->netdev, &channel->napi,
-+					       xgbe_one_poll, NAPI_POLL_WEIGHT);
-+
-+			napi_enable(&channel->napi);
-+		}
-+	} else {
-+		if (add)
-+			netif_napi_add(pdata->netdev, &pdata->napi,
-+				       xgbe_all_poll, NAPI_POLL_WEIGHT);
-+
-+		napi_enable(&pdata->napi);
-+	}
-+}
-+
-+static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	if (pdata->per_channel_irq) {
-+		channel = pdata->channel;
-+		for (i = 0; i < pdata->channel_count; i++, channel++) {
-+			napi_disable(&channel->napi);
-+
-+			if (del)
-+				netif_napi_del(&channel->napi);
-+		}
-+	} else {
-+		napi_disable(&pdata->napi);
-+
-+		if (del)
-+			netif_napi_del(&pdata->napi);
-+	}
-+}
-+
-+static int xgbe_request_irqs(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	struct net_device *netdev = pdata->netdev;
-+	unsigned int i;
-+	int ret;
-+
-+	ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0,
-+			       netdev->name, pdata);
-+	if (ret) {
-+		netdev_alert(netdev, "error requesting irq %d\n",
-+			     pdata->dev_irq);
-+		return ret;
-+	}
-+
-+	if (!pdata->per_channel_irq)
-+		return 0;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		snprintf(channel->dma_irq_name,
-+			 sizeof(channel->dma_irq_name) - 1,
-+			 "%s-TxRx-%u", netdev_name(netdev),
-+			 channel->queue_index);
-+
-+		ret = devm_request_irq(pdata->dev, channel->dma_irq,
-+				       xgbe_dma_isr, 0,
-+				       channel->dma_irq_name, channel);
-+		if (ret) {
-+			netdev_alert(netdev, "error requesting irq %d\n",
-+				     channel->dma_irq);
-+			goto err_irq;
-+		}
-+	}
-+
-+	return 0;
-+
-+err_irq:
-+	/* Using an unsigned int, 'i' will go to UINT_MAX and exit */
-+	for (i--, channel--; i < pdata->channel_count; i--, channel--)
-+		devm_free_irq(pdata->dev, channel->dma_irq, channel);
-+
-+	devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
-+
-+	return ret;
-+}
-+
-+static void xgbe_free_irqs(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
-+
-+	if (!pdata->per_channel_irq)
-+		return;
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++)
-+		devm_free_irq(pdata->dev, channel->dma_irq, channel);
-+}
-+
-+void xgbe_a0_init_tx_coalesce(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+
-+	DBGPR("-->xgbe_a0_init_tx_coalesce\n");
-+
-+	pdata->tx_usecs = XGMAC_INIT_DMA_TX_USECS;
-+	pdata->tx_frames = XGMAC_INIT_DMA_TX_FRAMES;
-+
-+	hw_if->config_tx_coalesce(pdata);
-+
-+	DBGPR("<--xgbe_a0_init_tx_coalesce\n");
-+}
-+
-+void xgbe_a0_init_rx_coalesce(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+
-+	DBGPR("-->xgbe_a0_init_rx_coalesce\n");
-+
-+	pdata->rx_riwt = hw_if->usec_to_riwt(pdata, XGMAC_INIT_DMA_RX_USECS);
-+	pdata->rx_frames = XGMAC_INIT_DMA_RX_FRAMES;
-+
-+	hw_if->config_rx_coalesce(pdata);
-+
-+	DBGPR("<--xgbe_a0_init_rx_coalesce\n");
-+}
-+
-+static void xgbe_free_tx_data(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_desc_if *desc_if = &pdata->desc_if;
-+	struct xgbe_channel *channel;
-+	struct xgbe_ring *ring;
-+	struct xgbe_ring_data *rdata;
-+	unsigned int i, j;
-+
-+	DBGPR("-->xgbe_free_tx_data\n");
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		ring = channel->tx_ring;
-+		if (!ring)
-+			break;
-+
-+		for (j = 0; j < ring->rdesc_count; j++) {
-+			rdata = XGBE_GET_DESC_DATA(ring, j);
-+			desc_if->unmap_rdata(pdata, rdata);
-+		}
-+	}
-+
-+	DBGPR("<--xgbe_free_tx_data\n");
-+}
-+
-+static void xgbe_free_rx_data(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_desc_if *desc_if = &pdata->desc_if;
-+	struct xgbe_channel *channel;
-+	struct xgbe_ring *ring;
-+	struct xgbe_ring_data *rdata;
-+	unsigned int i, j;
-+
-+	DBGPR("-->xgbe_free_rx_data\n");
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		ring = channel->rx_ring;
-+		if (!ring)
-+			break;
-+
-+		for (j = 0; j < ring->rdesc_count; j++) {
-+			rdata = XGBE_GET_DESC_DATA(ring, j);
-+			desc_if->unmap_rdata(pdata, rdata);
-+		}
-+	}
-+
-+	DBGPR("<--xgbe_free_rx_data\n");
-+}
-+
-+static void xgbe_adjust_link(struct net_device *netdev)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct phy_device *phydev = pdata->phydev;
-+	int new_state = 0;
-+
-+	if (!phydev)
-+		return;
-+
-+	if (phydev->link) {
-+		/* Flow control support */
-+		if (pdata->pause_autoneg) {
-+			if (phydev->pause || phydev->asym_pause) {
-+				pdata->tx_pause = 1;
-+				pdata->rx_pause = 1;
-+			} else {
-+				pdata->tx_pause = 0;
-+				pdata->rx_pause = 0;
-+			}
-+		}
-+
-+		if (pdata->tx_pause != pdata->phy_tx_pause) {
-+			hw_if->config_tx_flow_control(pdata);
-+			pdata->phy_tx_pause = pdata->tx_pause;
-+		}
-+
-+		if (pdata->rx_pause != pdata->phy_rx_pause) {
-+			hw_if->config_rx_flow_control(pdata);
-+			pdata->phy_rx_pause = pdata->rx_pause;
-+		}
-+
-+		/* Speed support */
-+		if (phydev->speed != pdata->phy_speed) {
-+			new_state = 1;
-+
-+			switch (phydev->speed) {
-+			case SPEED_10000:
-+				hw_if->set_xgmii_speed(pdata);
-+				break;
-+
-+			case SPEED_2500:
-+				hw_if->set_gmii_2500_speed(pdata);
-+				break;
-+
-+			case SPEED_1000:
-+				hw_if->set_gmii_speed(pdata);
-+				break;
-+			}
-+			pdata->phy_speed = phydev->speed;
-+		}
-+
-+		if (phydev->link != pdata->phy_link) {
-+			new_state = 1;
-+			pdata->phy_link = 1;
-+		}
-+	} else if (pdata->phy_link) {
-+		new_state = 1;
-+		pdata->phy_link = 0;
-+		pdata->phy_speed = SPEED_UNKNOWN;
-+	}
-+
-+	if (new_state)
-+		phy_print_status(phydev);
-+}
-+
-+static int xgbe_phy_init(struct xgbe_prv_data *pdata)
-+{
-+	struct net_device *netdev = pdata->netdev;
-+	struct phy_device *phydev = pdata->phydev;
-+	int ret;
-+
-+	pdata->phy_link = -1;
-+	pdata->phy_speed = SPEED_UNKNOWN;
-+	pdata->phy_tx_pause = pdata->tx_pause;
-+	pdata->phy_rx_pause = pdata->rx_pause;
-+
-+	ret = phy_connect_direct(netdev, phydev, &xgbe_adjust_link,
-+				 pdata->phy_mode);
-+	if (ret) {
-+		netdev_err(netdev, "phy_connect_direct failed\n");
-+		return ret;
-+	}
-+
-+	if (!phydev->drv || (phydev->drv->phy_id == 0)) {
-+		netdev_err(netdev, "phy_id not valid\n");
-+		ret = -ENODEV;
-+		goto err_phy_connect;
-+	}
-+	DBGPR("  phy_connect_direct succeeded for PHY %s, link=%d\n",
-+	      dev_name(&phydev->dev), phydev->link);
-+
-+	return 0;
-+
-+err_phy_connect:
-+	phy_disconnect(phydev);
-+
-+	return ret;
-+}
-+
-+static void xgbe_phy_exit(struct xgbe_prv_data *pdata)
-+{
-+	if (!pdata->phydev)
-+		return;
-+
-+	phy_disconnect(pdata->phydev);
-+}
-+
-+int xgbe_a0_powerdown(struct net_device *netdev, unsigned int caller)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	unsigned long flags;
-+
-+	DBGPR("-->xgbe_a0_powerdown\n");
-+
-+	if (!netif_running(netdev) ||
-+	    (caller == XGMAC_IOCTL_CONTEXT && pdata->power_down)) {
-+		netdev_alert(netdev, "Device is already powered down\n");
-+		DBGPR("<--xgbe_a0_powerdown\n");
-+		return -EINVAL;
-+	}
-+
-+	spin_lock_irqsave(&pdata->lock, flags);
-+
-+	if (caller == XGMAC_DRIVER_CONTEXT)
-+		netif_device_detach(netdev);
-+
-+	netif_tx_stop_all_queues(netdev);
-+
-+	hw_if->powerdown_tx(pdata);
-+	hw_if->powerdown_rx(pdata);
-+
-+	xgbe_napi_disable(pdata, 0);
-+
-+	phy_stop(pdata->phydev);
-+
-+	pdata->power_down = 1;
-+
-+	spin_unlock_irqrestore(&pdata->lock, flags);
-+
-+	DBGPR("<--xgbe_a0_powerdown\n");
-+
-+	return 0;
-+}
-+
-+int xgbe_a0_powerup(struct net_device *netdev, unsigned int caller)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	unsigned long flags;
-+
-+	DBGPR("-->xgbe_a0_powerup\n");
-+
-+	if (!netif_running(netdev) ||
-+	    (caller == XGMAC_IOCTL_CONTEXT && !pdata->power_down)) {
-+		netdev_alert(netdev, "Device is already powered up\n");
-+		DBGPR("<--xgbe_a0_powerup\n");
-+		return -EINVAL;
-+	}
-+
-+	spin_lock_irqsave(&pdata->lock, flags);
-+
-+	pdata->power_down = 0;
-+
-+	phy_start(pdata->phydev);
-+
-+	xgbe_napi_enable(pdata, 0);
-+
-+	hw_if->powerup_tx(pdata);
-+	hw_if->powerup_rx(pdata);
-+
-+	if (caller == XGMAC_DRIVER_CONTEXT)
-+		netif_device_attach(netdev);
-+
-+	netif_tx_start_all_queues(netdev);
-+
-+	spin_unlock_irqrestore(&pdata->lock, flags);
-+
-+	DBGPR("<--xgbe_a0_powerup\n");
-+
-+	return 0;
-+}
-+
-+static int xgbe_start(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct net_device *netdev = pdata->netdev;
-+	int ret;
-+
-+	DBGPR("-->xgbe_start\n");
-+
-+	xgbe_set_rx_mode(netdev);
-+
-+	hw_if->init(pdata);
-+
-+	phy_start(pdata->phydev);
-+
-+	xgbe_napi_enable(pdata, 1);
-+
-+	ret = xgbe_request_irqs(pdata);
-+	if (ret)
-+		goto err_napi;
-+
-+	hw_if->enable_tx(pdata);
-+	hw_if->enable_rx(pdata);
-+
-+	xgbe_init_tx_timers(pdata);
-+
-+	netif_tx_start_all_queues(netdev);
-+
-+	DBGPR("<--xgbe_start\n");
-+
-+	return 0;
-+
-+err_napi:
-+	xgbe_napi_disable(pdata, 1);
-+
-+	phy_stop(pdata->phydev);
-+
-+	hw_if->exit(pdata);
-+
-+	return ret;
-+}
-+
-+static void xgbe_stop(struct xgbe_prv_data *pdata)
-+{
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_channel *channel;
-+	struct net_device *netdev = pdata->netdev;
-+	struct netdev_queue *txq;
-+	unsigned int i;
-+
-+	DBGPR("-->xgbe_stop\n");
-+
-+	netif_tx_stop_all_queues(netdev);
-+
-+	xgbe_stop_tx_timers(pdata);
-+
-+	hw_if->disable_tx(pdata);
-+	hw_if->disable_rx(pdata);
-+
-+	xgbe_free_irqs(pdata);
-+
-+	xgbe_napi_disable(pdata, 1);
-+
-+	phy_stop(pdata->phydev);
-+
-+	hw_if->exit(pdata);
-+
-+	channel = pdata->channel;
-+	for (i = 0; i < pdata->channel_count; i++, channel++) {
-+		if (!channel->tx_ring)
-+			continue;
-+
-+		txq = netdev_get_tx_queue(netdev, channel->queue_index);
-+		netdev_tx_reset_queue(txq);
-+	}
-+
-+	DBGPR("<--xgbe_stop\n");
-+}
-+
-+static void xgbe_restart_dev(struct xgbe_prv_data *pdata)
-+{
-+	DBGPR("-->xgbe_restart_dev\n");
-+
-+	/* If not running, "restart" will happen on open */
-+	if (!netif_running(pdata->netdev))
-+		return;
-+
-+	xgbe_stop(pdata);
-+
-+	xgbe_free_tx_data(pdata);
-+	xgbe_free_rx_data(pdata);
-+
-+	xgbe_start(pdata);
-+
-+	DBGPR("<--xgbe_restart_dev\n");
-+}
-+
-+static void xgbe_restart(struct work_struct *work)
-+{
-+	struct xgbe_prv_data *pdata = container_of(work,
-+						   struct xgbe_prv_data,
-+						   restart_work);
-+
-+	rtnl_lock();
-+
-+	xgbe_restart_dev(pdata);
-+
-+	rtnl_unlock();
-+}
-+
-+static void xgbe_tx_tstamp(struct work_struct *work)
-+{
-+	struct xgbe_prv_data *pdata = container_of(work,
-+						   struct xgbe_prv_data,
-+						   tx_tstamp_work);
-+	struct skb_shared_hwtstamps hwtstamps;
-+	u64 nsec;
-+	unsigned long flags;
-+
-+	if (pdata->tx_tstamp) {
-+		nsec = timecounter_cyc2time(&pdata->tstamp_tc,
-+					    pdata->tx_tstamp);
-+
-+		memset(&hwtstamps, 0, sizeof(hwtstamps));
-+		hwtstamps.hwtstamp = ns_to_ktime(nsec);
-+		skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps);
-+	}
-+
-+	dev_kfree_skb_any(pdata->tx_tstamp_skb);
-+
-+	spin_lock_irqsave(&pdata->tstamp_lock, flags);
-+	pdata->tx_tstamp_skb = NULL;
-+	spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
-+}
-+
-+static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata,
-+				      struct ifreq *ifreq)
-+{
-+	if (copy_to_user(ifreq->ifr_data, &pdata->tstamp_config,
-+			 sizeof(pdata->tstamp_config)))
-+		return -EFAULT;
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata,
-+				      struct ifreq *ifreq)
-+{
-+	struct hwtstamp_config config;
-+	unsigned int mac_tscr;
-+
-+	if (copy_from_user(&config, ifreq->ifr_data, sizeof(config)))
-+		return -EFAULT;
-+
-+	if (config.flags)
-+		return -EINVAL;
-+
-+	mac_tscr = 0;
-+
-+	switch (config.tx_type) {
-+	case HWTSTAMP_TX_OFF:
-+		break;
-+
-+	case HWTSTAMP_TX_ON:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	default:
-+		return -ERANGE;
-+	}
-+
-+	switch (config.rx_filter) {
-+	case HWTSTAMP_FILTER_NONE:
-+		break;
-+
-+	case HWTSTAMP_FILTER_ALL:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* PTP v2, UDP, any kind of event packet */
-+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
-+	/* PTP v1, UDP, any kind of event packet */
-+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* PTP v2, UDP, Sync packet */
-+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
-+	/* PTP v1, UDP, Sync packet */
-+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* PTP v2, UDP, Delay_req packet */
-+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
-+	/* PTP v1, UDP, Delay_req packet */
-+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* 802.AS1, Ethernet, any kind of event packet */
-+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* 802.AS1, Ethernet, Sync packet */
-+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* 802.AS1, Ethernet, Delay_req packet */
-+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* PTP v2/802.AS1, any layer, any kind of event packet */
-+	case HWTSTAMP_FILTER_PTP_V2_EVENT:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* PTP v2/802.AS1, any layer, Sync packet */
-+	case HWTSTAMP_FILTER_PTP_V2_SYNC:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	/* PTP v2/802.AS1, any layer, Delay_req packet */
-+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
-+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
-+		break;
-+
-+	default:
-+		return -ERANGE;
-+	}
-+
-+	pdata->hw_if.config_tstamp(pdata, mac_tscr);
-+
-+	memcpy(&pdata->tstamp_config, &config, sizeof(config));
-+
-+	return 0;
-+}
-+
-+static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,
-+				struct sk_buff *skb,
-+				struct xgbe_packet_data *packet)
-+{
-+	unsigned long flags;
-+
-+	if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) {
-+		spin_lock_irqsave(&pdata->tstamp_lock, flags);
-+		if (pdata->tx_tstamp_skb) {
-+			/* Another timestamp in progress, ignore this one */
-+			XGMAC_SET_BITS(packet->attributes,
-+				       TX_PACKET_ATTRIBUTES, PTP, 0);
-+		} else {
-+			pdata->tx_tstamp_skb = skb_get(skb);
-+			skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
-+		}
-+		spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
-+	}
-+
-+	if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP))
-+		skb_tx_timestamp(skb);
-+}
-+
-+static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet)
-+{
-+	if (skb_vlan_tag_present(skb))
-+		packet->vlan_ctag = skb_vlan_tag_get(skb);
-+}
-+
-+static int xgbe_prep_tso(struct sk_buff *skb, struct xgbe_packet_data *packet)
-+{
-+	int ret;
-+
-+	if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			    TSO_ENABLE))
-+		return 0;
-+
-+	ret = skb_cow_head(skb, 0);
-+	if (ret)
-+		return ret;
-+
-+	packet->header_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
-+	packet->tcp_header_len = tcp_hdrlen(skb);
-+	packet->tcp_payload_len = skb->len - packet->header_len;
-+	packet->mss = skb_shinfo(skb)->gso_size;
-+	DBGPR("  packet->header_len=%u\n", packet->header_len);
-+	DBGPR("  packet->tcp_header_len=%u, packet->tcp_payload_len=%u\n",
-+	      packet->tcp_header_len, packet->tcp_payload_len);
-+	DBGPR("  packet->mss=%u\n", packet->mss);
-+
-+	/* Update the number of packets that will ultimately be transmitted
-+	 * along with the extra bytes for each extra packet
-+	 */
-+	packet->tx_packets = skb_shinfo(skb)->gso_segs;
-+	packet->tx_bytes += (packet->tx_packets - 1) * packet->header_len;
-+
-+	return 0;
-+}
-+
-+static int xgbe_is_tso(struct sk_buff *skb)
-+{
-+	if (skb->ip_summed != CHECKSUM_PARTIAL)
-+		return 0;
-+
-+	if (!skb_is_gso(skb))
-+		return 0;
-+
-+	DBGPR("  TSO packet to be processed\n");
-+
-+	return 1;
-+}
-+
-+static void xgbe_packet_info(struct xgbe_prv_data *pdata,
-+			     struct xgbe_ring *ring, struct sk_buff *skb,
-+			     struct xgbe_packet_data *packet)
-+{
-+	struct skb_frag_struct *frag;
-+	unsigned int context_desc;
-+	unsigned int len;
-+	unsigned int i;
-+
-+	packet->skb = skb;
-+
-+	context_desc = 0;
-+	packet->rdesc_count = 0;
-+
-+	packet->tx_packets = 1;
-+	packet->tx_bytes = skb->len;
-+
-+	if (xgbe_is_tso(skb)) {
-+		/* TSO requires an extra descriptor if mss is different */
-+		if (skb_shinfo(skb)->gso_size != ring->tx.cur_mss) {
-+			context_desc = 1;
-+			packet->rdesc_count++;
-+		}
-+
-+		/* TSO requires an extra descriptor for TSO header */
-+		packet->rdesc_count++;
-+
-+		XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			       TSO_ENABLE, 1);
-+		XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			       CSUM_ENABLE, 1);
-+	} else if (skb->ip_summed == CHECKSUM_PARTIAL)
-+		XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			       CSUM_ENABLE, 1);
-+
-+	if (skb_vlan_tag_present(skb)) {
-+		/* VLAN requires an extra descriptor if tag is different */
-+		if (skb_vlan_tag_get(skb) != ring->tx.cur_vlan_ctag)
-+			/* We can share with the TSO context descriptor */
-+			if (!context_desc) {
-+				context_desc = 1;
-+				packet->rdesc_count++;
-+			}
-+
-+		XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			       VLAN_CTAG, 1);
-+	}
-+
-+	if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
-+	    (pdata->tstamp_config.tx_type == HWTSTAMP_TX_ON))
-+		XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
-+			       PTP, 1);
-+
-+	for (len = skb_headlen(skb); len;) {
-+		packet->rdesc_count++;
-+		len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
-+	}
-+
-+	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
-+		frag = &skb_shinfo(skb)->frags[i];
-+		for (len = skb_frag_size(frag); len; ) {
-+			packet->rdesc_count++;
-+			len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
-+		}
-+	}
-+}
-+
-+static int xgbe_open(struct net_device *netdev)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_desc_if *desc_if = &pdata->desc_if;
-+	int ret;
-+
-+	DBGPR("-->xgbe_open\n");
-+
-+	/* Initialize the phy */
-+	ret = xgbe_phy_init(pdata);
-+	if (ret)
-+		return ret;
-+
-+	/* Enable the clocks */
-+	ret = clk_prepare_enable(pdata->sysclk);
-+	if (ret) {
-+		netdev_alert(netdev, "dma clk_prepare_enable failed\n");
-+		goto err_phy_init;
-+	}
-+
-+	ret = clk_prepare_enable(pdata->ptpclk);
-+	if (ret) {
-+		netdev_alert(netdev, "ptp clk_prepare_enable failed\n");
-+		goto err_sysclk;
-+	}
-+
-+	/* Calculate the Rx buffer size before allocating rings */
-+	ret = xgbe_calc_rx_buf_size(netdev, netdev->mtu);
-+	if (ret < 0)
-+		goto err_ptpclk;
-+	pdata->rx_buf_size = ret;
-+
-+	/* Allocate the channel and ring structures */
-+	ret = xgbe_alloc_channels(pdata);
-+	if (ret)
-+		goto err_ptpclk;
-+
-+	/* Allocate the ring descriptors and buffers */
-+	ret = desc_if->alloc_ring_resources(pdata);
-+	if (ret)
-+		goto err_channels;
-+
-+	/* Initialize the device restart and Tx timestamp work struct */
-+	INIT_WORK(&pdata->restart_work, xgbe_restart);
-+	INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp);
-+
-+	ret = xgbe_start(pdata);
-+	if (ret)
-+		goto err_rings;
-+
-+	DBGPR("<--xgbe_open\n");
-+
-+	return 0;
-+
-+err_rings:
-+	desc_if->free_ring_resources(pdata);
-+
-+err_channels:
-+	xgbe_free_channels(pdata);
-+
-+err_ptpclk:
-+	clk_disable_unprepare(pdata->ptpclk);
-+
-+err_sysclk:
-+	clk_disable_unprepare(pdata->sysclk);
-+
-+err_phy_init:
-+	xgbe_phy_exit(pdata);
-+
-+	return ret;
-+}
-+
-+static int xgbe_close(struct net_device *netdev)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_desc_if *desc_if = &pdata->desc_if;
-+
-+	DBGPR("-->xgbe_close\n");
-+
-+	/* Stop the device */
-+	xgbe_stop(pdata);
-+
-+	/* Free the ring descriptors and buffers */
-+	desc_if->free_ring_resources(pdata);
-+
-+	/* Free the channel and ring structures */
-+	xgbe_free_channels(pdata);
-+
-+	/* Disable the clocks */
-+	clk_disable_unprepare(pdata->ptpclk);
-+	clk_disable_unprepare(pdata->sysclk);
-+
-+	/* Release the phy */
-+	xgbe_phy_exit(pdata);
-+
-+	DBGPR("<--xgbe_close\n");
-+
-+	return 0;
-+}
-+
-+static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_desc_if *desc_if = &pdata->desc_if;
-+	struct xgbe_channel *channel;
-+	struct xgbe_ring *ring;
-+	struct xgbe_packet_data *packet;
-+	struct netdev_queue *txq;
-+	int ret;
-+
-+	DBGPR("-->xgbe_xmit: skb->len = %d\n", skb->len);
-+
-+	channel = pdata->channel + skb->queue_mapping;
-+	txq = netdev_get_tx_queue(netdev, channel->queue_index);
-+	ring = channel->tx_ring;
-+	packet = &ring->packet_data;
-+
-+	ret = NETDEV_TX_OK;
-+
-+	if (skb->len == 0) {
-+		netdev_err(netdev, "empty skb received from stack\n");
-+		dev_kfree_skb_any(skb);
-+		goto tx_netdev_return;
-+	}
-+
-+	/* Calculate preliminary packet info */
-+	memset(packet, 0, sizeof(*packet));
-+	xgbe_packet_info(pdata, ring, skb, packet);
-+
-+	/* Check that there are enough descriptors available */
-+	ret = xgbe_maybe_stop_tx_queue(channel, ring, packet->rdesc_count);
-+	if (ret)
-+		goto tx_netdev_return;
-+
-+	ret = xgbe_prep_tso(skb, packet);
-+	if (ret) {
-+		netdev_err(netdev, "error processing TSO packet\n");
-+		dev_kfree_skb_any(skb);
-+		goto tx_netdev_return;
-+	}
-+	xgbe_prep_vlan(skb, packet);
-+
-+	if (!desc_if->map_tx_skb(channel, skb)) {
-+		dev_kfree_skb_any(skb);
-+		goto tx_netdev_return;
-+	}
-+
-+	xgbe_prep_tx_tstamp(pdata, skb, packet);
-+
-+	/* Report on the actual number of bytes (to be) sent */
-+	netdev_tx_sent_queue(txq, packet->tx_bytes);
-+
-+	/* Configure required descriptor fields for transmission */
-+	hw_if->dev_xmit(channel);
-+
-+#ifdef XGMAC_ENABLE_TX_PKT_DUMP
-+	xgbe_a0_print_pkt(netdev, skb, true);
-+#endif
-+
-+	/* Stop the queue in advance if there may not be enough descriptors */
-+	xgbe_maybe_stop_tx_queue(channel, ring, XGBE_TX_MAX_DESCS);
-+
-+	ret = NETDEV_TX_OK;
-+
-+tx_netdev_return:
-+	return ret;
-+}
-+
-+static void xgbe_set_rx_mode(struct net_device *netdev)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	unsigned int pr_mode, am_mode;
-+
-+	DBGPR("-->xgbe_set_rx_mode\n");
-+
-+	pr_mode = ((netdev->flags & IFF_PROMISC) != 0);
-+	am_mode = ((netdev->flags & IFF_ALLMULTI) != 0);
-+
-+	hw_if->set_promiscuous_mode(pdata, pr_mode);
-+	hw_if->set_all_multicast_mode(pdata, am_mode);
-+
-+	hw_if->add_mac_addresses(pdata);
-+
-+	DBGPR("<--xgbe_set_rx_mode\n");
-+}
-+
-+static int xgbe_set_mac_address(struct net_device *netdev, void *addr)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct sockaddr *saddr = addr;
-+
-+	DBGPR("-->xgbe_set_mac_address\n");
-+
-+	if (!is_valid_ether_addr(saddr->sa_data))
-+		return -EADDRNOTAVAIL;
-+
-+	memcpy(netdev->dev_addr, saddr->sa_data, netdev->addr_len);
-+
-+	hw_if->set_mac_address(pdata, netdev->dev_addr);
-+
-+	DBGPR("<--xgbe_set_mac_address\n");
-+
-+	return 0;
-+}
-+
-+static int xgbe_ioctl(struct net_device *netdev, struct ifreq *ifreq, int cmd)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	int ret;
-+
-+	switch (cmd) {
-+	case SIOCGHWTSTAMP:
-+		ret = xgbe_get_hwtstamp_settings(pdata, ifreq);
-+		break;
-+
-+	case SIOCSHWTSTAMP:
-+		ret = xgbe_set_hwtstamp_settings(pdata, ifreq);
-+		break;
-+
-+	default:
-+		ret = -EOPNOTSUPP;
-+	}
-+
-+	return ret;
-+}
-+
-+static int xgbe_change_mtu(struct net_device *netdev, int mtu)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	int ret;
-+
-+	DBGPR("-->xgbe_change_mtu\n");
-+
-+	ret = xgbe_calc_rx_buf_size(netdev, mtu);
-+	if (ret < 0)
-+		return ret;
-+
-+	pdata->rx_buf_size = ret;
-+	netdev->mtu = mtu;
-+
-+	xgbe_restart_dev(pdata);
-+
-+	DBGPR("<--xgbe_change_mtu\n");
-+
-+	return 0;
-+}
-+
-+static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev,
-+						  struct rtnl_link_stats64 *s)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_mmc_stats *pstats = &pdata->mmc_stats;
-+
-+	DBGPR("-->%s\n", __func__);
-+
-+	pdata->hw_if.read_mmc_stats(pdata);
-+
-+	s->rx_packets = pstats->rxframecount_gb;
-+	s->rx_bytes = pstats->rxoctetcount_gb;
-+	s->rx_errors = pstats->rxframecount_gb -
-+		       pstats->rxbroadcastframes_g -
-+		       pstats->rxmulticastframes_g -
-+		       pstats->rxunicastframes_g;
-+	s->multicast = pstats->rxmulticastframes_g;
-+	s->rx_length_errors = pstats->rxlengtherror;
-+	s->rx_crc_errors = pstats->rxcrcerror;
-+	s->rx_fifo_errors = pstats->rxfifooverflow;
-+
-+	s->tx_packets = pstats->txframecount_gb;
-+	s->tx_bytes = pstats->txoctetcount_gb;
-+	s->tx_errors = pstats->txframecount_gb - pstats->txframecount_g;
-+	s->tx_dropped = netdev->stats.tx_dropped;
-+
-+	DBGPR("<--%s\n", __func__);
-+
-+	return s;
-+}
-+
-+static int xgbe_vlan_rx_add_vid(struct net_device *netdev, __be16 proto,
-+				u16 vid)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+
-+	DBGPR("-->%s\n", __func__);
-+
-+	set_bit(vid, pdata->active_vlans);
-+	hw_if->update_vlan_hash_table(pdata);
-+
-+	DBGPR("<--%s\n", __func__);
-+
-+	return 0;
-+}
-+
-+static int xgbe_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto,
-+				 u16 vid)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+
-+	DBGPR("-->%s\n", __func__);
-+
-+	clear_bit(vid, pdata->active_vlans);
-+	hw_if->update_vlan_hash_table(pdata);
-+
-+	DBGPR("<--%s\n", __func__);
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+static void xgbe_poll_controller(struct net_device *netdev)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_channel *channel;
-+	unsigned int i;
-+
-+	DBGPR("-->xgbe_poll_controller\n");
-+
-+	if (pdata->per_channel_irq) {
-+		channel = pdata->channel;
-+		for (i = 0; i < pdata->channel_count; i++, channel++)
-+			xgbe_dma_isr(channel->dma_irq, channel);
-+	} else {
-+		disable_irq(pdata->dev_irq);
-+		xgbe_isr(pdata->dev_irq, pdata);
-+		enable_irq(pdata->dev_irq);
-+	}
-+
-+	DBGPR("<--xgbe_poll_controller\n");
-+}
-+#endif /* End CONFIG_NET_POLL_CONTROLLER */
-+
-+static int xgbe_setup_tc(struct net_device *netdev, u8 tc)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	unsigned int offset, queue;
-+	u8 i;
-+
-+	if (tc && (tc != pdata->hw_feat.tc_cnt))
-+		return -EINVAL;
-+
-+	if (tc) {
-+		netdev_set_num_tc(netdev, tc);
-+		for (i = 0, queue = 0, offset = 0; i < tc; i++) {
-+			while ((queue < pdata->tx_q_count) &&
-+			       (pdata->q2tc_map[queue] == i))
-+				queue++;
-+
-+			DBGPR("  TC%u using TXq%u-%u\n", i, offset, queue - 1);
-+			netdev_set_tc_queue(netdev, i, queue - offset, offset);
-+			offset = queue;
-+		}
-+	} else {
-+		netdev_reset_tc(netdev);
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_features(struct net_device *netdev,
-+			     netdev_features_t features)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	netdev_features_t rxhash, rxcsum, rxvlan, rxvlan_filter;
-+	int ret = 0;
-+
-+	rxhash = pdata->netdev_features & NETIF_F_RXHASH;
-+	rxcsum = pdata->netdev_features & NETIF_F_RXCSUM;
-+	rxvlan = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_RX;
-+	rxvlan_filter = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_FILTER;
-+
-+	if ((features & NETIF_F_RXHASH) && !rxhash)
-+		ret = hw_if->enable_rss(pdata);
-+	else if (!(features & NETIF_F_RXHASH) && rxhash)
-+		ret = hw_if->disable_rss(pdata);
-+	if (ret)
-+		return ret;
-+
-+	if ((features & NETIF_F_RXCSUM) && !rxcsum)
-+		hw_if->enable_rx_csum(pdata);
-+	else if (!(features & NETIF_F_RXCSUM) && rxcsum)
-+		hw_if->disable_rx_csum(pdata);
-+
-+	if ((features & NETIF_F_HW_VLAN_CTAG_RX) && !rxvlan)
-+		hw_if->enable_rx_vlan_stripping(pdata);
-+	else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) && rxvlan)
-+		hw_if->disable_rx_vlan_stripping(pdata);
-+
-+	if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && !rxvlan_filter)
-+		hw_if->enable_rx_vlan_filtering(pdata);
-+	else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && rxvlan_filter)
-+		hw_if->disable_rx_vlan_filtering(pdata);
-+
-+	pdata->netdev_features = features;
-+
-+	DBGPR("<--xgbe_set_features\n");
-+
-+	return 0;
-+}
-+
-+static const struct net_device_ops xgbe_netdev_ops = {
-+	.ndo_open		= xgbe_open,
-+	.ndo_stop		= xgbe_close,
-+	.ndo_start_xmit		= xgbe_xmit,
-+	.ndo_set_rx_mode	= xgbe_set_rx_mode,
-+	.ndo_set_mac_address	= xgbe_set_mac_address,
-+	.ndo_validate_addr	= eth_validate_addr,
-+	.ndo_do_ioctl		= xgbe_ioctl,
-+	.ndo_change_mtu		= xgbe_change_mtu,
-+	.ndo_get_stats64	= xgbe_get_stats64,
-+	.ndo_vlan_rx_add_vid	= xgbe_vlan_rx_add_vid,
-+	.ndo_vlan_rx_kill_vid	= xgbe_vlan_rx_kill_vid,
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+	.ndo_poll_controller	= xgbe_poll_controller,
-+#endif
-+	.ndo_setup_tc		= xgbe_setup_tc,
-+	.ndo_set_features	= xgbe_set_features,
-+};
-+
-+struct net_device_ops *xgbe_a0_get_netdev_ops(void)
-+{
-+	return (struct net_device_ops *)&xgbe_netdev_ops;
-+}
-+
-+static void xgbe_rx_refresh(struct xgbe_channel *channel)
-+{
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_desc_if *desc_if = &pdata->desc_if;
-+	struct xgbe_ring *ring = channel->rx_ring;
-+	struct xgbe_ring_data *rdata;
-+
-+	while (ring->dirty != ring->cur) {
-+		rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
-+
-+		/* Reset rdata values */
-+		desc_if->unmap_rdata(pdata, rdata);
-+
-+		if (desc_if->map_rx_buffer(pdata, ring, rdata))
-+			break;
-+
-+		hw_if->rx_desc_reset(rdata);
-+
-+		ring->dirty++;
-+	}
-+
-+	/* Update the Rx Tail Pointer Register with address of
-+	 * the last cleaned entry */
-+	rdata = XGBE_GET_DESC_DATA(ring, ring->dirty - 1);
-+	XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO,
-+			  lower_32_bits(rdata->rdesc_dma));
-+}
-+
-+static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata,
-+				       struct xgbe_ring_data *rdata,
-+				       unsigned int *len)
-+{
-+	struct net_device *netdev = pdata->netdev;
-+	struct sk_buff *skb;
-+	u8 *packet;
-+	unsigned int copy_len;
-+
-+	skb = netdev_alloc_skb_ip_align(netdev, rdata->rx.hdr.dma_len);
-+	if (!skb)
-+		return NULL;
-+
-+	packet = page_address(rdata->rx.hdr.pa.pages) +
-+		 rdata->rx.hdr.pa.pages_offset;
-+	copy_len = (rdata->rx.hdr_len) ? rdata->rx.hdr_len : *len;
-+	copy_len = min(rdata->rx.hdr.dma_len, copy_len);
-+	skb_copy_to_linear_data(skb, packet, copy_len);
-+	skb_put(skb, copy_len);
-+
-+	*len -= copy_len;
-+
-+	return skb;
-+}
-+
-+static int xgbe_tx_poll(struct xgbe_channel *channel)
-+{
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_desc_if *desc_if = &pdata->desc_if;
-+	struct xgbe_ring *ring = channel->tx_ring;
-+	struct xgbe_ring_data *rdata;
-+	struct xgbe_ring_desc *rdesc;
-+	struct net_device *netdev = pdata->netdev;
-+	struct netdev_queue *txq;
-+	int processed = 0;
-+	unsigned int tx_packets = 0, tx_bytes = 0;
-+
-+	DBGPR("-->xgbe_tx_poll\n");
-+
-+	/* Nothing to do if there isn't a Tx ring for this channel */
-+	if (!ring)
-+		return 0;
-+
-+	txq = netdev_get_tx_queue(netdev, channel->queue_index);
-+
-+	while ((processed < XGBE_TX_DESC_MAX_PROC) &&
-+	       (ring->dirty != ring->cur)) {
-+		rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
-+		rdesc = rdata->rdesc;
-+
-+		if (!hw_if->tx_complete(rdesc))
-+			break;
-+
-+		/* Make sure descriptor fields are read after reading the OWN
-+		 * bit */
-+		rmb();
-+
-+#ifdef XGMAC_ENABLE_TX_DESC_DUMP
-+		xgbe_a0_dump_tx_desc(ring, ring->dirty, 1, 0);
-+#endif
-+
-+		if (hw_if->is_last_desc(rdesc)) {
-+			tx_packets += rdata->tx.packets;
-+			tx_bytes += rdata->tx.bytes;
-+		}
-+
-+		/* Free the SKB and reset the descriptor for re-use */
-+		desc_if->unmap_rdata(pdata, rdata);
-+		hw_if->tx_desc_reset(rdata);
-+
-+		processed++;
-+		ring->dirty++;
-+	}
-+
-+	if (!processed)
-+		return 0;
-+
-+	netdev_tx_completed_queue(txq, tx_packets, tx_bytes);
-+
-+	if ((ring->tx.queue_stopped == 1) &&
-+	    (xgbe_tx_avail_desc(ring) > XGBE_TX_DESC_MIN_FREE)) {
-+		ring->tx.queue_stopped = 0;
-+		netif_tx_wake_queue(txq);
-+	}
-+
-+	DBGPR("<--xgbe_tx_poll: processed=%d\n", processed);
-+
-+	return processed;
-+}
-+
-+static int xgbe_rx_poll(struct xgbe_channel *channel, int budget)
-+{
-+	struct xgbe_prv_data *pdata = channel->pdata;
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	struct xgbe_ring *ring = channel->rx_ring;
-+	struct xgbe_ring_data *rdata;
-+	struct xgbe_packet_data *packet;
-+	struct net_device *netdev = pdata->netdev;
-+	struct napi_struct *napi;
-+	struct sk_buff *skb;
-+	struct skb_shared_hwtstamps *hwtstamps;
-+	unsigned int incomplete, error, context_next, context;
-+	unsigned int len, put_len, max_len;
-+	unsigned int received = 0;
-+	int packet_count = 0;
-+
-+	DBGPR("-->xgbe_rx_poll: budget=%d\n", budget);
-+
-+	/* Nothing to do if there isn't a Rx ring for this channel */
-+	if (!ring)
-+		return 0;
-+
-+	napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
-+
-+	rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
-+	packet = &ring->packet_data;
-+	while (packet_count < budget) {
-+		DBGPR("  cur = %d\n", ring->cur);
-+
-+		/* First time in loop see if we need to restore state */
-+		if (!received && rdata->state_saved) {
-+			incomplete = rdata->state.incomplete;
-+			context_next = rdata->state.context_next;
-+			skb = rdata->state.skb;
-+			error = rdata->state.error;
-+			len = rdata->state.len;
-+		} else {
-+			memset(packet, 0, sizeof(*packet));
-+			incomplete = 0;
-+			context_next = 0;
-+			skb = NULL;
-+			error = 0;
-+			len = 0;
-+		}
-+
-+read_again:
-+		rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
-+
-+		if (xgbe_rx_dirty_desc(ring) > (XGBE_RX_DESC_CNT >> 3))
-+			xgbe_rx_refresh(channel);
-+
-+		if (hw_if->dev_read(channel))
-+			break;
-+
-+		received++;
-+		ring->cur++;
-+
-+		incomplete = XGMAC_GET_BITS(packet->attributes,
-+					    RX_PACKET_ATTRIBUTES,
-+					    INCOMPLETE);
-+		context_next = XGMAC_GET_BITS(packet->attributes,
-+					      RX_PACKET_ATTRIBUTES,
-+					      CONTEXT_NEXT);
-+		context = XGMAC_GET_BITS(packet->attributes,
-+					 RX_PACKET_ATTRIBUTES,
-+					 CONTEXT);
-+
-+		/* Earlier error, just drain the remaining data */
-+		if ((incomplete || context_next) && error)
-+			goto read_again;
-+
-+		if (error || packet->errors) {
-+			if (packet->errors)
-+				DBGPR("Error in received packet\n");
-+			dev_kfree_skb(skb);
-+			goto next_packet;
-+		}
-+
-+		if (!context) {
-+			put_len = rdata->rx.len - len;
-+			len += put_len;
-+
-+			if (!skb) {
-+				dma_sync_single_for_cpu(pdata->dev,
-+							rdata->rx.hdr.dma,
-+							rdata->rx.hdr.dma_len,
-+							DMA_FROM_DEVICE);
-+
-+				skb = xgbe_create_skb(pdata, rdata, &put_len);
-+				if (!skb) {
-+					error = 1;
-+					goto skip_data;
-+				}
-+			}
-+
-+			if (put_len) {
-+				dma_sync_single_for_cpu(pdata->dev,
-+							rdata->rx.buf.dma,
-+							rdata->rx.buf.dma_len,
-+							DMA_FROM_DEVICE);
-+
-+				skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
-+						rdata->rx.buf.pa.pages,
-+						rdata->rx.buf.pa.pages_offset,
-+						put_len, rdata->rx.buf.dma_len);
-+				rdata->rx.buf.pa.pages = NULL;
-+			}
-+		}
-+
-+skip_data:
-+		if (incomplete || context_next)
-+			goto read_again;
-+
-+		if (!skb)
-+			goto next_packet;
-+
-+		/* Be sure we don't exceed the configured MTU */
-+		max_len = netdev->mtu + ETH_HLEN;
-+		if (!(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
-+		    (skb->protocol == htons(ETH_P_8021Q)))
-+			max_len += VLAN_HLEN;
-+
-+		if (skb->len > max_len) {
-+			DBGPR("packet length exceeds configured MTU\n");
-+			dev_kfree_skb(skb);
-+			goto next_packet;
-+		}
-+
-+#ifdef XGMAC_ENABLE_RX_PKT_DUMP
-+		xgbe_a0_print_pkt(netdev, skb, false);
-+#endif
-+
-+		skb_checksum_none_assert(skb);
-+		if (XGMAC_GET_BITS(packet->attributes,
-+				   RX_PACKET_ATTRIBUTES, CSUM_DONE))
-+			skb->ip_summed = CHECKSUM_UNNECESSARY;
-+
-+		if (XGMAC_GET_BITS(packet->attributes,
-+				   RX_PACKET_ATTRIBUTES, VLAN_CTAG))
-+			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
-+					       packet->vlan_ctag);
-+
-+		if (XGMAC_GET_BITS(packet->attributes,
-+				   RX_PACKET_ATTRIBUTES, RX_TSTAMP)) {
-+			u64 nsec;
-+
-+			nsec = timecounter_cyc2time(&pdata->tstamp_tc,
-+						    packet->rx_tstamp);
-+			hwtstamps = skb_hwtstamps(skb);
-+			hwtstamps->hwtstamp = ns_to_ktime(nsec);
-+		}
-+
-+		if (XGMAC_GET_BITS(packet->attributes,
-+				   RX_PACKET_ATTRIBUTES, RSS_HASH))
-+			skb_set_hash(skb, packet->rss_hash,
-+				     packet->rss_hash_type);
-+
-+		skb->dev = netdev;
-+		skb->protocol = eth_type_trans(skb, netdev);
-+		skb_record_rx_queue(skb, channel->queue_index);
-+		skb_mark_napi_id(skb, napi);
-+
-+		netdev->last_rx = jiffies;
-+		napi_gro_receive(napi, skb);
-+
-+next_packet:
-+		packet_count++;
-+	}
-+
-+	/* Check if we need to save state before leaving */
-+	if (received && (incomplete || context_next)) {
-+		rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
-+		rdata->state_saved = 1;
-+		rdata->state.incomplete = incomplete;
-+		rdata->state.context_next = context_next;
-+		rdata->state.skb = skb;
-+		rdata->state.len = len;
-+		rdata->state.error = error;
-+	}
-+
-+	DBGPR("<--xgbe_rx_poll: packet_count = %d\n", packet_count);
-+
-+	return packet_count;
-+}
-+
-+static int xgbe_one_poll(struct napi_struct *napi, int budget)
-+{
-+	struct xgbe_channel *channel = container_of(napi, struct xgbe_channel,
-+						    napi);
-+	int processed = 0;
-+
-+	DBGPR("-->xgbe_one_poll: budget=%d\n", budget);
-+
-+	/* Cleanup Tx ring first */
-+	xgbe_tx_poll(channel);
-+
-+	/* Process Rx ring next */
-+	processed = xgbe_rx_poll(channel, budget);
-+
-+	/* If we processed everything, we are done */
-+	if (processed < budget) {
-+		/* Turn off polling */
-+		napi_complete(napi);
-+
-+		/* Enable Tx and Rx interrupts */
-+		enable_irq(channel->dma_irq);
-+	}
-+
-+	DBGPR("<--xgbe_one_poll: received = %d\n", processed);
-+
-+	return processed;
-+}
-+
-+static int xgbe_all_poll(struct napi_struct *napi, int budget)
-+{
-+	struct xgbe_prv_data *pdata = container_of(napi, struct xgbe_prv_data,
-+						   napi);
-+	struct xgbe_channel *channel;
-+	int ring_budget;
-+	int processed, last_processed;
-+	unsigned int i;
-+
-+	DBGPR("-->xgbe_all_poll: budget=%d\n", budget);
-+
-+	processed = 0;
-+	ring_budget = budget / pdata->rx_ring_count;
-+	do {
-+		last_processed = processed;
-+
-+		channel = pdata->channel;
-+		for (i = 0; i < pdata->channel_count; i++, channel++) {
-+			/* Cleanup Tx ring first */
-+			xgbe_tx_poll(channel);
-+
-+			/* Process Rx ring next */
-+			if (ring_budget > (budget - processed))
-+				ring_budget = budget - processed;
-+			processed += xgbe_rx_poll(channel, ring_budget);
-+		}
-+	} while ((processed < budget) && (processed != last_processed));
-+
-+	/* If we processed everything, we are done */
-+	if (processed < budget) {
-+		/* Turn off polling */
-+		napi_complete(napi);
-+
-+		/* Enable Tx and Rx interrupts */
-+		xgbe_enable_rx_tx_ints(pdata);
-+	}
-+
-+	DBGPR("<--xgbe_all_poll: received = %d\n", processed);
-+
-+	return processed;
-+}
-+
-+void xgbe_a0_dump_tx_desc(struct xgbe_ring *ring, unsigned int idx,
-+		       unsigned int count, unsigned int flag)
-+{
-+	struct xgbe_ring_data *rdata;
-+	struct xgbe_ring_desc *rdesc;
-+
-+	while (count--) {
-+		rdata = XGBE_GET_DESC_DATA(ring, idx);
-+		rdesc = rdata->rdesc;
-+		pr_alert("TX_NORMAL_DESC[%d %s] = %08x:%08x:%08x:%08x\n", idx,
-+			 (flag == 1) ? "QUEUED FOR TX" : "TX BY DEVICE",
-+			 le32_to_cpu(rdesc->desc0), le32_to_cpu(rdesc->desc1),
-+			 le32_to_cpu(rdesc->desc2), le32_to_cpu(rdesc->desc3));
-+		idx++;
-+	}
-+}
-+
-+void xgbe_a0_dump_rx_desc(struct xgbe_ring *ring, struct xgbe_ring_desc *desc,
-+		       unsigned int idx)
-+{
-+	pr_alert("RX_NORMAL_DESC[%d RX BY DEVICE] = %08x:%08x:%08x:%08x\n", idx,
-+		 le32_to_cpu(desc->desc0), le32_to_cpu(desc->desc1),
-+		 le32_to_cpu(desc->desc2), le32_to_cpu(desc->desc3));
-+}
-+
-+void xgbe_a0_print_pkt(struct net_device *netdev, struct sk_buff *skb, bool tx_rx)
-+{
-+	struct ethhdr *eth = (struct ethhdr *)skb->data;
-+	unsigned char *buf = skb->data;
-+	unsigned char buffer[128];
-+	unsigned int i, j;
-+
-+	netdev_alert(netdev, "\n************** SKB dump ****************\n");
-+
-+	netdev_alert(netdev, "%s packet of %d bytes\n",
-+		     (tx_rx ? "TX" : "RX"), skb->len);
-+
-+	netdev_alert(netdev, "Dst MAC addr: %pM\n", eth->h_dest);
-+	netdev_alert(netdev, "Src MAC addr: %pM\n", eth->h_source);
-+	netdev_alert(netdev, "Protocol: 0x%04hx\n", ntohs(eth->h_proto));
-+
-+	for (i = 0, j = 0; i < skb->len;) {
-+		j += snprintf(buffer + j, sizeof(buffer) - j, "%02hhx",
-+			      buf[i++]);
-+
-+		if ((i % 32) == 0) {
-+			netdev_alert(netdev, "  0x%04x: %s\n", i - 32, buffer);
-+			j = 0;
-+		} else if ((i % 16) == 0) {
-+			buffer[j++] = ' ';
-+			buffer[j++] = ' ';
-+		} else if ((i % 4) == 0) {
-+			buffer[j++] = ' ';
-+		}
-+	}
-+	if (i % 32)
-+		netdev_alert(netdev, "  0x%04x: %s\n", i - (i % 32), buffer);
-+
-+	netdev_alert(netdev, "\n************** SKB dump ****************\n");
-+}
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-ethtool.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-ethtool.c
-new file mode 100644
-index 0000000..165ff1c
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-ethtool.c
-@@ -0,0 +1,616 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/spinlock.h>
-+#include <linux/phy.h>
-+#include <linux/net_tstamp.h>
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+struct xgbe_stats {
-+	char stat_string[ETH_GSTRING_LEN];
-+	int stat_size;
-+	int stat_offset;
-+};
-+
-+#define XGMAC_MMC_STAT(_string, _var)				\
-+	{ _string,						\
-+	  FIELD_SIZEOF(struct xgbe_mmc_stats, _var),		\
-+	  offsetof(struct xgbe_prv_data, mmc_stats._var),	\
-+	}
-+
-+static const struct xgbe_stats xgbe_gstring_stats[] = {
-+	XGMAC_MMC_STAT("tx_bytes", txoctetcount_gb),
-+	XGMAC_MMC_STAT("tx_packets", txframecount_gb),
-+	XGMAC_MMC_STAT("tx_unicast_packets", txunicastframes_gb),
-+	XGMAC_MMC_STAT("tx_broadcast_packets", txbroadcastframes_gb),
-+	XGMAC_MMC_STAT("tx_multicast_packets", txmulticastframes_gb),
-+	XGMAC_MMC_STAT("tx_vlan_packets", txvlanframes_g),
-+	XGMAC_MMC_STAT("tx_64_byte_packets", tx64octets_gb),
-+	XGMAC_MMC_STAT("tx_65_to_127_byte_packets", tx65to127octets_gb),
-+	XGMAC_MMC_STAT("tx_128_to_255_byte_packets", tx128to255octets_gb),
-+	XGMAC_MMC_STAT("tx_256_to_511_byte_packets", tx256to511octets_gb),
-+	XGMAC_MMC_STAT("tx_512_to_1023_byte_packets", tx512to1023octets_gb),
-+	XGMAC_MMC_STAT("tx_1024_to_max_byte_packets", tx1024tomaxoctets_gb),
-+	XGMAC_MMC_STAT("tx_underflow_errors", txunderflowerror),
-+	XGMAC_MMC_STAT("tx_pause_frames", txpauseframes),
-+
-+	XGMAC_MMC_STAT("rx_bytes", rxoctetcount_gb),
-+	XGMAC_MMC_STAT("rx_packets", rxframecount_gb),
-+	XGMAC_MMC_STAT("rx_unicast_packets", rxunicastframes_g),
-+	XGMAC_MMC_STAT("rx_broadcast_packets", rxbroadcastframes_g),
-+	XGMAC_MMC_STAT("rx_multicast_packets", rxmulticastframes_g),
-+	XGMAC_MMC_STAT("rx_vlan_packets", rxvlanframes_gb),
-+	XGMAC_MMC_STAT("rx_64_byte_packets", rx64octets_gb),
-+	XGMAC_MMC_STAT("rx_65_to_127_byte_packets", rx65to127octets_gb),
-+	XGMAC_MMC_STAT("rx_128_to_255_byte_packets", rx128to255octets_gb),
-+	XGMAC_MMC_STAT("rx_256_to_511_byte_packets", rx256to511octets_gb),
-+	XGMAC_MMC_STAT("rx_512_to_1023_byte_packets", rx512to1023octets_gb),
-+	XGMAC_MMC_STAT("rx_1024_to_max_byte_packets", rx1024tomaxoctets_gb),
-+	XGMAC_MMC_STAT("rx_undersize_packets", rxundersize_g),
-+	XGMAC_MMC_STAT("rx_oversize_packets", rxoversize_g),
-+	XGMAC_MMC_STAT("rx_crc_errors", rxcrcerror),
-+	XGMAC_MMC_STAT("rx_crc_errors_small_packets", rxrunterror),
-+	XGMAC_MMC_STAT("rx_crc_errors_giant_packets", rxjabbererror),
-+	XGMAC_MMC_STAT("rx_length_errors", rxlengtherror),
-+	XGMAC_MMC_STAT("rx_out_of_range_errors", rxoutofrangetype),
-+	XGMAC_MMC_STAT("rx_fifo_overflow_errors", rxfifooverflow),
-+	XGMAC_MMC_STAT("rx_watchdog_errors", rxwatchdogerror),
-+	XGMAC_MMC_STAT("rx_pause_frames", rxpauseframes),
-+};
-+
-+#define XGBE_STATS_COUNT	ARRAY_SIZE(xgbe_gstring_stats)
-+
-+static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
-+{
-+	int i;
-+
-+	DBGPR("-->%s\n", __func__);
-+
-+	switch (stringset) {
-+	case ETH_SS_STATS:
-+		for (i = 0; i < XGBE_STATS_COUNT; i++) {
-+			memcpy(data, xgbe_gstring_stats[i].stat_string,
-+			       ETH_GSTRING_LEN);
-+			data += ETH_GSTRING_LEN;
-+		}
-+		break;
-+	}
-+
-+	DBGPR("<--%s\n", __func__);
-+}
-+
-+static void xgbe_get_ethtool_stats(struct net_device *netdev,
-+				   struct ethtool_stats *stats, u64 *data)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	u8 *stat;
-+	int i;
-+
-+	DBGPR("-->%s\n", __func__);
-+
-+	pdata->hw_if.read_mmc_stats(pdata);
-+	for (i = 0; i < XGBE_STATS_COUNT; i++) {
-+		stat = (u8 *)pdata + xgbe_gstring_stats[i].stat_offset;
-+		*data++ = *(u64 *)stat;
-+	}
-+
-+	DBGPR("<--%s\n", __func__);
-+}
-+
-+static int xgbe_get_sset_count(struct net_device *netdev, int stringset)
-+{
-+	int ret;
-+
-+	DBGPR("-->%s\n", __func__);
-+
-+	switch (stringset) {
-+	case ETH_SS_STATS:
-+		ret = XGBE_STATS_COUNT;
-+		break;
-+
-+	default:
-+		ret = -EOPNOTSUPP;
-+	}
-+
-+	DBGPR("<--%s\n", __func__);
-+
-+	return ret;
-+}
-+
-+static void xgbe_get_pauseparam(struct net_device *netdev,
-+				struct ethtool_pauseparam *pause)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	DBGPR("-->xgbe_get_pauseparam\n");
-+
-+	pause->autoneg = pdata->pause_autoneg;
-+	pause->tx_pause = pdata->tx_pause;
-+	pause->rx_pause = pdata->rx_pause;
-+
-+	DBGPR("<--xgbe_get_pauseparam\n");
-+}
-+
-+static int xgbe_set_pauseparam(struct net_device *netdev,
-+			       struct ethtool_pauseparam *pause)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct phy_device *phydev = pdata->phydev;
-+	int ret = 0;
-+
-+	DBGPR("-->xgbe_set_pauseparam\n");
-+
-+	DBGPR("  autoneg = %d, tx_pause = %d, rx_pause = %d\n",
-+	      pause->autoneg, pause->tx_pause, pause->rx_pause);
-+
-+	pdata->pause_autoneg = pause->autoneg;
-+	if (pause->autoneg) {
-+		phydev->advertising |= ADVERTISED_Pause;
-+		phydev->advertising |= ADVERTISED_Asym_Pause;
-+
-+	} else {
-+		phydev->advertising &= ~ADVERTISED_Pause;
-+		phydev->advertising &= ~ADVERTISED_Asym_Pause;
-+
-+		pdata->tx_pause = pause->tx_pause;
-+		pdata->rx_pause = pause->rx_pause;
-+	}
-+
-+	if (netif_running(netdev))
-+		ret = phy_start_aneg(phydev);
-+
-+	DBGPR("<--xgbe_set_pauseparam\n");
-+
-+	return ret;
-+}
-+
-+static int xgbe_get_settings(struct net_device *netdev,
-+			     struct ethtool_cmd *cmd)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	int ret;
-+
-+	DBGPR("-->xgbe_get_settings\n");
-+
-+	if (!pdata->phydev)
-+		return -ENODEV;
-+
-+	ret = phy_ethtool_gset(pdata->phydev, cmd);
-+	cmd->transceiver = XCVR_EXTERNAL;
-+
-+	DBGPR("<--xgbe_get_settings\n");
-+
-+	return ret;
-+}
-+
-+static int xgbe_set_settings(struct net_device *netdev,
-+			     struct ethtool_cmd *cmd)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct phy_device *phydev = pdata->phydev;
-+	u32 speed;
-+	int ret;
-+
-+	DBGPR("-->xgbe_set_settings\n");
-+
-+	if (!pdata->phydev)
-+		return -ENODEV;
-+
-+	speed = ethtool_cmd_speed(cmd);
-+
-+	if (cmd->phy_address != phydev->addr)
-+		return -EINVAL;
-+
-+	if ((cmd->autoneg != AUTONEG_ENABLE) &&
-+	    (cmd->autoneg != AUTONEG_DISABLE))
-+		return -EINVAL;
-+
-+	if (cmd->autoneg == AUTONEG_DISABLE) {
-+		switch (speed) {
-+		case SPEED_10000:
-+		case SPEED_2500:
-+		case SPEED_1000:
-+			break;
-+		default:
-+			return -EINVAL;
-+		}
-+
-+		if (cmd->duplex != DUPLEX_FULL)
-+			return -EINVAL;
-+	}
-+
-+	cmd->advertising &= phydev->supported;
-+	if ((cmd->autoneg == AUTONEG_ENABLE) && !cmd->advertising)
-+		return -EINVAL;
-+
-+	ret = 0;
-+	phydev->autoneg = cmd->autoneg;
-+	phydev->speed = speed;
-+	phydev->duplex = cmd->duplex;
-+	phydev->advertising = cmd->advertising;
-+
-+	if (cmd->autoneg == AUTONEG_ENABLE)
-+		phydev->advertising |= ADVERTISED_Autoneg;
-+	else
-+		phydev->advertising &= ~ADVERTISED_Autoneg;
-+
-+	if (netif_running(netdev))
-+		ret = phy_start_aneg(phydev);
-+
-+	DBGPR("<--xgbe_set_settings\n");
-+
-+	return ret;
-+}
-+
-+static void xgbe_get_drvinfo(struct net_device *netdev,
-+			     struct ethtool_drvinfo *drvinfo)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_features *hw_feat = &pdata->hw_feat;
-+
-+	strlcpy(drvinfo->driver, XGBE_DRV_NAME, sizeof(drvinfo->driver));
-+	strlcpy(drvinfo->version, XGBE_DRV_VERSION, sizeof(drvinfo->version));
-+	strlcpy(drvinfo->bus_info, dev_name(pdata->dev),
-+		sizeof(drvinfo->bus_info));
-+	snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "%d.%d.%d",
-+		 XGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER),
-+		 XGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID),
-+		 XGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER));
-+	drvinfo->n_stats = XGBE_STATS_COUNT;
-+}
-+
-+static int xgbe_get_coalesce(struct net_device *netdev,
-+			     struct ethtool_coalesce *ec)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	unsigned int riwt;
-+
-+	DBGPR("-->xgbe_get_coalesce\n");
-+
-+	memset(ec, 0, sizeof(struct ethtool_coalesce));
-+
-+	riwt = pdata->rx_riwt;
-+	ec->rx_coalesce_usecs = hw_if->riwt_to_usec(pdata, riwt);
-+	ec->rx_max_coalesced_frames = pdata->rx_frames;
-+
-+	ec->tx_coalesce_usecs = pdata->tx_usecs;
-+	ec->tx_max_coalesced_frames = pdata->tx_frames;
-+
-+	DBGPR("<--xgbe_get_coalesce\n");
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_coalesce(struct net_device *netdev,
-+			     struct ethtool_coalesce *ec)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	unsigned int rx_frames, rx_riwt, rx_usecs;
-+	unsigned int tx_frames, tx_usecs;
-+
-+	DBGPR("-->xgbe_set_coalesce\n");
-+
-+	/* Check for not supported parameters  */
-+	if ((ec->rx_coalesce_usecs_irq) ||
-+	    (ec->rx_max_coalesced_frames_irq) ||
-+	    (ec->tx_coalesce_usecs_irq) ||
-+	    (ec->tx_max_coalesced_frames_irq) ||
-+	    (ec->stats_block_coalesce_usecs) ||
-+	    (ec->use_adaptive_rx_coalesce) ||
-+	    (ec->use_adaptive_tx_coalesce) ||
-+	    (ec->pkt_rate_low) ||
-+	    (ec->rx_coalesce_usecs_low) ||
-+	    (ec->rx_max_coalesced_frames_low) ||
-+	    (ec->tx_coalesce_usecs_low) ||
-+	    (ec->tx_max_coalesced_frames_low) ||
-+	    (ec->pkt_rate_high) ||
-+	    (ec->rx_coalesce_usecs_high) ||
-+	    (ec->rx_max_coalesced_frames_high) ||
-+	    (ec->tx_coalesce_usecs_high) ||
-+	    (ec->tx_max_coalesced_frames_high) ||
-+	    (ec->rate_sample_interval))
-+		return -EOPNOTSUPP;
-+
-+	/* Can only change rx-frames when interface is down (see
-+	 * rx_descriptor_init in xgbe-dev.c)
-+	 */
-+	rx_frames = pdata->rx_frames;
-+	if (rx_frames != ec->rx_max_coalesced_frames && netif_running(netdev)) {
-+		netdev_alert(netdev,
-+			     "interface must be down to change rx-frames\n");
-+		return -EINVAL;
-+	}
-+
-+	rx_riwt = hw_if->usec_to_riwt(pdata, ec->rx_coalesce_usecs);
-+	rx_frames = ec->rx_max_coalesced_frames;
-+
-+	/* Use smallest possible value if conversion resulted in zero */
-+	if (ec->rx_coalesce_usecs && !rx_riwt)
-+		rx_riwt = 1;
-+
-+	/* Check the bounds of values for Rx */
-+	if (rx_riwt > XGMAC_MAX_DMA_RIWT) {
-+		rx_usecs = hw_if->riwt_to_usec(pdata, XGMAC_MAX_DMA_RIWT);
-+		netdev_alert(netdev, "rx-usec is limited to %d usecs\n",
-+			     rx_usecs);
-+		return -EINVAL;
-+	}
-+	if (rx_frames > pdata->rx_desc_count) {
-+		netdev_alert(netdev, "rx-frames is limited to %d frames\n",
-+			     pdata->rx_desc_count);
-+		return -EINVAL;
-+	}
-+
-+	tx_usecs = ec->tx_coalesce_usecs;
-+	tx_frames = ec->tx_max_coalesced_frames;
-+
-+	/* Check the bounds of values for Tx */
-+	if (tx_frames > pdata->tx_desc_count) {
-+		netdev_alert(netdev, "tx-frames is limited to %d frames\n",
-+			     pdata->tx_desc_count);
-+		return -EINVAL;
-+	}
-+
-+	pdata->rx_riwt = rx_riwt;
-+	pdata->rx_frames = rx_frames;
-+	hw_if->config_rx_coalesce(pdata);
-+
-+	pdata->tx_usecs = tx_usecs;
-+	pdata->tx_frames = tx_frames;
-+	hw_if->config_tx_coalesce(pdata);
-+
-+	DBGPR("<--xgbe_set_coalesce\n");
-+
-+	return 0;
-+}
-+
-+static int xgbe_get_rxnfc(struct net_device *netdev,
-+			  struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	switch (rxnfc->cmd) {
-+	case ETHTOOL_GRXRINGS:
-+		rxnfc->data = pdata->rx_ring_count;
-+		break;
-+	default:
-+		return -EOPNOTSUPP;
-+	}
-+
-+	return 0;
-+}
-+
-+static u32 xgbe_get_rxfh_key_size(struct net_device *netdev)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	return sizeof(pdata->rss_key);
-+}
-+
-+static u32 xgbe_get_rxfh_indir_size(struct net_device *netdev)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	return ARRAY_SIZE(pdata->rss_table);
-+}
-+
-+static int xgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
-+			 u8 *hfunc)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	unsigned int i;
-+
-+	if (indir) {
-+		for (i = 0; i < ARRAY_SIZE(pdata->rss_table); i++)
-+			indir[i] = XGMAC_GET_BITS(pdata->rss_table[i],
-+						  MAC_RSSDR, DMCH);
-+	}
-+
-+	if (key)
-+		memcpy(key, pdata->rss_key, sizeof(pdata->rss_key));
-+
-+	if (hfunc)
-+		*hfunc = ETH_RSS_HASH_TOP;
-+
-+	return 0;
-+}
-+
-+static int xgbe_set_rxfh(struct net_device *netdev, const u32 *indir,
-+			 const u8 *key, const u8 hfunc)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	unsigned int ret;
-+
-+	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
-+		return -EOPNOTSUPP;
-+
-+	if (indir) {
-+		ret = hw_if->set_rss_lookup_table(pdata, indir);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	if (key) {
-+		ret = hw_if->set_rss_hash_key(pdata, key);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgbe_get_ts_info(struct net_device *netdev,
-+			    struct ethtool_ts_info *ts_info)
-+{
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
-+				   SOF_TIMESTAMPING_RX_SOFTWARE |
-+				   SOF_TIMESTAMPING_SOFTWARE |
-+				   SOF_TIMESTAMPING_TX_HARDWARE |
-+				   SOF_TIMESTAMPING_RX_HARDWARE |
-+				   SOF_TIMESTAMPING_RAW_HARDWARE;
-+
-+	if (pdata->ptp_clock)
-+		ts_info->phc_index = ptp_clock_index(pdata->ptp_clock);
-+	else
-+		ts_info->phc_index = -1;
-+
-+	ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
-+	ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
-+			      (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
-+			      (1 << HWTSTAMP_FILTER_ALL);
-+
-+	return 0;
-+}
-+
-+static const struct ethtool_ops xgbe_ethtool_ops = {
-+	.get_settings = xgbe_get_settings,
-+	.set_settings = xgbe_set_settings,
-+	.get_drvinfo = xgbe_get_drvinfo,
-+	.get_link = ethtool_op_get_link,
-+	.get_coalesce = xgbe_get_coalesce,
-+	.set_coalesce = xgbe_set_coalesce,
-+	.get_pauseparam = xgbe_get_pauseparam,
-+	.set_pauseparam = xgbe_set_pauseparam,
-+	.get_strings = xgbe_get_strings,
-+	.get_ethtool_stats = xgbe_get_ethtool_stats,
-+	.get_sset_count = xgbe_get_sset_count,
-+	.get_rxnfc = xgbe_get_rxnfc,
-+	.get_rxfh_key_size = xgbe_get_rxfh_key_size,
-+	.get_rxfh_indir_size = xgbe_get_rxfh_indir_size,
-+	.get_rxfh = xgbe_get_rxfh,
-+	.set_rxfh = xgbe_set_rxfh,
-+	.get_ts_info = xgbe_get_ts_info,
-+};
-+
-+struct ethtool_ops *xgbe_a0_get_ethtool_ops(void)
-+{
-+	return (struct ethtool_ops *)&xgbe_ethtool_ops;
-+}
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-main.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-main.c
-new file mode 100644
-index 0000000..c06013e
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-main.c
-@@ -0,0 +1,620 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/device.h>
-+#include <linux/platform_device.h>
-+#include <linux/spinlock.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/io.h>
-+#include <linux/of.h>
-+#include <linux/of_net.h>
-+#include <linux/of_address.h>
-+#include <linux/clk.h>
-+#include <linux/property.h>
-+#include <linux/acpi.h>
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
-+MODULE_LICENSE("Dual BSD/GPL");
-+MODULE_VERSION(XGBE_DRV_VERSION);
-+MODULE_DESCRIPTION(XGBE_DRV_DESC);
-+
-+unsigned int speed = 0;
-+module_param(speed, uint, 0444);
-+MODULE_PARM_DESC(speed, " Select operating speed (1=1GbE, 2=2.5GbE, 10=10GbE, any other value implies auto-negotiation");
-+
-+static void xgbe_default_config(struct xgbe_prv_data *pdata)
-+{
-+	DBGPR("-->xgbe_default_config\n");
-+
-+	pdata->pblx8 = DMA_PBL_X8_ENABLE;
-+	pdata->tx_sf_mode = MTL_TSF_ENABLE;
-+	pdata->tx_threshold = MTL_TX_THRESHOLD_64;
-+	pdata->tx_pbl = DMA_PBL_16;
-+	pdata->tx_osp_mode = DMA_OSP_ENABLE;
-+	pdata->rx_sf_mode = MTL_RSF_DISABLE;
-+	pdata->rx_threshold = MTL_RX_THRESHOLD_64;
-+	pdata->rx_pbl = DMA_PBL_16;
-+	pdata->pause_autoneg = 1;
-+	pdata->tx_pause = 1;
-+	pdata->rx_pause = 1;
-+	pdata->phy_speed = SPEED_UNKNOWN;
-+	pdata->power_down = 0;
-+
-+	if (speed == 10) {
-+		pdata->default_autoneg = AUTONEG_DISABLE;
-+		pdata->default_speed = SPEED_10000;
-+	} else if (speed == 2) {
-+		pdata->default_autoneg = AUTONEG_DISABLE;
-+		pdata->default_speed = SPEED_2500;
-+	} else if (speed == 1) {
-+		pdata->default_autoneg = AUTONEG_DISABLE;
-+		pdata->default_speed = SPEED_1000;
-+	} else {
-+		pdata->default_autoneg = AUTONEG_ENABLE;
-+		pdata->default_speed = SPEED_10000;
-+	}
-+
-+	DBGPR("<--xgbe_default_config\n");
-+}
-+
-+static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata)
-+{
-+	xgbe_a0_init_function_ptrs_dev(&pdata->hw_if);
-+	xgbe_a0_init_function_ptrs_desc(&pdata->desc_if);
-+}
-+
-+#ifdef CONFIG_ACPI
-+static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
-+{
-+	struct device *dev = pdata->dev;
-+	u32 property;
-+	int ret;
-+
-+	/* Obtain the system clock setting */
-+	ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property);
-+	if (ret) {
-+		dev_err(dev, "unable to obtain %s property\n",
-+			XGBE_ACPI_DMA_FREQ);
-+		return ret;
-+	}
-+	pdata->sysclk_rate = property;
-+
-+	/* Obtain the PTP clock setting */
-+	ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property);
-+	if (ret) {
-+		dev_err(dev, "unable to obtain %s property\n",
-+			XGBE_ACPI_PTP_FREQ);
-+		return ret;
-+	}
-+	pdata->ptpclk_rate = property;
-+
-+	return 0;
-+}
-+#else   /* CONFIG_ACPI */
-+static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
-+{
-+	return -EINVAL;
-+}
-+#endif  /* CONFIG_ACPI */
-+
-+#ifdef CONFIG_OF
-+static int xgbe_of_support(struct xgbe_prv_data *pdata)
-+{
-+	struct device *dev = pdata->dev;
-+
-+	/* Obtain the system clock setting */
-+	pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
-+	if (IS_ERR(pdata->sysclk)) {
-+		dev_err(dev, "dma devm_clk_get failed\n");
-+		return PTR_ERR(pdata->sysclk);
-+	}
-+	pdata->sysclk_rate = clk_get_rate(pdata->sysclk);
-+
-+	/* Obtain the PTP clock setting */
-+	pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
-+	if (IS_ERR(pdata->ptpclk)) {
-+		dev_err(dev, "ptp devm_clk_get failed\n");
-+		return PTR_ERR(pdata->ptpclk);
-+	}
-+	pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk);
-+
-+	return 0;
-+}
-+#else   /* CONFIG_OF */
-+static int xgbe_of_support(struct xgbe_prv_data *pdata)
-+{
-+	return -EINVAL;
-+}
-+#endif  /*CONFIG_OF */
-+
-+static int xgbe_probe(struct platform_device *pdev)
-+{
-+	struct xgbe_prv_data *pdata;
-+	struct xgbe_hw_if *hw_if;
-+	struct xgbe_desc_if *desc_if;
-+	struct net_device *netdev;
-+	struct device *dev = &pdev->dev;
-+	struct resource *res;
-+	const char *phy_mode;
-+	unsigned int i;
-+	int ret;
-+
-+	DBGPR("--> xgbe_probe\n");
-+
-+	netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data),
-+				   XGBE_MAX_DMA_CHANNELS);
-+	if (!netdev) {
-+		dev_err(dev, "alloc_etherdev failed\n");
-+		ret = -ENOMEM;
-+		goto err_alloc;
-+	}
-+	SET_NETDEV_DEV(netdev, dev);
-+	pdata = netdev_priv(netdev);
-+	pdata->netdev = netdev;
-+	pdata->pdev = pdev;
-+	pdata->adev = ACPI_COMPANION(dev);
-+	pdata->dev = dev;
-+	platform_set_drvdata(pdev, netdev);
-+
-+	spin_lock_init(&pdata->lock);
-+	mutex_init(&pdata->xpcs_mutex);
-+	mutex_init(&pdata->rss_mutex);
-+	spin_lock_init(&pdata->tstamp_lock);
-+
-+	/* Check if we should use ACPI or DT */
-+	pdata->use_acpi = (!pdata->adev || acpi_disabled) ? 0 : 1;
-+
-+	/* Set and validate the number of descriptors for a ring */
-+	BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT);
-+	pdata->tx_desc_count = XGBE_TX_DESC_CNT;
-+	if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) {
-+		dev_err(dev, "tx descriptor count (%d) is not valid\n",
-+			pdata->tx_desc_count);
-+		ret = -EINVAL;
-+		goto err_io;
-+	}
-+	BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT);
-+	pdata->rx_desc_count = XGBE_RX_DESC_CNT;
-+	if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) {
-+		dev_err(dev, "rx descriptor count (%d) is not valid\n",
-+			pdata->rx_desc_count);
-+		ret = -EINVAL;
-+		goto err_io;
-+	}
-+
-+	/* Obtain the mmio areas for the device */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	pdata->xgmac_regs = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(pdata->xgmac_regs)) {
-+		dev_err(dev, "xgmac ioremap failed\n");
-+		ret = PTR_ERR(pdata->xgmac_regs);
-+		goto err_io;
-+	}
-+	DBGPR("  xgmac_regs = %p\n", pdata->xgmac_regs);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+	pdata->xpcs_regs = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(pdata->xpcs_regs)) {
-+		dev_err(dev, "xpcs ioremap failed\n");
-+		ret = PTR_ERR(pdata->xpcs_regs);
-+		goto err_io;
-+	}
-+	DBGPR("  xpcs_regs  = %p\n", pdata->xpcs_regs);
-+
-+	/* Retrieve the MAC address */
-+	ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY,
-+					    pdata->mac_addr,
-+					    sizeof(pdata->mac_addr));
-+	if (ret || !is_valid_ether_addr(pdata->mac_addr)) {
-+		dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY);
-+		if (!ret)
-+			ret = -EINVAL;
-+		goto err_io;
-+	}
-+
-+	/* Retrieve the PHY mode - it must be "xgmii" */
-+	ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY,
-+					  &phy_mode);
-+	if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) {
-+		dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY);
-+		if (!ret)
-+			ret = -EINVAL;
-+		goto err_io;
-+	}
-+	pdata->phy_mode = PHY_INTERFACE_MODE_XGMII;
-+
-+	/* Check for per channel interrupt support */
-+	if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY))
-+		pdata->per_channel_irq = 1;
-+
-+	/* Obtain device settings unique to ACPI/OF */
-+	if (pdata->use_acpi)
-+		ret = xgbe_acpi_support(pdata);
-+	else
-+		ret = xgbe_of_support(pdata);
-+	if (ret)
-+		goto err_io;
-+
-+	/* Set the DMA coherency values */
-+	// FIXME: what replaced device_dma_is_coherent?
-+	//pdata->coherent = device_dma_is_coherent(pdata->dev);
-+	pdata->coherent = true;
-+	if (pdata->coherent) {
-+		pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
-+		pdata->arcache = XGBE_DMA_OS_ARCACHE;
-+		pdata->awcache = XGBE_DMA_OS_AWCACHE;
-+	} else {
-+		pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN;
-+		pdata->arcache = XGBE_DMA_SYS_ARCACHE;
-+		pdata->awcache = XGBE_DMA_SYS_AWCACHE;
-+	}
-+
-+	/* Set the DMA mask */
-+	if (!dev->dma_mask)
-+		dev->dma_mask = &dev->coherent_dma_mask;
-+	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
-+	if (ret) {
-+		dev_err(dev, "dma_set_mask_and_coherent failed\n");
-+		goto err_io;
-+	}
-+
-+	/* Get the device interrupt */
-+	ret = platform_get_irq(pdev, 0);
-+	if (ret < 0) {
-+		dev_err(dev, "platform_get_irq 0 failed\n");
-+		goto err_io;
-+	}
-+	pdata->dev_irq = ret;
-+
-+	netdev->irq = pdata->dev_irq;
-+	netdev->base_addr = (unsigned long)pdata->xgmac_regs;
-+	memcpy(netdev->dev_addr, pdata->mac_addr, netdev->addr_len);
-+
-+	/* Set all the function pointers */
-+	xgbe_init_all_fptrs(pdata);
-+	hw_if = &pdata->hw_if;
-+	desc_if = &pdata->desc_if;
-+
-+	/* Issue software reset to device */
-+	hw_if->exit(pdata);
-+
-+	/* Populate the hardware features */
-+	xgbe_a0_get_all_hw_features(pdata);
-+
-+	/* Set default configuration data */
-+	xgbe_default_config(pdata);
-+
-+	/* Calculate the number of Tx and Rx rings to be created
-+	 *  -Tx (DMA) Channels map 1-to-1 to Tx Queues so set
-+	 *   the number of Tx queues to the number of Tx channels
-+	 *   enabled
-+	 *  -Rx (DMA) Channels do not map 1-to-1 so use the actual
-+	 *   number of Rx queues
-+	 */
-+	pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(),
-+				     pdata->hw_feat.tx_ch_cnt);
-+	pdata->tx_q_count = pdata->tx_ring_count;
-+	ret = netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count);
-+	if (ret) {
-+		dev_err(dev, "error setting real tx queue count\n");
-+		goto err_io;
-+	}
-+
-+	pdata->rx_ring_count = min_t(unsigned int,
-+				     netif_get_num_default_rss_queues(),
-+				     pdata->hw_feat.rx_ch_cnt);
-+	pdata->rx_q_count = pdata->hw_feat.rx_q_cnt;
-+	ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count);
-+	if (ret) {
-+		dev_err(dev, "error setting real rx queue count\n");
-+		goto err_io;
-+	}
-+
-+	/* Initialize RSS hash key and lookup table */
-+	netdev_rss_key_fill(pdata->rss_key, sizeof(pdata->rss_key));
-+
-+	for (i = 0; i < XGBE_RSS_MAX_TABLE_SIZE; i++)
-+		XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH,
-+			       i % pdata->rx_ring_count);
-+
-+	XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1);
-+	XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1);
-+	XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1);
-+
-+	/* Prepare to regsiter with MDIO */
-+	pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name);
-+	if (!pdata->mii_bus_id) {
-+		dev_err(dev, "failed to allocate mii bus id\n");
-+		ret = -ENOMEM;
-+		goto err_io;
-+	}
-+	ret = xgbe_a0_mdio_register(pdata);
-+	if (ret)
-+		goto err_bus_id;
-+
-+	/* Set device operations */
-+	netdev->netdev_ops = xgbe_a0_get_netdev_ops();
-+	netdev->ethtool_ops = xgbe_a0_get_ethtool_ops();
-+#ifdef CONFIG_AMD_XGBE_DCB
-+	netdev->dcbnl_ops = xgbe_a0_get_dcbnl_ops();
-+#endif
-+
-+	/* Set device features */
-+	netdev->hw_features = NETIF_F_SG |
-+			      NETIF_F_IP_CSUM |
-+			      NETIF_F_IPV6_CSUM |
-+			      NETIF_F_RXCSUM |
-+			      NETIF_F_TSO |
-+			      NETIF_F_TSO6 |
-+			      NETIF_F_GRO |
-+			      NETIF_F_HW_VLAN_CTAG_RX |
-+			      NETIF_F_HW_VLAN_CTAG_TX |
-+			      NETIF_F_HW_VLAN_CTAG_FILTER;
-+
-+	if (pdata->hw_feat.rss)
-+		netdev->hw_features |= NETIF_F_RXHASH;
-+
-+	netdev->vlan_features |= NETIF_F_SG |
-+				 NETIF_F_IP_CSUM |
-+				 NETIF_F_IPV6_CSUM |
-+				 NETIF_F_TSO |
-+				 NETIF_F_TSO6;
-+
-+	netdev->features |= netdev->hw_features;
-+	pdata->netdev_features = netdev->features;
-+
-+	netdev->priv_flags |= IFF_UNICAST_FLT;
-+
-+	xgbe_a0_init_rx_coalesce(pdata);
-+	xgbe_a0_init_tx_coalesce(pdata);
-+
-+	netif_carrier_off(netdev);
-+	ret = register_netdev(netdev);
-+	if (ret) {
-+		dev_err(dev, "net device registration failed\n");
-+		goto err_reg_netdev;
-+	}
-+
-+	xgbe_a0_ptp_register(pdata);
-+
-+	xgbe_a0_debugfs_init(pdata);
-+
-+	netdev_notice(netdev, "net device enabled\n");
-+
-+	DBGPR("<-- xgbe_probe\n");
-+
-+	return 0;
-+
-+err_reg_netdev:
-+	xgbe_a0_mdio_unregister(pdata);
-+
-+err_bus_id:
-+	kfree(pdata->mii_bus_id);
-+
-+err_io:
-+	free_netdev(netdev);
-+
-+err_alloc:
-+	dev_notice(dev, "net device not enabled\n");
-+
-+	return ret;
-+}
-+
-+static int xgbe_remove(struct platform_device *pdev)
-+{
-+	struct net_device *netdev = platform_get_drvdata(pdev);
-+	struct xgbe_prv_data *pdata = netdev_priv(netdev);
-+
-+	DBGPR("-->xgbe_remove\n");
-+
-+	xgbe_a0_debugfs_exit(pdata);
-+
-+	xgbe_a0_ptp_unregister(pdata);
-+
-+	unregister_netdev(netdev);
-+
-+	xgbe_a0_mdio_unregister(pdata);
-+
-+	kfree(pdata->mii_bus_id);
-+
-+	free_netdev(netdev);
-+
-+	DBGPR("<--xgbe_remove\n");
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int xgbe_suspend(struct device *dev)
-+{
-+	struct net_device *netdev = dev_get_drvdata(dev);
-+	int ret;
-+
-+	DBGPR("-->xgbe_suspend\n");
-+
-+	if (!netif_running(netdev)) {
-+		DBGPR("<--xgbe_dev_suspend\n");
-+		return -EINVAL;
-+	}
-+
-+	ret = xgbe_a0_powerdown(netdev, XGMAC_DRIVER_CONTEXT);
-+
-+	DBGPR("<--xgbe_suspend\n");
-+
-+	return ret;
-+}
-+
-+static int xgbe_resume(struct device *dev)
-+{
-+	struct net_device *netdev = dev_get_drvdata(dev);
-+	int ret;
-+
-+	DBGPR("-->xgbe_resume\n");
-+
-+	if (!netif_running(netdev)) {
-+		DBGPR("<--xgbe_dev_resume\n");
-+		return -EINVAL;
-+	}
-+
-+	ret = xgbe_a0_powerup(netdev, XGMAC_DRIVER_CONTEXT);
-+
-+	DBGPR("<--xgbe_resume\n");
-+
-+	return ret;
-+}
-+#endif /* CONFIG_PM */
-+
-+#ifdef CONFIG_ACPI
-+static const struct acpi_device_id xgbe_a0_acpi_match[] = {
-+	{ "AMDI8000", 0 },
-+	{},
-+};
-+
-+MODULE_DEVICE_TABLE(acpi, xgbe_a0_acpi_match);
-+#endif
-+
-+#ifdef CONFIG_OF
-+static const struct of_device_id xgbe_a0_of_match[] = {
-+	{ .compatible = "amd,xgbe-seattle-v0a", },
-+	{},
-+};
-+
-+MODULE_DEVICE_TABLE(of, xgbe_a0_of_match);
-+#endif
-+
-+static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume);
-+
-+static struct platform_driver xgbe_a0_driver = {
-+	.driver = {
-+		.name = "amd-xgbe-a0",
-+#ifdef CONFIG_ACPI
-+		.acpi_match_table = xgbe_a0_acpi_match,
-+#endif
-+#ifdef CONFIG_OF
-+		.of_match_table = xgbe_a0_of_match,
-+#endif
-+		.pm = &xgbe_pm_ops,
-+	},
-+	.probe = xgbe_probe,
-+	.remove = xgbe_remove,
-+};
-+
-+module_platform_driver(xgbe_a0_driver);
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-mdio.c
-new file mode 100644
-index 0000000..b84d048
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-mdio.c
-@@ -0,0 +1,312 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kmod.h>
-+#include <linux/mdio.h>
-+#include <linux/phy.h>
-+#include <linux/of.h>
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+static int xgbe_mdio_read(struct mii_bus *mii, int prtad, int mmd_reg)
-+{
-+	struct xgbe_prv_data *pdata = mii->priv;
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	int mmd_data;
-+
-+	DBGPR_MDIO("-->xgbe_mdio_read: prtad=%#x mmd_reg=%#x\n",
-+		   prtad, mmd_reg);
-+
-+	mmd_data = hw_if->read_mmd_regs(pdata, prtad, mmd_reg);
-+
-+	DBGPR_MDIO("<--xgbe_mdio_read: mmd_data=%#x\n", mmd_data);
-+
-+	return mmd_data;
-+}
-+
-+static int xgbe_mdio_write(struct mii_bus *mii, int prtad, int mmd_reg,
-+			   u16 mmd_val)
-+{
-+	struct xgbe_prv_data *pdata = mii->priv;
-+	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-+	int mmd_data = mmd_val;
-+
-+	DBGPR_MDIO("-->xgbe_mdio_write: prtad=%#x mmd_reg=%#x mmd_data=%#x\n",
-+		   prtad, mmd_reg, mmd_data);
-+
-+	hw_if->write_mmd_regs(pdata, prtad, mmd_reg, mmd_data);
-+
-+	DBGPR_MDIO("<--xgbe_mdio_write\n");
-+
-+	return 0;
-+}
-+
-+void xgbe_a0_dump_phy_registers(struct xgbe_prv_data *pdata)
-+{
-+	struct device *dev = pdata->dev;
-+	struct phy_device *phydev = pdata->mii->phy_map[XGBE_PRTAD];
-+	int i;
-+
-+	dev_alert(dev, "\n************* PHY Reg dump **********************\n");
-+
-+	dev_alert(dev, "PCS Control Reg (%#04x) = %#04x\n", MDIO_CTRL1,
-+		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1));
-+	dev_alert(dev, "PCS Status Reg (%#04x) = %#04x\n", MDIO_STAT1,
-+		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1));
-+	dev_alert(dev, "Phy Id (PHYS ID 1 %#04x)= %#04x\n", MDIO_DEVID1,
-+		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID1));
-+	dev_alert(dev, "Phy Id (PHYS ID 2 %#04x)= %#04x\n", MDIO_DEVID2,
-+		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID2));
-+	dev_alert(dev, "Devices in Package (%#04x)= %#04x\n", MDIO_DEVS1,
-+		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS1));
-+	dev_alert(dev, "Devices in Package (%#04x)= %#04x\n", MDIO_DEVS2,
-+		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS2));
-+
-+	dev_alert(dev, "Auto-Neg Control Reg (%#04x) = %#04x\n", MDIO_CTRL1,
-+		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1));
-+	dev_alert(dev, "Auto-Neg Status Reg (%#04x) = %#04x\n", MDIO_STAT1,
-+		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_STAT1));
-+	dev_alert(dev, "Auto-Neg Ad Reg 1 (%#04x) = %#04x\n",
-+		  MDIO_AN_ADVERTISE,
-+		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE));
-+	dev_alert(dev, "Auto-Neg Ad Reg 2 (%#04x) = %#04x\n",
-+		  MDIO_AN_ADVERTISE + 1,
-+		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1));
-+	dev_alert(dev, "Auto-Neg Ad Reg 3 (%#04x) = %#04x\n",
-+		  MDIO_AN_ADVERTISE + 2,
-+		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2));
-+	dev_alert(dev, "Auto-Neg Completion Reg (%#04x) = %#04x\n",
-+		  MDIO_AN_COMP_STAT,
-+		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_COMP_STAT));
-+
-+	dev_alert(dev, "MMD Device Mask = %#x\n",
-+		  phydev->c45_ids.devices_in_package);
-+	for (i = 0; i < ARRAY_SIZE(phydev->c45_ids.device_ids); i++)
-+		dev_alert(dev, "  MMD %d: ID = %#08x\n", i,
-+			  phydev->c45_ids.device_ids[i]);
-+
-+	dev_alert(dev, "\n*************************************************\n");
-+}
-+
-+int xgbe_a0_mdio_register(struct xgbe_prv_data *pdata)
-+{
-+	struct mii_bus *mii;
-+	struct phy_device *phydev;
-+	int ret = 0;
-+
-+	DBGPR("-->xgbe_a0_mdio_register\n");
-+
-+	mii = mdiobus_alloc();
-+	if (!mii) {
-+		dev_err(pdata->dev, "mdiobus_alloc failed\n");
-+		return -ENOMEM;
-+	}
-+
-+	/* Register on the MDIO bus (don't probe any PHYs) */
-+	mii->name = XGBE_PHY_NAME;
-+	mii->read = xgbe_mdio_read;
-+	mii->write = xgbe_mdio_write;
-+	snprintf(mii->id, sizeof(mii->id), "%s", pdata->mii_bus_id);
-+	mii->priv = pdata;
-+	mii->phy_mask = ~0;
-+	mii->parent = pdata->dev;
-+	ret = mdiobus_register(mii);
-+	if (ret) {
-+		dev_err(pdata->dev, "mdiobus_register failed\n");
-+		goto err_mdiobus_alloc;
-+	}
-+	DBGPR("  mdiobus_register succeeded for %s\n", pdata->mii_bus_id);
-+
-+	/* Probe the PCS using Clause 45 */
-+	phydev = get_phy_device(mii, XGBE_PRTAD, true);
-+	if (IS_ERR(phydev) || !phydev ||
-+	    !phydev->c45_ids.device_ids[MDIO_MMD_PCS]) {
-+		dev_err(pdata->dev, "get_phy_device failed\n");
-+		ret = phydev ? PTR_ERR(phydev) : -ENOLINK;
-+		goto err_mdiobus_register;
-+	}
-+	request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT,
-+		       MDIO_ID_ARGS(phydev->c45_ids.device_ids[MDIO_MMD_PCS]));
-+
-+	ret = phy_device_register(phydev);
-+	if (ret) {
-+		dev_err(pdata->dev, "phy_device_register failed\n");
-+		goto err_phy_device;
-+	}
-+	if (!phydev->dev.driver) {
-+		dev_err(pdata->dev, "phy driver probe failed\n");
-+		ret = -EIO;
-+		goto err_phy_device;
-+	}
-+
-+	/* Add a reference to the PHY driver so it can't be unloaded */
-+	pdata->phy_module = phydev->dev.driver->owner;
-+	if (!try_module_get(pdata->phy_module)) {
-+		dev_err(pdata->dev, "try_module_get failed\n");
-+		ret = -EIO;
-+		goto err_phy_device;
-+	}
-+
-+	pdata->mii = mii;
-+	pdata->mdio_mmd = MDIO_MMD_PCS;
-+
-+	phydev->autoneg = pdata->default_autoneg;
-+	if (phydev->autoneg == AUTONEG_DISABLE) {
-+		phydev->speed = pdata->default_speed;
-+		phydev->duplex = DUPLEX_FULL;
-+
-+		phydev->advertising &= ~ADVERTISED_Autoneg;
-+	}
-+
-+	pdata->phydev = phydev;
-+
-+	DBGPHY_REGS(pdata);
-+
-+	DBGPR("<--xgbe_a0_mdio_register\n");
-+
-+	return 0;
-+
-+err_phy_device:
-+	phy_device_free(phydev);
-+
-+err_mdiobus_register:
-+	mdiobus_unregister(mii);
-+
-+err_mdiobus_alloc:
-+	mdiobus_free(mii);
-+
-+	return ret;
-+}
-+
-+void xgbe_a0_mdio_unregister(struct xgbe_prv_data *pdata)
-+{
-+	DBGPR("-->xgbe_a0_mdio_unregister\n");
-+
-+	pdata->phydev = NULL;
-+
-+	module_put(pdata->phy_module);
-+	pdata->phy_module = NULL;
-+
-+	mdiobus_unregister(pdata->mii);
-+	pdata->mii->priv = NULL;
-+
-+	mdiobus_free(pdata->mii);
-+	pdata->mii = NULL;
-+
-+	DBGPR("<--xgbe_a0_mdio_unregister\n");
-+}
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-ptp.c
-new file mode 100644
-index 0000000..1016aeb
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-ptp.c
-@@ -0,0 +1,278 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/clocksource.h>
-+#include <linux/ptp_clock_kernel.h>
-+#include <linux/net_tstamp.h>
-+
-+#include "xgbe.h"
-+#include "xgbe-common.h"
-+
-+static cycle_t xgbe_cc_read(const struct cyclecounter *cc)
-+{
-+	struct xgbe_prv_data *pdata = container_of(cc,
-+						   struct xgbe_prv_data,
-+						   tstamp_cc);
-+	u64 nsec;
-+
-+	nsec = pdata->hw_if.get_tstamp_time(pdata);
-+
-+	return nsec;
-+}
-+
-+static int xgbe_adjfreq(struct ptp_clock_info *info, s32 delta)
-+{
-+	struct xgbe_prv_data *pdata = container_of(info,
-+						   struct xgbe_prv_data,
-+						   ptp_clock_info);
-+	unsigned long flags;
-+	u64 adjust;
-+	u32 addend, diff;
-+	unsigned int neg_adjust = 0;
-+
-+	if (delta < 0) {
-+		neg_adjust = 1;
-+		delta = -delta;
-+	}
-+
-+	adjust = pdata->tstamp_addend;
-+	adjust *= delta;
-+	diff = div_u64(adjust, 1000000000UL);
-+
-+	addend = (neg_adjust) ? pdata->tstamp_addend - diff :
-+				pdata->tstamp_addend + diff;
-+
-+	spin_lock_irqsave(&pdata->tstamp_lock, flags);
-+
-+	pdata->hw_if.update_tstamp_addend(pdata, addend);
-+
-+	spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
-+
-+	return 0;
-+}
-+
-+static int xgbe_adjtime(struct ptp_clock_info *info, s64 delta)
-+{
-+	struct xgbe_prv_data *pdata = container_of(info,
-+						   struct xgbe_prv_data,
-+						   ptp_clock_info);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&pdata->tstamp_lock, flags);
-+	timecounter_adjtime(&pdata->tstamp_tc, delta);
-+	spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
-+
-+	return 0;
-+}
-+
-+static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts)
-+{
-+	struct xgbe_prv_data *pdata = container_of(info,
-+						   struct xgbe_prv_data,
-+						   ptp_clock_info);
-+	unsigned long flags;
-+	u64 nsec;
-+
-+	spin_lock_irqsave(&pdata->tstamp_lock, flags);
-+
-+	nsec = timecounter_read(&pdata->tstamp_tc);
-+
-+	spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
-+
-+	*ts = ns_to_timespec64(nsec);
-+
-+	return 0;
-+}
-+
-+static int xgbe_settime(struct ptp_clock_info *info, const struct timespec64 *ts)
-+{
-+	struct xgbe_prv_data *pdata = container_of(info,
-+						   struct xgbe_prv_data,
-+						   ptp_clock_info);
-+	unsigned long flags;
-+	u64 nsec;
-+
-+	nsec = timespec64_to_ns(ts);
-+
-+	spin_lock_irqsave(&pdata->tstamp_lock, flags);
-+
-+	timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, nsec);
-+
-+	spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
-+
-+	return 0;
-+}
-+
-+static int xgbe_enable(struct ptp_clock_info *info,
-+		       struct ptp_clock_request *request, int on)
-+{
-+	return -EOPNOTSUPP;
-+}
-+
-+void xgbe_a0_ptp_register(struct xgbe_prv_data *pdata)
-+{
-+	struct ptp_clock_info *info = &pdata->ptp_clock_info;
-+	struct ptp_clock *clock;
-+	struct cyclecounter *cc = &pdata->tstamp_cc;
-+	u64 dividend;
-+
-+	snprintf(info->name, sizeof(info->name), "%s",
-+		 netdev_name(pdata->netdev));
-+	info->owner = THIS_MODULE;
-+	info->max_adj = pdata->ptpclk_rate;
-+	info->adjfreq = xgbe_adjfreq;
-+	info->adjtime = xgbe_adjtime;
-+	info->gettime64 = xgbe_gettime;
-+	info->settime64 = xgbe_settime;
-+	info->enable = xgbe_enable;
-+
-+	clock = ptp_clock_register(info, pdata->dev);
-+	if (IS_ERR(clock)) {
-+		dev_err(pdata->dev, "ptp_clock_register failed\n");
-+		return;
-+	}
-+
-+	pdata->ptp_clock = clock;
-+
-+	/* Calculate the addend:
-+	 *   addend = 2^32 / (PTP ref clock / 50Mhz)
-+	 *          = (2^32 * 50Mhz) / PTP ref clock
-+	 */
-+	dividend = 50000000;
-+	dividend <<= 32;
-+	pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate);
-+
-+	/* Setup the timecounter */
-+	cc->read = xgbe_cc_read;
-+	cc->mask = CLOCKSOURCE_MASK(64);
-+	cc->mult = 1;
-+	cc->shift = 0;
-+
-+	timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc,
-+			 ktime_to_ns(ktime_get_real()));
-+
-+	/* Disable all timestamping to start */
-+	XGMAC_IOWRITE(pdata, MAC_TCR, 0);
-+	pdata->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
-+	pdata->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
-+}
-+
-+void xgbe_a0_ptp_unregister(struct xgbe_prv_data *pdata)
-+{
-+	if (pdata->ptp_clock)
-+		ptp_clock_unregister(pdata->ptp_clock);
-+}
-diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe.h b/drivers/net/ethernet/amd/xgbe-a0/xgbe.h
-new file mode 100644
-index 0000000..04c00d2
---- /dev/null
-+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe.h
-@@ -0,0 +1,868 @@
-+/*
-+ * AMD 10Gb Ethernet driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ *
-+ * This file incorporates work covered by the following copyright and
-+ * permission notice:
-+ *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
-+ *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
-+ *     Inc. unless otherwise expressly agreed to in writing between Synopsys
-+ *     and you.
-+ *
-+ *     The Software IS NOT an item of Licensed Software or Licensed Product
-+ *     under any End User Software License Agreement or Agreement for Licensed
-+ *     Product with Synopsys or any supplement thereto.  Permission is hereby
-+ *     granted, free of charge, to any person obtaining a copy of this software
-+ *     annotated with this license and the Software, to deal in the Software
-+ *     without restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
-+ *     of the Software, and to permit persons to whom the Software is furnished
-+ *     to do so, subject to the following conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be included
-+ *     in all copies or substantial portions of the Software.
-+ *
-+ *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
-+ *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+ *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+ *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
-+ *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-+ *     THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#ifndef __XGBE_H__
-+#define __XGBE_H__
-+
-+#include <linux/dma-mapping.h>
-+#include <linux/netdevice.h>
-+#include <linux/workqueue.h>
-+#include <linux/phy.h>
-+#include <linux/if_vlan.h>
-+#include <linux/bitops.h>
-+#include <linux/ptp_clock_kernel.h>
-+#include <linux/timecounter.h>
-+#include <linux/net_tstamp.h>
-+#include <net/dcbnl.h>
-+
-+#define XGBE_DRV_NAME		"amd-xgbe"
-+#define XGBE_DRV_VERSION	"0.0.0-a"
-+#define XGBE_DRV_DESC		"AMD 10 Gigabit Ethernet Driver"
-+
-+/* Descriptor related defines */
-+#define XGBE_TX_DESC_CNT	512
-+#define XGBE_TX_DESC_MIN_FREE	(XGBE_TX_DESC_CNT >> 3)
-+#define XGBE_TX_DESC_MAX_PROC	(XGBE_TX_DESC_CNT >> 1)
-+#define XGBE_RX_DESC_CNT	512
-+
-+#define XGBE_TX_MAX_BUF_SIZE	(0x3fff & ~(64 - 1))
-+
-+/* Descriptors required for maximum contigous TSO/GSO packet */
-+#define XGBE_TX_MAX_SPLIT	((GSO_MAX_SIZE / XGBE_TX_MAX_BUF_SIZE) + 1)
-+
-+/* Maximum possible descriptors needed for an SKB:
-+ * - Maximum number of SKB frags
-+ * - Maximum descriptors for contiguous TSO/GSO packet
-+ * - Possible context descriptor
-+ * - Possible TSO header descriptor
-+ */
-+#define XGBE_TX_MAX_DESCS	(MAX_SKB_FRAGS + XGBE_TX_MAX_SPLIT + 2)
-+
-+#define XGBE_RX_MIN_BUF_SIZE	(ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
-+#define XGBE_RX_BUF_ALIGN	64
-+#define XGBE_SKB_ALLOC_SIZE	256
-+#define XGBE_SPH_HDSMS_SIZE	2	/* Keep in sync with SKB_ALLOC_SIZE */
-+
-+#define XGBE_MAX_DMA_CHANNELS	16
-+#define XGBE_MAX_QUEUES		16
-+#define XGBE_DMA_STOP_TIMEOUT	5
-+
-+/* DMA cache settings - Outer sharable, write-back, write-allocate */
-+#define XGBE_DMA_OS_AXDOMAIN	0x2
-+#define XGBE_DMA_OS_ARCACHE	0xb
-+#define XGBE_DMA_OS_AWCACHE	0xf
-+
-+/* DMA cache settings - System, no caches used */
-+#define XGBE_DMA_SYS_AXDOMAIN	0x3
-+#define XGBE_DMA_SYS_ARCACHE	0x0
-+#define XGBE_DMA_SYS_AWCACHE	0x0
-+
-+#define XGBE_DMA_INTERRUPT_MASK	0x31c7
-+
-+#define XGMAC_MIN_PACKET	60
-+#define XGMAC_STD_PACKET_MTU	1500
-+#define XGMAC_MAX_STD_PACKET	1518
-+#define XGMAC_JUMBO_PACKET_MTU	9000
-+#define XGMAC_MAX_JUMBO_PACKET	9018
-+
-+/* MDIO bus phy name */
-+#define XGBE_PHY_NAME		"amd_xgbe_phy_a0"
-+#define XGBE_PRTAD		0
-+
-+/* Common property names */
-+#define XGBE_MAC_ADDR_PROPERTY	"mac-address"
-+#define XGBE_PHY_MODE_PROPERTY	"phy-mode"
-+#define XGBE_DMA_IRQS_PROPERTY	"amd,per-channel-interrupt"
-+
-+/* Device-tree clock names */
-+#define XGBE_DMA_CLOCK		"dma_clk"
-+#define XGBE_PTP_CLOCK		"ptp_clk"
-+
-+/* ACPI property names */
-+#define XGBE_ACPI_DMA_FREQ	"amd,dma-freq"
-+#define XGBE_ACPI_PTP_FREQ	"amd,ptp-freq"
-+
-+/* Timestamp support - values based on 50MHz PTP clock
-+ *   50MHz => 20 nsec
-+ */
-+#define XGBE_TSTAMP_SSINC	20
-+#define XGBE_TSTAMP_SNSINC	0
-+
-+/* Driver PMT macros */
-+#define XGMAC_DRIVER_CONTEXT	1
-+#define XGMAC_IOCTL_CONTEXT	2
-+
-+#define XGBE_FIFO_MAX		81920
-+#define XGBE_FIFO_SIZE_B(x)	(x)
-+#define XGBE_FIFO_SIZE_KB(x)	(x * 1024)
-+
-+#define XGBE_TC_MIN_QUANTUM	10
-+
-+/* Helper macro for descriptor handling
-+ *  Always use XGBE_GET_DESC_DATA to access the descriptor data
-+ *  since the index is free-running and needs to be and-ed
-+ *  with the descriptor count value of the ring to index to
-+ *  the proper descriptor data.
-+ */
-+#define XGBE_GET_DESC_DATA(_ring, _idx)				\
-+	((_ring)->rdata +					\
-+	 ((_idx) & ((_ring)->rdesc_count - 1)))
-+
-+/* Default coalescing parameters */
-+#define XGMAC_INIT_DMA_TX_USECS		50
-+#define XGMAC_INIT_DMA_TX_FRAMES	25
-+
-+#define XGMAC_MAX_DMA_RIWT		0xff
-+#define XGMAC_INIT_DMA_RX_USECS		30
-+#define XGMAC_INIT_DMA_RX_FRAMES	25
-+
-+/* Flow control queue count */
-+#define XGMAC_MAX_FLOW_CONTROL_QUEUES	8
-+
-+/* Maximum MAC address hash table size (256 bits = 8 bytes) */
-+#define XGBE_MAC_HASH_TABLE_SIZE	8
-+
-+/* Receive Side Scaling */
-+#define XGBE_RSS_HASH_KEY_SIZE		40
-+#define XGBE_RSS_MAX_TABLE_SIZE		256
-+#define XGBE_RSS_LOOKUP_TABLE_TYPE	0
-+#define XGBE_RSS_HASH_KEY_TYPE		1
-+
-+struct xgbe_prv_data;
-+
-+struct xgbe_packet_data {
-+	struct sk_buff *skb;
-+
-+	unsigned int attributes;
-+
-+	unsigned int errors;
-+
-+	unsigned int rdesc_count;
-+	unsigned int length;
-+
-+	unsigned int header_len;
-+	unsigned int tcp_header_len;
-+	unsigned int tcp_payload_len;
-+	unsigned short mss;
-+
-+	unsigned short vlan_ctag;
-+
-+	u64 rx_tstamp;
-+
-+	u32 rss_hash;
-+	enum pkt_hash_types rss_hash_type;
-+
-+	unsigned int tx_packets;
-+	unsigned int tx_bytes;
-+};
-+
-+/* Common Rx and Tx descriptor mapping */
-+struct xgbe_ring_desc {
-+	__le32 desc0;
-+	__le32 desc1;
-+	__le32 desc2;
-+	__le32 desc3;
-+};
-+
-+/* Page allocation related values */
-+struct xgbe_page_alloc {
-+	struct page *pages;
-+	unsigned int pages_len;
-+	unsigned int pages_offset;
-+
-+	dma_addr_t pages_dma;
-+};
-+
-+/* Ring entry buffer data */
-+struct xgbe_buffer_data {
-+	struct xgbe_page_alloc pa;
-+	struct xgbe_page_alloc pa_unmap;
-+
-+	dma_addr_t dma;
-+	unsigned int dma_len;
-+};
-+
-+/* Tx-related ring data */
-+struct xgbe_tx_ring_data {
-+	unsigned int packets;		/* BQL packet count */
-+	unsigned int bytes;		/* BQL byte count */
-+};
-+
-+/* Rx-related ring data */
-+struct xgbe_rx_ring_data {
-+	struct xgbe_buffer_data hdr;	/* Header locations */
-+	struct xgbe_buffer_data buf;	/* Payload locations */
-+
-+	unsigned short hdr_len;		/* Length of received header */
-+	unsigned short len;		/* Length of received packet */
-+};
-+
-+/* Structure used to hold information related to the descriptor
-+ * and the packet associated with the descriptor (always use
-+ * use the XGBE_GET_DESC_DATA macro to access this data from the ring)
-+ */
-+struct xgbe_ring_data {
-+	struct xgbe_ring_desc *rdesc;	/* Virtual address of descriptor */
-+	dma_addr_t rdesc_dma;		/* DMA address of descriptor */
-+
-+	struct sk_buff *skb;		/* Virtual address of SKB */
-+	dma_addr_t skb_dma;		/* DMA address of SKB data */
-+	unsigned int skb_dma_len;	/* Length of SKB DMA area */
-+
-+	struct xgbe_tx_ring_data tx;	/* Tx-related data */
-+	struct xgbe_rx_ring_data rx;	/* Rx-related data */
-+
-+	unsigned int interrupt;		/* Interrupt indicator */
-+
-+	unsigned int mapped_as_page;
-+
-+	/* Incomplete receive save location.  If the budget is exhausted
-+	 * or the last descriptor (last normal descriptor or a following
-+	 * context descriptor) has not been DMA'd yet the current state
-+	 * of the receive processing needs to be saved.
-+	 */
-+	unsigned int state_saved;
-+	struct {
-+		unsigned int incomplete;
-+		unsigned int context_next;
-+		struct sk_buff *skb;
-+		unsigned int len;
-+		unsigned int error;
-+	} state;
-+};
-+
-+struct xgbe_ring {
-+	/* Ring lock - used just for TX rings at the moment */
-+	spinlock_t lock;
-+
-+	/* Per packet related information */
-+	struct xgbe_packet_data packet_data;
-+
-+	/* Virtual/DMA addresses and count of allocated descriptor memory */
-+	struct xgbe_ring_desc *rdesc;
-+	dma_addr_t rdesc_dma;
-+	unsigned int rdesc_count;
-+
-+	/* Array of descriptor data corresponding the descriptor memory
-+	 * (always use the XGBE_GET_DESC_DATA macro to access this data)
-+	 */
-+	struct xgbe_ring_data *rdata;
-+
-+	/* Page allocation for RX buffers */
-+	struct xgbe_page_alloc rx_hdr_pa;
-+	struct xgbe_page_alloc rx_buf_pa;
-+
-+	/* Ring index values
-+	 *  cur   - Tx: index of descriptor to be used for current transfer
-+	 *          Rx: index of descriptor to check for packet availability
-+	 *  dirty - Tx: index of descriptor to check for transfer complete
-+	 *          Rx: index of descriptor to check for buffer reallocation
-+	 */
-+	unsigned int cur;
-+	unsigned int dirty;
-+
-+	/* Coalesce frame count used for interrupt bit setting */
-+	unsigned int coalesce_count;
-+
-+	union {
-+		struct {
-+			unsigned int queue_stopped;
-+			unsigned int xmit_more;
-+			unsigned short cur_mss;
-+			unsigned short cur_vlan_ctag;
-+		} tx;
-+	};
-+} ____cacheline_aligned;
-+
-+/* Structure used to describe the descriptor rings associated with
-+ * a DMA channel.
-+ */
-+struct xgbe_channel {
-+	char name[16];
-+
-+	/* Address of private data area for device */
-+	struct xgbe_prv_data *pdata;
-+
-+	/* Queue index and base address of queue's DMA registers */
-+	unsigned int queue_index;
-+	void __iomem *dma_regs;
-+
-+	/* Per channel interrupt irq number */
-+	int dma_irq;
-+	char dma_irq_name[IFNAMSIZ + 32];
-+
-+	/* Netdev related settings */
-+	struct napi_struct napi;
-+
-+	unsigned int saved_ier;
-+
-+	unsigned int tx_timer_active;
-+	struct hrtimer tx_timer;
-+
-+	struct xgbe_ring *tx_ring;
-+	struct xgbe_ring *rx_ring;
-+} ____cacheline_aligned;
-+
-+enum xgbe_int {
-+	XGMAC_INT_DMA_CH_SR_TI,
-+	XGMAC_INT_DMA_CH_SR_TPS,
-+	XGMAC_INT_DMA_CH_SR_TBU,
-+	XGMAC_INT_DMA_CH_SR_RI,
-+	XGMAC_INT_DMA_CH_SR_RBU,
-+	XGMAC_INT_DMA_CH_SR_RPS,
-+	XGMAC_INT_DMA_CH_SR_TI_RI,
-+	XGMAC_INT_DMA_CH_SR_FBE,
-+	XGMAC_INT_DMA_ALL,
-+};
-+
-+enum xgbe_int_state {
-+	XGMAC_INT_STATE_SAVE,
-+	XGMAC_INT_STATE_RESTORE,
-+};
-+
-+enum xgbe_mtl_fifo_size {
-+	XGMAC_MTL_FIFO_SIZE_256  = 0x00,
-+	XGMAC_MTL_FIFO_SIZE_512  = 0x01,
-+	XGMAC_MTL_FIFO_SIZE_1K   = 0x03,
-+	XGMAC_MTL_FIFO_SIZE_2K   = 0x07,
-+	XGMAC_MTL_FIFO_SIZE_4K   = 0x0f,
-+	XGMAC_MTL_FIFO_SIZE_8K   = 0x1f,
-+	XGMAC_MTL_FIFO_SIZE_16K  = 0x3f,
-+	XGMAC_MTL_FIFO_SIZE_32K  = 0x7f,
-+	XGMAC_MTL_FIFO_SIZE_64K  = 0xff,
-+	XGMAC_MTL_FIFO_SIZE_128K = 0x1ff,
-+	XGMAC_MTL_FIFO_SIZE_256K = 0x3ff,
-+};
-+
-+struct xgbe_mmc_stats {
-+	/* Tx Stats */
-+	u64 txoctetcount_gb;
-+	u64 txframecount_gb;
-+	u64 txbroadcastframes_g;
-+	u64 txmulticastframes_g;
-+	u64 tx64octets_gb;
-+	u64 tx65to127octets_gb;
-+	u64 tx128to255octets_gb;
-+	u64 tx256to511octets_gb;
-+	u64 tx512to1023octets_gb;
-+	u64 tx1024tomaxoctets_gb;
-+	u64 txunicastframes_gb;
-+	u64 txmulticastframes_gb;
-+	u64 txbroadcastframes_gb;
-+	u64 txunderflowerror;
-+	u64 txoctetcount_g;
-+	u64 txframecount_g;
-+	u64 txpauseframes;
-+	u64 txvlanframes_g;
-+
-+	/* Rx Stats */
-+	u64 rxframecount_gb;
-+	u64 rxoctetcount_gb;
-+	u64 rxoctetcount_g;
-+	u64 rxbroadcastframes_g;
-+	u64 rxmulticastframes_g;
-+	u64 rxcrcerror;
-+	u64 rxrunterror;
-+	u64 rxjabbererror;
-+	u64 rxundersize_g;
-+	u64 rxoversize_g;
-+	u64 rx64octets_gb;
-+	u64 rx65to127octets_gb;
-+	u64 rx128to255octets_gb;
-+	u64 rx256to511octets_gb;
-+	u64 rx512to1023octets_gb;
-+	u64 rx1024tomaxoctets_gb;
-+	u64 rxunicastframes_g;
-+	u64 rxlengtherror;
-+	u64 rxoutofrangetype;
-+	u64 rxpauseframes;
-+	u64 rxfifooverflow;
-+	u64 rxvlanframes_gb;
-+	u64 rxwatchdogerror;
-+};
-+
-+struct xgbe_hw_if {
-+	int (*tx_complete)(struct xgbe_ring_desc *);
-+
-+	int (*set_promiscuous_mode)(struct xgbe_prv_data *, unsigned int);
-+	int (*set_all_multicast_mode)(struct xgbe_prv_data *, unsigned int);
-+	int (*add_mac_addresses)(struct xgbe_prv_data *);
-+	int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
-+
-+	int (*enable_rx_csum)(struct xgbe_prv_data *);
-+	int (*disable_rx_csum)(struct xgbe_prv_data *);
-+
-+	int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *);
-+	int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *);
-+	int (*enable_rx_vlan_filtering)(struct xgbe_prv_data *);
-+	int (*disable_rx_vlan_filtering)(struct xgbe_prv_data *);
-+	int (*update_vlan_hash_table)(struct xgbe_prv_data *);
-+
-+	int (*read_mmd_regs)(struct xgbe_prv_data *, int, int);
-+	void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int);
-+	int (*set_gmii_speed)(struct xgbe_prv_data *);
-+	int (*set_gmii_2500_speed)(struct xgbe_prv_data *);
-+	int (*set_xgmii_speed)(struct xgbe_prv_data *);
-+
-+	void (*enable_tx)(struct xgbe_prv_data *);
-+	void (*disable_tx)(struct xgbe_prv_data *);
-+	void (*enable_rx)(struct xgbe_prv_data *);
-+	void (*disable_rx)(struct xgbe_prv_data *);
-+
-+	void (*powerup_tx)(struct xgbe_prv_data *);
-+	void (*powerdown_tx)(struct xgbe_prv_data *);
-+	void (*powerup_rx)(struct xgbe_prv_data *);
-+	void (*powerdown_rx)(struct xgbe_prv_data *);
-+
-+	int (*init)(struct xgbe_prv_data *);
-+	int (*exit)(struct xgbe_prv_data *);
-+
-+	int (*enable_int)(struct xgbe_channel *, enum xgbe_int);
-+	int (*disable_int)(struct xgbe_channel *, enum xgbe_int);
-+	void (*dev_xmit)(struct xgbe_channel *);
-+	int (*dev_read)(struct xgbe_channel *);
-+	void (*tx_desc_init)(struct xgbe_channel *);
-+	void (*rx_desc_init)(struct xgbe_channel *);
-+	void (*rx_desc_reset)(struct xgbe_ring_data *);
-+	void (*tx_desc_reset)(struct xgbe_ring_data *);
-+	int (*is_last_desc)(struct xgbe_ring_desc *);
-+	int (*is_context_desc)(struct xgbe_ring_desc *);
-+	void (*tx_start_xmit)(struct xgbe_channel *, struct xgbe_ring *);
-+
-+	/* For FLOW ctrl */
-+	int (*config_tx_flow_control)(struct xgbe_prv_data *);
-+	int (*config_rx_flow_control)(struct xgbe_prv_data *);
-+
-+	/* For RX coalescing */
-+	int (*config_rx_coalesce)(struct xgbe_prv_data *);
-+	int (*config_tx_coalesce)(struct xgbe_prv_data *);
-+	unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int);
-+	unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int);
-+
-+	/* For RX and TX threshold config */
-+	int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int);
-+	int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int);
-+
-+	/* For RX and TX Store and Forward Mode config */
-+	int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int);
-+	int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int);
-+
-+	/* For TX DMA Operate on Second Frame config */
-+	int (*config_osp_mode)(struct xgbe_prv_data *);
-+
-+	/* For RX and TX PBL config */
-+	int (*config_rx_pbl_val)(struct xgbe_prv_data *);
-+	int (*get_rx_pbl_val)(struct xgbe_prv_data *);
-+	int (*config_tx_pbl_val)(struct xgbe_prv_data *);
-+	int (*get_tx_pbl_val)(struct xgbe_prv_data *);
-+	int (*config_pblx8)(struct xgbe_prv_data *);
-+
-+	/* For MMC statistics */
-+	void (*rx_mmc_int)(struct xgbe_prv_data *);
-+	void (*tx_mmc_int)(struct xgbe_prv_data *);
-+	void (*read_mmc_stats)(struct xgbe_prv_data *);
-+
-+	/* For Timestamp config */
-+	int (*config_tstamp)(struct xgbe_prv_data *, unsigned int);
-+	void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int);
-+	void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec,
-+				unsigned int nsec);
-+	u64 (*get_tstamp_time)(struct xgbe_prv_data *);
-+	u64 (*get_tx_tstamp)(struct xgbe_prv_data *);
-+
-+	/* For Data Center Bridging config */
-+	void (*config_dcb_tc)(struct xgbe_prv_data *);
-+	void (*config_dcb_pfc)(struct xgbe_prv_data *);
-+
-+	/* For Receive Side Scaling */
-+	int (*enable_rss)(struct xgbe_prv_data *);
-+	int (*disable_rss)(struct xgbe_prv_data *);
-+	int (*set_rss_hash_key)(struct xgbe_prv_data *, const u8 *);
-+	int (*set_rss_lookup_table)(struct xgbe_prv_data *, const u32 *);
-+};
-+
-+struct xgbe_desc_if {
-+	int (*alloc_ring_resources)(struct xgbe_prv_data *);
-+	void (*free_ring_resources)(struct xgbe_prv_data *);
-+	int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *);
-+	int (*map_rx_buffer)(struct xgbe_prv_data *, struct xgbe_ring *,
-+			     struct xgbe_ring_data *);
-+	void (*unmap_rdata)(struct xgbe_prv_data *, struct xgbe_ring_data *);
-+	void (*wrapper_tx_desc_init)(struct xgbe_prv_data *);
-+	void (*wrapper_rx_desc_init)(struct xgbe_prv_data *);
-+};
-+
-+/* This structure contains flags that indicate what hardware features
-+ * or configurations are present in the device.
-+ */
-+struct xgbe_hw_features {
-+	/* HW Version */
-+	unsigned int version;
-+
-+	/* HW Feature Register0 */
-+	unsigned int gmii;		/* 1000 Mbps support */
-+	unsigned int vlhash;		/* VLAN Hash Filter */
-+	unsigned int sma;		/* SMA(MDIO) Interface */
-+	unsigned int rwk;		/* PMT remote wake-up packet */
-+	unsigned int mgk;		/* PMT magic packet */
-+	unsigned int mmc;		/* RMON module */
-+	unsigned int aoe;		/* ARP Offload */
-+	unsigned int ts;		/* IEEE 1588-2008 Adavanced Timestamp */
-+	unsigned int eee;		/* Energy Efficient Ethernet */
-+	unsigned int tx_coe;		/* Tx Checksum Offload */
-+	unsigned int rx_coe;		/* Rx Checksum Offload */
-+	unsigned int addn_mac;		/* Additional MAC Addresses */
-+	unsigned int ts_src;		/* Timestamp Source */
-+	unsigned int sa_vlan_ins;	/* Source Address or VLAN Insertion */
-+
-+	/* HW Feature Register1 */
-+	unsigned int rx_fifo_size;	/* MTL Receive FIFO Size */
-+	unsigned int tx_fifo_size;	/* MTL Transmit FIFO Size */
-+	unsigned int adv_ts_hi;		/* Advance Timestamping High Word */
-+	unsigned int dcb;		/* DCB Feature */
-+	unsigned int sph;		/* Split Header Feature */
-+	unsigned int tso;		/* TCP Segmentation Offload */
-+	unsigned int dma_debug;		/* DMA Debug Registers */
-+	unsigned int rss;		/* Receive Side Scaling */
-+	unsigned int tc_cnt;		/* Number of Traffic Classes */
-+	unsigned int hash_table_size;	/* Hash Table Size */
-+	unsigned int l3l4_filter_num;	/* Number of L3-L4 Filters */
-+
-+	/* HW Feature Register2 */
-+	unsigned int rx_q_cnt;		/* Number of MTL Receive Queues */
-+	unsigned int tx_q_cnt;		/* Number of MTL Transmit Queues */
-+	unsigned int rx_ch_cnt;		/* Number of DMA Receive Channels */
-+	unsigned int tx_ch_cnt;		/* Number of DMA Transmit Channels */
-+	unsigned int pps_out_num;	/* Number of PPS outputs */
-+	unsigned int aux_snap_num;	/* Number of Aux snapshot inputs */
-+};
-+
-+struct xgbe_prv_data {
-+	struct net_device *netdev;
-+	struct platform_device *pdev;
-+	struct acpi_device *adev;
-+	struct device *dev;
-+
-+	/* ACPI or DT flag */
-+	unsigned int use_acpi;
-+
-+	/* XGMAC/XPCS related mmio registers */
-+	void __iomem *xgmac_regs;	/* XGMAC CSRs */
-+	void __iomem *xpcs_regs;	/* XPCS MMD registers */
-+
-+	/* Overall device lock */
-+	spinlock_t lock;
-+
-+	/* XPCS indirect addressing mutex */
-+	struct mutex xpcs_mutex;
-+
-+	/* RSS addressing mutex */
-+	struct mutex rss_mutex;
-+
-+	int dev_irq;
-+	unsigned int per_channel_irq;
-+
-+	struct xgbe_hw_if hw_if;
-+	struct xgbe_desc_if desc_if;
-+
-+	/* AXI DMA settings */
-+	unsigned int coherent;
-+	unsigned int axdomain;
-+	unsigned int arcache;
-+	unsigned int awcache;
-+
-+	/* Rings for Tx/Rx on a DMA channel */
-+	struct xgbe_channel *channel;
-+	unsigned int channel_count;
-+	unsigned int tx_ring_count;
-+	unsigned int tx_desc_count;
-+	unsigned int rx_ring_count;
-+	unsigned int rx_desc_count;
-+
-+	unsigned int tx_q_count;
-+	unsigned int rx_q_count;
-+
-+	/* Tx/Rx common settings */
-+	unsigned int pblx8;
-+
-+	/* Tx settings */
-+	unsigned int tx_sf_mode;
-+	unsigned int tx_threshold;
-+	unsigned int tx_pbl;
-+	unsigned int tx_osp_mode;
-+
-+	/* Rx settings */
-+	unsigned int rx_sf_mode;
-+	unsigned int rx_threshold;
-+	unsigned int rx_pbl;
-+
-+	/* Tx coalescing settings */
-+	unsigned int tx_usecs;
-+	unsigned int tx_frames;
-+
-+	/* Rx coalescing settings */
-+	unsigned int rx_riwt;
-+	unsigned int rx_frames;
-+
-+	/* Current Rx buffer size */
-+	unsigned int rx_buf_size;
-+
-+	/* Flow control settings */
-+	unsigned int pause_autoneg;
-+	unsigned int tx_pause;
-+	unsigned int rx_pause;
-+
-+	/* Receive Side Scaling settings */
-+	u8 rss_key[XGBE_RSS_HASH_KEY_SIZE];
-+	u32 rss_table[XGBE_RSS_MAX_TABLE_SIZE];
-+	u32 rss_options;
-+
-+	/* MDIO settings */
-+	struct module *phy_module;
-+	char *mii_bus_id;
-+	struct mii_bus *mii;
-+	int mdio_mmd;
-+	struct phy_device *phydev;
-+	int default_autoneg;
-+	int default_speed;
-+
-+	/* Current PHY settings */
-+	phy_interface_t phy_mode;
-+	int phy_link;
-+	int phy_speed;
-+	unsigned int phy_tx_pause;
-+	unsigned int phy_rx_pause;
-+
-+	/* Netdev related settings */
-+	unsigned char mac_addr[ETH_ALEN];
-+	netdev_features_t netdev_features;
-+	struct napi_struct napi;
-+	struct xgbe_mmc_stats mmc_stats;
-+
-+	/* Filtering support */
-+	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
-+
-+	/* Device clocks */
-+	struct clk *sysclk;
-+	unsigned long sysclk_rate;
-+	struct clk *ptpclk;
-+	unsigned long ptpclk_rate;
-+
-+	/* Timestamp support */
-+	spinlock_t tstamp_lock;
-+	struct ptp_clock_info ptp_clock_info;
-+	struct ptp_clock *ptp_clock;
-+	struct hwtstamp_config tstamp_config;
-+	struct cyclecounter tstamp_cc;
-+	struct timecounter tstamp_tc;
-+	unsigned int tstamp_addend;
-+	struct work_struct tx_tstamp_work;
-+	struct sk_buff *tx_tstamp_skb;
-+	u64 tx_tstamp;
-+
-+	/* DCB support */
-+	struct ieee_ets *ets;
-+	struct ieee_pfc *pfc;
-+	unsigned int q2tc_map[XGBE_MAX_QUEUES];
-+	unsigned int prio2q_map[IEEE_8021QAZ_MAX_TCS];
-+
-+	/* Hardware features of the device */
-+	struct xgbe_hw_features hw_feat;
-+
-+	/* Device restart work structure */
-+	struct work_struct restart_work;
-+
-+	/* Keeps track of power mode */
-+	unsigned int power_down;
-+
-+#ifdef CONFIG_DEBUG_FS
-+	struct dentry *xgbe_debugfs;
-+
-+	unsigned int debugfs_xgmac_reg;
-+
-+	unsigned int debugfs_xpcs_mmd;
-+	unsigned int debugfs_xpcs_reg;
-+#endif
-+};
-+
-+/* Function prototypes*/
-+
-+void xgbe_a0_init_function_ptrs_dev(struct xgbe_hw_if *);
-+void xgbe_a0_init_function_ptrs_desc(struct xgbe_desc_if *);
-+struct net_device_ops *xgbe_a0_get_netdev_ops(void);
-+struct ethtool_ops *xgbe_a0_get_ethtool_ops(void);
-+#ifdef CONFIG_AMD_XGBE_DCB
-+const struct dcbnl_rtnl_ops *xgbe_a0_get_dcbnl_ops(void);
-+#endif
-+
-+int xgbe_a0_mdio_register(struct xgbe_prv_data *);
-+void xgbe_a0_mdio_unregister(struct xgbe_prv_data *);
-+void xgbe_a0_dump_phy_registers(struct xgbe_prv_data *);
-+void xgbe_a0_ptp_register(struct xgbe_prv_data *);
-+void xgbe_a0_ptp_unregister(struct xgbe_prv_data *);
-+void xgbe_a0_dump_tx_desc(struct xgbe_ring *, unsigned int, unsigned int,
-+		       unsigned int);
-+void xgbe_a0_dump_rx_desc(struct xgbe_ring *, struct xgbe_ring_desc *,
-+		       unsigned int);
-+void xgbe_a0_print_pkt(struct net_device *, struct sk_buff *, bool);
-+void xgbe_a0_get_all_hw_features(struct xgbe_prv_data *);
-+int xgbe_a0_powerup(struct net_device *, unsigned int);
-+int xgbe_a0_powerdown(struct net_device *, unsigned int);
-+void xgbe_a0_init_rx_coalesce(struct xgbe_prv_data *);
-+void xgbe_a0_init_tx_coalesce(struct xgbe_prv_data *);
-+
-+#ifdef CONFIG_DEBUG_FS
-+void xgbe_a0_debugfs_init(struct xgbe_prv_data *);
-+void xgbe_a0_debugfs_exit(struct xgbe_prv_data *);
-+#else
-+static inline void xgbe_a0_debugfs_init(struct xgbe_prv_data *pdata) {}
-+static inline void xgbe_a0_debugfs_exit(struct xgbe_prv_data *pdata) {}
-+#endif /* CONFIG_DEBUG_FS */
-+
-+/* NOTE: Uncomment for TX and RX DESCRIPTOR DUMP in KERNEL LOG */
-+#if 0
-+#define XGMAC_ENABLE_TX_DESC_DUMP
-+#define XGMAC_ENABLE_RX_DESC_DUMP
-+#endif
-+
-+/* NOTE: Uncomment for TX and RX PACKET DUMP in KERNEL LOG */
-+#if 0
-+#define XGMAC_ENABLE_TX_PKT_DUMP
-+#define XGMAC_ENABLE_RX_PKT_DUMP
-+#endif
-+
-+/* NOTE: Uncomment for function trace log messages in KERNEL LOG */
-+#if 0
-+#define YDEBUG
-+#define YDEBUG_MDIO
-+#endif
-+
-+/* For debug prints */
-+#ifdef YDEBUG
-+#define DBGPR(x...) pr_alert(x)
-+#define DBGPHY_REGS(x...) xgbe_a0_dump_phy_registers(x)
-+#else
-+#define DBGPR(x...) do { } while (0)
-+#define DBGPHY_REGS(x...) do { } while (0)
-+#endif
-+
-+#ifdef YDEBUG_MDIO
-+#define DBGPR_MDIO(x...) pr_alert(x)
-+#else
-+#define DBGPR_MDIO(x...) do { } while (0)
-+#endif
-+
-+#endif
---
-cgit v0.9.2
diff --git a/freed-ora/current/f24/amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch b/freed-ora/current/f24/amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch
deleted file mode 100644
index cd4329348..000000000
--- a/freed-ora/current/f24/amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch
+++ /dev/null
@@ -1,1861 +0,0 @@
-From 94c958a307f70c5d6c7103b4d2342b54077c7a23 Mon Sep 17 00:00:00 2001
-From: Tom Lendacky <thomas.lendacky@amd.com>
-Date: Tue, 17 Mar 2015 15:58:38 +0000
-Subject: amd-xgbe-phy-a0: Add support for XGBE PHY on A0
-
-Add XGBE phy driver support for A0 hardware.
-
-Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
----
-diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
-index 60994a8..ca52987 100644
---- a/drivers/net/phy/Kconfig
-+++ b/drivers/net/phy/Kconfig
-@@ -29,6 +29,13 @@ config AMD_PHY
- 	---help---
- 	  Currently supports the am79c874
- 
-+config AMD_XGBE_PHY
-+	tristate "Driver for the AMD 10GbE (amd-xgbe) PHYs"
-+	depends on (OF || ACPI) && HAS_IOMEM
-+	depends on ARM64 || COMPILE_TEST
-+	---help---
-+	  Currently supports the AMD 10GbE PHY
-+
- config MARVELL_PHY
- 	tristate "Drivers for Marvell PHYs"
- 	---help---
-diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
-index f31a4e2..c2336b9 100644
---- a/drivers/net/phy/Makefile
-+++ b/drivers/net/phy/Makefile
-@@ -39,6 +39,7 @@ obj-$(CONFIG_MDIO_BUS_MUX_GPIO)	+= mdio-mux-gpio.o
- obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o
- obj-$(CONFIG_MDIO_SUN4I)	+= mdio-sun4i.o
- obj-$(CONFIG_MDIO_MOXART)	+= mdio-moxart.o
-+obj-$(CONFIG_AMD_XGBE_PHY)	+= amd-xgbe-phy-a0.o
- obj-$(CONFIG_MDIO_BCM_UNIMAC)	+= mdio-bcm-unimac.o
- obj-$(CONFIG_MICROCHIP_PHY)	+= microchip.o
- obj-$(CONFIG_MDIO_BCM_IPROC)	+= mdio-bcm-iproc.o
-diff --git a/drivers/net/phy/amd-xgbe-phy-a0.c b/drivers/net/phy/amd-xgbe-phy-a0.c
-new file mode 100644
-index 0000000..c352d5c
---- /dev/null
-+++ b/drivers/net/phy/amd-xgbe-phy-a0.c
-@@ -0,0 +1,1814 @@
-+/*
-+ * AMD 10Gb Ethernet PHY driver
-+ *
-+ * This file is available to you under your choice of the following two
-+ * licenses:
-+ *
-+ * License 1: GPLv2
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ *
-+ * This file is free software; you may copy, redistribute and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or (at
-+ * your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ *
-+ * License 2: Modified BSD
-+ *
-+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
-+ * All rights reserved.
-+ *
-+ * Redistribution and use in source and binary forms, with or without
-+ * modification, are permitted provided that the following conditions are met:
-+ *     * Redistributions of source code must retain the above copyright
-+ *       notice, this list of conditions and the following disclaimer.
-+ *     * Redistributions in binary form must reproduce the above copyright
-+ *       notice, this list of conditions and the following disclaimer in the
-+ *       documentation and/or other materials provided with the distribution.
-+ *     * Neither the name of Advanced Micro Devices, Inc. nor the
-+ *       names of its contributors may be used to endorse or promote products
-+ *       derived from this software without specific prior written permission.
-+ *
-+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
-+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/device.h>
-+#include <linux/platform_device.h>
-+#include <linux/string.h>
-+#include <linux/errno.h>
-+#include <linux/unistd.h>
-+#include <linux/slab.h>
-+#include <linux/interrupt.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+#include <linux/workqueue.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/skbuff.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/mii.h>
-+#include <linux/ethtool.h>
-+#include <linux/phy.h>
-+#include <linux/mdio.h>
-+#include <linux/io.h>
-+#include <linux/of.h>
-+#include <linux/of_platform.h>
-+#include <linux/of_device.h>
-+#include <linux/uaccess.h>
-+#include <linux/bitops.h>
-+#include <linux/property.h>
-+#include <linux/acpi.h>
-+#include <linux/irq.h>
-+
-+MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
-+MODULE_LICENSE("Dual BSD/GPL");
-+MODULE_VERSION("0.0.0-a");
-+MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
-+
-+#define XGBE_PHY_ID	0x7996ced0
-+#define XGBE_PHY_MASK	0xfffffff0
-+
-+#define XGBE_PHY_SERDES_RETRY		32
-+#define XGBE_PHY_CHANNEL_PROPERTY	"amd,serdes-channel"
-+#define XGBE_PHY_SPEEDSET_PROPERTY	"amd,speed-set"
-+#define XGBE_PHY_BLWC_PROPERTY		"amd,serdes-blwc"
-+#define XGBE_PHY_CDR_RATE_PROPERTY	"amd,serdes-cdr-rate"
-+#define XGBE_PHY_PQ_SKEW_PROPERTY	"amd,serdes-pq-skew"
-+#define XGBE_PHY_TX_AMP_PROPERTY	"amd,serdes-tx-amp"
-+
-+#define XGBE_PHY_SPEEDS			3
-+#define XGBE_PHY_SPEED_1000		0
-+#define XGBE_PHY_SPEED_2500		1
-+#define XGBE_PHY_SPEED_10000		2
-+
-+#define XGBE_AN_INT_CMPLT		0x01
-+#define XGBE_AN_INC_LINK		0x02
-+#define XGBE_AN_PG_RCV			0x04
-+#define XGBE_AN_INT_MASK		0x07
-+
-+#define XNP_MCF_NULL_MESSAGE		0x001
-+#define XNP_ACK_PROCESSED		BIT(12)
-+#define XNP_MP_FORMATTED		BIT(13)
-+#define XNP_NP_EXCHANGE			BIT(15)
-+
-+#define XGBE_PHY_RATECHANGE_COUNT	500
-+
-+#define XGBE_PHY_KR_TRAINING_START	0x01
-+#define XGBE_PHY_KR_TRAINING_ENABLE	0x02
-+
-+#define XGBE_PHY_FEC_ENABLE		0x01
-+#define XGBE_PHY_FEC_FORWARD		0x02
-+#define XGBE_PHY_FEC_MASK		0x03
-+
-+#ifndef MDIO_PMA_10GBR_PMD_CTRL
-+#define MDIO_PMA_10GBR_PMD_CTRL		0x0096
-+#endif
-+
-+#ifndef MDIO_PMA_10GBR_FEC_ABILITY
-+#define MDIO_PMA_10GBR_FEC_ABILITY	0x00aa
-+#endif
-+
-+#ifndef MDIO_PMA_10GBR_FEC_CTRL
-+#define MDIO_PMA_10GBR_FEC_CTRL		0x00ab
-+#endif
-+
-+#ifndef MDIO_AN_XNP
-+#define MDIO_AN_XNP			0x0016
-+#endif
-+
-+#ifndef MDIO_AN_LPX
-+#define MDIO_AN_LPX			0x0019
-+#endif
-+
-+#ifndef MDIO_AN_INTMASK
-+#define MDIO_AN_INTMASK			0x8001
-+#endif
-+
-+#ifndef MDIO_AN_INT
-+#define MDIO_AN_INT			0x8002
-+#endif
-+
-+#ifndef MDIO_AN_KR_CTRL
-+#define MDIO_AN_KR_CTRL			0x8003
-+#endif
-+
-+#ifndef MDIO_CTRL1_SPEED1G
-+#define MDIO_CTRL1_SPEED1G		(MDIO_CTRL1_SPEED10G & ~BMCR_SPEED100)
-+#endif
-+
-+#ifndef MDIO_KR_CTRL_PDETECT
-+#define MDIO_KR_CTRL_PDETECT		0x01
-+#endif
-+
-+#define GET_BITS(_var, _index, _width)					\
-+	(((_var) >> (_index)) & ((0x1 << (_width)) - 1))
-+
-+#define SET_BITS(_var, _index, _width, _val)				\
-+do {									\
-+	(_var) &= ~(((0x1 << (_width)) - 1) << (_index));		\
-+	(_var) |= (((_val) & ((0x1 << (_width)) - 1)) << (_index));	\
-+} while (0)
-+
-+#define XCMU_IOREAD(_priv, _reg)					\
-+	ioread16((_priv)->cmu_regs + _reg)
-+
-+#define XCMU_IOWRITE(_priv, _reg, _val)					\
-+	iowrite16((_val), (_priv)->cmu_regs + _reg)
-+
-+#define XRXTX_IOREAD(_priv, _reg)					\
-+	ioread16((_priv)->rxtx_regs + _reg)
-+
-+#define XRXTX_IOREAD_BITS(_priv, _reg, _field)				\
-+	GET_BITS(XRXTX_IOREAD((_priv), _reg),				\
-+		 _reg##_##_field##_INDEX,				\
-+		 _reg##_##_field##_WIDTH)
-+
-+#define XRXTX_IOWRITE(_priv, _reg, _val)				\
-+	iowrite16((_val), (_priv)->rxtx_regs + _reg)
-+
-+#define XRXTX_IOWRITE_BITS(_priv, _reg, _field, _val)			\
-+do {									\
-+	u16 reg_val = XRXTX_IOREAD((_priv), _reg);			\
-+	SET_BITS(reg_val,						\
-+		 _reg##_##_field##_INDEX,				\
-+		 _reg##_##_field##_WIDTH, (_val));			\
-+	XRXTX_IOWRITE((_priv), _reg, reg_val);				\
-+} while (0)
-+
-+/* SerDes CMU register offsets */
-+#define CMU_REG15			0x003c
-+#define CMU_REG16			0x0040
-+
-+/* SerDes CMU register entry bit positions and sizes */
-+#define CMU_REG16_TX_RATE_CHANGE_BASE	15
-+#define CMU_REG16_RX_RATE_CHANGE_BASE	14
-+#define CMU_REG16_RATE_CHANGE_DECR	2
-+
-+/* SerDes RxTx register offsets */
-+#define RXTX_REG2			0x0008
-+#define RXTX_REG3			0x000c
-+#define RXTX_REG5			0x0014
-+#define RXTX_REG6			0x0018
-+#define RXTX_REG20			0x0050
-+#define RXTX_REG53			0x00d4
-+#define RXTX_REG114			0x01c8
-+#define RXTX_REG115			0x01cc
-+#define RXTX_REG142			0x0238
-+
-+/* SerDes RxTx register entry bit positions and sizes */
-+#define RXTX_REG2_RESETB_INDEX			15
-+#define RXTX_REG2_RESETB_WIDTH			1
-+#define RXTX_REG3_TX_DATA_RATE_INDEX		14
-+#define RXTX_REG3_TX_DATA_RATE_WIDTH		2
-+#define RXTX_REG3_TX_WORD_MODE_INDEX		11
-+#define RXTX_REG3_TX_WORD_MODE_WIDTH		3
-+#define RXTX_REG5_TXAMP_CNTL_INDEX		7
-+#define RXTX_REG5_TXAMP_CNTL_WIDTH		4
-+#define RXTX_REG6_RX_DATA_RATE_INDEX		9
-+#define RXTX_REG6_RX_DATA_RATE_WIDTH		2
-+#define RXTX_REG6_RX_WORD_MODE_INDEX		11
-+#define RXTX_REG6_RX_WORD_MODE_WIDTH		3
-+#define RXTX_REG20_BLWC_ENA_INDEX		2
-+#define RXTX_REG20_BLWC_ENA_WIDTH		1
-+#define RXTX_REG53_RX_PLLSELECT_INDEX		15
-+#define RXTX_REG53_RX_PLLSELECT_WIDTH		1
-+#define RXTX_REG53_TX_PLLSELECT_INDEX		14
-+#define RXTX_REG53_TX_PLLSELECT_WIDTH		1
-+#define RXTX_REG53_PI_SPD_SEL_CDR_INDEX		10
-+#define RXTX_REG53_PI_SPD_SEL_CDR_WIDTH		4
-+#define RXTX_REG114_PQ_REG_INDEX		9
-+#define RXTX_REG114_PQ_REG_WIDTH		7
-+#define RXTX_REG115_FORCE_LAT_CAL_START_INDEX	2
-+#define RXTX_REG115_FORCE_LAT_CAL_START_WIDTH	1
-+#define RXTX_REG115_FORCE_SUM_CAL_START_INDEX	1
-+#define RXTX_REG115_FORCE_SUM_CAL_START_WIDTH	1
-+#define RXTX_REG142_SUM_CALIB_DONE_INDEX	15
-+#define RXTX_REG142_SUM_CALIB_DONE_WIDTH	1
-+#define RXTX_REG142_SUM_CALIB_ERR_INDEX		14
-+#define RXTX_REG142_SUM_CALIB_ERR_WIDTH		1
-+#define RXTX_REG142_LAT_CALIB_DONE_INDEX	11
-+#define RXTX_REG142_LAT_CALIB_DONE_WIDTH	1
-+
-+#define RXTX_FULL_RATE				0x0
-+#define RXTX_HALF_RATE				0x1
-+#define RXTX_FIFTH_RATE				0x3
-+#define RXTX_66BIT_WORD				0x7
-+#define RXTX_10BIT_WORD				0x1
-+#define RXTX_10G_BLWC				0x0
-+#define RXTX_1G_BLWC				0x1
-+#define RXTX_10G_TX_AMP				0xa
-+#define RXTX_1G_TX_AMP				0xf
-+#define RXTX_10G_CDR				0x7
-+#define RXTX_1G_CDR				0x2
-+#define RXTX_10G_PLL				0x1
-+#define RXTX_1G_PLL				0x0
-+#define RXTX_10G_PQ				0x1e
-+#define RXTX_1G_PQ				0xa
-+
-+DEFINE_SPINLOCK(cmu_lock);
-+
-+static const u32 amd_xgbe_phy_serdes_blwc[] = {
-+	RXTX_1G_BLWC,
-+	RXTX_1G_BLWC,
-+	RXTX_10G_BLWC,
-+};
-+
-+static const u32 amd_xgbe_phy_serdes_cdr_rate[] = {
-+	RXTX_1G_CDR,
-+	RXTX_1G_CDR,
-+	RXTX_10G_CDR,
-+};
-+
-+static const u32 amd_xgbe_phy_serdes_pq_skew[] = {
-+	RXTX_1G_PQ,
-+	RXTX_1G_PQ,
-+	RXTX_10G_PQ,
-+};
-+
-+static const u32 amd_xgbe_phy_serdes_tx_amp[] = {
-+	RXTX_1G_TX_AMP,
-+	RXTX_1G_TX_AMP,
-+	RXTX_10G_TX_AMP,
-+};
-+
-+enum amd_xgbe_phy_an {
-+	AMD_XGBE_AN_READY = 0,
-+	AMD_XGBE_AN_PAGE_RECEIVED,
-+	AMD_XGBE_AN_INCOMPAT_LINK,
-+	AMD_XGBE_AN_COMPLETE,
-+	AMD_XGBE_AN_NO_LINK,
-+	AMD_XGBE_AN_ERROR,
-+};
-+
-+enum amd_xgbe_phy_rx {
-+	AMD_XGBE_RX_BPA = 0,
-+	AMD_XGBE_RX_XNP,
-+	AMD_XGBE_RX_COMPLETE,
-+	AMD_XGBE_RX_ERROR,
-+};
-+
-+enum amd_xgbe_phy_mode {
-+	AMD_XGBE_MODE_KR,
-+	AMD_XGBE_MODE_KX,
-+};
-+
-+enum amd_xgbe_phy_speedset {
-+	AMD_XGBE_PHY_SPEEDSET_1000_10000 = 0,
-+	AMD_XGBE_PHY_SPEEDSET_2500_10000,
-+};
-+
-+struct amd_xgbe_phy_priv {
-+	struct platform_device *pdev;
-+	struct acpi_device *adev;
-+	struct device *dev;
-+
-+	struct phy_device *phydev;
-+
-+	/* SerDes related mmio resources */
-+	struct resource *rxtx_res;
-+	struct resource *cmu_res;
-+
-+	/* SerDes related mmio registers */
-+	void __iomem *rxtx_regs;	/* SerDes Rx/Tx CSRs */
-+	void __iomem *cmu_regs;		/* SerDes CMU CSRs */
-+
-+	int an_irq;
-+	char an_irq_name[IFNAMSIZ + 32];
-+	struct work_struct an_irq_work;
-+	unsigned int an_irq_allocated;
-+
-+	unsigned int serdes_channel;
-+	unsigned int speed_set;
-+
-+	/* Maintain link status for re-starting auto-negotiation */
-+	unsigned int link;
-+
-+	/* SerDes UEFI configurable settings.
-+	 *   Switching between modes/speeds requires new values for some
-+	 *   SerDes settings.  The values can be supplied as device
-+	 *   properties in array format.  The first array entry is for
-+	 *   1GbE, second for 2.5GbE and third for 10GbE
-+	 */
-+	u32 serdes_blwc[XGBE_PHY_SPEEDS];
-+	u32 serdes_cdr_rate[XGBE_PHY_SPEEDS];
-+	u32 serdes_pq_skew[XGBE_PHY_SPEEDS];
-+	u32 serdes_tx_amp[XGBE_PHY_SPEEDS];
-+
-+	/* Auto-negotiation state machine support */
-+	struct mutex an_mutex;
-+	enum amd_xgbe_phy_an an_result;
-+	enum amd_xgbe_phy_an an_state;
-+	enum amd_xgbe_phy_rx kr_state;
-+	enum amd_xgbe_phy_rx kx_state;
-+	struct work_struct an_work;
-+	struct workqueue_struct *an_workqueue;
-+	unsigned int an_supported;
-+	unsigned int parallel_detect;
-+	unsigned int fec_ability;
-+
-+	unsigned int lpm_ctrl;		/* CTRL1 for resume */
-+};
-+
-+static int amd_xgbe_an_disable_kr_training(struct phy_device *phydev)
-+{
-+	int ret;
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret &= ~XGBE_PHY_KR_TRAINING_ENABLE;
-+	phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, ret);
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_pcs_power_cycle(struct phy_device *phydev)
-+{
-+	int ret;
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret |= MDIO_CTRL1_LPOWER;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
-+
-+	usleep_range(75, 100);
-+
-+	ret &= ~MDIO_CTRL1_LPOWER;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
-+
-+	return 0;
-+}
-+
-+static void amd_xgbe_phy_serdes_start_ratechange(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	u16 val, mask;
-+
-+	/* Assert Rx and Tx ratechange in CMU_reg16 */
-+	val = XCMU_IOREAD(priv, CMU_REG16);
-+
-+	mask = (1 << (CMU_REG16_TX_RATE_CHANGE_BASE -
-+		      (priv->serdes_channel * CMU_REG16_RATE_CHANGE_DECR))) |
-+	       (1 << (CMU_REG16_RX_RATE_CHANGE_BASE -
-+		      (priv->serdes_channel * CMU_REG16_RATE_CHANGE_DECR)));
-+	val |= mask;
-+
-+	XCMU_IOWRITE(priv, CMU_REG16, val);
-+}
-+
-+static void amd_xgbe_phy_serdes_complete_ratechange(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	u16 val, mask;
-+	unsigned int wait;
-+
-+	/* Release Rx and Tx ratechange for proper channel in CMU_reg16 */
-+	val = XCMU_IOREAD(priv, CMU_REG16);
-+
-+	mask = (1 << (CMU_REG16_TX_RATE_CHANGE_BASE -
-+		      (priv->serdes_channel * CMU_REG16_RATE_CHANGE_DECR))) |
-+	       (1 << (CMU_REG16_RX_RATE_CHANGE_BASE -
-+		      (priv->serdes_channel * CMU_REG16_RATE_CHANGE_DECR)));
-+	val &= ~mask;
-+
-+	XCMU_IOWRITE(priv, CMU_REG16, val);
-+
-+	/* Wait for Rx and Tx ready in CMU_reg15 */
-+	mask = (1 << priv->serdes_channel) |
-+	       (1 << (priv->serdes_channel + 8));
-+	wait = XGBE_PHY_RATECHANGE_COUNT;
-+	while (wait--) {
-+		udelay(50);
-+
-+		val = XCMU_IOREAD(priv, CMU_REG15);
-+		if ((val & mask) == mask)
-+			return;
-+	}
-+
-+	netdev_dbg(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n",
-+		   val);
-+}
-+
-+static int amd_xgbe_phy_xgmii_mode(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	int ret;
-+
-+	/* Disable KR training */
-+	ret = amd_xgbe_an_disable_kr_training(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Set PCS to KR/10G speed */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret &= ~MDIO_PCS_CTRL2_TYPE;
-+	ret |= MDIO_PCS_CTRL2_10GBR;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2, ret);
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret &= ~MDIO_CTRL1_SPEEDSEL;
-+	ret |= MDIO_CTRL1_SPEED10G;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
-+
-+	ret = amd_xgbe_phy_pcs_power_cycle(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Set SerDes to 10G speed */
-+	spin_lock(&cmu_lock);
-+
-+	amd_xgbe_phy_serdes_start_ratechange(phydev);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_DATA_RATE, RXTX_FULL_RATE);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_WORD_MODE, RXTX_66BIT_WORD);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG5, TXAMP_CNTL,
-+			   priv->serdes_tx_amp[XGBE_PHY_SPEED_10000]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_DATA_RATE, RXTX_FULL_RATE);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_WORD_MODE, RXTX_66BIT_WORD);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA,
-+			   priv->serdes_blwc[XGBE_PHY_SPEED_10000]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, RX_PLLSELECT, RXTX_10G_PLL);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, TX_PLLSELECT, RXTX_10G_PLL);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, PI_SPD_SEL_CDR,
-+			   priv->serdes_cdr_rate[XGBE_PHY_SPEED_10000]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
-+			   priv->serdes_pq_skew[XGBE_PHY_SPEED_10000]);
-+
-+	amd_xgbe_phy_serdes_complete_ratechange(phydev);
-+
-+	spin_unlock(&cmu_lock);
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_gmii_2500_mode(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	int ret;
-+
-+	/* Disable KR training */
-+	ret = amd_xgbe_an_disable_kr_training(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Set PCS to KX/1G speed */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret &= ~MDIO_PCS_CTRL2_TYPE;
-+	ret |= MDIO_PCS_CTRL2_10GBX;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2, ret);
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret &= ~MDIO_CTRL1_SPEEDSEL;
-+	ret |= MDIO_CTRL1_SPEED1G;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
-+
-+	ret = amd_xgbe_phy_pcs_power_cycle(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Set SerDes to 2.5G speed */
-+	spin_lock(&cmu_lock);
-+
-+	amd_xgbe_phy_serdes_start_ratechange(phydev);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_DATA_RATE, RXTX_HALF_RATE);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_WORD_MODE, RXTX_10BIT_WORD);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG5, TXAMP_CNTL,
-+			   priv->serdes_tx_amp[XGBE_PHY_SPEED_2500]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_DATA_RATE, RXTX_HALF_RATE);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_WORD_MODE, RXTX_10BIT_WORD);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA,
-+			   priv->serdes_blwc[XGBE_PHY_SPEED_2500]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, RX_PLLSELECT, RXTX_1G_PLL);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, TX_PLLSELECT, RXTX_1G_PLL);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, PI_SPD_SEL_CDR,
-+			   priv->serdes_cdr_rate[XGBE_PHY_SPEED_2500]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
-+			   priv->serdes_pq_skew[XGBE_PHY_SPEED_2500]);
-+
-+	amd_xgbe_phy_serdes_complete_ratechange(phydev);
-+
-+	spin_unlock(&cmu_lock);
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_gmii_mode(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	int ret;
-+
-+	/* Disable KR training */
-+	ret = amd_xgbe_an_disable_kr_training(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Set PCS to KX/1G speed */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret &= ~MDIO_PCS_CTRL2_TYPE;
-+	ret |= MDIO_PCS_CTRL2_10GBX;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2, ret);
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret &= ~MDIO_CTRL1_SPEEDSEL;
-+	ret |= MDIO_CTRL1_SPEED1G;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
-+
-+	ret = amd_xgbe_phy_pcs_power_cycle(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Set SerDes to 1G speed */
-+	spin_lock(&cmu_lock);
-+
-+	amd_xgbe_phy_serdes_start_ratechange(phydev);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_DATA_RATE, RXTX_FIFTH_RATE);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_WORD_MODE, RXTX_10BIT_WORD);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG5, TXAMP_CNTL,
-+			   priv->serdes_tx_amp[XGBE_PHY_SPEED_1000]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_DATA_RATE, RXTX_FIFTH_RATE);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_WORD_MODE, RXTX_10BIT_WORD);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA,
-+			   priv->serdes_blwc[XGBE_PHY_SPEED_1000]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, RX_PLLSELECT, RXTX_1G_PLL);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, TX_PLLSELECT, RXTX_1G_PLL);
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG53, PI_SPD_SEL_CDR,
-+			   priv->serdes_cdr_rate[XGBE_PHY_SPEED_1000]);
-+
-+	XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
-+			   priv->serdes_pq_skew[XGBE_PHY_SPEED_1000]);
-+
-+	amd_xgbe_phy_serdes_complete_ratechange(phydev);
-+
-+	spin_unlock(&cmu_lock);
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_cur_mode(struct phy_device *phydev,
-+				 enum amd_xgbe_phy_mode *mode)
-+{
-+	int ret;
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2);
-+	if (ret < 0)
-+		return ret;
-+
-+	if ((ret & MDIO_PCS_CTRL2_TYPE) == MDIO_PCS_CTRL2_10GBR)
-+		*mode = AMD_XGBE_MODE_KR;
-+	else
-+		*mode = AMD_XGBE_MODE_KX;
-+
-+	return 0;
-+}
-+
-+static bool amd_xgbe_phy_in_kr_mode(struct phy_device *phydev)
-+{
-+	enum amd_xgbe_phy_mode mode;
-+
-+	if (amd_xgbe_phy_cur_mode(phydev, &mode))
-+		return false;
-+
-+	return (mode == AMD_XGBE_MODE_KR);
-+}
-+
-+static int amd_xgbe_phy_switch_mode(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	int ret;
-+
-+	/* If we are in KR switch to KX, and vice-versa */
-+	if (amd_xgbe_phy_in_kr_mode(phydev)) {
-+		if (priv->speed_set == AMD_XGBE_PHY_SPEEDSET_1000_10000)
-+			ret = amd_xgbe_phy_gmii_mode(phydev);
-+		else
-+			ret = amd_xgbe_phy_gmii_2500_mode(phydev);
-+	} else {
-+		ret = amd_xgbe_phy_xgmii_mode(phydev);
-+	}
-+
-+	return ret;
-+}
-+
-+static int amd_xgbe_phy_set_mode(struct phy_device *phydev,
-+				 enum amd_xgbe_phy_mode mode)
-+{
-+	enum amd_xgbe_phy_mode cur_mode;
-+	int ret;
-+
-+	ret = amd_xgbe_phy_cur_mode(phydev, &cur_mode);
-+	if (ret)
-+		return ret;
-+
-+	if (mode != cur_mode)
-+		ret = amd_xgbe_phy_switch_mode(phydev);
-+
-+	return ret;
-+}
-+
-+static int amd_xgbe_phy_set_an(struct phy_device *phydev, bool enable,
-+			       bool restart)
-+{
-+	int ret;
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret &= ~MDIO_AN_CTRL1_ENABLE;
-+
-+	if (enable)
-+		ret |= MDIO_AN_CTRL1_ENABLE;
-+
-+	if (restart)
-+		ret |= MDIO_AN_CTRL1_RESTART;
-+
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, ret);
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_restart_an(struct phy_device *phydev)
-+{
-+	return amd_xgbe_phy_set_an(phydev, true, true);
-+}
-+
-+static int amd_xgbe_phy_disable_an(struct phy_device *phydev)
-+{
-+	return amd_xgbe_phy_set_an(phydev, false, false);
-+}
-+
-+static enum amd_xgbe_phy_an amd_xgbe_an_tx_training(struct phy_device *phydev,
-+						    enum amd_xgbe_phy_rx *state)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	int ad_reg, lp_reg, ret;
-+
-+	*state = AMD_XGBE_RX_COMPLETE;
-+
-+	/* If we're not in KR mode then we're done */
-+	if (!amd_xgbe_phy_in_kr_mode(phydev))
-+		return AMD_XGBE_AN_PAGE_RECEIVED;
-+
-+	/* Enable/Disable FEC */
-+	ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
-+	if (ad_reg < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	lp_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA + 2);
-+	if (lp_reg < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FEC_CTRL);
-+	if (ret < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	ret &= ~XGBE_PHY_FEC_MASK;
-+	if ((ad_reg & 0xc000) && (lp_reg & 0xc000))
-+		ret |= priv->fec_ability;
-+
-+	phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FEC_CTRL, ret);
-+
-+	/* Start KR training */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);
-+	if (ret < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	if (ret & XGBE_PHY_KR_TRAINING_ENABLE) {
-+		ret |= XGBE_PHY_KR_TRAINING_START;
-+		phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL,
-+			      ret);
-+	}
-+
-+	return AMD_XGBE_AN_PAGE_RECEIVED;
-+}
-+
-+static enum amd_xgbe_phy_an amd_xgbe_an_tx_xnp(struct phy_device *phydev,
-+					       enum amd_xgbe_phy_rx *state)
-+{
-+	u16 msg;
-+
-+	*state = AMD_XGBE_RX_XNP;
-+
-+	msg = XNP_MCF_NULL_MESSAGE;
-+	msg |= XNP_MP_FORMATTED;
-+
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP + 2, 0);
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP + 1, 0);
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP, msg);
-+
-+	return AMD_XGBE_AN_PAGE_RECEIVED;
-+}
-+
-+static enum amd_xgbe_phy_an amd_xgbe_an_rx_bpa(struct phy_device *phydev,
-+					       enum amd_xgbe_phy_rx *state)
-+{
-+	unsigned int link_support;
-+	int ret, ad_reg, lp_reg;
-+
-+	/* Read Base Ability register 2 first */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA + 1);
-+	if (ret < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	/* Check for a supported mode, otherwise restart in a different one */
-+	link_support = amd_xgbe_phy_in_kr_mode(phydev) ? 0x80 : 0x20;
-+	if (!(ret & link_support))
-+		return AMD_XGBE_AN_INCOMPAT_LINK;
-+
-+	/* Check Extended Next Page support */
-+	ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
-+	if (ad_reg < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	lp_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA);
-+	if (lp_reg < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	return ((ad_reg & XNP_NP_EXCHANGE) || (lp_reg & XNP_NP_EXCHANGE)) ?
-+	       amd_xgbe_an_tx_xnp(phydev, state) :
-+	       amd_xgbe_an_tx_training(phydev, state);
-+}
-+
-+static enum amd_xgbe_phy_an amd_xgbe_an_rx_xnp(struct phy_device *phydev,
-+					       enum amd_xgbe_phy_rx *state)
-+{
-+	int ad_reg, lp_reg;
-+
-+	/* Check Extended Next Page support */
-+	ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP);
-+	if (ad_reg < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	lp_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPX);
-+	if (lp_reg < 0)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	return ((ad_reg & XNP_NP_EXCHANGE) || (lp_reg & XNP_NP_EXCHANGE)) ?
-+	       amd_xgbe_an_tx_xnp(phydev, state) :
-+	       amd_xgbe_an_tx_training(phydev, state);
-+}
-+
-+static enum amd_xgbe_phy_an amd_xgbe_an_page_received(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	enum amd_xgbe_phy_rx *state;
-+	int ret;
-+
-+	state = amd_xgbe_phy_in_kr_mode(phydev) ? &priv->kr_state
-+						: &priv->kx_state;
-+
-+	switch (*state) {
-+	case AMD_XGBE_RX_BPA:
-+		ret = amd_xgbe_an_rx_bpa(phydev, state);
-+		break;
-+
-+	case AMD_XGBE_RX_XNP:
-+		ret = amd_xgbe_an_rx_xnp(phydev, state);
-+		break;
-+
-+	default:
-+		ret = AMD_XGBE_AN_ERROR;
-+	}
-+
-+	return ret;
-+}
-+
-+static enum amd_xgbe_phy_an amd_xgbe_an_incompat_link(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	int ret;
-+
-+	/* Be sure we aren't looping trying to negotiate */
-+	if (amd_xgbe_phy_in_kr_mode(phydev)) {
-+		priv->kr_state = AMD_XGBE_RX_ERROR;
-+
-+		if (!(phydev->supported & SUPPORTED_1000baseKX_Full) &&
-+		    !(phydev->supported & SUPPORTED_2500baseX_Full))
-+			return AMD_XGBE_AN_NO_LINK;
-+
-+		if (priv->kx_state != AMD_XGBE_RX_BPA)
-+			return AMD_XGBE_AN_NO_LINK;
-+	} else {
-+		priv->kx_state = AMD_XGBE_RX_ERROR;
-+
-+		if (!(phydev->supported & SUPPORTED_10000baseKR_Full))
-+			return AMD_XGBE_AN_NO_LINK;
-+
-+		if (priv->kr_state != AMD_XGBE_RX_BPA)
-+			return AMD_XGBE_AN_NO_LINK;
-+	}
-+
-+	ret = amd_xgbe_phy_disable_an(phydev);
-+	if (ret)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	ret = amd_xgbe_phy_switch_mode(phydev);
-+	if (ret)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	ret = amd_xgbe_phy_restart_an(phydev);
-+	if (ret)
-+		return AMD_XGBE_AN_ERROR;
-+
-+	return AMD_XGBE_AN_INCOMPAT_LINK;
-+}
-+
-+static irqreturn_t amd_xgbe_an_isr(int irq, void *data)
-+{
-+	struct amd_xgbe_phy_priv *priv = (struct amd_xgbe_phy_priv *)data;
-+
-+	/* Interrupt reason must be read and cleared outside of IRQ context */
-+	disable_irq_nosync(priv->an_irq);
-+
-+	queue_work(priv->an_workqueue, &priv->an_irq_work);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static void amd_xgbe_an_irq_work(struct work_struct *work)
-+{
-+	struct amd_xgbe_phy_priv *priv = container_of(work,
-+						      struct amd_xgbe_phy_priv,
-+						      an_irq_work);
-+
-+	/* Avoid a race between enabling the IRQ and exiting the work by
-+	 * waiting for the work to finish and then queueing it
-+	 */
-+	flush_work(&priv->an_work);
-+	queue_work(priv->an_workqueue, &priv->an_work);
-+}
-+
-+static void amd_xgbe_an_state_machine(struct work_struct *work)
-+{
-+	struct amd_xgbe_phy_priv *priv = container_of(work,
-+						      struct amd_xgbe_phy_priv,
-+						      an_work);
-+	struct phy_device *phydev = priv->phydev;
-+	enum amd_xgbe_phy_an cur_state = priv->an_state;
-+	int int_reg, int_mask;
-+
-+	mutex_lock(&priv->an_mutex);
-+
-+	/* Read the interrupt */
-+	int_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT);
-+	if (!int_reg)
-+		goto out;
-+
-+next_int:
-+	if (int_reg < 0) {
-+		priv->an_state = AMD_XGBE_AN_ERROR;
-+		int_mask = XGBE_AN_INT_MASK;
-+	} else if (int_reg & XGBE_AN_PG_RCV) {
-+		priv->an_state = AMD_XGBE_AN_PAGE_RECEIVED;
-+		int_mask = XGBE_AN_PG_RCV;
-+	} else if (int_reg & XGBE_AN_INC_LINK) {
-+		priv->an_state = AMD_XGBE_AN_INCOMPAT_LINK;
-+		int_mask = XGBE_AN_INC_LINK;
-+	} else if (int_reg & XGBE_AN_INT_CMPLT) {
-+		priv->an_state = AMD_XGBE_AN_COMPLETE;
-+		int_mask = XGBE_AN_INT_CMPLT;
-+	} else {
-+		priv->an_state = AMD_XGBE_AN_ERROR;
-+		int_mask = 0;
-+	}
-+
-+	/* Clear the interrupt to be processed */
-+	int_reg &= ~int_mask;
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, int_reg);
-+
-+	priv->an_result = priv->an_state;
-+
-+again:
-+	cur_state = priv->an_state;
-+
-+	switch (priv->an_state) {
-+	case AMD_XGBE_AN_READY:
-+		priv->an_supported = 0;
-+		break;
-+
-+	case AMD_XGBE_AN_PAGE_RECEIVED:
-+		priv->an_state = amd_xgbe_an_page_received(phydev);
-+		priv->an_supported++;
-+		break;
-+
-+	case AMD_XGBE_AN_INCOMPAT_LINK:
-+		priv->an_supported = 0;
-+		priv->parallel_detect = 0;
-+		priv->an_state = amd_xgbe_an_incompat_link(phydev);
-+		break;
-+
-+	case AMD_XGBE_AN_COMPLETE:
-+		priv->parallel_detect = priv->an_supported ? 0 : 1;
-+		netdev_dbg(phydev->attached_dev, "%s successful\n",
-+			   priv->an_supported ? "Auto negotiation"
-+					      : "Parallel detection");
-+		break;
-+
-+	case AMD_XGBE_AN_NO_LINK:
-+		break;
-+
-+	default:
-+		priv->an_state = AMD_XGBE_AN_ERROR;
-+	}
-+
-+	if (priv->an_state == AMD_XGBE_AN_NO_LINK) {
-+		/* Disable auto-negotiation for now - it will be
-+		 * re-enabled once a link is established
-+		 */
-+		amd_xgbe_phy_disable_an(phydev);
-+
-+		int_reg = 0;
-+		phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
-+	} else if (priv->an_state == AMD_XGBE_AN_ERROR) {
-+		netdev_err(phydev->attached_dev,
-+			   "error during auto-negotiation, state=%u\n",
-+			   cur_state);
-+
-+		int_reg = 0;
-+		phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
-+	}
-+
-+	if (priv->an_state >= AMD_XGBE_AN_COMPLETE) {
-+		priv->an_result = priv->an_state;
-+		priv->an_state = AMD_XGBE_AN_READY;
-+		priv->kr_state = AMD_XGBE_RX_BPA;
-+		priv->kx_state = AMD_XGBE_RX_BPA;
-+	}
-+
-+	if (cur_state != priv->an_state)
-+		goto again;
-+
-+	if (int_reg)
-+		goto next_int;
-+
-+out:
-+	enable_irq(priv->an_irq);
-+
-+	mutex_unlock(&priv->an_mutex);
-+}
-+
-+static int amd_xgbe_an_init(struct phy_device *phydev)
-+{
-+	int ret;
-+
-+	/* Set up Advertisement register 3 first */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (phydev->supported & SUPPORTED_10000baseR_FEC)
-+		ret |= 0xc000;
-+	else
-+		ret &= ~0xc000;
-+
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2, ret);
-+
-+	/* Set up Advertisement register 2 next */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (phydev->supported & SUPPORTED_10000baseKR_Full)
-+		ret |= 0x80;
-+	else
-+		ret &= ~0x80;
-+
-+	if ((phydev->supported & SUPPORTED_1000baseKX_Full) ||
-+	    (phydev->supported & SUPPORTED_2500baseX_Full))
-+		ret |= 0x20;
-+	else
-+		ret &= ~0x20;
-+
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1, ret);
-+
-+	/* Set up Advertisement register 1 last */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (phydev->supported & SUPPORTED_Pause)
-+		ret |= 0x400;
-+	else
-+		ret &= ~0x400;
-+
-+	if (phydev->supported & SUPPORTED_Asym_Pause)
-+		ret |= 0x800;
-+	else
-+		ret &= ~0x800;
-+
-+	/* We don't intend to perform XNP */
-+	ret &= ~XNP_NP_EXCHANGE;
-+
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE, ret);
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_soft_reset(struct phy_device *phydev)
-+{
-+	int count, ret;
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret |= MDIO_CTRL1_RESET;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
-+
-+	count = 50;
-+	do {
-+		msleep(20);
-+		ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
-+		if (ret < 0)
-+			return ret;
-+	} while ((ret & MDIO_CTRL1_RESET) && --count);
-+
-+	if (ret & MDIO_CTRL1_RESET)
-+		return -ETIMEDOUT;
-+
-+	/* Disable auto-negotiation for now */
-+	ret = amd_xgbe_phy_disable_an(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Clear auto-negotiation interrupts */
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_config_init(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	struct net_device *netdev = phydev->attached_dev;
-+	int ret;
-+
-+	if (!priv->an_irq_allocated) {
-+		/* Allocate the auto-negotiation workqueue and interrupt */
-+		snprintf(priv->an_irq_name, sizeof(priv->an_irq_name) - 1,
-+			 "%s-pcs", netdev_name(netdev));
-+
-+		priv->an_workqueue =
-+			create_singlethread_workqueue(priv->an_irq_name);
-+		if (!priv->an_workqueue) {
-+			netdev_err(netdev, "phy workqueue creation failed\n");
-+			return -ENOMEM;
-+		}
-+
-+		ret = devm_request_irq(priv->dev, priv->an_irq,
-+				       amd_xgbe_an_isr, 0, priv->an_irq_name,
-+				       priv);
-+		if (ret) {
-+			netdev_err(netdev, "phy irq request failed\n");
-+			destroy_workqueue(priv->an_workqueue);
-+			return ret;
-+		}
-+
-+		priv->an_irq_allocated = 1;
-+	}
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FEC_ABILITY);
-+	if (ret < 0)
-+		return ret;
-+	priv->fec_ability = ret & XGBE_PHY_FEC_MASK;
-+
-+	/* Initialize supported features */
-+	phydev->supported = SUPPORTED_Autoneg;
-+	phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
-+	phydev->supported |= SUPPORTED_Backplane;
-+	phydev->supported |= SUPPORTED_10000baseKR_Full;
-+	switch (priv->speed_set) {
-+	case AMD_XGBE_PHY_SPEEDSET_1000_10000:
-+		phydev->supported |= SUPPORTED_1000baseKX_Full;
-+		break;
-+	case AMD_XGBE_PHY_SPEEDSET_2500_10000:
-+		phydev->supported |= SUPPORTED_2500baseX_Full;
-+		break;
-+	}
-+
-+	if (priv->fec_ability & XGBE_PHY_FEC_ENABLE)
-+		phydev->supported |= SUPPORTED_10000baseR_FEC;
-+
-+	phydev->advertising = phydev->supported;
-+
-+	/* Set initial mode - call the mode setting routines
-+	 * directly to insure we are properly configured
-+	 */
-+	if (phydev->supported & SUPPORTED_10000baseKR_Full)
-+		ret = amd_xgbe_phy_xgmii_mode(phydev);
-+	else if (phydev->supported & SUPPORTED_1000baseKX_Full)
-+		ret = amd_xgbe_phy_gmii_mode(phydev);
-+	else if (phydev->supported & SUPPORTED_2500baseX_Full)
-+		ret = amd_xgbe_phy_gmii_2500_mode(phydev);
-+	else
-+		ret = -EINVAL;
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Set up advertisement registers based on current settings */
-+	ret = amd_xgbe_an_init(phydev);
-+	if (ret)
-+		return ret;
-+
-+	/* Enable auto-negotiation interrupts */
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INTMASK, 0x07);
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_setup_forced(struct phy_device *phydev)
-+{
-+	int ret;
-+
-+	/* Disable auto-negotiation */
-+	ret = amd_xgbe_phy_disable_an(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Validate/Set specified speed */
-+	switch (phydev->speed) {
-+	case SPEED_10000:
-+		ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KR);
-+		break;
-+
-+	case SPEED_2500:
-+	case SPEED_1000:
-+		ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX);
-+		break;
-+
-+	default:
-+		ret = -EINVAL;
-+	}
-+
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Validate duplex mode */
-+	if (phydev->duplex != DUPLEX_FULL)
-+		return -EINVAL;
-+
-+	phydev->pause = 0;
-+	phydev->asym_pause = 0;
-+
-+	return 0;
-+}
-+
-+static int __amd_xgbe_phy_config_aneg(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	u32 mmd_mask = phydev->c45_ids.devices_in_package;
-+	int ret;
-+
-+	if (phydev->autoneg != AUTONEG_ENABLE)
-+		return amd_xgbe_phy_setup_forced(phydev);
-+
-+	/* Make sure we have the AN MMD present */
-+	if (!(mmd_mask & MDIO_DEVS_AN))
-+		return -EINVAL;
-+
-+	/* Disable auto-negotiation interrupt */
-+	disable_irq(priv->an_irq);
-+
-+	/* Start auto-negotiation in a supported mode */
-+	if (phydev->supported & SUPPORTED_10000baseKR_Full)
-+		ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KR);
-+	else if ((phydev->supported & SUPPORTED_1000baseKX_Full) ||
-+		 (phydev->supported & SUPPORTED_2500baseX_Full))
-+		ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX);
-+	else
-+		ret = -EINVAL;
-+	if (ret < 0) {
-+		enable_irq(priv->an_irq);
-+		return ret;
-+	}
-+
-+	/* Disable and stop any in progress auto-negotiation */
-+	ret = amd_xgbe_phy_disable_an(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Clear any auto-negotitation interrupts */
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0);
-+
-+	priv->an_result = AMD_XGBE_AN_READY;
-+	priv->an_state = AMD_XGBE_AN_READY;
-+	priv->kr_state = AMD_XGBE_RX_BPA;
-+	priv->kx_state = AMD_XGBE_RX_BPA;
-+
-+	/* Re-enable auto-negotiation interrupt */
-+	enable_irq(priv->an_irq);
-+
-+	/* Set up advertisement registers based on current settings */
-+	ret = amd_xgbe_an_init(phydev);
-+	if (ret)
-+		return ret;
-+
-+	/* Enable and start auto-negotiation */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_KR_CTRL);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret |= MDIO_KR_CTRL_PDETECT;
-+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_KR_CTRL, ret);
-+
-+	return amd_xgbe_phy_restart_an(phydev);
-+}
-+
-+static int amd_xgbe_phy_config_aneg(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	int ret;
-+
-+	mutex_lock(&priv->an_mutex);
-+
-+	ret = __amd_xgbe_phy_config_aneg(phydev);
-+
-+	mutex_unlock(&priv->an_mutex);
-+
-+	return ret;
-+}
-+
-+static int amd_xgbe_phy_aneg_done(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+
-+	return (priv->an_result == AMD_XGBE_AN_COMPLETE);
-+}
-+
-+static int amd_xgbe_phy_update_link(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	unsigned int check_again, autoneg;
-+	int ret;
-+
-+	/* If we're doing auto-negotiation don't report link down */
-+	if (priv->an_state != AMD_XGBE_AN_READY) {
-+		phydev->link = 1;
-+		return 0;
-+	}
-+
-+	/* Since the device can be in the wrong mode when a link is
-+	 * (re-)established (cable connected after the interface is
-+	 * up, etc.), the link status may report no link. If there
-+	 * is no link, try switching modes and checking the status
-+	 * again if auto negotiation is enabled.
-+	 */
-+	check_again = (phydev->autoneg == AUTONEG_ENABLE) ? 1 : 0;
-+again:
-+	/* Link status is latched low, so read once to clear
-+	 * and then read again to get current state
-+	 */
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1);
-+	if (ret < 0)
-+		return ret;
-+
-+	phydev->link = (ret & MDIO_STAT1_LSTATUS) ? 1 : 0;
-+
-+	if (!phydev->link) {
-+		if (check_again) {
-+			ret = amd_xgbe_phy_switch_mode(phydev);
-+			if (ret < 0)
-+				return ret;
-+			check_again = 0;
-+			goto again;
-+		}
-+	}
-+
-+	autoneg = (phydev->link && !priv->link) ? 1 : 0;
-+	priv->link = phydev->link;
-+	if (autoneg) {
-+		/* Link is (back) up, re-start auto-negotiation */
-+		ret = amd_xgbe_phy_config_aneg(phydev);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_read_status(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	u32 mmd_mask = phydev->c45_ids.devices_in_package;
-+	int ret, ad_ret, lp_ret;
-+
-+	ret = amd_xgbe_phy_update_link(phydev);
-+	if (ret)
-+		return ret;
-+
-+	if ((phydev->autoneg == AUTONEG_ENABLE) &&
-+	    !priv->parallel_detect) {
-+		if (!(mmd_mask & MDIO_DEVS_AN))
-+			return -EINVAL;
-+
-+		if (!amd_xgbe_phy_aneg_done(phydev))
-+			return 0;
-+
-+		/* Compare Advertisement and Link Partner register 1 */
-+		ad_ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
-+		if (ad_ret < 0)
-+			return ad_ret;
-+		lp_ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA);
-+		if (lp_ret < 0)
-+			return lp_ret;
-+
-+		ad_ret &= lp_ret;
-+		phydev->pause = (ad_ret & 0x400) ? 1 : 0;
-+		phydev->asym_pause = (ad_ret & 0x800) ? 1 : 0;
-+
-+		/* Compare Advertisement and Link Partner register 2 */
-+		ad_ret = phy_read_mmd(phydev, MDIO_MMD_AN,
-+				      MDIO_AN_ADVERTISE + 1);
-+		if (ad_ret < 0)
-+			return ad_ret;
-+		lp_ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA + 1);
-+		if (lp_ret < 0)
-+			return lp_ret;
-+
-+		ad_ret &= lp_ret;
-+		if (ad_ret & 0x80) {
-+			phydev->speed = SPEED_10000;
-+			ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KR);
-+			if (ret)
-+				return ret;
-+		} else {
-+			switch (priv->speed_set) {
-+			case AMD_XGBE_PHY_SPEEDSET_1000_10000:
-+				phydev->speed = SPEED_1000;
-+				break;
-+
-+			case AMD_XGBE_PHY_SPEEDSET_2500_10000:
-+				phydev->speed = SPEED_2500;
-+				break;
-+			}
-+
-+			ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX);
-+			if (ret)
-+				return ret;
-+		}
-+
-+		phydev->duplex = DUPLEX_FULL;
-+	} else {
-+		if (amd_xgbe_phy_in_kr_mode(phydev)) {
-+			phydev->speed = SPEED_10000;
-+		} else {
-+			switch (priv->speed_set) {
-+			case AMD_XGBE_PHY_SPEEDSET_1000_10000:
-+				phydev->speed = SPEED_1000;
-+				break;
-+
-+			case AMD_XGBE_PHY_SPEEDSET_2500_10000:
-+				phydev->speed = SPEED_2500;
-+				break;
-+			}
-+		}
-+		phydev->duplex = DUPLEX_FULL;
-+		phydev->pause = 0;
-+		phydev->asym_pause = 0;
-+	}
-+
-+	return 0;
-+}
-+
-+static int amd_xgbe_phy_suspend(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	int ret;
-+
-+	mutex_lock(&phydev->lock);
-+
-+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1);
-+	if (ret < 0)
-+		goto unlock;
-+
-+	priv->lpm_ctrl = ret;
-+
-+	ret |= MDIO_CTRL1_LPOWER;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret);
-+
-+	ret = 0;
-+
-+unlock:
-+	mutex_unlock(&phydev->lock);
-+
-+	return ret;
-+}
-+
-+static int amd_xgbe_phy_resume(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+
-+	mutex_lock(&phydev->lock);
-+
-+	priv->lpm_ctrl &= ~MDIO_CTRL1_LPOWER;
-+	phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, priv->lpm_ctrl);
-+
-+	mutex_unlock(&phydev->lock);
-+
-+	return 0;
-+}
-+
-+static unsigned int amd_xgbe_phy_resource_count(struct platform_device *pdev,
-+						unsigned int type)
-+{
-+	unsigned int count;
-+	int i;
-+
-+	for (i = 0, count = 0; i < pdev->num_resources; i++) {
-+		struct resource *r = &pdev->resource[i];
-+
-+		if (type == resource_type(r))
-+			count++;
-+	}
-+
-+	return count;
-+}
-+
-+static int amd_xgbe_phy_probe(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv;
-+	struct platform_device *phy_pdev;
-+	struct device *dev, *phy_dev;
-+	unsigned int phy_resnum, phy_irqnum;
-+	int ret;
-+
-+	if (!phydev->bus || !phydev->bus->parent)
-+		return -EINVAL;
-+
-+	dev = phydev->bus->parent;
-+
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	priv->pdev = to_platform_device(dev);
-+	priv->adev = ACPI_COMPANION(dev);
-+	priv->dev = dev;
-+	priv->phydev = phydev;
-+	mutex_init(&priv->an_mutex);
-+	INIT_WORK(&priv->an_irq_work, amd_xgbe_an_irq_work);
-+	INIT_WORK(&priv->an_work, amd_xgbe_an_state_machine);
-+
-+	if (!priv->adev || acpi_disabled) {
-+		struct device_node *bus_node;
-+		struct device_node *phy_node;
-+
-+		bus_node = priv->dev->of_node;
-+		phy_node = of_parse_phandle(bus_node, "phy-handle", 0);
-+		if (!phy_node) {
-+			dev_err(dev, "unable to parse phy-handle\n");
-+			ret = -EINVAL;
-+			goto err_priv;
-+		}
-+
-+		phy_pdev = of_find_device_by_node(phy_node);
-+		of_node_put(phy_node);
-+
-+		if (!phy_pdev) {
-+			dev_err(dev, "unable to obtain phy device\n");
-+			ret = -EINVAL;
-+			goto err_priv;
-+		}
-+
-+		phy_resnum = 0;
-+		phy_irqnum = 0;
-+	} else {
-+		/* In ACPI, the XGBE and PHY resources are the grouped
-+		 * together with the PHY resources at the end
-+		 */
-+		phy_pdev = priv->pdev;
-+		phy_resnum = amd_xgbe_phy_resource_count(phy_pdev,
-+							 IORESOURCE_MEM) - 2;
-+		phy_irqnum = amd_xgbe_phy_resource_count(phy_pdev,
-+							 IORESOURCE_IRQ) - 1;
-+	}
-+	phy_dev = &phy_pdev->dev;
-+
-+	/* Get the device mmio areas */
-+	priv->rxtx_res = platform_get_resource(phy_pdev, IORESOURCE_MEM,
-+					       phy_resnum++);
-+	priv->rxtx_regs = devm_ioremap_resource(dev, priv->rxtx_res);
-+	if (IS_ERR(priv->rxtx_regs)) {
-+		dev_err(dev, "rxtx ioremap failed\n");
-+		ret = PTR_ERR(priv->rxtx_regs);
-+		goto err_put;
-+	}
-+
-+	/* All xgbe phy devices share the CMU registers so retrieve
-+	 * the resource and do the ioremap directly rather than
-+	 * the devm_ioremap_resource call
-+	 */
-+	priv->cmu_res = platform_get_resource(phy_pdev, IORESOURCE_MEM,
-+					      phy_resnum++);
-+	if (!priv->cmu_res) {
-+		dev_err(dev, "cmu invalid resource\n");
-+		ret = -EINVAL;
-+		goto err_rxtx;
-+	}
-+	priv->cmu_regs = devm_ioremap_nocache(dev, priv->cmu_res->start,
-+					      resource_size(priv->cmu_res));
-+	if (!priv->cmu_regs) {
-+		dev_err(dev, "cmu ioremap failed\n");
-+		ret = -ENOMEM;
-+		goto err_rxtx;
-+	}
-+
-+	/* Get the auto-negotiation interrupt */
-+	ret = platform_get_irq(phy_pdev, phy_irqnum);
-+	if (ret < 0) {
-+		dev_err(dev, "platform_get_irq failed\n");
-+		goto err_cmu;
-+	}
-+	if (priv->adev && !acpi_disabled && !phy_irqnum) {
-+		struct irq_data *d = irq_get_irq_data(ret);
-+		if (!d) {
-+			dev_err(dev, "unable to set AN interrupt\n");
-+			ret = -EINVAL;
-+			goto err_cmu;
-+		}
-+
-+#ifdef CONFIG_ACPI
-+		ret = acpi_register_gsi(dev, d->hwirq - 2,
-+					ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH);
-+#else
-+		ret = -EINVAL;
-+#endif
-+		if (ret < 0) {
-+			dev_err(dev, "unable to set AN interrupt\n");
-+			goto err_cmu;
-+		}
-+	}
-+	priv->an_irq = ret;
-+
-+	/* Get the device serdes channel property */
-+	ret = device_property_read_u32(phy_dev, XGBE_PHY_CHANNEL_PROPERTY,
-+				       &priv->serdes_channel);
-+	if (ret) {
-+		dev_err(dev, "invalid %s property\n",
-+			XGBE_PHY_CHANNEL_PROPERTY);
-+		goto err_cmu;
-+	}
-+
-+	/* Get the device speed set property */
-+	ret = device_property_read_u32(phy_dev, XGBE_PHY_SPEEDSET_PROPERTY,
-+				       &priv->speed_set);
-+	if (ret) {
-+		dev_err(dev, "invalid %s property\n",
-+			XGBE_PHY_SPEEDSET_PROPERTY);
-+		goto err_cmu;
-+	}
-+
-+	switch (priv->speed_set) {
-+	case AMD_XGBE_PHY_SPEEDSET_1000_10000:
-+	case AMD_XGBE_PHY_SPEEDSET_2500_10000:
-+		break;
-+	default:
-+		dev_err(dev, "invalid %s property\n",
-+			XGBE_PHY_SPEEDSET_PROPERTY);
-+		ret = -EINVAL;
-+		goto err_cmu;
-+	}
-+
-+	if (device_property_present(phy_dev, XGBE_PHY_BLWC_PROPERTY)) {
-+		ret = device_property_read_u32_array(phy_dev,
-+						     XGBE_PHY_BLWC_PROPERTY,
-+						     priv->serdes_blwc,
-+						     XGBE_PHY_SPEEDS);
-+		if (ret) {
-+			dev_err(dev, "invalid %s property\n",
-+				XGBE_PHY_BLWC_PROPERTY);
-+			goto err_cmu;
-+		}
-+	} else {
-+		memcpy(priv->serdes_blwc, amd_xgbe_phy_serdes_blwc,
-+		       sizeof(priv->serdes_blwc));
-+	}
-+
-+	if (device_property_present(phy_dev, XGBE_PHY_CDR_RATE_PROPERTY)) {
-+		ret = device_property_read_u32_array(phy_dev,
-+						     XGBE_PHY_CDR_RATE_PROPERTY,
-+						     priv->serdes_cdr_rate,
-+						     XGBE_PHY_SPEEDS);
-+		if (ret) {
-+			dev_err(dev, "invalid %s property\n",
-+				XGBE_PHY_CDR_RATE_PROPERTY);
-+			goto err_cmu;
-+		}
-+	} else {
-+		memcpy(priv->serdes_cdr_rate, amd_xgbe_phy_serdes_cdr_rate,
-+		       sizeof(priv->serdes_cdr_rate));
-+	}
-+
-+	if (device_property_present(phy_dev, XGBE_PHY_PQ_SKEW_PROPERTY)) {
-+		ret = device_property_read_u32_array(phy_dev,
-+						     XGBE_PHY_PQ_SKEW_PROPERTY,
-+						     priv->serdes_pq_skew,
-+						     XGBE_PHY_SPEEDS);
-+		if (ret) {
-+			dev_err(dev, "invalid %s property\n",
-+				XGBE_PHY_PQ_SKEW_PROPERTY);
-+			goto err_cmu;
-+		}
-+	} else {
-+		memcpy(priv->serdes_pq_skew, amd_xgbe_phy_serdes_pq_skew,
-+		       sizeof(priv->serdes_pq_skew));
-+	}
-+
-+	if (device_property_present(phy_dev, XGBE_PHY_TX_AMP_PROPERTY)) {
-+		ret = device_property_read_u32_array(phy_dev,
-+						     XGBE_PHY_TX_AMP_PROPERTY,
-+						     priv->serdes_tx_amp,
-+						     XGBE_PHY_SPEEDS);
-+		if (ret) {
-+			dev_err(dev, "invalid %s property\n",
-+				XGBE_PHY_TX_AMP_PROPERTY);
-+			goto err_cmu;
-+		}
-+	} else {
-+		memcpy(priv->serdes_tx_amp, amd_xgbe_phy_serdes_tx_amp,
-+		       sizeof(priv->serdes_tx_amp));
-+	}
-+
-+	priv->link = 1;
-+
-+	phydev->priv = priv;
-+
-+	if (!priv->adev || acpi_disabled)
-+		platform_device_put(phy_pdev);
-+
-+	return 0;
-+
-+err_cmu:
-+	devm_iounmap(dev, priv->cmu_regs);
-+
-+err_rxtx:
-+	devm_iounmap(dev, priv->rxtx_regs);
-+	devm_release_mem_region(dev, priv->rxtx_res->start,
-+				resource_size(priv->rxtx_res));
-+
-+err_put:
-+	if (!priv->adev || acpi_disabled)
-+		platform_device_put(phy_pdev);
-+
-+err_priv:
-+	devm_kfree(dev, priv);
-+
-+	return ret;
-+}
-+
-+static void amd_xgbe_phy_remove(struct phy_device *phydev)
-+{
-+	struct amd_xgbe_phy_priv *priv = phydev->priv;
-+	struct device *dev = priv->dev;
-+
-+	if (priv->an_irq_allocated) {
-+		devm_free_irq(dev, priv->an_irq, priv);
-+
-+		flush_workqueue(priv->an_workqueue);
-+		destroy_workqueue(priv->an_workqueue);
-+	}
-+
-+	devm_iounmap(dev, priv->cmu_regs);
-+
-+	devm_iounmap(dev, priv->rxtx_regs);
-+	devm_release_mem_region(dev, priv->rxtx_res->start,
-+				resource_size(priv->rxtx_res));
-+
-+	devm_kfree(dev, priv);
-+}
-+
-+static int amd_xgbe_match_phy_device(struct phy_device *phydev)
-+{
-+	return phydev->c45_ids.device_ids[MDIO_MMD_PCS] == XGBE_PHY_ID;
-+}
-+
-+static struct phy_driver amd_xgbe_phy_a0_driver[] = {
-+	{
-+		.phy_id			= XGBE_PHY_ID,
-+		.phy_id_mask		= XGBE_PHY_MASK,
-+		.name			= "AMD XGBE PHY A0",
-+		.features		= 0,
-+		.probe			= amd_xgbe_phy_probe,
-+		.remove			= amd_xgbe_phy_remove,
-+		.soft_reset		= amd_xgbe_phy_soft_reset,
-+		.config_init		= amd_xgbe_phy_config_init,
-+		.suspend		= amd_xgbe_phy_suspend,
-+		.resume			= amd_xgbe_phy_resume,
-+		.config_aneg		= amd_xgbe_phy_config_aneg,
-+		.aneg_done		= amd_xgbe_phy_aneg_done,
-+		.read_status		= amd_xgbe_phy_read_status,
-+		.match_phy_device	= amd_xgbe_match_phy_device,
-+		.driver			= {
-+			.owner = THIS_MODULE,
-+		},
-+	},
-+};
-+
-+module_phy_driver(amd_xgbe_phy_a0_driver);
-+
-+static struct mdio_device_id __maybe_unused amd_xgbe_phy_a0_ids[] = {
-+	{ XGBE_PHY_ID, XGBE_PHY_MASK },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(mdio, amd_xgbe_phy_a0_ids);
---
-cgit v0.9.2
diff --git a/freed-ora/current/f24/cfg80211-wext-fix-message-ordering.patch b/freed-ora/current/f24/cfg80211-wext-fix-message-ordering.patch
new file mode 100644
index 000000000..8d3cdfdda
--- /dev/null
+++ b/freed-ora/current/f24/cfg80211-wext-fix-message-ordering.patch
@@ -0,0 +1,83 @@
+From cb150b9d23be6ee7f3a0fff29784f1c5b5ac514d Mon Sep 17 00:00:00 2001
+From: Johannes Berg <johannes.berg@intel.com>
+Date: Wed, 27 Jan 2016 13:29:34 +0100
+Subject: cfg80211/wext: fix message ordering
+
+Since cfg80211 frequently takes actions from its netdev notifier
+call, wireless extensions messages could still be ordered badly
+since the wext netdev notifier, since wext is built into the
+kernel, runs before the cfg80211 netdev notifier. For example,
+the following can happen:
+
+5: wlan1: <BROADCAST,MULTICAST> mtu 1500 qdisc mq state DOWN group default
+    link/ether 02:00:00:00:01:00 brd ff:ff:ff:ff:ff:ff
+5: wlan1: <BROADCAST,MULTICAST,UP>
+    link/ether
+
+when setting the interface down causes the wext message.
+
+To also fix this, export the wireless_nlevent_flush() function
+and also call it from the cfg80211 notifier.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+---
+ include/net/iw_handler.h | 6 ++++++
+ net/wireless/core.c      | 2 ++
+ net/wireless/wext-core.c | 3 ++-
+ 3 files changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/include/net/iw_handler.h b/include/net/iw_handler.h
+index 8f81bbb..e0f4109 100644
+--- a/include/net/iw_handler.h
++++ b/include/net/iw_handler.h
+@@ -439,6 +439,12 @@ int dev_get_wireless_info(char *buffer, char **start, off_t offset, int length);
+ /* Send a single event to user space */
+ void wireless_send_event(struct net_device *dev, unsigned int cmd,
+ 			 union iwreq_data *wrqu, const char *extra);
++#ifdef CONFIG_WEXT_CORE
++/* flush all previous wext events - if work is done from netdev notifiers */
++void wireless_nlevent_flush(void);
++#else
++static inline void wireless_nlevent_flush(void) {}
++#endif
+ 
+ /* We may need a function to send a stream of events to user space.
+  * More on that later... */
+diff --git a/net/wireless/core.c b/net/wireless/core.c
+index b091551..8f0bac7 100644
+--- a/net/wireless/core.c
++++ b/net/wireless/core.c
+@@ -1147,6 +1147,8 @@ static int cfg80211_netdev_notifier_call(struct notifier_block *nb,
+ 		return NOTIFY_DONE;
+ 	}
+ 
++	wireless_nlevent_flush();
++
+ 	return NOTIFY_OK;
+ }
+ 
+diff --git a/net/wireless/wext-core.c b/net/wireless/wext-core.c
+index 87dd619..b50ee5d 100644
+--- a/net/wireless/wext-core.c
++++ b/net/wireless/wext-core.c
+@@ -342,7 +342,7 @@ static const int compat_event_type_size[] = {
+ 
+ /* IW event code */
+ 
+-static void wireless_nlevent_flush(void)
++void wireless_nlevent_flush(void)
+ {
+ 	struct sk_buff *skb;
+ 	struct net *net;
+@@ -355,6 +355,7 @@ static void wireless_nlevent_flush(void)
+ 				    GFP_KERNEL);
+ 	}
+ }
++EXPORT_SYMBOL_GPL(wireless_nlevent_flush);
+ 
+ static int wext_netdev_notifier_call(struct notifier_block *nb,
+ 				     unsigned long state, void *ptr)
+-- 
+cgit v0.12
+
diff --git a/freed-ora/current/f24/config-arm-generic b/freed-ora/current/f24/config-arm-generic
index 399bfaf23..8215a36a8 100644
--- a/freed-ora/current/f24/config-arm-generic
+++ b/freed-ora/current/f24/config-arm-generic
@@ -55,6 +55,7 @@ CONFIG_ARM_GIC=y
 CONFIG_ARM_GIC_V2M=y
 CONFIG_ARM_GIC_V3=y
 CONFIG_ARM_GIC_V3_ITS=y
+# CONFIG_HISILICON_IRQ_MBIGEN is not set
 CONFIG_ARM_GLOBAL_TIMER=y
 CONFIG_ARM_SMMU=y
 CONFIG_MMC_ARMMMCI=y
@@ -78,6 +79,11 @@ CONFIG_CRYPTO_SHA1_ARM_NEON=y
 CONFIG_CRYPTO_SHA512_ARM_NEON=y
 CONFIG_CRYPTO_SHA512_ARM=y
 
+# EDAC
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=m
+CONFIG_EDAC_LEGACY_SYSFS=y
+
 # ARM VExpress
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_MFD_VEXPRESS_SYSREG=y
@@ -113,6 +119,7 @@ CONFIG_ROCKCHIP_IOMMU=y
 CONFIG_ROCKCHIP_THERMAL=m
 CONFIG_DRM_ROCKCHIP=m
 CONFIG_ROCKCHIP_DW_HDMI=m
+CONFIG_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_PHY_ROCKCHIP_USB=m
 CONFIG_DWMAC_ROCKCHIP=m
 CONFIG_SND_SOC_ROCKCHIP=m
@@ -122,9 +129,54 @@ CONFIG_SND_SOC_ROCKCHIP_RT5645=m
 CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
 CONFIG_REGULATOR_ACT8865=m
 CONFIG_ROCKCHIP_PM_DOMAINS=y
+CONFIG_CRYPTO_DEV_ROCKCHIP=m
+CONFIG_ROCKCHIP_EFUSE=m
 
 # Tegra
-# CONFIG_TEGRA_AHB is not set
+CONFIG_ARM_TEGRA_CPUFREQ=y
+CONFIG_TEGRA_MC=y
+CONFIG_TEGRA124_EMC=y
+CONFIG_TEGRA_IOMMU_SMMU=y
+CONFIG_TEGRA_AHB=y
+CONFIG_TEGRA20_APB_DMA=y
+CONFIG_TRUSTED_FOUNDATIONS=y
+CONFIG_SERIAL_TEGRA=y
+CONFIG_PCI_TEGRA=y
+CONFIG_AHCI_TEGRA=m
+CONFIG_MMC_SDHCI_TEGRA=m
+CONFIG_TEGRA_WATCHDOG=m
+CONFIG_I2C_TEGRA=m
+CONFIG_SPI_TEGRA114=m
+CONFIG_PWM_TEGRA=m
+CONFIG_KEYBOARD_TEGRA=m
+CONFIG_USB_EHCI_TEGRA=m
+CONFIG_RTC_DRV_TEGRA=m
+CONFIG_ARM_TEGRA_DEVFREQ=m
+CONFIG_ARM_TEGRA124_CPUFREQ=m
+CONFIG_TEGRA_SOCTHERM=m
+
+CONFIG_TEGRA_HOST1X=m
+CONFIG_TEGRA_HOST1X_FIREWALL=y
+CONFIG_DRM_TEGRA=m
+CONFIG_DRM_TEGRA_FBDEV=y
+# CONFIG_DRM_TEGRA_DEBUG is not set
+CONFIG_DRM_TEGRA_STAGING=y
+CONFIG_NOUVEAU_PLATFORM_DRIVER=y
+CONFIG_SND_HDA_TEGRA=m
+
+# CONFIG_ARM_TEGRA20_CPUFREQ is not set
+# CONFIG_MFD_NVEC is not set
+# CONFIG_TEGRA20_APB_DMA is not set
+
+# Virt
+CONFIG_PARAVIRT=y
+CONFIG_PARAVIRT_TIME_ACCOUNTING=y
+
+CONFIG_EFI=y
+CONFIG_EFI_VARS=y
+CONFIG_EFIVAR_FS=y
+CONFIG_EFI_VARS_PSTORE=y
+CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
 
 # Power management / thermal / cpu scaling
 # CONFIG_ARM_CPUIDLE is not set
@@ -167,15 +219,85 @@ CONFIG_ARM_MHU=m
 # CONFIG_PL320_MBOX is not set
 CONFIG_ARM_SCPI_PROTOCOL=m
 
+# NVMem
+CONFIG_NVMEM=m
+
 # USB
 CONFIG_USB_OHCI_HCD_PLATFORM=m
 CONFIG_USB_EHCI_HCD_PLATFORM=m
 CONFIG_USB_XHCI_PLATFORM=m
+CONFIG_USB_ULPI=y
+
+# usb gadget
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET_VBUS_DRAW=100
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_U_SERIAL_CONSOLE=y
+CONFIG_USB_MUSB_HDRC=m
+CONFIG_USB_MUSB_DUAL_ROLE=y
+CONFIG_USB_MUSB_DSPS=m
+# CONFIG_MUSB_PIO_ONLY is not set
+# CONFIG_USB_MUSB_TUSB6010 is not set
+# CONFIG_USB_MUSB_UX500 is not set
+CONFIG_USB_GPIO_VBUS=m
+CONFIG_USB_CONFIGFS=m
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_F_TCM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+# CONFIG_USB_CONFIGFS_RNDIS is not set
+CONFIG_USB_CONFIGFS_SERIAL=y
+# CONFIG_USB_CONFIGFS_F_LB_SS is not set
+# CONFIG_USB_CONFIGFS_F_FS is not set
+# CONFIG_USB_CONFIGFS_F_UAC1 is not set
+# CONFIG_USB_CONFIGFS_F_UAC2 is not set
+# CONFIG_USB_CONFIGFS_F_MIDI is not set
+# CONFIG_USB_CONFIGFS_F_HID is not set
+# CONFIG_USB_CONFIGFS_F_UVC is not set
+# CONFIG_USB_CONFIGFS_F_PRINTER is not set
+
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+# CONFIG_USB_GADGET_XILINX is not set
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_FOTG210_UDC is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MV_U3D is not set
+# CONFIG_USB_BDC_UDC is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_AMD5536UDC is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_NET2280 is not set
+# CONFIG_USB_GOKU is not set
+# CONFIG_USB_EG20T is not set
+# CONFIG_USB_DUMMY_HCD is not set
+# CONFIG_USB_ZERO_HNPTEST is not set
 
 # MMC/SD
 CONFIG_MMC_SPI=m
 CONFIG_MMC_SDHCI_OF_ARASAN=m
 
+# LCD Panels
+CONFIG_DRM_PANEL=y
+CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_PANEL_LD9040=m
+CONFIG_DRM_PANEL_LG_LG4573=m
+CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
+CONFIG_DRM_PANEL_S6E8AA0=m
+CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
+CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
+CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
+CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
+
 # Designware (used by numerous devices)
 CONFIG_MMC_DW=m
 CONFIG_MMC_DW_PLTFM=m
@@ -196,6 +318,7 @@ CONFIG_USB_DWC2_PCI=m
 CONFIG_USB_DWC3=m
 CONFIG_USB_DWC3_DUAL_ROLE=y
 CONFIG_USB_DWC3_PCI=m
+CONFIG_USB_DWC3_OF_SIMPLE=m
 # CONFIG_USB_DWC3_DEBUG is not set
 CONFIG_USB_DWC3_ULPI=y
 CONFIG_DW_WATCHDOG=m
@@ -210,10 +333,12 @@ CONFIG_EXTCON=m
 CONFIG_EXTCON_GPIO=m
 CONFIG_EXTCON_ADC_JACK=m
 CONFIG_EXTCON_USB_GPIO=m
+# CONFIG_EXTCON_MAX3355 is not set
 # CONFIG_EXTCON_SM5502 is not set
 # CONFIG_EXTCON_RT8973A is not set
 
 # MTD
+# CONFIG_MTD_AFS_PARTS is not set
 CONFIG_MTD_BLKDEVS=m
 CONFIG_MTD_BLOCK=m
 CONFIG_MTD_CFI=m
@@ -249,7 +374,7 @@ CONFIG_PINMUX=y
 CONFIG_PINCONF=y
 CONFIG_PINCTRL=y
 CONFIG_GENERIC_PINCONF=y
-CONFIG_PINCTRL_SINGLE=m
+CONFIG_PINCTRL_SINGLE=y
 
 #i2c
 CONFIG_I2C_ARB_GPIO_CHALLENGE=m
@@ -292,11 +417,6 @@ CONFIG_CMA_SIZE_SEL_MBYTES=y
 CONFIG_CMA_ALIGNMENT=8
 CONFIG_CMA_AREAS=7
 
-# EDAC
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=m
-CONFIG_EDAC_LEGACY_SYSFS=y
-
 # VFIO
 CONFIG_VFIO_PLATFORM=m
 CONFIG_VFIO_AMBA=m
diff --git a/freed-ora/current/f24/config-arm64 b/freed-ora/current/f24/config-arm64
index d2a723230..773a35ee5 100644
--- a/freed-ora/current/f24/config-arm64
+++ b/freed-ora/current/f24/config-arm64
@@ -9,6 +9,8 @@ CONFIG_SCHED_SMT=y
 # arm64 only SoCs
 CONFIG_ARCH_HISI=y
 CONFIG_ARCH_SEATTLE=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_ARCH_XGENE=y
 # CONFIG_ARCH_BCM_IPROC is not set
 # CONFIG_ARCH_BERLIN is not set
@@ -17,11 +19,12 @@ CONFIG_ARCH_XGENE=y
 # CONFIG_ARCH_LAYERSCAPE is not set
 # CONFIG_ARCH_MEDIATEK is not set
 # CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SPRD is not set
 # CONFIG_ARCH_STRATIX10 is not set
-# CONFIG_ARCH_TEGRA is not set
 # CONFIG_ARCH_THUNDER is not set
 # CONFIG_ARCH_ZYNQMP is not set
+# CONFIG_ARCH_UNIPHIER is not set
 
 # Erratum
 CONFIG_ARM64_ERRATUM_826319=y
@@ -69,13 +72,10 @@ CONFIG_RCU_FANOUT=64
 CONFIG_SPARSE_IRQ=y
 CONFIG_SPARSEMEM_VMEMMAP=y
 
+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
+
 # CONFIG_SYS_HYPERVISOR is not set
 
-CONFIG_EFI=y
-CONFIG_EFI_VARS=y
-CONFIG_EFIVAR_FS=y
-CONFIG_EFI_VARS_PSTORE=y
-CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
 CONFIG_RTC_DRV_EFI=y
 
 CONFIG_ACPI=y
@@ -115,7 +115,7 @@ CONFIG_POWER_RESET_XGENE=y
 CONFIG_COMMON_CLK_XGENE=y
 CONFIG_AHCI_XGENE=y
 CONFIG_PHY_XGENE=y
-CONFIG_NET_XGENE=y
+CONFIG_NET_XGENE=m
 CONFIG_RTC_DRV_XGENE=m
 CONFIG_HW_RANDOM_XGENE=m
 CONFIG_GPIO_XGENE=y
@@ -126,40 +126,51 @@ CONFIG_PCI_XGENE=y
 CONFIG_PCI_XGENE_MSI=y
 CONFIG_I2C_XGENE_SLIMPRO=m
 
-# busted build for various reasons
-#  uses pci_* for some reason to allocate DMA buffers
-# CONFIG_DVB_B2C2_FLEXCOP_USB is not set
-#  weird include chain resulting in missing u64 type
-# CONFIG_USB_SPEEDTOUCH is not set
-#  dma issues in headers
-# CONFIG_PARPORT_PC is not set
-# CONFIG_VGA_CONSOLE is not set
-
-# CONFIG_HOTPLUG_PCI_SHPC is not set
-
-# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
-
-# CONFIG_PNP_DEBUG_MESSAGES is not set
-
 # AMD Seattle
 CONFIG_NET_SB1000=y
 CONFIG_AMD_XGBE=m
 CONFIG_AMD_XGBE_PHY=m
-# CONFIG_AMD_XGBE_DCB is not set
-# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
+CONFIG_AMD_XGBE_DCB=y
+CONFIG_VFIO_PLATFORM_AMDXGBE_RESET=m
 CONFIG_PINCTRL_AMD=y
 
 # HiSilicon
+CONFIG_HISILICON_IRQ_MBIGEN=y
+CONFIG_PCI_HISI=y
 CONFIG_POWER_RESET_HISI=y
 CONFIG_HISI_THERMAL=m
 CONFIG_STUB_CLK_HI6220=y
-CONFIG_PCI_HISI=y
+CONFIG_PHY_HI6220_USB=m
+CONFIG_COMMON_RESET_HI6220=m
+
+# Tegra
+CONFIG_ARCH_TEGRA_132_SOC=y
+CONFIG_ARCH_TEGRA_210_SOC=y
+
+# AllWinner
+CONFIG_MACH_SUN50I=y
+CONFIG_SUNXI_RSB=m
+CONFIG_AHCI_SUNXI=m
+CONFIG_NET_VENDOR_ALLWINNER=y
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_MDIO_SUN4I is not set
+# CONFIG_KEYBOARD_SUN4I_LRADC is not set
+# CONFIG_TOUCHSCREEN_SUN4I is not set
+# CONFIG_SERIO_SUN4I_PS2 is not set
+CONFIG_I2C_MV64XXX=m
+CONFIG_SUNXI_WATCHDOG=m
+CONFIG_MFD_SUN6I_PRCM=y
+CONFIG_IR_SUNXI=m
+CONFIG_MMC_SUNXI=m
+CONFIG_RTC_DRV_SUN6I=m
+CONFIG_PWM_SUN4I=m
+# CONFIG_PHY_SUN4I_USB is not set
+# CONFIG_PHY_SUN9I_USB is not set
+CONFIG_NVMEM_SUNXI_SID=m
 
 # ThunderX
 # CONFIG_MDIO_OCTEON is not set
 
-# CONFIG_IMX_THERMAL is not set
-
 CONFIG_DMI=y
 CONFIG_DMIID=y
 CONFIG_DMI_SYSFS=y
@@ -171,12 +182,25 @@ CONFIG_BTT=y
 CONFIG_ND_BTT=m
 CONFIG_ND_BLK=m
 
-# CONFIG_SND_SOC is not set
-
 # CONFIG_PMIC_OPREGION is not set
 # CONFIG_DEBUG_RODATA is not set
 
 CONFIG_DEBUG_SECTION_MISMATCH=y
 
+# CONFIG_SND_SOC is not set
+
+# busted build for various reasons
+#  uses pci_* for some reason to allocate DMA buffers
+# CONFIG_DVB_B2C2_FLEXCOP_USB is not set
+#  weird include chain resulting in missing u64 type
+# CONFIG_USB_SPEEDTOUCH is not set
+#  dma issues in headers
+# CONFIG_PARPORT_PC is not set
+# CONFIG_VGA_CONSOLE is not set
+
+# CONFIG_HOTPLUG_PCI_SHPC is not set
+
 # CONFIG_FSL_MC_BUS is not set
 # CONFIG_FUJITSU_ES is not set
+# CONFIG_IMX_THERMAL is not set
+# CONFIG_PNP_DEBUG_MESSAGES is not set
diff --git a/freed-ora/current/f24/config-armv7 b/freed-ora/current/f24/config-armv7
index eaa6d4ebf..0cce9bc04 100644
--- a/freed-ora/current/f24/config-armv7
+++ b/freed-ora/current/f24/config-armv7
@@ -3,6 +3,7 @@
 # CONFIG_ARCH_BERLIN is not set
 # CONFIG_ARCH_KEYSTONE is not set
 CONFIG_ARCH_MXC=y
+CONFIG_ARCH_MMP=y
 CONFIG_ARCH_OMAP3=y
 CONFIG_ARCH_OMAP4=y
 CONFIG_ARCH_QCOM=y
@@ -106,12 +107,8 @@ CONFIG_RTC_DRV_PALMAS=m
 CONFIG_OMAP5_DSS_HDMI=y
 CONFIG_COMMON_CLK_PALMAS=m
 CONFIG_INPUT_PALMAS_PWRBUTTON=m
+CONFIG_PALMAS_GPADC=m
 
-CONFIG_WL_TI=y
-CONFIG_WLCORE_SDIO=m
-CONFIG_WLCORE_SPI=m
-CONFIG_WL18XX=m
-CONFIG_WILINK_PLATFORM_DATA=y
 CONFIG_MFD_WL1273_CORE=m
 CONFIG_NFC_WILINK=m
 
@@ -143,6 +140,7 @@ CONFIG_PWM_TIECAP=m
 CONFIG_PWM_TIEHRPWM=m
 CONFIG_PWM_TWL=m
 CONFIG_PWM_TWL_LED=m
+CONFIG_PWM_OMAP_DMTIMER=m
 
 CONFIG_CRYPTO_DEV_OMAP_SHAM=m
 CONFIG_CRYPTO_DEV_OMAP_AES=m
@@ -265,7 +263,7 @@ CONFIG_WKUP_M3_RPROC=m
 # Builtin needed for BBone White
 CONFIG_MFD_TPS65217=y
 CONFIG_REGULATOR_TPS65217=y
-CONFOG_CHARGER_TPS65217=m
+CONFIG_CHARGER_TPS65217=m
 CONFIG_BACKLIGHT_TPS65217=m
 CONFIG_REGULATOR_TPS65217=m
 
@@ -303,6 +301,8 @@ CONFIG_MSM_GCC_8960=m
 CONFIG_MSM_MMCC_8960=m
 CONFIG_MSM_GCC_8974=m
 CONFIG_MSM_MMCC_8974=m
+CONFIG_MSM_GCC_8996=m
+CONFIG_MSM_MMCC_8996=m
 CONFIG_HW_RANDOM_MSM=m
 CONFIG_I2C_QUP=m
 CONFIG_SPI_QUP=m
@@ -348,7 +348,12 @@ CONFIG_QCOM_SMD=m
 CONFIG_QCOM_SMD_RPM=m
 CONFIG_QCOM_SMEM=m
 CONFIG_REGULATOR_QCOM_SMD_RPM=m
-# CONFIG_QCOM_SMEM is not set
+CONFIG_QCOM_SMEM=m
+CONFIG_QCOM_QFPROM=m
+CONFIG_QCOM_WCNSS_CTRL=m
+CONFIG_QCOM_SMSM=y
+CONFIG_QCOM_SMP2P=m
+CONFIG_PCIE_QCOM=y
 
 # i.MX
 # CONFIG_MXC_DEBUG_BOARD is not set
@@ -376,7 +381,6 @@ CONFIG_USB_EHCI_MXC=m
 CONFIG_USB_CHIPIDEA=m
 CONFIG_USB_CHIPIDEA_UDC=y
 CONFIG_USB_CHIPIDEA_HOST=y
-# CONFIG_USB_CHIPIDEA_DEBUG is not set
 CONFIG_USB_FSL_USB2=m
 CONFIG_NET_VENDOR_FREESCALE=y
 # CONFIG_GIANFAR is not set
@@ -419,6 +423,7 @@ CONFIG_FB_MXS=m
 # CONFIG_FB_MX3 is not set
 # CONFIG_FB_IMX is not set
 CONFIG_TOUCHSCREEN_IMX6UL_TSC=m
+CONFIG_NVMEM_IMX_OCOTP=m
 
 CONFIG_SND_IMX_SOC=m
 CONFIG_SND_SOC_FSL_ASOC_CARD=m
@@ -465,8 +470,11 @@ CONFIG_DRM_IMX_IPUV3=m
 CONFIG_DRM_IMX_LDB=m
 CONFIG_DRM_IMX_PARALLEL_DISPLAY=m
 CONFIG_DRM_IMX_TVE=m
+CONFIG_DRM_ETNAVIV=m
+# CONFIG_DRM_ETNAVIV_REGISTER_LOGGING is not set
 CONFIG_VIDEO_CODA=m
 
+CONFIG_IMX7D_ADC=m
 CONFIG_SENSORS_MC13783_ADC=m
 CONFIG_REGULATOR_ANATOP=m
 CONFIG_REGULATOR_MC13783=m
@@ -503,6 +511,24 @@ CONFIG_REGULATOR_DA9055=m
 # picoxcell
 # CONFIG_CRYPTO_DEV_PICOXCELL is not set
 
+# MMP XO 1.75
+# CONFIG_MACH_BROWNSTONE is not set
+# CONFIG_MACH_FLINT is not set
+# CONFIG_MACH_MARVELL_JASPER is not set
+CONFIG_MACH_MMP2_DT=y
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_KEYBOARD_PXA27x=y
+CONFIG_I2C_PXA=m
+# CONFIG_I2C_PXA_SLAVE is not set
+CONFIG_SND_MMP_SOC=y
+CONFIG_SND_PXA910_SOC=m
+CONFIG_MMC_SDHCI_PXAV2=m
+CONFIG_MMP_PDMA=y
+CONFIG_MMP_TDMA=y
+CONFIG_PXA_DMA=y
+CONFIG_SERIO_OLPC_APSP=m
+
 # Exynos 4
 CONFIG_ARCH_EXYNOS4=y
 CONFIG_SOC_EXYNOS4212=y
@@ -584,9 +610,6 @@ CONFIG_MFD_TPS6586X=y
 CONFIG_GPIO_TPS6586X=y
 CONFIG_RTC_DRV_TPS6586X=m
 
-# OLPC XO
-CONFIG_SERIO_OLPC_APSP=m
-
 # Zynq-7xxx
 CONFIG_SERIAL_UARTLITE=y
 CONFIG_SERIAL_UARTLITE_CONSOLE=y
@@ -619,9 +642,9 @@ CONFIG_USB_GADGET_XILINX=m
 CONFIG_PCIE_XILINX=y
 CONFIG_CADENCE_WATCHDOG=m
 CONFIG_REGULATOR_ISL9305=m
-CONFIG_EDAC_SYNOPSYS=m
 CONFIG_PINCTRL_ZYNQ=y
 CONFIG_AXI_DMAC=m
+CONFIG_EDAC_SYNOPSYS=m
 
 # Multi function devices
 CONFIG_MFD_88PM800=m
diff --git a/freed-ora/current/f24/config-armv7-generic b/freed-ora/current/f24/config-armv7-generic
index 285b4dca0..e4322ac8e 100644
--- a/freed-ora/current/f24/config-armv7-generic
+++ b/freed-ora/current/f24/config-armv7-generic
@@ -19,6 +19,7 @@ CONFIG_ARM_UNWIND=y
 CONFIG_ARM_THUMB=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_ASM_UNIFIED=y
+CONFIG_ARM_PATCH_IDIV=y
 CONFIG_ARM_CPU_TOPOLOGY=y
 CONFIG_ARM_DMA_MEM_BUFFERABLE=y
 CONFIG_SWP_EMULATE=y
@@ -48,6 +49,7 @@ CONFIG_CPU_SW_DOMAIN_PAN=y
 # CONFIG_ARM_VIRT_EXT is not set
 
 # Platforms enabled/disabled globally on ARMv7
+CONFIG_ARCH_BCM2835=y
 CONFIG_ARCH_EXYNOS=y
 CONFIG_ARCH_HIGHBANK=y
 CONFIG_ARCH_SUNXI=y
@@ -60,13 +62,17 @@ CONFIG_ARCH_VIRT=y
 # CONFIG_ARCH_HISI is not set
 # CONFIG_ARCH_MEDIATEK is not set
 # CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MMP is not set
 # CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_S5PV210 is not set
 # CONFIG_ARCH_SHMOBILE_MULTI is not set
 # CONFIG_ARCH_SIRF is not set
 # CONFIG_ARCH_SOCFPGA is not set
 # CONFIG_PLAT_SPEAR is not set
 # CONFIG_ARCH_STI is not set
+# CONFIG_ARCH_TANGO is not set
 # CONFIG_ARCH_U8500 is not set
 # CONFIG_ARCH_VEXPRESS_SPC is not set
 # CONFIG_ARCH_WM8850 is not set
@@ -165,8 +171,6 @@ CONFIG_RTC_DRV_PL030=y
 CONFIG_AMBA_PL08X=y
 CONFIG_SND_ARMAACI=m
 
-CONFIG_EDAC=y
-
 # highbank
 CONFIG_EDAC_HIGHBANK_MC=m
 CONFIG_EDAC_HIGHBANK_L2=m
@@ -183,6 +187,7 @@ CONFIG_MACH_SUN6I=y
 CONFIG_MACH_SUN7I=y
 CONFIG_MACH_SUN8I=y
 # CONFIG_MACH_SUN9I is not set
+# CONFIG_MACH_SUN50I is not set
 CONFIG_SUNXI_SRAM=y
 CONFIG_DMA_SUN4I=m
 CONFIG_DMA_SUN6I=m
@@ -222,6 +227,23 @@ CONFIG_USB_MUSB_SUNXI=m
 CONFIG_CRYPTO_DEV_SUN4I_SS=m
 CONFIG_SND_SUN4I_CODEC=m
 CONFIG_SUNXI_RSB=m
+CONFIG_NVMEM_SUNXI_SID=m
+
+# BCM 283x
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_DMA_BCM2835=m
+CONFIG_MMC_SDHCI_BCM2835=m
+CONFIG_BCM2835_MBOX=m
+CONFIG_PWM_BCM2835=m
+CONFIG_HW_RANDOM_BCM2835=m
+CONFIG_I2C_BCM2835=m
+CONFIG_SPI_BCM2835=m
+CONFIG_SPI_BCM2835AUX=m
+CONFIG_BCM2835_WDT=m
+CONFIG_SND_BCM2835_SOC_I2S=m
+CONFIG_DRM_VC4=m
+CONFIG_RASPBERRYPI_FIRMWARE=m
 
 # Exynos
 CONFIG_ARCH_EXYNOS3=y
@@ -293,9 +315,8 @@ CONFIG_DRM_EXYNOS_ROTATOR=y
 CONFIG_DRM_EXYNOS_VIDI=y
 CONFIG_DRM_EXYNOS_MIXER=y
 CONFIG_PHY_EXYNOS_DP_VIDEO=m
-# CONFIG_FB_S3C is not set
 CONFIG_PHY_EXYNOS_MIPI_VIDEO=m
-CONFIG_PHY_EXYNOS_DP_VIDEO=m
+# CONFIG_FB_S3C is not set
 CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=y
 CONFIG_VIDEO_EXYNOS_FIMC_LITE=m
 CONFIG_VIDEO_EXYNOS4_FIMC_IS=m
@@ -339,52 +360,15 @@ CONFIG_EXTCON_MAX8997=m
 # Tegra
 CONFIG_ARCH_TEGRA_114_SOC=y
 CONFIG_ARCH_TEGRA_124_SOC=y
-CONFIG_ARM_TEGRA_CPUFREQ=y
-CONFIG_TRUSTED_FOUNDATIONS=y
-CONFIG_SERIAL_TEGRA=y
-CONFIG_PCI_TEGRA=y
-CONFIG_AHCI_TEGRA=m
-CONFIG_TEGRA_IOMMU_SMMU=y
-CONFIG_MMC_SDHCI_TEGRA=m
-CONFIG_TEGRA_WATCHDOG=m
-CONFIG_I2C_TEGRA=m
-CONFIG_TEGRA_AHB=y
-CONFIG_TEGRA20_APB_DMA=y
-CONFIG_SPI_TEGRA114=m
-CONFIG_PWM_TEGRA=m
-CONFIG_KEYBOARD_TEGRA=m
-CONFIG_USB_EHCI_TEGRA=m
-CONFIG_RTC_DRV_TEGRA=m
 CONFIG_SND_SOC_TEGRA=m
-CONFIG_SND_SOC_TEGRA_MAX98090=m
-CONFIG_SND_SOC_TEGRA_RT5640=m
 CONFIG_SND_SOC_TEGRA30_AHUB=m
 CONFIG_SND_SOC_TEGRA30_I2S=m
+CONFIG_SND_SOC_TEGRA_MAX98090=m
+CONFIG_SND_SOC_TEGRA_RT5640=m
 CONFIG_SND_SOC_TEGRA_RT5677=m
-CONFIG_SND_HDA_TEGRA=m
-CONFIG_TEGRA_HOST1X=m
-CONFIG_TEGRA_HOST1X_FIREWALL=y
-CONFIG_DRM_TEGRA=m
-CONFIG_DRM_TEGRA_FBDEV=y
-# CONFIG_DRM_TEGRA_DEBUG is not set
-CONFIG_DRM_TEGRA_STAGING=y
-CONFIG_NOUVEAU_PLATFORM_DRIVER=y
 CONFIG_AD525X_DPOT=m
 CONFIG_AD525X_DPOT_I2C=m
 CONFIG_AD525X_DPOT_SPI=m
-CONFIG_TEGRA_SOCTHERM=m
-CONFIG_TEGRA_MC=y
-CONFIG_TEGRA124_EMC=y
-CONFIG_ARM_TEGRA_DEVFREQ=m
-# CONFIG_ARM_TEGRA20_CPUFREQ is not set
-CONFIG_ARM_TEGRA124_CPUFREQ=m
-
-# Jetson TK1
-CONFIG_PINCTRL_AS3722=y
-CONFIG_POWER_RESET_AS3722=y
-CONFIG_MFD_AS3722=y
-CONFIG_REGULATOR_AS3722=m
-CONFIG_RTC_DRV_AS3722=y
 
 # TI Generic
 CONFIG_TI_SOC_THERMAL=m
@@ -452,11 +436,13 @@ CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_LD9040=m
 CONFIG_DRM_PANEL_S6E8AA0=m
 CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
+CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
 CONFIG_DRM_PANEL_LG_LG4573=m
 CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
+CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
 CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
 CONFIG_DRM_DW_HDMI=m
-# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
+CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
 
 # regmap
 CONFIG_REGMAP_SPI=m
@@ -464,62 +450,10 @@ CONFIG_REGMAP_SPMI=m
 CONFIG_REGMAP_MMIO=m
 CONFIG_REGMAP_IRQ=y
 
-# usb
-# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-CONFIG_USB_ULPI=y
+# usb net
 CONFIG_AX88796=m
 CONFIG_AX88796_93CX6=y
 
-# usb gadget 
-CONFIG_USB_OTG=y
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_VBUS_DRAW=100
-CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
-CONFIG_USB_MUSB_HDRC=m
-CONFIG_USB_MUSB_DUAL_ROLE=y
-CONFIG_USB_MUSB_DSPS=m
-# CONFIG_MUSB_PIO_ONLY is not set
-# CONFIG_USB_MUSB_TUSB6010 is not set
-# CONFIG_USB_MUSB_UX500 is not set
-CONFIG_USB_GPIO_VBUS=m
-CONFIG_USB_CONFIGFS=m
-CONFIG_USB_CONFIGFS_ACM=y
-CONFIG_USB_CONFIGFS_ECM=y
-CONFIG_USB_CONFIGFS_ECM_SUBSET=y
-CONFIG_USB_CONFIGFS_EEM=y
-CONFIG_USB_CONFIGFS_MASS_STORAGE=y
-CONFIG_USB_CONFIGFS_NCM=y
-CONFIG_USB_CONFIGFS_OBEX=y
-# CONFIG_USB_CONFIGFS_RNDIS is not set
-CONFIG_USB_CONFIGFS_SERIAL=y
-# CONFIG_USB_CONFIGFS_F_LB_SS is not set
-# CONFIG_USB_CONFIGFS_F_FS is not set
-# CONFIG_USB_CONFIGFS_F_UAC1 is not set
-# CONFIG_USB_CONFIGFS_F_UAC2 is not set
-# CONFIG_USB_CONFIGFS_F_MIDI is not set
-# CONFIG_USB_CONFIGFS_F_HID is not set
-# CONFIG_USB_CONFIGFS_F_UVC is not set
-# CONFIG_USB_CONFIGFS_F_PRINTER is not set
-
-# CONFIG_USB_GADGET_DEBUG is not set
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-# CONFIG_USB_GADGET_DEBUG_FS is not set
-# CONFIG_USB_FUSB300 is not set
-# CONFIG_USB_FOTG210_UDC is not set
-# CONFIG_USB_R8A66597 is not set
-# CONFIG_USB_PXA27X is not set
-# CONFIG_USB_MV_UDC is not set
-# CONFIG_USB_MV_U3D is not set
-# CONFIG_USB_BDC_UDC is not set
-# CONFIG_USB_M66592 is not set
-# CONFIG_USB_AMD5536UDC is not set
-# CONFIG_USB_NET2272 is not set
-# CONFIG_USB_NET2280 is not set
-# CONFIG_USB_GOKU is not set
-# CONFIG_USB_EG20T is not set
-# CONFIG_USB_DUMMY_HCD is not set
-# CONFIG_USB_ZERO_HNPTEST is not set
-
 # Multifunction Devices
 CONFIG_MFD_TPS65090=y
 CONFIG_MFD_TPS65910=y
@@ -551,6 +485,7 @@ CONFIG_MFD_TPS65912_SPI=y
 # CONFIG_PINCTRL_IPQ8064 is not set
 # CONFIG_PINCTRL_MSM8960 is not set
 # CONFIG_PINCTRL_MSM8660 is not set
+# CONFIG_PINCTRL_MSM8996 is not set
 
 # GPIO
 # CONFIG_GPIO_EM is not set
@@ -627,6 +562,7 @@ CONFIG_MTD_NAND_PXA3xx=m
 CONFIG_MTD_NAND_RICOH=m
 CONFIG_MTD_NAND_TMIO=m
 # CONFIG_MTD_NAND_BRCMNAND is not set
+# CONFIG_MTD_MT81xx_NOR is not set
 CONFIG_MTD_SPI_NOR=m
 # CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
 CONFIG_MTD_SPINAND_MT29F=m
@@ -681,6 +617,8 @@ CONFIG_REGULATOR_MAX8660=m
 CONFIG_REGULATOR_MAX8952=m
 CONFIG_REGULATOR_MAX8973=m
 CONFIG_REGULATOR_PFUZE100=m
+CONFIG_REGULATOR_PV88060=m
+CONFIG_REGULATOR_PV88090=m
 CONFIG_REGULATOR_TPS51632=m
 CONFIG_REGULATOR_TPS62360=m
 CONFIG_REGULATOR_TPS65023=m
@@ -731,7 +669,6 @@ CONFIG_SENSORS_LM70=m
 CONFIG_SENSORS_MAX1111=m
 CONFIG_MPL115=m
 CONFIG_MPL3115=m
-CONFIG_DHT11=m
 CONFIG_SI7005=m
 CONFIG_SI7020=m
 
@@ -864,7 +801,6 @@ CONFIG_R8188EU=m
 # CONFIG_SERIAL_BCM63XX is not set
 # CONFIG_SERIAL_STM32 is not set
 # CONFIG_FB_XILINX is not set
-# CONFIG_USB_GADGET_XILINX is not set
 # CONFIG_BRCMSTB_GISB_ARB is not set
 # CONFIG_SUNGEM is not set
 # CONFIG_FB_SAVAGE is not set
@@ -896,18 +832,18 @@ CONFIG_R8188EU=m
 # CONFIG_SND_SOC_APQ8016_SBC is not set
 # CONFIG_SND_SOC_TAS571X is not set
 
+# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
+
+# Altera?
+# CONFIG_PCIE_ALTERA is not set
+
 # Debug options. We need to deal with them at some point like x86
 # CONFIG_DEBUG_USER is not set
-# CONFIG_DEBUG_LL is not set
-# CONFIG_DEBUG_PINCTRL is not set
 # CONFIG_DMADEVICES_VDEBUG is not set
 # CONFIG_DMADEVICES_DEBUG is not set
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
 # CONFIG_OMAP2_DSS_DEBUG is not set
 # CONFIG_CRYPTO_DEV_UX500_DEBUG is not set
 # CONFIG_AB8500_DEBUG is not set
 # CONFIG_ARM_KERNMEM_PERMS is not set
-
-# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
-
-# Altera?
-# CONFIG_PCIE_ALTERA is not set
+# CONFIG_DEBUG_LL is not set
diff --git a/freed-ora/current/f24/config-armv7-lpae b/freed-ora/current/f24/config-armv7-lpae
index 483c49960..828b13a87 100644
--- a/freed-ora/current/f24/config-armv7-lpae
+++ b/freed-ora/current/f24/config-armv7-lpae
@@ -81,3 +81,4 @@ CONFIG_GPIO_SYSCON=m
 # CONFIG_SND_SOC_TEGRA20_DAS is not set
 # CONFIG_SND_SOC_TEGRA20_SPDIF is not set
 # CONFIG_SND_SOC_TEGRA_RT5677 is not set
+# CONFIG_DRM_OMAP is not set
diff --git a/freed-ora/current/f24/config-debug b/freed-ora/current/f24/config-debug
index d733183a2..fc6505b48 100644
--- a/freed-ora/current/f24/config-debug
+++ b/freed-ora/current/f24/config-debug
@@ -112,6 +112,8 @@ CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
 
+CONFIG_WQ_WATCHDOG=y
+
 CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
 
 CONFIG_DEBUG_KMEMLEAK=y
diff --git a/freed-ora/current/f24/config-generic b/freed-ora/current/f24/config-generic
index 5a970e4ec..8739106d4 100644
--- a/freed-ora/current/f24/config-generic
+++ b/freed-ora/current/f24/config-generic
@@ -211,6 +211,7 @@ CONFIG_BINFMT_MISC=m
 
 # CONFIG_COMMON_CLK_SI5351 is not set
 # CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_CS2000_CP is not set
 # CONFIG_COMMON_CLK_PWM is not set
 # CONFIG_COMMON_CLK_CDCE925 is not set
 # CONFIG_COMMON_CLK_HI6220 is not set
@@ -249,6 +250,7 @@ CONFIG_REGMAP_I2C=m
 # CONFIG_SPI_XILINX is not set
 # CONFIG_SPI_DESIGNWARE is not set
 # CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_LOOPBACK_TEST is not set
 # CONFIG_SPI_TLE62X0 is not set
 # CONFIG_SPI_FSL_SPI is not set
 
@@ -384,6 +386,7 @@ CONFIG_BLK_DEV_LOOP_MIN_COUNT=0
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_NVME=m
+# CONFIG_BLK_DEV_NVME_SCSI is not set
 CONFIG_BLK_DEV_SKD=m # 64-bit only but easier to put here
 CONFIG_BLK_DEV_OSD=m
 CONFIG_BLK_DEV_RAM=m
@@ -547,6 +550,7 @@ CONFIG_SCSI_AM53C974=m
 # CONFIG_SCSI_EATA_PIO is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
 CONFIG_SCSI_GDTH=m
+# CONFIG_SCSI_HISI_SAS is not set
 CONFIG_SCSI_HPTIOP=m
 CONFIG_SCSI_IPS=m
 CONFIG_SCSI_INIA100=m
@@ -713,6 +717,7 @@ CONFIG_DM_MULTIPATH_ST=m
 CONFIG_DM_RAID=m
 CONFIG_DM_FLAKEY=m
 CONFIG_DM_VERITY=m
+CONFIG_DM_VERITY_FEC=y
 CONFIG_DM_SWITCH=m
 CONFIG_DM_LOG_WRITES=m
 
@@ -758,6 +763,8 @@ CONFIG_NETLINK_DIAG=m
 
 CONFIG_BPF_JIT=y
 
+CONFIG_INET_DIAG_DESTROY=y
+
 CONFIG_TCP_CONG_ADVANCED=y
 CONFIG_TCP_CONG_BIC=m
 CONFIG_TCP_CONG_CUBIC=y
@@ -1087,6 +1094,9 @@ CONFIG_NFT_REDIR_IPV4=m
 CONFIG_NFT_REDIR_IPV6=m
 CONFIG_NFT_REJECT=m
 CONFIG_NFT_COMPAT=m
+CONFIG_NF_DUP_NETDEV=m
+CONFIG_NFT_DUP_NETDEV=m
+CONFIG_NFT_FWD_NETDEV=m
 
 CONFIG_NF_TABLES_IPV4=m
 CONFIG_NF_DUP_IPV4=m
@@ -1495,6 +1505,7 @@ CONFIG_I40E=m
 CONFIG_I40E_VXLAN=y
 # CONFIG_I40E_DCB is not set
 # CONFIG_I40E_FCOE is not set
+CONFIG_I40E_GENEVE=y
 CONFIG_I40EVF=m
 CONFIG_FM10K=m
 # CONFIG_FM10K_VXLAN is not set
@@ -1524,6 +1535,10 @@ CONFIG_NET_VENDOR_NATSEMI=y
 CONFIG_NATSEMI=m
 CONFIG_NS83820=m
 
+CONFIG_NET_VENDOR_NETRONOME=y
+CONFIG_NFP_NETVF=m
+CONFIG_NFP_NET_DEBUG=n
+
 CONFIG_NET_VENDOR_8390=y
 CONFIG_PCMCIA_AXNET=m
 CONFIG_NE2K_PCI=m
@@ -1691,7 +1706,11 @@ CONFIG_MLX4_INFINIBAND=m
 CONFIG_MLX5_CORE=m
 CONFIG_MLX5_CORE_EN=y
 CONFIG_MLX5_INFINIBAND=m
-# CONFIG_MLXSW_CORE is not set
+CONFIG_MLXSW_CORE=m
+CONFIG_MLXSW_CORE_HWMON=y
+CONFIG_MLXSW_PCI=m
+CONFIG_MLXSW_SWITCHX2=m
+CONFIG_MLXSW_SPECTRUM=m
 # CONFIG_MLX4_DEBUG is not set
 # CONFIG_SFC is not set
 
@@ -1750,7 +1769,9 @@ CONFIG_MAC80211_DEBUGFS=y
 
 # CONFIG_WIMAX is not set
 
+# CONFIG_WLAN_VENDOR_ADMTEK is not set
 # CONFIG_ADM8211 is not set
+CONFIG_WLAN_VENDOR_ATH=y
 CONFIG_ATH_COMMON=m
 CONFIG_ATH_CARDS=m
 CONFIG_ATH5K=m
@@ -1769,6 +1790,7 @@ CONFIG_ATH9K_AHB=y
 CONFIG_ATH9K_DEBUGFS=y
 CONFIG_ATH9K_HTC=m
 CONFIG_ATH9K_BTCOEX_SUPPORT=y
+# CONFIG_ATH9K_HWRNG is not set
 # CONFIG_ATH9K_HTC_DEBUGFS is not set
 # CONFIG_ATH9K_STATION_STATISTICS is not set
 # CONFIG_ATH9K_WOW is not set
@@ -1790,9 +1812,13 @@ CONFIG_CARL9170=m
 CONFIG_CARL9170_LEDS=y
 # CONFIG_CARL9170_HWRNG is not set
 CONFIG_AT76C50X_USB=m
+# CONFIG_WLAN_VENDOR_CISCO is not set
 # CONFIG_AIRO is not set
 # CONFIG_AIRO_CS is not set
+# CONFIG_WLAN_VENDOR_ATMEL is not set
 # CONFIG_ATMEL is not set
+CONFIG_WLAN_VENDOR_INTERSIL=y
+CONFIG_WLAN_VENDOR_BROADCOM=y
 CONFIG_NET_VENDOR_BROADCOM=y
 CONFIG_B43=m
 CONFIG_B43_PCMCIA=y
@@ -1829,6 +1855,7 @@ CONFIG_PCMCIA_HERMES=m
 CONFIG_ORINOCO_USB=m
 # CONFIG_TMD_HERMES is not set
 # CONFIG_PCMCIA_SPECTRUM is not set
+CONFIG_WLAN_VENDOR_ST=y
 CONFIG_CW1200=m
 CONFIG_CW1200_WLAN_SDIO=m
 CONFIG_CW1200_WLAN_SPI=m
@@ -1838,6 +1865,7 @@ CONFIG_CW1200_WLAN_SPI=m
 # CONFIG_IPW2100_DEBUG is not set
 # CONFIG_IPW2200_DEBUG is not set
 # CONFIG_LIBIPW_DEBUG is not set
+CONFIG_WLAN_VENDOR_MARVELL=y
 CONFIG_LIBERTAS=m
 CONFIG_LIBERTAS_USB=m
 CONFIG_LIBERTAS_CS=m
@@ -1849,6 +1877,7 @@ CONFIG_LIBERTAS_MESH=y
 CONFIG_BNXT=m
 CONFIG_BNXT_SRIOV=y
 
+CONFIG_WLAN_VENDOR_INTEL=y
 CONFIG_IWLWIFI=m
 CONFIG_IWLDVM=m
 CONFIG_IWLMVM=m
@@ -1873,6 +1902,7 @@ CONFIG_P54_PCI=m
 CONFIG_MWL8K=m
 # CONFIG_PRISM54 is not set
 # CONFIG_PCMCIA_WL3501 is not set
+CONFIG_WLAN_VENDOR_RSI=y
 CONFIG_RSI_91X=m
 CONFIG_RSI_DEBUGFS=y
 CONFIG_RSI_SDIO=m
@@ -1881,7 +1911,9 @@ CONFIG_RT2X00=m
 CONFIG_RT2X00_LIB_DEBUGFS=y
 # CONFIG_RT2X00_DEBUG is not set
 CONFIG_WL_MEDIATEK=y
+CONFIG_WLAN_VENDOR_MEDIATEK=y
 CONFIG_MT7601U=m
+CONFIG_WLAN_VENDOR_RALINK=y
 CONFIG_RT2400PCI=m
 CONFIG_RT2500PCI=m
 CONFIG_RT61PCI=m
@@ -1901,6 +1933,7 @@ CONFIG_RT2800PCI_RT53XX=y
 CONFIG_RT73USB=m
 CONFIG_RTL8180=m
 CONFIG_RTL8187=m
+CONFIG_WLAN_VENDOR_ZYDAS=y
 # CONFIG_USB_ZD1201 is not set
 # CONFIG_USB_NET_SR9800 is not set
 CONFIG_USB_NET_RNDIS_WLAN=m
@@ -1912,13 +1945,19 @@ CONFIG_USB_NET_CH9200=m
 CONFIG_ZD1211RW=m
 # CONFIG_ZD1211RW_DEBUG is not set
 
+CONFIG_WLAN_VENDOR_TI=y
+CONFIG_WILINK_PLATFORM_DATA=y
+CONFIG_WLCORE=m
+CONFIG_WLCORE_SDIO=m
+CONFIG_WLCORE_SPI=m
 CONFIG_WL12XX=m
-
 CONFIG_WL1251=m
-CONFIG_WL1251_SPI=m
 CONFIG_WL1251_SDIO=m
+CONFIG_WL1251_SPI=m
+CONFIG_WL18XX=m
 
 CONFIG_RTL_CARDS=m
+CONFIG_WLAN_VENDOR_REALTEK=y
 CONFIG_RTLWIFI=m
 CONFIG_RTL8192CE=m
 CONFIG_RTL8192SE=m
@@ -1946,6 +1985,7 @@ CONFIG_IEEE802154_FAKELB=m
 CONFIG_IEEE802154_ATUSB=m
 CONFIG_IEEE802154_CC2520=m
 # CONFIG_IEEE802154_AT86RF230 is not set
+# CONFIG_IEEE802154_ADF7242 is not set
 # CONFIG_IEEE802154_MRF24J40 is not set
 # CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set
 # CONFIG_IEEE802154_AT86RF230_DEBUGFS is not set
@@ -1966,7 +2006,13 @@ CONFIG_6LOWPAN_NHC_IPV6=m
 CONFIG_6LOWPAN_NHC_MOBILITY=m
 CONFIG_6LOWPAN_NHC_ROUTING=m
 CONFIG_6LOWPAN_NHC_UDP=m
-
+CONFIG_6LOWPAN_DEBUGFS=y
+CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
+CONFIG_6LOWPAN_GHC_UDP=m
+CONFIG_6LOWPAN_GHC_ICMPV6=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
+CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
 
 #
 # Token Ring devices
@@ -2067,11 +2113,14 @@ CONFIG_NFC_ST21NFCA=m
 CONFIG_NFC_ST21NFCA_I2C=m
 # CONFIG_NFC_ST21NFCB is not set
 # CONFIG_NFC_ST21NFCB_I2C is not set
+# CONFIG_NFC_ST95HF is not set
 # CONFIG_NFC_NXP_NCI is not set
 # CONFIG_NFC_NCI_SPI is not set
 # CONFIG_NFC_NCI_UART is not set
 # CONFIG_NFC_ST_NCI is not set
+# CONFIG_NFC_ST_NCI_I2C is not set
 # CONFIG_NFC_S3FWRN5_I2C is not set
+# CONFIG_NFC_ST_NCI_SPI is not set
 # CONFIG_NFC_FDP is not set
 # CONFIG_NFC_MRVL_I2C is not set
 # CONFIG_NFC_MRVL_SPI is not set
@@ -2442,6 +2491,7 @@ CONFIG_TOUCHSCREEN_DYNAPRO=m
 CONFIG_TOUCHSCREEN_EDT_FT5X06=m
 CONFIG_TOUCHSCREEN_EETI=m
 CONFIG_TOUCHSCREEN_EGALAX=m
+CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m
 CONFIG_TOUCHSCREEN_ELAN=m
 CONFIG_TOUCHSCREEN_ELO=m
 CONFIG_TOUCHSCREEN_FUJITSU=m
@@ -2456,6 +2506,7 @@ CONFIG_TOUCHSCREEN_MK712=m
 CONFIG_TOUCHSCREEN_PENMOUNT=m
 # CONFIG_TOUCHSCREEN_SUR40 is not set
 # CONFIG_TOUCHSCREEN_TPS6507X is not set
+CONFIG_TOUCHSCREEN_TS4800=m
 CONFIG_TOUCHSCREEN_TSC_SERIO=m
 CONFIG_TOUCHSCREEN_TSC2007=m
 CONFIG_TOUCHSCREEN_TOUCHIT213=m
@@ -2836,6 +2887,7 @@ CONFIG_SENSORS_MAX16064=m
 CONFIG_SENSORS_MAX20751=m
 CONFIG_SENSORS_LM25066=m
 CONFIG_SENSORS_LTC2978=m
+CONFIG_SENSORS_LTC3815=m
 CONFIG_SENSORS_MAX34440=m
 CONFIG_SENSORS_MAX8688=m
 CONFIG_SENSORS_MAX1668=m
@@ -2852,10 +2904,13 @@ CONFIG_IIO_BUFFER_CB=y
 # CONFIG_IIO_KFIFO_BUF is not set
 CONFIG_IIO_TRIGGERED_BUFFER=m
 CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_SW_TRIGGER=y
 CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 CONFIG_IIO_INTERRUPT_TRIGGER=m
 CONFIG_HID_SENSOR_IIO_COMMON=m
 CONFIG_HID_SENSOR_IIO_TRIGGER=m
+CONFIG_IIO_CONFIGFS=m
+# CONFIG_IIO_HRTIMER_TRIGGER is not set
 # CONFIG_IIO_SYSFS_TRIGGER is not set
 # CONFIG_IIO_SSP_SENSORHUB is not set
 # CONFIG_AD5446 is not set
@@ -2883,6 +2938,7 @@ CONFIG_STK3310=m
 # CONFIG_TSL4531 is not set
 # CONFIG_NAU7802 is not set
 # CONFIG_TI_ADC081C is not set
+# CONFIG_TI_ADS8688 is not set
 # CONFIG_TI_ADC128S052 is not set
 # CONFIG_VIPERBOARD_ADC is not set
 # CONFIG_VF610_ADC is not set
@@ -2908,9 +2964,11 @@ CONFIG_ACPI_ALS=m
 # CONFIG_HID_SENSOR_PRESS is not set
 # CONFIG_IIO_ST_PRESS is not set
 # CONFIG_KXSD9 is not set
+# CONFIG_MMA7455_I2C is not set
 # CONFIG_MMA8452 is not set
 # CONFIG_MMA9551 is not set
 # CONFIG_MMA9553 is not set
+# CONFIG_MXC6255 is not set
 # CONFIG_STK8312 is not set
 # CONFIG_STK8BA50 is not set
 # CONFIG_AD7266 is not set
@@ -2945,7 +3003,7 @@ CONFIG_ACPI_ALS=m
 # CONFIG_BMG160 is not set
 # CONFIG_ADIS16400 is not set
 # CONFIG_ADIS16480 is not set
-# CONFIG_DHT11 is not set
+CONFIG_DHT11=m
 # CONFIG_MPL3115 is not set
 # CONFIG_MS5611 is not set
 # CONFIG_MPL115 is not set
@@ -2957,6 +3015,7 @@ CONFIG_KXCJK1013=m
 # CONFIG_ISL29125 is not set
 # CONFIG_JSA1212 is not set
 CONFIG_RPR0521=m
+CONFIG_MAX30100=m
 CONFIG_OPT3001=m
 CONFIG_PA12203001=m
 # CONFIG_TCS3414 is not set
@@ -2965,6 +3024,8 @@ CONFIG_PA12203001=m
 # CONFIG_MCP4922 is not set
 # CONFIG_MAX1027 is not set
 # CONFIG_MXC4005 is not set
+# CONFIG_IAQCORE is not set
+# CONFIG_INA2XX_ADC is not set
 # CONFIG_VZ89X is not set
 # CONFIG_HDC100X is not set
 # CONFIG_HTU21 is not set
@@ -2976,6 +3037,7 @@ CONFIG_PA12203001=m
 # CONFIG_TSYS01 is not set
 # CONFIG_TSYS02D is not set
 # CONFIG_HI8435 is not set
+# CONFIG_IMX7D_ADC is not set
 
 # staging IIO drivers
 # CONFIG_AD7291 is not set
@@ -3026,6 +3088,7 @@ CONFIG_PA12203001=m
 # CONFIG_SRAM is not set
 # CONFIG_TI_DAC7512 is not set
 # CONFIG_BMP085_SPI is not set
+# CONFIG_MMA7455_SPI is not set
 # CONFIG_LATTICE_ECP3_CONFIG is not set
 
 CONFIG_W1=m
@@ -3071,6 +3134,7 @@ CONFIG_IPMI_POWEROFF=m
 #
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_CORE=y
+CONFIG_WATCHDOG_SYSFS=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 CONFIG_SOFT_WATCHDOG=m
 CONFIG_WDTPCI=m
@@ -3102,6 +3166,7 @@ CONFIG_W83977F_WDT=m
 CONFIG_PCIPCWATCHDOG=m
 CONFIG_USBPCWATCHDOG=m
 # CONFIG_SBC_EPX_C3_WATCHDOG is not set
+# CONFIG_TS4800_WATCHDOG is not set
 CONFIG_WM8350_WATCHDOG=m
 CONFIG_WM831X_WATCHDOG=m
 # CONFIG_MAX63XX_WATCHDOG is not set
@@ -3111,6 +3176,7 @@ CONFIG_WM831X_WATCHDOG=m
 # CONFIG_XILINX_WATCHDOG is not set
 # CONFIG_CADENCE_WATCHDOG is not set
 # CONFIG_BCM7038_WDT is not set
+# CONFIG_ZIIRAVE_WATCHDOG is not set
 
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_TIMERIOMEM=m
@@ -3161,6 +3227,7 @@ CONFIG_RTC_DRV_V3020=m
 CONFIG_RTC_DRV_DS2404=m
 CONFIG_RTC_DRV_STK17TA8=m
 # CONFIG_RTC_DRV_S35390A is not set
+CONFIG_RTC_DRV_RX8010=m
 CONFIG_RTC_DRV_RX8581=m
 CONFIG_RTC_DRV_RX8025=m
 CONFIG_RTC_DRV_DS1286=m
@@ -3235,6 +3302,7 @@ CONFIG_DRM_RADEON_USERPTR=y
 CONFIG_DRM_AMDGPU=m
 # CONFIG_DRM_AMDGPU_CIK is not set
 CONFIG_DRM_AMDGPU_USERPTR=y
+CONFIG_DRM_AMD_POWERPLAY=y
 # CONFIG_DRM_I810 is not set
 # CONFIG_DRM_MGA is not set
 CONFIG_DRM_MGAG200=m  # do not enable on f17 or older
@@ -3342,6 +3410,10 @@ CONFIG_VIDEO_CX231XX=m
 CONFIG_VIDEO_CX231XX_ALSA=m
 CONFIG_VIDEO_CX231XX_DVB=m
 CONFIG_VIDEO_CX231XX_RC=y
+CONFIG_VIDEO_GO7007=m
+CONFIG_VIDEO_GO7007_USB=m
+CONFIG_VIDEO_GO7007_LOADER=m
+CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
 CONFIG_VIDEO_HEXIUM_ORION=m
 CONFIG_VIDEO_HEXIUM_GEMINI=m
 CONFIG_VIDEO_IVTV=m
@@ -3354,6 +3426,7 @@ CONFIG_VIDEO_SAA6588=m
 CONFIG_VIDEO_SAA7134=m
 CONFIG_VIDEO_SAA7134_ALSA=m
 CONFIG_VIDEO_SAA7134_DVB=m
+CONFIG_VIDEO_SAA7134_GO7007=m
 CONFIG_VIDEO_SAA7134_RC=y
 CONFIG_VIDEO_SOLO6X10=m
 CONFIG_VIDEO_USBVISION=m
@@ -4172,6 +4245,7 @@ CONFIG_USB_SERIAL_KLSI=m
 CONFIG_USB_SERIAL_KOBIL_SCT=m
 CONFIG_USB_SERIAL_MCT_U232=m
 # CONFIG_USB_SERIAL_METRO is not set
+CONFIG_USB_SERIAL_MXUPORT11=m
 CONFIG_USB_SERIAL_MOS7720=m
 CONFIG_USB_SERIAL_MOS7715_PARPORT=y
 # CONFIG_USB_SERIAL_WISHBONE is not set
@@ -4224,6 +4298,7 @@ CONFIG_USB_ULPI_BUS=m
 # CONFIG_PHY_PXA_28NM_HSIC is not set
 # CONFIG_PHY_PXA_28NM_USB2 is not set
 # CONFIG_PHY_TUSB1210 is not set
+# CONFIG_PHY_HI6220_USB is not set
 # CONFIG_AM335X_PHY_USB is not set
 # CONFIG_SAMSUNG_USBPHY is not set
 # CONFIG_BCM_KONA_USB2_PHY is not set
@@ -4236,6 +4311,7 @@ CONFIG_USB_EMI26=m
 CONFIG_USB_FTDI_ELAN=m
 # CONFIG_USB_GADGET is not set
 # CONFIG_USB_DWC3 is not set
+# CONFIG_USB_DWC3_OF_SIMPLE is not set
 # CONFIG_USB_GADGETFS is not set
 # CONFIG_USB_OXU210HP_HCD is not set
 CONFIG_USB_IOWARRIOR=m
@@ -4267,7 +4343,7 @@ CONFIG_USB_STKWEBCAM=m
 # CONFIG_USB_TEST is not set
 # CONFIG_USB_EHSET_TEST_FIXTURE is not set
 CONFIG_USB_TRANCEVIBRATOR=m
-CONFIG_USB_U132_HCD=m
+# CONFIG_USB_U132_HCD is not set
 CONFIG_USB_UEAGLEATM=m
 CONFIG_USB_XUSBATM=m
 
@@ -4371,6 +4447,7 @@ CONFIG_MFD_VIPERBOARD=m
 # CONFIG_EZX_PCAP is not set
 # CONFIG_INTEL_SOC_PMIC is not set
 # CONFIG_MFD_ATMEL_FLEXCOM is not set
+# CONFIG_TS4800_IRQ is not set
 
 #
 # File systems
@@ -4411,6 +4488,7 @@ CONFIG_QUOTA_NETLINK_INTERFACE=y
 # CONFIG_QFMT_V1 is not set
 CONFIG_QFMT_V2=y
 CONFIG_QUOTACTL=y
+# CONFIG_MANDATORY_FILE_LOCKING is not set
 CONFIG_DNOTIFY=y
 # Autofsv3 is obsolete.
 # systemd is dependant upon AUTOFS, so build it in.
@@ -4728,6 +4806,8 @@ CONFIG_HEADERS_CHECK=y
 # This breaks booting until the module patches are in-tree
 # CONFIG_DEBUG_KOBJECT_RELEASE is not set
 #
+# This just changes a default enable with workqueue.debug_force_rr_cpu
+# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
 #
 # These debug options are deliberatly left on (even in 'make release' kernels).
 # They aren't that much of a performance impact, and the value
@@ -4745,6 +4825,7 @@ CONFIG_DEBUG_BOOT_PARAMS=y
 CONFIG_DEBUG_VM=y
 # CONFIG_DEBUG_VM_VMACACHE is not set
 # CONFIG_DEBUG_VM_RB is not set # revisit this if performance isn't horrible
+CONFIG_DEBUG_VM_PGFLAGS=y
 # CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
 CONFIG_LOCKUP_DETECTOR=y
 # CONFIG_DEBUG_INFO_REDUCED is not set
@@ -4776,6 +4857,10 @@ CONFIG_KGDB_LOW_LEVEL_TRAP=y
 # CONFIG_KGDB_TESTS_ON_BOOT is not set
 # CONFIG_GDB_SCRIPTS is not set
 
+# CONFIG_UBSAN is not set
+# CONFIG_UBSAN_ALIGNMENT is not set
+# CONFIG_UBSAN_SANITIZE_ALL is not set
+
 
 #
 # Security options
@@ -4805,6 +4890,7 @@ CONFIG_AUDITSYSCALL=y
 
 CONFIG_SECCOMP=y
 CONFIG_STRICT_DEVMEM=y
+CONFIG_IO_STRICT_DEVMEM=y
 
 
 #
@@ -5121,6 +5207,9 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
 # CONFIG_SND_SOC_CS42XX8_I2C is not set
 # CONFIG_SND_SOC_PCM1681 is not set
 # CONFIG_SND_SOC_PCM1792A is not set
+# CONFIG_SND_SOC_PCM179X is not set
+# CONFIG_SND_SOC_PCM3168A_I2C is not set
+# CONFIG_SND_SOC_PCM3168A_SPI is not set
 # CONFIG_SND_SOC_PCM512x_I2C is not set
 # CONFIG_SND_SOC_PCM512x_SPI is not set
 # CONFIG_SND_SOC_QCOM is not set
@@ -5145,6 +5234,7 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
 # CONFIG_SND_SOC_WM8804_SPI is not set
 # CONFIG_SND_SOC_WM8903 is not set
 # CONFIG_SND_SOC_WM8962 is not set
+# CONFIG_SND_SOC_WM8974 is not set
 # CONFIG_SND_SOC_TPA6130A2 is not set
 # CONFIG_SND_SOC_FSL_ASRC is not set
 # CONFIG_SND_SOC_FSL_ESAI is not set
@@ -5182,7 +5272,9 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
 # CONFIG_SND_SOC_CS4349 is not set
 # CONFIG_SND_SOC_GTM601 is not set
 # CONFIG_SND_SOC_STI_SAS is not set
-# 
+# CONFIG_SND_SOC_INNO_RK3036 is not set
+# CONFIG_SND_SOC_IMG is not set
+CONFIG_SND_SOC_AMD_ACP=m
 
 CONFIG_BALLOON_COMPACTION=y
 CONFIG_COMPACTION=y
@@ -5396,7 +5488,8 @@ CONFIG_INPUT_GP2A=m
 
 # CONFIG_INTEL_MENLOW is not set
 CONFIG_ENCLOSURE_SERVICES=m
-CONFIG_IPWIRELESS=m
+# Disable temporarily while I (pbr) work out why this filters properly when build with rpmbuild but not in koji
+# CONFIG_IPWIRELESS is not set
 
 CONFIG_MEMSTICK=m
 # CONFIG_MEMSTICK_DEBUG is not set
@@ -5473,7 +5566,6 @@ CONFIG_STAGING_MEDIA=y
 # CONFIG_VIDEO_DT3155 is not set
 # CONFIG_TI_ST is not set
 # CONFIG_FB_XGI is not set
-# CONFIG_VIDEO_GO7007 is not set
 # CONFIG_I2C_BCM2048 is not set
 # CONFIG_DT3155 is not set
 # CONFIG_PRISM2_USB is not set
@@ -5531,6 +5623,8 @@ CONFIG_USBIP_HOST=m
 # CONFIG_FB_SM750 is not set
 # CONFIG_STAGING_RDMA is not set
 # CONFIG_WILC1000_DRIVER is not set
+# CONFIG_WILC1000_SDIO is not set
+# CONFIG_WILC1000_SPI is not set
 # END OF STAGING
 
 #
diff --git a/freed-ora/current/f24/config-nodebug b/freed-ora/current/f24/config-nodebug
index 65e8accd1..c173637a2 100644
--- a/freed-ora/current/f24/config-nodebug
+++ b/freed-ora/current/f24/config-nodebug
@@ -112,6 +112,7 @@ CONFIG_KDB_CONTINUE_CATASTROPHIC=0
 # CONFIG_DETECT_HUNG_TASK is not set
 CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+# CONFIG_WQ_WATCHDOG is not set
 
 # CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set
 
diff --git a/freed-ora/current/f24/config-powerpc64-generic b/freed-ora/current/f24/config-powerpc64-generic
index b543cfbb6..ffc765a13 100644
--- a/freed-ora/current/f24/config-powerpc64-generic
+++ b/freed-ora/current/f24/config-powerpc64-generic
@@ -60,6 +60,7 @@ CONFIG_MEMORY_HOTREMOVE=y
 CONFIG_PPC64_SUPPORTS_MEMORY_FAILURE=y
 
 CONFIG_CGROUP_HUGETLB=y
+CONFIG_MEM_SOFT_DIRTY=y
 
 CONFIG_RCU_FANOUT=64
 CONFIG_RCU_FANOUT_LEAF=16
@@ -74,14 +75,13 @@ CONFIG_PSERIES_CPUIDLE=y
 
 CONFIG_HW_RANDOM_PSERIES=m
 CONFIG_CRYPTO_DEV_NX=y
-CONFIG_CRYPTO_842=m
 CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
 CONFIG_CRYPTO_DEV_NX_COMPRESS=m
 CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
 CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
 CONFIG_CRYPTO_DEV_NX_COMPRESS_CRYPTO=m
 CONFIG_CRYPTO_DEV_VMX=y
-# CONFIG_CRYPTO_DEV_VMX_ENCRYPT is not set
+CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
 
 CONFIG_XZ_DEC_POWERPC=y
 
@@ -352,6 +352,7 @@ CONFIG_I2C_MPC=m
 # CONFIG_IBM_EMAC is not set
 # CONFIG_NET_VENDOR_PASEMI is not set
 # CONFIG_NET_VENDOR_TOSHIBA is not set
+CONFIG_IBMVNIC=m
 
 CONFIG_MDIO_OCTEON=m
 
diff --git a/freed-ora/current/f24/config-s390x b/freed-ora/current/f24/config-s390x
index a41d95ac4..6188d09fb 100644
--- a/freed-ora/current/f24/config-s390x
+++ b/freed-ora/current/f24/config-s390x
@@ -65,6 +65,7 @@ CONFIG_SCLP_VT220_CONSOLE=y
 CONFIG_SCLP_CPI=m
 CONFIG_SCLP_ASYNC=m
 CONFIG_SCLP_ASYNC_ID="000000000"
+CONFIG_SCLP_OFB=y
 CONFIG_S390_TAPE=m
 CONFIG_S390_TAPE_3590=m
 
diff --git a/freed-ora/current/f24/config-x86-32-generic b/freed-ora/current/f24/config-x86-32-generic
index 865fb9004..04100f267 100644
--- a/freed-ora/current/f24/config-x86-32-generic
+++ b/freed-ora/current/f24/config-x86-32-generic
@@ -40,6 +40,7 @@ CONFIG_HIGHMEM4G=y
 # CONFIG_HIGHMEM64G is not set
 CONFIG_HIGHMEM=y
 CONFIG_HIGHPTE=y
+CONFIG_ZONE_DMA=y
 
 # CONFIG_MATH_EMULATION is not set
 
@@ -219,4 +220,5 @@ CONFIG_OF=y
 # CONFIG_COMMON_CLK_SI570 is not set
 # CONFIG_COMMON_CLK_QCOM is not set
 # CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
+# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
 # CONFIG_KEYBOARD_BCM is not set
diff --git a/freed-ora/current/f24/config-x86-generic b/freed-ora/current/f24/config-x86-generic
index a436377af..f54836a6d 100644
--- a/freed-ora/current/f24/config-x86-generic
+++ b/freed-ora/current/f24/config-x86-generic
@@ -138,11 +138,16 @@ CONFIG_CRYPTO_DEV_CCP_DD=m
 CONFIG_CRYPTO_DEV_CCP_CRYPTO=m
 CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
 CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
+CONFIG_CRYPTO_DEV_QAT_C3XXX=m
+CONFIG_CRYPTO_DEV_QAT_C62X=m
+CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m
+CONFIG_CRYPTO_DEV_QAT_C62XVF=m
 
 CONFIG_GENERIC_ISA_DMA=y
 
 CONFIG_PCI_MMCONFIG=y
 CONFIG_PCI_BIOS=y
+CONFIG_VMD=m
 
 CONFIG_HOTPLUG_PCI_COMPAQ=m
 # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
@@ -175,6 +180,7 @@ CONFIG_I2C_VIA=m
 CONFIG_I2C_VIAPRO=m
 CONFIG_I2C_DESIGNWARE_CORE=m
 CONFIG_I2C_DESIGNWARE_PLATFORM=m
+CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
 
 #rhbz 997149
 # CONFIG_DELL_RBU is not set
@@ -221,6 +227,7 @@ CONFIG_X86_PLATFORM_DEVICES=y
 
 CONFIG_AMILO_RFKILL=m
 CONFIG_ASUS_LAPTOP=m
+CONFIG_ASUS_WIRELESS=m
 CONFIG_COMPAL_LAPTOP=m
 CONFIG_DELL_LAPTOP=m
 CONFIG_DELL_RBTN=m
@@ -231,6 +238,7 @@ CONFIG_FUJITSU_TABLET=m
 CONFIG_FUJITSU_LAPTOP=m
 # CONFIG_FUJITSU_LAPTOP_DEBUG is not set
 CONFIG_IDEAPAD_LAPTOP=m
+CONFIG_INTEL_HID_EVENT=m
 CONFIG_MSI_LAPTOP=m
 CONFIG_PANASONIC_LAPTOP=m
 CONFIG_SAMSUNG_LAPTOP=m
@@ -323,6 +331,7 @@ CONFIG_SPI_PXA2XX=m
 # CONFIG_SPI_ZYNQMP_GQSPI is not set
 # CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
 # CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
 
 CONFIG_MTD_ESB2ROM=m
 CONFIG_MTD_CK804XROM=m
@@ -412,6 +421,7 @@ CONFIG_LPC_ICH=m
 CONFIG_GPIO_ICH=m
 # CONFIG_GPIO_LYNXPOINT is not set
 # CONFIG_GPIO_F7188X is not set
+# CONFIG_GPIO_104_IDI_48 is not set
 
 # These should all go away with IC2_ACPI is fixed
 # CONFIG_MFD_AS3711 is not set
@@ -473,6 +483,7 @@ CONFIG_CRYPTO_CRC32_PCLMUL=m
 CONFIG_HP_ACCEL=m
 
 CONFIG_SURFACE_PRO3_BUTTON=m
+CONFIG_INTEL_PUNIT_IPC=m
 
 # CONFIG_RAPIDIO is not set
 
@@ -518,6 +529,7 @@ CONFIG_X86_INTEL_LPSS=y
 CONFIG_IDMA64=m
 
 # CONFIG_X86_AMD_PLATFORM_DEVICE is not set
+# CONFIG_X86_INTEL_MID is not set
 # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set
 
 CONFIG_MFD_INTEL_LPSS_ACPI=m
@@ -544,12 +556,15 @@ CONFIG_SND_SOC_INTEL_HASWELL_MACH=m
 CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m
 CONFIG_SND_SOC_INTEL_BAYTRAIL=m
 CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH=m
+CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m
 CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH=m
 CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m
 CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m
 CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m
 CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m
 CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m
 CONFIG_SND_SOC_AC97_CODEC=m
 # CONFIG_SND_SOC_TAS571X is not set
 # CONFIG_SND_SUN4I_CODEC is not set
diff --git a/freed-ora/current/f24/config-x86_64-generic b/freed-ora/current/f24/config-x86_64-generic
index 9d13391fc..8d8b27519 100644
--- a/freed-ora/current/f24/config-x86_64-generic
+++ b/freed-ora/current/f24/config-x86_64-generic
@@ -113,7 +113,7 @@ CONFIG_SPARSEMEM_VMEMMAP=y
 # CONFIG_MOVABLE_NODE is not set
 CONFIG_MEMORY_HOTPLUG=y
 # CONFIG_ARCH_MEMORY_PROBE is not set
-# CONFIG_MEMORY_HOTREMOVE is not set
+CONFIG_MEMORY_HOTREMOVE=y
 # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set 
 
 # CONFIG_BLK_DEV_CMD640 is not set
@@ -176,8 +176,10 @@ CONFIG_THUNDERBOLT=m
 
 CONFIG_NTB=m
 CONFIG_NTB_NETDEV=m
+CONFIG_NTB_AMD=m
 CONFIG_NTB_INTEL=m
 CONFIG_NTB_PINGPONG=m
+CONFIG_NTB_PERF=m
 CONFIG_NTB_TOOL=m
 CONFIG_NTB_TRANSPORT=m
 
@@ -212,3 +214,20 @@ CONFIG_CMA=y
 # CONFIG_CMA_DEBUG is not set
 # CONFIG_CMA_DEBUGFS is not set
 CONFIG_CMA_AREAS=7
+
+# Changes for persistent memory devices
+# ZONE_DMA and ZONE_DEVICE can now co-exist
+CONFIG_ZONE_DMA=y
+CONFIG_ZONE_DEVICE=y
+CONFIG_NVDIMM_PFN=y
+CONFIG_ND_PFN=m
+
+# Staging
+CONFIG_STAGING_RDMA=y
+# CONFIG_INFINIBAND_AMSO1100 is not set
+# CONFIG_INFINIBAND_EHCA is not set
+CONFIG_INFINIBAND_HFI1=m
+# CONFIG_HFI1_DEBUG_SDMA_ORDER is not set
+CONFIG_HFI1_VERBS_31BIT_PSN=y
+# CONFIG_SDMA_VERBOSITY is not set
+# CONFIG_PRESCAN_RXQ is not set
diff --git a/freed-ora/current/f24/deblob-4.5 b/freed-ora/current/f24/deblob-4.5
new file mode 100755
index 000000000..09a7faea2
--- /dev/null
+++ b/freed-ora/current/f24/deblob-4.5
@@ -0,0 +1,3213 @@
+#! /bin/sh
+
+#    Copyright (C) 2008-2016 Alexandre Oliva <lxoliva@fsfla.org>
+#    Copyright (C) 2008 Jeff Moe
+#    Copyright (C) 2009 Rubén Rodríguez <ruben@gnu.org>
+#
+#    This program is part of GNU Linux-libre, a GNU project that
+#    publishes scripts to clean up Linux so as to make it suitable for
+#    use in the GNU Project and in Free System Distributions.
+#
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public License as published by
+#    the Free Software Foundation; either version 2 of the License, or
+#    (at your option) any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#    GNU General Public License for more details.
+#
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not, write to the Free Software
+#    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+
+
+# deblob - remove non-free blobs from the vanilla linux kernel
+
+# http://www.fsfla.org/svn/fsfla/software/linux-libre
+
+
+# This script, suited for the kernel version named below, in kver,
+# attempts to remove only non-Free Software bits, without removing
+# Free Software that happens to be in the same file.
+
+# Drivers that currently require non-Free firmware are retained, but
+# firmware included in GPLed sources is replaced with /*(DEBLOBBED)*/
+# if the deblob-check script, that knows how to do this, is present.
+# -lxoliva
+
+
+# See also:
+# http://wiki.debian.org/KernelFirmwareLicensing
+# svn://svn.debian.org/kernel/dists/trunk/linux-2.6/debian/patches/debian/dfsg/files-1
+# http://wiki.gnewsense.org/Builder gen-kernel
+
+# Thanks to Brian Brazil @ gnewsense
+
+
+# For each kver release, start extra with an empty string, then count
+# from 1 if changes are needed that require rebuilding the tarball.
+kver=4.5 extra=
+
+set -e
+
+case $1 in
+--force)
+  echo "WARNING: Using the force, ignored errors will be" >&2
+  die () {
+    echo ERROR: "$@" >&2
+    errors=:
+  }
+  forced=: errors=false
+  shift
+  ;;
+*)
+  die () {
+    echo ERROR: "$@" >&2
+    echo Use --force to ignore
+    exit 1
+  }
+  forced=false errors=false
+  ;;
+esac
+
+check=`echo "$0" | sed 's,[^/]*$,,;s,^$,.,;s,/*$,,'`/deblob-check
+if [ ! -f $check ] ; then
+  if $forced; then
+    die deblob-check script missing, will remove entire files
+  else
+    die deblob-check script missing
+  fi
+  have_check=false
+else
+  have_check=:
+  [ -x $check ] || check="/bin/sh $check"
+fi
+
+filetest () {
+  if [ ! -f $1 ]; then
+    die $1 does not exist, something is wrong && return 1
+  fi
+}
+
+announce () {
+  echo
+  echo "$@"
+}
+
+clean_file () {
+  #$1 = filename
+  filetest $1 || return 0
+  rm $1
+  echo $1: removed
+}
+
+check_changed () {
+  #$1 = filename
+  if cmp $1.deblob $1 > /dev/null; then
+    rm $1.deblob
+    die $1 did not change, something is wrong && return 1
+  fi
+  mv $1.deblob $1
+}
+
+clean_blob () {
+  #$1 = filename
+  filetest $1 || return 0
+  if $have_check; then
+    name=$1
+    set fnord "$@" -d
+    shift 2
+    if $check "$@" -i linux-$kver $name > $name.deblob; then
+      if [ ! -s $name.deblob ]; then
+	die got an empty file after removing blobs from $name
+      fi
+    else
+      die failed removing blobs from $name
+    fi
+    check_changed $name && echo $name: removed blobs
+  else
+    clean_file $1
+  fi
+}
+
+dummy_blob () {
+  #$1 = filename
+  if test -f $1; then
+    die $1 exists, something is wrong && return 0
+  elif test ! -f firmware/Makefile; then
+    die firmware/Makefile does not exist, something is wrong && return 0
+  fi
+
+  clean_sed "s,`echo $1 | sed s,^firmware/,,`,\$(DEBLOBBED),g" \
+    firmware/Makefile "dropped $1"
+}
+
+clean_fw () {
+  #$1 = firmware text input, $2 = firmware output
+  filetest $1 || return 0
+  if test -f $2; then
+    die $2 exists, something is wrong && return 0
+  fi
+  clean_blob $1 -s 4
+  dummy_blob $2
+}
+
+drop_fw_file () {
+  #$1 = firmware text input, $2 = firmware output
+  filetest $1 || return 0
+  if test -f $2; then
+    die $2 exists, something is wrong && return 0
+  fi
+  clean_file $1
+  dummy_blob $2
+}
+
+clean_kconfig () {
+  #$1 = filename $2 = things to remove
+  case $1 in
+  -f)
+    shift
+    ;;
+  *)
+    if $have_check; then
+      filetest $1 || return 0
+      if sed -n "/^\(menu\)\?config $2$/p" $1 | grep . > /dev/null; then
+	:
+      else
+	die $1 does not contain matches for $2
+      fi      
+      return 0
+    fi
+    ;;
+  esac
+  filetest $1 || return 0
+  sed "/^config \\($2\\)\$/{p;i\
+	depends on NONFREE
+d;}" $1 > $1.deblob
+  check_changed $1 && echo $1: marked config $2 as depending on NONFREE
+}
+
+clean_mk () {
+  #$1 = config $2 = Makefile name
+  # We don't clean up Makefiles any more --lxoliva
+  # sed -i "/\\($1\\)/d" $2
+  # echo $2: removed $1 support
+  # check_changed $2
+  filetest $2 || return 0
+  if sed -n "/\\($1\\)/p" $2 | grep . > /dev/null; then
+    :
+  else
+    die $2 does not contain matches for $1
+  fi
+}
+
+clean_sed () {
+  #$1 = sed-script $2 = file $3 = comment
+  filetest $2 || return 0
+  sed -e "$1" "$2" > "$2".deblob || {
+    die $2: failed: ${3-applied sed script $1} && return 0; }
+  check_changed $2 && echo $2: ${3-applied sed script $1}
+}
+
+reject_firmware () {
+  #$1 = file $2 = pre sed pattern
+  filetest $1 || return 0
+  clean_sed "$2"'
+s,\(^\|[^>.0-9a-zA-Z_$]\)request\(_ihex\)\?_firmware\(_nowait\|_direct\)\?\($\|[^-.0-9a-zA-Z_$),; ]\),\1reject_firmware\3\4,g
+' "$1" 'disabled non-Free firmware-loading machinery'
+}
+
+maybe_reject_firmware () {
+  #$1 = file $2 = pre sed pattern
+  filetest $1 || return 0
+  clean_sed "$2"'
+s,\(^\|[^>.0-9a-zA-Z_$]\)request_\(ihex_\)\?firmware\(_nowait\|_direct\)\?\($\|[^-.0-9a-zA-Z_$),; ]\),\1maybe_reject_\2firmware\3\4,g
+' "$1" 'retain Free firmware-loading machinery, disabling non-Free one'
+}
+
+undefine_macro () {
+  #$1 - macro name
+  #$2 - substitution
+  #$3 - message
+  #rest - file names
+  macro=$1 repl=$2 msg=$3; shift 3
+  for f in "$@"; do
+    clean_sed "
+s,^#define $macro .*\$,/*(DEBLOBBED)*/,;
+s,$macro,$repl,g;
+" "$f" "$msg"
+  done
+}
+
+undefault_firmware () {
+  #$1 - pattern such that $1_DEFAULT_FIRMWARE is #defined to non-Free firmware
+  #$@ other than $1 - file names
+  macro="$1"_DEFAULT_FIRMWARE; shift
+  undefine_macro "$macro" "\"/*(DEBLOBBED)*/\"" \
+    "disabled non-Free firmware" "$@"
+}
+
+# First, check that files that contain firmwares and their
+# corresponding sources are present.
+
+for f in \
+    drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/com.fuc \
+    drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3.h \
+\
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/macros.fuc \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/com.fuc \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf100.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf100.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf117.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf117.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk104.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk104.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk110.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk110.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk208.fuc5 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk208.fuc5.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hub.fuc \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgf100.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgf100.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgf117.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgf117.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk104.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk104.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk110.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk110.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk208.fuc5 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk208.fuc5.h \
+    drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgm107.fuc5 \
+  drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgm107.fuc5.h \
+\
+    drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/g98.fuc0s \
+  drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/g98.fuc0s.h \
+\
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/macros.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/kernel.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/arith.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/host.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/memx.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/perf.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/i2c_.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/test.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/idle.fuc \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gf119.fuc4 \
+  drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gf119.fuc4.h \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5 \
+  drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h \
+    drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gt215.fuc3 \
+  drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gt215.fuc3.h \
+\
+  drivers/net/wan/wanxlfw.inc_shipped \
+    drivers/net/wan/wanxlfw.S \
+  drivers/net/wireless/atmel/atmel.c \
+    drivers/net/wireless/atmel/atmel.c \
+  drivers/scsi/aic7xxx/aic79xx_seq.h_shipped \
+    drivers/scsi/aic7xxx/aic79xx.seq \
+  drivers/scsi/aic7xxx/aic7xxx_seq.h_shipped \
+    drivers/scsi/aic7xxx/aic7xxx.seq \
+  drivers/scsi/53c700_d.h_shipped \
+    drivers/scsi/53c700.scr \
+  drivers/scsi/sym53c8xx_2/sym_fw1.h \
+    drivers/scsi/sym53c8xx_2/sym_fw1.h \
+  drivers/scsi/sym53c8xx_2/sym_fw2.h \
+    drivers/scsi/sym53c8xx_2/sym_fw2.h \
+  firmware/dsp56k/bootstrap.bin.ihex \
+    firmware/dsp56k/bootstrap.asm \
+  firmware/keyspan_pda/keyspan_pda.HEX \
+    firmware/keyspan_pda/keyspan_pda.S \
+  firmware/keyspan_pda/xircom_pgs.HEX \
+    firmware/keyspan_pda/xircom_pgs.S \
+; do
+  filetest $f || :
+done
+
+# Identify the tarball.
+grep -q 'EXTRAVERSION.*-gnu' Makefile ||
+clean_sed "/^EXTRAVERSION *=/ { s,=$,& ,; s,$,&-gnu$extra,; }
+" Makefile 'added -gnu to EXTRAVERSION'
+
+grep -q Linux-libre README ||
+clean_sed '
+1,3 s,Linux kernel release.*kernel\.org.*,GNU Linux-libre <http://linux-libre.fsfla.org>,
+2,5 s,Linux version [0-9.]*[0-9],GNU Linux-libre,
+1,20 s,\(operating system \)\?Unix,Unix kernel,
+/WHAT IS LINUX/i\
+WHAT IS GNU Linux-libre?\
+\
+  GNU Linux-libre is a Free version of the kernel Linux (see below),\
+  suitable for use with the GNU Operating System in 100% Free\
+  GNU/Linux-libre System Distributions.\
+  http://www.gnu.org/distros/\
+\
+  It removes non-Free components from Linux, that are disguised as\
+  source code or distributed in separate files.  It also disables\
+  run-time requests for non-Free components, shipped separately or as\
+  part of Linux, and documentation pointing to them, so as to avoid\
+  (Free-)baiting users into the trap of non-Free Software.\
+  http://www.fsfla.org/anuncio/2010-11-Linux-2.6.36-libre-debait\
+\
+  Linux-libre started within the gNewSense GNU/Linux distribution.\
+  It was later adopted by Jeff Moe, who coined its name, and in 2008\
+  it became a project maintained by FSF Latin America.  In 2012, it\
+  became part of the GNU Project.\
+\
+  The GNU Linux-libre project takes a minimal-changes approach to\
+  cleaning up Linux, making no effort to substitute components that\
+  need to be removed with functionally equivalent Free ones.\
+  Nevertheless, we encourage and support efforts towards doing so.\
+  http://libreplanet.org/wiki/LinuxLibre:Devices_that_require_non-free_firmware\
+\
+  Our mascot is Freedo, a light-blue penguin that has just come out\
+  of the shower.  Although we like penguins, GNU is a much greater\
+  contribution to the entire system, so its mascot deserves more\
+  promotion.  See our web page for their images.\
+  http://linux-libre.fsfla.org/\
+
+' README 'added blurb about GNU Linux-libre'
+
+# Add reject_firmware and maybe_reject_firmware
+grep -q _LINUX_LIBRE_FIRMWARE_H include/linux/firmware.h ||
+clean_sed '$i\
+#ifndef _LINUX_LIBRE_FIRMWARE_H\
+#define _LINUX_LIBRE_FIRMWARE_H\
+\
+#include <linux/device.h>\
+\
+#define NONFREE_FIRMWARE "/*(DEBLOBBED)*/"\
+\
+static inline int\
+is_nonfree_firmware(const char *name)\
+{\
+  return strstr(name, NONFREE_FIRMWARE) != 0;\
+}\
+\
+static inline int\
+report_missing_free_firmware(const char *name, const char *what)\
+{\
+	printk(KERN_ERR "%s: Missing Free %s (non-Free firmware loading is disabled)\\n", name,\
+	       what ? what : "firmware");\
+	return -EINVAL;\
+}\
+static inline int\
+reject_firmware(const struct firmware **fw,\
+		const char *name, struct device *device)\
+{\
+	const struct firmware *xfw = NULL;\
+	int retval;\
+	report_missing_free_firmware(dev_name(device), NULL);\
+	retval = request_firmware(&xfw, NONFREE_FIRMWARE, device);\
+	if (!retval)\
+		release_firmware(xfw);\
+	return -EINVAL;\
+}\
+static inline int\
+maybe_reject_firmware(const struct firmware **fw,\
+		      const char *name, struct device *device)\
+{\
+	if (is_nonfree_firmware(name))\
+		return reject_firmware(fw, name, device);\
+	else\
+		return request_firmware(fw, name, device);\
+}\
+static inline int\
+reject_firmware_direct(const struct firmware **fw,\
+		const char *name, struct device *device)\
+{\
+	const struct firmware *xfw = NULL;\
+	int retval;\
+	report_missing_free_firmware(dev_name(device), NULL);\
+	retval = request_firmware_direct(&xfw, NONFREE_FIRMWARE, device);\
+	if (!retval)\
+		release_firmware(xfw);\
+	return -EINVAL;\
+}\
+static inline void\
+discard_rejected_firmware(const struct firmware *fw, void *context)\
+{\
+	release_firmware(fw);\
+}\
+static inline int\
+reject_firmware_nowait(struct module *module, int uevent,\
+		       const char *name, struct device *device,\
+		       gfp_t gfp, void *context,\
+		       void (*cont)(const struct firmware *fw,\
+				    void *context))\
+{\
+	int retval;\
+	report_missing_free_firmware(dev_name(device), NULL);\
+	retval = request_firmware_nowait(module, uevent, NONFREE_FIRMWARE,\
+					 device, gfp, NULL,\
+					 discard_rejected_firmware);\
+	if (retval)\
+		return retval;\
+	return -EINVAL;\
+}\
+static inline int\
+maybe_reject_firmware_nowait(struct module *module, int uevent,\
+			     const char *name, struct device *device,\
+			     gfp_t gfp, void *context,\
+			     void (*cont)(const struct firmware *fw,\
+					  void *context))\
+{\
+	if (is_nonfree_firmware(name))\
+		return reject_firmware_nowait(module, uevent, name,\
+					      device, gfp, context, cont);\
+	else\
+		return request_firmware_nowait(module, uevent, name,\
+					       device, gfp, context, cont);\
+}\
+\
+#endif /* _LINUX_LIBRE_FIRMWARE_H */\
+' include/linux/firmware.h 'added non-Free firmware notification support'
+
+grep -q _LINUX_LIBRE_IHEX_FIRMWARE_H include/linux/ihex.h ||
+clean_sed '$i\
+#ifndef _LINUX_LIBRE_IHEX_H\
+#define _LINUX_LIBRE_IHEX_H\
+\
+static inline int\
+maybe_reject_ihex_firmware(const struct firmware **fw,\
+			   const char *name, struct device *device)\
+{\
+	if (strstr (name, NONFREE_FIRMWARE))\
+		return reject_firmware(fw, name, device);\
+	else\
+		return request_ihex_firmware(fw, name, device);\
+}\
+\
+#endif /* _LINUX_LIBRE_IHEX_H */\
+' include/linux/ihex.h 'added non-Free ihex firmware notification support'
+
+clean_sed '
+s,\(timeout = \)\(firmware_loading_timeout()\),\1is_nonfree_firmware(name) ? 1 : \2,
+' drivers/base/firmware_class.c 'shorten non-Free firmware fail-to-load timeout'
+
+
+########
+# Arch #
+########
+
+# x86
+
+announce MICROCODE_AMD - "AMD microcode patch loading support"
+reject_firmware arch/x86/kernel/cpu/microcode/amd.c
+clean_blob arch/x86/kernel/cpu/microcode/amd.c
+clean_kconfig arch/x86/Kconfig MICROCODE_AMD
+clean_mk CONFIG_MICROCODE_AMD arch/x86/kernel/cpu/microcode/Makefile
+
+announce MICROCODE_INTEL - "Intel microcode patch loading support"
+reject_firmware arch/x86/kernel/cpu/microcode/intel.c
+clean_blob arch/x86/kernel/cpu/microcode/intel.c
+clean_kconfig arch/x86/Kconfig MICROCODE_INTEL
+clean_mk CONFIG_MICROCODE_INTEL arch/x86/kernel/cpu/microcode/Makefile
+
+announce MICROCODE_EARLY - "Early load microcode"
+clean_blob Documentation/x86/early-microcode.txt
+
+# arm
+
+announce IXP4XX_NPE - "IXP4xx Network Processor Engine support"
+reject_firmware arch/arm/mach-ixp4xx/ixp4xx_npe.c
+clean_blob arch/arm/mach-ixp4xx/ixp4xx_npe.c
+clean_blob Documentation/arm/IXP4xx
+clean_kconfig arch/arm/mach-ixp4xx/Kconfig IXP4XX_NPE
+clean_mk CONFIG_IXP4XX_NPE arch/arm/mach-ixp4xx/Makefile
+
+announce ARCH_NETX - "Hilscher NetX based"
+clean_sed '
+s,\([" ]\)request_firmware(,\1reject_firmware(,
+' arch/arm/mach-netx/xc.c 'disabled non-Free firmware-loading machinery'
+clean_blob arch/arm/mach-netx/xc.c
+clean_blob drivers/net/ethernet/netx-eth.c
+clean_kconfig arch/arm/Kconfig ARCH_NETX
+clean_mk CONFIG_ARCH_NETX arch/arm/Makefile
+
+# mips
+
+# I couldn't figure out where the firmware name actually comes from.
+# If it's from some user-set property, we could reenable it.  -lxo
+announce XRX200_PHY_FW - "XRX200 PHY firmware loader"
+reject_firmware arch/mips/lantiq/xway/xrx200_phy_fw.c
+clean_kconfig arch/mips/lantiq/Kconfig XRX200_PHY_FW
+clean_mk CONFIG_XRX200_PHY_FW arch/mips/lantiq/xway/Makefile
+
+#######
+# ATM #
+#######
+
+announce ATM_AMBASSADOR - "Madge Ambassador, Collage PCI 155 Server"
+reject_firmware drivers/atm/ambassador.c
+clean_blob drivers/atm/ambassador.c
+clean_fw firmware/atmsar11.HEX firmware/atmsar11.fw
+clean_kconfig drivers/atm/Kconfig ATM_AMBASSADOR
+clean_mk CONFIG_ATM_AMBASSADOR drivers/atm/Makefile
+
+announce ATM_FORE200E - "FORE Systems 200E-series"
+reject_firmware drivers/atm/fore200e.c
+clean_blob drivers/atm/fore200e.c
+clean_blob Documentation/networking/fore200e.txt
+clean_blob drivers/atm/.gitignore
+clean_blob Documentation/dontdiff
+clean_kconfig drivers/atm/Kconfig ATM_FORE200E
+clean_mk CONFIG_ATM_FORE200E drivers/atm/Makefile
+
+announce ATM_SOLOS - "Solos ADSL2+ PCI Multiport card driver"
+reject_firmware drivers/atm/solos-pci.c
+clean_blob drivers/atm/solos-pci.c
+clean_kconfig drivers/atm/Kconfig ATM_SOLOS
+clean_mk CONFIG_ATM_SOLOS drivers/atm/Makefile
+
+##########
+# Crypto #
+##########
+
+announce CRYPTO_DEV_QAT_DH895xCC - "Support for Intel(R) DH895xCC"
+clean_blob drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
+clean_blob drivers/crypto/qat/qat_dh895xcc/adf_drv.c
+clean_kconfig drivers/crypto/qat/Kconfig CRYPTO_DEV_QAT_DH895xCC
+clean_mk CONFIG_CRYPTO_DEV_QAT_DH895xCC drivers/crypto/qat/Makefile
+
+announce CRYPTO_DEV_QAT - "Common bits for Intel(R) QuickAssist Technology"
+reject_firmware drivers/crypto/qat/qat_common/adf_accel_engine.c
+clean_kconfig drivers/crypto/qat/Kconfig CRYPTO_DEV_QAT
+clean_mk CONFIG_CRYPTO_DEV_QAT drivers/crypto/qat/Makefile
+
+announce CRYPTO_DEV_QAT_C3XXX - "Support for Intel(R) C3XXX"
+clean_blob drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.h
+clean_kconfig drivers/crypto/qat/Kconfig CRYPTO_DEV_QAT_C3XXX
+clean_mk CONFIG_CRYPTO_DEV_QAT_C3XXX drivers/crypto/qat/Makefile
+
+announce CRYPTO_DEV_QAT_C62X - "Support for Intel(R) C62X"
+clean_blob drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.h
+clean_kconfig drivers/crypto/qat/Kconfig CRYPTO_DEV_QAT_C62X
+clean_mk CONFIG_CRYPTO_DEV_QAT_C62X drivers/crypto/qat/Makefile
+
+########
+# tty #
+########
+
+announce CYCLADES - "Cyclades async mux support"
+reject_firmware drivers/tty/cyclades.c
+clean_blob drivers/tty/cyclades.c
+clean_kconfig drivers/tty/Kconfig CYCLADES
+clean_mk CONFIG_CYCLADES drivers/tty/Makefile
+
+announce ISI - "Multi-Tech multiport card support"
+reject_firmware drivers/tty/isicom.c
+clean_blob drivers/tty/isicom.c
+clean_kconfig drivers/tty/Kconfig ISI
+clean_mk CONFIG_ISI drivers/tty/Makefile
+
+announce MOXA_INTELLIO - "Moxa Intellio support"
+reject_firmware drivers/tty/moxa.c
+clean_blob drivers/tty/moxa.c
+clean_kconfig drivers/tty/Kconfig MOXA_INTELLIO
+clean_mk CONFIG_MOXA_INTELLIO drivers/tty/Makefile
+
+# gpu drm
+
+announce DRM_AMDGPU - "AMD GPU"
+reject_firmware drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+clean_blob drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+clean_blob drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+clean_blob drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+clean_blob drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
+clean_blob drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+clean_blob drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+clean_blob drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
+clean_blob drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+clean_blob drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
+clean_blob drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
+clean_kconfig drivers/gpu/drm/Kconfig DRM_AMDGPU
+clean_mk CONFIG_DRM_AMDGPU drivers/gpu/drm/amd/amdgpu/Makefile
+
+announce DRM_AMDGPU_CIK - "Enable amdgpu support for CIK parts"
+reject_firmware drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+clean_blob drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+clean_blob drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+clean_blob drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+reject_firmware drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+clean_blob drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+clean_kconfig drivers/gpu/drm/amd/amdgpu/Kconfig DRM_AMDGPU_CIK
+clean_mk CONFIG_DRM_AMDGPU_CIK drivers/gpu/drm/amd/amdgpu/Makefile
+
+announce DRM_AST - "AST server chips"
+reject_firmware drivers/gpu/drm/ast/ast_dp501.c
+clean_blob drivers/gpu/drm/ast/ast_dp501.c
+clean_kconfig drivers/gpu/drm/ast/Kconfig DRM_AST
+clean_mk CONFIG_DRM_AST drivers/gpu/drm/ast/Makefile
+
+announce DRM_I915 - "Intel 8xx/9xx/G3x/G4x/HD Graphics"
+reject_firmware drivers/gpu/drm/i915/intel_csr.c
+reject_firmware drivers/gpu/drm/i915/intel_guc_loader.c
+clean_blob drivers/gpu/drm/i915/intel_csr.c
+clean_blob drivers/gpu/drm/i915/intel_guc_loader.c
+clean_kconfig drivers/gpu/drm/i915/Kconfig DRM_I915
+clean_mk CONFIG_DRM_I915 drivers/gpu/drm/i915/Makefile
+
+announce DRM_NOUVEAU - "Nouveau (nVidia) cards"
+reject_firmware drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
+clean_blob drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
+reject_firmware drivers/gpu/drm/nouveau/nvkm/engine/falcon.c
+clean_blob drivers/gpu/drm/nouveau/nvkm/engine/falcon.c
+reject_firmware drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c
+clean_blob drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c
+clean_blob drivers/gpu/drm/nouveau/nouveau_platform.c
+clean_kconfig drivers/gpu/drm/nouveau/Kconfig DRM_NOUVEAU
+clean_mk CONFIG_DRM_NOUVEAU drivers/gpu/drm/Makefile
+
+announce DRM_MGA - "Matrox g200/g400"
+drop_fw_file firmware/matrox/g200_warp.H16 firmware/matrox/g200_warp.fw
+drop_fw_file firmware/matrox/g400_warp.H16 firmware/matrox/g400_warp.fw
+reject_firmware drivers/gpu/drm/mga/mga_warp.c
+clean_blob drivers/gpu/drm/mga/mga_warp.c
+clean_kconfig drivers/gpu/drm/Kconfig DRM_MGA
+clean_mk CONFIG_DRM_MGA drivers/gpu/drm/Makefile
+
+announce DRM_MSM - "MSM DRM"
+reject_firmware drivers/gpu/drm/msm/adreno/adreno_gpu.c
+clean_blob drivers/gpu/drm/msm/adreno/adreno_device.c
+clean_kconfig drivers/gpu/drm/msm/Kconfig DRM_MSM
+clean_mk CONFIG_DRM_MSM drivers/gpu/drm/msm/Makefile
+
+announce DRM_R128 - "ATI Rage 128"
+drop_fw_file firmware/r128/r128_cce.bin.ihex firmware/r128/r128_cce.bin
+reject_firmware drivers/gpu/drm/r128/r128_cce.c
+clean_blob drivers/gpu/drm/r128/r128_cce.c
+clean_kconfig drivers/gpu/drm/Kconfig DRM_R128
+clean_mk CONFIG_DRM_R128 drivers/gpu/drm/Makefile
+
+announce DRM_RADEON - "ATI Radeon"
+drop_fw_file firmware/radeon/R100_cp.bin.ihex firmware/radeon/R100_cp.bin
+drop_fw_file firmware/radeon/R200_cp.bin.ihex firmware/radeon/R200_cp.bin
+drop_fw_file firmware/radeon/R300_cp.bin.ihex firmware/radeon/R300_cp.bin
+drop_fw_file firmware/radeon/R420_cp.bin.ihex firmware/radeon/R420_cp.bin
+drop_fw_file firmware/radeon/R520_cp.bin.ihex firmware/radeon/R520_cp.bin
+drop_fw_file firmware/radeon/R600_me.bin.ihex firmware/radeon/R600_me.bin
+drop_fw_file firmware/radeon/R600_pfp.bin.ihex firmware/radeon/R600_pfp.bin
+drop_fw_file firmware/radeon/RS600_cp.bin.ihex firmware/radeon/RS600_cp.bin
+drop_fw_file firmware/radeon/RS690_cp.bin.ihex firmware/radeon/RS690_cp.bin
+drop_fw_file firmware/radeon/RS780_me.bin.ihex firmware/radeon/RS780_me.bin
+drop_fw_file firmware/radeon/RS780_pfp.bin.ihex firmware/radeon/RS780_pfp.bin
+drop_fw_file firmware/radeon/RV610_me.bin.ihex firmware/radeon/RV610_me.bin
+drop_fw_file firmware/radeon/RV610_pfp.bin.ihex firmware/radeon/RV610_pfp.bin
+drop_fw_file firmware/radeon/RV620_me.bin.ihex firmware/radeon/RV620_me.bin
+drop_fw_file firmware/radeon/RV620_pfp.bin.ihex firmware/radeon/RV620_pfp.bin
+drop_fw_file firmware/radeon/RV630_me.bin.ihex firmware/radeon/RV630_me.bin
+drop_fw_file firmware/radeon/RV630_pfp.bin.ihex firmware/radeon/RV630_pfp.bin
+drop_fw_file firmware/radeon/RV635_me.bin.ihex firmware/radeon/RV635_me.bin
+drop_fw_file firmware/radeon/RV635_pfp.bin.ihex firmware/radeon/RV635_pfp.bin
+drop_fw_file firmware/radeon/RV670_me.bin.ihex firmware/radeon/RV670_me.bin
+drop_fw_file firmware/radeon/RV670_pfp.bin.ihex firmware/radeon/RV670_pfp.bin
+drop_fw_file firmware/radeon/RV710_me.bin.ihex firmware/radeon/RV710_me.bin
+drop_fw_file firmware/radeon/RV710_pfp.bin.ihex firmware/radeon/RV710_pfp.bin
+drop_fw_file firmware/radeon/RV730_me.bin.ihex firmware/radeon/RV730_me.bin
+drop_fw_file firmware/radeon/RV730_pfp.bin.ihex firmware/radeon/RV730_pfp.bin
+drop_fw_file firmware/radeon/RV770_me.bin.ihex firmware/radeon/RV770_me.bin
+drop_fw_file firmware/radeon/RV770_pfp.bin.ihex firmware/radeon/RV770_pfp.bin
+reject_firmware drivers/gpu/drm/radeon/r100.c
+clean_blob drivers/gpu/drm/radeon/r100.c
+reject_firmware drivers/gpu/drm/radeon/r600.c
+clean_blob drivers/gpu/drm/radeon/r600.c
+reject_firmware drivers/gpu/drm/radeon/ni.c
+clean_blob drivers/gpu/drm/radeon/ni.c
+reject_firmware drivers/gpu/drm/radeon/si.c
+clean_blob drivers/gpu/drm/radeon/si.c
+reject_firmware drivers/gpu/drm/radeon/cik.c
+clean_blob drivers/gpu/drm/radeon/cik.c
+reject_firmware drivers/gpu/drm/radeon/radeon_uvd.c
+clean_blob drivers/gpu/drm/radeon/radeon_uvd.c
+reject_firmware drivers/gpu/drm/radeon/radeon_vce.c
+clean_blob drivers/gpu/drm/radeon/radeon_vce.c
+clean_kconfig drivers/gpu/drm/Kconfig DRM_RADEON
+clean_mk CONFIG_DRM_RADEON drivers/gpu/drm/Makefile
+
+announce DRM_STI - "DRM Support for STMicroelectronics SoC stiH41x Series"
+reject_firmware drivers/gpu/drm/sti/sti_hqvdp.c
+clean_blob drivers/gpu/drm/sti/sti_hqvdp.c
+clean_kconfig drivers/gpu/drm/sti/Kconfig DRM_STI
+clean_mk CONFIG_DRM_STI drivers/gpu/drm/sti/Makefile
+
+#######
+# dma #
+#######
+
+announce IMX_SDMA - "i.MX SDMA support"
+reject_firmware drivers/dma/imx-sdma.c
+clean_blob arch/arm/mach-imx/mm-imx3.c
+clean_blob arch/arm/boot/dts/imx25.dtsi
+clean_blob arch/arm/boot/dts/imx35.dtsi
+clean_blob arch/arm/boot/dts/imx50.dtsi
+clean_blob arch/arm/boot/dts/imx51.dtsi
+clean_blob arch/arm/boot/dts/imx53.dtsi
+clean_blob arch/arm/boot/dts/imx53-tx53.dtsi
+clean_blob arch/arm/boot/dts/imx6qdl.dtsi
+clean_blob arch/arm/boot/dts/imx6sl.dtsi
+clean_blob arch/arm/boot/dts/imx6sx.dtsi
+clean_blob Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+clean_kconfig drivers/dma/Kconfig IMX_SDMA
+clean_mk CONFIG_IMX_SDMA drivers/dma/Makefile
+
+#########
+# Media #
+#########
+
+# media/tuner
+
+announce MEDIA_TUNER_SI2157 - "Silicon Labs Si2157 silicon tuner"
+reject_firmware drivers/media/tuners/si2157.c
+clean_blob drivers/media/tuners/si2157.c
+clean_blob drivers/media/tuners/si2157_priv.h
+clean_kconfig drivers/media/tuners/Kconfig MEDIA_TUNER_SI2157
+clean_mk CONFIG_MEDIA_TUNER_SI2157 drivers/media/tuners/Makefile
+
+announce MEDIA_TUNER_XC2028 - "XCeive xc2028/xc3028 tuners"
+undefault_firmware 'XC\(2028\|3028L\)' \
+  drivers/media/tuners/tuner-xc2028.h \
+  drivers/media/pci/saa7134/saa7134-cards.c \
+  drivers/media/pci/ivtv/ivtv-driver.c \
+  drivers/media/pci/cx18/cx18-driver.c \
+  drivers/media/pci/cx18/cx18-dvb.c \
+  drivers/media/pci/cx23885/cx23885-dvb.c \
+  drivers/media/pci/cx23885/cx23885-video.c \
+  drivers/media/pci/cx88/cx88-dvb.c \
+  drivers/media/pci/cx88/cx88-cards.c \
+  drivers/media/usb/em28xx/em28xx-cards.c \
+  drivers/media/usb/dvb-usb/dib0700_devices.c \
+  drivers/media/usb/dvb-usb/cxusb.c
+reject_firmware drivers/media/tuners/tuner-xc2028.c
+clean_blob drivers/media/tuners/tuner-xc2028.c
+clean_kconfig drivers/media/tuners/Kconfig MEDIA_TUNER_XC2028
+clean_mk CONFIG_MEDIA_TUNER_XC2028 drivers/media/tuners/Makefile
+
+announce VIDEO_TM6000_DVB - "DVB Support for tm6000 based TV cards"
+clean_blob drivers/media/usb/tm6000/tm6000-cards.c
+clean_kconfig drivers/media/usb/tm6000/Kconfig VIDEO_TM6000_DVB
+clean_mk CONFIG_VIDEO_TM6000_DVB drivers/media/usb/tm6000/Makefile
+
+announce MEDIA_TUNER_XC4000 - "Xceive XC4000 silicon tuner"
+undefine_macro "XC4000_DEFAULT_FIRMWARE\(\|_NEW\)" "\"/*(DEBLOBBED)*/\"" \
+  "disabled non-Free firmware" drivers/media/tuners/xc4000.c
+maybe_reject_firmware drivers/media/tuners/xc4000.c
+clean_blob drivers/media/tuners/xc4000.c
+clean_kconfig drivers/media/tuners/Kconfig MEDIA_TUNER_XC4000
+clean_mk CONFIG_MEDIA_TUNER_XC4000 drivers/media/tuners/Makefile
+
+announce MEDIA_TUNER_XC5000 - "Xceive XC5000 silicon tuner"
+undefault_firmware 'XC5000' \
+  drivers/media/usb/cx231xx/cx231xx-cards.c
+reject_firmware drivers/media/tuners/xc5000.c
+clean_blob drivers/media/tuners/xc5000.c
+clean_kconfig drivers/media/tuners/Kconfig MEDIA_TUNER_XC5000
+clean_mk CONFIG_MEDIA_TUNER_XC5000 drivers/media/tuners/Makefile
+
+announce DVB_USB - "Support for various USB DVB devices"
+reject_firmware drivers/media/usb/dvb-usb/dvb-usb-firmware.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB
+clean_mk CONFIG_DVB_USB drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_V2 - "Support for various USB DVB devices v2"
+reject_firmware drivers/media/usb/dvb-usb-v2/dvb_usb_core.c
+clean_kconfig drivers/media/usb/dvb-usb-v2/Kconfig DVB_USB_V2
+clean_mk CONFIG_DVB_USB_V2 drivers/media/usb/dvb-usb-v2/Makefile
+
+announce DVB_B2C2_FLEXCOP - "Technisat/B2C2 FlexCopII(b) and FlexCopIII adapters"
+reject_firmware drivers/media/common/b2c2/flexcop-fe-tuner.c
+
+announce DVB_BT8XX - "BT8xx based PCI cards"
+reject_firmware drivers/media/pci/bt8xx/dvb-bt8xx.c
+
+announce DVB_USB_A800 - "AVerMedia AverTV DVB-T USB 2.0 (A800)"
+clean_blob drivers/media/usb/dvb-usb/a800.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_A800
+clean_mk CONFIG_DVB_USB_A800 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_AF9005 - "Afatech AF9005 DVB-T USB1.1 support"
+clean_file drivers/media/usb/dvb-usb/af9005-script.h
+clean_sed '
+s,^	deb_info("load init script\\n");$,	{\n		err("Missing Free init script\\n");\n		return scriptlen = ret = -EINVAL;\n		,;
+' drivers/media/usb/dvb-usb/af9005-fe.c 'report missing Free init script'
+clean_blob drivers/media/usb/dvb-usb/af9005-fe.c
+clean_blob drivers/media/usb/dvb-usb/af9005.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_AF9005
+clean_mk CONFIG_DVB_USB_AF9005 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_AF9015 - "Afatech AF9015 DVB-T USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb-v2/af9015.h
+clean_blob drivers/media/usb/dvb-usb-v2/af9015.c
+clean_kconfig drivers/media/usb/dvb-usb-v2/Kconfig DVB_USB_AF9015
+clean_mk CONFIG_DVB_USB_AF9015 drivers/media/usb/dvb-usb-v2/Makefile
+
+announce DVB_USB_AF9035 - "Afatech AF9035 DVB-T USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb-v2/af9035.h
+clean_blob drivers/media/usb/dvb-usb-v2/af9035.c
+clean_kconfig drivers/media/usb/dvb-usb-v2/Kconfig DVB_USB_AF9035
+clean_mk CONFIG_DVB_USB_AF9035 drivers/media/usb/dvb-usb-v2/Makefile
+
+announce DVB_USB_AZ6007 - "Azurewave 6007 and clones DVB-T/C USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb-v2/az6007.c
+clean_kconfig drivers/media/usb/dvb-usb-v2/Kconfig DVB_USB_AZ6007
+clean_mk CONFIG_DVB_USB_AZ6007 drivers/media/usb/dvb-usb-v2/Makefile
+
+announce DVB_USB_AZ6027 - "Azurewave DVB-S/S2 USB2.0 AZ6027 support"
+clean_blob drivers/media/usb/dvb-usb/az6027.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_AZ6027
+clean_mk CONFIG_DVB_USB_AZ6027 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_CXUSB - "Conexant USB2.0 hybrid reference design support"
+clean_blob drivers/media/usb/dvb-usb/cxusb.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_CXUSB
+clean_mk CONFIG_DVB_USB_CXUSB drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_DIB0700 - "DiBcom DiB0700 USB DVB devices"
+reject_firmware drivers/media/usb/dvb-usb/dib0700_devices.c
+clean_blob drivers/media/usb/dvb-usb/dib0700_devices.c
+clean_blob drivers/media/usb/dvb-usb/dib0700_core.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_DIB0700
+clean_mk CONFIG_DVB_USB_DIB0700 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_DIBUSB_MB - "DiBcom USB DVB-T devices (based on the DiB3000M-B)"
+clean_blob drivers/media/usb/dvb-usb/dibusb-mb.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_DIBUSB_MB
+clean_mk CONFIG_DVB_USB_DIBUSB_MB drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_DIBUSB_MC - "DiBcom USB DVB-T devices (based on the DiB3000M-C/P)"
+clean_blob drivers/media/usb/dvb-usb/dibusb-mc.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_DIBUSB_MC
+clean_mk CONFIG_DVB_USB_DIBUSB_MC drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_DIGITV - "Nebula Electronics uDigiTV DVB-T USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb/digitv.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_DIGITV
+clean_mk CONFIG_DVB_USB_DIGITV drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_DTT200U - "WideView WT-200U and WT-220U (pen) DVB-T USB2.0 support (Yakumo/Hama/Typhoon/Yuan)"
+clean_blob drivers/media/usb/dvb-usb/dtt200u.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_DTT200U
+clean_mk CONFIG_DVB_USB_DTT200U drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_DW2102 - "DvbWorld DVB-S/S2 USB2.0 support"
+reject_firmware drivers/media/usb/dvb-usb/dw2102.c
+clean_blob drivers/media/usb/dvb-usb/dw2102.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_DW2102
+clean_mk CONFIG_DVB_USB_DW2102 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_EC168 - "E3C EC168 DVB-T USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb-v2/ec168.h
+clean_blob drivers/media/usb/dvb-usb-v2/ec168.c
+clean_kconfig drivers/media/usb/dvb-usb-v2/Kconfig DVB_USB_EC168
+clean_mk CONFIG_DVB_USB_EC168 drivers/media/usb/dvb-usb-v2/Makefile
+
+announce DVB_USB_GP8PSK - "GENPIX 8PSK->USB module support"
+reject_firmware drivers/media/usb/dvb-usb/gp8psk.c
+clean_blob drivers/media/usb/dvb-usb/gp8psk.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_GP8PSK
+clean_mk CONFIG_DVB_USB_GP8PSK drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_LME2510 - "LME DM04/QQBOX DVB-S USB2.0 support"
+reject_firmware drivers/media/usb/dvb-usb-v2/lmedm04.c
+clean_blob drivers/media/usb/dvb-usb-v2/lmedm04.c
+clean_file Documentation/dvb/lmedm04.txt
+clean_kconfig drivers/media/usb/dvb-usb-v2/Kconfig DVB_USB_LME2510
+clean_mk CONFIG_DVB_USB_LME2510 drivers/media/usb/dvb-usb-v2/Makefile
+
+announce DVB_USB_M920X - "Uli m920x DVB-T USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb/m920x.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_M920X
+clean_mk CONFIG_DVB_USB_M920X drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_NOVA_T_USB2 - "Hauppauge WinTV-NOVA-T usb2 DVB-T USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb/nova-t-usb2.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_NOVA_T_USB2
+clean_mk CONFIG_DVB_USB_NOVA_T_USB2 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_OPERA1 - "Opera1 DVB-S USB2.0 receiver"
+reject_firmware drivers/media/usb/dvb-usb/opera1.c
+clean_blob drivers/media/usb/dvb-usb/opera1.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_OPERA1
+clean_mk CONFIG_DVB_USB_OPERA1 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_TECHNISAT_USB2 - "Technisat DVB-S/S2 USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb/technisat-usb2.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_TECHNISAT_USB2
+clean_mk CONFIG_DVB_USB_TECHNISAT_USB2 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_TTUSB2 - "Pinnacle 400e DVB-S USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb/ttusb2.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_TTUSB2
+clean_mk CONFIG_DVB_USB_TTUSB2 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_UMT_010 - "HanfTek UMT-010 DVB-T USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb/umt-010.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_UMT_010
+clean_mk CONFIG_DVB_USB_UMT_010 drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_VP702X - "TwinhanDTV StarBox and clones DVB-S USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb/vp702x.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_VP702X
+clean_mk CONFIG_DVB_USB_VP702X drivers/media/usb/dvb-usb/Makefile
+
+announce DVB_USB_VP7045 - "TwinhanDTV Alpha/MagicBoxII, DNTV tinyUSB2, Beetle USB2.0 support"
+clean_blob drivers/media/usb/dvb-usb/vp7045.c
+clean_kconfig drivers/media/usb/dvb-usb/Kconfig DVB_USB_VP7045
+clean_mk CONFIG_DVB_USB_VP7045 drivers/media/usb/dvb-usb/Makefile
+
+# dvb/frontends
+
+announce DVB_AF9013 - "Afatech AF9013 demodulator"
+reject_firmware drivers/media/dvb-frontends/af9013.c
+clean_blob drivers/media/dvb-frontends/af9013.c
+clean_blob drivers/media/dvb-frontends/af9013_priv.h
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_AF9013
+clean_mk CONFIG_DVB_AF9013 drivers/media/dvb-frontends/Makefile
+
+announce DVB_BCM3510 - "Broadcom BCM3510"
+undefault_firmware 'BCM3510' drivers/media/dvb-frontends/bcm3510.c
+clean_sed '
+/You.ll need a firmware/,/dvb-fe-bcm/d;
+' drivers/media/dvb-frontends/bcm3510.c \
+  "removed non-Free firmware notes"
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_BCM3510
+clean_mk CONFIG_DVB_BCM3510 drivers/media/dvb-frontends/Makefile
+
+announce DVB_CX24116 - "Conexant CX24116 based"
+undefault_firmware CX24116 drivers/media/dvb-frontends/cx24116.c
+reject_firmware drivers/media/dvb-frontends/cx24116.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_CX24116
+clean_mk CONFIG_DVB_CX24116 drivers/media/dvb-frontends/Makefile
+
+announce DVB_CX24117 - "Conexant CX24117 based"
+undefault_firmware CX24117 drivers/media/dvb-frontends/cx24117.c
+reject_firmware drivers/media/dvb-frontends/cx24117.c
+clean_blob drivers/media/dvb-frontends/cx24117.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_CX24117
+clean_mk CONFIG_DVB_CX24117 drivers/media/dvb-frontends/Makefile
+
+announce DVB_CX24120 - "Conexant CX24120 based"
+clean_blob drivers/media/dvb-frontends/cx24120.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_CX24120
+clean_mk CONFIG_DVB_CX24120 drivers/media/dvb-frontends/Makefile
+
+announce DVB_DS3000 - "Montage Tehnology DS3000 based"
+undefault_firmware 'DS3000' \
+  drivers/media/dvb-frontends/ds3000.c
+reject_firmware drivers/media/dvb-frontends/ds3000.c
+clean_blob drivers/media/dvb-frontends/ds3000.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_DS3000
+clean_mk CONFIG_DVB_DS3000 drivers/media/dvb-frontends/Makefile
+
+announce DVB_DRX39XYJ - "Micronas DRX-J demodulator"
+reject_firmware drivers/media/dvb-frontends/drx39xyj/drxj.c
+clean_blob drivers/media/dvb-frontends/drx39xyj/drxj.c
+clean_kconfig drivers/media/dvb-frontends/drx39xyj/Kconfig DVB_DRX39XYJ
+clean_mk CONFIG_DVB_DRX39XYJ drivers/media/dvb-frontends/drx39xyj/Makefile
+
+announce DVB_LGS8GXX - "Legend Silicon LGS8913/LGS8GL5/LGS8GXX DMB-TH demodulator"
+reject_firmware drivers/media/dvb-frontends/lgs8gxx.c
+clean_blob drivers/media/dvb-frontends/lgs8gxx.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_LGS8GXX
+clean_mk CONFIG_DVB_LGS8GXX drivers/media/dvb-frontends/Makefile
+
+announce DVB_M88DS3103 - "Montage M88DS3103"
+reject_firmware drivers/media/dvb-frontends/m88ds3103.c
+clean_blob drivers/media/dvb-frontends/m88ds3103.c
+clean_blob drivers/media/dvb-frontends/m88ds3103_priv.h
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_M88DS3103
+clean_mk CONFIG_DVB_M88DS3103 drivers/media/dvb-frontends/Makefile
+
+announce DVB_NXT200X - "NxtWave Communications NXT2002/NXT2004 based"
+undefault_firmware 'NXT200[24]' drivers/media/dvb-frontends/nxt200x.c
+reject_firmware drivers/media/dvb-frontends/nxt200x.c
+clean_blob drivers/media/dvb-frontends/nxt200x.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_NXT200X
+clean_mk CONFIG_DVB_NXT200X drivers/media/dvb-frontends/Makefile
+
+announce DVB_OR51132 - "Oren OR51132 based"
+reject_firmware drivers/media/dvb-frontends/or51132.c
+clean_blob drivers/media/dvb-frontends/or51132.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_OR51132
+clean_mk CONFIG_DVB_OR51132 drivers/media/dvb-frontends/Makefile
+
+announce DVB_OR51211 - "Oren OR51211 based"
+undefault_firmware 'OR51211' drivers/media/dvb-frontends/or51211.c
+clean_blob drivers/media/dvb-frontends/or51211.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_OR51211
+clean_mk CONFIG_DVB_OR51211 drivers/media/dvb-frontends/Makefile
+
+announce DVB_SI2165 - "Silicon Labs si2165 based"
+reject_firmware drivers/media/dvb-frontends/si2165.c
+clean_blob drivers/media/dvb-frontends/si2165.c
+clean_blob drivers/media/dvb-frontends/si2165_priv.h
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_SI2165
+clean_mk CONFIG_DVB_SI2165 drivers/media/dvb-frontends/Makefile
+
+announce DVB_SI2168 - "Silicon Labs Si2168"
+reject_firmware drivers/media/dvb-frontends/si2168.c
+clean_blob drivers/media/dvb-frontends/si2168.c
+clean_blob drivers/media/dvb-frontends/si2168_priv.h
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_SI2168
+clean_mk CONFIG_DVB_SI2168 drivers/media/dvb-frontends/Makefile
+
+announce DVB_SP8870 - "Spase sp8870"
+undefault_firmware 'SP8870' drivers/media/dvb-frontends/sp8870.c
+clean_blob drivers/media/dvb-frontends/sp8870.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_SP8870
+clean_mk CONFIG_DVB_SP8870 drivers/media/dvb-frontends/Makefile
+
+announce DVB_SP887X - "Spase sp887x based"
+undefault_firmware 'SP887X' drivers/media/dvb-frontends/sp887x.c
+clean_blob drivers/media/dvb-frontends/sp887x.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_SP887X
+clean_mk CONFIG_DVB_SP887X drivers/media/dvb-frontends/Makefile
+
+announce DVB_TDA10048 - "Philips TDA10048HN based"
+undefine_macro 'TDA10048_DEFAULT_FIRMWARE_SIZE' 0 \
+  'removed non-Free firmware size' drivers/media/dvb-frontends/tda10048.c
+undefault_firmware 'TDA10048' drivers/media/dvb-frontends/tda10048.c
+reject_firmware drivers/media/dvb-frontends/tda10048.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_TDA10048
+clean_mk CONFIG_DVB_TDA10048 drivers/media/dvb-frontends/Makefile
+
+announce DVB_TDA1004X - "Philips TDA10045H/TDA10046H"
+undefault_firmware 'TDA1004[56]' drivers/media/dvb-frontends/tda1004x.c
+clean_blob drivers/media/dvb-frontends/tda1004x.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_TDA1004X
+clean_mk CONFIG_DVB_TDA1004X drivers/media/dvb-frontends/Makefile
+
+announce DVB_TDA10071 - "NXP TDA10071"
+reject_firmware drivers/media/dvb-frontends/tda10071.c
+clean_blob drivers/media/dvb-frontends/tda10071.c
+clean_blob drivers/media/dvb-frontends/tda10071_priv.h
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_TDA10071
+clean_mk CONFIG_DVB_TDA10071 drivers/media/dvb-frontends/Makefile
+
+# dvb
+
+announce DVB_AS102 - "Abilis AS102 DVB receiver"
+reject_firmware drivers/media/usb/as102/as102_fw.c
+clean_blob drivers/media/usb/as102/as102_fw.c
+clean_kconfig drivers/media/usb/as102/Kconfig DVB_AS102
+clean_mk CONFIG_DVB_AS102 drivers/media/usb/as102/Makefile
+
+announce DVB_AV7110 - "AV7110 cards"
+reject_firmware drivers/media/pci/ttpci/av7110.c
+clean_blob drivers/media/pci/ttpci/av7110.c
+clean_kconfig drivers/media/pci/ttpci/Kconfig DVB_AV7110
+clean_mk CONFIG_DVB_AV7110 drivers/media/pci/ttpci/Makefile
+
+announce DVB_BUDGET - "Budget cards"
+reject_firmware drivers/media/pci/ttpci/budget.c
+
+announce DVB_BUDGET_AV - "Budget cards with analog video inputs"
+reject_firmware drivers/media/pci/ttpci/budget-av.c
+
+announce DVB_BUDGET_CI - "Budget cards with onboard CI connector"
+reject_firmware drivers/media/pci/ttpci/budget-ci.c
+
+announce DVB_C8SECTPFE - "STMicroelectronics C8SECTPFE DVB support"
+reject_firmware drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c
+clean_blob drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c
+clean_kconfig drivers/media/platform/sti/c8sectpfe/Kconfig DVB_C8SECTPFE
+clean_mk CONFIG_DVB_C8SECTPFE drivers/media/platform/sti/c8sectpfe/Makefile
+
+announce DVB_DRXD - "Micronas DRXD driver"
+reject_firmware drivers/media/dvb-frontends/drxd_hard.c
+clean_blob drivers/media/dvb-frontends/drxd_hard.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_DRXD
+clean_mk CONFIG_DVB_DRXD drivers/media/dvb-frontends/Makefile
+
+announce DVB_DRXK - "Micronas DRXK based"
+reject_firmware drivers/media/dvb-frontends/drxk_hard.c
+clean_kconfig drivers/media/dvb-frontends/Kconfig DVB_DRXK
+clean_mk CONFIG_DVB_DRXK drivers/media/dvb-frontends/Makefile
+
+announce DVB_MN88472 - "Panasonic MN88472"
+reject_firmware drivers/staging/media/mn88472/mn88472.c
+clean_blob drivers/staging/media/mn88472/mn88472.c
+clean_blob drivers/staging/media/mn88472/mn88472_priv.h
+clean_kconfig drivers/staging/media/mn88472/Kconfig DVB_MN88472
+clean_mk CONFIG_DVB_MN88472 drivers/staging/media/mn88472/Makefile
+
+announce DVB_MN88473 - "Panasonic MN88473"
+reject_firmware drivers/staging/media/mn88473/mn88473.c
+clean_blob drivers/staging/media/mn88473/mn88473.c
+clean_blob drivers/staging/media/mn88473/mn88473_priv.h
+clean_kconfig drivers/staging/media/mn88473/Kconfig DVB_MN88473
+clean_mk CONFIG_DVB_MN88473 drivers/staging/media/mn88473/Makefile
+
+announce DVB_NGENE - "Micronas nGene support"
+reject_firmware drivers/media/pci/ngene/ngene-core.c
+clean_blob drivers/media/pci/ngene/ngene-core.c
+clean_kconfig drivers/media/pci/ngene/Kconfig DVB_NGENE
+clean_mk CONFIG_DVB_NGENE drivers/media/pci/ngene/Makefile
+
+announce DVB_PLUTO2 - "Pluto2 cards"
+reject_firmware drivers/media/pci/pluto2/pluto2.c
+
+announce SMS_SIANO_MDTV - "Siano SMS1xxx based MDTV receiver"
+reject_firmware drivers/media/common/siano/smscoreapi.c
+clean_blob drivers/media/common/siano/smscoreapi.c
+clean_blob drivers/media/common/siano/smscoreapi.h
+clean_kconfig drivers/media/common/siano/Kconfig SMS_SIANO_MDTV
+clean_mk CONFIG_SMS_SIANO_MDTV drivers/media/common/siano/Makefile
+
+announce SMS_USB_DRV - "Siano's USB interface support"
+reject_firmware drivers/media/usb/siano/smsusb.c
+clean_blob drivers/media/usb/siano/smsusb.c
+clean_kconfig drivers/media/usb/siano/Kconfig SMS_USB_DRV
+clean_mk CONFIG_SMS_USB_DRV drivers/media/usb/siano/Makefile
+
+announce DVB_TTUSB_BUDGET - "Technotrend/Hauppauge Nova-USB devices"
+drop_fw_file firmware/ttusb-budget/dspbootcode.bin.ihex firmware/ttusb-budget/dspbootcode.bin
+reject_firmware drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
+clean_blob drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c
+clean_kconfig drivers/media/usb/ttusb-budget/Kconfig DVB_TTUSB_BUDGET
+clean_mk CONFIG_DVB_TTUSB_BUDGET drivers/media/usb/ttusb-budget/Makefile
+
+announce DVB_TTUSB_DEC - "Technotrend/Hauppauge USB DEC devices"
+reject_firmware drivers/media/usb/ttusb-dec/ttusb_dec.c
+clean_blob drivers/media/usb/ttusb-dec/ttusb_dec.c
+clean_blob Documentation/dvb/ttusb-dec.txt
+clean_kconfig drivers/media/usb/ttusb-dec/Kconfig DVB_TTUSB_DEC
+clean_mk CONFIG_DVB_TTUSB_DEC drivers/media/usb/ttusb-dec/Makefile
+
+# video
+
+announce VIDEO_BT848 - "BT848 Video For Linux"
+reject_firmware drivers/media/pci/bt8xx/bttv-cards.c
+clean_blob drivers/media/pci/bt8xx/bttv-cards.c
+clean_blob Documentation/video4linux/bttv/README
+clean_kconfig drivers/media/pci/bt8xx/Kconfig VIDEO_BT848
+clean_mk CONFIG_VIDEO_BT848 drivers/media/pci/bt8xx/Makefile
+
+announce VIDEO_CODA - "Chips&Media Coda multi-standard codec IP"
+reject_firmware drivers/media/platform/coda/coda-common.c
+clean_blob drivers/media/platform/coda/coda-common.c
+clean_kconfig drivers/media/platform/Kconfig VIDEO_CODA
+clean_mk CONFIG_VIDEO_CODA drivers/media/platform/coda/Makefile
+
+announce VIDEO_CPIA2 - "CPiA2 Video For Linux"
+clean_fw firmware/cpia2/stv0672_vp4.bin.ihex firmware/cpia2/stv0672_vp4.bin
+reject_firmware drivers/media/usb/cpia2/cpia2_core.c
+clean_blob drivers/media/usb/cpia2/cpia2_core.c
+clean_kconfig drivers/media/usb/cpia2/Kconfig VIDEO_CPIA2
+clean_mk CONFIG_VIDEO_CPIA2 drivers/media/usb/cpia2/Makefile
+
+announce VIDEO_CX18 - "Conexant cx23418 MPEG encoder support"
+reject_firmware drivers/media/pci/cx18/cx18-av-firmware.c
+reject_firmware drivers/media/pci/cx18/cx18-dvb.c
+reject_firmware drivers/media/pci/cx18/cx18-firmware.c
+clean_blob drivers/media/pci/cx18/cx18-av-firmware.c
+clean_blob drivers/media/pci/cx18/cx18-dvb.c
+clean_blob drivers/media/pci/cx18/cx18-firmware.c
+clean_blob drivers/media/pci/cx18/cx18-driver.c
+clean_kconfig drivers/media/pci/cx18/Kconfig VIDEO_CX18
+clean_mk CONFIG_VIDEO_CX18 drivers/media/pci/cx18/Makefile
+
+announce VIDEO_CX231XX - "Conexant cx231xx USB video capture support"
+reject_firmware drivers/media/usb/cx231xx/cx231xx-417.c
+clean_blob drivers/media/usb/cx231xx/cx231xx-417.c
+clean_kconfig drivers/media/usb/cx231xx/Kconfig VIDEO_CX231XX
+clean_mk CONFIG_VIDEO_CX231XX drivers/media/usb/cx231xx/Makefile
+
+announce VIDEO_CX23885 - "Conexant cx23885 (2388x successor) support"
+reject_firmware drivers/media/pci/cx23885/cx23885-417.c
+clean_blob drivers/media/pci/cx23885/cx23885-417.c
+reject_firmware drivers/media/pci/cx23885/cx23885-cards.c
+clean_blob drivers/media/pci/cx23885/cx23885-cards.c
+clean_blob drivers/media/pci/cx23885/cx23885-video.c
+clean_kconfig drivers/media/pci/cx23885/Kconfig VIDEO_CX23885
+clean_mk CONFIG_VIDEO_CX23885 drivers/media/pci/cx23885/Makefile
+
+announce VIDEO_CX25840 - "Conexant CX2584x audio/video decoders"
+reject_firmware drivers/media/i2c/cx25840/cx25840-firmware.c
+clean_blob drivers/media/i2c/cx25840/cx25840-firmware.c
+clean_kconfig drivers/media/i2c/cx25840/Kconfig VIDEO_CX25840
+clean_mk CONFIG_VIDEO_CX25840 drivers/media/i2c/cx25840/Makefile
+
+announce VIDEO_CX88_BLACKBIRD - "Blackbird MPEG encoder support (cx2388x + cx23416)"
+reject_firmware drivers/media/pci/cx88/cx88-blackbird.c
+clean_kconfig drivers/media/pci/cx88/Kconfig VIDEO_CX88_BLACKBIRD
+clean_mk CONFIG_VIDEO_CX88_BLACKBIRD drivers/media/pci/cx88/Makefile
+
+announce VIDEO_EM28XX_DVB - "DVB/ATSC Support for em28xx based TV cards"
+clean_blob drivers/media/usb/em28xx/em28xx-dvb.c
+clean_kconfig drivers/media/usb/em28xx/Kconfig VIDEO_EM28XX_DVB
+clean_mk CONFIG_VIDEO_EM28XX_DVB drivers/media/usb/em28xx/Makefile
+
+announce VIDEO_EXYNOS4_FIMC_IS - "EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver"
+reject_firmware drivers/media/platform/exynos4-is/fimc-is.c
+clean_blob drivers/media/platform/exynos4-is/fimc-is.h
+clean_kconfig drivers/media/platform/exynos4-is/Kconfig VIDEO_EXYNOS4_FIMC_IS
+clean_mk CONFIG_VIDEO_EXYNOS4_FIMC_IS drivers/media/platform/exynos4-is/Makefile
+
+announce VIDEO_IVTV - "Conexant cx23416/cx23415 MPEG encoder/decoder support"
+reject_firmware drivers/media/pci/ivtv/ivtv-firmware.c
+clean_blob drivers/media/pci/ivtv/ivtv-firmware.c
+clean_kconfig drivers/media/pci/ivtv/Kconfig VIDEO_IVTV
+clean_mk CONFIG_VIDEO_IVTV drivers/media/pci/ivtv/Makefile
+
+announce VIDEO_PVRUSB2 - "Hauppauge WinTV-PVR USB2 support"
+reject_firmware drivers/media/usb/pvrusb2/pvrusb2-hdw.c
+clean_blob drivers/media/usb/pvrusb2/pvrusb2-devattr.c
+clean_kconfig drivers/media/usb/pvrusb2/Kconfig VIDEO_PVRUSB2
+clean_mk CONFIG_VIDEO_PVRUSB2 drivers/media/usb/pvrusb2/Makefile
+
+announce "VIDEO_CX23885, VIDEO_CX88_BLACKBIRD, VIDEO_IVTV, VIDEO_PVRUSB2" - "See above"
+clean_blob include/media/drv-intf/cx2341x.h
+
+announce VIDEO_GO7007 - "Go 7007 support"
+reject_firmware drivers/media/usb/go7007/go7007-driver.c
+clean_blob drivers/media/usb/go7007/go7007-driver.c
+reject_firmware drivers/media/usb/go7007/go7007-fw.c
+clean_blob drivers/media/usb/go7007/go7007-fw.c
+clean_kconfig drivers/media/usb/go7007/Kconfig VIDEO_GO7007
+clean_mk CONFIG_VIDEO_GO7007 drivers/media/usb/go7007/Makefile
+
+announce VIDEO_GO7007_USB_S2250_BOARD - "Sensoray 2250/2251 support"
+reject_firmware drivers/media/usb/go7007/go7007-loader.c
+clean_blob drivers/media/usb/go7007/go7007-loader.c
+clean_kconfig drivers/media/usb/go7007/Kconfig VIDEO_GO7007_USB_S2250_BOARD
+clean_mk CONFIG_VIDEO_GO7007_USB_S2250_BOARD drivers/media/usb/go7007/Makefile
+
+announce VIDEO_SAA7134_DVB - "DVB/ATSC Support for saa7134 based TV cards"
+reject_firmware drivers/media/pci/saa7134/saa7134-dvb.c
+clean_kconfig drivers/media/pci/saa7134/Kconfig VIDEO_SAA7134_DVB
+clean_mk CONFIG_VIDEO_SAA7134_DVB drivers/media/pci/saa7134/Makefile
+
+announce VIDEO_SAA7134_GO7007 - "go7007 support for saa7134 based TV cards"
+clean_blob drivers/media/pci/saa7134/saa7134-go7007.c
+clean_kconfig drivers/media/pci/saa7134/Kconfig VIDEO_SAA7134_GO7007
+clean_mk CONFIG_VIDEO_SAA7134_GO7007 drivers/media/pci/saa7134/Makefile
+
+announce VIDEO_SAA7164 - "NXP SAA7164 support"
+reject_firmware drivers/media/pci/saa7164/saa7164-fw.c
+clean_blob drivers/media/pci/saa7164/saa7164-fw.c
+clean_kconfig drivers/media/pci/saa7164/Kconfig VIDEO_SAA7164
+clean_mk CONFIG_VIDEO_SAA7164 drivers/media/pci/saa7164/Makefile
+
+announce VIDEO_S5C73M3 - "Samsung S5C73M3 sensor support"
+reject_firmware drivers/media/i2c/s5c73m3/s5c73m3-core.c
+clean_blob drivers/media/i2c/s5c73m3/s5c73m3-core.c
+clean_kconfig drivers/media/i2c/Kconfig VIDEO_S5C73M3
+clean_mk CONFIG_VIDEO_S5C73M3 drivers/media/i2c/s5c73m3/Makefile
+
+announce VIDEO_S5K4ECGX - "Samsung S5K4ECGX sensor support"
+reject_firmware drivers/media/i2c/s5k4ecgx.c
+clean_blob drivers/media/i2c/s5k4ecgx.c
+clean_kconfig drivers/media/i2c/Kconfig VIDEO_S5K4ECGX
+clean_mk CONFIG_VIDEO_S5K4ECGX drivers/media/i2c/Makefile
+
+announce VIDEO_S5K5BAF - "Samsung S5K5BAF sensor support"
+reject_firmware drivers/media/i2c/s5k5baf.c
+clean_blob drivers/media/i2c/s5k5baf.c
+clean_kconfig drivers/media/i2c/Kconfig VIDEO_S5K5BAF
+clean_mk CONFIG_VIDEO_S5K5BAF drivers/media/i2c/Makefile
+
+announce VIDEO_SAMSUNG_S5P_MFC - "Samsung S5P MFC 5.1 Video Codec"
+reject_firmware drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+clean_blob drivers/media/platform/s5p-mfc/s5p_mfc.c
+clean_kconfig drivers/media/platform/Kconfig VIDEO_SAMSUNG_S5P_MFC
+clean_mk CONFIG_VIDEO_SAMSUNG_S5P_MFC drivers/media/platform/s5p-mfc/Makefile
+
+announce USB_S2255 - "USB Sensoray 2255 video capture device"
+reject_firmware drivers/media/usb/s2255/s2255drv.c
+clean_blob drivers/media/usb/s2255/s2255drv.c
+clean_kconfig drivers/media/usb/s2255/Kconfig USB_S2255
+clean_mk CONFIG_USB_S2255 drivers/media/usb/s2255/Makefile
+
+announce USB_GSPCA_VICAM - "USB 3com HomeConnect, AKA vicam"
+drop_fw_file firmware/vicam/firmware.H16 firmware/vicam/firmware.fw
+reject_firmware drivers/media/usb/gspca/vicam.c
+clean_blob drivers/media/usb/gspca/vicam.c
+clean_kconfig drivers/media/usb/gspca/Kconfig USB_GSPCA_VICAM
+clean_mk CONFIG_USB_GSPCA_VICAM drivers/media/usb/gspca/Makefile
+
+announce VIDEO_TI_VPE - "TI VPE (Video Processing Engine) driver"
+reject_firmware drivers/media/platform/ti-vpe/vpdma.c
+clean_blob drivers/media/platform/ti-vpe/vpdma.c
+clean_kconfig drivers/media/platform/Kconfig VIDEO_TI_VPE
+clean_mk CONFIG_VIDEO_TI_VPE drivers/media/platform/ti-vpe/Makefile
+
+# radio
+
+announce RADIO_WL1273 - "Texas Instruments WL1273 I2C FM Radio"
+reject_firmware drivers/media/radio/radio-wl1273.c
+clean_blob drivers/media/radio/radio-wl1273.c
+clean_kconfig drivers/media/radio/Kconfig RADIO_WL1273
+clean_mk CONFIG_RADIO_WL1273 drivers/media/radio/Makefile
+
+announce RADIO_WL128X - "Texas Instruments WL128x FM Radio"
+clean_blob drivers/media/radio/wl128x/fmdrv_common.h
+reject_firmware drivers/media/radio/wl128x/fmdrv_common.c
+clean_blob drivers/media/radio/wl128x/fmdrv_common.c
+clean_kconfig drivers/media/radio/wl128x/Kconfig RADIO_WL128X
+clean_mk CONFIG_RADIO_WL128X drivers/media/radio/Makefile
+
+#######
+# net #
+#######
+
+announce ACENIC - "Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit"
+drop_fw_file firmware/acenic/tg1.bin.ihex firmware/acenic/tg1.bin
+drop_fw_file firmware/acenic/tg2.bin.ihex firmware/acenic/tg2.bin
+reject_firmware drivers/net/ethernet/alteon/acenic.c
+clean_blob drivers/net/ethernet/alteon/acenic.c
+clean_kconfig drivers/net/ethernet/alteon/Kconfig ACENIC
+clean_mk CONFIG_ACENIC drivers/net/ethernet/alteon/Makefile
+
+announce ADAPTEC_STARFIRE - "Adaptec Starfire/DuraLAN support"
+clean_fw firmware/adaptec/starfire_rx.bin.ihex firmware/adaptec/starfire_rx.bin
+clean_fw firmware/adaptec/starfire_tx.bin.ihex firmware/adaptec/starfire_tx.bin
+reject_firmware drivers/net/ethernet/adaptec/starfire.c
+clean_blob drivers/net/ethernet/adaptec/starfire.c
+clean_kconfig drivers/net/ethernet/adaptec/Kconfig ADAPTEC_STARFIRE
+clean_mk CONFIG_ADAPTEC_STARFIRE drivers/net/ethernet/adaptec/Makefile
+
+announce BNA - "Brocade 1010/1020 10Gb Ethernet Driver support"
+clean_blob drivers/net/ethernet/brocade/bna/bnad.c
+clean_blob drivers/net/ethernet/brocade/bna/cna.h
+reject_firmware drivers/net/ethernet/brocade/bna/bnad_ethtool.c
+reject_firmware drivers/net/ethernet/brocade/bna/cna_fwimg.c
+clean_kconfig drivers/net/ethernet/brocade/bna/Kconfig BNA
+clean_mk CONFIG_BNA drivers/net/ethernet/brocade/bna/Makefile
+
+announce BNX2 - "Broadcom NetXtremeII"
+drop_fw_file firmware/bnx2/bnx2-mips-09-6.2.1a.fw.ihex firmware/bnx2/bnx2-mips-09-6.2.1a.fw
+drop_fw_file firmware/bnx2/bnx2-rv2p-09-6.0.17.fw.ihex firmware/bnx2/bnx2-rv2p-09-6.0.17.fw
+drop_fw_file firmware/bnx2/bnx2-rv2p-09ax-6.0.17.fw.ihex firmware/bnx2/bnx2-rv2p-09ax-6.0.17.fw
+drop_fw_file firmware/bnx2/bnx2-mips-06-6.2.1.fw.ihex firmware/bnx2/bnx2-mips-06-6.2.1.fw
+drop_fw_file firmware/bnx2/bnx2-rv2p-06-6.0.15.fw.ihex firmware/bnx2/bnx2-rv2p-06-6.0.15.fw
+reject_firmware drivers/net/ethernet/broadcom/bnx2.c
+clean_blob drivers/net/ethernet/broadcom/bnx2.c
+clean_kconfig drivers/net/ethernet/broadcom/Kconfig BNX2
+clean_mk CONFIG_BNX2 drivers/net/ethernet/broadcom/Makefile
+
+announce BNX2X - "Broadcom NetXtremeII 10Gb support"
+drop_fw_file firmware/bnx2x/bnx2x-e1-6.2.9.0.fw.ihex firmware/bnx2x/bnx2x-e1-6.2.9.0.fw
+drop_fw_file firmware/bnx2x/bnx2x-e1h-6.2.9.0.fw.ihex firmware/bnx2x/bnx2x-e1h-6.2.9.0.fw
+drop_fw_file firmware/bnx2x/bnx2x-e2-6.2.9.0.fw.ihex firmware/bnx2x/bnx2x-e2-6.2.9.0.fw
+reject_firmware drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+clean_sed '
+/^#include "bnx2x_init\.h"/,/^$/{
+  /^$/i\
+#define bnx2x_init_block(bp, start, end) \\\
+  return (printk(KERN_ERR "%s: Missing Free firmware\\n", bp->dev->name),\\\
+	  -EINVAL)
+}' drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c 'report missing Free firmware'
+clean_blob drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+clean_sed '
+/^int bnx2x_compare_fw_ver/,/^}$/{
+  /^		u32 my_fw = /i\
+		/*(DEBLOBBED)*/
+  /^		u32 my_fw = /,/<< 24);/d;
+  /^		u32 loaded_fw = /,/^$/{
+    /^$/i\
+\
+		u32 my_fw = ~loaded_fw;
+  }
+}' drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c 'fail already-loaded test'
+clean_blob drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h
+clean_sed '
+/static void bnx2x_init_wr_wb/{
+  i\
+extern void bnx2x_init_wr_wb(struct bnx2x *, u32, const u32 *, u32);
+}' drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h 'declare removed function'
+clean_blob drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h
+clean_kconfig drivers/net/ethernet/broadcom/Kconfig BNX2X
+clean_mk CONFIG_BNX2X drivers/net/ethernet/broadcom/bnx2x/Makefile
+
+announce CASSINI - "Sun Cassini"
+drop_fw_file firmware/sun/cassini.bin.ihex firmware/sun/cassini.bin
+reject_firmware drivers/net/ethernet/sun/cassini.c
+clean_blob drivers/net/ethernet/sun/cassini.c
+clean_kconfig drivers/net/ethernet/sun/Kconfig CASSINI
+clean_mk CONFIG_CASSINI drivers/net/ethernet/sun/Makefile
+
+announce CHELSIO_T3 - "Chelsio AEL 2005 support"
+drop_fw_file firmware/cxgb3/t3b_psram-1.1.0.bin.ihex firmware/cxgb3/t3b_psram-1.1.0.bin
+drop_fw_file firmware/cxgb3/t3c_psram-1.1.0.bin.ihex firmware/cxgb3/t3c_psram-1.1.0.bin
+drop_fw_file firmware/cxgb3/ael2005_opt_edc.bin.ihex firmware/cxgb3/ael2005_opt_edc.bin
+drop_fw_file firmware/cxgb3/ael2005_twx_edc.bin.ihex firmware/cxgb3/ael2005_twx_edc.bin
+drop_fw_file firmware/cxgb3/ael2020_twx_edc.bin.ihex firmware/cxgb3/ael2020_twx_edc.bin
+reject_firmware drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
+clean_blob drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
+clean_kconfig drivers/net/ethernet/chelsio/Kconfig CHELSIO_T3
+clean_mk CONFIG_CHELSIO_T3 drivers/net/ethernet/chelsio/cxgb3/Makefile
+
+announce CHELSIO_T4 - "Chelsio Communications T4 Ethernet support"
+reject_firmware drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+clean_blob drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+clean_kconfig drivers/net/ethernet/chelsio/Kconfig CHELSIO_T4
+clean_mk CONFIG_CHELSIO_T4 drivers/net/ethernet/chelsio/cxgb4/Makefile
+
+announce E100 - "Intel PRO/100+"
+drop_fw_file firmware/e100/d101m_ucode.bin.ihex firmware/e100/d101m_ucode.bin
+drop_fw_file firmware/e100/d101s_ucode.bin.ihex firmware/e100/d101s_ucode.bin
+drop_fw_file firmware/e100/d102e_ucode.bin.ihex firmware/e100/d102e_ucode.bin
+reject_firmware drivers/net/ethernet/intel/e100.c
+clean_sed '
+/^static const struct firmware \*e100_\(reject\|request\)_firmware(/,/^}$/{
+  s:^\(.*\)return ERR_PTR(err);$:\1netif_err(nic, probe, nic->netdev, "Proceeding without firmware\\n");\n\1return NULL;:
+}' drivers/net/ethernet/intel/e100.c 'proceed without firmware'
+clean_blob drivers/net/ethernet/intel/e100.c
+clean_kconfig drivers/net/ethernet/intel/Kconfig E100
+clean_mk CONFIG_E100 drivers/net/ethernet/intel/Makefile
+
+announce LIQUIDIO - "Cavium LiquidIO support"
+reject_firmware drivers/net/ethernet/cavium/liquidio/lio_main.c
+clean_blob drivers/net/ethernet/cavium/liquidio/lio_main.c
+clean_kconfig drivers/net/ethernet/cavium/Kconfig LIQUIDIO
+clean_mk CONFIG_LIQUIDIO drivers/net/ethernet/cavium/liquidio/Makefile
+
+announce MYRI_SBUS - "MyriCOM Gigabit Ethernet"
+drop_fw_file firmware/myricom/lanai.bin.ihex firmware/myricom/lanai.bin
+
+announce MYRI10GE - "Myricom Myri-10G Ethernet support"
+reject_firmware drivers/net/ethernet/myricom/myri10ge/myri10ge.c
+clean_blob drivers/net/ethernet/myricom/myri10ge/myri10ge.c
+clean_kconfig drivers/net/ethernet/myricom/Kconfig MYRI10GE
+clean_mk CONFIG_MYRI10GE drivers/net/ethernet/myricom/myri10ge/Makefile
+
+announce NETXEN_NIC - "NetXen Multi port (1/10) Gigabit Ethernet NIC"
+reject_firmware drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c
+clean_blob drivers/net/ethernet/qlogic/netxen/netxen_nic.h
+clean_blob drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c
+clean_kconfig drivers/net/ethernet/qlogic/Kconfig NETXEN_NIC
+clean_mk CONFIG_NETXEN_NIC drivers/net/ethernet/qlogic/Makefile
+
+announce QED - "QLogic QED 25/40/100Gb core driver"
+reject_firmware drivers/net/ethernet/qlogic/qed/qed_main.c
+clean_blob drivers/net/ethernet/qlogic/qed/qed_main.c
+clean_kconfig drivers/net/ethernet/qlogic/Kconfig QED
+clean_mk CONFIG_QED drivers/net/ethernet/qlogic/qed/Makefile
+
+announce QLCNIC - "QLOGIC QLCNIC 1/10Gb Converged Ethernet NIC Support"
+reject_firmware drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c
+reject_firmware drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
+clean_blob drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
+clean_blob drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h
+clean_blob drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c
+clean_kconfig drivers/net/ethernet/qlogic/Kconfig QLCNIC
+clean_mk CONFIG_QLCNIC drivers/net/ethernet/qlogic/qlcnic/Makefile
+
+announce R8169 - "Realtek 8169 gigabit ethernet support"
+reject_firmware drivers/net/ethernet/realtek/r8169.c
+clean_blob drivers/net/ethernet/realtek/r8169.c
+clean_kconfig drivers/net/ethernet/realtek/Kconfig R8169
+clean_mk CONFIG_R8169 drivers/net/ethernet/realtek/Makefile
+
+announce SLICOSS - "Alacritech Gigabit IS-NIC cards"
+reject_firmware drivers/staging/slicoss/slicoss.c
+clean_blob drivers/staging/slicoss/slicoss.c
+clean_kconfig drivers/staging/slicoss/Kconfig SLICOSS
+clean_mk CONFIG_SLICOSS drivers/staging/slicoss/Makefile
+
+announce SPIDER_NET - "Spider Gigabit Ethernet driver"
+reject_firmware drivers/net/ethernet/toshiba/spider_net.c
+clean_sed 's,spider_fw\.bin,DEBLOBBED.bin,g' \
+  drivers/net/ethernet/toshiba/spider_net.c 'removed non-Free firmware notes'
+clean_blob drivers/net/ethernet/toshiba/spider_net.c
+clean_blob drivers/net/ethernet/toshiba/spider_net.h
+clean_kconfig drivers/net/ethernet/toshiba/Kconfig SPIDER_NET
+clean_mk CONFIG_SPIDER_NET drivers/net/ethernet/toshiba/Makefile
+
+announce TEHUTI - "Tehuti Networks 10G Ethernet"
+drop_fw_file firmware/tehuti/bdx.bin.ihex firmware/tehuti/bdx.bin
+reject_firmware drivers/net/ethernet/tehuti/tehuti.c
+clean_blob drivers/net/ethernet/tehuti/tehuti.c
+clean_kconfig drivers/net/ethernet/tehuti/Kconfig TEHUTI
+clean_mk CONFIG_TEHUTI drivers/net/ethernet/tehuti/Makefile
+
+announce TIGON3 - "Broadcom Tigon3"
+drop_fw_file firmware/tigon/tg3.bin.ihex firmware/tigon/tg3.bin
+drop_fw_file firmware/tigon/tg3_tso.bin.ihex firmware/tigon/tg3_tso.bin
+drop_fw_file firmware/tigon/tg3_tso5.bin.ihex firmware/tigon/tg3_tso5.bin
+reject_firmware drivers/net/ethernet/broadcom/tg3.c
+clean_blob drivers/net/ethernet/broadcom/tg3.c
+clean_kconfig drivers/net/ethernet/broadcom/Kconfig TIGON3
+clean_mk CONFIG_TIGON3 drivers/net/ethernet/broadcom/Makefile
+
+announce TYPHOON - "3cr990 series Typhoon"
+drop_fw_file firmware/3com/typhoon.bin.ihex firmware/3com/typhoon.bin
+reject_firmware drivers/net/ethernet/3com/typhoon.c
+clean_blob drivers/net/ethernet/3com/typhoon.c
+clean_kconfig drivers/net/ethernet/3com/Kconfig TYPHOON
+clean_mk CONFIG_TYPHOON drivers/net/ethernet/3com/Makefile
+
+announce VXGE - "Exar X3100 Series 10GbE PCIe Server Adapter"
+reject_firmware drivers/net/ethernet/neterion/vxge/vxge-main.c
+clean_blob drivers/net/ethernet/neterion/vxge/vxge-main.c
+clean_kconfig drivers/net/ethernet/neterion/Kconfig VXGE
+clean_mk CONFIG_VXGE drivers/net/ethernet/neterion/vxge/Makefile
+
+# appletalk
+
+announce COPS - "COPS LocalTalk PC"
+clean_sed '
+/sizeof(\(ff\|lt\)drv_code)/{
+  i\
+		printk(KERN_INFO "%s: Missing Free firmware.\\n", dev->name);\
+		return;
+}
+/\(ff\|lt\)drv_code/d;
+' drivers/net/appletalk/cops.c 'report missing Free firmware'
+clean_blob drivers/net/appletalk/cops.c
+clean_file drivers/net/appletalk/cops_ffdrv.h
+clean_file drivers/net/appletalk/cops_ltdrv.h
+clean_kconfig drivers/net/appletalk/Kconfig COPS
+clean_mk CONFIG_COPS drivers/net/appletalk/Makefile
+
+# hamradio
+
+announce YAM - "YAM driver for AX.25"
+drop_fw_file firmware/yam/1200.bin.ihex firmware/yam/1200.bin
+drop_fw_file firmware/yam/9600.bin.ihex firmware/yam/9600.bin
+reject_firmware drivers/net/hamradio/yam.c
+clean_blob drivers/net/hamradio/yam.c
+clean_kconfig drivers/net/hamradio/Kconfig YAM
+clean_mk CONFIG_YAM drivers/net/hamradio/Makefile
+
+# irda
+
+announce USB_IRDA - "IrDA USB dongles"
+reject_firmware drivers/net/irda/irda-usb.c
+clean_blob drivers/net/irda/irda-usb.c
+clean_sed '
+s,\(char stir421x_fw_name\)\[12\];,\1[16];,
+' drivers/net/irda/irda-usb.c "avoid buffer overflow with deblobbed filename"
+clean_kconfig drivers/net/irda/Kconfig USB_IRDA
+clean_mk CONFIG_USB_IRDA drivers/net/irda/Makefile
+
+# smsc
+
+announce PCMCIA_SMC91C92 - "SMC 91Cxx PCMCIA"
+drop_fw_file firmware/ositech/Xilinx7OD.bin.ihex firmware/ositech/Xilinx7OD.bin
+reject_firmware drivers/net/ethernet/smsc/smc91c92_cs.c
+clean_blob drivers/net/ethernet/smsc/smc91c92_cs.c
+clean_kconfig drivers/net/ethernet/smsc/Kconfig PCMCIA_SMC91C92
+clean_mk CONFIG_PCMCIA_SMC91C92 drivers/net/ethernet/smsc/Makefile
+
+# near-field communication
+
+announce NFC_FDP - "Intel FDP NFC driver"
+reject_firmware drivers/nfc/fdp/fdp.c
+clean_blob drivers/nfc/fdp/fdp.c
+clean_kconfig drivers/nfc/fdp/Kconfig NFC_FDP
+clean_mk CONFIG_NFC_FDP drivers/nfc/fdp/Makefile
+
+announce NFC_MRVL - "Marvell NFC core driver"
+reject_firmware drivers/nfc/nfcmrvl/fw_dnld.c
+clean_kconfig drivers/nfc/nfcmrvl/Kconfig NFC_MRVL
+clean_mk CONFIG_NFC_MRVL drivers/nfc/nfcmrvl/Makefile
+
+announce NFC_NXP_NCI - "NXP-NCI NFC driver"
+reject_firmware drivers/nfc/nxp-nci/firmware.c
+clean_kconfig drivers/nfc/nxp-nci/Kconfig NFC_NXP_NCI
+clean_mk CONFIG_NFC_NXP_NCI drivers/nfc/nxp-nci/Makefile
+
+announce NFC_WILINK - "Texas Instruments NFC WiLink driver"
+reject_firmware drivers/nfc/nfcwilink.c
+clean_blob drivers/nfc/nfcwilink.c
+clean_kconfig drivers/nfc/Kconfig NFC_WILINK
+clean_mk CONFIG_NFC_WILINK drivers/nfc/Makefile
+
+announce NFC_PN544_I2C - "NFC PN544 i2c support"
+reject_firmware drivers/nfc/pn544/i2c.c
+clean_kconfig drivers/nfc/pn544/Kconfig NFC_PN544_I2C
+clean_mk CONFIG_NFC_PN544_I2C drivers/nfc/pn544/Makefile
+
+announce NFC_S3FWRN5 - "Core driver for Samsung S3FWRN5 NFC chip"
+clean_blob drivers/nfc/s3fwrn5/core.c
+reject_firmware drivers/nfc/s3fwrn5/firmware.c
+reject_firmware drivers/nfc/s3fwrn5/nci.c
+clean_kconfig drivers/nfc/s3fwrn5/Kconfig NFC_S3FWRN5
+clean_mk CONFIG_NFC_S3FWRN5 drivers/nfc/s3fwrn5/Makefile
+
+# pcmcia
+
+# CIS files are not software.
+# announce PCCARD - "PCCard (PCMCIA/CardBus) support"
+# reject_firmware drivers/pcmcia/ds.c
+# clean_kconfig drivers/pcmcia/Kconfig 'PCCARD'
+# clean_mk CONFIG_PCCARD drivers/pcmcia/Makefile
+
+announce PCMCIA_3C574 - "3Com 3c574 PCMCIA support"
+# This is not software; it's Free, but GPLed without in-tree sources.
+drop_fw_file firmware/cis/3CCFEM556.cis.ihex firmware/cis/3CCFEM556.cis
+# clean_blob drivers/net/pcmcia/3c574_cs.c
+# clean_kconfig drivers/net/pcmcia/Kconfig 'PCMCIA_3C574'
+# clean_mk CONFIG_PCMCIA_3C574 drivers/net/pcmcia/Makefile
+
+announce PCMCIA_3C589 - "3Com 3c589 PCMCIA support"
+# This is not software; it's Free, but GPLed without in-tree sources.
+drop_fw_file firmware/cis/3CXEM556.cis.ihex firmware/cis/3CXEM556.cis
+# clean_blob drivers/net/pcmcia/3c589_cs.c
+# clean_kconfig drivers/net/pcmcia/Kconfig 'PCMCIA_3C589'
+# clean_mk CONFIG_PCMCIA_3C589 drivers/net/pcmcia/Makefile
+
+announce PCMCIA_PCNET - "NE2000 compatible PCMCIA support"
+# These are not software; they're Free, but GPLed without in-tree sources.
+drop_fw_file firmware/cis/LA-PCM.cis.ihex firmware/cis/LA-PCM.cis
+drop_fw_file firmware/cis/PCMLM28.cis.ihex firmware/cis/PCMLM28.cis
+drop_fw_file firmware/cis/DP83903.cis.ihex firmware/cis/DP83903.cis
+drop_fw_file firmware/cis/NE2K.cis.ihex firmware/cis/NE2K.cis
+drop_fw_file firmware/cis/tamarack.cis.ihex firmware/cis/tamarack.cis
+drop_fw_file firmware/cis/PE-200.cis.ihex firmware/cis/PE-200.cis
+drop_fw_file firmware/cis/PE520.cis.ihex firmware/cis/PE520.cis
+# clean_blob drivers/net/pcmcia/pcnet_cs.c
+# clean_kconfig drivers/net/pcmcia/Kconfig 'PCMCIA_PCNET'
+# clean_mk CONFIG_PCMCIA_PCNET drivers/net/pcmcia/Makefile
+
+# usb
+
+announce USB_KAWETH - "USB KLSI KL5USB101-based ethernet device support"
+drop_fw_file firmware/kaweth/new_code.bin.ihex firmware/kaweth/new_code.bin
+drop_fw_file firmware/kaweth/new_code_fix.bin.ihex firmware/kaweth/new_code_fix.bin
+drop_fw_file firmware/kaweth/trigger_code.bin.ihex firmware/kaweth/trigger_code.bin
+drop_fw_file firmware/kaweth/trigger_code_fix.bin.ihex firmware/kaweth/trigger_code_fix.bin
+reject_firmware drivers/net/usb/kaweth.c
+clean_blob drivers/net/usb/kaweth.c
+clean_kconfig drivers/net/usb/Kconfig USB_KAWETH
+clean_mk CONFIG_USB_KAWETH drivers/net/usb/Makefile
+
+# wireless
+
+announce ATMEL "Atmel at76c50x chipset  802.11b support"
+reject_firmware drivers/net/wireless/atmel/atmel.c
+clean_blob drivers/net/wireless/atmel/atmel.c
+clean_kconfig drivers/net/wireless/atmel/Kconfig ATMEL
+clean_mk CONFIG_ATMEL drivers/net/wireless/atmel/Makefile
+
+announce AT76C50X_USB - "Atmel at76c503/at76c505/at76c505a USB cards"
+reject_firmware drivers/net/wireless/atmel/at76c50x-usb.c
+clean_blob drivers/net/wireless/atmel/at76c50x-usb.c
+clean_kconfig drivers/net/wireless/atmel/Kconfig AT76C50X_USB
+clean_mk CONFIG_AT76C50X_USB drivers/net/wireless/atmel/Makefile
+
+announce B43 - "Broadcom 43xx wireless support (mac80211 stack)"
+maybe_reject_firmware drivers/net/wireless/broadcom/b43/main.c
+clean_sed '
+/^static int b43_upload_microcode(/,/^}$/{
+  /	if (dev->fw\.opensource) {$/i\
+	if (!dev->fw.opensource) {\
+		b43err(dev->wl, "Rejected non-Free firmware\\n");\
+		err = -EOPNOTSUPP;\
+		goto error;\
+	}
+}' drivers/net/wireless/broadcom/b43/main.c 'double-check and reject non-Free firmware'
+# Major portions of firmware filenames not deblobbed.
+clean_blob drivers/net/wireless/broadcom/b43/main.c
+clean_kconfig drivers/net/wireless/broadcom/b43/Kconfig B43
+clean_mk CONFIG_B43 drivers/net/wireless/broadcom/b43/Makefile
+
+announce B43LEGACY - "Broadcom 43xx-legacy wireless support (mac80211 stack)"
+reject_firmware drivers/net/wireless/broadcom/b43legacy/main.c
+# Major portions of firwmare filenames not deblobbed.
+clean_blob drivers/net/wireless/broadcom/b43legacy/main.c
+clean_kconfig drivers/net/wireless/broadcom/b43legacy/Kconfig B43LEGACY
+clean_mk CONFIG_B43LEGACY drivers/net/wireless/broadcom/b43legacy/Makefile
+
+announce BRCMSMAC - "Broadcom IEEE802.11n PCIe SoftMAC WLAN driver"
+reject_firmware drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c
+clean_blob drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c
+clean_kconfig drivers/net/wireless/broadcom/brcm80211/Kconfig BRCMSMAC
+clean_mk CONFIG_BRCMSMAC drivers/net/wireless/broadcom/brcm80211/Makefile
+
+announce BRCMFMAC - "Broadcom IEEE802.11n embedded FullMAC WLAN driver"
+reject_firmware drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c
+clean_blob drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h
+clean_kconfig drivers/net/wireless/broadcom/brcm80211/Kconfig BRCMFMAC
+clean_mk CONFIG_BRCMFMAC drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile
+
+announce BRCMFMAC_SDIO - "Broadcom IEEE802.11n SDIO FullMAC WLAN driver"
+clean_blob drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
+clean_kconfig drivers/net/wireless/broadcom/brcm80211/Kconfig BRCMFMAC_SDIO
+clean_mk CONFIG_BRCMFMAC_SDIO drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile
+
+announce BRCMFMAC_USB - "Broadcom IEEE802.11n USB FullMAC WLAN driver"
+clean_blob drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c
+clean_kconfig drivers/net/wireless/broadcom/brcm80211/Kconfig BRCMFMAC_USB
+clean_mk CONFIG_BRCMFMAC_USB drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile
+
+announce BRCMFMAC_PCIE - "Broadcom IEEE802.11n PCIE FullMAC WLAN driver"
+clean_blob drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
+clean_kconfig drivers/net/wireless/broadcom/brcm80211/Kconfig BRCMFMAC_PCIE
+clean_mk CONFIG_BRCMFMAC_PCIE drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile
+
+announce HERMES - "Hermes chipset 802.11b support (Orinoco/Prism2/Symbol)"
+reject_firmware drivers/net/wireless/intersil/orinoco/fw.c
+clean_blob drivers/net/wireless/intersil/orinoco/fw.c
+clean_kconfig drivers/net/wireless/intersil/orinoco/Kconfig HERMES
+clean_mk CONFIG_HERMES drivers/net/wireless/intersil/orinoco/Makefile
+
+announce ORINOCO_USB - "Agere Orinoco USB support"
+reject_firmware drivers/net/wireless/intersil/orinoco/orinoco_usb.c
+clean_blob drivers/net/wireless/intersil/orinoco/orinoco_usb.c
+clean_kconfig drivers/net/wireless/intersil/orinoco/Kconfig ORINOCO_USB
+clean_mk CONFIG_ORINOCO_USB drivers/net/wireless/intersil/orinoco/Makefile
+
+announce IPW2100 - "Intel PRO/Wireless 2100 Network Connection"
+reject_firmware drivers/net/wireless/intel/ipw2x00/ipw2100.c
+clean_blob drivers/net/wireless/intel/ipw2x00/ipw2100.c
+clean_kconfig drivers/net/wireless/intel/ipw2x00/Kconfig IPW2100
+clean_mk CONFIG_IPW2100 drivers/net/wireless/intel/ipw2x00/Makefile
+
+announce IPW2200 - "Intel PRO/Wireless 2200BG and 2915ABG Network Connection"
+reject_firmware drivers/net/wireless/intel/ipw2x00/ipw2200.c
+clean_blob drivers/net/wireless/intel/ipw2x00/ipw2200.c
+clean_kconfig drivers/net/wireless/intel/ipw2x00/Kconfig IPW2200
+clean_mk CONFIG_IPW2200 drivers/net/wireless/intel/ipw2x00/Makefile
+
+announce IWL3945 - "Intel PRO/Wireless 3945ABG/BG Network Connection"
+reject_firmware drivers/net/wireless/intel/iwlegacy/3945-mac.c
+clean_blob drivers/net/wireless/intel/iwlegacy/3945-mac.c
+clean_blob drivers/net/wireless/intel/iwlegacy/3945.h
+clean_kconfig drivers/net/wireless/intel/iwlegacy/Kconfig IWL3945
+clean_mk CONFIG_IWL3945 drivers/net/wireless/intel/iwlegacy/Makefile
+
+announce IWL4965 - "Intel Wireless WiFi 4965AGN"
+reject_firmware drivers/net/wireless/intel/iwlegacy/4965-mac.c
+clean_blob drivers/net/wireless/intel/iwlegacy/4965-mac.c
+clean_blob drivers/net/wireless/intel/iwlegacy/4965.c
+clean_kconfig drivers/net/wireless/intel/iwlegacy/Kconfig IWL4965
+clean_mk CONFIG_IWL4965 drivers/net/wireless/intel/iwlegacy/Makefile
+
+announce IWLWIFI - "Intel Wireless WiFi Next Gen AGN"
+reject_firmware drivers/net/wireless/intel/iwlwifi/iwl-drv.c
+clean_blob drivers/net/wireless/intel/iwlwifi/iwl-drv.c
+clean_kconfig drivers/net/wireless/intel/iwlwifi/Kconfig IWLWIFI
+clean_mk CONFIG_IWLWIFI drivers/net/wireless/intel/iwlwifi/Makefile
+
+announce IWLDVM - "Intel Wireless WiFi DVM Firmware support"
+clean_blob drivers/net/wireless/intel/iwlwifi/iwl-1000.c
+clean_blob drivers/net/wireless/intel/iwlwifi/iwl-2000.c
+clean_blob drivers/net/wireless/intel/iwlwifi/iwl-5000.c
+clean_blob drivers/net/wireless/intel/iwlwifi/iwl-6000.c
+clean_kconfig drivers/net/wireless/intel/iwlwifi/Kconfig IWLDVM
+clean_mk CONFIG_IWLMVM drivers/net/wireless/intel/iwlwifi/Makefile
+
+announce IWLMVM - "Intel Wireless WiFi MVM Firmware support"
+reject_firmware drivers/net/wireless/intel/iwlwifi/mvm/nvm.c
+clean_blob drivers/net/wireless/intel/iwlwifi/iwl-7000.c
+clean_blob drivers/net/wireless/intel/iwlwifi/iwl-8000.c
+clean_blob drivers/net/wireless/intel/iwlwifi/iwl-9000.c
+clean_kconfig drivers/net/wireless/intel/iwlwifi/Kconfig IWLMVM
+clean_mk CONFIG_IWLMVM drivers/net/wireless/intel/iwlwifi/Makefile
+
+announce LIBERTAS - "Marvell 8xxx Libertas WLAN driver support"
+reject_firmware drivers/net/wireless/marvell/libertas/firmware.c
+clean_kconfig drivers/net/wireless/marvell/libertas/Kconfig LIBERTAS
+clean_mk CONFIG_LIBERTAS drivers/net/wireless/marvell/libertas/Makefile
+
+announce LIBERTAS_CS - "Marvell Libertas 8385 CompactFlash 802.11b/g cards"
+clean_blob drivers/net/wireless/marvell/libertas/if_cs.c
+clean_kconfig drivers/net/wireless/marvell/libertas/Kconfig LIBERTAS_CS
+clean_mk CONFIG_LIBERTAS_CS drivers/net/wireless/marvell/libertas/Makefile
+
+announce LIBERTAS_SDIO - "Marvell Libertas 8385 and 8686 SDIO 802.11b/g cards"
+clean_blob drivers/net/wireless/marvell/libertas/if_sdio.c
+clean_kconfig drivers/net/wireless/marvell/libertas/Kconfig LIBERTAS_SDIO
+clean_mk CONFIG_LIBERTAS_SDIO drivers/net/wireless/marvell/libertas/Makefile
+
+announce LIBERTAS_SPI - "Marvell Libertas 8686 SPI 802.11b/g cards"
+clean_blob drivers/net/wireless/marvell/libertas/if_spi.c
+clean_kconfig drivers/net/wireless/marvell/libertas/Kconfig LIBERTAS_SPI
+clean_mk CONFIG_LIBERTAS_SPI drivers/net/wireless/marvell/libertas/Makefile
+
+announce LIBERTAS_USB - "Marvell Libertas 8388 USB 802.11b/g cards"
+clean_blob drivers/net/wireless/marvell/libertas/if_usb.c
+clean_blob drivers/net/wireless/marvell/libertas/README
+clean_kconfig drivers/net/wireless/marvell/libertas/Kconfig LIBERTAS_USB
+clean_mk CONFIG_LIBERTAS_USB drivers/net/wireless/marvell/libertas/Makefile
+
+announce LIBERTAS_THINFIRM_USB - "Marvell Libertas 8388 USB 802.11b/g cards with thin firmware"
+reject_firmware drivers/net/wireless/marvell/libertas_tf/if_usb.c
+clean_blob drivers/net/wireless/marvell/libertas_tf/if_usb.c
+clean_kconfig drivers/net/wireless/marvell/libertas_tf/Kconfig LIBERTAS_THINFIRM_USB
+clean_mk CONFIG_LIBERTAS_THINFIRM_USB drivers/net/wireless/marvell/libertas_tf/Makefile
+
+announce MT7601U - "MediaTek MT7601U (USB) support"
+reject_firmware drivers/net/wireless/mediatek/mt7601u/mcu.c
+clean_blob drivers/net/wireless/mediatek/mt7601u/usb.c
+clean_blob drivers/net/wireless/mediatek/mt7601u/usb.h
+clean_kconfig drivers/net/wireless/mediatek/mt7601u/Kconfig MT7601U
+clean_mk CONFIG_MT7601U drivers/net/wireless/mediatek/mt7601u/Makefile
+
+announce MWIFIEX - "Marvell WiFi-Ex Driver"
+clean_blob drivers/net/wireless/marvell/mwifiex/README
+reject_firmware drivers/net/wireless/marvell/mwifiex/main.c
+clean_kconfig drivers/net/wireless/marvell/mwifiex/Kconfig MWIFIEX
+clean_mk CONFIG_MWIFIEX drivers/net/wireless/marvell/mwifiex/Makefile
+
+announce MWIFIEX_SDIO - "Marvell WiFi-Ex Driver for SD8787"
+clean_blob drivers/net/wireless/marvell/mwifiex/sdio.h
+clean_blob drivers/net/wireless/marvell/mwifiex/sdio.c
+clean_kconfig drivers/net/wireless/marvell/mwifiex/Kconfig MWIFIEX_SDIO
+clean_mk CONFIG_MWIFIEX_SDIO drivers/net/wireless/marvell/mwifiex/Makefile
+
+announce MWIFIEX_PCIE - "Marvell WiFi-Ex Driver for PCI 8766"
+clean_blob drivers/net/wireless/marvell/mwifiex/pcie.h
+clean_blob drivers/net/wireless/marvell/mwifiex/pcie.c
+clean_kconfig drivers/net/wireless/marvell/mwifiex/Kconfig MWIFIEX_PCIE
+clean_mk CONFIG_MWIFIEX_PCIE drivers/net/wireless/marvell/mwifiex/Makefile
+
+announce MWIFIEX_USB - "Marvell WiFi-Ex Driver for USB8797"
+clean_blob drivers/net/wireless/marvell/mwifiex/usb.h
+clean_blob drivers/net/wireless/marvell/mwifiex/usb.c
+clean_kconfig drivers/net/wireless/marvell/mwifiex/Kconfig MWIFIEX_USB
+clean_mk CONFIG_MWIFIEX_USB drivers/net/wireless/marvell/mwifiex/Makefile
+
+announce MWL8K - "Marvell 88W8xxx PCI/PCIe Wireless support"
+reject_firmware drivers/net/wireless/marvell/mwl8k.c
+clean_blob drivers/net/wireless/marvell/mwl8k.c
+clean_kconfig drivers/net/wireless/marvell/Kconfig MWL8K
+clean_mk CONFIG_MWL8K drivers/net/wireless/marvell/Makefile
+
+announce AR5523 - "Atheros AR5523 wireless driver support"
+reject_firmware drivers/net/wireless/ath/ar5523/ar5523.c
+clean_blob drivers/net/wireless/ath/ar5523/ar5523.c
+clean_blob drivers/net/wireless/ath/ar5523/ar5523.h
+clean_kconfig drivers/net/wireless/ath/ar5523/Kconfig AR5523
+clean_mk CONFIG_AR5523 drivers/net/wireless/ath/ar5523/Makefile
+
+announce ATH6KL - "Atheros ath6kl support"
+reject_firmware drivers/net/wireless/ath/ath6kl/init.c
+clean_blob drivers/net/wireless/ath/ath6kl/init.c
+clean_blob drivers/net/wireless/ath/ath6kl/core.h
+clean_kconfig drivers/net/wireless/ath/ath6kl/Kconfig ATH6KL
+clean_mk CONFIG_ATH6KL drivers/net/wireless/ath/ath6kl/Makefile
+
+announce ATH6KL_SDIO - "Atheros ath6kl SDIO support"
+clean_blob drivers/net/wireless/ath/ath6kl/sdio.c
+clean_kconfig drivers/net/wireless/ath/ath6kl/Kconfig ATH6KL_SDIO
+clean_mk CONFIG_ATH6KL_SDIO drivers/net/wireless/ath/ath6kl/Makefile
+
+announce ATH6KL_USB - "Atheros ath6kl USB support"
+clean_blob drivers/net/wireless/ath/ath6kl/usb.c
+clean_kconfig drivers/net/wireless/ath/ath6kl/Kconfig ATH6KL_USB
+clean_mk CONFIG_ATH6KL_USB drivers/net/wireless/ath/ath6kl/Makefile
+
+announce ATH10K - "Atheros 802.11ac wireless cards support"
+reject_firmware drivers/net/wireless/ath/ath10k/core.c
+clean_blob drivers/net/wireless/ath/ath10k/core.c
+clean_blob drivers/net/wireless/ath/ath10k/hw.h
+clean_kconfig drivers/net/wireless/ath/ath10k/Kconfig ATH10K
+clean_mk CONFIG_ATH10K drivers/net/wireless/ath/ath10k/Makefile
+
+announce ATH10K NL80211_TESTMODE - "nl80211 testmode command"
+reject_firmware drivers/net/wireless/ath/ath10k/testmode.c
+clean_sed '
+s,^\([\t ]*\/\* We didn.t find FW UTF API 1 \)("utf\.bin"),\1*//*(DEBLOBBED)*//*,
+' drivers/net/wireless/ath/ath10k/testmode.c 'removed blob name in comment'
+clean_kconfig net/wireless/Kconfig NL80211_TESTMODE
+clean_mk CONFIG_NL80211_TESTMODE drivers/net/wireless/ath/ath10k/Makefile
+
+announce ATH10K_PCI - "Atheros ath10k PCI support"
+clean_blob drivers/net/wireless/ath/ath10k/pci.c
+clean_kconfig drivers/net/wireless/ath/ath10k/Kconfig ATH10K_PCI
+clean_mk CONFIG_ATH10K_PCI drivers/net/wireless/ath/ath10k/Makefile
+
+announce WIL6210 - "Wilocity 60g WiFi card wil6210 support"
+reject_firmware drivers/net/wireless/ath/wil6210/fw_inc.c
+clean_blob drivers/net/wireless/ath/wil6210/fw.c
+clean_blob drivers/net/wireless/ath/wil6210/wil6210.h
+clean_kconfig drivers/net/wireless/ath/wil6210/Kconfig WIL6210
+clean_mk CONFIG_WIL6210 drivers/net/wireless/ath/wil6210/Makefile
+
+announce CW1200 - "CW1200 WLAN support"
+reject_firmware drivers/net/wireless/st/cw1200/fwio.c
+clean_blob drivers/net/wireless/st/cw1200/fwio.h
+reject_firmware drivers/net/wireless/st/cw1200/sta.c
+clean_kconfig drivers/net/wireless/st/cw1200/Kconfig CW1200
+clean_mk CONFIG_CW1200 drivers/net/wireless/st/cw1200/Makefile
+
+announce CW1200_WLAN_SDIO - "Support SDIO platforms"
+clean_blob drivers/net/wireless/st/cw1200/cw1200_sdio.c
+clean_kconfig drivers/net/wireless/st/cw1200/Kconfig CW1200_WLAN_SDIO
+clean_mk CONFIG_CW1200_WLAN_SDIO drivers/net/wireless/st/cw1200/Makefile
+
+announce PRISM2_USB - "Prism2.5/3 USB driver"
+reject_firmware drivers/staging/wlan-ng/prism2fw.c
+clean_blob drivers/staging/wlan-ng/prism2fw.c
+clean_kconfig drivers/staging/wlan-ng/Kconfig PRISM2_USB
+clean_mk CONFIG_PRISM2_USB drivers/staging/wlan-ng/Makefile
+
+announce P54_PCI - "Prism54 PCI support"
+reject_firmware drivers/net/wireless/intersil/p54/p54pci.c
+clean_blob drivers/net/wireless/intersil/p54/p54pci.c
+clean_sed 's,3826\.eeprom,DEBLOBBED,g' drivers/net/wireless/intersil/p54/Kconfig \
+    'removed blob name'
+clean_kconfig drivers/net/wireless/intersil/p54/Kconfig P54_PCI
+clean_mk CONFIG_P54_PCI drivers/net/wireless/intersil/p54/Makefile
+
+announce P54_SPI - "Prism54 SPI (stlc45xx) support"
+# There's support for loading custom 3826.eeprom here, with a default
+# eeprom that is clearly pure data.  Without Free 3826.arm, there's
+# little point in trying to retain the ability to load 3826.eeprom, so
+# we drop it altogether.
+reject_firmware drivers/net/wireless/intersil/p54/p54spi.c
+clean_blob drivers/net/wireless/intersil/p54/p54spi.c
+clean_kconfig drivers/net/wireless/intersil/p54/Kconfig P54_SPI
+clean_mk CONFIG_P54_SPI drivers/net/wireless/intersil/p54/Makefile
+
+announce P54_USB - "Prism54 USB support"
+reject_firmware drivers/net/wireless/intersil/p54/p54usb.c
+clean_blob drivers/net/wireless/intersil/p54/p54usb.c
+clean_blob drivers/net/wireless/intersil/p54/p54usb.h
+clean_kconfig drivers/net/wireless/intersil/p54/Kconfig P54_USB
+clean_mk CONFIG_P54_USB drivers/net/wireless/intersil/p54/Makefile
+
+announce PRISM54 - "Intersil Prism GT/Duette/Indigo PCI/Cardbus"
+reject_firmware drivers/net/wireless/intersil/prism54/islpci_dev.c
+clean_blob drivers/net/wireless/intersil/prism54/islpci_dev.c
+clean_kconfig drivers/net/wireless/intersil/Kconfig PRISM54
+clean_mk CONFIG_PRISM54 drivers/net/wireless/intersil/prism54/Makefile
+
+announce RSI_91X - "Redpine Signals Inc 91x WLAN driver support"
+clean_blob drivers/net/wireless/rsi/rsi_common.h
+clean_kconfig drivers/net/wireless/rsi/Kconfig RSI_91X
+clean_mk CONFIG_RSI_91X drivers/net/wireless/rsi/Makefile
+
+announce RSI_SDIO - "Redpine Signals SDIO bus support"
+reject_firmware drivers/net/wireless/rsi/rsi_91x_sdio_ops.c
+clean_blob drivers/net/wireless/rsi/rsi_91x_sdio.c
+clean_kconfig drivers/net/wireless/rsi/Kconfig RSI_SDIO
+clean_mk CONFIG_RSI_SDIO drivers/net/wireless/rsi/Makefile
+
+announce RSI_USB - "Redpine Signals USB bus support"
+reject_firmware drivers/net/wireless/rsi/rsi_91x_usb_ops.c
+clean_blob drivers/net/wireless/rsi/rsi_91x_usb.c
+clean_kconfig drivers/net/wireless/rsi/Kconfig RSI_USB
+clean_mk CONFIG_RSI_USB drivers/net/wireless/rsi/Makefile
+
+announce RT2X00_LIB_FIRMWARE - "Ralink driver firmware support"
+reject_firmware drivers/net/wireless/ralink/rt2x00/rt2x00firmware.c
+clean_kconfig drivers/net/wireless/ralink/rt2x00/Kconfig RT2X00_LIB_FIRMWARE
+clean_mk CONFIG_RT2X00_LIB_FIRMWARE drivers/net/wireless/ralink/rt2x00/Makefile
+
+announce RT61PCI - "Ralink rt2501/rt61 (PCI/PCMCIA) support"
+clean_blob drivers/net/wireless/ralink/rt2x00/rt61pci.h
+clean_blob drivers/net/wireless/ralink/rt2x00/rt61pci.c
+clean_kconfig drivers/net/wireless/ralink/rt2x00/Kconfig RT61PCI
+clean_mk CONFIG_RT61PCI drivers/net/wireless/ralink/rt2x00/Makefile
+
+announce RT73USB - "Ralink rt2501/rt73 (USB) support"
+clean_blob drivers/net/wireless/ralink/rt2x00/rt73usb.h
+clean_blob drivers/net/wireless/ralink/rt2x00/rt73usb.c
+clean_kconfig drivers/net/wireless/ralink/rt2x00/Kconfig RT73USB
+clean_mk CONFIG_RT73USB drivers/net/wireless/ralink/rt2x00/Makefile
+
+announce RT2800PCI - "Ralink rt2800 (PCI/PCMCIA) support"
+clean_blob drivers/net/wireless/ralink/rt2x00/rt2800pci.h
+clean_blob drivers/net/wireless/ralink/rt2x00/rt2800pci.c
+clean_kconfig drivers/net/wireless/ralink/rt2x00/Kconfig RT2800PCI
+clean_mk CONFIG_RT2800PCI drivers/net/wireless/ralink/rt2x00/Makefile
+
+announce RT2800USB - "Ralink rt2800 (USB) support"
+clean_blob drivers/net/wireless/ralink/rt2x00/rt2800usb.h
+clean_blob drivers/net/wireless/ralink/rt2x00/rt2800usb.c
+clean_kconfig drivers/net/wireless/ralink/rt2x00/Kconfig RT2800USB
+clean_mk CONFIG_RT2800USB drivers/net/wireless/ralink/rt2x00/Makefile
+
+announce RTL8XXXU - "RTL8723AU/RTL8188[CR]U/RTL819[12]CU (mac80211) support"
+reject_firmware drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
+clean_blob drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
+clean_kconfig drivers/net/wireless/realtek/rtl8xxxu/Kconfig RTL8XXXU
+clean_mk CONFIG_RTL8XXXU drivers/net/wireless/realtek/rtl8xxxu/Makefile
+
+announce RTLWIFI - "Realtek Wireless Network Adapters"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/core.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTLWIFI
+clean_mk CONFIG_RTLWIFI drivers/net/wireless/realtek/rtlwifi/Makefile
+
+announce RTL8188EE - "Realtek RTL8188EE Wireless Network Adapter"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8188EE
+clean_mk CONFIG_RTL8188EE drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile
+
+announce R8188EU - "Realtek RTL8188EU Wireless LAN NIC driver"
+reject_firmware drivers/staging/rtl8188eu/hal/fw.c
+clean_blob drivers/staging/rtl8188eu/hal/fw.c
+clean_blob drivers/staging/rtl8188eu/include/rtl8188e_hal.h
+clean_kconfig drivers/staging/rtl8188eu/Kconfig R8188EU
+clean_mk CONFIG_R8188EU drivers/staging/rtl8188eu/Makefile
+
+announce RTL8192CE - "Realtek RTL8192CE/RTL8188CE Wireless Network Adapter"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8192CE
+clean_mk CONFIG_RTL8192CE drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile
+
+announce RTL8192CU - "Realtek RTL8192CU/RTL8188CU USB Wireless Network Adapter"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8192CU
+clean_mk CONFIG_RTL8192CU drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile
+
+announce RTL8192DE - "Realtek RTL8192DE/RTL8188DE PCIe Wireless Network Adapter"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8192DE
+clean_mk CONFIG_RTL8192DE drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile
+
+announce RTL8192SE - "Realtek RTL8192SE/RTL8191SE PCIe Wireless Network Adapter"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8192se/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8192se/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8192SE
+clean_mk CONFIG_RTL8192SE drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile
+
+announce RTL8192E - "RealTek RTL8192E Wireless LAN NIC driver"
+reject_firmware drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.c
+clean_blob drivers/staging/rtl8192e/rtl8192e/r8192E_firmware.h
+clean_blob drivers/staging/rtl8192e/rtl8192e/rtl_core.c
+clean_kconfig drivers/staging/rtl8192e/rtl8192e/Kconfig RTL8192E
+clean_mk CONFIG_RTL8192E drivers/staging/rtl8192e/Makefile
+
+announce RTL8192EE - "RealTek RTL8192EE Wireless Network Adapter"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8192ee/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8192ee/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8192EE
+clean_mk CONFIG_RTL8192EE drivers/net/wireless/realtek/rtlwifi/Makefile
+
+announce RTL8192U - "RealTek RTL8192U Wireless LAN NIC driver"
+reject_firmware drivers/staging/rtl8192u/r819xU_firmware.c
+clean_blob drivers/staging/rtl8192u/r819xU_firmware.c
+clean_kconfig drivers/staging/rtl8192u/Kconfig RTL8192U
+clean_mk CONFIG_RTL8192U drivers/staging/rtl8192u/Makefile
+
+announce R8712U - "RealTek RTL8712U (RTL8192SU) Wireless LAN NIC driver"
+reject_firmware drivers/staging/rtl8712/hal_init.c
+clean_blob drivers/staging/rtl8712/hal_init.c
+clean_kconfig drivers/staging/rtl8712/Kconfig R8712U
+clean_mk CONFIG_R8712U drivers/staging/rtl8712/Makefile
+
+announce RTL8723AE - "Realtek RTL8723AE PCIe Wireless Network Adapter"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8723ae/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8723ae/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8723AE
+clean_mk CONFIG_RTL8723AE drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile
+
+announce R8723AU - "RealTek RTL8723AU Wireless LAN NIC driver"
+reject_firmware drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c
+clean_blob drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c
+clean_blob drivers/staging/rtl8723au/os_dep/os_intfs.c
+clean_kconfig drivers/staging/rtl8723au/Kconfig R8723AU
+clean_mk CONFIG_R8723AU drivers/staging/rtl8723au/Makefile
+
+announce RTL8723BE - "Realtek RTL8723BE PCIe Wireless Network Adapter"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8723BE
+clean_mk CONFIG_RTL8723BE drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile
+
+announce RTL8821AE - "Realtek RTL8821AE/RTL8812AE Wireless LAN NIC driver"
+reject_firmware drivers/net/wireless/realtek/rtlwifi/rtl8821ae/sw.c
+clean_blob drivers/net/wireless/realtek/rtlwifi/rtl8821ae/sw.c
+clean_kconfig drivers/net/wireless/realtek/rtlwifi/Kconfig RTL8821AE
+clean_mk CONFIG_RTL8821AE drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile
+
+announce VT6656 - "VIA Technologies VT6656 support"
+reject_firmware drivers/staging/vt6656/firmware.c
+clean_blob drivers/staging/vt6656/firmware.c
+clean_kconfig drivers/staging/vt6656/Kconfig VT6656
+clean_mk CONFIG_VT6656 drivers/staging/vt6656/Makefile
+
+announce WL1251 - "TI wl1251 support"
+reject_firmware drivers/net/wireless/ti/wl1251/main.c
+clean_blob drivers/net/wireless/ti/wl1251/main.c
+clean_blob drivers/net/wireless/ti/wl1251/wl1251.h
+clean_kconfig drivers/net/wireless/ti/wl1251/Kconfig WL1251
+clean_mk CONFIG_WL1251 drivers/net/wireless/ti/wl1251/Makefile
+
+announce WL12XX - "TI wl12xx support"
+clean_blob drivers/net/wireless/ti/wl12xx/main.c
+clean_kconfig drivers/net/wireless/ti/wl12xx/Kconfig WL12XX
+clean_mk CONFIG_WL12XX drivers/net/wireless/ti/wl12xx/Makefile
+
+announce WL18XX - "TI wl18xx support"
+reject_firmware drivers/net/wireless/ti/wl18xx/main.c
+clean_blob drivers/net/wireless/ti/wl18xx/main.c
+clean_kconfig drivers/net/wireless/ti/wl18xx/Kconfig WL18XX
+clean_mk CONFIG_WL18XX drivers/net/wireless/ti/wl18xx/Makefile
+
+announce WLCORE - "TI wlcore support"
+reject_firmware drivers/net/wireless/ti/wlcore/main.c
+clean_blob drivers/net/wireless/ti/wlcore/main.c
+clean_blob drivers/net/wireless/ti/wlcore/wlcore_i.h
+clean_kconfig drivers/net/wireless/ti/wlcore/Kconfig WLCORE
+clean_mk CONFIG_WLCORE drivers/net/wireless/ti/wlcore/Makefile
+
+announce USB_ZD1201 - "USB ZD1201 based Wireless device support"
+reject_firmware drivers/net/wireless/zydas/zd1201.c
+clean_blob drivers/net/wireless/zydas/zd1201.c
+clean_kconfig drivers/net/wireless/zydas/Kconfig USB_ZD1201
+clean_mk CONFIG_USB_ZD1201 drivers/net/wireless/zydas/Makefile
+
+announce WCN36XX - "Qualcomm Atheros WCN3660/3680 support"
+reject_firmware drivers/net/wireless/ath/wcn36xx/smd.c
+clean_blob drivers/net/wireless/ath/wcn36xx/wcn36xx.h
+clean_blob drivers/net/wireless/ath/wcn36xx/main.c
+clean_kconfig drivers/net/wireless/ath/wcn36xx/Kconfig WCN36XX
+clean_mk CONFIG_WCN36XX drivers/net/wireless/ath/wcn36xx/Makefile
+
+announce WILC1000 - "WILC1000 support (WiFi only)"
+reject_firmware drivers/staging/wilc1000/linux_wlan.c
+clean_blob drivers/staging/wilc1000/Makefile
+clean_sed 's,\\"/\*(DEBLOBBED)\*/\\","&",g' drivers/staging/wilc1000/Makefile \
+    "quote deblobbing markers"
+clean_kconfig drivers/staging/wilc1000/Kconfig WILC1000
+clean_mk CONFIG_WILC1000 drivers/staging/wilc1000/Makefile
+
+announce ZD1211RW - "ZyDAS ZD1211/ZD1211B USB-wireless support"
+reject_firmware drivers/net/wireless/zydas/zd1211rw/zd_usb.c
+clean_blob drivers/net/wireless/zydas/zd1211rw/zd_usb.c
+clean_kconfig drivers/net/wireless/zydas/zd1211rw/Kconfig ZD1211RW
+clean_mk CONFIG_ZD1211RW drivers/net/wireless/zydas/zd1211rw/Makefile
+
+# ieee802154
+
+announce IEEE802154_ADF7242 - "ADF7242 transceiver driver"
+reject_firmware drivers/net/ieee802154/adf7242.c
+clean_blob drivers/net/ieee802154/adf7242.c
+clean_kconfig drivers/net/ieee802154/Kconfig IEEE802154_ADF7242
+clean_mk CONFIG_IEEE802154_ADF7242 drivers/net/ieee802154/Makefile
+
+# bluetooth
+
+announce BT_ATH3K - "Atheros firmware download driver"
+reject_firmware drivers/bluetooth/ath3k.c
+clean_blob drivers/bluetooth/ath3k.c
+clean_kconfig drivers/bluetooth/Kconfig BT_ATH3K
+clean_mk CONFIG_BT_ATH3K drivers/bluetooth/Makefile
+
+announce BT_BCM - "Broadcom protocol support"
+reject_firmware drivers/bluetooth/btbcm.c
+clean_blob drivers/bluetooth/btbcm.c
+clean_kconfig drivers/bluetooth/Kconfig BT_BCM
+clean_mk CONFIG_BT_BCM drivers/bluetooth/Makefile
+
+announce BT_HCIBCM203X - "HCI BCM203x USB driver"
+reject_firmware drivers/bluetooth/bcm203x.c
+clean_blob drivers/bluetooth/bcm203x.c
+clean_kconfig drivers/bluetooth/Kconfig BT_HCIBCM203X
+clean_mk CONFIG_BT_HCIBCM203X drivers/bluetooth/Makefile
+
+announce BT_HCIUART_BCM - "Broadcom protocol support"
+reject_firmware drivers/bluetooth/hci_bcm.c
+clean_kconfig drivers/bluetooth/Kconfig BT_HCIUART_BCM
+clean_mk CONFIG_BT_HCIUART_BCM drivers/bluetooth/Makefile
+
+announce BT_HCIBFUSB - "HCI BlueFRITZ! USB driver"
+reject_firmware drivers/bluetooth/bfusb.c
+clean_blob drivers/bluetooth/bfusb.c
+clean_kconfig drivers/bluetooth/Kconfig BT_HCIBFUSB
+clean_mk CONFIG_BT_HCIBFUSB drivers/bluetooth/Makefile
+
+announce BT_HCIBT3C - "HCI BT3C (PC Card) driver"
+reject_firmware drivers/bluetooth/bt3c_cs.c
+clean_blob drivers/bluetooth/bt3c_cs.c
+clean_kconfig drivers/bluetooth/Kconfig BT_HCIBT3C
+clean_mk CONFIG_BT_HCIBT3C drivers/bluetooth/Makefile
+
+announce BT_HCIBTUSB - "HCI USB driver"
+reject_firmware drivers/bluetooth/btusb.c
+clean_blob drivers/bluetooth/btusb.c
+clean_kconfig drivers/bluetooth/Kconfig BT_HCIBTUSB
+clean_mk CONFIG_BT_HCIBTUSB drivers/bluetooth/Makefile
+
+announce BT_INTEL - "Bluetooth support for Intel devices"
+reject_firmware drivers/bluetooth/btintel.c
+clean_blob drivers/bluetooth/btintel.c
+clean_kconfig drivers/bluetooth/Kconfig BT_INTEL
+clean_mk CONFIG_BT_INTEL drivers/bluetooth/Makefile
+
+announce BT_HCIUART_INTEL - "Intel protocol support"
+reject_firmware drivers/bluetooth/hci_intel.c
+clean_blob drivers/bluetooth/hci_intel.c
+clean_kconfig drivers/bluetooth/Kconfig BT_HCIUART_INTEL
+clean_mk CONFIG_BT_HCIUART_INTEL drivers/bluetooth/Makefile
+
+announce BT_MRVL_SDIO - "Marvell BT-over-SDIO driver"
+reject_firmware drivers/bluetooth/btmrvl_sdio.c
+clean_blob drivers/bluetooth/btmrvl_sdio.c
+clean_blob Documentation/btmrvl.txt
+clean_kconfig drivers/bluetooth/Kconfig BT_MRVL_SDIO
+clean_mk CONFIG_BT_MRVL_SDIO drivers/bluetooth/Makefile
+
+announce BT_QCA - "Bluetooh support for Qualcomm/Atheros devices"
+reject_firmware drivers/bluetooth/btqca.c
+clean_blob drivers/bluetooth/btqca.c
+clean_kconfig drivers/bluetooth/Kconfig BT_QCA
+clean_mk CONFIG_BT_QCA drivers/bluetooth/Makefile
+
+announce BT_RTL - "Bluetooth support for Realtek devices"
+reject_firmware drivers/bluetooth/btrtl.c
+clean_blob drivers/bluetooth/btrtl.c
+clean_kconfig drivers/bluetooth/Kconfig BT_RTL
+clean_mk CONFIG_BT_RTL drivers/bluetooth/Makefile
+
+announce TI_ST - "Texas Instruments shared transport line discipline"
+reject_firmware drivers/misc/ti-st/st_kim.c
+clean_blob drivers/misc/ti-st/st_kim.c
+clean_kconfig drivers/misc/ti-st/Kconfig TI_ST
+clean_mk CONFIG_TI_ST drivers/misc/ti-st/Makefile
+
+# wimax
+
+announce WIMAX_I2400M - "Intel Wireless WiMAX Connection 2400"
+reject_firmware drivers/net/wimax/i2400m/fw.c
+clean_blob drivers/net/wimax/i2400m/usb.c
+clean_blob Documentation/wimax/README.i2400m
+clean_kconfig drivers/net/wimax/i2400m/Kconfig WIMAX_I2400M
+clean_mk CONFIG_WIMAX_I2400M drivers/net/wimax/i2400m/Makefile
+
+announce WIMAX_GDM72XX_SDIO - "GCT GDM72xx WiMAX support: SDIO interface"
+reject_firmware drivers/staging/gdm72xx/sdio_boot.c
+clean_blob drivers/staging/gdm72xx/sdio_boot.c
+clean_kconfig drivers/staging/gdm72xx/Kconfig WIMAX_GDM72XX_SDIO
+clean_mk CONFIG_WIMAX_GDM72XX_SDIO drivers/staging/gdm72xx/Makefile
+
+announce WIMAX_GDM72XX_USB - "GCT GDM72xx WiMAX support: USB interface"
+reject_firmware drivers/staging/gdm72xx/usb_boot.c
+clean_blob drivers/staging/gdm72xx/usb_boot.c
+clean_kconfig drivers/staging/gdm72xx/Kconfig WIMAX_GDM72XX_USB
+clean_mk CONFIG_WIMAX_GDM72XX_USB drivers/staging/gdm72xx/Makefile
+
+# infiniband
+
+announce INFINIBAND_HFI1 - "Intel OPA Gen1 support"
+reject_firmware drivers/staging/rdma/hfi1/firmware.c
+clean_blob drivers/staging/rdma/hfi1/firmware.c
+clean_kconfig drivers/staging/rdma/hfi1/Kconfig INFINIBAND_HFI1
+clean_mk CONFIG_INFINIBAND_HFI1 drivers/staging/rdma/hfi1/Makefile
+
+announce INFINIBAND_QIB - "QLogic PCIe HCA support"
+drop_fw_file firmware/qlogic/sd7220.fw.ihex firmware/qlogic/sd7220.fw
+reject_firmware drivers/infiniband/hw/qib/qib_sd7220.c
+clean_blob drivers/infiniband/hw/qib/qib_sd7220.c
+clean_kconfig drivers/infiniband/hw/qib/Kconfig INFINIBAND_QIB
+clean_mk CONFIG_INFINIBAND_QIB drivers/infiniband/hw/qib/Makefile
+
+# CAN
+
+announce CAN_SOFTING - "Softing Gmbh CAN generic support"
+reject_firmware drivers/net/can/softing/softing_fw.c
+clean_kconfig drivers/net/can/softing/Kconfig CAN_SOFTING
+clean_mk CONFIG_CAN_SOFTING drivers/net/can/softing/Makefile
+
+announce CAN_SOFTING_CS - "Softing Gmbh CAN pcmcia cards"
+clean_blob drivers/net/can/softing/softing_cs.c
+clean_blob drivers/net/can/softing/softing_platform.h
+clean_sed '
+/^config CAN_SOFTING_CS$/,${
+  /You need firmware/i\
+	  /*(DEBLOBBED)*/
+  /You need firmware/,/softing-fw.*tar\.gz/d
+}' drivers/net/can/softing/Kconfig 'removed firmware notes'
+clean_kconfig drivers/net/can/softing/Kconfig CAN_SOFTING_CS
+clean_mk CONFIG_CAN_SOFTING_CS drivers/net/can/softing/Makefile
+
+########
+# ISDN #
+########
+
+announce ISDN_DIVAS - "Support Eicon DIVA Server cards"
+clean_blob drivers/isdn/hardware/eicon/cardtype.h
+clean_blob drivers/isdn/hardware/eicon/dsp_defs.h
+clean_kconfig drivers/isdn/hardware/eicon/Kconfig ISDN_DIVAS
+clean_mk CONFIG_ISDN_DIVAS drivers/isdn/hardware/eicon/Makefile
+
+announce MISDN_SPEEDFAX - "Support for Sedlbauer Speedfax+"
+reject_firmware drivers/isdn/hardware/mISDN/speedfax.c
+clean_blob drivers/isdn/hardware/mISDN/speedfax.c
+clean_kconfig drivers/isdn/hardware/mISDN/Kconfig MISDN_SPEEDFAX
+clean_mk CONFIG_MISDN_SPEEDFAX drivers/isdn/hardware/mISDN/Makefile
+
+##########
+# Serial #
+##########
+
+announce DGAP - "Digi EPCA PCI products"
+reject_firmware drivers/staging/dgap/dgap.c
+clean_blob drivers/staging/dgap/dgap.c
+clean_kconfig drivers/staging/dgap/Kconfig DGAP
+clean_mk CONFIG_DGAP drivers/staging/dgap/Makefile
+
+announce SERIAL_8250_CS - "8250/16550 PCMCIA device support"
+# These are not software; they're Free, but GPLed without in-tree sources.
+drop_fw_file firmware/cis/MT5634ZLX.cis.ihex firmware/cis/MT5634ZLX.cis
+drop_fw_file firmware/cis/RS-COM-2P.cis.ihex firmware/cis/RS-COM-2P.cis
+drop_fw_file firmware/cis/COMpad2.cis.ihex firmware/cis/COMpad2.cis
+drop_fw_file firmware/cis/COMpad4.cis.ihex firmware/cis/COMpad4.cis
+# These are not software; they're Free, but GPLed without textual sources.
+# It could be assumed that these binaries *are* sources, since they
+# can be trivially converted back to a textual form, without loss,
+# but we're better off safe than sorry, so remove them from our tree.
+drop_fw_file firmware/cis/SW_555_SER.cis.ihex firmware/cis/SW_555_SER.cis
+drop_fw_file firmware/cis/SW_7xx_SER.cis.ihex firmware/cis/SW_7xx_SER.cis
+drop_fw_file firmware/cis/SW_8xx_SER.cis.ihex firmware/cis/SW_8xx_SER.cis
+# clean_blob drivers/tty/serial/serial_cs.c
+# clean_kconfig drivers/tty/serial/Kconfig 'SERIAL_8250_CS'
+# clean_mk CONFIG_SERIAL_8250_CS drivers/tty/serial/Makefile
+
+announce SERIAL_ICOM - "IBM Multiport Serial Adapter"
+reject_firmware drivers/tty/serial/icom.c
+clean_blob drivers/tty/serial/icom.c
+clean_kconfig drivers/tty/serial/Kconfig SERIAL_ICOM
+clean_mk CONFIG_SERIAL_ICOM drivers/tty/serial/Makefile
+
+announce SERIAL_QE - "Freescale QUICC Engine serial port support"
+reject_firmware drivers/tty/serial/ucc_uart.c
+clean_blob drivers/tty/serial/ucc_uart.c
+clean_kconfig drivers/tty/serial/Kconfig SERIAL_QE
+clean_mk CONFIG_SERIAL_QE drivers/tty/serial/Makefile
+
+announce SERIAL_RP2 - "Comtrol RocketPort EXPRESS/INFINITY support"
+reject_firmware drivers/tty/serial/rp2.c
+clean_blob drivers/tty/serial/rp2.c
+clean_kconfig drivers/tty/serial/Kconfig SERIAL_RP2
+clean_mk CONFIG_SERIAL_RP2 drivers/tty/serial/Makefile
+
+########
+# Leds #
+########
+
+announce LEDS_LP55XX_COMMON - "Common Driver for TI/National LP5521 and LP5523/55231"
+reject_firmware drivers/leds/leds-lp55xx-common.c
+clean_kconfig drivers/leds/Kconfig LEDS_LP55XX_COMMON
+clean_mk CONFIG_LEDS_LP55XX_COMMON drivers/leds/Makefile
+
+announce LEDS_LP5521 - "LED Support for N.S. LP5521 LED driver chip"
+# The blob name is the chip name; no point in deblobbing that.
+# clean_blob drivers/leds/leds-lp5521.c
+clean_kconfig drivers/leds/Kconfig LEDS_LP5521
+clean_mk CONFIG_LEDS_LP5521 drivers/leds/Makefile
+
+announce LEDS_LP5523 - "LED Support for TI/National LP5523/55231 LED driver chip"
+# The blob name is the chip name; no point in deblobbing that.
+# clean_blob drivers/leds/leds-lp5523.c
+clean_kconfig drivers/leds/Kconfig LEDS_LP5523
+clean_mk CONFIG_LEDS_LP5523 drivers/leds/Makefile
+
+#########
+# input #
+#########
+
+# This only requests files named by the user through a /sys interface.
+# There is no default firmware name, but there is a #define that
+# presumably was supposed to be one at some point.  This is fine, but
+# let's deblob the default name just in case.
+announce MOUSE_CYAPA - "Cypress APA I2C Trackpad support"
+clean_blob drivers/input/mouse/cyapa.c
+# clean_kconfig drivers/input/mouse/Kconfig MOUSE_CYAPA
+# clean_mk CONFIG_MOUSE_CYAPA drivers/input/mouse/Makefile
+
+announce MOUSE_ELAN_I2C - "ELAN I2C Touchpad support"
+reject_firmware drivers/input/mouse/elan_i2c_core.c
+clean_blob drivers/input/mouse/elan_i2c.h
+clean_kconfig drivers/input/mouse/Kconfig MOUSE_ELAN_I2C
+clean_mk CONFIG_MOUSE_ELAN_I2C drivers/input/mouse/Makefile
+
+announce TOUCHSCREEN_ELAN
+reject_firmware drivers/input/touchscreen/elants_i2c.c
+clean_blob drivers/input/touchscreen/elants_i2c.c
+clean_kconfig drivers/input/touchscreen/Kconfig TOUCHSCREEN_ELAN
+clean_mk CONFIG_TOUCHSCREEN_ELAN drivers/input/touchscreen/Makefile
+
+announce TOUCHSCREEN_ATMEL_MXT - "Atmel mXT I2C Touchscreen"
+reject_firmware drivers/input/touchscreen/atmel_mxt_ts.c
+clean_blob drivers/input/touchscreen/atmel_mxt_ts.c
+clean_kconfig drivers/input/touchscreen/Kconfig TOUCHSCREEN_ATMEL_MXT
+clean_mk CONFIG_TOUCHSCREEN_ATMEL_MXT drivers/input/touchscreen/Makefile
+
+announce TOUCHSCREEN_GOODIX - "Goodix I2C touchscreen"
+reject_firmware drivers/input/touchscreen/goodix.c
+clean_blob drivers/input/touchscreen/goodix.c
+clean_kconfig drivers/input/touchscreen/Kconfig TOUCHSCREEN_GOODIX
+clean_mk CONFIG_TOUCHSCREEN_GOODIX drivers/input/touchscreen/Makefile
+
+announce TOUCHSCREEN_ROHM_BU21023 - "ROHM BU21023/24 Dual touch support resistive touchscreens"
+reject_firmware drivers/input/touchscreen/rohm_bu21023.c
+clean_blob drivers/input/touchscreen/rohm_bu21023.c
+clean_kconfig drivers/input/touchscreen/Kconfig TOUCHSCREEN_ROHM_BU21023
+clean_mk CONFIG_TOUCHSCREEN_ROHM_BU21023 drivers/input/touchscreen/Makefile
+
+announce TOUCHSCREEN_WDT87XX_I2C - "Weida HiTech I2C touchscreen"
+reject_firmware drivers/input/touchscreen/wdt87xx_i2c.c
+clean_blob drivers/input/touchscreen/wdt87xx_i2c.c
+clean_kconfig drivers/input/touchscreen/Kconfig TOUCHSCREEN_WDT87XX_I2C
+clean_mk CONFIG_TOUCHSCREEN_WDT87XX_I2C drivers/input/touchscreen/Makefile
+
+announce LIRC_ZILOG - "Zilog/Hauppauge IR Transmitter"
+reject_firmware drivers/staging/media/lirc/lirc_zilog.c
+clean_blob drivers/staging/media/lirc/lirc_zilog.c
+clean_kconfig drivers/staging/media/lirc/Kconfig LIRC_ZILOG
+clean_mk CONFIG_LIRC_ZILOG drivers/staging/media/lirc/Makefile
+
+announce INPUT_IMS_PCU - "IMS Passenger Control Unit driver"
+reject_firmware drivers/input/misc/ims-pcu.c
+clean_blob drivers/input/misc/ims-pcu.c
+clean_kconfig drivers/input/misc/Kconfig INPUT_IMS_PCU
+clean_mk CONFIG_INPUT_IMS_PCU drivers/input/misc/Makefile
+
+####################
+# Data acquisition #
+####################
+
+announce COMEDI - "Data acquisition support (comedi)"
+maybe_reject_firmware drivers/staging/comedi/drivers.c
+clean_kconfig drivers/staging/comedi/Kconfig COMEDI
+clean_mk CONFIG_COMEDI drivers/staging/comedi/Makefile
+
+announce COMEDI_DAQBOARD2000 - "IOtech DAQboard/2000 support"
+clean_blob drivers/staging/comedi/drivers/daqboard2000.c
+clean_kconfig drivers/staging/comedi/Kconfig COMEDI_DAQBOARD2000
+clean_mk CONFIG_COMEDI_DAQBOARD2000 drivers/staging/comedi/drivers/Makefile
+
+announce COMEDI_JR3_PCI - "JR3/PCI force sensor board support"
+clean_blob drivers/staging/comedi/drivers/jr3_pci.c
+clean_kconfig drivers/staging/comedi/Kconfig COMEDI_JR3_PCI
+clean_mk CONFIG_COMEDI_JR3_PCI drivers/staging/comedi/drivers/Makefile
+
+announce COMEDI_ME_DAQ - "Meilhaus ME-2000i, ME-2600i, ME-3000vm1 support"
+clean_blob drivers/staging/comedi/drivers/me_daq.c
+clean_kconfig drivers/staging/comedi/Kconfig COMEDI_ME_DAQ
+clean_mk CONFIG_COMEDI_ME_DAQ drivers/staging/comedi/drivers/Makefile
+
+announce COMEDI_ME4000 - "Meilhaus ME-4000 support"
+clean_blob drivers/staging/comedi/drivers/me4000.c
+clean_kconfig drivers/staging/comedi/Kconfig COMEDI_ME4000
+clean_mk CONFIG_COMEDI_ME4000 drivers/staging/comedi/drivers/Makefile
+
+announce COMEDI_NI_PCIDIO - "NI PCI-DIO32HS, PCI-6533, PCI-6534 support"
+clean_blob drivers/staging/comedi/drivers/ni_pcidio.c
+clean_kconfig drivers/staging/comedi/Kconfig COMEDI_NI_PCIDIO
+clean_mk CONFIG_COMEDI_NI_PCIDIO drivers/staging/comedi/drivers/Makefile
+
+# There are blob names, but no apparent request or filesystem load
+# mechanism.  Why are the blob names there, then?
+announce IIO_SSP_SENSORHUB - "Samsung Sensorhub driver"
+clean_blob drivers/iio/common/ssp_sensors/ssp_dev.c
+# clean_kconfig drivers/iio/common/ssp_sensors/Kconfig IIO_SSP_SENSORHUB
+# clean_mk CONFIG_IIO_SSP_SENSORHUB drivers/iio/common/ssp_sensors/Makefile
+
+
+#######
+# MMC #
+#######
+
+announce MMC_VUB300 - "VUB300 USB to SDIO/SD/MMC Host Controller support"
+clean_sed '
+/^config MMC_VUB300/,/^config /{
+  /Some SDIO cards/i\
+	  /*(DEBLOBBED)*/
+  /Some SDIO cards/,/obtainable data rate\.$/d
+}
+' drivers/mmc/host/Kconfig "removed firmware notes"
+reject_firmware drivers/mmc/host/vub300.c
+clean_blob drivers/mmc/host/vub300.c
+clean_kconfig drivers/mmc/host/Kconfig MMC_VUB300
+clean_mk CONFIG_MMC_VUB300 drivers/mmc/host/Makefile
+
+########
+# SCSI #
+########
+
+announce SCSI_QLOGICPTI - "PTI Qlogic, ISP Driver"
+drop_fw_file firmware/qlogic/isp1000.bin.ihex firmware/qlogic/isp1000.bin
+reject_firmware drivers/scsi/qlogicpti.c
+clean_blob drivers/scsi/qlogicpti.c
+clean_kconfig drivers/scsi/Kconfig SCSI_QLOGICPTI
+clean_mk CONFIG_SCSI_QLOGICPTI drivers/scsi/Makefile
+
+announce SCSI_ADVANSYS - "AdvanSys SCSI"
+drop_fw_file firmware/advansys/mcode.bin.ihex firmware/advansys/mcode.bin
+drop_fw_file firmware/advansys/3550.bin.ihex firmware/advansys/3550.bin
+drop_fw_file firmware/advansys/38C0800.bin.ihex firmware/advansys/38C0800.bin
+drop_fw_file firmware/advansys/38C1600.bin.ihex firmware/advansys/38C1600.bin
+reject_firmware drivers/scsi/advansys.c
+clean_blob drivers/scsi/advansys.c
+clean_kconfig drivers/scsi/Kconfig SCSI_ADVANSYS
+clean_mk CONFIG_SCSI_ADVANSYS drivers/scsi/Makefile
+
+announce SCSI_QLOGIC_1280 - "Qlogic QLA 1240/1x80/1x160 SCSI"
+drop_fw_file firmware/qlogic/1040.bin.ihex firmware/qlogic/1040.bin
+drop_fw_file firmware/qlogic/1280.bin.ihex firmware/qlogic/1280.bin
+drop_fw_file firmware/qlogic/12160.bin.ihex firmware/qlogic/12160.bin
+reject_firmware drivers/scsi/qla1280.c
+clean_blob drivers/scsi/qla1280.c
+clean_kconfig drivers/scsi/Kconfig SCSI_QLOGIC_1280
+clean_mk CONFIG_SCSI_QLOGIC_1280 drivers/scsi/Makefile
+
+announce SCSI_AIC94XX - "Adaptec AIC94xx SAS/SATA support"
+reject_firmware drivers/scsi/aic94xx/aic94xx_seq.c
+clean_blob drivers/scsi/aic94xx/aic94xx_seq.c
+clean_blob drivers/scsi/aic94xx/aic94xx_seq.h
+clean_kconfig drivers/scsi/aic94xx/Kconfig SCSI_AIC94XX
+clean_mk CONFIG_SCSI_AIC94XX drivers/scsi/aic94xx/Makefile
+
+announce SCSI_BFA_FC - "Brocade BFA Fibre Channel Support"
+reject_firmware drivers/scsi/bfa/bfad.c
+clean_blob drivers/scsi/bfa/bfad.c
+clean_kconfig drivers/scsi/Kconfig SCSI_BFA_FC
+clean_mk CONFIG_SCSI_BFA_FC drivers/scsi/bfa/Makefile
+
+announce SCSI_CHELSIO_FCOE - "Chelsio Communications FCoE support"
+reject_firmware drivers/scsi/csiostor/csio_hw.c
+clean_blob drivers/scsi/csiostor/csio_hw_chip.h
+clean_blob drivers/scsi/csiostor/csio_init.c
+clean_kconfig drivers/scsi/csiostor/Kconfig SCSI_CHELSIO_FCOE
+clean_mk CONFIG_SCSI_CHELSIO_FCOE drivers/scsi/csiostor/Makefile
+
+announce SCSI_LPFC - "Emulex LightPulse Fibre Channel Support"
+# The firmware name is built out of Vital Product Data read from the
+# adapter.  The firmware is definitely code, and I couldn't find
+# evidence it is Free, so I'm disabling it.  It's not clear whether
+# this is the hardware or the software inducing to the installation of
+# non-Free firmware.
+reject_firmware drivers/scsi/lpfc/lpfc_init.c
+clean_kconfig drivers/scsi/Kconfig SCSI_LPFC
+clean_mk CONFIG_SCSI_LPFC drivers/scsi/lpfc/Makefile
+
+announce SCSI_QLA_FC - "QLogic QLA2XXX Fibre Channel Support"
+reject_firmware drivers/scsi/qla2xxx/qla_os.c
+clean_sed '
+/^config SCSI_QLA_FC$/,/^config /{
+  /^	By default, firmware/i\
+	/*(DEBLOBBED)*/
+  /^	By default, firmware/,/linux-firmware tree/d
+}' drivers/scsi/qla2xxx/Kconfig 'removed firmware notes'
+clean_blob drivers/scsi/qla2xxx/qla_os.c
+clean_kconfig drivers/scsi/qla2xxx/Kconfig SCSI_QLA_FC
+clean_mk CONFIG_SCSI_QLA_FC drivers/scsi/qla2xxx/Makefile
+
+announce SCSI_WD719x - "Western Digital WD7193/7197/7296 support"
+reject_firmware drivers/scsi/wd719x.c
+clean_blob drivers/scsi/wd719x.c
+clean_blob Documentation/scsi/wd719x.txt
+clean_kconfig drivers/scsi/Kconfig SCSI_WD719X
+clean_mk CONFIG_SCSI_WD719X drivers/scsi/Makefile
+
+
+#######
+# USB #
+#######
+
+# atm
+
+announce USB_CXACRU - "Conexant AccessRunner USB support"
+reject_firmware drivers/usb/atm/cxacru.c
+clean_blob drivers/usb/atm/cxacru.c
+clean_kconfig drivers/usb/atm/Kconfig USB_CXACRU
+clean_mk CONFIG_USB_CXACRU drivers/usb/atm/Makefile
+
+announce USB_SPEEDTOUCH - "Speedtouch USB support"
+reject_firmware drivers/usb/atm/speedtch.c
+clean_blob drivers/usb/atm/speedtch.c
+clean_kconfig drivers/usb/atm/Kconfig USB_SPEEDTOUCH
+clean_mk CONFIG_USB_SPEEDTOUCH drivers/usb/atm/Makefile
+
+announce USB_UEAGLEATM - "ADI 930 and eagle USB DSL modem"
+reject_firmware drivers/usb/atm/ueagle-atm.c
+clean_blob drivers/usb/atm/ueagle-atm.c
+clean_kconfig drivers/usb/atm/Kconfig USB_UEAGLEATM
+clean_mk CONFIG_USB_UEAGLEATM drivers/usb/atm/Makefile
+
+# host
+
+announce USB_XHCI_RCAR - "xHCI support for Renesas R-Car SoCs"
+reject_firmware drivers/usb/host/xhci-rcar.c
+clean_blob drivers/usb/host/xhci-rcar.c
+clean_blob drivers/usb/host/xhci-rcar.h
+clean_kconfig drivers/usb/host/Kconfig USB_XHCI_RCAR
+clean_mk CONFIG_USB_XHCI_RCAR drivers/usb/host/Makefile
+
+# misc
+
+announce USB_EMI26 - "EMI 2|6 USB Audio interface"
+# These files are not under the GPL, better remove them all.
+drop_fw_file firmware/emi26/bitstream.HEX firmware/emi26/bitstream.fw
+drop_fw_file firmware/emi26/firmware.HEX firmware/emi26/firmware.fw
+drop_fw_file firmware/emi26/loader.HEX firmware/emi26/loader.fw
+reject_firmware drivers/usb/misc/emi26.c
+clean_blob drivers/usb/misc/emi26.c
+clean_kconfig drivers/usb/misc/Kconfig USB_EMI26
+clean_mk CONFIG_USB_EMI26 drivers/usb/misc/Makefile
+
+announce USB_EMI62 - "EMI 6|2m USB Audio interface"
+# These files are probably not under the GPL, better remove them all.
+drop_fw_file firmware/emi62/bitstream.HEX firmware/emi62/bitstream.fw
+drop_fw_file firmware/emi62/loader.HEX firmware/emi62/loader.fw
+drop_fw_file firmware/emi62/midi.HEX firmware/emi62/midi.fw
+drop_fw_file firmware/emi62/spdif.HEX firmware/emi62/spdif.fw
+reject_firmware drivers/usb/misc/emi62.c
+clean_blob drivers/usb/misc/emi62.c
+clean_kconfig drivers/usb/misc/Kconfig USB_EMI62
+clean_mk CONFIG_USB_EMI62 drivers/usb/misc/Makefile
+
+announce USB_EZUSB_FX2 - "Functions for loading firmware on EZUSB chips"
+maybe_reject_firmware drivers/usb/misc/ezusb.c
+
+announce USB_ISIGHTFW - "iSight firmware loading support"
+reject_firmware drivers/usb/misc/isight_firmware.c
+clean_blob drivers/usb/misc/isight_firmware.c
+clean_kconfig drivers/usb/misc/Kconfig USB_ISIGHTFW
+clean_mk CONFIG_USB_ISIGHTFW drivers/usb/misc/Makefile
+
+# storage
+
+announce USB_STORAGE_ENE_UB6250 - "USB ENE card reader support"
+reject_firmware drivers/usb/storage/ene_ub6250.c
+clean_blob drivers/usb/storage/ene_ub6250.c
+clean_kconfig drivers/usb/storage/Kconfig USB_STORAGE_ENE_UB6250
+clean_mk CONFIG_USB_STORAGE_ENE_UB6250 drivers/usb/storage/Makefile
+
+# serial
+
+announce USB_SERIAL_KEYSPAN - "USB Keyspan USA-xxx Serial Driver"
+drop_fw_file firmware/keyspan/mpr.HEX firmware/keyspan/mpr.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_MPR
+drop_fw_file firmware/keyspan/usa18x.HEX firmware/keyspan/usa18x.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA18X
+drop_fw_file firmware/keyspan/usa19.HEX firmware/keyspan/usa19.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA19
+drop_fw_file firmware/keyspan/usa19qi.HEX firmware/keyspan/usa19qi.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA19QI
+drop_fw_file firmware/keyspan/usa19qw.HEX firmware/keyspan/usa19qw.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA19QW
+drop_fw_file firmware/keyspan/usa19w.HEX firmware/keyspan/usa19w.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA19W
+drop_fw_file firmware/keyspan/usa28.HEX firmware/keyspan/usa28.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA28
+drop_fw_file firmware/keyspan/usa28xa.HEX firmware/keyspan/usa28xa.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA28XA
+drop_fw_file firmware/keyspan/usa28xb.HEX firmware/keyspan/usa28xb.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA28XB
+drop_fw_file firmware/keyspan/usa28x.HEX firmware/keyspan/usa28x.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA28X
+drop_fw_file firmware/keyspan/usa49w.HEX firmware/keyspan/usa49w.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA49W
+drop_fw_file firmware/keyspan/usa49wlc.HEX firmware/keyspan/usa49wlc.fw
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN_USA49WLC
+clean_blob drivers/usb/serial/keyspan.c
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_KEYSPAN
+clean_mk CONFIG_USB_SERIAL_KEYSPAN drivers/usb/serial/Makefile
+
+announce USB_SERIAL_EDGEPORT - "USB Inside Out Edgeport Serial Driver"
+clean_fw firmware/edgeport/boot.H16 firmware/edgeport/boot.fw
+clean_fw firmware/edgeport/boot2.H16 firmware/edgeport/boot2.fw
+clean_fw firmware/edgeport/down.H16 firmware/edgeport/down.fw
+clean_fw firmware/edgeport/down2.H16 firmware/edgeport/down2.fw
+reject_firmware drivers/usb/serial/io_edgeport.c
+clean_blob drivers/usb/serial/io_edgeport.c
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_EDGEPORT
+clean_mk CONFIG_USB_SERIAL_EDGEPORT drivers/usb/serial/Makefile
+
+announce USB_SERIAL_EDGEPORT_TI - "USB Inside Out Edgeport Serial Driver (TI devices)"
+clean_fw firmware/edgeport/down3.bin.ihex firmware/edgeport/down3.bin
+reject_firmware drivers/usb/serial/io_ti.c
+clean_sed 's,firmware "down3\.bin",firmware "(DEBLOBBED)",
+' drivers/usb/serial/io_ti.c 'deblobbed comment'
+clean_blob drivers/usb/serial/io_ti.c
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_EDGEPORT_TI
+clean_mk CONFIG_USB_SERIAL_EDGEPORT_TI drivers/usb/serial/Makefile
+
+announce USB_SERIAL_MXUPORT - "USB Moxa UPORT Serial Driver"
+reject_firmware drivers/usb/serial/mxuport.c
+clean_blob drivers/usb/serial/mxuport.c
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_MXUPORT
+clean_mk CONFIG_USB_SERIAL_MXUPORT drivers/usb/serial/Makefile
+
+# This was removed in 4.5-rc7, but it will likely be back in some
+# future release, so let's keep the code commented out here.
+# announce USB_SERIAL_MXUPORT11 - "USB Moxa UPORT 11x0 Serial Driver"
+# reject_firmware drivers/usb/serial/mxu11x0.c
+# clean_blob drivers/usb/serial/mxu11x0.c
+# clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_MXUPORT11
+# clean_mk CONFIG_USB_SERIAL_MXUPORT11 drivers/usb/serial/Makefile
+
+announce USB_SERIAL_TI - "USB TI 3410/5052 Serial Driver"
+drop_fw_file firmware/ti_3410.fw.ihex firmware/ti_3410.fw
+drop_fw_file firmware/ti_5052.fw.ihex firmware/ti_5052.fw
+drop_fw_file firmware/mts_cdma.fw.ihex firmware/mts_cdma.fw
+drop_fw_file firmware/mts_gsm.fw.ihex firmware/mts_gsm.fw
+drop_fw_file firmware/mts_edge.fw.ihex firmware/mts_edge.fw
+reject_firmware drivers/usb/serial/ti_usb_3410_5052.c
+clean_blob drivers/usb/serial/ti_usb_3410_5052.c
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_TI
+clean_mk CONFIG_USB_SERIAL_TI drivers/usb/serial/Makefile
+
+announce USB_SERIAL_WHITEHEAT - "USB ConnectTech WhiteHEAT Serial Driver"
+clean_fw firmware/whiteheat.HEX firmware/whiteheat.fw
+clean_fw firmware/whiteheat_loader.HEX firmware/whiteheat_loader.fw
+clean_fw firmware/whiteheat_loader_debug.HEX firmware/whiteheat_loader_debug.fw
+clean_blob drivers/usb/serial/whiteheat.c
+clean_kconfig drivers/usb/serial/Kconfig USB_SERIAL_WHITEHEAT
+clean_mk CONFIG_USB_SERIAL_WHITEHEAT drivers/usb/serial/Makefile
+
+# uwb
+
+announce UWB_I1480U - Support for Intel Wireless UWB Link 1480 HWA
+reject_firmware drivers/uwb/i1480/dfu/i1480-dfu.h
+reject_firmware drivers/uwb/i1480/dfu/mac.c
+reject_firmware drivers/uwb/i1480/dfu/phy.c
+clean_blob drivers/uwb/i1480/dfu/usb.c
+clean_kconfig drivers/uwb/Kconfig UWB_I1480U
+clean_mk CONFIG_UWB_I1480U drivers/uwb/i1480/dfu/Makefile
+
+
+
+################
+# Programmable #
+################
+
+announce LATTICE_ECP3_CONFIG - "Lattice ECP3 FPGA bitstrap configuration via SPI"
+reject_firmware drivers/misc/lattice-ecp3-config.c
+clean_blob drivers/misc/lattice-ecp3-config.c
+clean_kconfig drivers/misc/Kconfig LATTICE_ECP3_CONFIG
+clean_mk CONFIG_LATTICE_ECP3_CONFIG drivers/misc/Makefile
+
+announce STE_MODEM_RPROC - "STE-Modem remoteproc support"
+maybe_reject_firmware drivers/remoteproc/remoteproc_core.c
+undefine_macro SPROC_MODEM_FIRMWARE "\"/*(DEBLOBBED)*/\"" \
+  "disabled non-Free firmware" drivers/remoteproc/ste_modem_rproc.c
+clean_blob Documentation/devicetree/bindings/remoteproc/wkup_m3_rproc.txt
+clean_blob arch/arm/boot/dts/am33xx.dtsi
+clean_blob arch/arm/boot/dts/am4372.dtsi
+clean_kconfig drivers/remoteproc/Kconfig STE_MODEM_RPROC
+clean_mk CONFIG_STE_MODEM_RPROC drivers/remoteproc/Makefile
+
+
+#########
+# Sound #
+#########
+
+announce SND_ASIHPI - "AudioScience ASIxxxx"
+reject_firmware sound/pci/asihpi/hpidspcd.c
+clean_blob sound/pci/asihpi/hpidspcd.c
+clean_blob sound/pci/asihpi/hpioctl.c
+clean_kconfig sound/pci/Kconfig SND_ASIHPI
+clean_mk CONFIG_SND_ASIHPI sound/pci/asihpi/Makefile
+
+announce SND_CS46XX - "Cirrus Logic (Sound Fusion) CS4280/CS461x/CS462x/CS463x"
+reject_firmware sound/pci/cs46xx/cs46xx_lib.c
+clean_blob sound/pci/cs46xx/cs46xx_lib.c
+clean_kconfig sound/pci/Kconfig SND_CS46XX
+clean_mk CONFIG_SND_CS46XX sound/pci/cs46xx/Makefile
+
+announce SND_KORG1212 - "Korg 1212 IO"
+drop_fw_file firmware/korg/k1212.dsp.ihex firmware/korg/k1212.dsp
+reject_firmware sound/pci/korg1212/korg1212.c
+clean_blob sound/pci/korg1212/korg1212.c
+clean_kconfig sound/pci/Kconfig SND_KORG1212
+clean_mk CONFIG_SND_KORG1212 sound/pci/korg1212/Makefile
+
+announce SND_MAESTRO3 - "ESS Allegro/Maestro3"
+drop_fw_file firmware/ess/maestro3_assp_kernel.fw.ihex firmware/ess/maestro3_assp_kernel.fw
+drop_fw_file firmware/ess/maestro3_assp_minisrc.fw.ihex firmware/ess/maestro3_assp_minisrc.fw
+reject_firmware sound/pci/maestro3.c
+clean_blob sound/pci/maestro3.c
+clean_kconfig sound/pci/Kconfig SND_MAESTRO3
+clean_mk CONFIG_SND_MAESTRO3 sound/pci/Makefile
+
+announce SND_YMFPCI - "Yamaha YMF724/740/744/754"
+drop_fw_file firmware/yamaha/ds1_ctrl.fw.ihex firmware/yamaha/ds1_ctrl.fw
+drop_fw_file firmware/yamaha/ds1_dsp.fw.ihex firmware/yamaha/ds1_dsp.fw
+drop_fw_file firmware/yamaha/ds1e_ctrl.fw.ihex firmware/yamaha/ds1e_ctrl.fw
+reject_firmware sound/pci/ymfpci/ymfpci_main.c
+clean_blob sound/pci/ymfpci/ymfpci_main.c
+clean_kconfig sound/pci/Kconfig SND_YMFPCI
+clean_mk CONFIG_SND_YMFPCI sound/pci/ymfpci/Makefile
+
+announce SND_SB16_CSP - "SB16 Advanced Signal Processor"
+drop_fw_file firmware/sb16/alaw_main.csp.ihex firmware/sb16/alaw_main.csp
+drop_fw_file firmware/sb16/mulaw_main.csp.ihex firmware/sb16/mulaw_main.csp
+drop_fw_file firmware/sb16/ima_adpcm_init.csp.ihex firmware/sb16/ima_adpcm_init.csp
+drop_fw_file firmware/sb16/ima_adpcm_capture.csp.ihex firmware/sb16/ima_adpcm_capture.csp
+drop_fw_file firmware/sb16/ima_adpcm_playback.csp.ihex firmware/sb16/ima_adpcm_playback.csp
+reject_firmware sound/isa/sb/sb16_csp.c
+clean_blob sound/isa/sb/sb16_csp.c
+clean_kconfig sound/isa/Kconfig SND_SB16_CSP
+clean_mk CONFIG_SND_SB16_CSP sound/isa/sb/Makefile
+
+announce SND_WAVEFRONT - "Turtle Beach Maui,Tropez,Tropez+ (Wavefront)"
+drop_fw_file firmware/yamaha/yss225_registers.bin.ihex firmware/yamaha/yss225_registers.bin
+reject_firmware sound/isa/wavefront/wavefront_fx.c
+clean_blob sound/isa/wavefront/wavefront_fx.c
+reject_firmware sound/isa/wavefront/wavefront_synth.c
+clean_blob sound/isa/wavefront/wavefront_synth.c
+clean_kconfig sound/isa/Kconfig SND_WAVEFRONT
+clean_mk CONFIG_SND_WAVEFRONT sound/isa/wavefront/Makefile
+
+announce SND_VX_LIB - Digigram VX soundcards
+reject_firmware sound/drivers/vx/vx_hwdep.c
+clean_blob sound/drivers/vx/vx_hwdep.c
+clean_kconfig sound/drivers/Kconfig SND_VX_LIB
+clean_mk CONFIG_SND_VX_LIB sound/drivers/vx/Makefile
+
+announce SND_DARLA20 - "(Echoaudio) Darla20"
+clean_blob sound/pci/echoaudio/darla20.c
+clean_kconfig sound/pci/Kconfig SND_DARLA20
+clean_mk CONFIG_SND_DARLA20 sound/pci/echoaudio/Makefile
+
+announce SND_DARLA24 - "(Echoaudio) Darla24"
+clean_blob sound/pci/echoaudio/darla24.c
+clean_kconfig sound/pci/Kconfig SND_DARLA24
+clean_mk CONFIG_SND_DARLA24 sound/pci/echoaudio/Makefile
+
+announce SND_ECHO3G - "(Echoaudio) 3G cards"
+clean_blob sound/pci/echoaudio/echo3g.c
+clean_kconfig sound/pci/Kconfig SND_ECHO3G
+clean_mk CONFIG_SND_ECHO3G sound/pci/echoaudio/Makefile
+
+announce SND_GINA20 - "(Echoaudio) Gina20"
+clean_blob sound/pci/echoaudio/gina20.c
+clean_kconfig sound/pci/Kconfig SND_GINA20
+clean_mk CONFIG_SND_GINA20 sound/pci/echoaudio/Makefile
+
+announce SND_GINA24 - "(Echoaudio) Gina24"
+clean_blob sound/pci/echoaudio/gina24.c
+clean_kconfig sound/pci/Kconfig SND_GINA24
+clean_mk CONFIG_SND_GINA24 sound/pci/echoaudio/Makefile
+
+announce SND_INDIGO - "(Echoaudio) Indigo"
+clean_blob sound/pci/echoaudio/indigo.c
+clean_kconfig sound/pci/Kconfig SND_INDIGO
+clean_mk CONFIG_SND_INDIGO sound/pci/echoaudio/Makefile
+
+announce SND_INDIGODJ - "(Echoaudio) Indigo DJ"
+clean_blob sound/pci/echoaudio/indigodj.c
+clean_kconfig sound/pci/Kconfig SND_INDIGODJ
+clean_mk CONFIG_SND_INDIGODJ sound/pci/echoaudio/Makefile
+
+announce SND_INDIGODJX - "(Echoaudio) Indigo DJx"
+clean_blob sound/pci/echoaudio/indigodjx.c
+clean_kconfig sound/pci/Kconfig SND_INDIGODJX
+clean_mk CONFIG_SND_INDIGODJX sound/pci/echoaudio/Makefile
+
+announce SND_INDIGOIO - "(Echoaudio) Indigo IO"
+clean_blob sound/pci/echoaudio/indigoio.c
+clean_kconfig sound/pci/Kconfig SND_INDIGOIO
+clean_mk CONFIG_SND_INDIGOIO sound/pci/echoaudio/Makefile
+
+announce SND_INDIGOIOX - "(Echoaudio) Indigo IOx"
+clean_blob sound/pci/echoaudio/indigoiox.c
+clean_kconfig sound/pci/Kconfig SND_INDIGOIOX
+clean_mk CONFIG_SND_INDIGOIOX sound/pci/echoaudio/Makefile
+
+announce SND_LAYLA20 - "(Echoaudio) Layla20"
+clean_blob sound/pci/echoaudio/layla20.c
+clean_kconfig sound/pci/Kconfig SND_LAYLA20
+clean_mk CONFIG_SND_LAYLA20 sound/pci/echoaudio/Makefile
+
+announce SND_LAYLA24 - "(Echoaudio) Layla24"
+clean_blob sound/pci/echoaudio/layla24.c
+clean_kconfig sound/pci/Kconfig SND_LAYLA24
+clean_mk CONFIG_SND_LAYLA24 sound/pci/echoaudio/Makefile
+
+announce SND_MIA - "(Echoaudio) Mia"
+clean_blob sound/pci/echoaudio/mia.c
+clean_kconfig sound/pci/Kconfig SND_MIA
+clean_mk CONFIG_SND_MIA sound/pci/echoaudio/Makefile
+
+announce SND_MONA - "(Echoaudio) Mona"
+clean_blob sound/pci/echoaudio/mona.c
+clean_kconfig sound/pci/Kconfig SND_MONA
+clean_mk CONFIG_SND_MONA sound/pci/echoaudio/Makefile
+
+announce SND_'<(Echoaudio)>' - "(Echoaudio) all of the above "
+reject_firmware sound/pci/echoaudio/echoaudio.c
+clean_blob sound/pci/echoaudio/echoaudio.c
+
+announce SND_EMU10K1 - "Emu10k1 (SB Live!, Audigy, E-mu APS)"
+reject_firmware sound/pci/emu10k1/emu10k1_main.c
+clean_blob sound/pci/emu10k1/emu10k1_main.c
+clean_kconfig sound/pci/Kconfig SND_EMU10K1
+clean_mk CONFIG_SND_EMU10K1 sound/pci/emu10k1/Makefile
+
+announce SND_MIXART - "Digigram miXart"
+reject_firmware sound/pci/mixart/mixart_hwdep.c
+clean_blob sound/pci/mixart/mixart_hwdep.c
+clean_kconfig sound/pci/Kconfig SND_MIXART
+clean_mk CONFIG_SND_MIXART sound/pci/mixart/Makefile
+
+announce SND_PCXHR - "Digigram PCXHR"
+reject_firmware sound/pci/pcxhr/pcxhr_hwdep.c
+clean_blob sound/pci/pcxhr/pcxhr_hwdep.c
+clean_kconfig sound/pci/Kconfig SND_PCXHR
+clean_mk CONFIG_SND_PCXHR sound/pci/pcxhr/Makefile
+
+announce SND_RIPTIDE - "Conexant Riptide"
+reject_firmware sound/pci/riptide/riptide.c
+clean_blob sound/pci/riptide/riptide.c
+clean_kconfig sound/pci/Kconfig SND_RIPTIDE
+clean_mk CONFIG_SND_RIPTIDE sound/pci/riptide/Makefile
+
+# This is ok, patch filenames are supplied as module parameters, and
+# they are text files with patch instructions.
+#announce SND_HDA_PATCH_LOADER - "Support initialization patch loading for HD-audio"
+#reject_firmware sound/pci/hda/hda_hwdep.c
+#clean_kconfig sound/pci/hda/Kconfig 'SND_HDA_PATCH_LOADER'
+
+announce SND_HDA_CODEC_CA0132_DSP - "Support new DSP code for CA0132 codec"
+reject_firmware sound/pci/hda/patch_ca0132.c
+clean_blob sound/pci/hda/patch_ca0132.c
+clean_sed '
+/^config SND_HDA_CODEC_CA0132_DSP$/, /^config / {
+  s,(ctefx.bin),(/*(DEBLOBBED)*/),;
+}' sound/pci/hda/Kconfig 'removed blob name'
+clean_kconfig sound/pci/hda/Kconfig SND_HDA_CODEC_CA0132_DSP
+# There are no separate source files or Makefile entries for the _DSP option.
+clean_mk CONFIG_SND_HDA_CODEC_CA0132 sound/pci/hda/Makefile
+
+announce SND_HDSP - "RME Hammerfall DSP Audio"
+reject_firmware sound/pci/rme9652/hdsp.c
+clean_blob sound/pci/rme9652/hdsp.c
+clean_kconfig sound/pci/Kconfig SND_HDSP
+clean_mk CONFIG_SND_HDSP sound/pci/rme9652/Makefile
+
+announce SND_AICA - "Dreamcast Yamaha AICA sound"
+reject_firmware sound/sh/aica.c
+clean_blob sound/sh/aica.c
+clean_kconfig sound/sh/Kconfig SND_AICA
+clean_mk CONFIG_SND_AICA sound/sh/Makefile
+
+announce SND_MSND_PINNACLE - "Support for Turtle Beach MultiSound Pinnacle"
+clean_blob sound/isa/msnd/msnd_pinnacle.h
+reject_firmware sound/isa/msnd/msnd_pinnacle.c
+clean_blob sound/isa/msnd/msnd_pinnacle.c
+clean_kconfig sound/isa/Kconfig SND_MSND_PINNACLE
+clean_mk CONFIG_SND_MSND_PINNACLE sound/isa/msnd/Makefile
+
+announce SND_MSND_CLASSIC - "Support for Turtle Beach MultiSound Classic, Tahiti, Monterey"
+clean_blob sound/isa/msnd/msnd_classic.h
+clean_kconfig sound/isa/Kconfig SND_MSND_CLASSIC
+clean_mk CONFIG_SND_MSND_CLASSIC sound/isa/msnd/Makefile
+
+announce SOUND_MSNDCLAS - "Support for Turtle Beach MultiSound Classic, Tahiti, Monterey (oss)"
+clean_blob sound/oss/msnd_classic.h
+clean_kconfig sound/oss/Kconfig SOUND_MSNDCLAS
+clean_sed '
+/^config MSNDCLAS_INIT_FILE$/, /^config / {
+  /^	default.*msndinit\.bin/ s,".*","/*(DEBLOBBED)*/",;
+}
+/^config MSNDCLAS_PERM_FILE$/, /^config / {
+  /^	default.*msndperm\.bin/ s,".*","/*(DEBLOBBED)*/",;
+}' sound/oss/Kconfig 'removed default firmware'
+clean_mk CONFIG_SOUND_MSNDCLAS sound/oss/Makefile
+
+announce SOUND_MSNDPIN - "Support for Turtle Beach MultiSound Pinnacle (oss)"
+clean_blob sound/oss/msnd_pinnacle.h
+clean_kconfig sound/oss/Kconfig SOUND_MSNDPIN
+clean_sed '
+/^config MSNDPIN_INIT_FILE$/, /^config / {
+  /^	default.*pndspini\.bin/ s,".*","/*(DEBLOBBED)*/",;
+}
+/^config MSNDPIN_PERM_FILE$/, /^config / {
+  /^	default.*pndsperm\.bin/ s,".*","/*(DEBLOBBED)*/",;
+}' sound/oss/Kconfig 'removed default firmware'
+clean_mk CONFIG_SOUND_MSNDPIN sound/oss/Makefile
+
+announce SND_SSCAPE - "Ensoniq SoundScape driver"
+reject_firmware sound/isa/sscape.c
+clean_blob sound/isa/sscape.c
+clean_sed '
+/^config SND_SSCAPE$/, /^config / {
+  s,"\(scope\|sndscape\)\.co[d?]","/*(DEBLOBBED)*/",g;
+}' sound/isa/Kconfig 'removed firmware names'
+clean_kconfig sound/isa/Kconfig SND_SSCAPE
+clean_mk CONFIG_SND_SSCAPE sound/isa/Makefile
+
+announce SND_SOC_ADAU1701 - "ADAU1701 SigmaDSP processor"
+clean_blob sound/soc/codecs/adau1701.c
+clean_kconfig sound/soc/codecs/Kconfig SND_SOC_ADAU1701
+clean_mk CONFIG_SND_SOC_ADAU1701 sound/soc/codecs/Makefile
+
+announce SND_SOC_ADAU1761 - "ADAU1761 SigmaDSP processor"
+clean_blob sound/soc/codecs/adau1761.c
+clean_kconfig sound/soc/codecs/Kconfig SND_SOC_ADAU1761
+clean_mk CONFIG_SND_SOC_ADAU1761 sound/soc/codecs/Makefile
+
+announce SND_SOC_ADAU1781 - "ADAU1781 SigmaDSP processor"
+clean_blob sound/soc/codecs/adau1781.c
+clean_kconfig sound/soc/codecs/Kconfig SND_SOC_ADAU1781
+clean_mk CONFIG_SND_SOC_ADAU1781 sound/soc/codecs/Makefile
+
+announce SND_SOC_RT5677 - "RT5677 SoC"
+reject_firmware sound/soc/codecs/rt5677.c
+clean_blob sound/soc/codecs/rt5677.h
+clean_kconfig sound/soc/codecs/Kconfig SND_SOC_RT5677
+clean_mk CONFIG_SND_SOC_RT5677 sound/soc/codecs/Makefile
+
+announce SND_SOC_SIGMADSP - "SigmaStudio firmware loader"
+maybe_reject_firmware sound/soc/codecs/sigmadsp.c
+
+announce SND_SOC_INTEL_SST_ACPI - "Intel SST (LPE) Driver"
+reject_firmware sound/soc/intel/common/sst-acpi.c
+clean_blob sound/soc/intel/common/sst-acpi.c
+clean_kconfig sound/soc/intel/Kconfig SND_SOC_INTEL_SST_ACPI
+clean_mk CONFIG_SND_SOC_INTEL_SST_ACPI sound/soc/intel/common/Makefile
+
+announce SND_SOC_INTEL_HASWELL - undocumented
+reject_firmware sound/soc/intel/haswell/sst-haswell-ipc.c
+clean_blob sound/soc/intel/haswell/sst-haswell-ipc.c
+clean_kconfig sound/soc/intel/Kconfig SND_SOC_INTEL_HASWELL
+clean_mk CONFIG_SND_SOC_INTEL_HASWELL sound/soc/intel/haswell/Makefile
+
+announce SND_SOC_INTEL_SKYLAKE - undocumented
+reject_firmware sound/soc/intel/skylake/skl-sst.c
+reject_firmware sound/soc/intel/skylake/skl-topology.c
+clean_blob sound/soc/intel/skylake/skl.c
+clean_blob sound/soc/intel/skylake/skl-sst.c
+clean_blob sound/soc/intel/skylake/skl-topology.c
+clean_kconfig sound/soc/intel/Kconfig SND_SOC_INTEL_SKYLAKE
+clean_mk CONFIG_SND_SOC_INTEL_SKYLAKE sound/soc/intel/skylake/Makefile
+
+announce SND_SST_IPC - undocumented
+reject_firmware sound/soc/intel/atom/sst/sst.c
+reject_firmware sound/soc/intel/atom/sst/sst_loader.c
+clean_kconfig sound/soc/intel/Kconfig SND_SST_IPC
+clean_mk CONFIG_SND_SST_IPC sound/soc/intel/atom/sst/Makefile
+
+announce SND_SST_IPC_ACPI - undocumented
+clean_blob sound/soc/intel/atom/sst/sst_acpi.c
+clean_kconfig sound/soc/intel/Kconfig SND_SST_IPC_ACPI
+clean_mk CONFIG_SND_SST_IPC_ACPI sound/soc/intel/atom/sst/Makefile
+
+announce SND_SST_IPC_PCI - undocumented
+clean_blob sound/soc/intel/atom/sst/sst_pci.c
+clean_kconfig sound/soc/intel/Kconfig SND_SST_IPC_PCI
+clean_mk CONFIG_SND_SST_IPC_PCI sound/soc/intel/atom/sst/Makefile
+
+announce SND_SOC_WM0010 - "WM0010 DSP driver"
+reject_firmware sound/soc/codecs/wm0010.c
+clean_blob sound/soc/codecs/wm0010.c
+clean_kconfig sound/soc/codecs/Kconfig SND_SOC_WM0010
+clean_mk CONFIG_SND_SOC_WM0010 sound/soc/codecs/Makefile
+
+# It's not clear that wm2000_anc.bin is pure data.
+# Check with developer, clean up for now.
+announce SND_SOC_WM2000 - "WM2000 ALSA Soc Audio codecs"
+reject_firmware sound/soc/codecs/wm2000.c
+clean_blob sound/soc/codecs/wm2000.c
+clean_kconfig sound/soc/codecs/Kconfig SND_SOC_WM2000
+clean_mk CONFIG_SND_SOC_WM2000 sound/soc/codecs/Makefile
+
+announce SND_SOC_WM8994 - "WM8994 ALSA Soc Audio codecs"
+reject_firmware sound/soc/codecs/wm8958-dsp2.c
+clean_blob sound/soc/codecs/wm8958-dsp2.c
+clean_kconfig sound/soc/codecs/Kconfig SND_SOC_WM8994
+clean_mk CONFIG_SND_SOC_WM8994 sound/soc/codecs/Makefile
+
+# The coeff files might be pure data, but the wmfw surely aren't.
+announce SND_SOC_WM_ADSP - "Wolfson ADSP support"
+reject_firmware sound/soc/codecs/wm_adsp.c
+clean_blob sound/soc/codecs/wm_adsp.c
+clean_kconfig sound/soc/codecs/Kconfig SND_SOC_WM_ADSP
+clean_mk CONFIG_SND_SOC_WM_ADSP sound/soc/codecs/Makefile
+
+announce SND_SOC_SH4_SIU - "ALSA SoC driver for Renesas SH7343, SH7722 SIU peripheral"
+reject_firmware sound/soc/sh/siu_dai.c
+clean_blob sound/soc/sh/siu_dai.c
+clean_kconfig sound/soc/sh/Kconfig SND_SOC_SH4_SIU
+clean_mk CONFIG_SND_SOC_SH4_SIU sound/soc/sh/Makefile
+
+announce SOUND_TRIX - "MediaTrix AudioTrix Pro support"
+clean_blob sound/oss/trix.c
+clean_kconfig sound/oss/Kconfig SOUND_TRIX
+clean_sed '
+/^config TRIX_BOOT_FILE$/, /^config / {
+  /^	default.*trxpro\.hex/ s,".*","/*(DEBLOBBED)*/",;
+}' sound/oss/Kconfig 'removed default firmware'
+clean_mk CONFIG_SOUND_TRIX sound/oss/Makefile
+
+announce SOUND_TRIX - "See above,"
+announce SOUND_PAS - "ProAudioSpectrum 16 support,"
+announce SOUND_SB - "100% Sound Blaster compatibles (SB16/32/64, ESS, Jazz16) support"
+clean_blob sound/oss/sb_common.c
+clean_kconfig sound/oss/Kconfig SOUND_PAS
+clean_kconfig sound/oss/Kconfig SOUND_SB
+clean_mk CONFIG_SOUND_PAS sound/oss/Makefile
+clean_mk CONFIG_SOUND_SB sound/oss/Makefile
+
+announce SOUND_PSS - "PSS (AD1848, ADSP-2115, ESC614) support"
+clean_sed 's,^\( [*] .*synth"\)\.$,\1/*.,' sound/oss/pss.c 'avoid nested comments'
+clean_blob sound/oss/pss.c
+clean_kconfig sound/oss/Kconfig SOUND_PSS
+clean_sed '
+/^config PSS_BOOT_FILE$/, /^config / {
+  /^	default.*dsp001\.ld/ s,".*","/*(DEBLOBBED)*/",;
+}' sound/oss/Kconfig 'removed default firmware'
+clean_mk CONFIG_SOUND_PSS sound/oss/Makefile
+
+announce SND_USB_6FIRE - "TerraTec DMX 6Fire USB"
+reject_firmware sound/usb/6fire/firmware.c
+clean_blob sound/usb/6fire/firmware.c
+clean_kconfig sound/usb/Kconfig SND_USB_6FIRE
+clean_mk CONFIG_SND_USB_6FIRE sound/usb/6fire/Makefile
+
+#######
+# SOC #
+#######
+
+announce QCOM_WCNSS_CTRL - "Qualcomm WCNSS control driver"
+reject_firmware drivers/soc/qcom/wcnss_ctrl.c
+clean_blob drivers/soc/qcom/wcnss_ctrl.c
+clean_kconfig drivers/soc/qcom/Kconfig QCOM_WCNSS_CTRL
+clean_mk CONFIG_QCOM_WCNSS_CTRL drivers/soc/qcom/Makefile
+
+announce KEYSTONE_NAVIGATOR_QMSS - "Keystone Queue Manager Sub System"
+reject_firmware drivers/soc/ti/knav_qmss_queue.c
+clean_blob drivers/soc/ti/knav_qmss_queue.c
+clean_blob Documentation/arm/keystone/knav-qmss.txt
+clean_kconfig drivers/soc/ti/Kconfig KEYSTONE_NAVIGATOR_QMSS
+clean_mk CONFIG_KEYSTONE_NAVIGATOR_QMSS drivers/soc/ti/Makefile
+
+#################
+# Documentation #
+#################
+
+announce Documentation - "non-Free firmware scripts and documentation"
+clean_blob Documentation/dvb/avermedia.txt
+clean_blob Documentation/dvb/opera-firmware.txt
+clean_blob Documentation/sound/alsa/ALSA-Configuration.txt
+clean_blob Documentation/sound/oss/MultiSound
+clean_blob Documentation/sound/oss/PSS
+clean_blob Documentation/sound/oss/PSS-updates
+clean_blob Documentation/sound/oss/README.OSS
+clean_file Documentation/dvb/get_dvb_firmware
+clean_file Documentation/video4linux/extract_xc3028.pl
+clean_sed s,usb8388,whatever,g drivers/base/Kconfig 'removed blob name'
+clean_blob firmware/README.AddingFirmware
+clean_blob firmware/WHENCE
+
+if $errors; then
+  echo errors above were ignored because of --force >&2
+fi
+
+exit 0
diff --git a/freed-ora/current/f24/deblob-check b/freed-ora/current/f24/deblob-check
index a37a369b5..dc3aa3941 100755
--- a/freed-ora/current/f24/deblob-check
+++ b/freed-ora/current/f24/deblob-check
@@ -1,13 +1,13 @@
 #! /bin/sh
 
-# deblob-check version 2015-12-22
+# deblob-check version 2016-03-03
 # Inspired in gNewSense's find-firmware script.
 # Written by Alexandre Oliva <lxoliva@fsfla.org>
 
 # Check http://www.fsfla.org/svn/fsfla/software/linux-libre for newer
 # versions.
 
-# Copyright 2008-2015 Alexandre Oliva <lxoliva@fsfla.org>
+# Copyright 2008-2016 Alexandre Oliva <lxoliva@fsfla.org>
 #
 # This program is part of GNU Linux-libre, a GNU project that
 # publishes scripts to clean up Linux so as to make it suitable for
@@ -4342,6 +4342,49 @@ set_except () {
     accept '[ ][*][ ]fpga_mgr_firmware_load[ ]-' drivers/fpga/fpga-mgr.c
     accept 'EXPORT_SYMBOL_GPL[(]fpga_mgr_firmware_load[)][;]' drivers/fpga/fpga-mgr.c
     accept '[\t ]*CHIP_IS_E2[(]bp[)][ ][?][ ]["]everest2["][ ]:[ ]["]everest3["][/][*][(]DEBLOBBED[)][*][/][)][;]' drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+
+    # New in 4.5.
+    blobname 'qat_895xcc_mmp\.bin' drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
+    # These could use some assembly comments, but they're so simple
+    # and regular that disassembly should suffice to make them transparent.
+    defsnc 'static[ ]const[ ]u32[ ][vs]gpr_init_compute_shader\[\][ ]=' drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+    blobname 'brcmfmac43\(602\|50\(\|c2\)\|56\|570\|5[89]\|6[56]b\|71\)-pcie\.bin' drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
+    blobname 'brcmfmac43\(143\|241b[045]\|29\|3[0459]\|340\|362\|430\|455\|54\)-sdio\.bin' drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
+    blobname 'brcmfmac43\(143\|236b\|242a\|569\)\.bin' drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c
+    blobname 'hfi1_\(dc8051\|fabric\|sbus\|pcie\)_d\.fw' drivers/staging/rdma/hfi1/firmware.c
+    blobname '%s%s%s["][,][\n \t]*["]intel[/]dsp_fw_["][,][ ]guid[,][ ]["]\.bin' sound/soc/intel/skylake/skl-sst.c
+    accept '[\t]*fsl[,]tmu-calibration[ ]=[ ][<][0-9a-fx \t\n]*>[;]' 'Documentation/devicetree/bindings/thermal/qoriq-thermal.txt\|arch/powerpc/boot/dts/fsl/t10\(23\|40\)si-post.dtsi'
+    defsnc 'const[ ]u8[ ]sha256_zero_message_hash\[SHA256_DIGEST_SIZE\][ ]=' crypto/sha256_generic.c
+    defsc 'static[ ]struct[ ]tegra_clk_pll_freq_table[ ]pll_e_freq_table\[\][ ]=' drivers/clk/tegra/clk-tegra210.c
+    blobname 'qat_c3xxx\(\|_mmp\)\.bin' drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.h
+    blobname 'qat_c62x\(\|_mmp\)\.bin' drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.h
+    defsnc 'uint32_t[ ]fiji_clock_stretcher_ddt_table\[2\]\[4\]\[4\][ ]=' drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
+    defsnc 'uint32_t[ ]PP_ClockStretcherDDTTable\[2\]\[4\]\[4\][ ]=' drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
+    defsc 'struct[ ]SMU73_Discrete_GraphicsLevel[ ]avfs_graphics_level\[8\][ ]=' drivers/gpu/drm/amd/poewrplay/smumgr/fiji_smumgr.c
+    defsnc 'static[ ]const[ ]struct[ ]dphy_pll_testdin_map[ ]dptdin_map\[\][ ]=' drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+    defsnc 'static[ ]const[ ]u16[ ]iproc_msi_reg_paxb\[NR_HW_IRQS\]\[IPROC_MSI_REG_SIZE\][ ]=' drivers/pci/host/pcie-iproc-msi.c
+    defsnc 'static[ ]const[ ]int[ ]pv88090_buck1_limits\[\][ ]=' drivers/regulator/pv88090-regulator.c
+    accept '[\t]wilc->firmware[ ]=' drivers/staging/wilc1000/linux_wlan.c
+    defsnc 'static[ ]const[ ]struct[ ]tsadc_table[ ]v[14]_code_table\[\][ ]=' drivers/thermal/rockchip_thermal.c
+    defsnc 'static[ ]const[ ]u8[ ]degrade_factor\[CPU_LOAD_IDX_MAX\]\[DEGRADE_SHIFT[ ][+][ ]1\][ ]=' kernel/sched/fair.c
+    accept '[\t ]*rm[ ]-f[ ]["][/]boot[/]initramfs-[$]f\.img["]' scripts/prune-kernel
+    defsnc 'static[ ]const[ ]struct[ ]reg_default[ ]rt5616_reg\[\][ ]=' sound/soc/codecs/rt5616.c
+    defsnc 'static[ ]const[ ]struct[ ]reg_default[ ]rt5650_reg\[\][ ]=' sound/soc/codecs/rt5645.c
+    defsnc 'static[ ]const[ ]struct[ ]reg_default[ ]rt5659_reg\[\][ ]=' sound/soc/codecs/rt5659.c
+    accept '[\t ]*["][ ]*-i[ ]--input[ \t]*input[ ]data[ ]from[ ]a[ ]file[ ][(]e\.g\.[ ][\\]["]test\.bin[\\]["]' tools/spi/spidev_test.c
+    accept '[\t ]*["][ ]*-o[ ]--output[ \t]*output[ ]data[ ]to[ ]a[ ]file[ ][(]e\.g\.[ ][\\]["]results\.bin[\\]["]' tools/spi/spidev_test.c
+    accept '[ ][*][ ]directly[ ]from[ ]probe[ ]or[ ]from[ ]request_firmware_\(no\)\?wait[ ]callback\.' drivers/input/touchscreen/goodix.c
+    accept '[ ][*][ ]request_firmware_wait[ ]callback' drivers/input/touchscreen/goodix.c
+    blobname 'goodix_\(%d\|[0-9]*\)_cfg\.bin' drivers/input/touchscreen/goodix.c
+    blobname 'adf7242_firmware\.bin' drivers/net/ieee802154/adf7242.c
+    blobna '[/][*][ ]get[ ]ADF7242[ ]addon[^*]*\([*]\+[^/*][^*]*\)*[*][*]*[/]' drivers/net/ieee802154/adf7242.c
+    blobname 'iwlwifi-9000-\?' drivers/net/wireless/intel/iwlwifi/iwl-9000.c
+    blobname 'wlan[/]prima[/]WCNSS_qcom_wlan_nv\.bin' drivers/soc/qcom/wcnss_ctrl.c
+    blobname 'r8a779x_usb3_v[12]\.dlmem' drivers/usb/host/xhci-rcar.h
+    blobname 'moxa[/]moxa-\(%04x\|11[135][01]\|[0-9a-f]*\)\.fw' drivers/usb/serial/mxu11x0.c
+    blobname 'intel[/]dsp_fw_release\.bin' sound/soc/intel/skylake/skl.c
+    accept '[\t]rc[ ]=[ ]request_firmware_nowait[(]THIS_MODULE[,][ ]1[,][ ]name[,][ ]dev[,][ ]GFP_KERNEL[,][\n][ \t]*NULL[,][ ]trigger_async_request_cb[)][;]' lib/test_firmware.c
+    blobname 'nvidia[/]gk\(100\|20a\)[/]\(\(fecs\|gpccs\)_\(data\|inst\)\|sw_\(\(bundle\|method\)_init\|\(\|non\)ctx\)\)\.bin' drivers/gpu/drm/nouveau/nouveau_platform.c
     ;;
 
   */*freedo*.patch | */*logo*.patch)
diff --git a/freed-ora/current/f24/deblob-main b/freed-ora/current/f24/deblob-main
index b2bf813ce..8f24b6e48 100755
--- a/freed-ora/current/f24/deblob-main
+++ b/freed-ora/current/f24/deblob-main
@@ -1,6 +1,6 @@
 #! /bin/sh
 
-# Copyright (C) 2008-2014 Alexandre Oliva <lxoliva@fsfla.org>
+# Copyright (C) 2008-2016 Alexandre Oliva <lxoliva@fsfla.org>
 
 # This program is part of GNU Linux-libre, a GNU project that
 # publishes scripts to clean up Linux so as to make it suitable for
@@ -278,11 +278,11 @@ rm -f linux-$kver.tar
 if test -f linux-libre-$kver-$gnu.xdelta; then
   bzip2 -k9 linux-libre-$kver-$gnu.xdelta
   xz -k9 linux-libre-$kver-$gnu.xdelta || :
-  lzip -k9 linux-libre-$kver-$gnu.xdelta || :
+  lzip -k9s64MiB linux-libre-$kver-$gnu.xdelta || :
 fi
 bzip2 -k9 linux-libre-$kver-$gnu.tar
 xz -k9 linux-libre-$kver-$gnu.tar || :
-lzip -k9 linux-libre-$kver-$gnu.tar || :
+lzip -k9s64MiB linux-libre-$kver-$gnu.tar || :
 
 echo Done except for signing, feel free to interrupt
 for f in \
diff --git a/freed-ora/current/f24/disable-CONFIG_EXPERT-for-ZONE_DMA.patch b/freed-ora/current/f24/disable-CONFIG_EXPERT-for-ZONE_DMA.patch
new file mode 100644
index 000000000..9cc0525f4
--- /dev/null
+++ b/freed-ora/current/f24/disable-CONFIG_EXPERT-for-ZONE_DMA.patch
@@ -0,0 +1,43 @@
+From 888ba9b2a02e8d144c3a9ae5e01a1a94280cd2bf Mon Sep 17 00:00:00 2001
+From: Fedora Kernel Team <kernel-team@fedoraproject.org>
+Date: Fri, 22 Jan 2016 13:03:36 -0600
+Subject: [PATCH] Make ZONE_DMA not depend on CONFIG_EXPERT
+
+Disable the requirement on CONFIG_EXPERT for ZONE_DMA and ZONE_DEVICE so
+that we can enable NVDIMM_PFN and ND_PFN
+
+Signed-off-by: Justin Forbes <jforbes@fedoraproject.org>
+---
+ arch/x86/Kconfig | 2 +-
+ mm/Kconfig       | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
+index a02c842..ea2eaeb 100644
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -315,7 +315,7 @@ source "kernel/Kconfig.freezer"
+ menu "Processor type and features"
+
+ config ZONE_DMA
+-	bool "DMA memory allocation support" if EXPERT
++	bool "DMA memory allocation support"
+ 	default y
+ 	help
+ 	  DMA memory allocation support allows devices with less than 32-bit
+diff --git a/mm/Kconfig b/mm/Kconfig
+index 97a4e06..26bbbe0 100644
+--- a/mm/Kconfig
++++ b/mm/Kconfig
+@@ -650,7 +650,7 @@ config IDLE_PAGE_TRACKING
+ 	  See Documentation/vm/idle_page_tracking.txt for more details.
+
+ config ZONE_DEVICE
+-	bool "Device memory (pmem, etc...) hotplug support" if EXPERT
++	bool "Device memory (pmem, etc...) hotplug support"
+ 	default !ZONE_DMA
+ 	depends on !ZONE_DMA
+ 	depends on MEMORY_HOTPLUG
+-- 
+2.5.0
+
diff --git a/freed-ora/current/f24/drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch b/freed-ora/current/f24/drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch
deleted file mode 100644
index cd53bf71c..000000000
--- a/freed-ora/current/f24/drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 41ed5ee704b784a4fca02787311d59c243563013 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Thu, 7 Jan 2016 10:29:10 +0200
-Subject: [PATCH] drm/i915: shut up gen8+ SDE irq dmesg noise, again
-
-We still keep getting
-
-[    4.249930] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
-
-This reverts
-
-commit 820da7ae46332fa709b171eb7ba57cbd023fa6df
-Author: Jani Nikula <jani.nikula@intel.com>
-Date:   Wed Nov 25 16:47:23 2015 +0200
-
-    Revert "drm/i915: shut up gen8+ SDE irq dmesg noise"
-
-which in itself is a revert, so this is just doing
-
-commit 97e5ed1111dcc5300a0f59a55248cd243937a8ab
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Fri Oct 23 10:56:12 2015 +0200
-
-    drm/i915: shut up gen8+ SDE irq dmesg noise
-
-all over again. I'll stop pretending I understand what's going on like I
-did when I thought I'd fixed this for good in
-
-commit 6a39d7c986be4fd18eb019e9cdbf774ec36c9f77
-Author: Jani Nikula <jani.nikula@intel.com>
-Date:   Wed Nov 25 16:47:22 2015 +0200
-
-    drm/i915: fix the SDE irq dmesg warnings properly
-
-Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reference: http://mid.gmane.org/20151213124945.GA5715@nuc-i3427.alporthouse.com
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92084
-Cc: drm-intel-fixes@lists.freedesktop.org
-Fixes: 820da7ae4633 ("Revert "drm/i915: shut up gen8+ SDE irq dmesg noise"")
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 10 +++++++---
- 1 file changed, 7 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 0d228f909dcb..0f42a2782afc 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2354,9 +2354,13 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
- 				spt_irq_handler(dev, pch_iir);
- 			else
- 				cpt_irq_handler(dev, pch_iir);
--		} else
--			DRM_ERROR("The master control interrupt lied (SDE)!\n");
--
-+		} else {
-+			/*
-+			 * Like on previous PCH there seems to be something
-+			 * fishy going on with forwarding PCH interrupts.
-+			 */
-+			DRM_DEBUG_DRIVER("The master control interrupt lied (SDE)!\n");
-+		}
- 	}
- 
- 	I915_WRITE_FW(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/filter-aarch64.sh b/freed-ora/current/f24/filter-aarch64.sh
index dae47aaa3..139d1791d 100644
--- a/freed-ora/current/f24/filter-aarch64.sh
+++ b/freed-ora/current/f24/filter-aarch64.sh
@@ -9,6 +9,8 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+ethdrvs="3com adaptec arc alteon atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell micrel myricom neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti via wiznet xircom"
+
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/freed-ora/current/f24/filter-armv7hl.sh b/freed-ora/current/f24/filter-armv7hl.sh
index 5803dd01f..6de77659a 100644
--- a/freed-ora/current/f24/filter-armv7hl.sh
+++ b/freed-ora/current/f24/filter-armv7hl.sh
@@ -9,6 +9,10 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn media memstick message nfc ntb pcmcia platform ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn media memstick message mwave nfc ntb pcmcia platform ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+ethdrvs="3com adaptec alteon altera amd atheros broadcom cadence chelsio cisco dec dlink emulex icplus mellanox micrel myricom natsemi neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis sun tehuti via wiznet xircom"
+
+drmdrvs="amd armada bridge ast exynos i2c imx mgag200 msm omapdrm panel nouveau radeon rockchip tegra tilcdc via"
+
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/freed-ora/current/f24/filter-i686.sh b/freed-ora/current/f24/filter-i686.sh
index 784ab37e4..dc6f42f5a 100644
--- a/freed-ora/current/f24/filter-i686.sh
+++ b/freed-ora/current/f24/filter-i686.sh
@@ -9,6 +9,6 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick mfd mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub hid-sensor-magn-3d hid-sensor-incl-3d hid-sensor-gyro-3d hid-sensor-iio-common hid-sensor-accel-3d hid-sensor-trigger hid-sensor-als hid-sensor-rotation target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub hid-sensor-magn-3d hid-sensor-incl-3d hid-sensor-gyro-3d hid-sensor-iio-common hid-sensor-accel-3d hid-sensor-trigger hid-sensor-als hid-sensor-rotation target_core_user sbp_target"
diff --git a/freed-ora/current/f24/filter-modules.sh b/freed-ora/current/f24/filter-modules.sh
index 31b78ce29..ef86416d1 100755
--- a/freed-ora/current/f24/filter-modules.sh
+++ b/freed-ora/current/f24/filter-modules.sh
@@ -14,25 +14,27 @@
 # listed here.
 
 # Set the default dirs/modules to filter out
-driverdirs="atm auxdisplay bcma bluetooth fmc iio infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc iio infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging tty uio uwb w1"
+
+chardrvs="mwave pcmcia"
 
 netdrvs="appletalk can dsa hamradio ieee802154 irda ppp slip usb wireless"
 
 ethdrvs="3com adaptec alteon amd atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell mellanox neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti wiznet xircom"
 
-scsidrvs="aacraid aic7xxx aic94xx be2iscsi bfa bnx2i bnx2fc csiostor cxgbi esas2r fcoe fnic isci libsas lpfc megaraid mpt2sas mpt3sas mvsas pm8001 qla2xxx qla4xxx sym53c8xx_2 ufs"
+inputdrvs="gameport tablet touchscreen"
 
-ttydrvs="ipwireless"
+scsidrvs="aacraid aic7xxx aic94xx be2iscsi bfa bnx2i bnx2fc csiostor cxgbi esas2r fcoe fnic isci libsas lpfc megaraid mpt2sas mpt3sas mvsas pm8001 qla2xxx qla4xxx sym53c8xx_2 ufs"
 
-usbdrvs="atm wusbcore"
+usbdrvs="atm image misc serial wusbcore"
 
 fsdrvs="affs befs coda cramfs dlm ecryptfs hfs hfsplus jfs minix ncpfs nilfs2 ocfs2 reiserfs romfs squashfs sysv ubifs udf ufs"
 
-netprots="appletalk atm ax25 batman-adv bluetooth can dccp dsa ieee802154 irda l2tp mac80211 mac802154 netrom nfc rds rfkill rose sctp wireless"
+netprots="6lowpan appletalk atm ax25 batman-adv bluetooth can dccp dsa ieee802154 irda l2tp mac80211 mac802154 mpls netrom nfc rds rfkill rose sctp wireless"
 
-drmdrvs="ast gma500 mgag200 via nouveau"
+drmdrvs="amd ast gma500 i2c i915 mgag200 nouveau radeon via "
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub target_core_user sbp_target"
 
 # Grab the arch-specific filter list overrides
 source ./filter-$2.sh
@@ -83,6 +85,12 @@ do
 	filter_dir $1 drivers/net/${netdrv}
 done
 
+# Filter the char drivers
+for char in ${chardrvs}
+do
+	filter_dir $1 drivers/char/${input}
+done
+
 # Filter the ethernet drivers
 for eth in ${ethdrvs}
 do
@@ -95,10 +103,10 @@ do
 	filter_dir $1 drivers/scsi/${scsi}
 done
 
-# TTY
-for tty in ${ttydrvs}
+# Input
+for input in ${inputdrvs}
 do
-	filter_dir $1 drivers/tty/${tty}
+	filter_dir $1 drivers/input/${input}
 done
 
 # USB
diff --git a/freed-ora/current/f24/filter-ppc64.sh b/freed-ora/current/f24/filter-ppc64.sh
index 8001e0944..e4990bbcb 100644
--- a/freed-ora/current/f24/filter-ppc64.sh
+++ b/freed-ora/current/f24/filter-ppc64.sh
@@ -9,6 +9,6 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/freed-ora/current/f24/filter-ppc64le.sh b/freed-ora/current/f24/filter-ppc64le.sh
index c8948c94d..e44c88ec5 100644
--- a/freed-ora/current/f24/filter-ppc64le.sh
+++ b/freed-ora/current/f24/filter-ppc64le.sh
@@ -9,6 +9,6 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/freed-ora/current/f24/filter-ppc64p7.sh b/freed-ora/current/f24/filter-ppc64p7.sh
index 32c43a489..b499f0e69 100644
--- a/freed-ora/current/f24/filter-ppc64p7.sh
+++ b/freed-ora/current/f24/filter-ppc64p7.sh
@@ -9,6 +9,6 @@
 # modifications to the overrides below.  If something should be removed across
 # all arches, remove it in the default instead of per-arch.
 
-driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb"
+driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1"
 
-singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user"
+singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target"
diff --git a/freed-ora/current/f24/gitrev b/freed-ora/current/f24/gitrev
index 05a6a3d01..fa461aace 100644
--- a/freed-ora/current/f24/gitrev
+++ b/freed-ora/current/f24/gitrev
@@ -1 +1 @@
-02006f7a7a715af10974a30b7ad8e6ee340f954c
+f6cede5b49e822ebc41a099fe41ab4989f64e2cb
diff --git a/freed-ora/current/f24/kbuild-AFTER_LINK.patch b/freed-ora/current/f24/kbuild-AFTER_LINK.patch
index 805b6eef8..7e8cba5b9 100644
--- a/freed-ora/current/f24/kbuild-AFTER_LINK.patch
+++ b/freed-ora/current/f24/kbuild-AFTER_LINK.patch
@@ -111,7 +111,7 @@ index dacf71a..72cbefd 100755
 --- a/scripts/link-vmlinux.sh
 +++ b/scripts/link-vmlinux.sh
 @@ -65,6 +65,10 @@ vmlinux_link()
- 			-lutil -lrt ${1}
+ 			-lutil -lrt -lpthread ${1}
  		rm -f linux
  	fi
 +	if [ -n "${AFTER_LINK}" ]; then
diff --git a/freed-ora/current/f24/kernel.spec b/freed-ora/current/f24/kernel.spec
index 1aeba4abb..603c447a9 100644
--- a/freed-ora/current/f24/kernel.spec
+++ b/freed-ora/current/f24/kernel.spec
@@ -6,7 +6,7 @@ Summary: The Linux kernel
 # For a stable, released kernel, released_kernel should be 1. For rawhide
 # and/or a kernel built from an rc or git snapshot, released_kernel should
 # be 0.
-%global released_kernel 1
+%global released_kernel 0
 
 # Sign modules on x86.  Make sure the config files match this setting if more
 # architectures are added.
@@ -57,7 +57,7 @@ Summary: The Linux kernel
 
 # To be inserted between "patch" and "-2.6.".
 #define stablelibre -4.4%{?stablegnux}
-#define rcrevlibre  -4.4%{?rcrevgnux}
+%define rcrevlibre  -4.4%{?rcrevgnux}
 #define gitrevlibre -4.4%{?gitrevgnux}
 
 %if 0%{?stablelibre:1}
@@ -103,7 +103,7 @@ Summary: The Linux kernel
 # The next upstream release sublevel (base_sublevel+1)
 %define upstream_sublevel %(echo $((%{base_sublevel} + 1)))
 # The rc snapshot level
-%define rcrev 0
+%define rcrev 7
 # The git snapshot level
 %define gitrev 0
 # Set rpm version accordingly
@@ -128,6 +128,7 @@ Summary: The Linux kernel
 %define with_debug     %{?_without_debug:     0} %{?!_without_debug:     1}
 # kernel-headers
 %define with_headers   %{?_without_headers:   0} %{?!_without_headers:   1}
+%define with_cross_headers   %{?_without_cross_headers:   0} %{?!_without_cross_headers:   1}
 # kernel-firmware
 %define with_firmware  %{?_with_firmware:     1} %{?!_with_firmware:     0}
 # perf
@@ -267,6 +268,7 @@ Summary: The Linux kernel
 %ifarch noarch
 %define with_up 0
 %define with_headers 0
+%define with_cross_headers 0
 %define with_tools 0
 %define with_perf 0
 %define all_arch_configs kernel-%{version}-*.config
@@ -332,6 +334,7 @@ Summary: The Linux kernel
 # just like we used to only build them on i386 for x86
 %ifnarch armv7hl
 %define with_headers 0
+%define with_cross_headers 0
 %define with_perf 0
 %define with_tools 0
 %endif
@@ -448,7 +451,7 @@ Source0: http://linux-libre.fsfla.org/pub/linux-libre/freed-ora/src/linux%{?base
 Source3: deblob-main
 Source4: deblob-check
 Source5: deblob-%{kversion}
-#Source6: deblob-4.%{upstream_sublevel}
+Source6: deblob-4.%{upstream_sublevel}
 
 Source10: perf-man-%{kversion}.tar.gz
 Source11: x509.genkey
@@ -544,17 +547,23 @@ Patch07: freedo.patch
 
 Patch451: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch
 
-Patch452: amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch
-
-Patch453: amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch
-
 Patch454: arm64-avoid-needing-console-to-enable-serial-console.patch
 
 Patch456: arm64-acpi-drop-expert-patch.patch
 
+# http://patchwork.ozlabs.org/patch/587554/
 Patch457: ARM-tegra-usb-no-reset.patch
 
-Patch460: mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch
+Patch458: ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch
+
+# http://www.spinics.net/lists/arm-kernel/msg480703.html
+Patch459: Geekbox-device-tree-support.patch
+
+# http://www.spinics.net/lists/arm-kernel/msg483898.html
+Patch460: Initial-AllWinner-A64-and-PINE64-support.patch
+
+# http://www.spinics.net/lists/linux-tegra/msg25152.html
+Patch461: Fix-tegra-to-use-stdout-path-for-serial-console.patch
 
 Patch463: arm-i.MX6-Utilite-device-dtb.patch
 
@@ -630,48 +639,32 @@ Patch501: Input-synaptics-pin-3-touches-when-the-firmware-repo.patch
 
 Patch502: firmware-Drop-WARN-from-usermodehelper_read_trylock-.patch
 
-Patch503: drm-i915-turn-off-wc-mmaps.patch
+# Patch503: drm-i915-turn-off-wc-mmaps.patch
 
 Patch508: kexec-uefi-copy-secure_boot-flag-in-boot-params.patch
 
-#CVE-2015-7833 rhbz 1270158 1270160
-Patch567: usbvision-fix-crash-on-detecting-device-with-invalid.patch
-
-#rhbz 1287819
-Patch570: HID-multitouch-enable-palm-rejection-if-device-imple.patch
-
 #rhbz 1286293
 Patch571: ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch
 
-#rhbz 1288687
-Patch572: alua_fix.patch
-
-#CVE-2015-8709 rhbz 1295287 1295288
-Patch603: ptrace-being-capable-wrt-a-process-requires-mapped-u.patch
-
-Patch604: drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch
-
-#rhbz 1275718
-Patch605: 0001-device-property-always-check-for-fwnode-type.patch
-Patch606: 0002-device-property-rename-helper-functions.patch
-Patch607: 0003-device-property-refactor-built-in-properties-support.patch
-Patch608: 0004-device-property-keep-single-value-inplace.patch
-Patch609: 0005-device-property-helper-macros-for-property-entry-cre.patch
-Patch610: 0006-device-property-improve-readability-of-macros.patch
-Patch611: 0007-device-property-return-EINVAL-when-property-isn-t-fo.patch
-Patch612: 0008-device-property-Fallback-to-secondary-fwnode-if-prim.patch
-Patch613: 0009-device-property-Take-a-copy-of-the-property-set.patch
-Patch614: 0010-driver-core-platform-Add-support-for-built-in-device.patch
-Patch615: 0011-driver-core-Do-not-overwrite-secondary-fwnode-with-N.patch
-Patch616: 0012-mfd-core-propagate-device-properties-to-sub-devices-.patch
-Patch617: 0013-mfd-intel-lpss-Add-support-for-passing-device-proper.patch
-Patch618: 0014-mfd-intel-lpss-Pass-SDA-hold-time-to-I2C-host-contro.patch
-Patch619: 0015-mfd-intel-lpss-Pass-HSUART-configuration-via-propert.patch
-Patch620: 0016-i2c-designware-Convert-to-use-unified-device-propert.patch
-
 #rhbz 1295646
 Patch621: drm-udl-Use-unlocked-gem-unreferencing.patch
 
+#Required for some persistent memory options
+Patch641: disable-CONFIG_EXPERT-for-ZONE_DMA.patch
+
+#rhbz 1302037
+Patch644: wext-fix-message-delay-ordering.patch
+Patch645: cfg80211-wext-fix-message-ordering.patch
+
+#rhbz 1255325
+Patch646: HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch
+
+#rhbz 1309658
+Patch648: 0001-mm-CONFIG_NR_ZONES_EXTENDED.patch
+
+#rhbz 1312102
+Patch649: perf-tools-Fix-python-extension-build.patch
+
 # END OF PATCH DEFINITIONS
 
 %endif
@@ -702,6 +695,7 @@ Requires(pre): %{initrd_prereq}\
 Requires(pre): kernel-libre-firmware >= %{rpmversion}-%{pkg_release}\
 %endif\
 Requires(preun): systemd >= 200\
+Conflicts: xfsprogs < 4.3.0-1\
 Conflicts: xorg-x11-drv-vmmouse < 13.0.99\
 %{expand:%%{?kernel%{?1:_%{1}}_conflicts:Conflicts: %%{kernel%{?1:_%{1}}_conflicts}}}\
 %{expand:%%{?kernel%{?1:_%{1}}_obsoletes:Obsoletes: %%{kernel%{?1:_%{1}}_obsoletes}}}\
@@ -734,6 +728,17 @@ header files define structures and constants that are needed for
 building most standard programs and are also needed for rebuilding the
 glibc package.
 
+%package cross-headers
+Provides: kernel-libre-cross-headers = %{rpmversion}-%{pkg_release}
+Summary: Header files for the Linux kernel for use by cross-glibc
+Group: Development/System
+%description cross-headers
+Kernel-cross-headers includes the C header files that specify the interface
+between the Linux kernel and userspace libraries and programs.  The
+header files define structures and constants that are needed for
+building most standard programs and are also needed for rebuilding the
+cross-glibc package.
+
 %package firmware
 Summary: Firmware files used by the Linux kernel
 Group: Development/System
@@ -744,6 +749,7 @@ Kernel-firmware includes firmware files required for some devices to
 operate.
 
 %package bootwrapper
+Provides: kernel-libre-bootwrapper = %{rpmversion}-%{pkg_release}
 Summary: Boot wrapper files for generating combined kernel + initrd images
 Group: Development/System
 Requires: gzip binutils
@@ -754,6 +760,7 @@ files combining both kernel and initial ramdisk.
 %package debuginfo-common-%{_target_cpu}
 Summary: Kernel source files used by %{name}-debuginfo packages
 Group: Development/Debug
+Provides: installonlypkg(kernel)
 %description debuginfo-common-%{_target_cpu}
 This package is required by %{name}-debuginfo subpackages.
 It provides the kernel source files common to all builds.
@@ -880,6 +887,7 @@ Summary: Debug information for package %{name}%{?1:-%{1}}\
 Group: Development/Debug\
 Requires: %{name}-debuginfo-common-%{_target_cpu} = %{version}-%{release}\
 Provides: %{name}%{?1:-%{1}}-debuginfo-%{_target_cpu} = %{version}-%{release}\
+Provides: installonlypkg(kernel)\
 AutoReqProv: no\
 %description %{?1:%{1}-}debuginfo\
 This package provides debug information for package %{name}%{?1:-%{1}}.\
@@ -976,8 +984,9 @@ This package provides commonly used kernel modules for the %{?2:%{2}-}core kerne
 Provides: kernel-%{1} = %{KVERREL}+%{1}\
 summary: kernel meta-package for the %{1} kernel\
 group: system environment/kernel\
-Requires: kernel-libre-%{1}%{?variant}-core-uname-r = %{KVERREL}%{?variant}+%{1}\
-Requires: kernel-libre-%{1}%{?variant}-modules-uname-r = %{KVERREL}%{?variant}+%{1}\
+Requires: kernel-libre-%{1}-core-uname-r = %{KVERREL}%{?variant}+%{1}\
+Requires: kernel-libre-%{1}-modules-uname-r = %{KVERREL}%{?variant}+%{1}\
+Provides: installonlypkg(kernel-libre)\
 %description %{1}\
 The meta-package for the %{1} kernel\
 %{nil}
@@ -992,8 +1001,9 @@ The meta-package for the %{1} kernel\
 Provides: kernel-%{?1:%{1}-}core = %{KVERREL}%{?1:+%{1}}\
 Summary: %{variant_summary}\
 Group: System Environment/Kernel\
-Provides: kernel-%{?1:%{1}-}core-uname-r = %{KVERREL}%{?variant}%{?1:+%{1}}\
 Provides: kernel-libre-%{?1:%{1}-}core-uname-r = %{KVERREL}%{?variant}%{?1:+%{1}}\
+Provides: kernel-%{?1:%{1}-}core-uname-r = %{KVERREL}%{?variant}%{?1:+%{1}}\
+Provides: installonlypkg(kernel-libre)\
 %{expand:%%kernel_reqprovconf}\
 %if %{?1:1} %{!?1:0} \
 %{expand:%%kernel_meta_package %{?1:%{1}}}\
@@ -1580,9 +1590,35 @@ BuildKernel() {
     if [ -d arch/%{asmarch}/mach-${Flavour}/include ]; then
       cp -a --parents arch/%{asmarch}/mach-${Flavour}/include $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
     fi
+    # include a few files for 'make prepare'
+    cp -a --parents arch/arm/tools/gen-mach-types $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/arm/tools/mach-types $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+
 %endif
     cp -a include $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/include
-
+%ifarch %{ix86} x86_64
+    # files for 'make prepare' to succeed with kernel-devel
+    cp -a --parents arch/x86/entry/syscalls/syscall_32.tbl $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/entry/syscalls/syscalltbl.sh $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/entry/syscalls/syscallhdr.sh $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/entry/syscalls/syscall_64.tbl $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs_32.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs_64.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs_common.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/tools/relocs.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents tools/include/tools/le_byteshift.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/purgatory.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/sha256.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/sha256.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/stack.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/string.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/setup-x86_64.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/purgatory/entry64.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/boot/string.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/boot/string.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+    cp -a --parents arch/x86/boot/ctype.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/
+%endif
     # Make sure the Makefile and version.h have a matching timestamp so that
     # external modules can be built
     touch -r $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/Makefile $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/include/generated/uapi/linux/version.h
@@ -1870,11 +1906,40 @@ find $RPM_BUILD_ROOT/usr/include \
 
 %endif
 
+%if %{with_cross_headers}
+mkdir -p $RPM_BUILD_ROOT/usr/tmp-headers
+make ARCH=%{hdrarch} INSTALL_HDR_PATH=$RPM_BUILD_ROOT/usr/tmp-headers headers_install_all
+
+find $RPM_BUILD_ROOT/usr/tmp-headers/include \
+     \( -name .install -o -name .check -o \
+     	-name ..install.cmd -o -name ..check.cmd \) | xargs rm -f
+
+# Copy all the architectures we care about to their respective asm directories
+for arch in arm arm64 powerpc s390 x86 ; do
+mkdir -p $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include
+mv $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-${arch} $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/asm
+cp -a $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-generic $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/.
+done
+
+# Remove the rest of the architectures
+rm -rf $RPM_BUILD_ROOT/usr/tmp-headers/include/arch*
+rm -rf $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-*
+
+# Copy the rest of the headers over
+for arch in arm arm64 powerpc s390 x86 ; do
+cp -a $RPM_BUILD_ROOT/usr/tmp-headers/include/* $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/.
+done
+
+rm -rf $RPM_BUILD_ROOT/usr/tmp-headers
+%endif
+
 %if %{with_perf}
 # perf tool binary and supporting scripts/binaries
 %{perf_make} DESTDIR=$RPM_BUILD_ROOT lib=%{_lib} install-bin install-traceevent-plugins
 # remove the 'trace' symlink.
 rm -f %{buildroot}%{_bindir}/trace
+# remove the perf-tips
+rm -rf %{buildroot}%{_docdir}/perf-tip
 
 # python-perf extension
 %{perf_make} DESTDIR=$RPM_BUILD_ROOT install-python_ext
@@ -2058,6 +2123,12 @@ fi
 /usr/include/*
 %endif
 
+%if %{with_cross_headers}
+%files cross-headers
+%defattr(-,root,root)
+/usr/*-linux-gnu/include/*
+%endif
+
 %if %{with_firmware}
 %files firmware
 %defattr(-,root,root)
@@ -2184,6 +2255,7 @@ fi
 %defattr(-,root,root)\
 %{expand:%%files %{?2:%{2}-}devel}\
 %defattr(-,root,root)\
+%defverify(not mtime)\
 /usr/src/kernels/%{KVERREL}%{?2:+%{2}}\
 %{expand:%%files %{?2:%{2}-}modules-extra}\
 %defattr(-,root,root)\
@@ -2212,6 +2284,174 @@ fi
 #
 # 
 %changelog
+* Mon Mar  7 2016 Alexandre Oliva <lxoliva@fsfla.org> -libre
+- GNU Linux-libre 4.5-rc7-gnu.
+
+* Mon Mar 07 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc7.git0.1
+- Disable debugging options.
+- Linux v4.5-rc7
+
+* Sat Mar  5 2016 Peter Robinson <pbrobinson@fedoraproject.org>
+- Updates and new SoCs for aarch64 and ARMv7
+- Add aarch64 support for PINE64 and Geekbox devices
+- Fix ethernet naming on Armada 38x devices
+- Serial console fixes for Tegra
+
+* Fri Mar 04 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc6.git3.1
+- Linux v4.5-rc6-41-ge3c2ef4
+
+* Thu Mar 03 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc6.git2.1
+- Linux v4.5-rc6-18-gf983cd3
+
+* Wed Mar 02 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc6.git1.1
+- Linux v4.5-rc6-8-gf691b77
+- Reenable debugging options.
+- enable VIDEO_GO7007
+
+* Mon Feb 29 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc6.git0.1
+- Linux v4.5-rc6
+
+* Mon Feb 29 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- Enable DHT11 (rhbz 1312888)
+- Fix erroneously installed .o files in python-perf subpackage (rhbz 1312102)
+
+* Thu Feb 25 2016 Laura Abbott <labbott@fedoraproject.org>
+- Re-enable ZONE_DMA (rhbz 1309658)
+
+* Thu Feb 25 2016 Peter Robinson <pbrobinson@fedoraproject.org> 4.5.0-0.rc5.git0.2
+- Fix tegra nouveau module load (thank kwizart for reference)
+- PowerPC Little Endian ToC fix
+
+* Sun Feb 21 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc5.git0.1
+- Disable debugging options.
+- Linux v4.5-rc5
+
+* Fri Feb 19 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc4.git3.1
+- Linux v4.5-rc4-137-g23300f6
+
+* Thu Feb 18 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc4.git2.1
+- Linux v4.5-rc4-95-g2850713
+
+* Wed Feb 17 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc4.git1.1
+- Linux v4.5-rc4-37-g65c23c6
+- Reenable debugging options.
+
+* Tue Feb 16 2016 Peter Robinson <pbrobinson@fedoraproject.org>
+- Minor Aarch64 cleanups
+
+* Mon Feb 15 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc4.git0.1
+- Disable debugging options.
+- Linux v4.5-rc4
+
+* Fri Feb 12 2016 Laura Abbott <labbott@fedoraproject.org>
+- Fix warning spew from vmware sockets (rhbz 1288684)
+
+* Fri Feb 12 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc3.git3.1
+- Linux v4.5-rc3-83-gc05235d
+
+* Thu Feb 11 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc3.git2.1
+- Linux v4.5-rc3-57-g721675f
+
+* Tue Feb 09 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc3.git1.1
+- Linux v4.5-rc3-19-g7cf91ad
+
+* Tue Feb  9 2016 Laura Abbott <labbott@fedoraproject.org>
+- Let 'make prepare' succeed with kernel-devel
+
+* Tue Feb  9 2016 Peter Robinson <pbrobinson@fedoraproject.org> 4.5.0-0.rc3.git0.2
+- Fix Power64 kernel build
+
+* Mon Feb 08 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc3.git0.1
+- Disable debugging options.
+- Linux v4.5-rc3
+
+* Fri Feb 05 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc2.git3.1
+- Linux v4.5-rc2-212-gdf48ab3
+
+* Wed Feb 03 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc2.git2.1
+- Linux v4.5-rc2-192-gb37a05c
+
+* Tue Feb 02 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc2.git1.1
+- Linux v4.5-rc2-163-g34229b2
+- Reenable debugging options.
+
+* Mon Feb 01 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc1.git0.1
+- Disable debugging options.
+- Linux v4.5-rc2
+
+* Fri Jan 29 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- Backport HID sony patch to fix some gamepads (rhbz 1255235)
+
+* Fri Jan 29 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc1.git2.1
+- Linux v4.5-rc1-32-g26cd836
+
+* Thu Jan 28 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- Add patches to fix suprious NEWLINK netlink messages (rhbz 1302037)
+
+* Thu Jan 28 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc1.git1.1
+- Linux v4.5-rc1-28-g03c21cb
+- Reenable debugging options.
+
+* Wed Jan 27 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc1.git0.2
+- Only apply KEY_FLAG_KEEP to a key if a parent keyring has it set (rhbz 1301099)
+
+* Mon Jan 25 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc1.git0.1
+- Disable debugging options.
+- Linux v4.5-rc1
+
+* Fri Jan 22 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git9.1
+- Linux v4.4-10454-g3e1e21c
+
+* Fri Jan 22 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- Fix backtrace from PNP conflict on Haswell-ULT (rhbz 1300955)
+
+* Thu Jan 21 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git8.1
+- Linux v4.4-10062-g30f0530
+
+* Thu Jan 21 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- Fix incorrect country code issue on RTL8812AE devices (rhbz 1279653)
+
+* Wed Jan 20 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git7.1
+- Linux v4.4-8950-g2b4015e
+
+* Wed Jan 20 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- CVE-2016-0723 memory disclosure and crash in tty layer (rhbz 1296253 1300224)
+
+* Tue Jan 19 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git6.1
+- Linux v4.4-8855-ga200dcb
+- CVE-2016-0728 Keys: reference leak in join_session_keyring (rhbz 1296623)
+
+* Tue Jan 19 2016 Peter Robinson <pbrobinson@fedoraproject.org>
+- Fix boot on TI am33xx/omap devices
+
+* Mon Jan 18 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git5.1
+- Linux v4.4-8606-g5807fca
+
+* Sun Jan 17 2016 Peter Robinson <pbrobinson@fedoraproject.org>
+- Minor updates and cleanups to aarch64/ARMv7/PowerPC
+- ARM: enable nvmem drivers
+- Build usb gadget/OTG on aarch64
+
+* Fri Jan 15 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git4.1
+- Linux v4.4-5966-g7d1fc01
+
+* Thu Jan 14 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git3.1
+- Linux v4.4-5593-g7fdec82
+
+* Wed Jan 13 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git2.1
+- Linux v4.4-3408-g6799060
+
+* Tue Jan 12 2016 Justin M. Forbes <jforbes@fedoraproject.org>
+- drop i915 patch to turn off wc mmaps
+
+* Tue Jan 12 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc0.git1.1
+- Linux v4.4-1175-g03891f9
+- Reenable debugging options.
+
+* Tue Jan 12 2016 Josh Boyer <jwboyer@fedoraproject.org>
+- CVE-2015-7566 usb: visor: Crash on invalid USB dev descriptors (rhbz 1296466 1297517)
+- Fix backtrace from PNP conflict on Broadwell (rhbz 1083853)
+
 * Tue Jan 12 2016 Alexandre Oliva <lxoliva@fsfla.org> -libre
 - GNU Linux-libre 4.4-gnu.
 
diff --git a/freed-ora/current/f24/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch b/freed-ora/current/f24/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch
deleted file mode 100644
index dfedd2ab0..000000000
--- a/freed-ora/current/f24/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 567a18f57213647e2c31bbdc7f6b8f9991d22fad Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Fri, 13 Nov 2015 19:03:29 +0000
-Subject: [PATCH] mfd: wm8994: Ensure that the whole MFD is built into a single
- module
-
-Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
----
- drivers/mfd/Makefile | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
-index a59e3fc..4a767ef 100644
---- a/drivers/mfd/Makefile
-+++ b/drivers/mfd/Makefile
-@@ -61,7 +61,8 @@ wm8350-objs			:= wm8350-core.o wm8350-regmap.o wm8350-gpio.o
- wm8350-objs			+= wm8350-irq.o
- obj-$(CONFIG_MFD_WM8350)	+= wm8350.o
- obj-$(CONFIG_MFD_WM8350_I2C)	+= wm8350-i2c.o
--obj-$(CONFIG_MFD_WM8994)	+= wm8994-core.o wm8994-irq.o wm8994-regmap.o
-+wm8994-objs			:= wm8994-core.o wm8994-irq.o wm8994-regmap.o
-+obj-$(CONFIG_MFD_WM8994)	+= wm8994.o
- 
- obj-$(CONFIG_TPS6105X)		+= tps6105x.o
- obj-$(CONFIG_TPS65010)		+= tps65010.o
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/patch-4.4-gnu-4.5-rc7-gnu.xz.sign b/freed-ora/current/f24/patch-4.4-gnu-4.5-rc7-gnu.xz.sign
new file mode 100644
index 000000000..6edb409b0
--- /dev/null
+++ b/freed-ora/current/f24/patch-4.4-gnu-4.5-rc7-gnu.xz.sign
@@ -0,0 +1,7 @@
+-----BEGIN PGP SIGNATURE-----
+Version: GnuPG v2
+
+iEYEABECAAYFAlbdC0sACgkQvLfPh359R6fXvQCgrNkL5wN1uUD04hXwVnbDYR5b
+d9oAoI38TgCBSnndUdcqK+SDDrsjrpAu
+=ywQq
+-----END PGP SIGNATURE-----
diff --git a/freed-ora/current/f24/perf-tools-Fix-python-extension-build.patch b/freed-ora/current/f24/perf-tools-Fix-python-extension-build.patch
new file mode 100644
index 000000000..cdca4a69b
--- /dev/null
+++ b/freed-ora/current/f24/perf-tools-Fix-python-extension-build.patch
@@ -0,0 +1,71 @@
+From 99b0044d511e16fb373df6d8a4e011d4804432c4 Mon Sep 17 00:00:00 2001
+From: Jiri Olsa <jolsa@redhat.com>
+Date: Sat, 27 Feb 2016 21:21:12 +0100
+Subject: [PATCH] perf tools: Fix python extension build
+
+On Fri, Feb 26, 2016 at 11:59:03PM +0100, Jiri Olsa wrote:
+> On Fri, Feb 26, 2016 at 05:49:02PM -0500, Josh Boyer wrote:
+>
+> SNIP
+>
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/perf/util/evsel.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/perf/util/trace-event.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/perf/util/xyarray.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/perf/util/python.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/perf/util/ctype.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/perf/util/cgroup.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/perf/util/rblist.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/perf/util/string.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/lib
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/lib/hweight.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/lib/rbtree.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/lib/bitmap.o
+> > > ./python_ext_build/tmp/home/jolsa/kernel/linux-perf/tools/lib/find_bit.o
+> > >
+> > > not sure we want to come up with some 'nicer' solution
+> >
+> > I don't think anything under python_ext_build/tmp/ actually matters in
+> > any significant way.  As long as this doesn't negatively impact
+> > something via side-effect, it's probably good enough.
+>
+> right, and it's probably generic sollution too
+>
+> >
+> > Will you write up a full patch?
+>
+> yep, will post it tomorrow
+>
+> jirka
+
+sending full patch
+
+jirka
+---
+ tools/perf/util/setup.py | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/tools/perf/util/setup.py b/tools/perf/util/setup.py
+index 1833103768cb..c8680984d2d6 100644
+--- a/tools/perf/util/setup.py
++++ b/tools/perf/util/setup.py
+@@ -22,6 +22,7 @@ cflags = getenv('CFLAGS', '').split()
+ # switch off several checks (need to be at the end of cflags list)
+ cflags += ['-fno-strict-aliasing', '-Wno-write-strings', '-Wno-unused-parameter' ]
+ 
++src_perf  = getenv('srctree') + '/tools/perf'
+ build_lib = getenv('PYTHON_EXTBUILD_LIB')
+ build_tmp = getenv('PYTHON_EXTBUILD_TMP')
+ libtraceevent = getenv('LIBTRACEEVENT')
+@@ -30,6 +31,9 @@ libapikfs = getenv('LIBAPI')
+ ext_sources = [f.strip() for f in file('util/python-ext-sources')
+ 				if len(f.strip()) > 0 and f[0] != '#']
+ 
++# use full paths with source files
++ext_sources = map(lambda x: '%s/%s' % (src_perf, x) , ext_sources)
++
+ perf = Extension('perf',
+ 		  sources = ext_sources,
+ 		  include_dirs = ['util/include'],
+-- 
+2.5.0
+
diff --git a/freed-ora/current/f24/ptrace-being-capable-wrt-a-process-requires-mapped-u.patch b/freed-ora/current/f24/ptrace-being-capable-wrt-a-process-requires-mapped-u.patch
deleted file mode 100644
index 55c3ab9d1..000000000
--- a/freed-ora/current/f24/ptrace-being-capable-wrt-a-process-requires-mapped-u.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 64a37c8197f4e1c2637cd80326f4649282176369 Mon Sep 17 00:00:00 2001
-From: Jann Horn <jann@thejh.net>
-Date: Sat, 26 Dec 2015 03:52:31 +0100
-Subject: [PATCH] ptrace: being capable wrt a process requires mapped uids/gids
-
-ptrace_has_cap() checks whether the current process should be
-treated as having a certain capability for ptrace checks
-against another process. Until now, this was equivalent to
-has_ns_capability(current, target_ns, CAP_SYS_PTRACE).
-
-However, if a root-owned process wants to enter a user
-namespace for some reason without knowing who owns it and
-therefore can't change to the namespace owner's uid and gid
-before entering, as soon as it has entered the namespace,
-the namespace owner can attach to it via ptrace and thereby
-gain access to its uid and gid.
-
-While it is possible for the entering process to switch to
-the uid of a claimed namespace owner before entering,
-causing the attempt to enter to fail if the claimed uid is
-wrong, this doesn't solve the problem of determining an
-appropriate gid.
-
-With this change, the entering process can first enter the
-namespace and then safely inspect the namespace's
-properties, e.g. through /proc/self/{uid_map,gid_map},
-assuming that the namespace owner doesn't have access to
-uid 0.
-
-Changed in v2: The caller needs to be capable in the
-namespace into which tcred's uids/gids can be mapped.
-
-Signed-off-by: Jann Horn <jann@thejh.net>
----
- kernel/ptrace.c | 33 ++++++++++++++++++++++++++++-----
- 1 file changed, 28 insertions(+), 5 deletions(-)
-
-diff --git a/kernel/ptrace.c b/kernel/ptrace.c
-index 787320de68e0..407c382b45c8 100644
---- a/kernel/ptrace.c
-+++ b/kernel/ptrace.c
-@@ -20,6 +20,7 @@
- #include <linux/uio.h>
- #include <linux/audit.h>
- #include <linux/pid_namespace.h>
-+#include <linux/user_namespace.h>
- #include <linux/syscalls.h>
- #include <linux/uaccess.h>
- #include <linux/regset.h>
-@@ -207,12 +208,34 @@ static int ptrace_check_attach(struct task_struct *child, bool ignore_state)
- 	return ret;
- }
- 
--static int ptrace_has_cap(struct user_namespace *ns, unsigned int mode)
-+static bool ptrace_has_cap(const struct cred *tcred, unsigned int mode)
- {
-+	struct user_namespace *tns = tcred->user_ns;
-+
-+	/* When a root-owned process enters a user namespace created by a
-+	 * malicious user, the user shouldn't be able to execute code under
-+	 * uid 0 by attaching to the root-owned process via ptrace.
-+	 * Therefore, similar to the capable_wrt_inode_uidgid() check,
-+	 * verify that all the uids and gids of the target process are
-+	 * mapped into a namespace below the current one in which the caller
-+	 * is capable.
-+	 * No fsuid/fsgid check because __ptrace_may_access doesn't do it
-+	 * either.
-+	 */
-+	while (
-+	    !kuid_has_mapping(tns, tcred->euid) ||
-+	    !kuid_has_mapping(tns, tcred->suid) ||
-+	    !kuid_has_mapping(tns, tcred->uid)  ||
-+	    !kgid_has_mapping(tns, tcred->egid) ||
-+	    !kgid_has_mapping(tns, tcred->sgid) ||
-+	    !kgid_has_mapping(tns, tcred->gid)) {
-+		tns = tns->parent;
-+	}
-+
- 	if (mode & PTRACE_MODE_NOAUDIT)
--		return has_ns_capability_noaudit(current, ns, CAP_SYS_PTRACE);
-+		return has_ns_capability_noaudit(current, tns, CAP_SYS_PTRACE);
- 	else
--		return has_ns_capability(current, ns, CAP_SYS_PTRACE);
-+		return has_ns_capability(current, tns, CAP_SYS_PTRACE);
- }
- 
- /* Returns 0 on success, -errno on denial. */
-@@ -241,7 +264,7 @@ static int __ptrace_may_access(struct task_struct *task, unsigned int mode)
- 	    gid_eq(cred->gid, tcred->sgid) &&
- 	    gid_eq(cred->gid, tcred->gid))
- 		goto ok;
--	if (ptrace_has_cap(tcred->user_ns, mode))
-+	if (ptrace_has_cap(tcred, mode))
- 		goto ok;
- 	rcu_read_unlock();
- 	return -EPERM;
-@@ -252,7 +275,7 @@ ok:
- 		dumpable = get_dumpable(task->mm);
- 	rcu_read_lock();
- 	if (dumpable != SUID_DUMP_USER &&
--	    !ptrace_has_cap(__task_cred(task)->user_ns, mode)) {
-+	    !ptrace_has_cap(__task_cred(task), mode)) {
- 		rcu_read_unlock();
- 		return -EPERM;
- 	}
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/rebase-notes.txt b/freed-ora/current/f24/rebase-notes.txt
index 3dc278a2c..0b077dd37 100644
--- a/freed-ora/current/f24/rebase-notes.txt
+++ b/freed-ora/current/f24/rebase-notes.txt
@@ -1,3 +1,8 @@
+Linux 4.5 rebase notes:
+
+- Check on status of drm-i915-turn-off-wc-mmaps.patch
+- Check on status of disabled ZONE_DMA
+
 Linux 4.4 rebase notes:
 
 CONFIG_RTL8XXXU_UNTESTED should be turned off. Great for rawhide, not for stable
diff --git a/freed-ora/current/f24/sources b/freed-ora/current/f24/sources
index 25a9f1ce7..6ed5913df 100644
--- a/freed-ora/current/f24/sources
+++ b/freed-ora/current/f24/sources
@@ -1,2 +1,3 @@
 5f34e3272b5229cd1868113e321267bd  linux-libre-4.4-gnu.tar.xz
 dcbc8fe378a676d5d0dd208cf524e144  perf-man-4.4.tar.gz
+0fa33e50a2f4962a65ee0e13ae280163  patch-4.4-gnu-4.5-rc7-gnu.xz
diff --git a/freed-ora/current/f24/usbvision-fix-crash-on-detecting-device-with-invalid.patch b/freed-ora/current/f24/usbvision-fix-crash-on-detecting-device-with-invalid.patch
deleted file mode 100644
index a03e37907..000000000
--- a/freed-ora/current/f24/usbvision-fix-crash-on-detecting-device-with-invalid.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 2ea39fc263c6a7589e15edb7d2d1c89fa569be53 Mon Sep 17 00:00:00 2001
-From: Vladis Dronov <vdronov@redhat.com>
-Date: Mon, 16 Nov 2015 15:55:11 -0200
-Subject: [PATCH] usbvision: fix crash on detecting device with invalid
- configuration
-
-The usbvision driver crashes when a specially crafted usb device with invalid
-number of interfaces or endpoints is detected. This fix adds checks that the
-device has proper configuration expected by the driver.
-
-Reported-by: Ralf Spenneberg <ralf@spenneberg.net>
-Signed-off-by: Vladis Dronov <vdronov@redhat.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
----
- drivers/media/usb/usbvision/usbvision-video.c | 16 +++++++++++++++-
- 1 file changed, 15 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/media/usb/usbvision/usbvision-video.c b/drivers/media/usb/usbvision/usbvision-video.c
-index b693206f66dd..d1dc1a198e3e 100644
---- a/drivers/media/usb/usbvision/usbvision-video.c
-+++ b/drivers/media/usb/usbvision/usbvision-video.c
-@@ -1463,9 +1463,23 @@ static int usbvision_probe(struct usb_interface *intf,
- 
- 	if (usbvision_device_data[model].interface >= 0)
- 		interface = &dev->actconfig->interface[usbvision_device_data[model].interface]->altsetting[0];
--	else
-+	else if (ifnum < dev->actconfig->desc.bNumInterfaces)
- 		interface = &dev->actconfig->interface[ifnum]->altsetting[0];
-+	else {
-+		dev_err(&intf->dev, "interface %d is invalid, max is %d\n",
-+		    ifnum, dev->actconfig->desc.bNumInterfaces - 1);
-+		ret = -ENODEV;
-+		goto err_usb;
-+	}
-+
-+	if (interface->desc.bNumEndpoints < 2) {
-+		dev_err(&intf->dev, "interface %d has %d endpoints, but must"
-+		    " have minimum 2\n", ifnum, interface->desc.bNumEndpoints);
-+		ret = -ENODEV;
-+		goto err_usb;
-+	}
- 	endpoint = &interface->endpoint[1].desc;
-+
- 	if (!usb_endpoint_xfer_isoc(endpoint)) {
- 		dev_err(&intf->dev, "%s: interface %d. has non-ISO endpoint!\n",
- 		    __func__, ifnum);
--- 
-2.5.0
-
diff --git a/freed-ora/current/f24/watchdog-Disable-watchdog-on-virtual-machines.patch b/freed-ora/current/f24/watchdog-Disable-watchdog-on-virtual-machines.patch
index 11bce5bb7..0a988c189 100644
--- a/freed-ora/current/f24/watchdog-Disable-watchdog-on-virtual-machines.patch
+++ b/freed-ora/current/f24/watchdog-Disable-watchdog-on-virtual-machines.patch
@@ -25,9 +25,9 @@ index 18f34cf..6aadffe 100644
 --- a/kernel/watchdog.c
 +++ b/kernel/watchdog.c
 @@ -20,6 +20,7 @@
- #include <linux/smpboot.h>
  #include <linux/sched/rt.h>
  #include <linux/tick.h>
+ #include <linux/workqueue.h>
 +#include <linux/dmi.h>
  
  #include <asm/irq_regs.h>
diff --git a/freed-ora/current/f24/wext-fix-message-delay-ordering.patch b/freed-ora/current/f24/wext-fix-message-delay-ordering.patch
new file mode 100644
index 000000000..109b68da3
--- /dev/null
+++ b/freed-ora/current/f24/wext-fix-message-delay-ordering.patch
@@ -0,0 +1,122 @@
+From 8bf862739a7786ae72409220914df960a0aa80d8 Mon Sep 17 00:00:00 2001
+From: Johannes Berg <johannes.berg@intel.com>
+Date: Wed, 27 Jan 2016 12:37:52 +0100
+Subject: wext: fix message delay/ordering
+
+Beniamino reported that he was getting an RTM_NEWLINK message for a
+given interface, after the RTM_DELLINK for it. It turns out that the
+message is a wireless extensions message, which was sent because the
+interface had been connected and disconnection while it was deleted
+caused a wext message.
+
+For its netlink messages, wext uses RTM_NEWLINK, but the message is
+without all the regular rtnetlink attributes, so "ip monitor link"
+prints just rudimentary information:
+
+5: wlan1: <BROADCAST,MULTICAST> mtu 1500 qdisc mq state DOWN group default
+    link/ether 02:00:00:00:01:00 brd ff:ff:ff:ff:ff:ff
+Deleted 5: wlan1: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN group default
+    link/ether 02:00:00:00:01:00 brd ff:ff:ff:ff:ff:ff
+5: wlan1: <BROADCAST,MULTICAST,UP>
+    link/ether
+(from my hwsim reproduction)
+
+This can cause userspace to get confused since it doesn't expect an
+RTM_NEWLINK message after RTM_DELLINK.
+
+The reason for this is that wext schedules a worker to send out the
+messages, and the scheduling delay can cause the messages to get out
+to userspace in different order.
+
+To fix this, have wext register a netdevice notifier and flush out
+any pending messages when netdevice state changes. This fixes any
+ordering whenever the original message wasn't sent by a notifier
+itself.
+
+Cc: stable@vger.kernel.org
+Reported-by: Beniamino Galvani <bgalvani@redhat.com>
+Signed-off-by: Johannes Berg <johannes.berg@intel.com>
+---
+ net/wireless/wext-core.c | 51 +++++++++++++++++++++++++++++++++++++-----------
+ 1 file changed, 40 insertions(+), 11 deletions(-)
+
+diff --git a/net/wireless/wext-core.c b/net/wireless/wext-core.c
+index c8717c1..87dd619 100644
+--- a/net/wireless/wext-core.c
++++ b/net/wireless/wext-core.c
+@@ -342,6 +342,39 @@ static const int compat_event_type_size[] = {
+ 
+ /* IW event code */
+ 
++static void wireless_nlevent_flush(void)
++{
++	struct sk_buff *skb;
++	struct net *net;
++
++	ASSERT_RTNL();
++
++	for_each_net(net) {
++		while ((skb = skb_dequeue(&net->wext_nlevents)))
++			rtnl_notify(skb, net, 0, RTNLGRP_LINK, NULL,
++				    GFP_KERNEL);
++	}
++}
++
++static int wext_netdev_notifier_call(struct notifier_block *nb,
++				     unsigned long state, void *ptr)
++{
++	/*
++	 * When a netdev changes state in any way, flush all pending messages
++	 * to avoid them going out in a strange order, e.g. RTM_NEWLINK after
++	 * RTM_DELLINK, or with IFF_UP after without IFF_UP during dev_close()
++	 * or similar - all of which could otherwise happen due to delays from
++	 * schedule_work().
++	 */
++	wireless_nlevent_flush();
++
++	return NOTIFY_OK;
++}
++
++static struct notifier_block wext_netdev_notifier = {
++	.notifier_call = wext_netdev_notifier_call,
++};
++
+ static int __net_init wext_pernet_init(struct net *net)
+ {
+ 	skb_queue_head_init(&net->wext_nlevents);
+@@ -360,7 +393,12 @@ static struct pernet_operations wext_pernet_ops = {
+ 
+ static int __init wireless_nlevent_init(void)
+ {
+-	return register_pernet_subsys(&wext_pernet_ops);
++	int err = register_pernet_subsys(&wext_pernet_ops);
++
++	if (err)
++		return err;
++
++	return register_netdevice_notifier(&wext_netdev_notifier);
+ }
+ 
+ subsys_initcall(wireless_nlevent_init);
+@@ -368,17 +406,8 @@ subsys_initcall(wireless_nlevent_init);
+ /* Process events generated by the wireless layer or the driver. */
+ static void wireless_nlevent_process(struct work_struct *work)
+ {
+-	struct sk_buff *skb;
+-	struct net *net;
+-
+ 	rtnl_lock();
+-
+-	for_each_net(net) {
+-		while ((skb = skb_dequeue(&net->wext_nlevents)))
+-			rtnl_notify(skb, net, 0, RTNLGRP_LINK, NULL,
+-				    GFP_KERNEL);
+-	}
+-
++	wireless_nlevent_flush();
+ 	rtnl_unlock();
+ }
+ 
+-- 
+cgit v0.12
+