diff options
Diffstat (limited to 'catalog/csv/formulae.csv')
| -rw-r--r-- | catalog/csv/formulae.csv | 74 |
1 files changed, 37 insertions, 37 deletions
diff --git a/catalog/csv/formulae.csv b/catalog/csv/formulae.csv index 64ea610..936cf03 100644 --- a/catalog/csv/formulae.csv +++ b/catalog/csv/formulae.csv @@ -1,37 +1,37 @@ -Group,Formula Name,Formula Description,Formula,Grouped,Event Name -0,MCD_RETRY_DINC_PERSEC,Total number of Retries per second With Domain Increment indication seen on Port0 and Port1 of MCD,(PM_MCD_CHECK_RTY_DINC/PM_PB_CYC) * PB_Freq,y,PM_MCD_CHECK_RTY_DINC -0,TOTAL_INT_PB_BW,Total internal PB Bandwidth in bytes/sec,((PM_PB_INT_DATA_XFER * 512) / PM_PB_CYC) * PB_Freq ,y,PM_PB_INT_DATA_XFER -0,TOTAL_EXT_PB_BW,Total external PB Bandwidth in bytes/sec,((PM_PB_EXT_DATA_XFER * 512) / PM_PB_CYC) * PB_Freq ,y,PM_PB_EXT_DATA_XFER -1,TOTAL_SYSTEM_PUMPS_PERSEC,Sum of System Pumps on P0 and P1 in bytes/sec,((PM_PB_SYS_PUMP) / PM_PB_CYC) * PB_Freq ,n,PM_PB_SYS_PUMP -1,TOTAL_NODE_PUMPS_PERSEC,Sum of Node Pumps on P0 and P1 in bytes/sec,((PM_PB_NODE_PUMP) / PM_PB_CYC) * PB_Freq ,n,PM_PB_NODE_PUMP -1,TOTAL_SYSTEM_PUMP_RETRY_PERSEC,Total number of System pump Retries seen on P0 and P1 in bytes/sec,((PM_PB_SYS_PUMP_RTY) / PM_PB_CYC) * PB_Freq ,n,PM_PB_SYS_PUMP_RTY -1,TOTAL_NODE_PUMP_RETRY_PERSEC,Total number of Node pump Retries seen on P0 and P1 in bytes/sec,((PM_PB_NODE_PUMP_RTY) / PM_PB_CYC) * PB_Freq ,n,PM_PB_NODE_PUMP_RTY -2,TOTAL_MC0_READ_BW,Total Read Bandwidth seen on both MCS of MC0 in bytes/sec,PM_MCS_UP_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC ,n,PM_MCS_UP_128B_DATA_XFER_MC0 -2,TOTAL_MC1_READ_BW,Total Read Bandwidth seen on both MCS of MC1 in bytes/sec,PM_MCS_UP_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC ,n,PM_MCS_UP_128B_DATA_XFER_MC1 -2,TOTAL_MC2_READ_BW,Total Read Bandwidth seen on both MCS of MC2 in bytes/sec,PM_MCS_UP_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC ,n,PM_MCS_UP_128B_DATA_XFER_MC2 -2,TOTAL_MC3_READ_BW,Total Read Bandwidth seen on both MCS of MC3 in bytes/sec,PM_MCS_UP_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC ,n,PM_MCS_UP_128B_DATA_XFER_MC3 -3,TOTAL_MC0_WRITE_BW,Total Write Bandwidth seen on both MCS of MC0 in bytes/sec,PM_MCS_DOWN_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC ,n,PM_MCS_DOWN_128B_DATA_XFER_MC0 -3,TOTAL_MC1_WRITE_BW,Total Write Bandwidth seen on both MCS of MC1 in bytes/sec,PM_MCS_DOWN_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC ,n,PM_MCS_DOWN_128B_DATA_XFER_MC1 -3,TOTAL_MC2_WRITE_BW,Total Write Bandwidth seen on both MCS of MC2 in bytes/sec,PM_MCS_DOWN_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC ,n,PM_MCS_DOWN_128B_DATA_XFER_MC2 -3,TOTAL_MC3_WRITE_BW,Total Write Bandwidth seen on both MCS of MC3 in bytes/sec,PM_MCS_DOWN_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC ,n,PM_MCS_DOWN_128B_DATA_XFER_MC3 -4,TOTAL_INBOUND_XLINK0_BW,Total X-Link0 inbound data cycles in bytes/sec,(PM_XLINK0_IN_DATA_CYC * 8 * XBUS_Freq) / PM_XLINK_CYCLES,y,PM_XLINK0_IN_DATA_CYC -4,TOTAL_INBOUND_XLINK1_BW,Total X-Link1 inbound data cycles in bytes/sec,(PM_XLINK1_IN_DATA_CYC * 8 * XBUS_Freq) / PM_XLINK_CYCLES,y,PM_XLINK1_IN_DATA_CYC -4,TOTAL_INBOUND_XLINK2_BW,Total X-Link2 inbound data cycles in bytes/sec,(PM_XLINK2_IN_DATA_CYC * 8 * XBUS_Freq) / PM_XLINK_CYCLES,y,PM_XLINK2_IN_DATA_CYC -5,TOTAL_XLINK0_UTILISATION%,Total X-Link0 inbound Idle cycles,(1- PM_XLINK0_IN_IDL_CYC/PM_XLINK_CYCLES)*100,y,PM_XLINK0_IN_IDL_CYC -5,TOTAL_XLINK1_UTILISATION%,Total X-Link1 inbound Idle cycles,(1- PM_XLINK1_IN_IDL_CYC/PM_XLINK_CYCLES)*100,y,PM_XLINK1_IN_IDL_CYC -5,TOTAL_XLINK2_UTILISATION%,Total X-Link2 inbound Idle cycles,(1- PM_XLINK2_IN_IDL_CYC/PM_XLINK_CYCLES)*100,y,PM_XLINK2_IN_IDL_CYC -6,TOTAL_INBOUND_ALINK0_BW,Total A-Link0 inbound data cycles in bytes/sec,(PM_ALINK0_IN_DATA_CYC * 8 * ABUS_Freq) / PM_ALINK_CYCLES,y,PM_ALINK0_IN_DATA_CYC -6,TOTAL_INBOUND_ALINK1_BW,Total A-Link1 inbound data cycles in bytes/sec,(PM_ALINK1_IN_DATA_CYC * 8 * ABUS_Freq) / PM_ALINK_CYCLES,y,PM_ALINK1_IN_DATA_CYC -6,TOTAL_INBOUND_ALINK2_BW,Total A-Link2 inbound data cycles in bytes/sec,(PM_ALINK2_IN_DATA_CYC * 8 * ABUS_Freq) / PM_ALINK_CYCLES,y,PM_ALINK2_IN_DATA_CYC -7,TOTAL_ALINK0_UTILISATION%,Total A-Link0 inbound Idle cycles,(1- PM_ALINK0_IN_IDL_CYC/PM_ALINK_CYCLES)*100,y,PM_ALINK0_IN_IDL_CYC -7,TOTAL_ALINK1_UTILISATION%,Total A-Link1 inbound Idle cycles,(1- PM_ALINK1_IN_IDL_CYC/PM_ALINK_CYCLES)*100,y,PM_ALINK1_IN_IDL_CYC -7,TOTAL_ALINK2_UTILISATION%,Total A-Link2 inbound Idle cycles,(1- PM_ALINK2_IN_IDL_CYC/PM_ALINK_CYCLES)*100,y,PM_ALINK2_IN_IDL_CYC -8,TOTAL_PHB0_DMA_BW,"DMA (any, read or write) BW received from the PCIE link for PHB 0",((PM_PHB_ANY_DMA_RCV_PHB0) *256/ PM_PHB_CYC_CNT_PHB0) * PHB_Freq ,y,PM_PHB_ANY_DMA_RCV_PHB0 -8,TOTAL_PHB0_TCE_MISS_PERSEC,Total TCE Cache Miss any(Read or Write) for PHB 0 per second,((PM_PHB_ANY_TCE_MISS_PHB0) / PM_PHB_CYC_CNT_PHB0) * PHB_Freq ,y,PM_PHB_ANY_TCE_MISS_PHB0 -8,TOTAL_PHB0_MSI_INTR_PERSEC,Total MSI interrupt received from PCIE link for PHB 0 per second,((PM_PHB_MSI_INTR_PHB0) / PM_PHB_CYC_CNT_PHB0) * PHB_Freq ,y,PM_PHB_MSI_INTR_PHB0 -9,TOTAL_PHB1_DMA_BW,"DMA (any, read or write) BW received from the PCIE link for PHB 1",((PM_PHB_ANY_DMA_RCV_PHB1) *256/ PM_PHB_CYC_CNT_PHB1) * PHB_Freq ,y,PM_PHB_ANY_DMA_RCV_PHB1 -9,TOTAL_PHB1_TCE_MISS_PERSEC,Total TCE Cache Miss any(Read or Write) for PHB 1 per second,((PM_PHB_ANY_TCE_MISS_PHB1) / PM_PHB_CYC_CNT_PHB1) * PHB_Freq ,y,PM_PHB_ANY_TCE_MISS_PHB1 -9,TOTAL_PHB1_MSI_INTR_PERSEC,Total MSI interrupt received from PCIE link for PHB 1 per second,((PM_PHB_MSI_INTR_PHB1) / PM_PHB_CYC_CNT_PHB1) * PHB_Freq ,y,PM_PHB_MSI_INTR_PHB1 -10,TOTAL_PHB2_DMA_BW,"DMA (any, read or write) BW received from the PCIE link for PHB 2",((PM_PHB_ANY_DMA_RCV_PHB2) *256/ PM_PHB_CYC_CNT_PHB2) * PHB_Freq ,y,PM_PHB_ANY_DMA_RCV_PHB2 -10,TOTAL_PHB2_TCE_MISS_PERSEC,Total TCE Cache Miss any(Read or Write) for PHB 2 per second,((PM_PHB_ANY_TCE_MISS_PHB2) / PM_PHB_CYC_CNT_PHB2) * PHB_Freq ,y,PM_PHB_ANY_TCE_MISS_PHB2 -10,TOTAL_PHB2_MSI_INTR_PERSEC,Total MSI interrupt received from PCIE link for PHB 2 per second,((PM_PHB_MSI_INTR_PHB2) / PM_PHB_CYC_CNT_PHB2) * PHB_Freq ,y,PM_PHB_MSI_INTR_PHB2 +Formula Name,Group,Grouped,flag,Formula Description,Formula,Unit +MCD_RETRY_DINC_PERSEC,0,y,4,Total number of Retries per second With Domain Increment indication seen on Port0 and Port1 of MCD,(PM_MCD_CHECK_RTY_DINC/PM_PB_CYC) * PB_Freq, +TOTAL_INT_PB_BW,0,y,4,Total internal PB Bandwidth,((PM_PB_INT_DATA_XFER * 512) / PM_PB_CYC) * PB_Freq,bytes/sec +TOTAL_EXT_PB_BW,0,y,4,Total external PB Bandwidth,((PM_PB_EXT_DATA_XFER * 512) / PM_PB_CYC) * PB_Freq,bytes/sec +TOTAL_SYSTEM_PUMPS_PERSEC,0,0,((PM_PB_SYS_PUMP) / PM_PB_CYC) * PB_Freq,bytes/sec, +TOTAL_NODE_PUMPS_PERSEC,0,0,((PM_PB_NODE_PUMP) / PM_PB_CYC) * PB_Freq,bytes/sec, +TOTAL_SYSTEM_PUMP_RETRY_PERSEC,0,0,((PM_PB_SYS_PUMP_RTY) / PM_PB_CYC) * PB_Freq,bytes/sec, +TOTAL_NODE_PUMP_RETRY_PERSEC,0,0,((PM_PB_NODE_PUMP_RTY) / PM_PB_CYC) * PB_Freq,bytes/sec, +TOTAL_MC0_READ_BW,0,0,PM_MCS_UP_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC,bytes/sec, +TOTAL_MC1_READ_BW,0,0,PM_MCS_UP_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC,bytes/sec, +TOTAL_MC2_READ_BW,0,0,PM_MCS_UP_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC,bytes/sec, +TOTAL_MC3_READ_BW,0,0,PM_MCS_UP_128B_DATA_XFER*128*PB_Freq)/ PM_PB_CYC,bytes/sec, +TOTAL_MC0_WRITE_BW,0,0,PM_MCS_DOWN_128B_DATA_XFER_MC0*128*PB_Freq)/ PM_PB_CYC,bytes/sec, +TOTAL_MC1_WRITE_BW,0,0,PM_MCS_DOWN_128B_DATA_XFER_MC1*128*PB_Freq)/ PM_PB_CYC,bytes/sec, +TOTAL_MC2_WRITE_BW,0,0,PM_MCS_DOWN_128B_DATA_XFER_MC2*128*PB_Freq)/ PM_PB_CYC,bytes/sec, +TOTAL_MC3_WRITE_BW,0,0,PM_MCS_DOWN_128B_DATA_XFER_MC3*128*PB_Freq)/ PM_PB_CYC,bytes/sec, +TOTAL_INBOUND_XLINK0_BW,4,y,4,Total X-Link0 inbound data cycles,(PM_XLINK0_IN_DATA_CYC * 8 * XBUS_Freq) / PM_XLINK_CYCLES,bytes/sec +TOTAL_INBOUND_XLINK1_BW,4,y,4,Total X-Link1 inbound data cycles,(PM_XLINK1_IN_DATA_CYC * 8 * XBUS_Freq) / PM_XLINK_CYCLES,bytes/sec +TOTAL_INBOUND_XLINK2_BW,4,y,4,Total X-Link2 inbound data cycles,(PM_XLINK2_IN_DATA_CYC * 8 * XBUS_Freq) / PM_XLINK_CYCLES,bytes/sec +TOTAL_XLINK0_UTILISATION%,5,y,4,Total X-Link0 inbound Idle cycles,(1 - PM_XLINK0_IN_IDL_CYC/PM_XLINK_CYCLES)*100,% +TOTAL_XLINK1_UTILISATION%,5,y,4,Total X-Link1 inbound Idle cycles,(1 - PM_XLINK1_IN_IDL_CYC/PM_XLINK_CYCLES)*100,% +TOTAL_XLINK2_UTILISATION%,5,y,4,Total X-Link2 inbound Idle cycles,(1 - PM_XLINK2_IN_IDL_CYC/PM_XLINK_CYCLES)*100,% +TOTAL_INBOUND_ALINK0_BW,6,y,4,Total A-Link0 inbound data cycles,(PM_ALINK0_IN_DATA_CYC * 8 * ABUS_Freq) / PM_ALINK_CYCLES,bytes/sec +TOTAL_INBOUND_ALINK1_BW,6,y,4,Total A-Link1 inbound data cycles,(PM_ALINK1_IN_DATA_CYC * 8 * ABUS_Freq) / PM_ALINK_CYCLES,bytes/sec +TOTAL_INBOUND_ALINK2_BW,6,y,4,Total A-Link2 inbound data cycles,(PM_ALINK2_IN_DATA_CYC * 8 * ABUS_Freq) / PM_ALINK_CYCLES,bytes/sec +TOTAL_ALINK0_UTILISATION%,7,y,4,Total A-Link0 inbound Idle cycles,(1 - PM_ALINK0_IN_IDL_CYC/PM_ALINK_CYCLES)*100,% +TOTAL_ALINK1_UTILISATION%,7,y,4,Total A-Link1 inbound Idle cycles,(1 - PM_ALINK1_IN_IDL_CYC/PM_ALINK_CYCLES)*100,% +TOTAL_ALINK2_UTILISATION%,7,y,4,Total A-Link2 inbound Idle cycles,(1 - PM_ALINK2_IN_IDL_CYC/PM_ALINK_CYCLES)*100,% +TOTAL_PHB0_DMA_BW,8,y,4,"DMA (any, read or write) BW received from the PCIE link for PHB 0",((PM_PHB_ANY_DMA_RCV_PHB0) *256/ PM_PHB_CYC_CNT_PHB0) * PHB_Freq,bytes/sec +TOTAL_PHB0_TCE_MISS_PERSEC,8,y,4,Total TCE Cache Miss any(Read or Write) for PHB 0 per second,((PM_PHB_ANY_TCE_MISS_PHB0) / PM_PHB_CYC_CNT_PHB0) * PHB_Freq, +TOTAL_PHB0_MSI_INTR_PERSEC,8,y,4,Total MSI interrupt received from PCIE link for PHB 0 per second,((PM_PHB_MSI_INTR_PHB0) / PM_PHB_CYC_CNT_PHB0) * PHB_Freq, +TOTAL_PHB1_DMA_BW,9,y,4,"DMA (any, read or write) BW received from the PCIE link for PHB 1",((PM_PHB_ANY_DMA_RCV_PHB1) *256/ PM_PHB_CYC_CNT_PHB1) * PHB_Freq,bytes/sec +TOTAL_PHB1_TCE_MISS_PERSEC,9,y,4,Total TCE Cache Miss any(Read or Write) for PHB 1 per second,((PM_PHB_ANY_TCE_MISS_PHB1) / PM_PHB_CYC_CNT_PHB1) * PHB_Freq, +TOTAL_PHB1_MSI_INTR_PERSEC,9,y,4,Total MSI interrupt received from PCIE link for PHB 1 per second,((PM_PHB_MSI_INTR_PHB1) / PM_PHB_CYC_CNT_PHB1) * PHB_Freq, +TOTAL_PHB2_DMA_BW,10,y,4,"DMA (any, read or write) BW received from the PCIE link for PHB 2",((PM_PHB_ANY_DMA_RCV_PHB2) *256/ PM_PHB_CYC_CNT_PHB2) * PHB_Freq,bytes/sec +TOTAL_PHB2_TCE_MISS_PERSEC,10,y,4,Total TCE Cache Miss any(Read or Write) for PHB 2 per second,((PM_PHB_ANY_TCE_MISS_PHB2) / PM_PHB_CYC_CNT_PHB2) * PHB_Freq, +TOTAL_PHB2_MSI_INTR_PERSEC,10,y,4,Total MSI interrupt received from PCIE link for PHB 2 per second,((PM_PHB_MSI_INTR_PHB2) / PM_PHB_CYC_CNT_PHB2) * PHB_Freq, |
