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| author | Rajarshi Das <drajarshi@in.ibm.com> | 2017-07-14 10:58:58 -0500 |
|---|---|---|
| committer | Rajarshi Das <drajarshi@in.ibm.com> | 2017-07-14 10:58:58 -0500 |
| commit | 9af5c5b80a9ea291deb3cec3114e90d2343a7b7b (patch) | |
| tree | 4dc1fad3feca1a47271b8f044726fce347de7e8b | |
| parent | 0b9edc983738b75c671acd8e316d75123255d25e (diff) | |
| download | ima-catalog-9af5c5b80a9ea291deb3cec3114e90d2343a7b7b.tar.gz ima-catalog-9af5c5b80a9ea291deb3cec3114e90d2343a7b7b.zip | |
Fixed incomplete event names and revised the version-id field in
POWER9 DTS files.
| -rw-r--r-- | 81E00612.4E0100.dts | 15 | ||||
| -rw-r--r-- | 81E00612.4E0200.dts | 15 |
2 files changed, 14 insertions, 16 deletions
diff --git a/81E00612.4E0100.dts b/81E00612.4E0100.dts index f0ccdfb..00ea59c 100644 --- a/81E00612.4E0100.dts +++ b/81E00612.4E0100.dts @@ -6,7 +6,7 @@ compatible = "ibm,opal-in-memory-counters"; #address-cells = <0x1>; #size-cells = <0x1>; - version-id = <0xd>; + version-id = <0xe>; NEST_MCS: nest-mcs-events { #address-cells = <0x1>; @@ -1290,32 +1290,32 @@ CORE_THREAD: core-thread-events { desc = "The number of processor cycles in privileged mode with MSR HV=0 & PR=0" ; }; event@e08 { - event-name = "CS_" ; + event-name = "CS_ST_FIN" ; reg = <0xe08 0x8>; desc = "The number of all store instructions finished" ; }; event@1dc8 { - event-name = "CS_" ; + event-name = "CS_ST_FIN_KERNEL" ; reg = <0x1dc8 0x8>; desc = "The number of all store instructions finished in kernel state" ; }; event@1608 { - event-name = "CS_" ; + event-name = "CS_ST_FIN_USER" ; reg = <0x1608 0x8>; desc = "The number of all store instructions finished in user state" ; }; event@c80 { - event-name = "CS_" ; + event-name = "CS_MISS_L1_LDATA" ; reg = <0xc80 0x8>; desc = "The number of level 1 data misses" ; }; event@1c80 { - event-name = "CS_" ; + event-name = "CS_MISS_L1_LDATA_KERNEL" ; reg = <0x1c80 0x8>; desc = "The number of level 1 data misses in kernel state" ; }; event@1480 { - event-name = "CS_" ; + event-name = "CS_MISS_L1_LDATA_USER" ; reg = <0x1480 0x8>; desc = "The number of level 1 data misses in user state" ; }; @@ -1678,5 +1678,4 @@ CORE_THREAD: core-thread-events { type = <0x1>; size = <0x2000>; }; - }; diff --git a/81E00612.4E0200.dts b/81E00612.4E0200.dts index f0ccdfb..00ea59c 100644 --- a/81E00612.4E0200.dts +++ b/81E00612.4E0200.dts @@ -6,7 +6,7 @@ compatible = "ibm,opal-in-memory-counters"; #address-cells = <0x1>; #size-cells = <0x1>; - version-id = <0xd>; + version-id = <0xe>; NEST_MCS: nest-mcs-events { #address-cells = <0x1>; @@ -1290,32 +1290,32 @@ CORE_THREAD: core-thread-events { desc = "The number of processor cycles in privileged mode with MSR HV=0 & PR=0" ; }; event@e08 { - event-name = "CS_" ; + event-name = "CS_ST_FIN" ; reg = <0xe08 0x8>; desc = "The number of all store instructions finished" ; }; event@1dc8 { - event-name = "CS_" ; + event-name = "CS_ST_FIN_KERNEL" ; reg = <0x1dc8 0x8>; desc = "The number of all store instructions finished in kernel state" ; }; event@1608 { - event-name = "CS_" ; + event-name = "CS_ST_FIN_USER" ; reg = <0x1608 0x8>; desc = "The number of all store instructions finished in user state" ; }; event@c80 { - event-name = "CS_" ; + event-name = "CS_MISS_L1_LDATA" ; reg = <0xc80 0x8>; desc = "The number of level 1 data misses" ; }; event@1c80 { - event-name = "CS_" ; + event-name = "CS_MISS_L1_LDATA_KERNEL" ; reg = <0x1c80 0x8>; desc = "The number of level 1 data misses in kernel state" ; }; event@1480 { - event-name = "CS_" ; + event-name = "CS_MISS_L1_LDATA_USER" ; reg = <0x1480 0x8>; desc = "The number of level 1 data misses in user state" ; }; @@ -1678,5 +1678,4 @@ CORE_THREAD: core-thread-events { type = <0x1>; size = <0x2000>; }; - }; |
