diff options
| -rw-r--r-- | Makefile | 2 | ||||
| -rw-r--r-- | cf-code/cf-fsi-fw.S | 66 | ||||
| -rw-r--r-- | cf-fsi-fw.h | 78 | ||||
| -rw-r--r-- | cf-fsi-test.c | 37 |
4 files changed, 83 insertions, 100 deletions
@@ -28,7 +28,7 @@ TARGETS_bin = $(patsubst %.h,%.bin,$(TARGET_DEFS)) all: $(TARGETS_bin) cf-fsi-test cf-code/%.s : cf-code/%.h cf-code/cf-fsi-fw.S - $(CC) -E $(M68KCPPFLAGS) -include $^ -o $@ + $(CC) -E $(M68KCPPFLAGS) -I. -include $^ -o $@ cf-code/%.o : cf-code/%.s $(M68KAS) $(M68KAFLAGS) -march=isac $^ -o $@ diff --git a/cf-code/cf-fsi-fw.S b/cf-code/cf-fsi-fw.S index cbf381c..a6cacee 100644 --- a/cf-code/cf-fsi-fw.S +++ b/cf-code/cf-fsi-fw.S @@ -1,3 +1,5 @@ +#include "cf-fsi-fw.h" + .equ SRAM_BASE_BE, 0x320000 .equ SRAM_BASE_LE, 0x720000 .equ GPIO_BASE, 0x780000 @@ -7,70 +9,6 @@ .equ CVIC_SW_IRQ_CLR, 0x1c .equ CVIC_SW_IRQ, 0x2 - /**** SRAM layout ****/ - - /* Command register: - * - * +---------------------------+ - * | rsvd | RLEN | CLEN | CMD | - * | 8 | 8 | 8 | 8 | - * +---------------------------+ - * | | | - * Response len | | - * (in bits) | | - * | | - * Command len | - * (in bits) | - * | - * Command code - */ - .equ CMD_REG, 0x00 - .equ CMD_NONE, 0x00 - .equ CMD_COMMAND, 0x01 - .equ CMD_BREAK, 0x02 - - /* Status register - * - */ - .equ STAT_REG, 0x04 /* Status */ - .equ STAT_STOPPED, 0x00 - .equ STAT_SENDING, 0x01 - .equ STAT_COMPLETE, 0x02 - .equ STAT_ERR_INVAL_CMD, 0x80 - .equ STAT_ERR_INVAL_IRQ, 0x81 - .equ STAT_ERR_MTOE, 0x82 - - /* Response tag */ - .equ STAT_RTAG, 0x05 - - /* Response CRC */ - .equ STAT_RCRC, 0x06 - - /* Command data area - * - * Last byte of message must be left aligned - */ - .equ CMD_DATA, 0x10 /* 64 bit of data */ - - /* Response data area, right aligned, unused top bits are 1 */ - .equ RSP_DATA, 0x20 /* 32 bit of data */ - - /* Misc */ - .equ INT_CNT, 0x30 /* 32-bit interrupt count */ - .equ BAD_INT_VEC, 0x34 - .equ TRACEBUF, 0x40 - .equ TR_CLKOSTART, 0x00 - .equ TR_OLEN, 0x01/* + len */ - .equ TR_CLKOBIT0, 0x02 - .equ TR_CLKOBIT1, 0x03 - .equ TR_CLKZ, 0x04 /* + count */ - .equ TR_CLKWSTART, 0x05 - .equ TR_CLKTAG, 0x06 /* + tag */ - .equ TR_CLKDATA, 0x07 /* + len */ - .equ TR_CLKCRC, 0x08 /* + raw crc */ - .equ TR_CLKIBIT0, 0x80 - .equ TR_CLKIBIT1, 0x81 - /* Register usage * * A0 : sratch/temp diff --git a/cf-fsi-fw.h b/cf-fsi-fw.h new file mode 100644 index 0000000..1897ea6 --- /dev/null +++ b/cf-fsi-fw.h @@ -0,0 +1,78 @@ +#ifndef __CF_FSI_FW_H +#define __CF_FSI_FW_H + +/* + * SRAM layout + */ + +/* Command register: + * + * +---------------------------+ + * | rsvd | RLEN | CLEN | CMD | + * | 8 | 8 | 8 | 8 | + * +---------------------------+ + * | | | + * Response len | | + * (in bits) | | + * | | + * Command len | + * (in bits) | + * | + * Command code + */ +#define CMD_REG 0x00 +#define CMD_REG_CMD_MASK 0x000000ff +#define CMD_REG_CMD_SHIFT 0 +#define CMD_NONE 0x00 +#define CMD_COMMAND 0x01 +#define CMD_BREAK 0x02 +#define CMD_INVALID 0xff +#define CMD_REG_CLEN_MASK 0x0000ff00 +#define CMD_REG_CLEN_SHIFT 8 +#define CMD_REG_RLEN_MASK 0x00ff0000 +#define CMD_REG_RLEN_SHIFT 16 + +/* Status register + * + */ +#define STAT_REG 0x04 /* Status */ +#define STAT_STOPPED 0x00 +#define STAT_SENDING 0x01 +#define STAT_COMPLETE 0x02 +#define STAT_ERR_INVAL_CMD 0x80 +#define STAT_ERR_INVAL_IRQ 0x81 +#define STAT_ERR_MTOE 0x82 + +/* Response tag */ +#define STAT_RTAG 0x05 + +/* Response CRC */ +#define STAT_RCRC 0x06 + +/* Command data area + * + * Last byte of message must be left aligned + */ +#define CMD_DATA 0x10 /* 64 bit of data */ + +/* Response data area, right aligned, unused top bits are 1 */ +#define RSP_DATA 0x20 /* 32 bit of data */ + +/* Misc */ +#define INT_CNT 0x30 /* 32-bit interrupt count */ +#define BAD_INT_VEC 0x34 +#define TRACEBUF 0x40 +#define TR_CLKOSTART 0x00 +#define TR_OLEN 0x01/* + len */ +#define TR_CLKOBIT0 0x02 +#define TR_CLKOBIT1 0x03 +#define TR_CLKZ 0x04 /* + count */ +#define TR_CLKWSTART 0x05 +#define TR_CLKTAG 0x06 /* + tag */ +#define TR_CLKDATA 0x07 /* + len */ +#define TR_CLKCRC 0x08 /* + raw crc */ +#define TR_CLKIBIT0 0x80 +#define TR_CLKIBIT1 0x81 + +#endif /* __CF_FSI_FW_H */ + diff --git a/cf-fsi-test.c b/cf-fsi-test.c index e500729..59a3f07 100644 --- a/cf-fsi-test.c +++ b/cf-fsi-test.c @@ -16,6 +16,8 @@ #include <errno.h> #include <time.h> +#include "cf-fsi-fw.h" + #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ : : "r" (0) : "memory") @@ -114,41 +116,6 @@ static void *cfmem; #define CFMEM_BASE 0x9ef00000 /* Reserved memory */ #define CFMEM_SIZE 0x00100000 /* 1M */ -#define CMD_REG 0x00 -#define CMD_REG_CMD_MASK 0x000000ff -#define CMD_REG_CMD_SHIFT 0 -#define CMD_NONE 0x00 -#define CMD_COMMAND 0x01 -#define CMD_BREAK 0x02 -#define CMD_INVALID 0xff -#define CMD_REG_CLEN_MASK 0x0000ff00 -#define CMD_REG_CLEN_SHIFT 8 -#define CMD_REG_RLEN_MASK 0x00ff0000 -#define CMD_REG_RLEN_SHIFT 16 - -#define STAT_REG 0x04 -#define STAT_STOPPED 0x00 -#define STAT_SENDING 0x01 -#define STAT_COMPLETE 0x02 -#define STAT_ERR_INVAL_CMD 0x80 -#define STAT_ERR_INVAL_IRQ 0x81 -#define STAT_ERR_MTOE 0x83 - -#define STAT_RTAG 0x05 -#define STAT_RCRC 0x06 - -#define CMD_DATA 0x10 /* 64 bit of data left aligned */ -#define RSP_DATA 0x20 /* 32 bit of data right aligned */ -#define INT_CNT 0x30 /* debug: interrupt count */ -#define BAD_INT_VEC 0x34 /* debug: vector of bad interrupt */ - -#define TRACEBUF 0x40 -#define TR_CLK0START 0x01 -#define TR_CLKOBIT0 0x02 -#define TR_CLKOBIT1 0x03 -#define TR_CLKZ 0x04 /* + # */ -#define TR_CLKWSTART 0x05 /* + bit */ - #define FSI_GPIO_CMD_DPOLL 0x2 #define FSI_GPIO_CMD_EPOLL 0x3 #define FSI_GPIO_CMD_TERM 0x3f |
