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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2018-07-02 14:03:44 +1000 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2018-07-02 14:03:44 +1000 |
commit | b56eb303f4a4b0396d254efae579fe1c525f8d22 (patch) | |
tree | fab17adc0aeb02b7704ba97832bad3b8cf99259a /cf-code | |
parent | f86c2ab3c40112e227e0d250868a3de2b04e93d7 (diff) | |
download | cf-fsi-b56eb303f4a4b0396d254efae579fe1c525f8d22.tar.gz cf-fsi-b56eb303f4a4b0396d254efae579fe1c525f8d22.zip |
Fix interrupt masking
Using the wrong bits in SR isn't a very good idea
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'cf-code')
-rw-r--r-- | cf-code/cf-fsi-fw.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cf-code/cf-fsi-fw.S b/cf-code/cf-fsi-fw.S index adcf964..a65dd05 100644 --- a/cf-code/cf-fsi-fw.S +++ b/cf-code/cf-fsi-fw.S @@ -365,7 +365,7 @@ _start: move.l %a0,(0x46*4) /* Mask interrupts */ - move.w #0x2007,%sr + move.w #0x2700,%sr /* Configure GPIOs to output */ bsr config_gpio_out @@ -406,7 +406,7 @@ wait_cmd: beq 1f count_stop stop #0x2000 - move.w #0x2007,%sr + move.w #0x2700,%sr bra wait_cmd /* Neither continuous clocks nor STOP, use some nops |