diff options
| author | Bernd Kuhls <bernd.kuhls@t-online.de> | 2014-04-27 13:29:15 +0200 |
|---|---|---|
| committer | Peter Korsgaard <peter@korsgaard.com> | 2014-05-03 03:39:29 +0200 |
| commit | affb6a38535382526333517e86ee5a31df0064fe (patch) | |
| tree | 0616809bdf279298eacc9e1d769fe74f8318ba73 /package/gcc | |
| parent | 26132bac8dc4c2d3130c0d239ab4e174dd8b221c (diff) | |
| download | buildroot-affb6a38535382526333517e86ee5a31df0064fe.tar.gz buildroot-affb6a38535382526333517e86ee5a31df0064fe.zip | |
arch: add support for "corei7" Intel CPU optimisations
gcc support was added in version 4.6:
http://gcc.gnu.org/gcc-4.6/changes.html
Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Diffstat (limited to 'package/gcc')
| -rw-r--r-- | package/gcc/Config.in.host | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/package/gcc/Config.in.host b/package/gcc/Config.in.host index 34a817bdaa..6a3b75bdfa 100644 --- a/package/gcc/Config.in.host +++ b/package/gcc/Config.in.host @@ -20,12 +20,12 @@ choice bool "gcc 4.2.2-avr32-2.1.5" config BR2_GCC_VERSION_4_3_X - depends on !BR2_microblaze && !BR2_aarch64 && !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a12 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_x86_jaguar && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_aarch64 && !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a12 && !BR2_cortex_a15 && !BR2_x86_corei7 && !BR2_x86_atom && !BR2_x86_jaguar && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 depends on !BR2_ARM_EABIHF bool "gcc 4.3.x" config BR2_GCC_VERSION_4_4_X - depends on !BR2_microblaze && !BR2_aarch64 && !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a12 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_x86_jaguar && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_aarch64 && !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a12 && !BR2_cortex_a15 && !BR2_x86_corei7 && !BR2_x86_atom && !BR2_x86_jaguar && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 bool "gcc 4.4.x" # ARM EABIhf support appeared in gcc 4.6 depends on !BR2_ARM_EABIHF @@ -33,7 +33,7 @@ choice depends on !BR2_ARM_FPU_VFPV4 && !BR2_ARM_FPU_VFPV4D16 config BR2_GCC_VERSION_4_5_X - depends on !BR2_microblaze && !BR2_aarch64 && !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a12 && !BR2_cortex_a15 && !BR2_x86_jaguar && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_aarch64 && !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a12 && !BR2_cortex_a15 && !BR2_x86_corei7 && !BR2_x86_jaguar && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4 select BR2_GCC_NEEDS_MPC # ARM EABIhf support appeared in gcc 4.6 depends on !BR2_ARM_EABIHF |
