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* interrutps: Export irq_find_source()Benjamin Herrenschmidt2017-01-051-0/+1
| | | | | | | It will be used by xive Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* buddy: Add a simple generic buddy allocatorBenjamin Herrenschmidt2017-01-051-0/+54
| | | | | | | | | | | It operates on bits representing whatever objects the caller wants it to represent, it's not per-se a memory allocator (it's meant to be used among others by XIVE for VP allocations). As such it cannot keep linked lists of free objects, so don't expect stellar perfs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart@linux.vnet.ibm.com: add (C) header, fix gcc4.8 build error] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* bitmap: Add basic bitmap opsBenjamin Herrenschmidt2017-01-041-0/+69
| | | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart@linux.vnet.ibm.com: add (C) header] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: remove force_dummy_console()Oliver O'Halloran2017-01-041-2/+0
| | | | | | | | | | force_dummy_console() was only ever used to ensure the dummy console would be initialised when the platform did not setup it's usual console. The new console init path will uses the dummy console by default so this is now unnecessary. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: remove con_ops->flush()Oliver O'Halloran2017-01-041-1/+0
| | | | | | | | | Flushing the OPAL console is now handled by a driver specific OPAL call handler so this can be removed. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: use opal_con_ops APIOliver O'Halloran2017-01-041-0/+3
| | | | | | | | | | | | | | | | | | Adds a new structure that contains the implementations of the various OPAL console handlers. This is intended to replace the existing ad-hoc mechanism where the OPAL call handlers are overwritten in the OPAL console driver's init function. Currently this just moves the site where the OPAL call handlers are overwritten to inside of console.c, but it is intended to give us a mechanism for implementing features such as pointer validation for the OPAL console calls without having to manually update each driver. This also helps to clarify differences between the internal (skiboot) console and the external (OPAL) console. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: add opal_con_ops structureOliver O'Halloran2017-01-041-0/+27
| | | | | | | | | | Adds a separate structure to house the operations for the OPAL console. This is used to define a new API for dealing with the OPAL console in the next patch. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: move mambo con_ops into the platformOliver O'Halloran2017-01-041-2/+1
| | | | | | | | | There's no need for this to be in the skiboot core console code. Also do a few cleanups while we're shovling code around. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: add helper to create serial console nodesOliver O'Halloran2017-01-041-0/+3
| | | | | | | | | | The creation of /ibm,skiboot/console/serial@<xyz> nodes is pretty much identical across the various OPAL console drivers. This patch moves it into a helper function as a cleanup. Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: unexport con_lockOliver O'Halloran2017-01-041-2/+0
| | | | | | | | | | The skiboot console lock protects the skiboot log buffer. All writes to the log buffer need to be done via console_write() so there is no need to export the lock outside console.c Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* console: don't use __flush_console() outside console.cOliver O'Halloran2017-01-041-1/+0
| | | | | | | | | | | There is only one use of this function outside of console.c and that usage is broken. As the name suggests this is an internal function that is only safe when the console lock held is held. flush_console() will acquire the lock for the caller so that should be used instead. Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* platform: add OPAL_REBOOT_FULL_IPL reboot typeAndrew Donnellan2016-12-231-0/+1
| | | | | | | | | | There may be circumstances in which a user wants to force a full IPL reboot rather than using fast reboot. Add a new reboot type, OPAL_REBOOT_FULL_IPL, that disables fast reboot. On platforms which don't support fast reboot, this will be equivalent to a normal reboot. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hw/npu: Remove obsolete config space indexesGavin Shan2016-12-141-9/+0
| | | | | | | | | | The PCI config space indexes NPU_DEV_CFG_{NORMAL, RDONLY, W1CR, MAX} are useless. This removes them. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Acked-By: Alistair Popple <alistair@popple.id.au> Reviewed-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* include/npu.h: Remove unused struct npu_dev_trapAlistair Popple2016-12-141-17/+0
| | | | | | | | | | | | Commit "0736df5 hw/npu: Use PCI virtual device" converted the npu over to using some generic infrastructure to filter/intercept PCIe config space writes. This made the original trap implementation redundant. However it seems removal of the old struct definitions was missed during the cleanup, so do that now. Signed-off-by: Alistair Popple <alistair@popple.id.au> Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Set PSSCR value for idle statesShilpasri G Bhat2016-12-131-0/+15
| | | | | | | | | | | | | | | | | | | | PSSCR(Processor Stop Status and Control Register) is an SPR whose contents control the operation of stop instruction. Currently in DT, the value of PSSCR only included RL(Requested Level) for each idle state. This patch adds MTL(Maximum Transistion Level), TR(Transistion Rate), ESL(Enable State Loss) and EC(Exit Criterion) bits for idle state in the PSSCR configuration. It also adds new idle states stop0_lite, stop1_lite and stop2_lite which are no state loss versions of stop0, stop1 and stop2 respectively. The lite variant has EC and ESL bits of PSSCR set to 0. The thread entering a lite variant of stop state will not lose any state and will wakeup at next instruction following stop if MSR.EE=0 or at the corresponding interrupt handler if MSR.EE=1. This will reduce the exit latency of the idle state and hardware will not allocate the thread resources to other threads while in power saving mode. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* mambo: Add Fake NVRAM driverJack Miller2016-12-131-0/+5
| | | | | | | | | Implement a fake NVRAM device based on arbitrary memory reserves. This allows NVRAM images to be preloaded without the FSP. Signed-off-by: Jack Miller <jack@codezen.org> Tested-by: Chris Smart <chris@distroguy.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* sensor: add a family field in the handlerCédric Le Goater2016-12-081-13/+21
| | | | | | | | | | | | | | Currently, we are hijacking the last bit of the resource field of the sensor handler to differentiate the sensor families and route the opal_sensor_read() call to the appropriate component. Let's reserve the last 3bits and provide an API to set the sensor family for current use and future use. This gives us a maximum of 8 families and 32 resource classes. The FSP uses 15, so we should be fine for a while. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb3: Trick to allow control of the PCIe link width and speedBenjamin Herrenschmidt2016-12-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements a hook inside OPAL that catches 16 and 32 bit writes to the link status register of the PHB. It allows you to write a new speed or a new width, and OPAL will then cause the PHB to renegociate. Example: First read the link status on PHB4: setpci -s 0004:00:00.0 0x5a.w a103 It's at x16 Gen3 speed (8GT/s) bits 0x0ff0 are the width and 0x000f the speed. The width can be 1 to 16 and the speed 1 to 3 (2.5, 5 and 8GT/s) Then try to bring it down to 1x Gen1 : setpci -s 0004:00:00.0 0x5a.w=0xa011 Observe the result in the PHB: / # lspci -s 0004:00:00.0 -vv 0004:00:00.0 PCI bridge: IBM Device 03dc (prog-if 00 [Normal decode]) .../... LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk- DLActive+ BWMgmt- ABWMgmt+ And in the device: / # lspci -s 0004:01:00.0 -vv .../... LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* i2c: Add nuvoton quirk, disallowing i2cdetect as it locks TPMStewart Smith2016-12-021-0/+9
| | | | | | | | | | | | | | In TPM 2.0 Firmware 1.3.0.1 and 1.3.1.0 (at least) there exists a bug where if you send the wrong thing to the TPM it may lock the bus, with no way of recovery except powering the TPM off/on. On our current systems, the only way to power the TPM off/on is to pull the power on the system (*NOT* just power off/on to host from BMC). So, this patch adds the ability to do things to the i2c request really early on, well before it hits any hardware, such as quickly drop it. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* p8i2c: Use calculated poll_interval when booting OPALStewart Smith2016-11-241-0/+5
| | | | | | | | Otherwise we'd default to 2seconds (TIMER_POLL) during boot on chips with a functional i2c interrupt, leading to slow i2c during boot (or hitting timeouts instead). Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: do SLW timer testing while holding xscom lockStewart Smith2016-11-241-2/+15
| | | | | | | | | | | We add some routines that let a caller get the xscom lock once and then do a bunch of xscoms while holding it. In some situations without this, it could take long enough to get the xscom lock that the 1ms timeout would expire and we'd falsely think the SLW timer didn't work when in fact it did. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* i2c: Add i2c_run_req() to crank the state machine for a requestStewart Smith2016-11-241-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Doing everything asynchronously is brilliant, it's exactly what we want to do. Except... the tpm driver wants to do things synchronously, which isn't so cool. For reasons that are not yet completely known, we spend an awful lot of time in the main thread *not* running pollers (potentially seconds), which doesn't bode well for I2C timeouts. Since the TPM measure is done in a secondary thread, we do *not* run pollers there either (as of 323c8aeb54bd4e0b9004091fcbb4a9daeda2f576 - which is roughly as of skiboot 2.1.1). But we still need to crank the i2c state machine, so we introduce a call to do just that. It will return how long the poll interval should be, so that we can time_wait() for a more appropriate time for whatever i2c implementation is sitting behind things. Without this, it was "easy" to get to a situation where the i2c state machine wasn't cranked at all, and you'd hit the i2c timeout (for the issued operation) before the poller to crank i2c was ever called. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> Tested-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* fsp: Don't recurse pollers in ibm_fsp_terminateStewart Smith2016-11-241-0/+7
| | | | | | | | | | | If we were to terminate in a poller, we'd call op_display() which called pollers which hit the recursive poller warning, which ended in not much fun at all. This patch will skip the running of pollers and instead run the FSP poller to set the op-panel display before attn. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Change debug printsMichael Neuling2016-11-241-2/+2
| | | | | | | | | | | | Currently we print "PHB4" and mean either "PHB version 4" or "PHB number 4" which can be quite confusing. This makes it clearer when it's one or the other. Also fixes some cut and paste errors in comments from PHB3. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Fix location of EEH enable bitsMichael Neuling2016-11-241-1/+2
| | | | | | | Fix some of the bit definitions. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* phb4: Updated inits as of PHB4 spec 0.52Benjamin Herrenschmidt2016-11-152-8/+4
| | | | | | | This includes some DD2.0 support Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Provide a way to override some IPI sourcesBenjamin Herrenschmidt2016-11-152-5/+6
| | | | | | | | | | | | | | | | | | | | | | Some devices such as NX or the NPU will use some of the XIVE provided IPIs for their own interrupts. Thus we need a way for those to provide a custom irq_source_ops for portions of the IPI space in order for them to provide their own attributes() and if needed, interrutps() callbacks. We achieve that by creating a second list of sources which can overlap the primary. The global stock of IPIs is registered by XIVE in the secondary list which is searched when no match is found in the primary. A new API xive_register_ipi_source() is provided for those devices to create an overlapping source structure in the primary list for a subset of the IPIs. Those IPIs must have been previously allocated using xive_alloc_ipi_irqs() Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* xive: Add helper to retrieve an IPI trigger portBenjamin Herrenschmidt2016-11-151-0/+5
| | | | | | | To be used by such things as VAS Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* psi: Don't register more interrupts than the HW supportsBenjamin Herrenschmidt2016-11-151-1/+1
| | | | | | | | On P9, the HW only has 14 interrupts. Trying to register 16 causes a checkstop when we try to initialize the 2 missing ones. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* psi: Add DT option to disable LPC interruptsBenjamin Herrenschmidt2016-11-151-0/+1
| | | | | | | | | | | | Some sim models have the LPC interrupts stuck asserted on secondary chips so we add a device-tree option that makes us set the policy for these to "Linux" instead of "OPAL". Since they aren't referenced in the device-tree this will de-facto prevent them from being enabled Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add BMC platform to enable correct OEM IPMI commandsStewart Smith2016-11-082-6/+23
| | | | | | | | | | | | | | | An out of tree platform (p8dtu) uses a different IPMI OEM command for IPMI_PARTIAL_ADD_ESEL. This exposed some assumptions about the BMC implementation in our core code. Now, with platform.bmc, each platform can dictate (or detect) the BMC that is present. We allow it to be set at runtime rather than purely statically in struct platform as it's possible to have differing BMC implementations on the one machine (e.g. AMI BMC or OpenBMC). Acked-by: Jeremy Kerr <jk@ozlabs.org> [stewart@linux.vnet.ibm.com: remove enum, update (C) years] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Remove KERNEL_COMMAND_LINE mention from config.hStewart Smith2016-11-071-5/+0
| | | | | Fixes: 879caa27dd19873510f9ea58cdefb4775197abd2 Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* mambo: Convert console read/write from asm to CMichael Neuling2016-11-021-2/+2
| | | | | | | | Also changes the function name: mambo_read/write() -> mambo_console_read/write() Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* mambo: Convert sim exit from asm to CMichael Neuling2016-11-021-2/+0
| | | | | Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* fast-reboot: disable on FSP code update or unrecoverable HMIStewart Smith2016-10-251-0/+1
| | | | | | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> [stewart@linux.vnet.ibm.com: unlock before return (suggested by Mahesh/Andrew), disable only on non-cancelling fsp codeupdate call (suggested by Vasant)] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/flash-subpartition: compute partition size from subpartition structStewart Smith2016-10-251-1/+2
| | | | | | | | | | | | | From the subpartition structure, we have the ability to compute the full partition size. Do that. This lets us only read the amount of a subpartition that is valid and needed to be read, rather than having to read the entire thing. We continue the current behaviour of loading flash partitions though. Based-on-patch-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/flash: Move subpartition locating logic out into own file, add testsStewart Smith2016-10-251-1/+2
| | | | | | | | | | A unit test for parsing sub-partition info is useful for a number of reasons, one of which showed its head during development of secure/trusted boot. This patch just moves things around, there's no functional changes. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: Remove obsoleted PCI slot pfreset() operationGavin Shan2016-10-244-17/+8
| | | | | | | | | | | PCI slot pfreset() operation is obsoleted as nobody uses it. This removes it and the related PCI slot states. No functional changes introduced. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Acked-by: Russell Currey <ruscur@russell.cc> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* pci: make PCI slot state as incremental to base numberGavin Shan2016-10-244-72/+72
| | | | | | | | | | | | | | | | | | Various backends define their own PCI slot states for flexibility with numbers [A]. PCI core also defines its PCI slot states [B]. For one specific PCI slot state, the major number of [A] and [B] should be same so that the corresponding operation can be found. It means [A] and [B] are relevant to some extent, but the code where defines the PCI slots in backends doesn't reflect it. This makes the major PCI slot state defined in backend same to the corresponding one defined in PCI core. The minor PCI slot states are made to be incremental to their base number (major PCI slot state). No functional changes introduced. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Acked-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/pci: Claim surprise hotplug capabilityGavin Shan2016-10-171-0/+1
| | | | | | | | | | | | | This claims PCIe surprise hotplug capability through device node's property "ibm,slot-surprise-pluggable". The slot has the capability when surprise hotplug is supported in its slot's capability bits or link state change reporting is supported in PCIe link capability bits. In order for link state events to be properly raised during surprise hotplug, the power supply to the slot should be always on. The slot's power state should be switched accordingly during fundamental reset. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Declare proc_chip_quirks as extern, squash sparse warningStewart Smith2016-10-171-1/+3
| | | | | | | | | include/chip.h:134:3: warning: symbol 'proc_chip_quirks' was not declared. Should it be static? In fact it shouldn't be static, it should just exist *once* and that place is chip.c Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Fast reboot for P8Benjamin Herrenschmidt2016-10-174-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an experimental patch that implements "Fast reboot" on P8 machines. The basic idea is that when the OS calls OPAL reboot, we gather all the threads in the system using a combination of patching the reset vector and soft-resetting them, then cleanup a few bits of hardware (we do re-probe PCIe for example), and reload & restart the bootloader. For Trusted Boot, this means we *add* measurements to the TPM, so you will get *different* PCR values as compared to a full IPL. This makes sense as if you want to be sure you are running something known then, well, do a full IPL as soft reset should never be trusted to clear any malicious code. This is very experimental and needs a lot of testing and also auditing code for other bits of HW that might need to be cleaned up. BenH TODO: I also need to check if we are properly PERST'ing PCI devices. This is partially based on old code I had to do that on P7. I only support it on P8 though as there are issues with the PSI interrupts on P7 that cannot be reliably solved. Even though this should be considered somewhat experimental, we've had a lot of success on a variety of machines. Dozens/hundreds of reboots across Tuleta, Garrison and Habanero. Currently, we've hidden it behind a NVRAM config option, which *is* liable to change in the future (to ensure that only those who know what they're doing enable it) You can enable the experimental support via nvram option: nvram -p ibm,skiboot --update-config experimental-fast-reset=feeling-lucky Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart@linux.vnet.ibm.com: hide behind nvram option, include Mambo fixes from Mikey] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* device: Add helper to delete a property by name if it existsBenjamin Herrenschmidt2016-10-141-0/+2
| | | | | | | | This will be useful for fast reboot which needs to clean a few things up. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* nvram: add nvram_query_eq()Oliver O'Halloran2016-10-141-0/+1
| | | | | | | | Adds a helper that looks for the given NVRAM config string and checks that associated value is equal to the supplied value. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* nvram: force re-verification after writingOliver O'Halloran2016-10-141-0/+1
| | | | | | | | | | The running OS is free to re-write the contents of NVRAM. The skiboot NVRAM parser relies on the NVRAM contents being valid so we need to force the NVRAM contents to be revalidated after the host OS has written to it. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* include/capp.h: add #include guardClaudio Carvalho2016-10-101-1/+6
| | | | | | | This adds #include guard for include/capp.h Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core: add flash_subpart_info()Claudio Carvalho2016-10-101-1/+3
| | | | | | | | | | | | | | | | | | Currently, the CAPP lid has the TOC (4K) and one supartition (36K). For secure boot we can either build one container for the TOC and another one for the subpartition, or build one container for the whole CAPP partition. We decided implement the second option. The first option would require changes to the CAPP TOC layout in order to correlate the TOC with the subpartitions. Besides that, the first option also increases the boot time since we would need to verify and measure the CAPP TOC. This patch adds the flash_subpart_info function so the correct CAPP subpartition can be selected also outside of the flash API. Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/init: remove master_cpu parameterOliver O'Halloran2016-09-271-1/+1
| | | | | | | | | | | | master_cpu is used to determine the ChipTOD master if no ChipTOD information is available in the HDAT. However, it is set to zero at every skiboot entry point (fdt_entry, the 0x180 FSP entry and opal_boot_trampoline) and is otherwise unused. This patch removes this passing around and uses the boot CPU PIR to find the ChipTOD master rather than zero. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* occ/prd/opal-prd: Queue OCC_RESET event message to host in OpenPOWERShilpasri G Bhat2016-09-262-0/+2
| | | | | | | | | | | | | | | | | During an OCC reset cycle the system is forced to Psafe pstate. When OCC becomes active, the system has to be restored to its last pstate as requested by host. So host needs to be notified of OCC_RESET event or else system will continue to remian in Psafe state until host requests a new pstate after the OCC reset cycle. This patch defines 'OPAL_PRD_MSG_TYPE_OCC_RESET_NOTIFY' to notify OPAL when opal-prd issues OCC reset. OPAL will queue OCC_RESET message to host when it receives opal_prd_msg of type '*_OCC_RESET_NOTIFY'. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* include: Fix u8 type in chip.hClaudio Carvalho2016-09-141-3/+3
| | | | | | | | | | u8 is defined in ccan/short_types/short_types.h, but chip.h doesn't include it. This just replaces u8 by uint8_t in chip.h. Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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