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-rw-r--r--include/npu2-regs.h7
-rw-r--r--include/npu2.h9
2 files changed, 15 insertions, 1 deletions
diff --git a/include/npu2-regs.h b/include/npu2-regs.h
index f7ba675e..59959659 100644
--- a/include/npu2-regs.h
+++ b/include/npu2-regs.h
@@ -17,6 +17,13 @@
#ifndef __NPU2_REGS_H
#define __NPU2_REGS_H
+struct npu2;
+uint64_t npu2_read4(struct npu2 *p, uint64_t reg);
+void npu2_write4(struct npu2 *p, uint64_t reg, uint64_t val);
+uint64_t npu2_read(struct npu2 *p, uint64_t reg);
+void npu2_write(struct npu2 *p, uint64_t reg, uint64_t val);
+void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask);
+
#define NPU2_REG_OFFSET(stack, block, offset) \
(((stack) << 20) | ((block) << 16) | (offset))
diff --git a/include/npu2.h b/include/npu2.h
index d535e656..64d6dc09 100644
--- a/include/npu2.h
+++ b/include/npu2.h
@@ -25,6 +25,10 @@
#define NPU2ERR(p, fmt, a...) prlog(PR_ERR, "NPU%d: " fmt, \
(p)->phb.opal_id, ##a)
+#define NPU2DEVDBG(p, fmt, a...) NPU2DBG((p)->npu, fmt, ##a)
+#define NPU2DEVINF(p, fmt, a...) NPU2INF((p)->npu, fmt, ##a)
+#define NPU2DEVERR(p, fmt, a...) NPU2ERR((p)->npu, fmt, ##a)
+
/* Number of PEs supported */
#define NPU2_MAX_PE_NUM 16
#define NPU2_RESERVED_PE_NUM 15
@@ -78,6 +82,7 @@ struct npu2_dev {
uint32_t index;
uint32_t flags;
uint64_t xscom;
+ uint64_t pl_xscom_base;
void *regs;
struct dt_node *dt_node;
struct npu2_pcie_bar bars[2];
@@ -94,11 +99,13 @@ struct npu2_dev {
struct phb *phb;
struct pci_device *pd;
+ int ntl_reset_done;
+
/* Vendor specific capability */
uint32_t vendor_cap;
/* Which PHY lanes this device is associated with */
- uint16_t lane_mask;
+ uint32_t lane_mask;
/* Track currently running procedure and step number */
uint16_t procedure_number;
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