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| author | Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> | 2015-06-18 17:07:54 +0530 |
|---|---|---|
| committer | Stewart Smith <stewart@linux.vnet.ibm.com> | 2015-07-06 16:10:15 +1000 |
| commit | f19aaab0e71d83afbe9730312898ad25e33d9296 (patch) | |
| tree | 57cbd4cf1742323f909f4b16669e4024ea528119 /include | |
| parent | f5b38a25712ab74e6f8fcdaa088aaeead9655a71 (diff) | |
| download | blackbird-skiboot-f19aaab0e71d83afbe9730312898ad25e33d9296.tar.gz blackbird-skiboot-f19aaab0e71d83afbe9730312898ad25e33d9296.zip | |
occ: Poll OCC throttle status and queue OCC events to host
Add a new class of message definition OPAL_MSG_OCC to
opal_message_type to notify the following OCC events to host:
1) OCC Reset
2) OCC Load
3) OCC Throttle Status Change
Add an opal poller to periodically read throttle status updated by OCC
for each chip and notify any change in throttle status to host. The
throttle status indicates the reason why OCC may have limited the max
Pstate of the chip.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/chip.h | 1 | ||||
| -rw-r--r-- | include/opal-api.h | 25 |
2 files changed, 26 insertions, 0 deletions
diff --git a/include/chip.h b/include/chip.h index 9cecace1..654d2e0b 100644 --- a/include/chip.h +++ b/include/chip.h @@ -148,6 +148,7 @@ struct proc_chip { uint64_t homer_size; uint64_t occ_common_base; uint64_t occ_common_size; + u8 throttle; /* Must hold capi_lock to change */ u8 capp_phb3_attached_mask; diff --git a/include/opal-api.h b/include/opal-api.h index d58c8bff..bfad5896 100644 --- a/include/opal-api.h +++ b/include/opal-api.h @@ -418,6 +418,7 @@ enum opal_msg_type { OPAL_MSG_HMI_EVT, OPAL_MSG_DPO, OPAL_MSG_PRD, + OPAL_MSG_OCC, OPAL_MSG_TYPE_MAX, }; @@ -887,6 +888,30 @@ struct opal_prd_msg { }; }; +#define OCC_RESET 0 +#define OCC_LOAD 1 +#define OCC_THROTTLE 2 +#define OCC_MAX_THROTTLE_STATUS 5 +/* + * struct opal_occ_msg: + * type: OCC_RESET, OCC_LOAD, OCC_THROTTLE + * chip: chip id + * throttle status: indicates the reason why OCC may have limited + * the max Pstate of the chip. + * 0x00 = No throttle + * 0x01 = Power Cap + * 0x02 = Processor Over Temperature + * 0x03 = Power Supply Failure (currently not used) + * 0x04 = Over current (currently not used) + * 0x05 = OCC Reset (not reliable as some failures will not allow for + * OCC to update throttle status) + */ +struct opal_occ_msg { + __be64 type; + __be64 chip; + __be64 throttle_status; +}; + /* * SG entries * |
